drivers/net/wireless/iwlwifi/iwl-agn.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved.
   4  *
   5  * Portions of this file are derived from the ipw3945 project, as well
   6  * as portions of the ieee80211 subsystem header files.
   7  *
   8  * This program is free software; you can redistribute it and/or modify it
   9  * under the terms of version 2 of the GNU General Public License as
  10  * published by the Free Software Foundation.
  11  *
  12  * This program is distributed in the hope that it will be useful, but WITHOUT
  13  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  15  * more details.
  16  *
  17  * You should have received a copy of the GNU General Public License along with
  18  * this program; if not, write to the Free Software Foundation, Inc.,
  19  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20  *
  21  * The full GNU General Public License is included in this distribution in the
  22  * file called LICENSE.
  23  *
  24  * Contact Information:
  25  *  Intel Linux Wireless <ilw@linux.intel.com>
  26  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27  *
  28  *****************************************************************************/
  29
  30 #include <linux/kernel.h>
  31 #include <linux/module.h>
  32 #include <linux/init.h>
  33 #include <linux/pci.h>
  34 #include <linux/dma-mapping.h>
  35 #include <linux/delay.h>
  36 #include <linux/sched.h>
  37 #include <linux/skbuff.h>
  38 #include <linux/netdevice.h>
  39 #include <linux/wireless.h>
  40 #include <linux/firmware.h>
  41 #include <linux/etherdevice.h>
  42 #include <linux/if_arp.h>
  43
  44 #include <net/mac80211.h>
  45
  46 #include <asm/div64.h>
  47
  48 #define DRV_NAME        "iwlagn"
  49
  50 #include "iwl-eeprom.h"
  51 #include "iwl-dev.h"
  52 #include "iwl-core.h"
  53 #include "iwl-io.h"
  54 #include "iwl-helpers.h"
  55 #include "iwl-sta.h"
  56 #include "iwl-calib.h"
  57
  58
  59 /******************************************************************************
  60  *
  61  * module boiler plate
  62  *
  63  ******************************************************************************/
  64
  65 /*
  66  * module name, copyright, version, etc.
  67  */
  68 #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link AGN driver for Linux"
  69
  70 #ifdef CONFIG_IWLWIFI_DEBUG
  71 #define VD "d"
  72 #else
  73 #define VD
  74 #endif
  75
  76 #define DRV_VERSION     IWLWIFI_VERSION VD
  77
  78
  79 MODULE_DESCRIPTION(DRV_DESCRIPTION);
  80 MODULE_VERSION(DRV_VERSION);
  81 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
  82 MODULE_LICENSE("GPL");
  83 MODULE_ALIAS("iwl4965");
  84
  85 /*************** STATION TABLE MANAGEMENT ****
  86  * mac80211 should be examined to determine if sta_info is duplicating
  87  * the functionality provided here
  88  */
  89
  90 /**************************************************************/
  91
  92 /**
  93  * iwl_commit_rxon - commit staging_rxon to hardware
  94  *
  95  * The RXON command in staging_rxon is committed to the hardware and
  96  * the active_rxon structure is updated with the new data.  This
  97  * function correctly transitions out of the RXON_ASSOC_MSK state if
  98  * a HW tune is required based on the RXON structure changes.
  99  */
 100 int iwl_commit_rxon(struct iwl_priv *priv)
 101 {
 102         /* cast away the const for active_rxon in this function */
 103         struct iwl_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
 104         int ret;
 105         bool new_assoc =
 106                 !!(priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK);
 107
 108         if (!iwl_is_alive(priv))
 109                 return -EBUSY;
 110
 111         /* always get timestamp with Rx frame */
 112         priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
 113
 114         ret = iwl_check_rxon_cmd(priv);
 115         if (ret) {
 116                 IWL_ERR(priv, "Invalid RXON configuration.  Not committing.\n");
 117                 return -EINVAL;
 118         }
 119
 120         /*
 121          * receive commit_rxon request
 122          * abort any previous channel switch if still in process
 123          */
 124         if (priv->switch_rxon.switch_in_progress &&
 125             (priv->switch_rxon.channel != priv->staging_rxon.channel)) {
 126                 IWL_DEBUG_11H(priv, "abort channel switch on %d\n",
 127                       le16_to_cpu(priv->switch_rxon.channel));
 128                 priv->switch_rxon.switch_in_progress = false;
 129         }
 130
 131         /* If we don't need to send a full RXON, we can use
 132          * iwl_rxon_assoc_cmd which is used to reconfigure filter
 133          * and other flags for the current radio configuration. */
 134         if (!iwl_full_rxon_required(priv)) {
 135                 ret = iwl_send_rxon_assoc(priv);
 136                 if (ret) {
 137                         IWL_ERR(priv, "Error setting RXON_ASSOC (%d)\n", ret);
 138                         return ret;
 139                 }
 140
 141                 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
 142                 iwl_print_rx_config_cmd(priv);
 143                 return 0;
 144         }
 145
 146         /* station table will be cleared */
 147         priv->assoc_station_added = 0;
 148
 149         /* If we are currently associated and the new config requires
 150          * an RXON_ASSOC and the new config wants the associated mask enabled,
 151          * we must clear the associated from the active configuration
 152          * before we apply the new config */
 153         if (iwl_is_associated(priv) && new_assoc) {
 154                 IWL_DEBUG_INFO(priv, "Toggling associated bit on current RXON\n");
 155                 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
 156
 157                 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
 158                                       sizeof(struct iwl_rxon_cmd),
 159                                       &priv->active_rxon);
 160
 161                 /* If the mask clearing failed then we set
 162                  * active_rxon back to what it was previously */
 163                 if (ret) {
 164                         active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
 165                         IWL_ERR(priv, "Error clearing ASSOC_MSK (%d)\n", ret);
 166                         return ret;
 167                 }
 168         }
 169
 170         IWL_DEBUG_INFO(priv, "Sending RXON\n"
 171                        "* with%s RXON_FILTER_ASSOC_MSK\n"
 172                        "* channel = %d\n"
 173                        "* bssid = %pM\n",
 174                        (new_assoc ? "" : "out"),
 175                        le16_to_cpu(priv->staging_rxon.channel),
 176                        priv->staging_rxon.bssid_addr);
 177
 178         iwl_set_rxon_hwcrypto(priv, !priv->cfg->mod_params->sw_crypto);
 179
 180         /* Apply the new configuration
 181          * RXON unassoc clears the station table in uCode, send it before
 182          * we add the bcast station. If assoc bit is set, we will send RXON
 183          * after having added the bcast and bssid station.
 184          */
 185         if (!new_assoc) {
 186                 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
 187                               sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
 188                 if (ret) {
 189                         IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
 190                         return ret;
 191                 }
 192                 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
 193         }
 194
 195         iwl_clear_stations_table(priv);
 196
 197         priv->start_calib = 0;
 198
 199         /* Add the broadcast address so we can send broadcast frames */
 200         priv->cfg->ops->lib->add_bcast_station(priv);
 201
 202
 203         /* If we have set the ASSOC_MSK and we are in BSS mode then
 204          * add the IWL_AP_ID to the station rate table */
 205         if (new_assoc) {
 206                 if (priv->iw_mode == NL80211_IFTYPE_STATION) {
 207                         ret = iwl_rxon_add_station(priv,
 208                                            priv->active_rxon.bssid_addr, 1);
 209                         if (ret == IWL_INVALID_STATION) {
 210                                 IWL_ERR(priv,
 211                                         "Error adding AP address for TX.\n");
 212                                 return -EIO;
 213                         }
 214                         priv->assoc_station_added = 1;
 215                         if (priv->default_wep_key &&
 216                             iwl_send_static_wepkey_cmd(priv, 0))
 217                                 IWL_ERR(priv,
 218                                         "Could not send WEP static key.\n");
 219                 }
 220
 221                 /*
 222                  * allow CTS-to-self if possible for new association.
 223                  * this is relevant only for 5000 series and up,
 224                  * but will not damage 4965
 225                  */
 226                 priv->staging_rxon.flags |= RXON_FLG_SELF_CTS_EN;
 227
 228                 /* Apply the new configuration
 229                  * RXON assoc doesn't clear the station table in uCode,
 230                  */
 231                 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
 232                               sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
 233                 if (ret) {
 234                         IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
 235                         return ret;
 236                 }
 237                 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
 238         }
 239         iwl_print_rx_config_cmd(priv);
 240
 241         iwl_init_sensitivity(priv);
 242
 243         /* If we issue a new RXON command which required a tune then we must
 244          * send a new TXPOWER command or we won't be able to Tx any frames */
 245         ret = iwl_set_tx_power(priv, priv->tx_power_user_lmt, true);
 246         if (ret) {
 247                 IWL_ERR(priv, "Error sending TX power (%d)\n", ret);
 248                 return ret;
 249         }
 250
 251         return 0;
 252 }
 253
 254 void iwl_update_chain_flags(struct iwl_priv *priv)
 255 {
 256
 257         if (priv->cfg->ops->hcmd->set_rxon_chain)
 258                 priv->cfg->ops->hcmd->set_rxon_chain(priv);
 259         iwlcore_commit_rxon(priv);
 260 }
 261
 262 static void iwl_clear_free_frames(struct iwl_priv *priv)
 263 {
 264         struct list_head *element;
 265
 266         IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
 267                        priv->frames_count);
 268
 269         while (!list_empty(&priv->free_frames)) {
 270                 element = priv->free_frames.next;
 271                 list_del(element);
 272                 kfree(list_entry(element, struct iwl_frame, list));
 273                 priv->frames_count--;
 274         }
 275
 276         if (priv->frames_count) {
 277                 IWL_WARN(priv, "%d frames still in use.  Did we lose one?\n",
 278                             priv->frames_count);
 279                 priv->frames_count = 0;
 280         }
 281 }
 282
 283 static struct iwl_frame *iwl_get_free_frame(struct iwl_priv *priv)
 284 {
 285         struct iwl_frame *frame;
 286         struct list_head *element;
 287         if (list_empty(&priv->free_frames)) {
 288                 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
 289                 if (!frame) {
 290                         IWL_ERR(priv, "Could not allocate frame!\n");
 291                         return NULL;
 292                 }
 293
 294                 priv->frames_count++;
 295                 return frame;
 296         }
 297
 298         element = priv->free_frames.next;
 299         list_del(element);
 300         return list_entry(element, struct iwl_frame, list);
 301 }
 302
 303 static void iwl_free_frame(struct iwl_priv *priv, struct iwl_frame *frame)
 304 {
 305         memset(frame, 0, sizeof(*frame));
 306         list_add(&frame->list, &priv->free_frames);
 307 }
 308
 309 static u32 iwl_fill_beacon_frame(struct iwl_priv *priv,
 310                                           struct ieee80211_hdr *hdr,
 311                                           int left)
 312 {
 313         if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
 314             ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
 315              (priv->iw_mode != NL80211_IFTYPE_AP)))
 316                 return 0;
 317
 318         if (priv->ibss_beacon->len > left)
 319                 return 0;
 320
 321         memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
 322
 323         return priv->ibss_beacon->len;
 324 }
 325
 326 /* Parse the beacon frame to find the TIM element and set tim_idx & tim_size */
 327 static void iwl_set_beacon_tim(struct iwl_priv *priv,
 328                 struct iwl_tx_beacon_cmd *tx_beacon_cmd,
 329                 u8 *beacon, u32 frame_size)
 330 {
 331         u16 tim_idx;
 332         struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)beacon;
 333
 334         /*
 335          * The index is relative to frame start but we start looking at the
 336          * variable-length part of the beacon.
 337          */
 338         tim_idx = mgmt->u.beacon.variable - beacon;
 339
 340         /* Parse variable-length elements of beacon to find WLAN_EID_TIM */
 341         while ((tim_idx < (frame_size - 2)) &&
 342                         (beacon[tim_idx] != WLAN_EID_TIM))
 343                 tim_idx += beacon[tim_idx+1] + 2;
 344
 345         /* If TIM field was found, set variables */
 346         if ((tim_idx < (frame_size - 1)) && (beacon[tim_idx] == WLAN_EID_TIM)) {
 347                 tx_beacon_cmd->tim_idx = cpu_to_le16(tim_idx);
 348                 tx_beacon_cmd->tim_size = beacon[tim_idx+1];
 349         } else
 350                 IWL_WARN(priv, "Unable to find TIM Element in beacon\n");
 351 }
 352
 353 static unsigned int iwl_hw_get_beacon_cmd(struct iwl_priv *priv,
 354                                        struct iwl_frame *frame)
 355 {
 356         struct iwl_tx_beacon_cmd *tx_beacon_cmd;
 357         u32 frame_size;
 358         u32 rate_flags;
 359         u32 rate;
 360         /*
 361          * We have to set up the TX command, the TX Beacon command, and the
 362          * beacon contents.
 363          */
 364
 365         /* Initialize memory */
 366         tx_beacon_cmd = &frame->u.beacon;
 367         memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
 368
 369         /* Set up TX beacon contents */
 370         frame_size = iwl_fill_beacon_frame(priv, tx_beacon_cmd->frame,
 371                                 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
 372         if (WARN_ON_ONCE(frame_size > MAX_MPDU_SIZE))
 373                 return 0;
 374
 375         /* Set up TX command fields */
 376         tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
 377         tx_beacon_cmd->tx.sta_id = priv->hw_params.bcast_sta_id;
 378         tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
 379         tx_beacon_cmd->tx.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK |
 380                 TX_CMD_FLG_TSF_MSK | TX_CMD_FLG_STA_RATE_MSK;
 381
 382         /* Set up TX beacon command fields */
 383         iwl_set_beacon_tim(priv, tx_beacon_cmd, (u8 *)tx_beacon_cmd->frame,
 384                         frame_size);
 385
 386         /* Set up packet rate and flags */
 387         rate = iwl_rate_get_lowest_plcp(priv);
 388         priv->mgmt_tx_ant = iwl_toggle_tx_ant(priv, priv->mgmt_tx_ant);
 389         rate_flags = iwl_ant_idx_to_flags(priv->mgmt_tx_ant);
 390         if ((rate >= IWL_FIRST_CCK_RATE) && (rate <= IWL_LAST_CCK_RATE))
 391                 rate_flags |= RATE_MCS_CCK_MSK;
 392         tx_beacon_cmd->tx.rate_n_flags = iwl_hw_set_rate_n_flags(rate,
 393                         rate_flags);
 394
 395         return sizeof(*tx_beacon_cmd) + frame_size;
 396 }
 397 static int iwl_send_beacon_cmd(struct iwl_priv *priv)
 398 {
 399         struct iwl_frame *frame;
 400         unsigned int frame_size;
 401         int rc;
 402
 403         frame = iwl_get_free_frame(priv);
 404         if (!frame) {
 405                 IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
 406                           "command.\n");
 407                 return -ENOMEM;
 408         }
 409
 410         frame_size = iwl_hw_get_beacon_cmd(priv, frame);
 411         if (!frame_size) {
 412                 IWL_ERR(priv, "Error configuring the beacon command\n");
 413                 iwl_free_frame(priv, frame);
 414                 return -EINVAL;
 415         }
 416
 417         rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
 418                               &frame->u.cmd[0]);
 419
 420         iwl_free_frame(priv, frame);
 421
 422         return rc;
 423 }
 424
 425 static inline dma_addr_t iwl_tfd_tb_get_addr(struct iwl_tfd *tfd, u8 idx)
 426 {
 427         struct iwl_tfd_tb *tb = &tfd->tbs[idx];
 428
 429         dma_addr_t addr = get_unaligned_le32(&tb->lo);
 430         if (sizeof(dma_addr_t) > sizeof(u32))
 431                 addr |=
 432                 ((dma_addr_t)(le16_to_cpu(tb->hi_n_len) & 0xF) << 16) << 16;
 433
 434         return addr;
 435 }
 436
 437 static inline u16 iwl_tfd_tb_get_len(struct iwl_tfd *tfd, u8 idx)
 438 {
 439         struct iwl_tfd_tb *tb = &tfd->tbs[idx];
 440
 441         return le16_to_cpu(tb->hi_n_len) >> 4;
 442 }
 443
 444 static inline void iwl_tfd_set_tb(struct iwl_tfd *tfd, u8 idx,
 445                                   dma_addr_t addr, u16 len)
 446 {
 447         struct iwl_tfd_tb *tb = &tfd->tbs[idx];
 448         u16 hi_n_len = len << 4;
 449
 450         put_unaligned_le32(addr, &tb->lo);
 451         if (sizeof(dma_addr_t) > sizeof(u32))
 452                 hi_n_len |= ((addr >> 16) >> 16) & 0xF;
 453
 454         tb->hi_n_len = cpu_to_le16(hi_n_len);
 455
 456         tfd->num_tbs = idx + 1;
 457 }
 458
 459 static inline u8 iwl_tfd_get_num_tbs(struct iwl_tfd *tfd)
 460 {
 461         return tfd->num_tbs & 0x1f;
 462 }
 463
 464 /**
 465  * iwl_hw_txq_free_tfd - Free all chunks referenced by TFD [txq->q.read_ptr]
 466  * @priv - driver private data
 467  * @txq - tx queue
 468  *
 469  * Does NOT advance any TFD circular buffer read/write indexes
 470  * Does NOT free the TFD itself (which is within circular buffer)
 471  */
 472 void iwl_hw_txq_free_tfd(struct iwl_priv *priv, struct iwl_tx_queue *txq)
 473 {
 474         struct iwl_tfd *tfd_tmp = (struct iwl_tfd *)txq->tfds;
 475         struct iwl_tfd *tfd;
 476         struct pci_dev *dev = priv->pci_dev;
 477         int index = txq->q.read_ptr;
 478         int i;
 479         int num_tbs;
 480
 481         tfd = &tfd_tmp[index];
 482
 483         /* Sanity check on number of chunks */
 484         num_tbs = iwl_tfd_get_num_tbs(tfd);
 485
 486         if (num_tbs >= IWL_NUM_OF_TBS) {
 487                 IWL_ERR(priv, "Too many chunks: %i\n", num_tbs);
 488                 /* @todo issue fatal error, it is quite serious situation */
 489                 return;
 490         }
 491
 492         /* Unmap tx_cmd */
 493         if (num_tbs)
 494                 pci_unmap_single(dev,
 495                                 pci_unmap_addr(&txq->meta[index], mapping),
 496                                 pci_unmap_len(&txq->meta[index], len),
 497                                 PCI_DMA_BIDIRECTIONAL);
 498
 499         /* Unmap chunks, if any. */
 500         for (i = 1; i < num_tbs; i++) {
 501                 pci_unmap_single(dev, iwl_tfd_tb_get_addr(tfd, i),
 502                                 iwl_tfd_tb_get_len(tfd, i), PCI_DMA_TODEVICE);
 503
 504                 if (txq->txb) {
 505                         dev_kfree_skb(txq->txb[txq->q.read_ptr].skb[i - 1]);
 506                         txq->txb[txq->q.read_ptr].skb[i - 1] = NULL;
 507                 }
 508         }
 509 }
 510
 511 int iwl_hw_txq_attach_buf_to_tfd(struct iwl_priv *priv,
 512                                  struct iwl_tx_queue *txq,
 513                                  dma_addr_t addr, u16 len,
 514                                  u8 reset, u8 pad)
 515 {
 516         struct iwl_queue *q;
 517         struct iwl_tfd *tfd, *tfd_tmp;
 518         u32 num_tbs;
 519
 520         q = &txq->q;
 521         tfd_tmp = (struct iwl_tfd *)txq->tfds;
 522         tfd = &tfd_tmp[q->write_ptr];
 523
 524         if (reset)
 525                 memset(tfd, 0, sizeof(*tfd));
 526
 527         num_tbs = iwl_tfd_get_num_tbs(tfd);
 528
 529         /* Each TFD can point to a maximum 20 Tx buffers */
 530         if (num_tbs >= IWL_NUM_OF_TBS) {
 531                 IWL_ERR(priv, "Error can not send more than %d chunks\n",
 532                           IWL_NUM_OF_TBS);
 533                 return -EINVAL;
 534         }
 535
 536         BUG_ON(addr & ~DMA_BIT_MASK(36));
 537         if (unlikely(addr & ~IWL_TX_DMA_MASK))
 538                 IWL_ERR(priv, "Unaligned address = %llx\n",
 539                           (unsigned long long)addr);
 540
 541         iwl_tfd_set_tb(tfd, num_tbs, addr, len);
 542
 543         return 0;
 544 }
 545
 546 /*
 547  * Tell nic where to find circular buffer of Tx Frame Descriptors for
 548  * given Tx queue, and enable the DMA channel used for that queue.
 549  *
 550  * 4965 supports up to 16 Tx queues in DRAM, mapped to up to 8 Tx DMA
 551  * channels supported in hardware.
 552  */
 553 int iwl_hw_tx_queue_init(struct iwl_priv *priv,
 554                          struct iwl_tx_queue *txq)
 555 {
 556         int txq_id = txq->q.id;
 557
 558         /* Circular buffer (TFD queue in DRAM) physical base address */
 559         iwl_write_direct32(priv, FH_MEM_CBBC_QUEUE(txq_id),
 560                              txq->q.dma_addr >> 8);
 561
 562         return 0;
 563 }
 564
 565 /******************************************************************************
 566  *
 567  * Generic RX handler implementations
 568  *
 569  ******************************************************************************/
 570 static void iwl_rx_reply_alive(struct iwl_priv *priv,
 571                                 struct iwl_rx_mem_buffer *rxb)
 572 {
 573         struct iwl_rx_packet *pkt = rxb_addr(rxb);
 574         struct iwl_alive_resp *palive;
 575         struct delayed_work *pwork;
 576
 577         palive = &pkt->u.alive_frame;
 578
 579         IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
 580                        "0x%01X 0x%01X\n",
 581                        palive->is_valid, palive->ver_type,
 582                        palive->ver_subtype);
 583
 584         if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
 585                 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
 586                 memcpy(&priv->card_alive_init,
 587                        &pkt->u.alive_frame,
 588                        sizeof(struct iwl_init_alive_resp));
 589                 pwork = &priv->init_alive_start;
 590         } else {
 591                 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
 592                 memcpy(&priv->card_alive, &pkt->u.alive_frame,
 593                        sizeof(struct iwl_alive_resp));
 594                 pwork = &priv->alive_start;
 595         }
 596
 597         /* We delay the ALIVE response by 5ms to
 598          * give the HW RF Kill time to activate... */
 599         if (palive->is_valid == UCODE_VALID_OK)
 600                 queue_delayed_work(priv->workqueue, pwork,
 601                                    msecs_to_jiffies(5));
 602         else
 603                 IWL_WARN(priv, "uCode did not respond OK.\n");
 604 }
 605
 606 static void iwl_bg_beacon_update(struct work_struct *work)
 607 {
 608         struct iwl_priv *priv =
 609                 container_of(work, struct iwl_priv, beacon_update);
 610         struct sk_buff *beacon;
 611
 612         /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
 613         beacon = ieee80211_beacon_get(priv->hw, priv->vif);
 614
 615         if (!beacon) {
 616                 IWL_ERR(priv, "update beacon failed\n");
 617                 return;
 618         }
 619
 620         mutex_lock(&priv->mutex);
 621         /* new beacon skb is allocated every time; dispose previous.*/
 622         if (priv->ibss_beacon)
 623                 dev_kfree_skb(priv->ibss_beacon);
 624
 625         priv->ibss_beacon = beacon;
 626         mutex_unlock(&priv->mutex);
 627
 628         iwl_send_beacon_cmd(priv);
 629 }
 630
 631 /**
 632  * iwl_bg_statistics_periodic - Timer callback to queue statistics
 633  *
 634  * This callback is provided in order to send a statistics request.
 635  *
 636  * This timer function is continually reset to execute within
 637  * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION
 638  * was received.  We need to ensure we receive the statistics in order
 639  * to update the temperature used for calibrating the TXPOWER.
 640  */
 641 static void iwl_bg_statistics_periodic(unsigned long data)
 642 {
 643         struct iwl_priv *priv = (struct iwl_priv *)data;
 644
 645         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
 646                 return;
 647
 648         /* dont send host command if rf-kill is on */
 649         if (!iwl_is_ready_rf(priv))
 650                 return;
 651
 652         iwl_send_statistics_request(priv, CMD_ASYNC, false);
 653 }
 654
 655
 656 static void iwl_print_cont_event_trace(struct iwl_priv *priv, u32 base,
 657                                         u32 start_idx, u32 num_events,
 658                                         u32 mode)
 659 {
 660         u32 i;
 661         u32 ptr;        /* SRAM byte address of log data */
 662         u32 ev, time, data; /* event log data */
 663         unsigned long reg_flags;
 664
 665         if (mode == 0)
 666                 ptr = base + (4 * sizeof(u32)) + (start_idx * 2 * sizeof(u32));
 667         else
 668                 ptr = base + (4 * sizeof(u32)) + (start_idx * 3 * sizeof(u32));
 669
 670         /* Make sure device is powered up for SRAM reads */
 671         spin_lock_irqsave(&priv->reg_lock, reg_flags);
 672         if (iwl_grab_nic_access(priv)) {
 673                 spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
 674                 return;
 675         }
 676
 677         /* Set starting address; reads will auto-increment */
 678         _iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, ptr);
 679         rmb();
 680
 681         /*
 682          * "time" is actually "data" for mode 0 (no timestamp).
 683          * place event id # at far right for easier visual parsing.
 684          */
 685         for (i = 0; i < num_events; i++) {
 686                 ev = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
 687                 time = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
 688                 if (mode == 0) {
 689                         trace_iwlwifi_dev_ucode_cont_event(priv,
 690                                                         0, time, ev);
 691                 } else {
 692                         data = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
 693                         trace_iwlwifi_dev_ucode_cont_event(priv,
 694                                                 time, data, ev);
 695                 }
 696         }
 697         /* Allow device to power down */
 698         iwl_release_nic_access(priv);
 699         spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
 700 }
 701
 702 static void iwl_continuous_event_trace(struct iwl_priv *priv)
 703 {
 704         u32 capacity;   /* event log capacity in # entries */
 705         u32 base;       /* SRAM byte address of event log header */
 706         u32 mode;       /* 0 - no timestamp, 1 - timestamp recorded */
 707         u32 num_wraps;  /* # times uCode wrapped to top of log */
 708         u32 next_entry; /* index of next entry to be written by uCode */
 709
 710         if (priv->ucode_type == UCODE_INIT)
 711                 base = le32_to_cpu(priv->card_alive_init.error_event_table_ptr);
 712         else
 713                 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
 714         if (priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
 715                 capacity = iwl_read_targ_mem(priv, base);
 716                 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
 717                 mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
 718                 next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
 719         } else
 720                 return;
 721
 722         if (num_wraps == priv->event_log.num_wraps) {
 723                 iwl_print_cont_event_trace(priv,
 724                                        base, priv->event_log.next_entry,
 725                                        next_entry - priv->event_log.next_entry,
 726                                        mode);
 727                 priv->event_log.non_wraps_count++;
 728         } else {
 729                 if ((num_wraps - priv->event_log.num_wraps) > 1)
 730                         priv->event_log.wraps_more_count++;
 731                 else
 732                         priv->event_log.wraps_once_count++;
 733                 trace_iwlwifi_dev_ucode_wrap_event(priv,
 734                                 num_wraps - priv->event_log.num_wraps,
 735                                 next_entry, priv->event_log.next_entry);
 736                 if (next_entry < priv->event_log.next_entry) {
 737                         iwl_print_cont_event_trace(priv, base,
 738                                priv->event_log.next_entry,
 739                                capacity - priv->event_log.next_entry,
 740                                mode);
 741
 742                         iwl_print_cont_event_trace(priv, base, 0,
 743                                 next_entry, mode);
 744                 } else {
 745                         iwl_print_cont_event_trace(priv, base,
 746                                next_entry, capacity - next_entry,
 747                                mode);
 748
 749                         iwl_print_cont_event_trace(priv, base, 0,
 750                                 next_entry, mode);
 751                 }
 752         }
 753         priv->event_log.num_wraps = num_wraps;
 754         priv->event_log.next_entry = next_entry;
 755 }
 756
 757 /**
 758  * iwl_bg_ucode_trace - Timer callback to log ucode event
 759  *
 760  * The timer is continually set to execute every
 761  * UCODE_TRACE_PERIOD milliseconds after the last timer expired
 762  * this function is to perform continuous uCode event logging operation
 763  * if enabled
 764  */
 765 static void iwl_bg_ucode_trace(unsigned long data)
 766 {
 767         struct iwl_priv *priv = (struct iwl_priv *)data;
 768
 769         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
 770                 return;
 771
 772         if (priv->event_log.ucode_trace) {
 773                 iwl_continuous_event_trace(priv);
 774                 /* Reschedule the timer to occur in UCODE_TRACE_PERIOD */
 775                 mod_timer(&priv->ucode_trace,
 776                          jiffies + msecs_to_jiffies(UCODE_TRACE_PERIOD));
 777         }
 778 }
 779
 780 static void iwl_rx_beacon_notif(struct iwl_priv *priv,
 781                                 struct iwl_rx_mem_buffer *rxb)
 782 {
 783 #ifdef CONFIG_IWLWIFI_DEBUG
 784         struct iwl_rx_packet *pkt = rxb_addr(rxb);
 785         struct iwl4965_beacon_notif *beacon =
 786                 (struct iwl4965_beacon_notif *)pkt->u.raw;
 787         u8 rate = iwl_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
 788
 789         IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d "
 790                 "tsf %d %d rate %d\n",
 791                 le32_to_cpu(beacon->beacon_notify_hdr.u.status) & TX_STATUS_MSK,
 792                 beacon->beacon_notify_hdr.failure_frame,
 793                 le32_to_cpu(beacon->ibss_mgr_status),
 794                 le32_to_cpu(beacon->high_tsf),
 795                 le32_to_cpu(beacon->low_tsf), rate);
 796 #endif
 797
 798         if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
 799             (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
 800                 queue_work(priv->workqueue, &priv->beacon_update);
 801 }
 802
 803 /* Handle notification from uCode that card's power state is changing
 804  * due to software, hardware, or critical temperature RFKILL */
 805 static void iwl_rx_card_state_notif(struct iwl_priv *priv,
 806                                     struct iwl_rx_mem_buffer *rxb)
 807 {
 808         struct iwl_rx_packet *pkt = rxb_addr(rxb);
 809         u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
 810         unsigned long status = priv->status;
 811
 812         IWL_DEBUG_RF_KILL(priv, "Card state received: HW:%s SW:%s CT:%s\n",
 813                           (flags & HW_CARD_DISABLED) ? "Kill" : "On",
 814                           (flags & SW_CARD_DISABLED) ? "Kill" : "On",
 815                           (flags & CT_CARD_DISABLED) ?
 816                           "Reached" : "Not reached");
 817
 818         if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
 819                      CT_CARD_DISABLED)) {
 820
 821                 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
 822                             CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
 823
 824                 iwl_write_direct32(priv, HBUS_TARG_MBX_C,
 825                                         HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
 826
 827                 if (!(flags & RXON_CARD_DISABLED)) {
 828                         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
 829                                     CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
 830                         iwl_write_direct32(priv, HBUS_TARG_MBX_C,
 831                                         HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
 832                 }
 833                 if (flags & CT_CARD_DISABLED)
 834                         iwl_tt_enter_ct_kill(priv);
 835         }
 836         if (!(flags & CT_CARD_DISABLED))
 837                 iwl_tt_exit_ct_kill(priv);
 838
 839         if (flags & HW_CARD_DISABLED)
 840                 set_bit(STATUS_RF_KILL_HW, &priv->status);
 841         else
 842                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
 843
 844
 845         if (!(flags & RXON_CARD_DISABLED))
 846                 iwl_scan_cancel(priv);
 847
 848         if ((test_bit(STATUS_RF_KILL_HW, &status) !=
 849              test_bit(STATUS_RF_KILL_HW, &priv->status)))
 850                 wiphy_rfkill_set_hw_state(priv->hw->wiphy,
 851                         test_bit(STATUS_RF_KILL_HW, &priv->status));
 852         else
 853                 wake_up_interruptible(&priv->wait_command_queue);
 854 }
 855
 856 int iwl_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src)
 857 {
 858         if (src == IWL_PWR_SRC_VAUX) {
 859                 if (pci_pme_capable(priv->pci_dev, PCI_D3cold))
 860                         iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
 861                                                APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
 862                                                ~APMG_PS_CTRL_MSK_PWR_SRC);
 863         } else {
 864                 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
 865                                        APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
 866                                        ~APMG_PS_CTRL_MSK_PWR_SRC);
 867         }
 868
 869         return 0;
 870 }
 871
 872 /**
 873  * iwl_setup_rx_handlers - Initialize Rx handler callbacks
 874  *
 875  * Setup the RX handlers for each of the reply types sent from the uCode
 876  * to the host.
 877  *
 878  * This function chains into the hardware specific files for them to setup
 879  * any hardware specific handlers as well.
 880  */
 881 static void iwl_setup_rx_handlers(struct iwl_priv *priv)
 882 {
 883         priv->rx_handlers[REPLY_ALIVE] = iwl_rx_reply_alive;
 884         priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
 885         priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
 886         priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
 887                         iwl_rx_spectrum_measure_notif;
 888         priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
 889         priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
 890             iwl_rx_pm_debug_statistics_notif;
 891         priv->rx_handlers[BEACON_NOTIFICATION] = iwl_rx_beacon_notif;
 892
 893         /*
 894          * The same handler is used for both the REPLY to a discrete
 895          * statistics request from the host as well as for the periodic
 896          * statistics notifications (after received beacons) from the uCode.
 897          */
 898         priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl_reply_statistics;
 899         priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl_rx_statistics;
 900
 901         iwl_setup_rx_scan_handlers(priv);
 902
 903         /* status change handler */
 904         priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl_rx_card_state_notif;
 905
 906         priv->rx_handlers[MISSED_BEACONS_NOTIFICATION] =
 907             iwl_rx_missed_beacon_notif;
 908         /* Rx handlers */
 909         priv->rx_handlers[REPLY_RX_PHY_CMD] = iwl_rx_reply_rx_phy;
 910         priv->rx_handlers[REPLY_RX_MPDU_CMD] = iwl_rx_reply_rx;
 911         /* block ack */
 912         priv->rx_handlers[REPLY_COMPRESSED_BA] = iwl_rx_reply_compressed_ba;
 913         /* Set up hardware specific Rx handlers */
 914         priv->cfg->ops->lib->rx_handler_setup(priv);
 915 }
 916
 917 /**
 918  * iwl_rx_handle - Main entry function for receiving responses from uCode
 919  *
 920  * Uses the priv->rx_handlers callback function array to invoke
 921  * the appropriate handlers, including command responses,
 922  * frame-received notifications, and other notifications.
 923  */
 924 void iwl_rx_handle(struct iwl_priv *priv)
 925 {
 926         struct iwl_rx_mem_buffer *rxb;
 927         struct iwl_rx_packet *pkt;
 928         struct iwl_rx_queue *rxq = &priv->rxq;
 929         u32 r, i;
 930         int reclaim;
 931         unsigned long flags;
 932         u8 fill_rx = 0;
 933         u32 count = 8;
 934         int total_empty;
 935
 936         /* uCode's read index (stored in shared DRAM) indicates the last Rx
 937          * buffer that the driver may process (last buffer filled by ucode). */
 938         r = le16_to_cpu(rxq->rb_stts->closed_rb_num) &  0x0FFF;
 939         i = rxq->read;
 940
 941         /* Rx interrupt, but nothing sent from uCode */
 942         if (i == r)
 943                 IWL_DEBUG_RX(priv, "r = %d, i = %d\n", r, i);
 944
 945         /* calculate total frames need to be restock after handling RX */
 946         total_empty = r - rxq->write_actual;
 947         if (total_empty < 0)
 948                 total_empty += RX_QUEUE_SIZE;
 949
 950         if (total_empty > (RX_QUEUE_SIZE / 2))
 951                 fill_rx = 1;
 952
 953         while (i != r) {
 954                 rxb = rxq->queue[i];
 955
 956                 /* If an RXB doesn't have a Rx queue slot associated with it,
 957                  * then a bug has been introduced in the queue refilling
 958                  * routines -- catch it here */
 959                 BUG_ON(rxb == NULL);
 960
 961                 rxq->queue[i] = NULL;
 962
 963                 pci_unmap_page(priv->pci_dev, rxb->page_dma,
 964                                PAGE_SIZE << priv->hw_params.rx_page_order,
 965                                PCI_DMA_FROMDEVICE);
 966                 pkt = rxb_addr(rxb);
 967
 968                 trace_iwlwifi_dev_rx(priv, pkt,
 969                         le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK);
 970
 971                 /* Reclaim a command buffer only if this packet is a response
 972                  *   to a (driver-originated) command.
 973                  * If the packet (e.g. Rx frame) originated from uCode,
 974                  *   there is no command buffer to reclaim.
 975                  * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
 976                  *   but apparently a few don't get set; catch them here. */
 977                 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
 978                         (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
 979                         (pkt->hdr.cmd != REPLY_RX) &&
 980                         (pkt->hdr.cmd != REPLY_RX_MPDU_CMD) &&
 981                         (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
 982                         (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
 983                         (pkt->hdr.cmd != REPLY_TX);
 984
 985                 /* Based on type of command response or notification,
 986                  *   handle those that need handling via function in
 987                  *   rx_handlers table.  See iwl_setup_rx_handlers() */
 988                 if (priv->rx_handlers[pkt->hdr.cmd]) {
 989                         IWL_DEBUG_RX(priv, "r = %d, i = %d, %s, 0x%02x\n", r,
 990                                 i, get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
 991                         priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
 992                         priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
 993                 } else {
 994                         /* No handling needed */
 995                         IWL_DEBUG_RX(priv,
 996                                 "r %d i %d No handler needed for %s, 0x%02x\n",
 997                                 r, i, get_cmd_string(pkt->hdr.cmd),
 998                                 pkt->hdr.cmd);
 999                 }
1000
1001                 /*
1002                  * XXX: After here, we should always check rxb->page
1003                  * against NULL before touching it or its virtual
1004                  * memory (pkt). Because some rx_handler might have
1005                  * already taken or freed the pages.
1006                  */
1007
1008                 if (reclaim) {
1009                         /* Invoke any callbacks, transfer the buffer to caller,
1010                          * and fire off the (possibly) blocking iwl_send_cmd()
1011                          * as we reclaim the driver command queue */
1012                         if (rxb->page)
1013                                 iwl_tx_cmd_complete(priv, rxb);
1014                         else
1015                                 IWL_WARN(priv, "Claim null rxb?\n");
1016                 }
1017
1018                 /* Reuse the page if possible. For notification packets and
1019                  * SKBs that fail to Rx correctly, add them back into the
1020                  * rx_free list for reuse later. */
1021                 spin_lock_irqsave(&rxq->lock, flags);
1022                 if (rxb->page != NULL) {
1023                         rxb->page_dma = pci_map_page(priv->pci_dev, rxb->page,
1024                                 0, PAGE_SIZE << priv->hw_params.rx_page_order,
1025                                 PCI_DMA_FROMDEVICE);
1026                         list_add_tail(&rxb->list, &rxq->rx_free);
1027                         rxq->free_count++;
1028                 } else
1029                         list_add_tail(&rxb->list, &rxq->rx_used);
1030
1031                 spin_unlock_irqrestore(&rxq->lock, flags);
1032
1033                 i = (i + 1) & RX_QUEUE_MASK;
1034                 /* If there are a lot of unused frames,
1035                  * restock the Rx queue so ucode wont assert. */
1036                 if (fill_rx) {
1037                         count++;
1038                         if (count >= 8) {
1039                                 rxq->read = i;
1040                                 iwl_rx_replenish_now(priv);
1041                                 count = 0;
1042                         }
1043                 }
1044         }
1045
1046         /* Backtrack one entry */
1047         rxq->read = i;
1048         if (fill_rx)
1049                 iwl_rx_replenish_now(priv);
1050         else
1051                 iwl_rx_queue_restock(priv);
1052 }
1053
1054 /* call this function to flush any scheduled tasklet */
1055 static inline void iwl_synchronize_irq(struct iwl_priv *priv)
1056 {
1057         /* wait to make sure we flush pending tasklet*/
1058         synchronize_irq(priv->pci_dev->irq);
1059         tasklet_kill(&priv->irq_tasklet);
1060 }
1061
1062 static void iwl_irq_tasklet_legacy(struct iwl_priv *priv)
1063 {
1064         u32 inta, handled = 0;
1065         u32 inta_fh;
1066         unsigned long flags;
1067         u32 i;
1068 #ifdef CONFIG_IWLWIFI_DEBUG
1069         u32 inta_mask;
1070 #endif
1071
1072         spin_lock_irqsave(&priv->lock, flags);
1073
1074         /* Ack/clear/reset pending uCode interrupts.
1075          * Note:  Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1076          *  and will clear only when CSR_FH_INT_STATUS gets cleared. */
1077         inta = iwl_read32(priv, CSR_INT);
1078         iwl_write32(priv, CSR_INT, inta);
1079
1080         /* Ack/clear/reset pending flow-handler (DMA) interrupts.
1081          * Any new interrupts that happen after this, either while we're
1082          * in this tasklet, or later, will show up in next ISR/tasklet. */
1083         inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1084         iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
1085
1086 #ifdef CONFIG_IWLWIFI_DEBUG
1087         if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
1088                 /* just for debug */
1089                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1090                 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
1091                               inta, inta_mask, inta_fh);
1092         }
1093 #endif
1094
1095         spin_unlock_irqrestore(&priv->lock, flags);
1096
1097         /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
1098          * atomic, make sure that inta covers all the interrupts that
1099          * we've discovered, even if FH interrupt came in just after
1100          * reading CSR_INT. */
1101         if (inta_fh & CSR49_FH_INT_RX_MASK)
1102                 inta |= CSR_INT_BIT_FH_RX;
1103         if (inta_fh & CSR49_FH_INT_TX_MASK)
1104                 inta |= CSR_INT_BIT_FH_TX;
1105
1106         /* Now service all interrupt bits discovered above. */
1107         if (inta & CSR_INT_BIT_HW_ERR) {
1108                 IWL_ERR(priv, "Hardware error detected.  Restarting.\n");
1109
1110                 /* Tell the device to stop sending interrupts */
1111                 iwl_disable_interrupts(priv);
1112
1113                 priv->isr_stats.hw++;
1114                 iwl_irq_handle_error(priv);
1115
1116                 handled |= CSR_INT_BIT_HW_ERR;
1117
1118                 return;
1119         }
1120
1121 #ifdef CONFIG_IWLWIFI_DEBUG
1122         if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1123                 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1124                 if (inta & CSR_INT_BIT_SCD) {
1125                         IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1126                                       "the frame/frames.\n");
1127                         priv->isr_stats.sch++;
1128                 }
1129
1130                 /* Alive notification via Rx interrupt will do the real work */
1131                 if (inta & CSR_INT_BIT_ALIVE) {
1132                         IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1133                         priv->isr_stats.alive++;
1134                 }
1135         }
1136 #endif
1137         /* Safely ignore these bits for debug checks below */
1138         inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1139
1140         /* HW RF KILL switch toggled */
1141         if (inta & CSR_INT_BIT_RF_KILL) {
1142                 int hw_rf_kill = 0;
1143                 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
1144                                 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1145                         hw_rf_kill = 1;
1146
1147                 IWL_WARN(priv, "RF_KILL bit toggled to %s.\n",
1148                                 hw_rf_kill ? "disable radio" : "enable radio");
1149
1150                 priv->isr_stats.rfkill++;
1151
1152                 /* driver only loads ucode once setting the interface up.
1153                  * the driver allows loading the ucode even if the radio
1154                  * is killed. Hence update the killswitch state here. The
1155                  * rfkill handler will care about restarting if needed.
1156                  */
1157                 if (!test_bit(STATUS_ALIVE, &priv->status)) {
1158                         if (hw_rf_kill)
1159                                 set_bit(STATUS_RF_KILL_HW, &priv->status);
1160                         else
1161                                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1162                         wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
1163                 }
1164
1165                 handled |= CSR_INT_BIT_RF_KILL;
1166         }
1167
1168         /* Chip got too hot and stopped itself */
1169         if (inta & CSR_INT_BIT_CT_KILL) {
1170                 IWL_ERR(priv, "Microcode CT kill error detected.\n");
1171                 priv->isr_stats.ctkill++;
1172                 handled |= CSR_INT_BIT_CT_KILL;
1173         }
1174
1175         /* Error detected by uCode */
1176         if (inta & CSR_INT_BIT_SW_ERR) {
1177                 IWL_ERR(priv, "Microcode SW error detected. "
1178                         " Restarting 0x%X.\n", inta);
1179                 priv->isr_stats.sw++;
1180                 priv->isr_stats.sw_err = inta;
1181                 iwl_irq_handle_error(priv);
1182                 handled |= CSR_INT_BIT_SW_ERR;
1183         }
1184
1185         /*
1186          * uCode wakes up after power-down sleep.
1187          * Tell device about any new tx or host commands enqueued,
1188          * and about any Rx buffers made available while asleep.
1189          */
1190         if (inta & CSR_INT_BIT_WAKEUP) {
1191                 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1192                 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1193                 for (i = 0; i < priv->hw_params.max_txq_num; i++)
1194                         iwl_txq_update_write_ptr(priv, &priv->txq[i]);
1195                 priv->isr_stats.wakeup++;
1196                 handled |= CSR_INT_BIT_WAKEUP;
1197         }
1198
1199         /* All uCode command responses, including Tx command responses,
1200          * Rx "responses" (frame-received notification), and other
1201          * notifications from uCode come through here*/
1202         if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1203                 iwl_rx_handle(priv);
1204                 priv->isr_stats.rx++;
1205                 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1206         }
1207
1208         /* This "Tx" DMA channel is used only for loading uCode */
1209         if (inta & CSR_INT_BIT_FH_TX) {
1210                 IWL_DEBUG_ISR(priv, "uCode load interrupt\n");
1211                 priv->isr_stats.tx++;
1212                 handled |= CSR_INT_BIT_FH_TX;
1213                 /* Wake up uCode load routine, now that load is complete */
1214                 priv->ucode_write_complete = 1;
1215                 wake_up_interruptible(&priv->wait_command_queue);
1216         }
1217
1218         if (inta & ~handled) {
1219                 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1220                 priv->isr_stats.unhandled++;
1221         }
1222
1223         if (inta & ~(priv->inta_mask)) {
1224                 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1225                          inta & ~priv->inta_mask);
1226                 IWL_WARN(priv, "   with FH_INT = 0x%08x\n", inta_fh);
1227         }
1228
1229         /* Re-enable all interrupts */
1230         /* only Re-enable if diabled by irq */
1231         if (test_bit(STATUS_INT_ENABLED, &priv->status))
1232                 iwl_enable_interrupts(priv);
1233
1234 #ifdef CONFIG_IWLWIFI_DEBUG
1235         if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1236                 inta = iwl_read32(priv, CSR_INT);
1237                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1238                 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1239                 IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
1240                         "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
1241         }
1242 #endif
1243 }
1244
1245 /* tasklet for iwlagn interrupt */
1246 static void iwl_irq_tasklet(struct iwl_priv *priv)
1247 {
1248         u32 inta = 0;
1249         u32 handled = 0;
1250         unsigned long flags;
1251         u32 i;
1252 #ifdef CONFIG_IWLWIFI_DEBUG
1253         u32 inta_mask;
1254 #endif
1255
1256         spin_lock_irqsave(&priv->lock, flags);
1257
1258         /* Ack/clear/reset pending uCode interrupts.
1259          * Note:  Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1260          */
1261         /* There is a hardware bug in the interrupt mask function that some
1262          * interrupts (i.e. CSR_INT_BIT_SCD) can still be generated even if
1263          * they are disabled in the CSR_INT_MASK register. Furthermore the
1264          * ICT interrupt handling mechanism has another bug that might cause
1265          * these unmasked interrupts fail to be detected. We workaround the
1266          * hardware bugs here by ACKing all the possible interrupts so that
1267          * interrupt coalescing can still be achieved.
1268          */
1269         iwl_write32(priv, CSR_INT, priv->inta | ~priv->inta_mask);
1270
1271         inta = priv->inta;
1272
1273 #ifdef CONFIG_IWLWIFI_DEBUG
1274         if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
1275                 /* just for debug */
1276                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1277                 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x\n ",
1278                                 inta, inta_mask);
1279         }
1280 #endif
1281
1282         spin_unlock_irqrestore(&priv->lock, flags);
1283
1284         /* saved interrupt in inta variable now we can reset priv->inta */
1285         priv->inta = 0;
1286
1287         /* Now service all interrupt bits discovered above. */
1288         if (inta & CSR_INT_BIT_HW_ERR) {
1289                 IWL_ERR(priv, "Hardware error detected.  Restarting.\n");
1290
1291                 /* Tell the device to stop sending interrupts */
1292                 iwl_disable_interrupts(priv);
1293
1294                 priv->isr_stats.hw++;
1295                 iwl_irq_handle_error(priv);
1296
1297                 handled |= CSR_INT_BIT_HW_ERR;
1298
1299                 return;
1300         }
1301
1302 #ifdef CONFIG_IWLWIFI_DEBUG
1303         if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1304                 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1305                 if (inta & CSR_INT_BIT_SCD) {
1306                         IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1307                                       "the frame/frames.\n");
1308                         priv->isr_stats.sch++;
1309                 }
1310
1311                 /* Alive notification via Rx interrupt will do the real work */
1312                 if (inta & CSR_INT_BIT_ALIVE) {
1313                         IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1314                         priv->isr_stats.alive++;
1315                 }
1316         }
1317 #endif
1318         /* Safely ignore these bits for debug checks below */
1319         inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1320
1321         /* HW RF KILL switch toggled */
1322         if (inta & CSR_INT_BIT_RF_KILL) {
1323                 int hw_rf_kill = 0;
1324                 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
1325                                 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1326                         hw_rf_kill = 1;
1327
1328                 IWL_WARN(priv, "RF_KILL bit toggled to %s.\n",
1329                                 hw_rf_kill ? "disable radio" : "enable radio");
1330
1331                 priv->isr_stats.rfkill++;
1332
1333                 /* driver only loads ucode once setting the interface up.
1334                  * the driver allows loading the ucode even if the radio
1335                  * is killed. Hence update the killswitch state here. The
1336                  * rfkill handler will care about restarting if needed.
1337                  */
1338                 if (!test_bit(STATUS_ALIVE, &priv->status)) {
1339                         if (hw_rf_kill)
1340                                 set_bit(STATUS_RF_KILL_HW, &priv->status);
1341                         else
1342                                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1343                         wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
1344                 }
1345
1346                 handled |= CSR_INT_BIT_RF_KILL;
1347         }
1348
1349         /* Chip got too hot and stopped itself */
1350         if (inta & CSR_INT_BIT_CT_KILL) {
1351                 IWL_ERR(priv, "Microcode CT kill error detected.\n");
1352                 priv->isr_stats.ctkill++;
1353                 handled |= CSR_INT_BIT_CT_KILL;
1354         }
1355
1356         /* Error detected by uCode */
1357         if (inta & CSR_INT_BIT_SW_ERR) {
1358                 IWL_ERR(priv, "Microcode SW error detected. "
1359                         " Restarting 0x%X.\n", inta);
1360                 priv->isr_stats.sw++;
1361                 priv->isr_stats.sw_err = inta;
1362                 iwl_irq_handle_error(priv);
1363                 handled |= CSR_INT_BIT_SW_ERR;
1364         }
1365
1366         /* uCode wakes up after power-down sleep */
1367         if (inta & CSR_INT_BIT_WAKEUP) {
1368                 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1369                 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1370                 for (i = 0; i < priv->hw_params.max_txq_num; i++)
1371                         iwl_txq_update_write_ptr(priv, &priv->txq[i]);
1372
1373                 priv->isr_stats.wakeup++;
1374
1375                 handled |= CSR_INT_BIT_WAKEUP;
1376         }
1377
1378         /* All uCode command responses, including Tx command responses,
1379          * Rx "responses" (frame-received notification), and other
1380          * notifications from uCode come through here*/
1381         if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX |
1382                         CSR_INT_BIT_RX_PERIODIC)) {
1383                 IWL_DEBUG_ISR(priv, "Rx interrupt\n");
1384                 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1385                         handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1386                         iwl_write32(priv, CSR_FH_INT_STATUS,
1387                                         CSR49_FH_INT_RX_MASK);
1388                 }
1389                 if (inta & CSR_INT_BIT_RX_PERIODIC) {
1390                         handled |= CSR_INT_BIT_RX_PERIODIC;
1391                         iwl_write32(priv, CSR_INT, CSR_INT_BIT_RX_PERIODIC);
1392                 }
1393                 /* Sending RX interrupt require many steps to be done in the
1394                  * the device:
1395                  * 1- write interrupt to current index in ICT table.
1396                  * 2- dma RX frame.
1397                  * 3- update RX shared data to indicate last write index.
1398                  * 4- send interrupt.
1399                  * This could lead to RX race, driver could receive RX interrupt
1400                  * but the shared data changes does not reflect this;
1401                  * periodic interrupt will detect any dangling Rx activity.
1402                  */
1403
1404                 /* Disable periodic interrupt; we use it as just a one-shot. */
1405                 iwl_write8(priv, CSR_INT_PERIODIC_REG,
1406                             CSR_INT_PERIODIC_DIS);
1407                 iwl_rx_handle(priv);
1408
1409                 /*
1410                  * Enable periodic interrupt in 8 msec only if we received
1411                  * real RX interrupt (instead of just periodic int), to catch
1412                  * any dangling Rx interrupt.  If it was just the periodic
1413                  * interrupt, there was no dangling Rx activity, and no need
1414                  * to extend the periodic interrupt; one-shot is enough.
1415                  */
1416                 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX))
1417                         iwl_write8(priv, CSR_INT_PERIODIC_REG,
1418                                     CSR_INT_PERIODIC_ENA);
1419
1420                 priv->isr_stats.rx++;
1421         }
1422
1423         /* This "Tx" DMA channel is used only for loading uCode */
1424         if (inta & CSR_INT_BIT_FH_TX) {
1425                 iwl_write32(priv, CSR_FH_INT_STATUS, CSR49_FH_INT_TX_MASK);
1426                 IWL_DEBUG_ISR(priv, "uCode load interrupt\n");
1427                 priv->isr_stats.tx++;
1428                 handled |= CSR_INT_BIT_FH_TX;
1429                 /* Wake up uCode load routine, now that load is complete */
1430                 priv->ucode_write_complete = 1;
1431                 wake_up_interruptible(&priv->wait_command_queue);
1432         }
1433
1434         if (inta & ~handled) {
1435                 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1436                 priv->isr_stats.unhandled++;
1437         }
1438
1439         if (inta & ~(priv->inta_mask)) {
1440                 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1441                          inta & ~priv->inta_mask);
1442         }
1443
1444         /* Re-enable all interrupts */
1445         /* only Re-enable if diabled by irq */
1446         if (test_bit(STATUS_INT_ENABLED, &priv->status))
1447                 iwl_enable_interrupts(priv);
1448 }
1449
1450
1451 /******************************************************************************
1452  *
1453  * uCode download functions
1454  *
1455  ******************************************************************************/
1456
1457 static void iwl_dealloc_ucode_pci(struct iwl_priv *priv)
1458 {
1459         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
1460         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
1461         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1462         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
1463         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1464         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
1465 }
1466
1467 static void iwl_nic_start(struct iwl_priv *priv)
1468 {
1469         /* Remove all resets to allow NIC to operate */
1470         iwl_write32(priv, CSR_RESET, 0);
1471 }
1472
1473
1474 static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context);
1475 static int iwl_mac_setup_register(struct iwl_priv *priv);
1476
1477 static int __must_check iwl_request_firmware(struct iwl_priv *priv, bool first)
1478 {
1479         const char *name_pre = priv->cfg->fw_name_pre;
1480
1481         if (first)
1482                 priv->fw_index = priv->cfg->ucode_api_max;
1483         else
1484                 priv->fw_index--;
1485
1486         if (priv->fw_index < priv->cfg->ucode_api_min) {
1487                 IWL_ERR(priv, "no suitable firmware found!\n");
1488                 return -ENOENT;
1489         }
1490
1491         sprintf(priv->firmware_name, "%s%d%s",
1492                 name_pre, priv->fw_index, ".ucode");
1493
1494         IWL_DEBUG_INFO(priv, "attempting to load firmware '%s'\n",
1495                        priv->firmware_name);
1496
1497         return request_firmware_nowait(THIS_MODULE, 1, priv->firmware_name,
1498                                        &priv->pci_dev->dev, GFP_KERNEL, priv,
1499                                        iwl_ucode_callback);
1500 }
1501
1502 /**
1503  * iwl_ucode_callback - callback when firmware was loaded
1504  *
1505  * If loaded successfully, copies the firmware into buffers
1506  * for the card to fetch (via DMA).
1507  */
1508 static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context)
1509 {
1510         struct iwl_priv *priv = context;
1511         struct iwl_ucode_header *ucode;
1512         const unsigned int api_max = priv->cfg->ucode_api_max;
1513         const unsigned int api_min = priv->cfg->ucode_api_min;
1514         u8 *src;
1515         size_t len;
1516         u32 api_ver, build;
1517         u32 inst_size, data_size, init_size, init_data_size, boot_size;
1518         int err;
1519         u16 eeprom_ver;
1520
1521         if (!ucode_raw) {
1522                 IWL_ERR(priv, "request for firmware file '%s' failed.\n",
1523                         priv->firmware_name);
1524                 goto try_again;
1525         }
1526
1527         IWL_DEBUG_INFO(priv, "Loaded firmware file '%s' (%zd bytes).\n",
1528                        priv->firmware_name, ucode_raw->size);
1529
1530         /* Make sure that we got at least the v1 header! */
1531         if (ucode_raw->size < priv->cfg->ops->ucode->get_header_size(1)) {
1532                 IWL_ERR(priv, "File size way too small!\n");
1533                 goto try_again;
1534         }
1535
1536         /* Data from ucode file:  header followed by uCode images */
1537         ucode = (struct iwl_ucode_header *)ucode_raw->data;
1538
1539         priv->ucode_ver = le32_to_cpu(ucode->ver);
1540         api_ver = IWL_UCODE_API(priv->ucode_ver);
1541         build = priv->cfg->ops->ucode->get_build(ucode, api_ver);
1542         inst_size = priv->cfg->ops->ucode->get_inst_size(ucode, api_ver);
1543         data_size = priv->cfg->ops->ucode->get_data_size(ucode, api_ver);
1544         init_size = priv->cfg->ops->ucode->get_init_size(ucode, api_ver);
1545         init_data_size =
1546                 priv->cfg->ops->ucode->get_init_data_size(ucode, api_ver);
1547         boot_size = priv->cfg->ops->ucode->get_boot_size(ucode, api_ver);
1548         src = priv->cfg->ops->ucode->get_data(ucode, api_ver);
1549
1550         /* api_ver should match the api version forming part of the
1551          * firmware filename ... but we don't check for that and only rely
1552          * on the API version read from firmware header from here on forward */
1553
1554         if (api_ver < api_min || api_ver > api_max) {
1555                 IWL_ERR(priv, "Driver unable to support your firmware API. "
1556                           "Driver supports v%u, firmware is v%u.\n",
1557                           api_max, api_ver);
1558                 goto try_again;
1559         }
1560
1561         if (api_ver != api_max)
1562                 IWL_ERR(priv, "Firmware has old API version. Expected v%u, "
1563                           "got v%u. New firmware can be obtained "
1564                           "from http://www.intellinuxwireless.org.\n",
1565                           api_max, api_ver);
1566
1567         IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n",
1568                IWL_UCODE_MAJOR(priv->ucode_ver),
1569                IWL_UCODE_MINOR(priv->ucode_ver),
1570                IWL_UCODE_API(priv->ucode_ver),
1571                IWL_UCODE_SERIAL(priv->ucode_ver));
1572
1573         snprintf(priv->hw->wiphy->fw_version,
1574                  sizeof(priv->hw->wiphy->fw_version),
1575                  "%u.%u.%u.%u",
1576                  IWL_UCODE_MAJOR(priv->ucode_ver),
1577                  IWL_UCODE_MINOR(priv->ucode_ver),
1578                  IWL_UCODE_API(priv->ucode_ver),
1579                  IWL_UCODE_SERIAL(priv->ucode_ver));
1580
1581         if (build)
1582                 IWL_DEBUG_INFO(priv, "Build %u\n", build);
1583
1584         eeprom_ver = iwl_eeprom_query16(priv, EEPROM_VERSION);
1585         IWL_DEBUG_INFO(priv, "NVM Type: %s, version: 0x%x\n",
1586                        (priv->nvm_device_type == NVM_DEVICE_TYPE_OTP)
1587                        ? "OTP" : "EEPROM", eeprom_ver);
1588
1589         IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
1590                        priv->ucode_ver);
1591         IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %u\n",
1592                        inst_size);
1593         IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %u\n",
1594                        data_size);
1595         IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %u\n",
1596                        init_size);
1597         IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %u\n",
1598                        init_data_size);
1599         IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %u\n",
1600                        boot_size);
1601
1602         /*
1603          * For any of the failures below (before allocating pci memory)
1604          * we will try to load a version with a smaller API -- maybe the
1605          * user just got a corrupted version of the latest API.
1606          */
1607
1608         /* Verify size of file vs. image size info in file's header */
1609         if (ucode_raw->size !=
1610                 priv->cfg->ops->ucode->get_header_size(api_ver) +
1611                 inst_size + data_size + init_size +
1612                 init_data_size + boot_size) {
1613
1614                 IWL_DEBUG_INFO(priv,
1615                         "uCode file size %d does not match expected size\n",
1616                         (int)ucode_raw->size);
1617                 goto try_again;
1618         }
1619
1620         /* Verify that uCode images will fit in card's SRAM */
1621         if (inst_size > priv->hw_params.max_inst_size) {
1622                 IWL_DEBUG_INFO(priv, "uCode instr len %d too large to fit in\n",
1623                                inst_size);
1624                 goto try_again;
1625         }
1626
1627         if (data_size > priv->hw_params.max_data_size) {
1628                 IWL_DEBUG_INFO(priv, "uCode data len %d too large to fit in\n",
1629                                 data_size);
1630                 goto try_again;
1631         }
1632         if (init_size > priv->hw_params.max_inst_size) {
1633                 IWL_INFO(priv, "uCode init instr len %d too large to fit in\n",
1634                         init_size);
1635                 goto try_again;
1636         }
1637         if (init_data_size > priv->hw_params.max_data_size) {
1638                 IWL_INFO(priv, "uCode init data len %d too large to fit in\n",
1639                       init_data_size);
1640                 goto try_again;
1641         }
1642         if (boot_size > priv->hw_params.max_bsm_size) {
1643                 IWL_INFO(priv, "uCode boot instr len %d too large to fit in\n",
1644                         boot_size);
1645                 goto try_again;
1646         }
1647
1648         /* Allocate ucode buffers for card's bus-master loading ... */
1649
1650         /* Runtime instructions and 2 copies of data:
1651          * 1) unmodified from disk
1652          * 2) backup cache for save/restore during power-downs */
1653         priv->ucode_code.len = inst_size;
1654         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
1655
1656         priv->ucode_data.len = data_size;
1657         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
1658
1659         priv->ucode_data_backup.len = data_size;
1660         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1661
1662         if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
1663             !priv->ucode_data_backup.v_addr)
1664                 goto err_pci_alloc;
1665
1666         /* Initialization instructions and data */
1667         if (init_size && init_data_size) {
1668                 priv->ucode_init.len = init_size;
1669                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
1670
1671                 priv->ucode_init_data.len = init_data_size;
1672                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1673
1674                 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
1675                         goto err_pci_alloc;
1676         }
1677
1678         /* Bootstrap (instructions only, no data) */
1679         if (boot_size) {
1680                 priv->ucode_boot.len = boot_size;
1681                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
1682
1683                 if (!priv->ucode_boot.v_addr)
1684                         goto err_pci_alloc;
1685         }
1686
1687         /* Copy images into buffers for card's bus-master reads ... */
1688
1689         /* Runtime instructions (first block of data in file) */
1690         len = inst_size;
1691         IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode instr len %Zd\n", len);
1692         memcpy(priv->ucode_code.v_addr, src, len);
1693         src += len;
1694
1695         IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
1696                 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
1697
1698         /* Runtime data (2nd block)
1699          * NOTE:  Copy into backup buffer will be done in iwl_up()  */
1700         len = data_size;
1701         IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode data len %Zd\n", len);
1702         memcpy(priv->ucode_data.v_addr, src, len);
1703         memcpy(priv->ucode_data_backup.v_addr, src, len);
1704         src += len;
1705
1706         /* Initialization instructions (3rd block) */
1707         if (init_size) {
1708                 len = init_size;
1709                 IWL_DEBUG_INFO(priv, "Copying (but not loading) init instr len %Zd\n",
1710                                 len);
1711                 memcpy(priv->ucode_init.v_addr, src, len);
1712                 src += len;
1713         }
1714
1715         /* Initialization data (4th block) */
1716         if (init_data_size) {
1717                 len = init_data_size;
1718                 IWL_DEBUG_INFO(priv, "Copying (but not loading) init data len %Zd\n",
1719                                len);
1720                 memcpy(priv->ucode_init_data.v_addr, src, len);
1721                 src += len;
1722         }
1723
1724         /* Bootstrap instructions (5th block) */
1725         len = boot_size;
1726         IWL_DEBUG_INFO(priv, "Copying (but not loading) boot instr len %Zd\n", len);
1727         memcpy(priv->ucode_boot.v_addr, src, len);
1728
1729         /**************************************************
1730          * This is still part of probe() in a sense...
1731          *
1732          * 9. Setup and register with mac80211 and debugfs
1733          **************************************************/
1734         err = iwl_mac_setup_register(priv);
1735         if (err)
1736                 goto out_unbind;
1737
1738         err = iwl_dbgfs_register(priv, DRV_NAME);
1739         if (err)
1740                 IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err);
1741
1742         /* We have our copies now, allow OS release its copies */
1743         release_firmware(ucode_raw);
1744         complete(&priv->firmware_loading_complete);
1745         return;
1746
1747  try_again:
1748         /* try next, if any */
1749         if (iwl_request_firmware(priv, false))
1750                 goto out_unbind;
1751         release_firmware(ucode_raw);
1752         return;
1753
1754  err_pci_alloc:
1755         IWL_ERR(priv, "failed to allocate pci memory\n");
1756         iwl_dealloc_ucode_pci(priv);
1757  out_unbind:
1758         complete(&priv->firmware_loading_complete);
1759         device_release_driver(&priv->pci_dev->dev);
1760         release_firmware(ucode_raw);
1761 }
1762
1763 static const char *desc_lookup_text[] = {
1764         "OK",
1765         "FAIL",
1766         "BAD_PARAM",
1767         "BAD_CHECKSUM",
1768         "NMI_INTERRUPT_WDG",
1769         "SYSASSERT",
1770         "FATAL_ERROR",
1771         "BAD_COMMAND",
1772         "HW_ERROR_TUNE_LOCK",
1773         "HW_ERROR_TEMPERATURE",
1774         "ILLEGAL_CHAN_FREQ",
1775         "VCC_NOT_STABLE",
1776         "FH_ERROR",
1777         "NMI_INTERRUPT_HOST",
1778         "NMI_INTERRUPT_ACTION_PT",
1779         "NMI_INTERRUPT_UNKNOWN",
1780         "UCODE_VERSION_MISMATCH",
1781         "HW_ERROR_ABS_LOCK",
1782         "HW_ERROR_CAL_LOCK_FAIL",
1783         "NMI_INTERRUPT_INST_ACTION_PT",
1784         "NMI_INTERRUPT_DATA_ACTION_PT",
1785         "NMI_TRM_HW_ER",
1786         "NMI_INTERRUPT_TRM",
1787         "NMI_INTERRUPT_BREAK_POINT"
1788         "DEBUG_0",
1789         "DEBUG_1",
1790         "DEBUG_2",
1791         "DEBUG_3",
1792         "ADVANCED SYSASSERT"
1793 };
1794
1795 static const char *desc_lookup(int i)
1796 {
1797         int max = ARRAY_SIZE(desc_lookup_text) - 1;
1798
1799         if (i < 0 || i > max)
1800                 i = max;
1801
1802         return desc_lookup_text[i];
1803 }
1804
1805 #define ERROR_START_OFFSET  (1 * sizeof(u32))
1806 #define ERROR_ELEM_SIZE     (7 * sizeof(u32))
1807
1808 void iwl_dump_nic_error_log(struct iwl_priv *priv)
1809 {
1810         u32 data2, line;
1811         u32 desc, time, count, base, data1;
1812         u32 blink1, blink2, ilink1, ilink2;
1813
1814         if (priv->ucode_type == UCODE_INIT)
1815                 base = le32_to_cpu(priv->card_alive_init.error_event_table_ptr);
1816         else
1817                 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
1818
1819         if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
1820                 IWL_ERR(priv,
1821                         "Not valid error log pointer 0x%08X for %s uCode\n",
1822                         base, (priv->ucode_type == UCODE_INIT) ? "Init" : "RT");
1823                 return;
1824         }
1825
1826         count = iwl_read_targ_mem(priv, base);
1827
1828         if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
1829                 IWL_ERR(priv, "Start IWL Error Log Dump:\n");
1830                 IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
1831                         priv->status, count);
1832         }
1833
1834         desc = iwl_read_targ_mem(priv, base + 1 * sizeof(u32));
1835         blink1 = iwl_read_targ_mem(priv, base + 3 * sizeof(u32));
1836         blink2 = iwl_read_targ_mem(priv, base + 4 * sizeof(u32));
1837         ilink1 = iwl_read_targ_mem(priv, base + 5 * sizeof(u32));
1838         ilink2 = iwl_read_targ_mem(priv, base + 6 * sizeof(u32));
1839         data1 = iwl_read_targ_mem(priv, base + 7 * sizeof(u32));
1840         data2 = iwl_read_targ_mem(priv, base + 8 * sizeof(u32));
1841         line = iwl_read_targ_mem(priv, base + 9 * sizeof(u32));
1842         time = iwl_read_targ_mem(priv, base + 11 * sizeof(u32));
1843
1844         trace_iwlwifi_dev_ucode_error(priv, desc, time, data1, data2, line,
1845                                       blink1, blink2, ilink1, ilink2);
1846
1847         IWL_ERR(priv, "Desc                               Time       "
1848                 "data1      data2      line\n");
1849         IWL_ERR(priv, "%-28s (#%02d) %010u 0x%08X 0x%08X %u\n",
1850                 desc_lookup(desc), desc, time, data1, data2, line);
1851         IWL_ERR(priv, "blink1  blink2  ilink1  ilink2\n");
1852         IWL_ERR(priv, "0x%05X 0x%05X 0x%05X 0x%05X\n", blink1, blink2,
1853                 ilink1, ilink2);
1854
1855 }
1856
1857 #define EVENT_START_OFFSET  (4 * sizeof(u32))
1858
1859 /**
1860  * iwl_print_event_log - Dump error event log to syslog
1861  *
1862  */
1863 static int iwl_print_event_log(struct iwl_priv *priv, u32 start_idx,
1864                                u32 num_events, u32 mode,
1865                                int pos, char **buf, size_t bufsz)
1866 {
1867         u32 i;
1868         u32 base;       /* SRAM byte address of event log header */
1869         u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
1870         u32 ptr;        /* SRAM byte address of log data */
1871         u32 ev, time, data; /* event log data */
1872         unsigned long reg_flags;
1873
1874         if (num_events == 0)
1875                 return pos;
1876         if (priv->ucode_type == UCODE_INIT)
1877                 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
1878         else
1879                 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
1880
1881         if (mode == 0)
1882                 event_size = 2 * sizeof(u32);
1883         else
1884                 event_size = 3 * sizeof(u32);
1885
1886         ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
1887
1888         /* Make sure device is powered up for SRAM reads */
1889         spin_lock_irqsave(&priv->reg_lock, reg_flags);
1890         iwl_grab_nic_access(priv);
1891
1892         /* Set starting address; reads will auto-increment */
1893         _iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, ptr);
1894         rmb();
1895
1896         /* "time" is actually "data" for mode 0 (no timestamp).
1897         * place event id # at far right for easier visual parsing. */
1898         for (i = 0; i < num_events; i++) {
1899                 ev = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1900                 time = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1901                 if (mode == 0) {
1902                         /* data, ev */
1903                         if (bufsz) {
1904                                 pos += scnprintf(*buf + pos, bufsz - pos,
1905                                                 "EVT_LOG:0x%08x:%04u\n",
1906                                                 time, ev);
1907                         } else {
1908                                 trace_iwlwifi_dev_ucode_event(priv, 0,
1909                                         time, ev);
1910                                 IWL_ERR(priv, "EVT_LOG:0x%08x:%04u\n",
1911                                         time, ev);
1912                         }
1913                 } else {
1914                         data = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1915                         if (bufsz) {
1916                                 pos += scnprintf(*buf + pos, bufsz - pos,
1917                                                 "EVT_LOGT:%010u:0x%08x:%04u\n",
1918                                                  time, data, ev);
1919                         } else {
1920                                 IWL_ERR(priv, "EVT_LOGT:%010u:0x%08x:%04u\n",
1921                                         time, data, ev);
1922                                 trace_iwlwifi_dev_ucode_event(priv, time,
1923                                         data, ev);
1924                         }
1925                 }
1926         }
1927
1928         /* Allow device to power down */
1929         iwl_release_nic_access(priv);
1930         spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
1931         return pos;
1932 }
1933
1934 /**
1935  * iwl_print_last_event_logs - Dump the newest # of event log to syslog
1936  */
1937 static int iwl_print_last_event_logs(struct iwl_priv *priv, u32 capacity,
1938                                     u32 num_wraps, u32 next_entry,
1939                                     u32 size, u32 mode,
1940                                     int pos, char **buf, size_t bufsz)
1941 {
1942         /*
1943          * display the newest DEFAULT_LOG_ENTRIES entries
1944          * i.e the entries just before the next ont that uCode would fill.
1945          */
1946         if (num_wraps) {
1947                 if (next_entry < size) {
1948                         pos = iwl_print_event_log(priv,
1949                                                 capacity - (size - next_entry),
1950                                                 size - next_entry, mode,
1951                                                 pos, buf, bufsz);
1952                         pos = iwl_print_event_log(priv, 0,
1953                                                   next_entry, mode,
1954                                                   pos, buf, bufsz);
1955                 } else
1956                         pos = iwl_print_event_log(priv, next_entry - size,
1957                                                   size, mode, pos, buf, bufsz);
1958         } else {
1959                 if (next_entry < size) {
1960                         pos = iwl_print_event_log(priv, 0, next_entry,
1961                                                   mode, pos, buf, bufsz);
1962                 } else {
1963                         pos = iwl_print_event_log(priv, next_entry - size,
1964                                                   size, mode, pos, buf, bufsz);
1965                 }
1966         }
1967         return pos;
1968 }
1969
1970 /* For sanity check only.  Actual size is determined by uCode, typ. 512 */
1971 #define MAX_EVENT_LOG_SIZE (512)
1972
1973 #define DEFAULT_DUMP_EVENT_LOG_ENTRIES (20)
1974
1975 int iwl_dump_nic_event_log(struct iwl_priv *priv, bool full_log,
1976                             char **buf, bool display)
1977 {
1978         u32 base;       /* SRAM byte address of event log header */
1979         u32 capacity;   /* event log capacity in # entries */
1980         u32 mode;       /* 0 - no timestamp, 1 - timestamp recorded */
1981         u32 num_wraps;  /* # times uCode wrapped to top of log */
1982         u32 next_entry; /* index of next entry to be written by uCode */
1983         u32 size;       /* # entries that we'll print */
1984         int pos = 0;
1985         size_t bufsz = 0;
1986
1987         if (priv->ucode_type == UCODE_INIT)
1988                 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
1989         else
1990                 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
1991
1992         if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
1993                 IWL_ERR(priv,
1994                         "Invalid event log pointer 0x%08X for %s uCode\n",
1995                         base, (priv->ucode_type == UCODE_INIT) ? "Init" : "RT");
1996                 return -EINVAL;
1997         }
1998
1999         /* event log header */
2000         capacity = iwl_read_targ_mem(priv, base);
2001         mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
2002         num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
2003         next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
2004
2005         if (capacity > MAX_EVENT_LOG_SIZE) {
2006                 IWL_ERR(priv, "Log capacity %d is bogus, limit to %d entries\n",
2007                         capacity, MAX_EVENT_LOG_SIZE);
2008                 capacity = MAX_EVENT_LOG_SIZE;
2009         }
2010
2011         if (next_entry > MAX_EVENT_LOG_SIZE) {
2012                 IWL_ERR(priv, "Log write index %d is bogus, limit to %d\n",
2013                         next_entry, MAX_EVENT_LOG_SIZE);
2014                 next_entry = MAX_EVENT_LOG_SIZE;
2015         }
2016
2017         size = num_wraps ? capacity : next_entry;
2018
2019         /* bail out if nothing in log */
2020         if (size == 0) {
2021                 IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
2022                 return pos;
2023         }
2024
2025 #ifdef CONFIG_IWLWIFI_DEBUG
2026         if (!(iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) && !full_log)
2027                 size = (size > DEFAULT_DUMP_EVENT_LOG_ENTRIES)
2028                         ? DEFAULT_DUMP_EVENT_LOG_ENTRIES : size;
2029 #else
2030         size = (size > DEFAULT_DUMP_EVENT_LOG_ENTRIES)
2031                 ? DEFAULT_DUMP_EVENT_LOG_ENTRIES : size;
2032 #endif
2033         IWL_ERR(priv, "Start IWL Event Log Dump: display last %u entries\n",
2034                 size);
2035
2036 #ifdef CONFIG_IWLWIFI_DEBUG
2037         if (display) {
2038                 if (full_log)
2039                         bufsz = capacity * 48;
2040                 else
2041                         bufsz = size * 48;
2042                 *buf = kmalloc(bufsz, GFP_KERNEL);
2043                 if (!*buf)
2044                         return -ENOMEM;
2045         }
2046         if ((iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) || full_log) {
2047                 /*
2048                  * if uCode has wrapped back to top of log,
2049                  * start at the oldest entry,
2050                  * i.e the next one that uCode would fill.
2051                  */
2052                 if (num_wraps)
2053                         pos = iwl_print_event_log(priv, next_entry,
2054                                                 capacity - next_entry, mode,
2055                                                 pos, buf, bufsz);
2056                 /* (then/else) start at top of log */
2057                 pos = iwl_print_event_log(priv, 0,
2058                                           next_entry, mode, pos, buf, bufsz);
2059         } else
2060                 pos = iwl_print_last_event_logs(priv, capacity, num_wraps,
2061                                                 next_entry, size, mode,
2062                                                 pos, buf, bufsz);
2063 #else
2064         pos = iwl_print_last_event_logs(priv, capacity, num_wraps,
2065                                         next_entry, size, mode,
2066                                         pos, buf, bufsz);
2067 #endif
2068         return pos;
2069 }
2070
2071 /**
2072  * iwl_alive_start - called after REPLY_ALIVE notification received
2073  *                   from protocol/runtime uCode (initialization uCode's
2074  *                   Alive gets handled by iwl_init_alive_start()).
2075  */
2076 static void iwl_alive_start(struct iwl_priv *priv)
2077 {
2078         int ret = 0;
2079
2080         IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
2081
2082         if (priv->card_alive.is_valid != UCODE_VALID_OK) {
2083                 /* We had an error bringing up the hardware, so take it
2084                  * all the way back down so we can try again */
2085                 IWL_DEBUG_INFO(priv, "Alive failed.\n");
2086                 goto restart;
2087         }
2088
2089         /* Initialize uCode has loaded Runtime uCode ... verify inst image.
2090          * This is a paranoid check, because we would not have gotten the
2091          * "runtime" alive if code weren't properly loaded.  */
2092         if (iwl_verify_ucode(priv)) {
2093                 /* Runtime instruction load was bad;
2094                  * take it all the way back down so we can try again */
2095                 IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
2096                 goto restart;
2097         }
2098
2099         iwl_clear_stations_table(priv);
2100         ret = priv->cfg->ops->lib->alive_notify(priv);
2101         if (ret) {
2102                 IWL_WARN(priv,
2103                         "Could not complete ALIVE transition [ntf]: %d\n", ret);
2104                 goto restart;
2105         }
2106
2107         /* After the ALIVE response, we can send host commands to the uCode */
2108         set_bit(STATUS_ALIVE, &priv->status);
2109
2110         if (iwl_is_rfkill(priv))
2111                 return;
2112
2113         ieee80211_wake_queues(priv->hw);
2114
2115         priv->active_rate = priv->rates_mask;
2116         priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
2117
2118         /* Configure Tx antenna selection based on H/W config */
2119         if (priv->cfg->ops->hcmd->set_tx_ant)
2120                 priv->cfg->ops->hcmd->set_tx_ant(priv, priv->cfg->valid_tx_ant);
2121
2122         if (iwl_is_associated(priv)) {
2123                 struct iwl_rxon_cmd *active_rxon =
2124                                 (struct iwl_rxon_cmd *)&priv->active_rxon;
2125                 /* apply any changes in staging */
2126                 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2127                 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2128         } else {
2129                 /* Initialize our rx_config data */
2130                 iwl_connection_init_rx_config(priv, priv->iw_mode);
2131
2132                 if (priv->cfg->ops->hcmd->set_rxon_chain)
2133                         priv->cfg->ops->hcmd->set_rxon_chain(priv);
2134
2135                 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
2136         }
2137
2138         /* Configure Bluetooth device coexistence support */
2139         iwl_send_bt_config(priv);
2140
2141         iwl_reset_run_time_calib(priv);
2142
2143         /* Configure the adapter for unassociated operation */
2144         iwlcore_commit_rxon(priv);
2145
2146         /* At this point, the NIC is initialized and operational */
2147         iwl_rf_kill_ct_config(priv);
2148
2149         iwl_leds_init(priv);
2150
2151         IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
2152         set_bit(STATUS_READY, &priv->status);
2153         wake_up_interruptible(&priv->wait_command_queue);
2154
2155         iwl_power_update_mode(priv, true);
2156
2157         /* reassociate for ADHOC mode */
2158         if (priv->vif && (priv->iw_mode == NL80211_IFTYPE_ADHOC)) {
2159                 struct sk_buff *beacon = ieee80211_beacon_get(priv->hw,
2160                                                                 priv->vif);
2161                 if (beacon)
2162                         iwl_mac_beacon_update(priv->hw, beacon);
2163         }
2164
2165
2166         if (test_and_clear_bit(STATUS_MODE_PENDING, &priv->status))
2167                 iwl_set_mode(priv, priv->iw_mode);
2168
2169         return;
2170
2171  restart:
2172         queue_work(priv->workqueue, &priv->restart);
2173 }
2174
2175 static void iwl_cancel_deferred_work(struct iwl_priv *priv);
2176
2177 static void __iwl_down(struct iwl_priv *priv)
2178 {
2179         unsigned long flags;
2180         int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
2181
2182         IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
2183
2184         if (!exit_pending)
2185                 set_bit(STATUS_EXIT_PENDING, &priv->status);
2186
2187         iwl_clear_stations_table(priv);
2188
2189         /* Unblock any waiting calls */
2190         wake_up_interruptible_all(&priv->wait_command_queue);
2191
2192         /* Wipe out the EXIT_PENDING status bit if we are not actually
2193          * exiting the module */
2194         if (!exit_pending)
2195                 clear_bit(STATUS_EXIT_PENDING, &priv->status);
2196
2197         /* stop and reset the on-board processor */
2198         iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
2199
2200         /* tell the device to stop sending interrupts */
2201         spin_lock_irqsave(&priv->lock, flags);
2202         iwl_disable_interrupts(priv);
2203         spin_unlock_irqrestore(&priv->lock, flags);
2204         iwl_synchronize_irq(priv);
2205
2206         if (priv->mac80211_registered)
2207                 ieee80211_stop_queues(priv->hw);
2208
2209         /* If we have not previously called iwl_init() then
2210          * clear all bits but the RF Kill bit and return */
2211         if (!iwl_is_init(priv)) {
2212                 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2213                                         STATUS_RF_KILL_HW |
2214                                test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2215                                         STATUS_GEO_CONFIGURED |
2216                                test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2217                                         STATUS_EXIT_PENDING;
2218                 goto exit;
2219         }
2220
2221         /* ...otherwise clear out all the status bits but the RF Kill
2222          * bit and continue taking the NIC down. */
2223         priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2224                                 STATUS_RF_KILL_HW |
2225                         test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2226                                 STATUS_GEO_CONFIGURED |
2227                         test_bit(STATUS_FW_ERROR, &priv->status) <<
2228                                 STATUS_FW_ERROR |
2229                        test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2230                                 STATUS_EXIT_PENDING;
2231
2232         /* device going down, Stop using ICT table */
2233         iwl_disable_ict(priv);
2234
2235         iwl_txq_ctx_stop(priv);
2236         iwl_rxq_stop(priv);
2237
2238         /* Power-down device's busmaster DMA clocks */
2239         iwl_write_prph(priv, APMG_CLK_DIS_REG, APMG_CLK_VAL_DMA_CLK_RQT);
2240         udelay(5);
2241
2242         /* Make sure (redundant) we've released our request to stay awake */
2243         iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
2244
2245         /* Stop the device, and put it in low power state */
2246         priv->cfg->ops->lib->apm_ops.stop(priv);
2247
2248  exit:
2249         memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
2250
2251         if (priv->ibss_beacon)
2252                 dev_kfree_skb(priv->ibss_beacon);
2253         priv->ibss_beacon = NULL;
2254
2255         /* clear out any free frames */
2256         iwl_clear_free_frames(priv);
2257 }
2258
2259 static void iwl_down(struct iwl_priv *priv)
2260 {
2261         mutex_lock(&priv->mutex);
2262         __iwl_down(priv);
2263         mutex_unlock(&priv->mutex);
2264
2265         iwl_cancel_deferred_work(priv);
2266 }
2267
2268 #define HW_READY_TIMEOUT (50)
2269
2270 static int iwl_set_hw_ready(struct iwl_priv *priv)
2271 {
2272         int ret = 0;
2273
2274         iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
2275                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY);
2276
2277         /* See if we got it */
2278         ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
2279                                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
2280                                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
2281                                 HW_READY_TIMEOUT);
2282         if (ret != -ETIMEDOUT)
2283                 priv->hw_ready = true;
2284         else
2285                 priv->hw_ready = false;
2286
2287         IWL_DEBUG_INFO(priv, "hardware %s\n",
2288                       (priv->hw_ready == 1) ? "ready" : "not ready");
2289         return ret;
2290 }
2291
2292 static int iwl_prepare_card_hw(struct iwl_priv *priv)
2293 {
2294         int ret = 0;
2295
2296         IWL_DEBUG_INFO(priv, "iwl_prepare_card_hw enter \n");
2297
2298         ret = iwl_set_hw_ready(priv);
2299         if (priv->hw_ready)
2300                 return ret;
2301
2302         /* If HW is not ready, prepare the conditions to check again */
2303         iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
2304                         CSR_HW_IF_CONFIG_REG_PREPARE);
2305
2306         ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
2307                         ~CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE,
2308                         CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE, 150000);
2309
2310         /* HW should be ready by now, check again. */
2311         if (ret != -ETIMEDOUT)
2312                 iwl_set_hw_ready(priv);
2313
2314         return ret;
2315 }
2316
2317 #define MAX_HW_RESTARTS 5
2318
2319 static int __iwl_up(struct iwl_priv *priv)
2320 {
2321         int i;
2322         int ret;
2323
2324         if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
2325                 IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
2326                 return -EIO;
2327         }
2328
2329         if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
2330                 IWL_ERR(priv, "ucode not available for device bringup\n");
2331                 return -EIO;
2332         }
2333
2334         iwl_prepare_card_hw(priv);
2335
2336         if (!priv->hw_ready) {
2337                 IWL_WARN(priv, "Exit HW not ready\n");
2338                 return -EIO;
2339         }
2340
2341         /* If platform's RF_KILL switch is NOT set to KILL */
2342         if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
2343                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2344         else
2345                 set_bit(STATUS_RF_KILL_HW, &priv->status);
2346
2347         if (iwl_is_rfkill(priv)) {
2348                 wiphy_rfkill_set_hw_state(priv->hw->wiphy, true);
2349
2350                 iwl_enable_interrupts(priv);
2351                 IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
2352                 return 0;
2353         }
2354
2355         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2356
2357         ret = iwl_hw_nic_init(priv);
2358         if (ret) {
2359                 IWL_ERR(priv, "Unable to init nic\n");
2360                 return ret;
2361         }
2362
2363         /* make sure rfkill handshake bits are cleared */
2364         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2365         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
2366                     CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
2367
2368         /* clear (again), then enable host interrupts */
2369         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2370         iwl_enable_interrupts(priv);
2371
2372         /* really make sure rfkill handshake bits are cleared */
2373         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2374         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2375
2376         /* Copy original ucode data image from disk into backup cache.
2377          * This will be used to initialize the on-board processor's
2378          * data SRAM for a clean start when the runtime program first loads. */
2379         memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
2380                priv->ucode_data.len);
2381
2382         for (i = 0; i < MAX_HW_RESTARTS; i++) {
2383
2384                 iwl_clear_stations_table(priv);
2385
2386                 /* load bootstrap state machine,
2387                  * load bootstrap program into processor's memory,
2388                  * prepare to load the "initialize" uCode */
2389                 ret = priv->cfg->ops->lib->load_ucode(priv);
2390
2391                 if (ret) {
2392                         IWL_ERR(priv, "Unable to set up bootstrap uCode: %d\n",
2393                                 ret);
2394                         continue;
2395                 }
2396
2397                 /* start card; "initialize" will load runtime ucode */
2398                 iwl_nic_start(priv);
2399
2400                 IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
2401
2402                 return 0;
2403         }
2404
2405         set_bit(STATUS_EXIT_PENDING, &priv->status);
2406         __iwl_down(priv);
2407         clear_bit(STATUS_EXIT_PENDING, &priv->status);
2408
2409         /* tried to restart and config the device for as long as our
2410          * patience could withstand */
2411         IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
2412         return -EIO;
2413 }
2414
2415
2416 /*****************************************************************************
2417  *
2418  * Workqueue callbacks
2419  *
2420  *****************************************************************************/
2421
2422 static void iwl_bg_init_alive_start(struct work_struct *data)
2423 {
2424         struct iwl_priv *priv =
2425             container_of(data, struct iwl_priv, init_alive_start.work);
2426
2427         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2428                 return;
2429
2430         mutex_lock(&priv->mutex);
2431         priv->cfg->ops->lib->init_alive_start(priv);
2432         mutex_unlock(&priv->mutex);
2433 }
2434
2435 static void iwl_bg_alive_start(struct work_struct *data)
2436 {
2437         struct iwl_priv *priv =
2438             container_of(data, struct iwl_priv, alive_start.work);
2439
2440         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2441                 return;
2442
2443         /* enable dram interrupt */
2444         iwl_reset_ict(priv);
2445
2446         mutex_lock(&priv->mutex);
2447         iwl_alive_start(priv);
2448         mutex_unlock(&priv->mutex);
2449 }
2450
2451 static void iwl_bg_run_time_calib_work(struct work_struct *work)
2452 {
2453         struct iwl_priv *priv = container_of(work, struct iwl_priv,
2454                         run_time_calib_work);
2455
2456         mutex_lock(&priv->mutex);
2457
2458         if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
2459             test_bit(STATUS_SCANNING, &priv->status)) {
2460                 mutex_unlock(&priv->mutex);
2461                 return;
2462         }
2463
2464         if (priv->start_calib) {
2465                 iwl_chain_noise_calibration(priv, &priv->statistics);
2466
2467                 iwl_sensitivity_calibration(priv, &priv->statistics);
2468         }
2469
2470         mutex_unlock(&priv->mutex);
2471         return;
2472 }
2473
2474 static void iwl_bg_restart(struct work_struct *data)
2475 {
2476         struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
2477
2478         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2479                 return;
2480
2481         if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) {
2482                 mutex_lock(&priv->mutex);
2483                 priv->vif = NULL;
2484                 priv->is_open = 0;
2485                 mutex_unlock(&priv->mutex);
2486                 iwl_down(priv);
2487                 ieee80211_restart_hw(priv->hw);
2488         } else {
2489                 iwl_down(priv);
2490
2491                 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2492                         return;
2493
2494                 mutex_lock(&priv->mutex);
2495                 __iwl_up(priv);
2496                 mutex_unlock(&priv->mutex);
2497         }
2498 }
2499
2500 static void iwl_bg_rx_replenish(struct work_struct *data)
2501 {
2502         struct iwl_priv *priv =
2503             container_of(data, struct iwl_priv, rx_replenish);
2504
2505         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2506                 return;
2507
2508         mutex_lock(&priv->mutex);
2509         iwl_rx_replenish(priv);
2510         mutex_unlock(&priv->mutex);
2511 }
2512
2513 #define IWL_DELAY_NEXT_SCAN (HZ*2)
2514
2515 void iwl_post_associate(struct iwl_priv *priv)
2516 {
2517         struct ieee80211_conf *conf = NULL;
2518         int ret = 0;
2519         unsigned long flags;
2520
2521         if (priv->iw_mode == NL80211_IFTYPE_AP) {
2522                 IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
2523                 return;
2524         }
2525
2526         IWL_DEBUG_ASSOC(priv, "Associated as %d to: %pM\n",
2527                         priv->assoc_id, priv->active_rxon.bssid_addr);
2528
2529
2530         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2531                 return;
2532
2533
2534         if (!priv->vif || !priv->is_open)
2535                 return;
2536
2537         iwl_scan_cancel_timeout(priv, 200);
2538
2539         conf = ieee80211_get_hw_conf(priv->hw);
2540
2541         priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2542         iwlcore_commit_rxon(priv);
2543
2544         iwl_setup_rxon_timing(priv);
2545         ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
2546                               sizeof(priv->rxon_timing), &priv->rxon_timing);
2547         if (ret)
2548                 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
2549                             "Attempting to continue.\n");
2550
2551         priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2552
2553         iwl_set_rxon_ht(priv, &priv->current_ht_config);
2554
2555         if (priv->cfg->ops->hcmd->set_rxon_chain)
2556                 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2557
2558         priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
2559
2560         IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n",
2561                         priv->assoc_id, priv->beacon_int);
2562
2563         if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
2564                 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2565         else
2566                 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2567
2568         if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
2569                 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
2570                         priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2571                 else
2572                         priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2573
2574                 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
2575                         priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2576
2577         }
2578
2579         iwlcore_commit_rxon(priv);
2580
2581         switch (priv->iw_mode) {
2582         case NL80211_IFTYPE_STATION:
2583                 break;
2584
2585         case NL80211_IFTYPE_ADHOC:
2586
2587                 /* assume default assoc id */
2588                 priv->assoc_id = 1;
2589
2590                 iwl_rxon_add_station(priv, priv->bssid, 0);
2591                 iwl_send_beacon_cmd(priv);
2592
2593                 break;
2594
2595         default:
2596                 IWL_ERR(priv, "%s Should not be called in %d mode\n",
2597                           __func__, priv->iw_mode);
2598                 break;
2599         }
2600
2601         if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
2602                 priv->assoc_station_added = 1;
2603
2604         spin_lock_irqsave(&priv->lock, flags);
2605         iwl_activate_qos(priv, 0);
2606         spin_unlock_irqrestore(&priv->lock, flags);
2607
2608         /* the chain noise calibration will enabled PM upon completion
2609          * If chain noise has already been run, then we need to enable
2610          * power management here */
2611         if (priv->chain_noise_data.state == IWL_CHAIN_NOISE_DONE)
2612                 iwl_power_update_mode(priv, false);
2613
2614         /* Enable Rx differential gain and sensitivity calibrations */
2615         iwl_chain_noise_reset(priv);
2616         priv->start_calib = 1;
2617
2618 }
2619
2620 /*****************************************************************************
2621  *
2622  * mac80211 entry point functions
2623  *
2624  *****************************************************************************/
2625
2626 #define UCODE_READY_TIMEOUT     (4 * HZ)
2627
2628 /*
2629  * Not a mac80211 entry point function, but it fits in with all the
2630  * other mac80211 functions grouped here.
2631  */
2632 static int iwl_mac_setup_register(struct iwl_priv *priv)
2633 {
2634         int ret;
2635         struct ieee80211_hw *hw = priv->hw;
2636         hw->rate_control_algorithm = "iwl-agn-rs";
2637
2638         /* Tell mac80211 our characteristics */
2639         hw->flags = IEEE80211_HW_SIGNAL_DBM |
2640                     IEEE80211_HW_NOISE_DBM |
2641                     IEEE80211_HW_AMPDU_AGGREGATION |
2642                     IEEE80211_HW_SPECTRUM_MGMT;
2643
2644         if (!priv->cfg->broken_powersave)
2645                 hw->flags |= IEEE80211_HW_SUPPORTS_PS |
2646                              IEEE80211_HW_SUPPORTS_DYNAMIC_PS;
2647
2648         if (priv->cfg->sku & IWL_SKU_N)
2649                 hw->flags |= IEEE80211_HW_SUPPORTS_DYNAMIC_SMPS |
2650                              IEEE80211_HW_SUPPORTS_STATIC_SMPS;
2651
2652         hw->sta_data_size = sizeof(struct iwl_station_priv);
2653         hw->wiphy->interface_modes =
2654                 BIT(NL80211_IFTYPE_STATION) |
2655                 BIT(NL80211_IFTYPE_ADHOC);
2656
2657         hw->wiphy->flags |= WIPHY_FLAG_CUSTOM_REGULATORY |
2658                             WIPHY_FLAG_DISABLE_BEACON_HINTS;
2659
2660         /*
2661          * For now, disable PS by default because it affects
2662          * RX performance significantly.
2663          */
2664         hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT;
2665
2666         hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX;
2667         /* we create the 802.11 header and a zero-length SSID element */
2668         hw->wiphy->max_scan_ie_len = IWL_MAX_PROBE_REQUEST - 24 - 2;
2669
2670         /* Default value; 4 EDCA QOS priorities */
2671         hw->queues = 4;
2672
2673         hw->max_listen_interval = IWL_CONN_MAX_LISTEN_INTERVAL;
2674
2675         if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
2676                 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
2677                         &priv->bands[IEEE80211_BAND_2GHZ];
2678         if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
2679                 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
2680                         &priv->bands[IEEE80211_BAND_5GHZ];
2681
2682         ret = ieee80211_register_hw(priv->hw);
2683         if (ret) {
2684                 IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
2685                 return ret;
2686         }
2687         priv->mac80211_registered = 1;
2688
2689         return 0;
2690 }
2691
2692
2693 static int iwl_mac_start(struct ieee80211_hw *hw)
2694 {
2695         struct iwl_priv *priv = hw->priv;
2696         int ret;
2697
2698         IWL_DEBUG_MAC80211(priv, "enter\n");
2699
2700         /* we should be verifying the device is ready to be opened */
2701         mutex_lock(&priv->mutex);
2702         ret = __iwl_up(priv);
2703         mutex_unlock(&priv->mutex);
2704
2705         if (ret)
2706                 return ret;
2707
2708         if (iwl_is_rfkill(priv))
2709                 goto out;
2710
2711         IWL_DEBUG_INFO(priv, "Start UP work done.\n");
2712
2713         /* Wait for START_ALIVE from Run Time ucode. Otherwise callbacks from
2714          * mac80211 will not be run successfully. */
2715         ret = wait_event_interruptible_timeout(priv->wait_command_queue,
2716                         test_bit(STATUS_READY, &priv->status),
2717                         UCODE_READY_TIMEOUT);
2718         if (!ret) {
2719                 if (!test_bit(STATUS_READY, &priv->status)) {
2720                         IWL_ERR(priv, "START_ALIVE timeout after %dms.\n",
2721                                 jiffies_to_msecs(UCODE_READY_TIMEOUT));
2722                         return -ETIMEDOUT;
2723                 }
2724         }
2725
2726         iwl_led_start(priv);
2727
2728 out:
2729         priv->is_open = 1;
2730         IWL_DEBUG_MAC80211(priv, "leave\n");
2731         return 0;
2732 }
2733
2734 static void iwl_mac_stop(struct ieee80211_hw *hw)
2735 {
2736         struct iwl_priv *priv = hw->priv;
2737
2738         IWL_DEBUG_MAC80211(priv, "enter\n");
2739
2740         if (!priv->is_open)
2741                 return;
2742
2743         priv->is_open = 0;
2744
2745         if (iwl_is_ready_rf(priv) || test_bit(STATUS_SCAN_HW, &priv->status)) {
2746                 /* stop mac, cancel any scan request and clear
2747                  * RXON_FILTER_ASSOC_MSK BIT
2748                  */
2749                 mutex_lock(&priv->mutex);
2750                 iwl_scan_cancel_timeout(priv, 100);
2751                 mutex_unlock(&priv->mutex);
2752         }
2753
2754         iwl_down(priv);
2755
2756         flush_workqueue(priv->workqueue);
2757
2758         /* enable interrupts again in order to receive rfkill changes */
2759         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2760         iwl_enable_interrupts(priv);
2761
2762         IWL_DEBUG_MAC80211(priv, "leave\n");
2763 }
2764
2765 static int iwl_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
2766 {
2767         struct iwl_priv *priv = hw->priv;
2768
2769         IWL_DEBUG_MACDUMP(priv, "enter\n");
2770
2771         IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
2772                      ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
2773
2774         if (iwl_tx_skb(priv, skb))
2775                 dev_kfree_skb_any(skb);
2776
2777         IWL_DEBUG_MACDUMP(priv, "leave\n");
2778         return NETDEV_TX_OK;
2779 }
2780
2781 void iwl_config_ap(struct iwl_priv *priv)
2782 {
2783         int ret = 0;
2784         unsigned long flags;
2785
2786         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2787                 return;
2788
2789         /* The following should be done only at AP bring up */
2790         if (!iwl_is_associated(priv)) {
2791
2792                 /* RXON - unassoc (to set timing command) */
2793                 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2794                 iwlcore_commit_rxon(priv);
2795
2796                 /* RXON Timing */
2797                 iwl_setup_rxon_timing(priv);
2798                 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
2799                                 sizeof(priv->rxon_timing), &priv->rxon_timing);
2800                 if (ret)
2801                         IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
2802                                         "Attempting to continue.\n");
2803
2804                 /* AP has all antennas */
2805                 priv->chain_noise_data.active_chains =
2806                         priv->hw_params.valid_rx_ant;
2807                 iwl_set_rxon_ht(priv, &priv->current_ht_config);
2808                 if (priv->cfg->ops->hcmd->set_rxon_chain)
2809                         priv->cfg->ops->hcmd->set_rxon_chain(priv);
2810
2811                 /* FIXME: what should be the assoc_id for AP? */
2812                 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
2813                 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
2814                         priv->staging_rxon.flags |=
2815                                 RXON_FLG_SHORT_PREAMBLE_MSK;
2816                 else
2817                         priv->staging_rxon.flags &=
2818                                 ~RXON_FLG_SHORT_PREAMBLE_MSK;
2819
2820                 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
2821                         if (priv->assoc_capability &
2822                                 WLAN_CAPABILITY_SHORT_SLOT_TIME)
2823                                 priv->staging_rxon.flags |=
2824                                         RXON_FLG_SHORT_SLOT_MSK;
2825                         else
2826                                 priv->staging_rxon.flags &=
2827                                         ~RXON_FLG_SHORT_SLOT_MSK;
2828
2829                         if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
2830                                 priv->staging_rxon.flags &=
2831                                         ~RXON_FLG_SHORT_SLOT_MSK;
2832                 }
2833                 /* restore RXON assoc */
2834                 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2835                 iwlcore_commit_rxon(priv);
2836                 iwl_reset_qos(priv);
2837                 spin_lock_irqsave(&priv->lock, flags);
2838                 iwl_activate_qos(priv, 1);
2839                 spin_unlock_irqrestore(&priv->lock, flags);
2840                 iwl_add_bcast_station(priv);
2841         }
2842         iwl_send_beacon_cmd(priv);
2843
2844         /* FIXME - we need to add code here to detect a totally new
2845          * configuration, reset the AP, unassoc, rxon timing, assoc,
2846          * clear sta table, add BCAST sta... */
2847 }
2848
2849 static void iwl_mac_update_tkip_key(struct ieee80211_hw *hw,
2850                                     struct ieee80211_vif *vif,
2851                                     struct ieee80211_key_conf *keyconf,
2852                                     struct ieee80211_sta *sta,
2853                                     u32 iv32, u16 *phase1key)
2854 {
2855
2856         struct iwl_priv *priv = hw->priv;
2857         IWL_DEBUG_MAC80211(priv, "enter\n");
2858
2859         iwl_update_tkip_key(priv, keyconf,
2860                             sta ? sta->addr : iwl_bcast_addr,
2861                             iv32, phase1key);
2862
2863         IWL_DEBUG_MAC80211(priv, "leave\n");
2864 }
2865
2866 static int iwl_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
2867                            struct ieee80211_vif *vif,
2868                            struct ieee80211_sta *sta,
2869                            struct ieee80211_key_conf *key)
2870 {
2871         struct iwl_priv *priv = hw->priv;
2872         const u8 *addr;
2873         int ret;
2874         u8 sta_id;
2875         bool is_default_wep_key = false;
2876
2877         IWL_DEBUG_MAC80211(priv, "enter\n");
2878
2879         if (priv->cfg->mod_params->sw_crypto) {
2880                 IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
2881                 return -EOPNOTSUPP;
2882         }
2883         addr = sta ? sta->addr : iwl_bcast_addr;
2884         sta_id = iwl_find_station(priv, addr);
2885         if (sta_id == IWL_INVALID_STATION) {
2886                 IWL_DEBUG_MAC80211(priv, "leave - %pM not in station map.\n",
2887                                    addr);
2888                 return -EINVAL;
2889
2890         }
2891
2892         mutex_lock(&priv->mutex);
2893         iwl_scan_cancel_timeout(priv, 100);
2894         mutex_unlock(&priv->mutex);
2895
2896         /* If we are getting WEP group key and we didn't receive any key mapping
2897          * so far, we are in legacy wep mode (group key only), otherwise we are
2898          * in 1X mode.
2899          * In legacy wep mode, we use another host command to the uCode */
2900         if (key->alg == ALG_WEP && sta_id == priv->hw_params.bcast_sta_id &&
2901                 priv->iw_mode != NL80211_IFTYPE_AP) {
2902                 if (cmd == SET_KEY)
2903                         is_default_wep_key = !priv->key_mapping_key;
2904                 else
2905                         is_default_wep_key =
2906                                         (key->hw_key_idx == HW_KEY_DEFAULT);
2907         }
2908
2909         switch (cmd) {
2910         case SET_KEY:
2911                 if (is_default_wep_key)
2912                         ret = iwl_set_default_wep_key(priv, key);
2913                 else
2914                         ret = iwl_set_dynamic_key(priv, key, sta_id);
2915
2916                 IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
2917                 break;
2918         case DISABLE_KEY:
2919                 if (is_default_wep_key)
2920                         ret = iwl_remove_default_wep_key(priv, key);
2921                 else
2922                         ret = iwl_remove_dynamic_key(priv, key, sta_id);
2923
2924                 IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
2925                 break;
2926         default:
2927                 ret = -EINVAL;
2928         }
2929
2930         IWL_DEBUG_MAC80211(priv, "leave\n");
2931
2932         return ret;
2933 }
2934
2935 static int iwl_mac_ampdu_action(struct ieee80211_hw *hw,
2936                                 struct ieee80211_vif *vif,
2937                              enum ieee80211_ampdu_mlme_action action,
2938                              struct ieee80211_sta *sta, u16 tid, u16 *ssn)
2939 {
2940         struct iwl_priv *priv = hw->priv;
2941         int ret;
2942
2943         IWL_DEBUG_HT(priv, "A-MPDU action on addr %pM tid %d\n",
2944                      sta->addr, tid);
2945
2946         if (!(priv->cfg->sku & IWL_SKU_N))
2947                 return -EACCES;
2948
2949         switch (action) {
2950         case IEEE80211_AMPDU_RX_START:
2951                 IWL_DEBUG_HT(priv, "start Rx\n");
2952                 return iwl_sta_rx_agg_start(priv, sta->addr, tid, *ssn);
2953         case IEEE80211_AMPDU_RX_STOP:
2954                 IWL_DEBUG_HT(priv, "stop Rx\n");
2955                 ret = iwl_sta_rx_agg_stop(priv, sta->addr, tid);
2956                 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2957                         return 0;
2958                 else
2959                         return ret;
2960         case IEEE80211_AMPDU_TX_START:
2961                 IWL_DEBUG_HT(priv, "start Tx\n");
2962                 return iwl_tx_agg_start(priv, sta->addr, tid, ssn);
2963         case IEEE80211_AMPDU_TX_STOP:
2964                 IWL_DEBUG_HT(priv, "stop Tx\n");
2965                 ret = iwl_tx_agg_stop(priv, sta->addr, tid);
2966                 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2967                         return 0;
2968                 else
2969                         return ret;
2970         case IEEE80211_AMPDU_TX_OPERATIONAL:
2971                 /* do nothing */
2972                 return -EOPNOTSUPP;
2973         default:
2974                 IWL_DEBUG_HT(priv, "unknown\n");
2975                 return -EINVAL;
2976                 break;
2977         }
2978         return 0;
2979 }
2980
2981 static int iwl_mac_get_stats(struct ieee80211_hw *hw,
2982                              struct ieee80211_low_level_stats *stats)
2983 {
2984         struct iwl_priv *priv = hw->priv;
2985
2986         priv = hw->priv;
2987         IWL_DEBUG_MAC80211(priv, "enter\n");
2988         IWL_DEBUG_MAC80211(priv, "leave\n");
2989
2990         return 0;
2991 }
2992
2993 static void iwl_mac_sta_notify(struct ieee80211_hw *hw,
2994                                struct ieee80211_vif *vif,
2995                                enum sta_notify_cmd cmd,
2996                                struct ieee80211_sta *sta)
2997 {
2998         struct iwl_priv *priv = hw->priv;
2999         struct iwl_station_priv *sta_priv = (void *)sta->drv_priv;
3000         int sta_id;
3001
3002         /*
3003          * TODO: We really should use this callback to
3004          *       actually maintain the station table in
3005          *       the device.
3006          */
3007
3008         switch (cmd) {
3009         case STA_NOTIFY_ADD:
3010                 atomic_set(&sta_priv->pending_frames, 0);
3011                 if (vif->type == NL80211_IFTYPE_AP)
3012                         sta_priv->client = true;
3013                 break;
3014         case STA_NOTIFY_SLEEP:
3015                 WARN_ON(!sta_priv->client);
3016                 sta_priv->asleep = true;
3017                 if (atomic_read(&sta_priv->pending_frames) > 0)
3018                         ieee80211_sta_block_awake(hw, sta, true);
3019                 break;
3020         case STA_NOTIFY_AWAKE:
3021                 WARN_ON(!sta_priv->client);
3022                 if (!sta_priv->asleep)
3023                         break;
3024                 sta_priv->asleep = false;
3025                 sta_id = iwl_find_station(priv, sta->addr);
3026                 if (sta_id != IWL_INVALID_STATION)
3027                         iwl_sta_modify_ps_wake(priv, sta_id);
3028                 break;
3029         default:
3030                 break;
3031         }
3032 }
3033
3034 /*****************************************************************************
3035  *
3036  * sysfs attributes
3037  *
3038  *****************************************************************************/
3039
3040 #ifdef CONFIG_IWLWIFI_DEBUG
3041
3042 /*
3043  * The following adds a new attribute to the sysfs representation
3044  * of this device driver (i.e. a new file in /sys/class/net/wlan0/device/)
3045  * used for controlling the debug level.
3046  *
3047  * See the level definitions in iwl for details.
3048  *
3049  * The debug_level being managed using sysfs below is a per device debug
3050  * level that is used instead of the global debug level if it (the per
3051  * device debug level) is set.
3052  */
3053 static ssize_t show_debug_level(struct device *d,
3054                                 struct device_attribute *attr, char *buf)
3055 {
3056         struct iwl_priv *priv = dev_get_drvdata(d);
3057         return sprintf(buf, "0x%08X\n", iwl_get_debug_level(priv));
3058 }
3059 static ssize_t store_debug_level(struct device *d,
3060                                 struct device_attribute *attr,
3061                                  const char *buf, size_t count)
3062 {
3063         struct iwl_priv *priv = dev_get_drvdata(d);
3064         unsigned long val;
3065         int ret;
3066
3067         ret = strict_strtoul(buf, 0, &val);
3068         if (ret)
3069                 IWL_ERR(priv, "%s is not in hex or decimal form.\n", buf);
3070         else {
3071                 priv->debug_level = val;
3072                 if (iwl_alloc_traffic_mem(priv))
3073                         IWL_ERR(priv,
3074                                 "Not enough memory to generate traffic log\n");
3075         }
3076         return strnlen(buf, count);
3077 }
3078
3079 static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
3080                         show_debug_level, store_debug_level);
3081
3082
3083 #endif /* CONFIG_IWLWIFI_DEBUG */
3084
3085
3086 static ssize_t show_temperature(struct device *d,
3087                                 struct device_attribute *attr, char *buf)
3088 {
3089         struct iwl_priv *priv = dev_get_drvdata(d);
3090
3091         if (!iwl_is_alive(priv))
3092                 return -EAGAIN;
3093
3094         return sprintf(buf, "%d\n", priv->temperature);
3095 }
3096
3097 static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
3098
3099 static ssize_t show_tx_power(struct device *d,
3100                              struct device_attribute *attr, char *buf)
3101 {
3102         struct iwl_priv *priv = dev_get_drvdata(d);
3103
3104         if (!iwl_is_ready_rf(priv))
3105                 return sprintf(buf, "off\n");
3106         else
3107                 return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
3108 }
3109
3110 static ssize_t store_tx_power(struct device *d,
3111                               struct device_attribute *attr,
3112                               const char *buf, size_t count)
3113 {
3114         struct iwl_priv *priv = dev_get_drvdata(d);
3115         unsigned long val;
3116         int ret;
3117
3118         ret = strict_strtoul(buf, 10, &val);
3119         if (ret)
3120                 IWL_INFO(priv, "%s is not in decimal form.\n", buf);
3121         else {
3122                 ret = iwl_set_tx_power(priv, val, false);
3123                 if (ret)
3124                         IWL_ERR(priv, "failed setting tx power (0x%d).\n",
3125                                 ret);
3126                 else
3127                         ret = count;
3128         }
3129         return ret;
3130 }
3131
3132 static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
3133
3134 static ssize_t show_flags(struct device *d,
3135                           struct device_attribute *attr, char *buf)
3136 {
3137         struct iwl_priv *priv = dev_get_drvdata(d);
3138
3139         return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
3140 }
3141
3142 static ssize_t store_flags(struct device *d,
3143                            struct device_attribute *attr,
3144                            const char *buf, size_t count)
3145 {
3146         struct iwl_priv *priv = dev_get_drvdata(d);
3147         unsigned long val;
3148         u32 flags;
3149         int ret = strict_strtoul(buf, 0, &val);
3150         if (ret)
3151                 return ret;
3152         flags = (u32)val;
3153
3154         mutex_lock(&priv->mutex);
3155         if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
3156                 /* Cancel any currently running scans... */
3157                 if (iwl_scan_cancel_timeout(priv, 100))
3158                         IWL_WARN(priv, "Could not cancel scan.\n");
3159                 else {
3160                         IWL_DEBUG_INFO(priv, "Commit rxon.flags = 0x%04X\n", flags);
3161                         priv->staging_rxon.flags = cpu_to_le32(flags);
3162                         iwlcore_commit_rxon(priv);
3163                 }
3164         }
3165         mutex_unlock(&priv->mutex);
3166
3167         return count;
3168 }
3169
3170 static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
3171
3172 static ssize_t show_filter_flags(struct device *d,
3173                                  struct device_attribute *attr, char *buf)
3174 {
3175         struct iwl_priv *priv = dev_get_drvdata(d);
3176
3177         return sprintf(buf, "0x%04X\n",
3178                 le32_to_cpu(priv->active_rxon.filter_flags));
3179 }
3180
3181 static ssize_t store_filter_flags(struct device *d,
3182                                   struct device_attribute *attr,
3183                                   const char *buf, size_t count)
3184 {
3185         struct iwl_priv *priv = dev_get_drvdata(d);
3186         unsigned long val;
3187         u32 filter_flags;
3188         int ret = strict_strtoul(buf, 0, &val);
3189         if (ret)
3190                 return ret;
3191         filter_flags = (u32)val;
3192
3193         mutex_lock(&priv->mutex);
3194         if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
3195                 /* Cancel any currently running scans... */
3196                 if (iwl_scan_cancel_timeout(priv, 100))
3197                         IWL_WARN(priv, "Could not cancel scan.\n");
3198                 else {
3199                         IWL_DEBUG_INFO(priv, "Committing rxon.filter_flags = "
3200                                        "0x%04X\n", filter_flags);
3201                         priv->staging_rxon.filter_flags =
3202                                 cpu_to_le32(filter_flags);
3203                         iwlcore_commit_rxon(priv);
3204                 }
3205         }
3206         mutex_unlock(&priv->mutex);
3207
3208         return count;
3209 }
3210
3211 static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
3212                    store_filter_flags);
3213
3214
3215 static ssize_t show_statistics(struct device *d,
3216                                struct device_attribute *attr, char *buf)
3217 {
3218         struct iwl_priv *priv = dev_get_drvdata(d);
3219         u32 size = sizeof(struct iwl_notif_statistics);
3220         u32 len = 0, ofs = 0;
3221         u8 *data = (u8 *)&priv->statistics;
3222         int rc = 0;
3223
3224         if (!iwl_is_alive(priv))
3225                 return -EAGAIN;
3226
3227         mutex_lock(&priv->mutex);
3228         rc = iwl_send_statistics_request(priv, CMD_SYNC, false);
3229         mutex_unlock(&priv->mutex);
3230
3231         if (rc) {
3232                 len = sprintf(buf,
3233                               "Error sending statistics request: 0x%08X\n", rc);
3234                 return len;
3235         }
3236
3237         while (size && (PAGE_SIZE - len)) {
3238                 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
3239                                    PAGE_SIZE - len, 1);
3240                 len = strlen(buf);
3241                 if (PAGE_SIZE - len)
3242                         buf[len++] = '\n';
3243
3244                 ofs += 16;
3245                 size -= min(size, 16U);
3246         }
3247
3248         return len;
3249 }
3250
3251 static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
3252
3253 static ssize_t show_rts_ht_protection(struct device *d,
3254                              struct device_attribute *attr, char *buf)
3255 {
3256         struct iwl_priv *priv = dev_get_drvdata(d);
3257
3258         return sprintf(buf, "%s\n",
3259                 priv->cfg->use_rts_for_ht ? "RTS/CTS" : "CTS-to-self");
3260 }
3261
3262 static ssize_t store_rts_ht_protection(struct device *d,
3263                               struct device_attribute *attr,
3264                               const char *buf, size_t count)
3265 {
3266         struct iwl_priv *priv = dev_get_drvdata(d);
3267         unsigned long val;
3268         int ret;
3269
3270         ret = strict_strtoul(buf, 10, &val);
3271         if (ret)
3272                 IWL_INFO(priv, "Input is not in decimal form.\n");
3273         else {
3274                 if (!iwl_is_associated(priv))
3275                         priv->cfg->use_rts_for_ht = val ? true : false;
3276                 else
3277                         IWL_ERR(priv, "Sta associated with AP - "
3278                                 "Change protection mechanism is not allowed\n");
3279                 ret = count;
3280         }
3281         return ret;
3282 }
3283
3284 static DEVICE_ATTR(rts_ht_protection, S_IWUSR | S_IRUGO,
3285                         show_rts_ht_protection, store_rts_ht_protection);
3286
3287
3288 /*****************************************************************************
3289  *
3290  * driver setup and teardown
3291  *
3292  *****************************************************************************/
3293
3294 static void iwl_setup_deferred_work(struct iwl_priv *priv)
3295 {
3296         priv->workqueue = create_singlethread_workqueue(DRV_NAME);
3297
3298         init_waitqueue_head(&priv->wait_command_queue);
3299
3300         INIT_WORK(&priv->restart, iwl_bg_restart);
3301         INIT_WORK(&priv->rx_replenish, iwl_bg_rx_replenish);
3302         INIT_WORK(&priv->beacon_update, iwl_bg_beacon_update);
3303         INIT_WORK(&priv->run_time_calib_work, iwl_bg_run_time_calib_work);
3304         INIT_DELAYED_WORK(&priv->init_alive_start, iwl_bg_init_alive_start);
3305         INIT_DELAYED_WORK(&priv->alive_start, iwl_bg_alive_start);
3306
3307         iwl_setup_scan_deferred_work(priv);
3308
3309         if (priv->cfg->ops->lib->setup_deferred_work)
3310                 priv->cfg->ops->lib->setup_deferred_work(priv);
3311
3312         init_timer(&priv->statistics_periodic);
3313         priv->statistics_periodic.data = (unsigned long)priv;
3314         priv->statistics_periodic.function = iwl_bg_statistics_periodic;
3315
3316         init_timer(&priv->ucode_trace);
3317         priv->ucode_trace.data = (unsigned long)priv;
3318         priv->ucode_trace.function = iwl_bg_ucode_trace;
3319
3320         if (!priv->cfg->use_isr_legacy)
3321                 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
3322                         iwl_irq_tasklet, (unsigned long)priv);
3323         else
3324                 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
3325                         iwl_irq_tasklet_legacy, (unsigned long)priv);
3326 }
3327
3328 static void iwl_cancel_deferred_work(struct iwl_priv *priv)
3329 {
3330         if (priv->cfg->ops->lib->cancel_deferred_work)
3331                 priv->cfg->ops->lib->cancel_deferred_work(priv);
3332
3333         cancel_delayed_work_sync(&priv->init_alive_start);
3334         cancel_delayed_work(&priv->scan_check);
3335         cancel_work_sync(&priv->start_internal_scan);
3336         cancel_delayed_work(&priv->alive_start);
3337         cancel_work_sync(&priv->beacon_update);
3338         del_timer_sync(&priv->statistics_periodic);
3339         del_timer_sync(&priv->ucode_trace);
3340 }
3341
3342 static void iwl_init_hw_rates(struct iwl_priv *priv,
3343                               struct ieee80211_rate *rates)
3344 {
3345         int i;
3346
3347         for (i = 0; i < IWL_RATE_COUNT_LEGACY; i++) {
3348                 rates[i].bitrate = iwl_rates[i].ieee * 5;
3349                 rates[i].hw_value = i; /* Rate scaling will work on indexes */
3350                 rates[i].hw_value_short = i;
3351                 rates[i].flags = 0;
3352                 if ((i >= IWL_FIRST_CCK_RATE) && (i <= IWL_LAST_CCK_RATE)) {
3353                         /*
3354                          * If CCK != 1M then set short preamble rate flag.
3355                          */
3356                         rates[i].flags |=
3357                                 (iwl_rates[i].plcp == IWL_RATE_1M_PLCP) ?
3358                                         0 : IEEE80211_RATE_SHORT_PREAMBLE;
3359                 }
3360         }
3361 }
3362
3363 static int iwl_init_drv(struct iwl_priv *priv)
3364 {
3365         int ret;
3366
3367         priv->ibss_beacon = NULL;
3368
3369         spin_lock_init(&priv->sta_lock);
3370         spin_lock_init(&priv->hcmd_lock);
3371
3372         INIT_LIST_HEAD(&priv->free_frames);
3373
3374         mutex_init(&priv->mutex);
3375         mutex_init(&priv->sync_cmd_mutex);
3376
3377         /* Clear the driver's (not device's) station table */
3378         iwl_clear_stations_table(priv);
3379
3380         priv->ieee_channels = NULL;
3381         priv->ieee_rates = NULL;
3382         priv->band = IEEE80211_BAND_2GHZ;
3383
3384         priv->iw_mode = NL80211_IFTYPE_STATION;
3385         priv->current_ht_config.smps = IEEE80211_SMPS_STATIC;
3386         priv->missed_beacon_threshold = IWL_MISSED_BEACON_THRESHOLD_DEF;
3387
3388         /* initialize force reset */
3389         priv->force_reset[IWL_RF_RESET].reset_duration =
3390                 IWL_DELAY_NEXT_FORCE_RF_RESET;
3391         priv->force_reset[IWL_FW_RESET].reset_duration =
3392                 IWL_DELAY_NEXT_FORCE_FW_RELOAD;
3393
3394         /* Choose which receivers/antennas to use */
3395         if (priv->cfg->ops->hcmd->set_rxon_chain)
3396                 priv->cfg->ops->hcmd->set_rxon_chain(priv);
3397
3398         iwl_init_scan_params(priv);
3399
3400         iwl_reset_qos(priv);
3401
3402         priv->qos_data.qos_active = 0;
3403         priv->qos_data.qos_cap.val = 0;
3404
3405         priv->rates_mask = IWL_RATES_MASK;
3406         /* Set the tx_power_user_lmt to the lowest power level
3407          * this value will get overwritten by channel max power avg
3408          * from eeprom */
3409         priv->tx_power_user_lmt = IWL_TX_POWER_TARGET_POWER_MIN;
3410
3411         ret = iwl_init_channel_map(priv);
3412         if (ret) {
3413                 IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
3414                 goto err;
3415         }
3416
3417         ret = iwlcore_init_geos(priv);
3418         if (ret) {
3419                 IWL_ERR(priv, "initializing geos failed: %d\n", ret);
3420                 goto err_free_channel_map;
3421         }
3422         iwl_init_hw_rates(priv, priv->ieee_rates);
3423
3424         return 0;
3425
3426 err_free_channel_map:
3427         iwl_free_channel_map(priv);
3428 err:
3429         return ret;
3430 }
3431
3432 static void iwl_uninit_drv(struct iwl_priv *priv)
3433 {
3434         iwl_calib_free_results(priv);
3435         iwlcore_free_geos(priv);
3436         iwl_free_channel_map(priv);
3437         kfree(priv->scan);
3438 }
3439
3440 static struct attribute *iwl_sysfs_entries[] = {
3441         &dev_attr_flags.attr,
3442         &dev_attr_filter_flags.attr,
3443         &dev_attr_statistics.attr,
3444         &dev_attr_temperature.attr,
3445         &dev_attr_tx_power.attr,
3446         &dev_attr_rts_ht_protection.attr,
3447 #ifdef CONFIG_IWLWIFI_DEBUG
3448         &dev_attr_debug_level.attr,
3449 #endif
3450         NULL
3451 };
3452
3453 static struct attribute_group iwl_attribute_group = {
3454         .name = NULL,           /* put in device directory */
3455         .attrs = iwl_sysfs_entries,
3456 };
3457
3458 static struct ieee80211_ops iwl_hw_ops = {
3459         .tx = iwl_mac_tx,
3460         .start = iwl_mac_start,
3461         .stop = iwl_mac_stop,
3462         .add_interface = iwl_mac_add_interface,
3463         .remove_interface = iwl_mac_remove_interface,
3464         .config = iwl_mac_config,
3465         .configure_filter = iwl_configure_filter,
3466         .set_key = iwl_mac_set_key,
3467         .update_tkip_key = iwl_mac_update_tkip_key,
3468         .get_stats = iwl_mac_get_stats,
3469         .conf_tx = iwl_mac_conf_tx,
3470         .reset_tsf = iwl_mac_reset_tsf,
3471         .bss_info_changed = iwl_bss_info_changed,
3472         .ampdu_action = iwl_mac_ampdu_action,
3473         .hw_scan = iwl_mac_hw_scan,
3474         .sta_notify = iwl_mac_sta_notify,
3475 };
3476
3477 static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
3478 {
3479         int err = 0;
3480         struct iwl_priv *priv;
3481         struct ieee80211_hw *hw;
3482         struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
3483         unsigned long flags;
3484         u16 pci_cmd;
3485
3486         /************************
3487          * 1. Allocating HW data
3488          ************************/
3489
3490         /* Disabling hardware scan means that mac80211 will perform scans
3491          * "the hard way", rather than using device's scan. */
3492         if (cfg->mod_params->disable_hw_scan) {
3493                 if (iwl_debug_level & IWL_DL_INFO)
3494                         dev_printk(KERN_DEBUG, &(pdev->dev),
3495                                    "Disabling hw_scan\n");
3496                 iwl_hw_ops.hw_scan = NULL;
3497         }
3498
3499         hw = iwl_alloc_all(cfg, &iwl_hw_ops);
3500         if (!hw) {
3501                 err = -ENOMEM;
3502                 goto out;
3503         }
3504         priv = hw->priv;
3505         /* At this point both hw and priv are allocated. */
3506
3507         SET_IEEE80211_DEV(hw, &pdev->dev);
3508
3509         IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
3510         priv->cfg = cfg;
3511         priv->pci_dev = pdev;
3512         priv->inta_mask = CSR_INI_SET_MASK;
3513
3514 #ifdef CONFIG_IWLWIFI_DEBUG
3515         atomic_set(&priv->restrict_refcnt, 0);
3516 #endif
3517         if (iwl_alloc_traffic_mem(priv))
3518                 IWL_ERR(priv, "Not enough memory to generate traffic log\n");
3519
3520         /**************************
3521          * 2. Initializing PCI bus
3522          **************************/
3523         if (pci_enable_device(pdev)) {
3524                 err = -ENODEV;
3525                 goto out_ieee80211_free_hw;
3526         }
3527
3528         pci_set_master(pdev);
3529
3530         err = pci_set_dma_mask(pdev, DMA_BIT_MASK(36));
3531         if (!err)
3532                 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(36));
3533         if (err) {
3534                 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
3535                 if (!err)
3536                         err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
3537                 /* both attempts failed: */
3538                 if (err) {
3539                         IWL_WARN(priv, "No suitable DMA available.\n");
3540                         goto out_pci_disable_device;
3541                 }
3542         }
3543
3544         err = pci_request_regions(pdev, DRV_NAME);
3545         if (err)
3546                 goto out_pci_disable_device;
3547
3548         pci_set_drvdata(pdev, priv);
3549
3550
3551         /***********************
3552          * 3. Read REV register
3553          ***********************/
3554         priv->hw_base = pci_iomap(pdev, 0, 0);
3555         if (!priv->hw_base) {
3556                 err = -ENODEV;
3557                 goto out_pci_release_regions;
3558         }
3559
3560         IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
3561                 (unsigned long long) pci_resource_len(pdev, 0));
3562         IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
3563
3564         /* these spin locks will be used in apm_ops.init and EEPROM access
3565          * we should init now
3566          */
3567         spin_lock_init(&priv->reg_lock);
3568         spin_lock_init(&priv->lock);
3569
3570         /*
3571          * stop and reset the on-board processor just in case it is in a
3572          * strange state ... like being left stranded by a primary kernel
3573          * and this is now the kdump kernel trying to start up
3574          */
3575         iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
3576
3577         iwl_hw_detect(priv);
3578         IWL_INFO(priv, "Detected Intel Wireless WiFi Link %s REV=0x%X\n",
3579                 priv->cfg->name, priv->hw_rev);
3580
3581         /* We disable the RETRY_TIMEOUT register (0x41) to keep
3582          * PCI Tx retries from interfering with C3 CPU state */
3583         pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
3584
3585         iwl_prepare_card_hw(priv);
3586         if (!priv->hw_ready) {
3587                 IWL_WARN(priv, "Failed, HW not ready\n");
3588                 goto out_iounmap;
3589         }
3590
3591         /*****************
3592          * 4. Read EEPROM
3593          *****************/
3594         /* Read the EEPROM */
3595         err = iwl_eeprom_init(priv);
3596         if (err) {
3597                 IWL_ERR(priv, "Unable to init EEPROM\n");
3598                 goto out_iounmap;
3599         }
3600         err = iwl_eeprom_check_version(priv);
3601         if (err)
3602                 goto out_free_eeprom;
3603
3604         /* extract MAC Address */
3605         iwl_eeprom_get_mac(priv, priv->mac_addr);
3606         IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->mac_addr);
3607         SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
3608
3609         /************************
3610          * 5. Setup HW constants
3611          ************************/
3612         if (iwl_set_hw_params(priv)) {
3613                 IWL_ERR(priv, "failed to set hw parameters\n");
3614                 goto out_free_eeprom;
3615         }
3616
3617         /*******************
3618          * 6. Setup priv
3619          *******************/
3620
3621         err = iwl_init_drv(priv);
3622         if (err)
3623                 goto out_free_eeprom;
3624         /* At this point both hw and priv are initialized. */
3625
3626         /********************
3627          * 7. Setup services
3628          ********************/
3629         spin_lock_irqsave(&priv->lock, flags);
3630         iwl_disable_interrupts(priv);
3631         spin_unlock_irqrestore(&priv->lock, flags);
3632
3633         pci_enable_msi(priv->pci_dev);
3634
3635         iwl_alloc_isr_ict(priv);
3636         err = request_irq(priv->pci_dev->irq, priv->cfg->ops->lib->isr,
3637                           IRQF_SHARED, DRV_NAME, priv);
3638         if (err) {
3639                 IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
3640                 goto out_disable_msi;
3641         }
3642         err = sysfs_create_group(&pdev->dev.kobj, &iwl_attribute_group);
3643         if (err) {
3644                 IWL_ERR(priv, "failed to create sysfs device attributes\n");
3645                 goto out_free_irq;
3646         }
3647
3648         iwl_setup_deferred_work(priv);
3649         iwl_setup_rx_handlers(priv);
3650
3651         /*********************************************
3652          * 8. Enable interrupts and read RFKILL state
3653          *********************************************/
3654
3655         /* enable interrupts if needed: hw bug w/a */
3656         pci_read_config_word(priv->pci_dev, PCI_COMMAND, &pci_cmd);
3657         if (pci_cmd & PCI_COMMAND_INTX_DISABLE) {
3658                 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
3659                 pci_write_config_word(priv->pci_dev, PCI_COMMAND, pci_cmd);
3660         }
3661
3662         iwl_enable_interrupts(priv);
3663
3664         /* If platform's RF_KILL switch is NOT set to KILL */
3665         if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
3666                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3667         else
3668                 set_bit(STATUS_RF_KILL_HW, &priv->status);
3669
3670         wiphy_rfkill_set_hw_state(priv->hw->wiphy,
3671                 test_bit(STATUS_RF_KILL_HW, &priv->status));
3672
3673         iwl_power_initialize(priv);
3674         iwl_tt_initialize(priv);
3675
3676         init_completion(&priv->firmware_loading_complete);
3677
3678         err = iwl_request_firmware(priv, true);
3679         if (err)
3680                 goto out_remove_sysfs;
3681
3682         return 0;
3683
3684  out_remove_sysfs:
3685         destroy_workqueue(priv->workqueue);
3686         priv->workqueue = NULL;
3687         sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
3688  out_free_irq:
3689         free_irq(priv->pci_dev->irq, priv);
3690         iwl_free_isr_ict(priv);
3691  out_disable_msi:
3692         pci_disable_msi(priv->pci_dev);
3693         iwl_uninit_drv(priv);
3694  out_free_eeprom:
3695         iwl_eeprom_free(priv);
3696  out_iounmap:
3697         pci_iounmap(pdev, priv->hw_base);
3698  out_pci_release_regions:
3699         pci_set_drvdata(pdev, NULL);
3700         pci_release_regions(pdev);
3701  out_pci_disable_device:
3702         pci_disable_device(pdev);
3703  out_ieee80211_free_hw:
3704         iwl_free_traffic_mem(priv);
3705         ieee80211_free_hw(priv->hw);
3706  out:
3707         return err;
3708 }
3709
3710 static void __devexit iwl_pci_remove(struct pci_dev *pdev)
3711 {
3712         struct iwl_priv *priv = pci_get_drvdata(pdev);
3713         unsigned long flags;
3714
3715         if (!priv)
3716                 return;
3717
3718         wait_for_completion(&priv->firmware_loading_complete);
3719
3720         IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
3721
3722         iwl_dbgfs_unregister(priv);
3723         sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
3724
3725         /* ieee80211_unregister_hw call wil cause iwl_mac_stop to
3726          * to be called and iwl_down since we are removing the device
3727          * we need to set STATUS_EXIT_PENDING bit.
3728          */
3729         set_bit(STATUS_EXIT_PENDING, &priv->status);
3730         if (priv->mac80211_registered) {
3731                 ieee80211_unregister_hw(priv->hw);
3732                 priv->mac80211_registered = 0;
3733         } else {
3734                 iwl_down(priv);
3735         }
3736
3737         /*
3738          * Make sure device is reset to low power before unloading driver.
3739          * This may be redundant with iwl_down(), but there are paths to
3740          * run iwl_down() without calling apm_ops.stop(), and there are
3741          * paths to avoid running iwl_down() at all before leaving driver.
3742          * This (inexpensive) call *makes sure* device is reset.
3743          */
3744         priv->cfg->ops->lib->apm_ops.stop(priv);
3745
3746         iwl_tt_exit(priv);
3747
3748         /* make sure we flush any pending irq or
3749          * tasklet for the driver
3750          */
3751         spin_lock_irqsave(&priv->lock, flags);
3752         iwl_disable_interrupts(priv);
3753         spin_unlock_irqrestore(&priv->lock, flags);
3754
3755         iwl_synchronize_irq(priv);
3756
3757         iwl_dealloc_ucode_pci(priv);
3758
3759         if (priv->rxq.bd)
3760                 iwl_rx_queue_free(priv, &priv->rxq);
3761         iwl_hw_txq_ctx_free(priv);
3762
3763         iwl_clear_stations_table(priv);
3764         iwl_eeprom_free(priv);
3765
3766
3767         /*netif_stop_queue(dev); */
3768         flush_workqueue(priv->workqueue);
3769
3770         /* ieee80211_unregister_hw calls iwl_mac_stop, which flushes
3771          * priv->workqueue... so we can't take down the workqueue
3772          * until now... */
3773         destroy_workqueue(priv->workqueue);
3774         priv->workqueue = NULL;
3775         iwl_free_traffic_mem(priv);
3776
3777         free_irq(priv->pci_dev->irq, priv);
3778         pci_disable_msi(priv->pci_dev);
3779         pci_iounmap(pdev, priv->hw_base);
3780         pci_release_regions(pdev);
3781         pci_disable_device(pdev);
3782         pci_set_drvdata(pdev, NULL);
3783
3784         iwl_uninit_drv(priv);
3785
3786         iwl_free_isr_ict(priv);
3787
3788         if (priv->ibss_beacon)
3789                 dev_kfree_skb(priv->ibss_beacon);
3790
3791         ieee80211_free_hw(priv->hw);
3792 }
3793
3794
3795 /*****************************************************************************
3796  *
3797  * driver and module entry point
3798  *
3799  *****************************************************************************/
3800
3801 /* Hardware specific file defines the PCI IDs table for that hardware module */
3802 static DEFINE_PCI_DEVICE_TABLE(iwl_hw_card_ids) = {
3803 #ifdef CONFIG_IWL4965
3804         {IWL_PCI_DEVICE(0x4229, PCI_ANY_ID, iwl4965_agn_cfg)},
3805         {IWL_PCI_DEVICE(0x4230, PCI_ANY_ID, iwl4965_agn_cfg)},
3806 #endif /* CONFIG_IWL4965 */
3807 #ifdef CONFIG_IWL5000
3808 /* 5100 Series WiFi */
3809         {IWL_PCI_DEVICE(0x4232, 0x1201, iwl5100_agn_cfg)}, /* Mini Card */
3810         {IWL_PCI_DEVICE(0x4232, 0x1301, iwl5100_agn_cfg)}, /* Half Mini Card */
3811         {IWL_PCI_DEVICE(0x4232, 0x1204, iwl5100_agn_cfg)}, /* Mini Card */
3812         {IWL_PCI_DEVICE(0x4232, 0x1304, iwl5100_agn_cfg)}, /* Half Mini Card */
3813         {IWL_PCI_DEVICE(0x4232, 0x1205, iwl5100_bgn_cfg)}, /* Mini Card */
3814         {IWL_PCI_DEVICE(0x4232, 0x1305, iwl5100_bgn_cfg)}, /* Half Mini Card */
3815         {IWL_PCI_DEVICE(0x4232, 0x1206, iwl5100_abg_cfg)}, /* Mini Card */
3816         {IWL_PCI_DEVICE(0x4232, 0x1306, iwl5100_abg_cfg)}, /* Half Mini Card */
3817         {IWL_PCI_DEVICE(0x4232, 0x1221, iwl5100_agn_cfg)}, /* Mini Card */
3818         {IWL_PCI_DEVICE(0x4232, 0x1321, iwl5100_agn_cfg)}, /* Half Mini Card */
3819         {IWL_PCI_DEVICE(0x4232, 0x1224, iwl5100_agn_cfg)}, /* Mini Card */
3820         {IWL_PCI_DEVICE(0x4232, 0x1324, iwl5100_agn_cfg)}, /* Half Mini Card */
3821         {IWL_PCI_DEVICE(0x4232, 0x1225, iwl5100_bgn_cfg)}, /* Mini Card */
3822         {IWL_PCI_DEVICE(0x4232, 0x1325, iwl5100_bgn_cfg)}, /* Half Mini Card */
3823         {IWL_PCI_DEVICE(0x4232, 0x1226, iwl5100_abg_cfg)}, /* Mini Card */
3824         {IWL_PCI_DEVICE(0x4232, 0x1326, iwl5100_abg_cfg)}, /* Half Mini Card */
3825         {IWL_PCI_DEVICE(0x4237, 0x1211, iwl5100_agn_cfg)}, /* Mini Card */
3826         {IWL_PCI_DEVICE(0x4237, 0x1311, iwl5100_agn_cfg)}, /* Half Mini Card */
3827         {IWL_PCI_DEVICE(0x4237, 0x1214, iwl5100_agn_cfg)}, /* Mini Card */
3828         {IWL_PCI_DEVICE(0x4237, 0x1314, iwl5100_agn_cfg)}, /* Half Mini Card */
3829         {IWL_PCI_DEVICE(0x4237, 0x1215, iwl5100_bgn_cfg)}, /* Mini Card */
3830         {IWL_PCI_DEVICE(0x4237, 0x1315, iwl5100_bgn_cfg)}, /* Half Mini Card */
3831         {IWL_PCI_DEVICE(0x4237, 0x1216, iwl5100_abg_cfg)}, /* Mini Card */
3832         {IWL_PCI_DEVICE(0x4237, 0x1316, iwl5100_abg_cfg)}, /* Half Mini Card */
3833
3834 /* 5300 Series WiFi */
3835         {IWL_PCI_DEVICE(0x4235, 0x1021, iwl5300_agn_cfg)}, /* Mini Card */
3836         {IWL_PCI_DEVICE(0x4235, 0x1121, iwl5300_agn_cfg)}, /* Half Mini Card */
3837         {IWL_PCI_DEVICE(0x4235, 0x1024, iwl5300_agn_cfg)}, /* Mini Card */
3838         {IWL_PCI_DEVICE(0x4235, 0x1124, iwl5300_agn_cfg)}, /* Half Mini Card */
3839         {IWL_PCI_DEVICE(0x4235, 0x1001, iwl5300_agn_cfg)}, /* Mini Card */
3840         {IWL_PCI_DEVICE(0x4235, 0x1101, iwl5300_agn_cfg)}, /* Half Mini Card */
3841         {IWL_PCI_DEVICE(0x4235, 0x1004, iwl5300_agn_cfg)}, /* Mini Card */
3842         {IWL_PCI_DEVICE(0x4235, 0x1104, iwl5300_agn_cfg)}, /* Half Mini Card */
3843         {IWL_PCI_DEVICE(0x4236, 0x1011, iwl5300_agn_cfg)}, /* Mini Card */
3844         {IWL_PCI_DEVICE(0x4236, 0x1111, iwl5300_agn_cfg)}, /* Half Mini Card */
3845         {IWL_PCI_DEVICE(0x4236, 0x1014, iwl5300_agn_cfg)}, /* Mini Card */
3846         {IWL_PCI_DEVICE(0x4236, 0x1114, iwl5300_agn_cfg)}, /* Half Mini Card */
3847
3848 /* 5350 Series WiFi/WiMax */
3849         {IWL_PCI_DEVICE(0x423A, 0x1001, iwl5350_agn_cfg)}, /* Mini Card */
3850         {IWL_PCI_DEVICE(0x423A, 0x1021, iwl5350_agn_cfg)}, /* Mini Card */
3851         {IWL_PCI_DEVICE(0x423B, 0x1011, iwl5350_agn_cfg)}, /* Mini Card */
3852
3853 /* 5150 Series Wifi/WiMax */
3854         {IWL_PCI_DEVICE(0x423C, 0x1201, iwl5150_agn_cfg)}, /* Mini Card */
3855         {IWL_PCI_DEVICE(0x423C, 0x1301, iwl5150_agn_cfg)}, /* Half Mini Card */
3856         {IWL_PCI_DEVICE(0x423C, 0x1206, iwl5150_abg_cfg)}, /* Mini Card */
3857         {IWL_PCI_DEVICE(0x423C, 0x1306, iwl5150_abg_cfg)}, /* Half Mini Card */
3858         {IWL_PCI_DEVICE(0x423C, 0x1221, iwl5150_agn_cfg)}, /* Mini Card */
3859         {IWL_PCI_DEVICE(0x423C, 0x1321, iwl5150_agn_cfg)}, /* Half Mini Card */
3860
3861         {IWL_PCI_DEVICE(0x423D, 0x1211, iwl5150_agn_cfg)}, /* Mini Card */
3862         {IWL_PCI_DEVICE(0x423D, 0x1311, iwl5150_agn_cfg)}, /* Half Mini Card */
3863         {IWL_PCI_DEVICE(0x423D, 0x1216, iwl5150_abg_cfg)}, /* Mini Card */
3864         {IWL_PCI_DEVICE(0x423D, 0x1316, iwl5150_abg_cfg)}, /* Half Mini Card */
3865
3866 /* 6x00 Series */
3867         {IWL_PCI_DEVICE(0x422B, 0x1101, iwl6000_3agn_cfg)},
3868         {IWL_PCI_DEVICE(0x422B, 0x1121, iwl6000_3agn_cfg)},
3869         {IWL_PCI_DEVICE(0x422C, 0x1301, iwl6000i_2agn_cfg)},
3870         {IWL_PCI_DEVICE(0x422C, 0x1306, iwl6000i_2abg_cfg)},
3871         {IWL_PCI_DEVICE(0x422C, 0x1307, iwl6000i_2bg_cfg)},
3872         {IWL_PCI_DEVICE(0x422C, 0x1321, iwl6000i_2agn_cfg)},
3873         {IWL_PCI_DEVICE(0x422C, 0x1326, iwl6000i_2abg_cfg)},
3874         {IWL_PCI_DEVICE(0x4238, 0x1111, iwl6000_3agn_cfg)},
3875         {IWL_PCI_DEVICE(0x4239, 0x1311, iwl6000i_2agn_cfg)},
3876         {IWL_PCI_DEVICE(0x4239, 0x1316, iwl6000i_2abg_cfg)},
3877
3878 /* 6x50 WiFi/WiMax Series */
3879         {IWL_PCI_DEVICE(0x0087, 0x1301, iwl6050_2agn_cfg)},
3880         {IWL_PCI_DEVICE(0x0087, 0x1306, iwl6050_2abg_cfg)},
3881         {IWL_PCI_DEVICE(0x0087, 0x1321, iwl6050_2agn_cfg)},
3882         {IWL_PCI_DEVICE(0x0087, 0x1326, iwl6050_2abg_cfg)},
3883         {IWL_PCI_DEVICE(0x0089, 0x1311, iwl6050_2agn_cfg)},
3884         {IWL_PCI_DEVICE(0x0089, 0x1316, iwl6050_2abg_cfg)},
3885
3886 /* 1000 Series WiFi */
3887         {IWL_PCI_DEVICE(0x0083, 0x1205, iwl1000_bgn_cfg)},
3888         {IWL_PCI_DEVICE(0x0083, 0x1305, iwl1000_bgn_cfg)},
3889         {IWL_PCI_DEVICE(0x0083, 0x1225, iwl1000_bgn_cfg)},
3890         {IWL_PCI_DEVICE(0x0083, 0x1325, iwl1000_bgn_cfg)},
3891         {IWL_PCI_DEVICE(0x0084, 0x1215, iwl1000_bgn_cfg)},
3892         {IWL_PCI_DEVICE(0x0084, 0x1315, iwl1000_bgn_cfg)},
3893         {IWL_PCI_DEVICE(0x0083, 0x1206, iwl1000_bg_cfg)},
3894         {IWL_PCI_DEVICE(0x0083, 0x1306, iwl1000_bg_cfg)},
3895         {IWL_PCI_DEVICE(0x0083, 0x1226, iwl1000_bg_cfg)},
3896         {IWL_PCI_DEVICE(0x0083, 0x1326, iwl1000_bg_cfg)},
3897         {IWL_PCI_DEVICE(0x0084, 0x1216, iwl1000_bg_cfg)},
3898         {IWL_PCI_DEVICE(0x0084, 0x1316, iwl1000_bg_cfg)},
3899 #endif /* CONFIG_IWL5000 */
3900
3901         {0}
3902 };
3903 MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids);
3904
3905 static struct pci_driver iwl_driver = {
3906         .name = DRV_NAME,
3907         .id_table = iwl_hw_card_ids,
3908         .probe = iwl_pci_probe,
3909         .remove = __devexit_p(iwl_pci_remove),
3910 #ifdef CONFIG_PM
3911         .suspend = iwl_pci_suspend,
3912         .resume = iwl_pci_resume,
3913 #endif
3914 };
3915
3916 static int __init iwl_init(void)
3917 {
3918
3919         int ret;
3920         printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
3921         printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
3922
3923         ret = iwlagn_rate_control_register();
3924         if (ret) {
3925                 printk(KERN_ERR DRV_NAME
3926                        "Unable to register rate control algorithm: %d\n", ret);
3927                 return ret;
3928         }
3929
3930         ret = pci_register_driver(&iwl_driver);
3931         if (ret) {
3932                 printk(KERN_ERR DRV_NAME "Unable to initialize PCI module\n");
3933                 goto error_register;
3934         }
3935
3936         return ret;
3937
3938 error_register:
3939         iwlagn_rate_control_unregister();
3940         return ret;
3941 }
3942
3943 static void __exit iwl_exit(void)
3944 {
3945         pci_unregister_driver(&iwl_driver);
3946         iwlagn_rate_control_unregister();
3947 }
3948
3949 module_exit(iwl_exit);
3950 module_init(iwl_init);
3951
3952 #ifdef CONFIG_IWLWIFI_DEBUG
3953 module_param_named(debug50, iwl_debug_level, uint, S_IRUGO);
3954 MODULE_PARM_DESC(debug50, "50XX debug output mask (deprecated)");
3955 module_param_named(debug, iwl_debug_level, uint, S_IRUGO | S_IWUSR);
3956 MODULE_PARM_DESC(debug, "debug output mask");
3957 #endif
3958