drivers/net/wireless/iwlwifi/iwl-agn.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved.
   4  *
   5  * Portions of this file are derived from the ipw3945 project, as well
   6  * as portions of the ieee80211 subsystem header files.
   7  *
   8  * This program is free software; you can redistribute it and/or modify it
   9  * under the terms of version 2 of the GNU General Public License as
  10  * published by the Free Software Foundation.
  11  *
  12  * This program is distributed in the hope that it will be useful, but WITHOUT
  13  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  15  * more details.
  16  *
  17  * You should have received a copy of the GNU General Public License along with
  18  * this program; if not, write to the Free Software Foundation, Inc.,
  19  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20  *
  21  * The full GNU General Public License is included in this distribution in the
  22  * file called LICENSE.
  23  *
  24  * Contact Information:
  25  *  Intel Linux Wireless <ilw@linux.intel.com>
  26  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27  *
  28  *****************************************************************************/
  29
  30 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  31
  32 #include <linux/kernel.h>
  33 #include <linux/module.h>
  34 #include <linux/init.h>
  35 #include <linux/pci.h>
  36 #include <linux/pci-aspm.h>
  37 #include <linux/slab.h>
  38 #include <linux/dma-mapping.h>
  39 #include <linux/delay.h>
  40 #include <linux/sched.h>
  41 #include <linux/skbuff.h>
  42 #include <linux/netdevice.h>
  43 #include <linux/wireless.h>
  44 #include <linux/firmware.h>
  45 #include <linux/etherdevice.h>
  46 #include <linux/if_arp.h>
  47
  48 #include <net/mac80211.h>
  49
  50 #include <asm/div64.h>
  51
  52 #define DRV_NAME        "iwlagn"
  53
  54 #include "iwl-eeprom.h"
  55 #include "iwl-dev.h"
  56 #include "iwl-core.h"
  57 #include "iwl-io.h"
  58 #include "iwl-helpers.h"
  59 #include "iwl-sta.h"
  60 #include "iwl-calib.h"
  61 #include "iwl-agn.h"
  62
  63
  64 /******************************************************************************
  65  *
  66  * module boiler plate
  67  *
  68  ******************************************************************************/
  69
  70 /*
  71  * module name, copyright, version, etc.
  72  */
  73 #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link AGN driver for Linux"
  74
  75 #ifdef CONFIG_IWLWIFI_DEBUG
  76 #define VD "d"
  77 #else
  78 #define VD
  79 #endif
  80
  81 #define DRV_VERSION     IWLWIFI_VERSION VD
  82
  83
  84 MODULE_DESCRIPTION(DRV_DESCRIPTION);
  85 MODULE_VERSION(DRV_VERSION);
  86 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
  87 MODULE_LICENSE("GPL");
  88 MODULE_ALIAS("iwl4965");
  89
  90 static int iwlagn_ant_coupling;
  91
  92 /**
  93  * iwl_commit_rxon - commit staging_rxon to hardware
  94  *
  95  * The RXON command in staging_rxon is committed to the hardware and
  96  * the active_rxon structure is updated with the new data.  This
  97  * function correctly transitions out of the RXON_ASSOC_MSK state if
  98  * a HW tune is required based on the RXON structure changes.
  99  */
 100 int iwl_commit_rxon(struct iwl_priv *priv)
 101 {
 102         /* cast away the const for active_rxon in this function */
 103         struct iwl_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
 104         int ret;
 105         bool new_assoc =
 106                 !!(priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK);
 107
 108         if (!iwl_is_alive(priv))
 109                 return -EBUSY;
 110
 111         /* always get timestamp with Rx frame */
 112         priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
 113
 114         ret = iwl_check_rxon_cmd(priv);
 115         if (ret) {
 116                 IWL_ERR(priv, "Invalid RXON configuration.  Not committing.\n");
 117                 return -EINVAL;
 118         }
 119
 120         /*
 121          * receive commit_rxon request
 122          * abort any previous channel switch if still in process
 123          */
 124         if (priv->switch_rxon.switch_in_progress &&
 125             (priv->switch_rxon.channel != priv->staging_rxon.channel)) {
 126                 IWL_DEBUG_11H(priv, "abort channel switch on %d\n",
 127                       le16_to_cpu(priv->switch_rxon.channel));
 128                 iwl_chswitch_done(priv, false);
 129         }
 130
 131         /* If we don't need to send a full RXON, we can use
 132          * iwl_rxon_assoc_cmd which is used to reconfigure filter
 133          * and other flags for the current radio configuration. */
 134         if (!iwl_full_rxon_required(priv)) {
 135                 ret = iwl_send_rxon_assoc(priv);
 136                 if (ret) {
 137                         IWL_ERR(priv, "Error setting RXON_ASSOC (%d)\n", ret);
 138                         return ret;
 139                 }
 140
 141                 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
 142                 iwl_print_rx_config_cmd(priv);
 143                 return 0;
 144         }
 145
 146         /* If we are currently associated and the new config requires
 147          * an RXON_ASSOC and the new config wants the associated mask enabled,
 148          * we must clear the associated from the active configuration
 149          * before we apply the new config */
 150         if (iwl_is_associated(priv) && new_assoc) {
 151                 IWL_DEBUG_INFO(priv, "Toggling associated bit on current RXON\n");
 152                 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
 153
 154                 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
 155                                       sizeof(struct iwl_rxon_cmd),
 156                                       &priv->active_rxon);
 157
 158                 /* If the mask clearing failed then we set
 159                  * active_rxon back to what it was previously */
 160                 if (ret) {
 161                         active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
 162                         IWL_ERR(priv, "Error clearing ASSOC_MSK (%d)\n", ret);
 163                         return ret;
 164                 }
 165                 iwl_clear_ucode_stations(priv);
 166                 iwl_restore_stations(priv);
 167                 ret = iwl_restore_default_wep_keys(priv);
 168                 if (ret) {
 169                         IWL_ERR(priv, "Failed to restore WEP keys (%d)\n", ret);
 170                         return ret;
 171                 }
 172         }
 173
 174         IWL_DEBUG_INFO(priv, "Sending RXON\n"
 175                        "* with%s RXON_FILTER_ASSOC_MSK\n"
 176                        "* channel = %d\n"
 177                        "* bssid = %pM\n",
 178                        (new_assoc ? "" : "out"),
 179                        le16_to_cpu(priv->staging_rxon.channel),
 180                        priv->staging_rxon.bssid_addr);
 181
 182         iwl_set_rxon_hwcrypto(priv, !priv->cfg->mod_params->sw_crypto);
 183
 184         /* Apply the new configuration
 185          * RXON unassoc clears the station table in uCode so restoration of
 186          * stations is needed after it (the RXON command) completes
 187          */
 188         if (!new_assoc) {
 189                 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
 190                               sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
 191                 if (ret) {
 192                         IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
 193                         return ret;
 194                 }
 195                 IWL_DEBUG_INFO(priv, "Return from !new_assoc RXON.\n");
 196                 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
 197                 iwl_clear_ucode_stations(priv);
 198                 iwl_restore_stations(priv);
 199                 ret = iwl_restore_default_wep_keys(priv);
 200                 if (ret) {
 201                         IWL_ERR(priv, "Failed to restore WEP keys (%d)\n", ret);
 202                         return ret;
 203                 }
 204         }
 205
 206         priv->start_calib = 0;
 207         if (new_assoc) {
 208                 /* Apply the new configuration
 209                  * RXON assoc doesn't clear the station table in uCode,
 210                  */
 211                 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
 212                               sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
 213                 if (ret) {
 214                         IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
 215                         return ret;
 216                 }
 217                 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
 218         }
 219         iwl_print_rx_config_cmd(priv);
 220
 221         iwl_init_sensitivity(priv);
 222
 223         /* If we issue a new RXON command which required a tune then we must
 224          * send a new TXPOWER command or we won't be able to Tx any frames */
 225         ret = iwl_set_tx_power(priv, priv->tx_power_user_lmt, true);
 226         if (ret) {
 227                 IWL_ERR(priv, "Error sending TX power (%d)\n", ret);
 228                 return ret;
 229         }
 230
 231         return 0;
 232 }
 233
 234 void iwl_update_chain_flags(struct iwl_priv *priv)
 235 {
 236
 237         if (priv->cfg->ops->hcmd->set_rxon_chain)
 238                 priv->cfg->ops->hcmd->set_rxon_chain(priv);
 239         iwlcore_commit_rxon(priv);
 240 }
 241
 242 static void iwl_clear_free_frames(struct iwl_priv *priv)
 243 {
 244         struct list_head *element;
 245
 246         IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
 247                        priv->frames_count);
 248
 249         while (!list_empty(&priv->free_frames)) {
 250                 element = priv->free_frames.next;
 251                 list_del(element);
 252                 kfree(list_entry(element, struct iwl_frame, list));
 253                 priv->frames_count--;
 254         }
 255
 256         if (priv->frames_count) {
 257                 IWL_WARN(priv, "%d frames still in use.  Did we lose one?\n",
 258                             priv->frames_count);
 259                 priv->frames_count = 0;
 260         }
 261 }
 262
 263 static struct iwl_frame *iwl_get_free_frame(struct iwl_priv *priv)
 264 {
 265         struct iwl_frame *frame;
 266         struct list_head *element;
 267         if (list_empty(&priv->free_frames)) {
 268                 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
 269                 if (!frame) {
 270                         IWL_ERR(priv, "Could not allocate frame!\n");
 271                         return NULL;
 272                 }
 273
 274                 priv->frames_count++;
 275                 return frame;
 276         }
 277
 278         element = priv->free_frames.next;
 279         list_del(element);
 280         return list_entry(element, struct iwl_frame, list);
 281 }
 282
 283 static void iwl_free_frame(struct iwl_priv *priv, struct iwl_frame *frame)
 284 {
 285         memset(frame, 0, sizeof(*frame));
 286         list_add(&frame->list, &priv->free_frames);
 287 }
 288
 289 static u32 iwl_fill_beacon_frame(struct iwl_priv *priv,
 290                                           struct ieee80211_hdr *hdr,
 291                                           int left)
 292 {
 293         if (!priv->ibss_beacon)
 294                 return 0;
 295
 296         if (priv->ibss_beacon->len > left)
 297                 return 0;
 298
 299         memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
 300
 301         return priv->ibss_beacon->len;
 302 }
 303
 304 /* Parse the beacon frame to find the TIM element and set tim_idx & tim_size */
 305 static void iwl_set_beacon_tim(struct iwl_priv *priv,
 306                 struct iwl_tx_beacon_cmd *tx_beacon_cmd,
 307                 u8 *beacon, u32 frame_size)
 308 {
 309         u16 tim_idx;
 310         struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)beacon;
 311
 312         /*
 313          * The index is relative to frame start but we start looking at the
 314          * variable-length part of the beacon.
 315          */
 316         tim_idx = mgmt->u.beacon.variable - beacon;
 317
 318         /* Parse variable-length elements of beacon to find WLAN_EID_TIM */
 319         while ((tim_idx < (frame_size - 2)) &&
 320                         (beacon[tim_idx] != WLAN_EID_TIM))
 321                 tim_idx += beacon[tim_idx+1] + 2;
 322
 323         /* If TIM field was found, set variables */
 324         if ((tim_idx < (frame_size - 1)) && (beacon[tim_idx] == WLAN_EID_TIM)) {
 325                 tx_beacon_cmd->tim_idx = cpu_to_le16(tim_idx);
 326                 tx_beacon_cmd->tim_size = beacon[tim_idx+1];
 327         } else
 328                 IWL_WARN(priv, "Unable to find TIM Element in beacon\n");
 329 }
 330
 331 static unsigned int iwl_hw_get_beacon_cmd(struct iwl_priv *priv,
 332                                        struct iwl_frame *frame)
 333 {
 334         struct iwl_tx_beacon_cmd *tx_beacon_cmd;
 335         u32 frame_size;
 336         u32 rate_flags;
 337         u32 rate;
 338         /*
 339          * We have to set up the TX command, the TX Beacon command, and the
 340          * beacon contents.
 341          */
 342
 343         /* Initialize memory */
 344         tx_beacon_cmd = &frame->u.beacon;
 345         memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
 346
 347         /* Set up TX beacon contents */
 348         frame_size = iwl_fill_beacon_frame(priv, tx_beacon_cmd->frame,
 349                                 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
 350         if (WARN_ON_ONCE(frame_size > MAX_MPDU_SIZE))
 351                 return 0;
 352
 353         /* Set up TX command fields */
 354         tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
 355         tx_beacon_cmd->tx.sta_id = priv->hw_params.bcast_sta_id;
 356         tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
 357         tx_beacon_cmd->tx.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK |
 358                 TX_CMD_FLG_TSF_MSK | TX_CMD_FLG_STA_RATE_MSK;
 359
 360         /* Set up TX beacon command fields */
 361         iwl_set_beacon_tim(priv, tx_beacon_cmd, (u8 *)tx_beacon_cmd->frame,
 362                         frame_size);
 363
 364         /* Set up packet rate and flags */
 365         rate = iwl_rate_get_lowest_plcp(priv);
 366         priv->mgmt_tx_ant = iwl_toggle_tx_ant(priv, priv->mgmt_tx_ant,
 367                                               priv->hw_params.valid_tx_ant);
 368         rate_flags = iwl_ant_idx_to_flags(priv->mgmt_tx_ant);
 369         if ((rate >= IWL_FIRST_CCK_RATE) && (rate <= IWL_LAST_CCK_RATE))
 370                 rate_flags |= RATE_MCS_CCK_MSK;
 371         tx_beacon_cmd->tx.rate_n_flags = iwl_hw_set_rate_n_flags(rate,
 372                         rate_flags);
 373
 374         return sizeof(*tx_beacon_cmd) + frame_size;
 375 }
 376 static int iwl_send_beacon_cmd(struct iwl_priv *priv)
 377 {
 378         struct iwl_frame *frame;
 379         unsigned int frame_size;
 380         int rc;
 381
 382         frame = iwl_get_free_frame(priv);
 383         if (!frame) {
 384                 IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
 385                           "command.\n");
 386                 return -ENOMEM;
 387         }
 388
 389         frame_size = iwl_hw_get_beacon_cmd(priv, frame);
 390         if (!frame_size) {
 391                 IWL_ERR(priv, "Error configuring the beacon command\n");
 392                 iwl_free_frame(priv, frame);
 393                 return -EINVAL;
 394         }
 395
 396         rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
 397                               &frame->u.cmd[0]);
 398
 399         iwl_free_frame(priv, frame);
 400
 401         return rc;
 402 }
 403
 404 static inline dma_addr_t iwl_tfd_tb_get_addr(struct iwl_tfd *tfd, u8 idx)
 405 {
 406         struct iwl_tfd_tb *tb = &tfd->tbs[idx];
 407
 408         dma_addr_t addr = get_unaligned_le32(&tb->lo);
 409         if (sizeof(dma_addr_t) > sizeof(u32))
 410                 addr |=
 411                 ((dma_addr_t)(le16_to_cpu(tb->hi_n_len) & 0xF) << 16) << 16;
 412
 413         return addr;
 414 }
 415
 416 static inline u16 iwl_tfd_tb_get_len(struct iwl_tfd *tfd, u8 idx)
 417 {
 418         struct iwl_tfd_tb *tb = &tfd->tbs[idx];
 419
 420         return le16_to_cpu(tb->hi_n_len) >> 4;
 421 }
 422
 423 static inline void iwl_tfd_set_tb(struct iwl_tfd *tfd, u8 idx,
 424                                   dma_addr_t addr, u16 len)
 425 {
 426         struct iwl_tfd_tb *tb = &tfd->tbs[idx];
 427         u16 hi_n_len = len << 4;
 428
 429         put_unaligned_le32(addr, &tb->lo);
 430         if (sizeof(dma_addr_t) > sizeof(u32))
 431                 hi_n_len |= ((addr >> 16) >> 16) & 0xF;
 432
 433         tb->hi_n_len = cpu_to_le16(hi_n_len);
 434
 435         tfd->num_tbs = idx + 1;
 436 }
 437
 438 static inline u8 iwl_tfd_get_num_tbs(struct iwl_tfd *tfd)
 439 {
 440         return tfd->num_tbs & 0x1f;
 441 }
 442
 443 /**
 444  * iwl_hw_txq_free_tfd - Free all chunks referenced by TFD [txq->q.read_ptr]
 445  * @priv - driver private data
 446  * @txq - tx queue
 447  *
 448  * Does NOT advance any TFD circular buffer read/write indexes
 449  * Does NOT free the TFD itself (which is within circular buffer)
 450  */
 451 void iwl_hw_txq_free_tfd(struct iwl_priv *priv, struct iwl_tx_queue *txq)
 452 {
 453         struct iwl_tfd *tfd_tmp = (struct iwl_tfd *)txq->tfds;
 454         struct iwl_tfd *tfd;
 455         struct pci_dev *dev = priv->pci_dev;
 456         int index = txq->q.read_ptr;
 457         int i;
 458         int num_tbs;
 459
 460         tfd = &tfd_tmp[index];
 461
 462         /* Sanity check on number of chunks */
 463         num_tbs = iwl_tfd_get_num_tbs(tfd);
 464
 465         if (num_tbs >= IWL_NUM_OF_TBS) {
 466                 IWL_ERR(priv, "Too many chunks: %i\n", num_tbs);
 467                 /* @todo issue fatal error, it is quite serious situation */
 468                 return;
 469         }
 470
 471         /* Unmap tx_cmd */
 472         if (num_tbs)
 473                 pci_unmap_single(dev,
 474                                 dma_unmap_addr(&txq->meta[index], mapping),
 475                                 dma_unmap_len(&txq->meta[index], len),
 476                                 PCI_DMA_BIDIRECTIONAL);
 477
 478         /* Unmap chunks, if any. */
 479         for (i = 1; i < num_tbs; i++)
 480                 pci_unmap_single(dev, iwl_tfd_tb_get_addr(tfd, i),
 481                                 iwl_tfd_tb_get_len(tfd, i), PCI_DMA_TODEVICE);
 482
 483         /* free SKB */
 484         if (txq->txb) {
 485                 struct sk_buff *skb;
 486
 487                 skb = txq->txb[txq->q.read_ptr].skb;
 488
 489                 /* can be called from irqs-disabled context */
 490                 if (skb) {
 491                         dev_kfree_skb_any(skb);
 492                         txq->txb[txq->q.read_ptr].skb = NULL;
 493                 }
 494         }
 495 }
 496
 497 int iwl_hw_txq_attach_buf_to_tfd(struct iwl_priv *priv,
 498                                  struct iwl_tx_queue *txq,
 499                                  dma_addr_t addr, u16 len,
 500                                  u8 reset, u8 pad)
 501 {
 502         struct iwl_queue *q;
 503         struct iwl_tfd *tfd, *tfd_tmp;
 504         u32 num_tbs;
 505
 506         q = &txq->q;
 507         tfd_tmp = (struct iwl_tfd *)txq->tfds;
 508         tfd = &tfd_tmp[q->write_ptr];
 509
 510         if (reset)
 511                 memset(tfd, 0, sizeof(*tfd));
 512
 513         num_tbs = iwl_tfd_get_num_tbs(tfd);
 514
 515         /* Each TFD can point to a maximum 20 Tx buffers */
 516         if (num_tbs >= IWL_NUM_OF_TBS) {
 517                 IWL_ERR(priv, "Error can not send more than %d chunks\n",
 518                           IWL_NUM_OF_TBS);
 519                 return -EINVAL;
 520         }
 521
 522         BUG_ON(addr & ~DMA_BIT_MASK(36));
 523         if (unlikely(addr & ~IWL_TX_DMA_MASK))
 524                 IWL_ERR(priv, "Unaligned address = %llx\n",
 525                           (unsigned long long)addr);
 526
 527         iwl_tfd_set_tb(tfd, num_tbs, addr, len);
 528
 529         return 0;
 530 }
 531
 532 /*
 533  * Tell nic where to find circular buffer of Tx Frame Descriptors for
 534  * given Tx queue, and enable the DMA channel used for that queue.
 535  *
 536  * 4965 supports up to 16 Tx queues in DRAM, mapped to up to 8 Tx DMA
 537  * channels supported in hardware.
 538  */
 539 int iwl_hw_tx_queue_init(struct iwl_priv *priv,
 540                          struct iwl_tx_queue *txq)
 541 {
 542         int txq_id = txq->q.id;
 543
 544         /* Circular buffer (TFD queue in DRAM) physical base address */
 545         iwl_write_direct32(priv, FH_MEM_CBBC_QUEUE(txq_id),
 546                              txq->q.dma_addr >> 8);
 547
 548         return 0;
 549 }
 550
 551 /******************************************************************************
 552  *
 553  * Generic RX handler implementations
 554  *
 555  ******************************************************************************/
 556 static void iwl_rx_reply_alive(struct iwl_priv *priv,
 557                                 struct iwl_rx_mem_buffer *rxb)
 558 {
 559         struct iwl_rx_packet *pkt = rxb_addr(rxb);
 560         struct iwl_alive_resp *palive;
 561         struct delayed_work *pwork;
 562
 563         palive = &pkt->u.alive_frame;
 564
 565         IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
 566                        "0x%01X 0x%01X\n",
 567                        palive->is_valid, palive->ver_type,
 568                        palive->ver_subtype);
 569
 570         if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
 571                 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
 572                 memcpy(&priv->card_alive_init,
 573                        &pkt->u.alive_frame,
 574                        sizeof(struct iwl_init_alive_resp));
 575                 pwork = &priv->init_alive_start;
 576         } else {
 577                 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
 578                 memcpy(&priv->card_alive, &pkt->u.alive_frame,
 579                        sizeof(struct iwl_alive_resp));
 580                 pwork = &priv->alive_start;
 581         }
 582
 583         /* We delay the ALIVE response by 5ms to
 584          * give the HW RF Kill time to activate... */
 585         if (palive->is_valid == UCODE_VALID_OK)
 586                 queue_delayed_work(priv->workqueue, pwork,
 587                                    msecs_to_jiffies(5));
 588         else
 589                 IWL_WARN(priv, "uCode did not respond OK.\n");
 590 }
 591
 592 static void iwl_bg_beacon_update(struct work_struct *work)
 593 {
 594         struct iwl_priv *priv =
 595                 container_of(work, struct iwl_priv, beacon_update);
 596         struct sk_buff *beacon;
 597
 598         /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
 599         beacon = ieee80211_beacon_get(priv->hw, priv->vif);
 600
 601         if (!beacon) {
 602                 IWL_ERR(priv, "update beacon failed\n");
 603                 return;
 604         }
 605
 606         mutex_lock(&priv->mutex);
 607         /* new beacon skb is allocated every time; dispose previous.*/
 608         if (priv->ibss_beacon)
 609                 dev_kfree_skb(priv->ibss_beacon);
 610
 611         priv->ibss_beacon = beacon;
 612         mutex_unlock(&priv->mutex);
 613
 614         iwl_send_beacon_cmd(priv);
 615 }
 616
 617 static void iwl_bg_bt_runtime_config(struct work_struct *work)
 618 {
 619         struct iwl_priv *priv =
 620                 container_of(work, struct iwl_priv, bt_runtime_config);
 621
 622         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
 623                 return;
 624
 625         /* dont send host command if rf-kill is on */
 626         if (!iwl_is_ready_rf(priv))
 627                 return;
 628         priv->cfg->ops->hcmd->send_bt_config(priv);
 629 }
 630
 631 static void iwl_bg_bt_full_concurrency(struct work_struct *work)
 632 {
 633         struct iwl_priv *priv =
 634                 container_of(work, struct iwl_priv, bt_full_concurrency);
 635
 636         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
 637                 return;
 638
 639         /* dont send host command if rf-kill is on */
 640         if (!iwl_is_ready_rf(priv))
 641                 return;
 642
 643         IWL_DEBUG_INFO(priv, "BT coex in %s mode\n",
 644                        priv->bt_full_concurrent ?
 645                        "full concurrency" : "3-wire");
 646
 647         /*
 648          * LQ & RXON updated cmds must be sent before BT Config cmd
 649          * to avoid 3-wire collisions
 650          */
 651         if (priv->cfg->ops->hcmd->set_rxon_chain)
 652                 priv->cfg->ops->hcmd->set_rxon_chain(priv);
 653         iwlcore_commit_rxon(priv);
 654
 655         priv->cfg->ops->hcmd->send_bt_config(priv);
 656 }
 657
 658 /**
 659  * iwl_bg_statistics_periodic - Timer callback to queue statistics
 660  *
 661  * This callback is provided in order to send a statistics request.
 662  *
 663  * This timer function is continually reset to execute within
 664  * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION
 665  * was received.  We need to ensure we receive the statistics in order
 666  * to update the temperature used for calibrating the TXPOWER.
 667  */
 668 static void iwl_bg_statistics_periodic(unsigned long data)
 669 {
 670         struct iwl_priv *priv = (struct iwl_priv *)data;
 671
 672         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
 673                 return;
 674
 675         /* dont send host command if rf-kill is on */
 676         if (!iwl_is_ready_rf(priv))
 677                 return;
 678
 679         iwl_send_statistics_request(priv, CMD_ASYNC, false);
 680 }
 681
 682
 683 static void iwl_print_cont_event_trace(struct iwl_priv *priv, u32 base,
 684                                         u32 start_idx, u32 num_events,
 685                                         u32 mode)
 686 {
 687         u32 i;
 688         u32 ptr;        /* SRAM byte address of log data */
 689         u32 ev, time, data; /* event log data */
 690         unsigned long reg_flags;
 691
 692         if (mode == 0)
 693                 ptr = base + (4 * sizeof(u32)) + (start_idx * 2 * sizeof(u32));
 694         else
 695                 ptr = base + (4 * sizeof(u32)) + (start_idx * 3 * sizeof(u32));
 696
 697         /* Make sure device is powered up for SRAM reads */
 698         spin_lock_irqsave(&priv->reg_lock, reg_flags);
 699         if (iwl_grab_nic_access(priv)) {
 700                 spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
 701                 return;
 702         }
 703
 704         /* Set starting address; reads will auto-increment */
 705         _iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, ptr);
 706         rmb();
 707
 708         /*
 709          * "time" is actually "data" for mode 0 (no timestamp).
 710          * place event id # at far right for easier visual parsing.
 711          */
 712         for (i = 0; i < num_events; i++) {
 713                 ev = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
 714                 time = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
 715                 if (mode == 0) {
 716                         trace_iwlwifi_dev_ucode_cont_event(priv,
 717                                                         0, time, ev);
 718                 } else {
 719                         data = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
 720                         trace_iwlwifi_dev_ucode_cont_event(priv,
 721                                                 time, data, ev);
 722                 }
 723         }
 724         /* Allow device to power down */
 725         iwl_release_nic_access(priv);
 726         spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
 727 }
 728
 729 static void iwl_continuous_event_trace(struct iwl_priv *priv)
 730 {
 731         u32 capacity;   /* event log capacity in # entries */
 732         u32 base;       /* SRAM byte address of event log header */
 733         u32 mode;       /* 0 - no timestamp, 1 - timestamp recorded */
 734         u32 num_wraps;  /* # times uCode wrapped to top of log */
 735         u32 next_entry; /* index of next entry to be written by uCode */
 736
 737         if (priv->ucode_type == UCODE_INIT)
 738                 base = le32_to_cpu(priv->card_alive_init.error_event_table_ptr);
 739         else
 740                 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
 741         if (priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
 742                 capacity = iwl_read_targ_mem(priv, base);
 743                 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
 744                 mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
 745                 next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
 746         } else
 747                 return;
 748
 749         if (num_wraps == priv->event_log.num_wraps) {
 750                 iwl_print_cont_event_trace(priv,
 751                                        base, priv->event_log.next_entry,
 752                                        next_entry - priv->event_log.next_entry,
 753                                        mode);
 754                 priv->event_log.non_wraps_count++;
 755         } else {
 756                 if ((num_wraps - priv->event_log.num_wraps) > 1)
 757                         priv->event_log.wraps_more_count++;
 758                 else
 759                         priv->event_log.wraps_once_count++;
 760                 trace_iwlwifi_dev_ucode_wrap_event(priv,
 761                                 num_wraps - priv->event_log.num_wraps,
 762                                 next_entry, priv->event_log.next_entry);
 763                 if (next_entry < priv->event_log.next_entry) {
 764                         iwl_print_cont_event_trace(priv, base,
 765                                priv->event_log.next_entry,
 766                                capacity - priv->event_log.next_entry,
 767                                mode);
 768
 769                         iwl_print_cont_event_trace(priv, base, 0,
 770                                 next_entry, mode);
 771                 } else {
 772                         iwl_print_cont_event_trace(priv, base,
 773                                next_entry, capacity - next_entry,
 774                                mode);
 775
 776                         iwl_print_cont_event_trace(priv, base, 0,
 777                                 next_entry, mode);
 778                 }
 779         }
 780         priv->event_log.num_wraps = num_wraps;
 781         priv->event_log.next_entry = next_entry;
 782 }
 783
 784 /**
 785  * iwl_bg_ucode_trace - Timer callback to log ucode event
 786  *
 787  * The timer is continually set to execute every
 788  * UCODE_TRACE_PERIOD milliseconds after the last timer expired
 789  * this function is to perform continuous uCode event logging operation
 790  * if enabled
 791  */
 792 static void iwl_bg_ucode_trace(unsigned long data)
 793 {
 794         struct iwl_priv *priv = (struct iwl_priv *)data;
 795
 796         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
 797                 return;
 798
 799         if (priv->event_log.ucode_trace) {
 800                 iwl_continuous_event_trace(priv);
 801                 /* Reschedule the timer to occur in UCODE_TRACE_PERIOD */
 802                 mod_timer(&priv->ucode_trace,
 803                          jiffies + msecs_to_jiffies(UCODE_TRACE_PERIOD));
 804         }
 805 }
 806
 807 static void iwl_rx_beacon_notif(struct iwl_priv *priv,
 808                                 struct iwl_rx_mem_buffer *rxb)
 809 {
 810         struct iwl_rx_packet *pkt = rxb_addr(rxb);
 811         struct iwl4965_beacon_notif *beacon =
 812                 (struct iwl4965_beacon_notif *)pkt->u.raw;
 813 #ifdef CONFIG_IWLWIFI_DEBUG
 814         u8 rate = iwl_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
 815
 816         IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d "
 817                 "tsf %d %d rate %d\n",
 818                 le32_to_cpu(beacon->beacon_notify_hdr.u.status) & TX_STATUS_MSK,
 819                 beacon->beacon_notify_hdr.failure_frame,
 820                 le32_to_cpu(beacon->ibss_mgr_status),
 821                 le32_to_cpu(beacon->high_tsf),
 822                 le32_to_cpu(beacon->low_tsf), rate);
 823 #endif
 824
 825         priv->ibss_manager = le32_to_cpu(beacon->ibss_mgr_status);
 826
 827         if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
 828             (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
 829                 queue_work(priv->workqueue, &priv->beacon_update);
 830 }
 831
 832 /* Handle notification from uCode that card's power state is changing
 833  * due to software, hardware, or critical temperature RFKILL */
 834 static void iwl_rx_card_state_notif(struct iwl_priv *priv,
 835                                     struct iwl_rx_mem_buffer *rxb)
 836 {
 837         struct iwl_rx_packet *pkt = rxb_addr(rxb);
 838         u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
 839         unsigned long status = priv->status;
 840
 841         IWL_DEBUG_RF_KILL(priv, "Card state received: HW:%s SW:%s CT:%s\n",
 842                           (flags & HW_CARD_DISABLED) ? "Kill" : "On",
 843                           (flags & SW_CARD_DISABLED) ? "Kill" : "On",
 844                           (flags & CT_CARD_DISABLED) ?
 845                           "Reached" : "Not reached");
 846
 847         if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
 848                      CT_CARD_DISABLED)) {
 849
 850                 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
 851                             CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
 852
 853                 iwl_write_direct32(priv, HBUS_TARG_MBX_C,
 854                                         HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
 855
 856                 if (!(flags & RXON_CARD_DISABLED)) {
 857                         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
 858                                     CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
 859                         iwl_write_direct32(priv, HBUS_TARG_MBX_C,
 860                                         HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
 861                 }
 862                 if (flags & CT_CARD_DISABLED)
 863                         iwl_tt_enter_ct_kill(priv);
 864         }
 865         if (!(flags & CT_CARD_DISABLED))
 866                 iwl_tt_exit_ct_kill(priv);
 867
 868         if (flags & HW_CARD_DISABLED)
 869                 set_bit(STATUS_RF_KILL_HW, &priv->status);
 870         else
 871                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
 872
 873
 874         if (!(flags & RXON_CARD_DISABLED))
 875                 iwl_scan_cancel(priv);
 876
 877         if ((test_bit(STATUS_RF_KILL_HW, &status) !=
 878              test_bit(STATUS_RF_KILL_HW, &priv->status)))
 879                 wiphy_rfkill_set_hw_state(priv->hw->wiphy,
 880                         test_bit(STATUS_RF_KILL_HW, &priv->status));
 881         else
 882                 wake_up_interruptible(&priv->wait_command_queue);
 883 }
 884
 885 int iwl_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src)
 886 {
 887         if (src == IWL_PWR_SRC_VAUX) {
 888                 if (pci_pme_capable(priv->pci_dev, PCI_D3cold))
 889                         iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
 890                                                APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
 891                                                ~APMG_PS_CTRL_MSK_PWR_SRC);
 892         } else {
 893                 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
 894                                        APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
 895                                        ~APMG_PS_CTRL_MSK_PWR_SRC);
 896         }
 897
 898         return 0;
 899 }
 900
 901 static void iwl_bg_tx_flush(struct work_struct *work)
 902 {
 903         struct iwl_priv *priv =
 904                 container_of(work, struct iwl_priv, tx_flush);
 905
 906         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
 907                 return;
 908
 909         /* do nothing if rf-kill is on */
 910         if (!iwl_is_ready_rf(priv))
 911                 return;
 912
 913         if (priv->cfg->ops->lib->txfifo_flush) {
 914                 IWL_DEBUG_INFO(priv, "device request: flush all tx frames\n");
 915                 iwlagn_dev_txfifo_flush(priv, IWL_DROP_ALL);
 916         }
 917 }
 918
 919 /**
 920  * iwl_setup_rx_handlers - Initialize Rx handler callbacks
 921  *
 922  * Setup the RX handlers for each of the reply types sent from the uCode
 923  * to the host.
 924  *
 925  * This function chains into the hardware specific files for them to setup
 926  * any hardware specific handlers as well.
 927  */
 928 static void iwl_setup_rx_handlers(struct iwl_priv *priv)
 929 {
 930         priv->rx_handlers[REPLY_ALIVE] = iwl_rx_reply_alive;
 931         priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
 932         priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
 933         priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
 934                         iwl_rx_spectrum_measure_notif;
 935         priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
 936         priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
 937             iwl_rx_pm_debug_statistics_notif;
 938         priv->rx_handlers[BEACON_NOTIFICATION] = iwl_rx_beacon_notif;
 939
 940         /*
 941          * The same handler is used for both the REPLY to a discrete
 942          * statistics request from the host as well as for the periodic
 943          * statistics notifications (after received beacons) from the uCode.
 944          */
 945         priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl_reply_statistics;
 946         priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl_rx_statistics;
 947
 948         iwl_setup_rx_scan_handlers(priv);
 949
 950         /* status change handler */
 951         priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl_rx_card_state_notif;
 952
 953         priv->rx_handlers[MISSED_BEACONS_NOTIFICATION] =
 954             iwl_rx_missed_beacon_notif;
 955         /* Rx handlers */
 956         priv->rx_handlers[REPLY_RX_PHY_CMD] = iwlagn_rx_reply_rx_phy;
 957         priv->rx_handlers[REPLY_RX_MPDU_CMD] = iwlagn_rx_reply_rx;
 958         /* block ack */
 959         priv->rx_handlers[REPLY_COMPRESSED_BA] = iwlagn_rx_reply_compressed_ba;
 960         /* Set up hardware specific Rx handlers */
 961         priv->cfg->ops->lib->rx_handler_setup(priv);
 962 }
 963
 964 /**
 965  * iwl_rx_handle - Main entry function for receiving responses from uCode
 966  *
 967  * Uses the priv->rx_handlers callback function array to invoke
 968  * the appropriate handlers, including command responses,
 969  * frame-received notifications, and other notifications.
 970  */
 971 void iwl_rx_handle(struct iwl_priv *priv)
 972 {
 973         struct iwl_rx_mem_buffer *rxb;
 974         struct iwl_rx_packet *pkt;
 975         struct iwl_rx_queue *rxq = &priv->rxq;
 976         u32 r, i;
 977         int reclaim;
 978         unsigned long flags;
 979         u8 fill_rx = 0;
 980         u32 count = 8;
 981         int total_empty;
 982
 983         /* uCode's read index (stored in shared DRAM) indicates the last Rx
 984          * buffer that the driver may process (last buffer filled by ucode). */
 985         r = le16_to_cpu(rxq->rb_stts->closed_rb_num) &  0x0FFF;
 986         i = rxq->read;
 987
 988         /* Rx interrupt, but nothing sent from uCode */
 989         if (i == r)
 990                 IWL_DEBUG_RX(priv, "r = %d, i = %d\n", r, i);
 991
 992         /* calculate total frames need to be restock after handling RX */
 993         total_empty = r - rxq->write_actual;
 994         if (total_empty < 0)
 995                 total_empty += RX_QUEUE_SIZE;
 996
 997         if (total_empty > (RX_QUEUE_SIZE / 2))
 998                 fill_rx = 1;
 999
1000         while (i != r) {
1001                 int len;
1002
1003                 rxb = rxq->queue[i];
1004
1005                 /* If an RXB doesn't have a Rx queue slot associated with it,
1006                  * then a bug has been introduced in the queue refilling
1007                  * routines -- catch it here */
1008                 BUG_ON(rxb == NULL);
1009
1010                 rxq->queue[i] = NULL;
1011
1012                 pci_unmap_page(priv->pci_dev, rxb->page_dma,
1013                                PAGE_SIZE << priv->hw_params.rx_page_order,
1014                                PCI_DMA_FROMDEVICE);
1015                 pkt = rxb_addr(rxb);
1016
1017                 len = le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK;
1018                 len += sizeof(u32); /* account for status word */
1019                 trace_iwlwifi_dev_rx(priv, pkt, len);
1020
1021                 /* Reclaim a command buffer only if this packet is a response
1022                  *   to a (driver-originated) command.
1023                  * If the packet (e.g. Rx frame) originated from uCode,
1024                  *   there is no command buffer to reclaim.
1025                  * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
1026                  *   but apparently a few don't get set; catch them here. */
1027                 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
1028                         (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
1029                         (pkt->hdr.cmd != REPLY_RX) &&
1030                         (pkt->hdr.cmd != REPLY_RX_MPDU_CMD) &&
1031                         (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
1032                         (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
1033                         (pkt->hdr.cmd != REPLY_TX);
1034
1035                 /* Based on type of command response or notification,
1036                  *   handle those that need handling via function in
1037                  *   rx_handlers table.  See iwl_setup_rx_handlers() */
1038                 if (priv->rx_handlers[pkt->hdr.cmd]) {
1039                         IWL_DEBUG_RX(priv, "r = %d, i = %d, %s, 0x%02x\n", r,
1040                                 i, get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
1041                         priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
1042                         priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
1043                 } else {
1044                         /* No handling needed */
1045                         IWL_DEBUG_RX(priv,
1046                                 "r %d i %d No handler needed for %s, 0x%02x\n",
1047                                 r, i, get_cmd_string(pkt->hdr.cmd),
1048                                 pkt->hdr.cmd);
1049                 }
1050
1051                 /*
1052                  * XXX: After here, we should always check rxb->page
1053                  * against NULL before touching it or its virtual
1054                  * memory (pkt). Because some rx_handler might have
1055                  * already taken or freed the pages.
1056                  */
1057
1058                 if (reclaim) {
1059                         /* Invoke any callbacks, transfer the buffer to caller,
1060                          * and fire off the (possibly) blocking iwl_send_cmd()
1061                          * as we reclaim the driver command queue */
1062                         if (rxb->page)
1063                                 iwl_tx_cmd_complete(priv, rxb);
1064                         else
1065                                 IWL_WARN(priv, "Claim null rxb?\n");
1066                 }
1067
1068                 /* Reuse the page if possible. For notification packets and
1069                  * SKBs that fail to Rx correctly, add them back into the
1070                  * rx_free list for reuse later. */
1071                 spin_lock_irqsave(&rxq->lock, flags);
1072                 if (rxb->page != NULL) {
1073                         rxb->page_dma = pci_map_page(priv->pci_dev, rxb->page,
1074                                 0, PAGE_SIZE << priv->hw_params.rx_page_order,
1075                                 PCI_DMA_FROMDEVICE);
1076                         list_add_tail(&rxb->list, &rxq->rx_free);
1077                         rxq->free_count++;
1078                 } else
1079                         list_add_tail(&rxb->list, &rxq->rx_used);
1080
1081                 spin_unlock_irqrestore(&rxq->lock, flags);
1082
1083                 i = (i + 1) & RX_QUEUE_MASK;
1084                 /* If there are a lot of unused frames,
1085                  * restock the Rx queue so ucode wont assert. */
1086                 if (fill_rx) {
1087                         count++;
1088                         if (count >= 8) {
1089                                 rxq->read = i;
1090                                 iwlagn_rx_replenish_now(priv);
1091                                 count = 0;
1092                         }
1093                 }
1094         }
1095
1096         /* Backtrack one entry */
1097         rxq->read = i;
1098         if (fill_rx)
1099                 iwlagn_rx_replenish_now(priv);
1100         else
1101                 iwlagn_rx_queue_restock(priv);
1102 }
1103
1104 /* call this function to flush any scheduled tasklet */
1105 static inline void iwl_synchronize_irq(struct iwl_priv *priv)
1106 {
1107         /* wait to make sure we flush pending tasklet*/
1108         synchronize_irq(priv->pci_dev->irq);
1109         tasklet_kill(&priv->irq_tasklet);
1110 }
1111
1112 static void iwl_irq_tasklet_legacy(struct iwl_priv *priv)
1113 {
1114         u32 inta, handled = 0;
1115         u32 inta_fh;
1116         unsigned long flags;
1117         u32 i;
1118 #ifdef CONFIG_IWLWIFI_DEBUG
1119         u32 inta_mask;
1120 #endif
1121
1122         spin_lock_irqsave(&priv->lock, flags);
1123
1124         /* Ack/clear/reset pending uCode interrupts.
1125          * Note:  Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1126          *  and will clear only when CSR_FH_INT_STATUS gets cleared. */
1127         inta = iwl_read32(priv, CSR_INT);
1128         iwl_write32(priv, CSR_INT, inta);
1129
1130         /* Ack/clear/reset pending flow-handler (DMA) interrupts.
1131          * Any new interrupts that happen after this, either while we're
1132          * in this tasklet, or later, will show up in next ISR/tasklet. */
1133         inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1134         iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
1135
1136 #ifdef CONFIG_IWLWIFI_DEBUG
1137         if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
1138                 /* just for debug */
1139                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1140                 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
1141                               inta, inta_mask, inta_fh);
1142         }
1143 #endif
1144
1145         spin_unlock_irqrestore(&priv->lock, flags);
1146
1147         /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
1148          * atomic, make sure that inta covers all the interrupts that
1149          * we've discovered, even if FH interrupt came in just after
1150          * reading CSR_INT. */
1151         if (inta_fh & CSR49_FH_INT_RX_MASK)
1152                 inta |= CSR_INT_BIT_FH_RX;
1153         if (inta_fh & CSR49_FH_INT_TX_MASK)
1154                 inta |= CSR_INT_BIT_FH_TX;
1155
1156         /* Now service all interrupt bits discovered above. */
1157         if (inta & CSR_INT_BIT_HW_ERR) {
1158                 IWL_ERR(priv, "Hardware error detected.  Restarting.\n");
1159
1160                 /* Tell the device to stop sending interrupts */
1161                 iwl_disable_interrupts(priv);
1162
1163                 priv->isr_stats.hw++;
1164                 iwl_irq_handle_error(priv);
1165
1166                 handled |= CSR_INT_BIT_HW_ERR;
1167
1168                 return;
1169         }
1170
1171 #ifdef CONFIG_IWLWIFI_DEBUG
1172         if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1173                 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1174                 if (inta & CSR_INT_BIT_SCD) {
1175                         IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1176                                       "the frame/frames.\n");
1177                         priv->isr_stats.sch++;
1178                 }
1179
1180                 /* Alive notification via Rx interrupt will do the real work */
1181                 if (inta & CSR_INT_BIT_ALIVE) {
1182                         IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1183                         priv->isr_stats.alive++;
1184                 }
1185         }
1186 #endif
1187         /* Safely ignore these bits for debug checks below */
1188         inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1189
1190         /* HW RF KILL switch toggled */
1191         if (inta & CSR_INT_BIT_RF_KILL) {
1192                 int hw_rf_kill = 0;
1193                 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
1194                                 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1195                         hw_rf_kill = 1;
1196
1197                 IWL_WARN(priv, "RF_KILL bit toggled to %s.\n",
1198                                 hw_rf_kill ? "disable radio" : "enable radio");
1199
1200                 priv->isr_stats.rfkill++;
1201
1202                 /* driver only loads ucode once setting the interface up.
1203                  * the driver allows loading the ucode even if the radio
1204                  * is killed. Hence update the killswitch state here. The
1205                  * rfkill handler will care about restarting if needed.
1206                  */
1207                 if (!test_bit(STATUS_ALIVE, &priv->status)) {
1208                         if (hw_rf_kill)
1209                                 set_bit(STATUS_RF_KILL_HW, &priv->status);
1210                         else
1211                                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1212                         wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
1213                 }
1214
1215                 handled |= CSR_INT_BIT_RF_KILL;
1216         }
1217
1218         /* Chip got too hot and stopped itself */
1219         if (inta & CSR_INT_BIT_CT_KILL) {
1220                 IWL_ERR(priv, "Microcode CT kill error detected.\n");
1221                 priv->isr_stats.ctkill++;
1222                 handled |= CSR_INT_BIT_CT_KILL;
1223         }
1224
1225         /* Error detected by uCode */
1226         if (inta & CSR_INT_BIT_SW_ERR) {
1227                 IWL_ERR(priv, "Microcode SW error detected. "
1228                         " Restarting 0x%X.\n", inta);
1229                 priv->isr_stats.sw++;
1230                 priv->isr_stats.sw_err = inta;
1231                 iwl_irq_handle_error(priv);
1232                 handled |= CSR_INT_BIT_SW_ERR;
1233         }
1234
1235         /*
1236          * uCode wakes up after power-down sleep.
1237          * Tell device about any new tx or host commands enqueued,
1238          * and about any Rx buffers made available while asleep.
1239          */
1240         if (inta & CSR_INT_BIT_WAKEUP) {
1241                 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1242                 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1243                 for (i = 0; i < priv->hw_params.max_txq_num; i++)
1244                         iwl_txq_update_write_ptr(priv, &priv->txq[i]);
1245                 priv->isr_stats.wakeup++;
1246                 handled |= CSR_INT_BIT_WAKEUP;
1247         }
1248
1249         /* All uCode command responses, including Tx command responses,
1250          * Rx "responses" (frame-received notification), and other
1251          * notifications from uCode come through here*/
1252         if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1253                 iwl_rx_handle(priv);
1254                 priv->isr_stats.rx++;
1255                 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1256         }
1257
1258         /* This "Tx" DMA channel is used only for loading uCode */
1259         if (inta & CSR_INT_BIT_FH_TX) {
1260                 IWL_DEBUG_ISR(priv, "uCode load interrupt\n");
1261                 priv->isr_stats.tx++;
1262                 handled |= CSR_INT_BIT_FH_TX;
1263                 /* Wake up uCode load routine, now that load is complete */
1264                 priv->ucode_write_complete = 1;
1265                 wake_up_interruptible(&priv->wait_command_queue);
1266         }
1267
1268         if (inta & ~handled) {
1269                 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1270                 priv->isr_stats.unhandled++;
1271         }
1272
1273         if (inta & ~(priv->inta_mask)) {
1274                 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1275                          inta & ~priv->inta_mask);
1276                 IWL_WARN(priv, "   with FH_INT = 0x%08x\n", inta_fh);
1277         }
1278
1279         /* Re-enable all interrupts */
1280         /* only Re-enable if diabled by irq */
1281         if (test_bit(STATUS_INT_ENABLED, &priv->status))
1282                 iwl_enable_interrupts(priv);
1283
1284 #ifdef CONFIG_IWLWIFI_DEBUG
1285         if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1286                 inta = iwl_read32(priv, CSR_INT);
1287                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1288                 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1289                 IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
1290                         "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
1291         }
1292 #endif
1293 }
1294
1295 /* tasklet for iwlagn interrupt */
1296 static void iwl_irq_tasklet(struct iwl_priv *priv)
1297 {
1298         u32 inta = 0;
1299         u32 handled = 0;
1300         unsigned long flags;
1301         u32 i;
1302 #ifdef CONFIG_IWLWIFI_DEBUG
1303         u32 inta_mask;
1304 #endif
1305
1306         spin_lock_irqsave(&priv->lock, flags);
1307
1308         /* Ack/clear/reset pending uCode interrupts.
1309          * Note:  Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1310          */
1311         /* There is a hardware bug in the interrupt mask function that some
1312          * interrupts (i.e. CSR_INT_BIT_SCD) can still be generated even if
1313          * they are disabled in the CSR_INT_MASK register. Furthermore the
1314          * ICT interrupt handling mechanism has another bug that might cause
1315          * these unmasked interrupts fail to be detected. We workaround the
1316          * hardware bugs here by ACKing all the possible interrupts so that
1317          * interrupt coalescing can still be achieved.
1318          */
1319         iwl_write32(priv, CSR_INT, priv->_agn.inta | ~priv->inta_mask);
1320
1321         inta = priv->_agn.inta;
1322
1323 #ifdef CONFIG_IWLWIFI_DEBUG
1324         if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
1325                 /* just for debug */
1326                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1327                 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x\n ",
1328                                 inta, inta_mask);
1329         }
1330 #endif
1331
1332         spin_unlock_irqrestore(&priv->lock, flags);
1333
1334         /* saved interrupt in inta variable now we can reset priv->_agn.inta */
1335         priv->_agn.inta = 0;
1336
1337         /* Now service all interrupt bits discovered above. */
1338         if (inta & CSR_INT_BIT_HW_ERR) {
1339                 IWL_ERR(priv, "Hardware error detected.  Restarting.\n");
1340
1341                 /* Tell the device to stop sending interrupts */
1342                 iwl_disable_interrupts(priv);
1343
1344                 priv->isr_stats.hw++;
1345                 iwl_irq_handle_error(priv);
1346
1347                 handled |= CSR_INT_BIT_HW_ERR;
1348
1349                 return;
1350         }
1351
1352 #ifdef CONFIG_IWLWIFI_DEBUG
1353         if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1354                 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1355                 if (inta & CSR_INT_BIT_SCD) {
1356                         IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1357                                       "the frame/frames.\n");
1358                         priv->isr_stats.sch++;
1359                 }
1360
1361                 /* Alive notification via Rx interrupt will do the real work */
1362                 if (inta & CSR_INT_BIT_ALIVE) {
1363                         IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1364                         priv->isr_stats.alive++;
1365                 }
1366         }
1367 #endif
1368         /* Safely ignore these bits for debug checks below */
1369         inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1370
1371         /* HW RF KILL switch toggled */
1372         if (inta & CSR_INT_BIT_RF_KILL) {
1373                 int hw_rf_kill = 0;
1374                 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
1375                                 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1376                         hw_rf_kill = 1;
1377
1378                 IWL_WARN(priv, "RF_KILL bit toggled to %s.\n",
1379                                 hw_rf_kill ? "disable radio" : "enable radio");
1380
1381                 priv->isr_stats.rfkill++;
1382
1383                 /* driver only loads ucode once setting the interface up.
1384                  * the driver allows loading the ucode even if the radio
1385                  * is killed. Hence update the killswitch state here. The
1386                  * rfkill handler will care about restarting if needed.
1387                  */
1388                 if (!test_bit(STATUS_ALIVE, &priv->status)) {
1389                         if (hw_rf_kill)
1390                                 set_bit(STATUS_RF_KILL_HW, &priv->status);
1391                         else
1392                                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1393                         wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
1394                 }
1395
1396                 handled |= CSR_INT_BIT_RF_KILL;
1397         }
1398
1399         /* Chip got too hot and stopped itself */
1400         if (inta & CSR_INT_BIT_CT_KILL) {
1401                 IWL_ERR(priv, "Microcode CT kill error detected.\n");
1402                 priv->isr_stats.ctkill++;
1403                 handled |= CSR_INT_BIT_CT_KILL;
1404         }
1405
1406         /* Error detected by uCode */
1407         if (inta & CSR_INT_BIT_SW_ERR) {
1408                 IWL_ERR(priv, "Microcode SW error detected. "
1409                         " Restarting 0x%X.\n", inta);
1410                 priv->isr_stats.sw++;
1411                 priv->isr_stats.sw_err = inta;
1412                 iwl_irq_handle_error(priv);
1413                 handled |= CSR_INT_BIT_SW_ERR;
1414         }
1415
1416         /* uCode wakes up after power-down sleep */
1417         if (inta & CSR_INT_BIT_WAKEUP) {
1418                 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1419                 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1420                 for (i = 0; i < priv->hw_params.max_txq_num; i++)
1421                         iwl_txq_update_write_ptr(priv, &priv->txq[i]);
1422
1423                 priv->isr_stats.wakeup++;
1424
1425                 handled |= CSR_INT_BIT_WAKEUP;
1426         }
1427
1428         /* All uCode command responses, including Tx command responses,
1429          * Rx "responses" (frame-received notification), and other
1430          * notifications from uCode come through here*/
1431         if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX |
1432                         CSR_INT_BIT_RX_PERIODIC)) {
1433                 IWL_DEBUG_ISR(priv, "Rx interrupt\n");
1434                 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1435                         handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1436                         iwl_write32(priv, CSR_FH_INT_STATUS,
1437                                         CSR49_FH_INT_RX_MASK);
1438                 }
1439                 if (inta & CSR_INT_BIT_RX_PERIODIC) {
1440                         handled |= CSR_INT_BIT_RX_PERIODIC;
1441                         iwl_write32(priv, CSR_INT, CSR_INT_BIT_RX_PERIODIC);
1442                 }
1443                 /* Sending RX interrupt require many steps to be done in the
1444                  * the device:
1445                  * 1- write interrupt to current index in ICT table.
1446                  * 2- dma RX frame.
1447                  * 3- update RX shared data to indicate last write index.
1448                  * 4- send interrupt.
1449                  * This could lead to RX race, driver could receive RX interrupt
1450                  * but the shared data changes does not reflect this;
1451                  * periodic interrupt will detect any dangling Rx activity.
1452                  */
1453
1454                 /* Disable periodic interrupt; we use it as just a one-shot. */
1455                 iwl_write8(priv, CSR_INT_PERIODIC_REG,
1456                             CSR_INT_PERIODIC_DIS);
1457                 iwl_rx_handle(priv);
1458
1459                 /*
1460                  * Enable periodic interrupt in 8 msec only if we received
1461                  * real RX interrupt (instead of just periodic int), to catch
1462                  * any dangling Rx interrupt.  If it was just the periodic
1463                  * interrupt, there was no dangling Rx activity, and no need
1464                  * to extend the periodic interrupt; one-shot is enough.
1465                  */
1466                 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX))
1467                         iwl_write8(priv, CSR_INT_PERIODIC_REG,
1468                                     CSR_INT_PERIODIC_ENA);
1469
1470                 priv->isr_stats.rx++;
1471         }
1472
1473         /* This "Tx" DMA channel is used only for loading uCode */
1474         if (inta & CSR_INT_BIT_FH_TX) {
1475                 iwl_write32(priv, CSR_FH_INT_STATUS, CSR49_FH_INT_TX_MASK);
1476                 IWL_DEBUG_ISR(priv, "uCode load interrupt\n");
1477                 priv->isr_stats.tx++;
1478                 handled |= CSR_INT_BIT_FH_TX;
1479                 /* Wake up uCode load routine, now that load is complete */
1480                 priv->ucode_write_complete = 1;
1481                 wake_up_interruptible(&priv->wait_command_queue);
1482         }
1483
1484         if (inta & ~handled) {
1485                 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1486                 priv->isr_stats.unhandled++;
1487         }
1488
1489         if (inta & ~(priv->inta_mask)) {
1490                 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1491                          inta & ~priv->inta_mask);
1492         }
1493
1494         /* Re-enable all interrupts */
1495         /* only Re-enable if diabled by irq */
1496         if (test_bit(STATUS_INT_ENABLED, &priv->status))
1497                 iwl_enable_interrupts(priv);
1498 }
1499
1500 /* the threshold ratio of actual_ack_cnt to expected_ack_cnt in percent */
1501 #define ACK_CNT_RATIO (50)
1502 #define BA_TIMEOUT_CNT (5)
1503 #define BA_TIMEOUT_MAX (16)
1504
1505 /**
1506  * iwl_good_ack_health - checks for ACK count ratios, BA timeout retries.
1507  *
1508  * When the ACK count ratio is 0 and aggregated BA timeout retries exceeding
1509  * the BA_TIMEOUT_MAX, reload firmware and bring system back to normal
1510  * operation state.
1511  */
1512 bool iwl_good_ack_health(struct iwl_priv *priv,
1513                                 struct iwl_rx_packet *pkt)
1514 {
1515         bool rc = true;
1516         int actual_ack_cnt_delta, expected_ack_cnt_delta;
1517         int ba_timeout_delta;
1518
1519         actual_ack_cnt_delta =
1520                 le32_to_cpu(pkt->u.stats.tx.actual_ack_cnt) -
1521                 le32_to_cpu(priv->_agn.statistics.tx.actual_ack_cnt);
1522         expected_ack_cnt_delta =
1523                 le32_to_cpu(pkt->u.stats.tx.expected_ack_cnt) -
1524                 le32_to_cpu(priv->_agn.statistics.tx.expected_ack_cnt);
1525         ba_timeout_delta =
1526                 le32_to_cpu(pkt->u.stats.tx.agg.ba_timeout) -
1527                 le32_to_cpu(priv->_agn.statistics.tx.agg.ba_timeout);
1528         if ((priv->_agn.agg_tids_count > 0) &&
1529             (expected_ack_cnt_delta > 0) &&
1530             (((actual_ack_cnt_delta * 100) / expected_ack_cnt_delta)
1531                 < ACK_CNT_RATIO) &&
1532             (ba_timeout_delta > BA_TIMEOUT_CNT)) {
1533                 IWL_DEBUG_RADIO(priv, "actual_ack_cnt delta = %d,"
1534                                 " expected_ack_cnt = %d\n",
1535                                 actual_ack_cnt_delta, expected_ack_cnt_delta);
1536
1537 #ifdef CONFIG_IWLWIFI_DEBUGFS
1538                 /*
1539                  * This is ifdef'ed on DEBUGFS because otherwise the
1540                  * statistics aren't available. If DEBUGFS is set but
1541                  * DEBUG is not, these will just compile out.
1542                  */
1543                 IWL_DEBUG_RADIO(priv, "rx_detected_cnt delta = %d\n",
1544                                 priv->_agn.delta_statistics.tx.rx_detected_cnt);
1545                 IWL_DEBUG_RADIO(priv,
1546                                 "ack_or_ba_timeout_collision delta = %d\n",
1547                                 priv->_agn.delta_statistics.tx.
1548                                 ack_or_ba_timeout_collision);
1549 #endif
1550                 IWL_DEBUG_RADIO(priv, "agg ba_timeout delta = %d\n",
1551                                 ba_timeout_delta);
1552                 if (!actual_ack_cnt_delta &&
1553                     (ba_timeout_delta >= BA_TIMEOUT_MAX))
1554                         rc = false;
1555         }
1556         return rc;
1557 }
1558
1559
1560 /*****************************************************************************
1561  *
1562  * sysfs attributes
1563  *
1564  *****************************************************************************/
1565
1566 #ifdef CONFIG_IWLWIFI_DEBUG
1567
1568 /*
1569  * The following adds a new attribute to the sysfs representation
1570  * of this device driver (i.e. a new file in /sys/class/net/wlan0/device/)
1571  * used for controlling the debug level.
1572  *
1573  * See the level definitions in iwl for details.
1574  *
1575  * The debug_level being managed using sysfs below is a per device debug
1576  * level that is used instead of the global debug level if it (the per
1577  * device debug level) is set.
1578  */
1579 static ssize_t show_debug_level(struct device *d,
1580                                 struct device_attribute *attr, char *buf)
1581 {
1582         struct iwl_priv *priv = dev_get_drvdata(d);
1583         return sprintf(buf, "0x%08X\n", iwl_get_debug_level(priv));
1584 }
1585 static ssize_t store_debug_level(struct device *d,
1586                                 struct device_attribute *attr,
1587                                  const char *buf, size_t count)
1588 {
1589         struct iwl_priv *priv = dev_get_drvdata(d);
1590         unsigned long val;
1591         int ret;
1592
1593         ret = strict_strtoul(buf, 0, &val);
1594         if (ret)
1595                 IWL_ERR(priv, "%s is not in hex or decimal form.\n", buf);
1596         else {
1597                 priv->debug_level = val;
1598                 if (iwl_alloc_traffic_mem(priv))
1599                         IWL_ERR(priv,
1600                                 "Not enough memory to generate traffic log\n");
1601         }
1602         return strnlen(buf, count);
1603 }
1604
1605 static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
1606                         show_debug_level, store_debug_level);
1607
1608
1609 #endif /* CONFIG_IWLWIFI_DEBUG */
1610
1611
1612 static ssize_t show_temperature(struct device *d,
1613                                 struct device_attribute *attr, char *buf)
1614 {
1615         struct iwl_priv *priv = dev_get_drvdata(d);
1616
1617         if (!iwl_is_alive(priv))
1618                 return -EAGAIN;
1619
1620         return sprintf(buf, "%d\n", priv->temperature);
1621 }
1622
1623 static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
1624
1625 static ssize_t show_tx_power(struct device *d,
1626                              struct device_attribute *attr, char *buf)
1627 {
1628         struct iwl_priv *priv = dev_get_drvdata(d);
1629
1630         if (!iwl_is_ready_rf(priv))
1631                 return sprintf(buf, "off\n");
1632         else
1633                 return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
1634 }
1635
1636 static ssize_t store_tx_power(struct device *d,
1637                               struct device_attribute *attr,
1638                               const char *buf, size_t count)
1639 {
1640         struct iwl_priv *priv = dev_get_drvdata(d);
1641         unsigned long val;
1642         int ret;
1643
1644         ret = strict_strtoul(buf, 10, &val);
1645         if (ret)
1646                 IWL_INFO(priv, "%s is not in decimal form.\n", buf);
1647         else {
1648                 ret = iwl_set_tx_power(priv, val, false);
1649                 if (ret)
1650                         IWL_ERR(priv, "failed setting tx power (0x%d).\n",
1651                                 ret);
1652                 else
1653                         ret = count;
1654         }
1655         return ret;
1656 }
1657
1658 static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
1659
1660 static struct attribute *iwl_sysfs_entries[] = {
1661         &dev_attr_temperature.attr,
1662         &dev_attr_tx_power.attr,
1663 #ifdef CONFIG_IWLWIFI_DEBUG
1664         &dev_attr_debug_level.attr,
1665 #endif
1666         NULL
1667 };
1668
1669 static struct attribute_group iwl_attribute_group = {
1670         .name = NULL,           /* put in device directory */
1671         .attrs = iwl_sysfs_entries,
1672 };
1673
1674 /******************************************************************************
1675  *
1676  * uCode download functions
1677  *
1678  ******************************************************************************/
1679
1680 static void iwl_dealloc_ucode_pci(struct iwl_priv *priv)
1681 {
1682         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
1683         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
1684         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1685         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
1686         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1687         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
1688 }
1689
1690 static void iwl_nic_start(struct iwl_priv *priv)
1691 {
1692         /* Remove all resets to allow NIC to operate */
1693         iwl_write32(priv, CSR_RESET, 0);
1694 }
1695
1696 struct iwlagn_ucode_capabilities {
1697         u32 max_probe_length;
1698         u32 standard_phy_calibration_size;
1699 };
1700
1701 static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context);
1702 static int iwl_mac_setup_register(struct iwl_priv *priv,
1703                                   struct iwlagn_ucode_capabilities *capa);
1704
1705 #define UCODE_EXPERIMENTAL_INDEX        100
1706 #define UCODE_EXPERIMENTAL_TAG          "exp"
1707
1708 static int __must_check iwl_request_firmware(struct iwl_priv *priv, bool first)
1709 {
1710         const char *name_pre = priv->cfg->fw_name_pre;
1711         char tag[8];
1712
1713         if (first) {
1714 #ifdef CONFIG_IWLWIFI_DEBUG_EXPERIMENTAL_UCODE
1715                 priv->fw_index = UCODE_EXPERIMENTAL_INDEX;
1716                 strcpy(tag, UCODE_EXPERIMENTAL_TAG);
1717         } else if (priv->fw_index == UCODE_EXPERIMENTAL_INDEX) {
1718 #endif
1719                 priv->fw_index = priv->cfg->ucode_api_max;
1720                 sprintf(tag, "%d", priv->fw_index);
1721         } else {
1722                 priv->fw_index--;
1723                 sprintf(tag, "%d", priv->fw_index);
1724         }
1725
1726         if (priv->fw_index < priv->cfg->ucode_api_min) {
1727                 IWL_ERR(priv, "no suitable firmware found!\n");
1728                 return -ENOENT;
1729         }
1730
1731         sprintf(priv->firmware_name, "%s%s%s", name_pre, tag, ".ucode");
1732
1733         IWL_DEBUG_INFO(priv, "attempting to load firmware %s'%s'\n",
1734                        (priv->fw_index == UCODE_EXPERIMENTAL_INDEX)
1735                                 ? "EXPERIMENTAL " : "",
1736                        priv->firmware_name);
1737
1738         return request_firmware_nowait(THIS_MODULE, 1, priv->firmware_name,
1739                                        &priv->pci_dev->dev, GFP_KERNEL, priv,
1740                                        iwl_ucode_callback);
1741 }
1742
1743 struct iwlagn_firmware_pieces {
1744         const void *inst, *data, *init, *init_data, *boot;
1745         size_t inst_size, data_size, init_size, init_data_size, boot_size;
1746
1747         u32 build;
1748
1749         u32 init_evtlog_ptr, init_evtlog_size, init_errlog_ptr;
1750         u32 inst_evtlog_ptr, inst_evtlog_size, inst_errlog_ptr;
1751 };
1752
1753 static int iwlagn_load_legacy_firmware(struct iwl_priv *priv,
1754                                        const struct firmware *ucode_raw,
1755                                        struct iwlagn_firmware_pieces *pieces)
1756 {
1757         struct iwl_ucode_header *ucode = (void *)ucode_raw->data;
1758         u32 api_ver, hdr_size;
1759         const u8 *src;
1760
1761         priv->ucode_ver = le32_to_cpu(ucode->ver);
1762         api_ver = IWL_UCODE_API(priv->ucode_ver);
1763
1764         switch (api_ver) {
1765         default:
1766                 /*
1767                  * 4965 doesn't revision the firmware file format
1768                  * along with the API version, it always uses v1
1769                  * file format.
1770                  */
1771                 if ((priv->hw_rev & CSR_HW_REV_TYPE_MSK) !=
1772                                 CSR_HW_REV_TYPE_4965) {
1773                         hdr_size = 28;
1774                         if (ucode_raw->size < hdr_size) {
1775                                 IWL_ERR(priv, "File size too small!\n");
1776                                 return -EINVAL;
1777                         }
1778                         pieces->build = le32_to_cpu(ucode->u.v2.build);
1779                         pieces->inst_size = le32_to_cpu(ucode->u.v2.inst_size);
1780                         pieces->data_size = le32_to_cpu(ucode->u.v2.data_size);
1781                         pieces->init_size = le32_to_cpu(ucode->u.v2.init_size);
1782                         pieces->init_data_size = le32_to_cpu(ucode->u.v2.init_data_size);
1783                         pieces->boot_size = le32_to_cpu(ucode->u.v2.boot_size);
1784                         src = ucode->u.v2.data;
1785                         break;
1786                 }
1787                 /* fall through for 4965 */
1788         case 0:
1789         case 1:
1790         case 2:
1791                 hdr_size = 24;
1792                 if (ucode_raw->size < hdr_size) {
1793                         IWL_ERR(priv, "File size too small!\n");
1794                         return -EINVAL;
1795                 }
1796                 pieces->build = 0;
1797                 pieces->inst_size = le32_to_cpu(ucode->u.v1.inst_size);
1798                 pieces->data_size = le32_to_cpu(ucode->u.v1.data_size);
1799                 pieces->init_size = le32_to_cpu(ucode->u.v1.init_size);
1800                 pieces->init_data_size = le32_to_cpu(ucode->u.v1.init_data_size);
1801                 pieces->boot_size = le32_to_cpu(ucode->u.v1.boot_size);
1802                 src = ucode->u.v1.data;
1803                 break;
1804         }
1805
1806         /* Verify size of file vs. image size info in file's header */
1807         if (ucode_raw->size != hdr_size + pieces->inst_size +
1808                                 pieces->data_size + pieces->init_size +
1809                                 pieces->init_data_size + pieces->boot_size) {
1810
1811                 IWL_ERR(priv,
1812                         "uCode file size %d does not match expected size\n",
1813                         (int)ucode_raw->size);
1814                 return -EINVAL;
1815         }
1816
1817         pieces->inst = src;
1818         src += pieces->inst_size;
1819         pieces->data = src;
1820         src += pieces->data_size;
1821         pieces->init = src;
1822         src += pieces->init_size;
1823         pieces->init_data = src;
1824         src += pieces->init_data_size;
1825         pieces->boot = src;
1826         src += pieces->boot_size;
1827
1828         return 0;
1829 }
1830
1831 static int iwlagn_wanted_ucode_alternative = 1;
1832
1833 static int iwlagn_load_firmware(struct iwl_priv *priv,
1834                                 const struct firmware *ucode_raw,
1835                                 struct iwlagn_firmware_pieces *pieces,
1836                                 struct iwlagn_ucode_capabilities *capa)
1837 {
1838         struct iwl_tlv_ucode_header *ucode = (void *)ucode_raw->data;
1839         struct iwl_ucode_tlv *tlv;
1840         size_t len = ucode_raw->size;
1841         const u8 *data;
1842         int wanted_alternative = iwlagn_wanted_ucode_alternative, tmp;
1843         u64 alternatives;
1844         u32 tlv_len;
1845         enum iwl_ucode_tlv_type tlv_type;
1846         const u8 *tlv_data;
1847
1848         if (len < sizeof(*ucode)) {
1849                 IWL_ERR(priv, "uCode has invalid length: %zd\n", len);
1850                 return -EINVAL;
1851         }
1852
1853         if (ucode->magic != cpu_to_le32(IWL_TLV_UCODE_MAGIC)) {
1854                 IWL_ERR(priv, "invalid uCode magic: 0X%x\n",
1855                         le32_to_cpu(ucode->magic));
1856                 return -EINVAL;
1857         }
1858
1859         /*
1860          * Check which alternatives are present, and "downgrade"
1861          * when the chosen alternative is not present, warning
1862          * the user when that happens. Some files may not have
1863          * any alternatives, so don't warn in that case.
1864          */
1865         alternatives = le64_to_cpu(ucode->alternatives);
1866         tmp = wanted_alternative;
1867         if (wanted_alternative > 63)
1868                 wanted_alternative = 63;
1869         while (wanted_alternative && !(alternatives & BIT(wanted_alternative)))
1870                 wanted_alternative--;
1871         if (wanted_alternative && wanted_alternative != tmp)
1872                 IWL_WARN(priv,
1873                          "uCode alternative %d not available, choosing %d\n",
1874                          tmp, wanted_alternative);
1875
1876         priv->ucode_ver = le32_to_cpu(ucode->ver);
1877         pieces->build = le32_to_cpu(ucode->build);
1878         data = ucode->data;
1879
1880         len -= sizeof(*ucode);
1881
1882         while (len >= sizeof(*tlv)) {
1883                 u16 tlv_alt;
1884
1885                 len -= sizeof(*tlv);
1886                 tlv = (void *)data;
1887
1888                 tlv_len = le32_to_cpu(tlv->length);
1889                 tlv_type = le16_to_cpu(tlv->type);
1890                 tlv_alt = le16_to_cpu(tlv->alternative);
1891                 tlv_data = tlv->data;
1892
1893                 if (len < tlv_len) {
1894                         IWL_ERR(priv, "invalid TLV len: %zd/%u\n",
1895                                 len, tlv_len);
1896                         return -EINVAL;
1897                 }
1898                 len -= ALIGN(tlv_len, 4);
1899                 data += sizeof(*tlv) + ALIGN(tlv_len, 4);
1900
1901                 /*
1902                  * Alternative 0 is always valid.
1903                  *
1904                  * Skip alternative TLVs that are not selected.
1905                  */
1906                 if (tlv_alt != 0 && tlv_alt != wanted_alternative)
1907                         continue;
1908
1909                 switch (tlv_type) {
1910                 case IWL_UCODE_TLV_INST:
1911                         pieces->inst = tlv_data;
1912                         pieces->inst_size = tlv_len;
1913                         break;
1914                 case IWL_UCODE_TLV_DATA:
1915                         pieces->data = tlv_data;
1916                         pieces->data_size = tlv_len;
1917                         break;
1918                 case IWL_UCODE_TLV_INIT:
1919                         pieces->init = tlv_data;
1920                         pieces->init_size = tlv_len;
1921                         break;
1922                 case IWL_UCODE_TLV_INIT_DATA:
1923                         pieces->init_data = tlv_data;
1924                         pieces->init_data_size = tlv_len;
1925                         break;
1926                 case IWL_UCODE_TLV_BOOT:
1927                         pieces->boot = tlv_data;
1928                         pieces->boot_size = tlv_len;
1929                         break;
1930                 case IWL_UCODE_TLV_PROBE_MAX_LEN:
1931                         if (tlv_len != sizeof(u32))
1932                                 goto invalid_tlv_len;
1933                         capa->max_probe_length =
1934                                         le32_to_cpup((__le32 *)tlv_data);
1935                         break;
1936                 case IWL_UCODE_TLV_INIT_EVTLOG_PTR:
1937                         if (tlv_len != sizeof(u32))
1938                                 goto invalid_tlv_len;
1939                         pieces->init_evtlog_ptr =
1940                                         le32_to_cpup((__le32 *)tlv_data);
1941                         break;
1942                 case IWL_UCODE_TLV_INIT_EVTLOG_SIZE:
1943                         if (tlv_len != sizeof(u32))
1944                                 goto invalid_tlv_len;
1945                         pieces->init_evtlog_size =
1946                                         le32_to_cpup((__le32 *)tlv_data);
1947                         break;
1948                 case IWL_UCODE_TLV_INIT_ERRLOG_PTR:
1949                         if (tlv_len != sizeof(u32))
1950                                 goto invalid_tlv_len;
1951                         pieces->init_errlog_ptr =
1952                                         le32_to_cpup((__le32 *)tlv_data);
1953                         break;
1954                 case IWL_UCODE_TLV_RUNT_EVTLOG_PTR:
1955                         if (tlv_len != sizeof(u32))
1956                                 goto invalid_tlv_len;
1957                         pieces->inst_evtlog_ptr =
1958                                         le32_to_cpup((__le32 *)tlv_data);
1959                         break;
1960                 case IWL_UCODE_TLV_RUNT_EVTLOG_SIZE:
1961                         if (tlv_len != sizeof(u32))
1962                                 goto invalid_tlv_len;
1963                         pieces->inst_evtlog_size =
1964                                         le32_to_cpup((__le32 *)tlv_data);
1965                         break;
1966                 case IWL_UCODE_TLV_RUNT_ERRLOG_PTR:
1967                         if (tlv_len != sizeof(u32))
1968                                 goto invalid_tlv_len;
1969                         pieces->inst_errlog_ptr =
1970                                         le32_to_cpup((__le32 *)tlv_data);
1971                         break;
1972                 case IWL_UCODE_TLV_ENHANCE_SENS_TBL:
1973                         if (tlv_len)
1974                                 goto invalid_tlv_len;
1975                         priv->enhance_sensitivity_table = true;
1976                         break;
1977                 case IWL_UCODE_TLV_PHY_CALIBRATION_SIZE:
1978                         if (tlv_len != sizeof(u32))
1979                                 goto invalid_tlv_len;
1980                         capa->standard_phy_calibration_size =
1981                                         le32_to_cpup((__le32 *)tlv_data);
1982                         break;
1983                 default:
1984                         IWL_WARN(priv, "unknown TLV: %d\n", tlv_type);
1985                         break;
1986                 }
1987         }
1988
1989         if (len) {
1990                 IWL_ERR(priv, "invalid TLV after parsing: %zd\n", len);
1991                 iwl_print_hex_dump(priv, IWL_DL_FW, (u8 *)data, len);
1992                 return -EINVAL;
1993         }
1994
1995         return 0;
1996
1997  invalid_tlv_len:
1998         IWL_ERR(priv, "TLV %d has invalid size: %u\n", tlv_type, tlv_len);
1999         iwl_print_hex_dump(priv, IWL_DL_FW, tlv_data, tlv_len);
2000
2001         return -EINVAL;
2002 }
2003
2004 /**
2005  * iwl_ucode_callback - callback when firmware was loaded
2006  *
2007  * If loaded successfully, copies the firmware into buffers
2008  * for the card to fetch (via DMA).
2009  */
2010 static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context)
2011 {
2012         struct iwl_priv *priv = context;
2013         struct iwl_ucode_header *ucode;
2014         int err;
2015         struct iwlagn_firmware_pieces pieces;
2016         const unsigned int api_max = priv->cfg->ucode_api_max;
2017         const unsigned int api_min = priv->cfg->ucode_api_min;
2018         u32 api_ver;
2019         char buildstr[25];
2020         u32 build;
2021         struct iwlagn_ucode_capabilities ucode_capa = {
2022                 .max_probe_length = 200,
2023                 .standard_phy_calibration_size =
2024                         IWL_MAX_STANDARD_PHY_CALIBRATE_TBL_SIZE,
2025         };
2026
2027         memset(&pieces, 0, sizeof(pieces));
2028
2029         if (!ucode_raw) {
2030                 if (priv->fw_index <= priv->cfg->ucode_api_max)
2031                         IWL_ERR(priv,
2032                                 "request for firmware file '%s' failed.\n",
2033                                 priv->firmware_name);
2034                 goto try_again;
2035         }
2036
2037         IWL_DEBUG_INFO(priv, "Loaded firmware file '%s' (%zd bytes).\n",
2038                        priv->firmware_name, ucode_raw->size);
2039
2040         /* Make sure that we got at least the API version number */
2041         if (ucode_raw->size < 4) {
2042                 IWL_ERR(priv, "File size way too small!\n");
2043                 goto try_again;
2044         }
2045
2046         /* Data from ucode file:  header followed by uCode images */
2047         ucode = (struct iwl_ucode_header *)ucode_raw->data;
2048
2049         if (ucode->ver)
2050                 err = iwlagn_load_legacy_firmware(priv, ucode_raw, &pieces);
2051         else
2052                 err = iwlagn_load_firmware(priv, ucode_raw, &pieces,
2053                                            &ucode_capa);
2054
2055         if (err)
2056                 goto try_again;
2057
2058         api_ver = IWL_UCODE_API(priv->ucode_ver);
2059         build = pieces.build;
2060
2061         /*
2062          * api_ver should match the api version forming part of the
2063          * firmware filename ... but we don't check for that and only rely
2064          * on the API version read from firmware header from here on forward
2065          */
2066         if (api_ver < api_min || api_ver > api_max) {
2067                 IWL_ERR(priv, "Driver unable to support your firmware API. "
2068                           "Driver supports v%u, firmware is v%u.\n",
2069                           api_max, api_ver);
2070                 goto try_again;
2071         }
2072
2073         if (api_ver != api_max)
2074                 IWL_ERR(priv, "Firmware has old API version. Expected v%u, "
2075                           "got v%u. New firmware can be obtained "
2076                           "from http://www.intellinuxwireless.org.\n",
2077                           api_max, api_ver);
2078
2079         if (build)
2080                 sprintf(buildstr, " build %u%s", build,
2081                        (priv->fw_index == UCODE_EXPERIMENTAL_INDEX)
2082                                 ? " (EXP)" : "");
2083         else
2084                 buildstr[0] = '\0';
2085
2086         IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u%s\n",
2087                  IWL_UCODE_MAJOR(priv->ucode_ver),
2088                  IWL_UCODE_MINOR(priv->ucode_ver),
2089                  IWL_UCODE_API(priv->ucode_ver),
2090                  IWL_UCODE_SERIAL(priv->ucode_ver),
2091                  buildstr);
2092
2093         snprintf(priv->hw->wiphy->fw_version,
2094                  sizeof(priv->hw->wiphy->fw_version),
2095                  "%u.%u.%u.%u%s",
2096                  IWL_UCODE_MAJOR(priv->ucode_ver),
2097                  IWL_UCODE_MINOR(priv->ucode_ver),
2098                  IWL_UCODE_API(priv->ucode_ver),
2099                  IWL_UCODE_SERIAL(priv->ucode_ver),
2100                  buildstr);
2101
2102         /*
2103          * For any of the failures below (before allocating pci memory)
2104          * we will try to load a version with a smaller API -- maybe the
2105          * user just got a corrupted version of the latest API.
2106          */
2107
2108         IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
2109                        priv->ucode_ver);
2110         IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %Zd\n",
2111                        pieces.inst_size);
2112         IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %Zd\n",
2113                        pieces.data_size);
2114         IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %Zd\n",
2115                        pieces.init_size);
2116         IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %Zd\n",
2117                        pieces.init_data_size);
2118         IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %Zd\n",
2119                        pieces.boot_size);
2120
2121         /* Verify that uCode images will fit in card's SRAM */
2122         if (pieces.inst_size > priv->hw_params.max_inst_size) {
2123                 IWL_ERR(priv, "uCode instr len %Zd too large to fit in\n",
2124                         pieces.inst_size);
2125                 goto try_again;
2126         }
2127
2128         if (pieces.data_size > priv->hw_params.max_data_size) {
2129                 IWL_ERR(priv, "uCode data len %Zd too large to fit in\n",
2130                         pieces.data_size);
2131                 goto try_again;
2132         }
2133
2134         if (pieces.init_size > priv->hw_params.max_inst_size) {
2135                 IWL_ERR(priv, "uCode init instr len %Zd too large to fit in\n",
2136                         pieces.init_size);
2137                 goto try_again;
2138         }
2139
2140         if (pieces.init_data_size > priv->hw_params.max_data_size) {
2141                 IWL_ERR(priv, "uCode init data len %Zd too large to fit in\n",
2142                         pieces.init_data_size);
2143                 goto try_again;
2144         }
2145
2146         if (pieces.boot_size > priv->hw_params.max_bsm_size) {
2147                 IWL_ERR(priv, "uCode boot instr len %Zd too large to fit in\n",
2148                         pieces.boot_size);
2149                 goto try_again;
2150         }
2151
2152         /* Allocate ucode buffers for card's bus-master loading ... */
2153
2154         /* Runtime instructions and 2 copies of data:
2155          * 1) unmodified from disk
2156          * 2) backup cache for save/restore during power-downs */
2157         priv->ucode_code.len = pieces.inst_size;
2158         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
2159
2160         priv->ucode_data.len = pieces.data_size;
2161         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
2162
2163         priv->ucode_data_backup.len = pieces.data_size;
2164         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
2165
2166         if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
2167             !priv->ucode_data_backup.v_addr)
2168                 goto err_pci_alloc;
2169
2170         /* Initialization instructions and data */
2171         if (pieces.init_size && pieces.init_data_size) {
2172                 priv->ucode_init.len = pieces.init_size;
2173                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
2174
2175                 priv->ucode_init_data.len = pieces.init_data_size;
2176                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
2177
2178                 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
2179                         goto err_pci_alloc;
2180         }
2181
2182         /* Bootstrap (instructions only, no data) */
2183         if (pieces.boot_size) {
2184                 priv->ucode_boot.len = pieces.boot_size;
2185                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
2186
2187                 if (!priv->ucode_boot.v_addr)
2188                         goto err_pci_alloc;
2189         }
2190
2191         /* Now that we can no longer fail, copy information */
2192
2193         /*
2194          * The (size - 16) / 12 formula is based on the information recorded
2195          * for each event, which is of mode 1 (including timestamp) for all
2196          * new microcodes that include this information.
2197          */
2198         priv->_agn.init_evtlog_ptr = pieces.init_evtlog_ptr;
2199         if (pieces.init_evtlog_size)
2200                 priv->_agn.init_evtlog_size = (pieces.init_evtlog_size - 16)/12;
2201         else
2202                 priv->_agn.init_evtlog_size = priv->cfg->max_event_log_size;
2203         priv->_agn.init_errlog_ptr = pieces.init_errlog_ptr;
2204         priv->_agn.inst_evtlog_ptr = pieces.inst_evtlog_ptr;
2205         if (pieces.inst_evtlog_size)
2206                 priv->_agn.inst_evtlog_size = (pieces.inst_evtlog_size - 16)/12;
2207         else
2208                 priv->_agn.inst_evtlog_size = priv->cfg->max_event_log_size;
2209         priv->_agn.inst_errlog_ptr = pieces.inst_errlog_ptr;
2210
2211         /* Copy images into buffers for card's bus-master reads ... */
2212
2213         /* Runtime instructions (first block of data in file) */
2214         IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode instr len %Zd\n",
2215                         pieces.inst_size);
2216         memcpy(priv->ucode_code.v_addr, pieces.inst, pieces.inst_size);
2217
2218         IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
2219                 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
2220
2221         /*
2222          * Runtime data
2223          * NOTE:  Copy into backup buffer will be done in iwl_up()
2224          */
2225         IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode data len %Zd\n",
2226                         pieces.data_size);
2227         memcpy(priv->ucode_data.v_addr, pieces.data, pieces.data_size);
2228         memcpy(priv->ucode_data_backup.v_addr, pieces.data, pieces.data_size);
2229
2230         /* Initialization instructions */
2231         if (pieces.init_size) {
2232                 IWL_DEBUG_INFO(priv, "Copying (but not loading) init instr len %Zd\n",
2233                                 pieces.init_size);
2234                 memcpy(priv->ucode_init.v_addr, pieces.init, pieces.init_size);
2235         }
2236
2237         /* Initialization data */
2238         if (pieces.init_data_size) {
2239                 IWL_DEBUG_INFO(priv, "Copying (but not loading) init data len %Zd\n",
2240                                pieces.init_data_size);
2241                 memcpy(priv->ucode_init_data.v_addr, pieces.init_data,
2242                        pieces.init_data_size);
2243         }
2244
2245         /* Bootstrap instructions */
2246         IWL_DEBUG_INFO(priv, "Copying (but not loading) boot instr len %Zd\n",
2247                         pieces.boot_size);
2248         memcpy(priv->ucode_boot.v_addr, pieces.boot, pieces.boot_size);
2249
2250         /*
2251          * figure out the offset of chain noise reset and gain commands
2252          * base on the size of standard phy calibration commands table size
2253          */
2254         if (ucode_capa.standard_phy_calibration_size >
2255             IWL_MAX_PHY_CALIBRATE_TBL_SIZE)
2256                 ucode_capa.standard_phy_calibration_size =
2257                         IWL_MAX_STANDARD_PHY_CALIBRATE_TBL_SIZE;
2258
2259         priv->_agn.phy_calib_chain_noise_reset_cmd =
2260                 ucode_capa.standard_phy_calibration_size;
2261         priv->_agn.phy_calib_chain_noise_gain_cmd =
2262                 ucode_capa.standard_phy_calibration_size + 1;
2263
2264         /**************************************************
2265          * This is still part of probe() in a sense...
2266          *
2267          * 9. Setup and register with mac80211 and debugfs
2268          **************************************************/
2269         err = iwl_mac_setup_register(priv, &ucode_capa);
2270         if (err)
2271                 goto out_unbind;
2272
2273         err = iwl_dbgfs_register(priv, DRV_NAME);
2274         if (err)
2275                 IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err);
2276
2277         err = sysfs_create_group(&priv->pci_dev->dev.kobj,
2278                                         &iwl_attribute_group);
2279         if (err) {
2280                 IWL_ERR(priv, "failed to create sysfs device attributes\n");
2281                 goto out_unbind;
2282         }
2283
2284         /* We have our copies now, allow OS release its copies */
2285         release_firmware(ucode_raw);
2286         complete(&priv->_agn.firmware_loading_complete);
2287         return;
2288
2289  try_again:
2290         /* try next, if any */
2291         if (iwl_request_firmware(priv, false))
2292                 goto out_unbind;
2293         release_firmware(ucode_raw);
2294         return;
2295
2296  err_pci_alloc:
2297         IWL_ERR(priv, "failed to allocate pci memory\n");
2298         iwl_dealloc_ucode_pci(priv);
2299  out_unbind:
2300         complete(&priv->_agn.firmware_loading_complete);
2301         device_release_driver(&priv->pci_dev->dev);
2302         release_firmware(ucode_raw);
2303 }
2304
2305 static const char *desc_lookup_text[] = {
2306         "OK",
2307         "FAIL",
2308         "BAD_PARAM",
2309         "BAD_CHECKSUM",
2310         "NMI_INTERRUPT_WDG",
2311         "SYSASSERT",
2312         "FATAL_ERROR",
2313         "BAD_COMMAND",
2314         "HW_ERROR_TUNE_LOCK",
2315         "HW_ERROR_TEMPERATURE",
2316         "ILLEGAL_CHAN_FREQ",
2317         "VCC_NOT_STABLE",
2318         "FH_ERROR",
2319         "NMI_INTERRUPT_HOST",
2320         "NMI_INTERRUPT_ACTION_PT",
2321         "NMI_INTERRUPT_UNKNOWN",
2322         "UCODE_VERSION_MISMATCH",
2323         "HW_ERROR_ABS_LOCK",
2324         "HW_ERROR_CAL_LOCK_FAIL",
2325         "NMI_INTERRUPT_INST_ACTION_PT",
2326         "NMI_INTERRUPT_DATA_ACTION_PT",
2327         "NMI_TRM_HW_ER",
2328         "NMI_INTERRUPT_TRM",
2329         "NMI_INTERRUPT_BREAK_POINT"
2330         "DEBUG_0",
2331         "DEBUG_1",
2332         "DEBUG_2",
2333         "DEBUG_3",
2334 };
2335
2336 static struct { char *name; u8 num; } advanced_lookup[] = {
2337         { "NMI_INTERRUPT_WDG", 0x34 },
2338         { "SYSASSERT", 0x35 },
2339         { "UCODE_VERSION_MISMATCH", 0x37 },
2340         { "BAD_COMMAND", 0x38 },
2341         { "NMI_INTERRUPT_DATA_ACTION_PT", 0x3C },
2342         { "FATAL_ERROR", 0x3D },
2343         { "NMI_TRM_HW_ERR", 0x46 },
2344         { "NMI_INTERRUPT_TRM", 0x4C },
2345         { "NMI_INTERRUPT_BREAK_POINT", 0x54 },
2346         { "NMI_INTERRUPT_WDG_RXF_FULL", 0x5C },
2347         { "NMI_INTERRUPT_WDG_NO_RBD_RXF_FULL", 0x64 },
2348         { "NMI_INTERRUPT_HOST", 0x66 },
2349         { "NMI_INTERRUPT_ACTION_PT", 0x7C },
2350         { "NMI_INTERRUPT_UNKNOWN", 0x84 },
2351         { "NMI_INTERRUPT_INST_ACTION_PT", 0x86 },
2352         { "ADVANCED_SYSASSERT", 0 },
2353 };
2354
2355 static const char *desc_lookup(u32 num)
2356 {
2357         int i;
2358         int max = ARRAY_SIZE(desc_lookup_text);
2359
2360         if (num < max)
2361                 return desc_lookup_text[num];
2362
2363         max = ARRAY_SIZE(advanced_lookup) - 1;
2364         for (i = 0; i < max; i++) {
2365                 if (advanced_lookup[i].num == num)
2366                         break;;
2367         }
2368         return advanced_lookup[i].name;
2369 }
2370
2371 #define ERROR_START_OFFSET  (1 * sizeof(u32))
2372 #define ERROR_ELEM_SIZE     (7 * sizeof(u32))
2373
2374 void iwl_dump_nic_error_log(struct iwl_priv *priv)
2375 {
2376         u32 data2, line;
2377         u32 desc, time, count, base, data1;
2378         u32 blink1, blink2, ilink1, ilink2;
2379         u32 pc, hcmd;
2380
2381         if (priv->ucode_type == UCODE_INIT) {
2382                 base = le32_to_cpu(priv->card_alive_init.error_event_table_ptr);
2383                 if (!base)
2384                         base = priv->_agn.init_errlog_ptr;
2385         } else {
2386                 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
2387                 if (!base)
2388                         base = priv->_agn.inst_errlog_ptr;
2389         }
2390
2391         if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
2392                 IWL_ERR(priv,
2393                         "Not valid error log pointer 0x%08X for %s uCode\n",
2394                         base, (priv->ucode_type == UCODE_INIT) ? "Init" : "RT");
2395                 return;
2396         }
2397
2398         count = iwl_read_targ_mem(priv, base);
2399
2400         if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
2401                 IWL_ERR(priv, "Start IWL Error Log Dump:\n");
2402                 IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
2403                         priv->status, count);
2404         }
2405
2406         desc = iwl_read_targ_mem(priv, base + 1 * sizeof(u32));
2407         pc = iwl_read_targ_mem(priv, base + 2 * sizeof(u32));
2408         blink1 = iwl_read_targ_mem(priv, base + 3 * sizeof(u32));
2409         blink2 = iwl_read_targ_mem(priv, base + 4 * sizeof(u32));
2410         ilink1 = iwl_read_targ_mem(priv, base + 5 * sizeof(u32));
2411         ilink2 = iwl_read_targ_mem(priv, base + 6 * sizeof(u32));
2412         data1 = iwl_read_targ_mem(priv, base + 7 * sizeof(u32));
2413         data2 = iwl_read_targ_mem(priv, base + 8 * sizeof(u32));
2414         line = iwl_read_targ_mem(priv, base + 9 * sizeof(u32));
2415         time = iwl_read_targ_mem(priv, base + 11 * sizeof(u32));
2416         hcmd = iwl_read_targ_mem(priv, base + 22 * sizeof(u32));
2417
2418         trace_iwlwifi_dev_ucode_error(priv, desc, time, data1, data2, line,
2419                                       blink1, blink2, ilink1, ilink2);
2420
2421         IWL_ERR(priv, "Desc                                  Time       "
2422                 "data1      data2      line\n");
2423         IWL_ERR(priv, "%-28s (0x%04X) %010u 0x%08X 0x%08X %u\n",
2424                 desc_lookup(desc), desc, time, data1, data2, line);
2425         IWL_ERR(priv, "pc      blink1  blink2  ilink1  ilink2  hcmd\n");
2426         IWL_ERR(priv, "0x%05X 0x%05X 0x%05X 0x%05X 0x%05X 0x%05X\n",
2427                 pc, blink1, blink2, ilink1, ilink2, hcmd);
2428 }
2429
2430 #define EVENT_START_OFFSET  (4 * sizeof(u32))
2431
2432 /**
2433  * iwl_print_event_log - Dump error event log to syslog
2434  *
2435  */
2436 static int iwl_print_event_log(struct iwl_priv *priv, u32 start_idx,
2437                                u32 num_events, u32 mode,
2438                                int pos, char **buf, size_t bufsz)
2439 {
2440         u32 i;
2441         u32 base;       /* SRAM byte address of event log header */
2442         u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
2443         u32 ptr;        /* SRAM byte address of log data */
2444         u32 ev, time, data; /* event log data */
2445         unsigned long reg_flags;
2446
2447         if (num_events == 0)
2448                 return pos;
2449
2450         if (priv->ucode_type == UCODE_INIT) {
2451                 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
2452                 if (!base)
2453                         base = priv->_agn.init_evtlog_ptr;
2454         } else {
2455                 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
2456                 if (!base)
2457                         base = priv->_agn.inst_evtlog_ptr;
2458         }
2459
2460         if (mode == 0)
2461                 event_size = 2 * sizeof(u32);
2462         else
2463                 event_size = 3 * sizeof(u32);
2464
2465         ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
2466
2467         /* Make sure device is powered up for SRAM reads */
2468         spin_lock_irqsave(&priv->reg_lock, reg_flags);
2469         iwl_grab_nic_access(priv);
2470
2471         /* Set starting address; reads will auto-increment */
2472         _iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, ptr);
2473         rmb();
2474
2475         /* "time" is actually "data" for mode 0 (no timestamp).
2476         * place event id # at far right for easier visual parsing. */
2477         for (i = 0; i < num_events; i++) {
2478                 ev = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
2479                 time = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
2480                 if (mode == 0) {
2481                         /* data, ev */
2482                         if (bufsz) {
2483                                 pos += scnprintf(*buf + pos, bufsz - pos,
2484                                                 "EVT_LOG:0x%08x:%04u\n",
2485                                                 time, ev);
2486                         } else {
2487                                 trace_iwlwifi_dev_ucode_event(priv, 0,
2488                                         time, ev);
2489                                 IWL_ERR(priv, "EVT_LOG:0x%08x:%04u\n",
2490                                         time, ev);
2491                         }
2492                 } else {
2493                         data = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
2494                         if (bufsz) {
2495                                 pos += scnprintf(*buf + pos, bufsz - pos,
2496                                                 "EVT_LOGT:%010u:0x%08x:%04u\n",
2497                                                  time, data, ev);
2498                         } else {
2499                                 IWL_ERR(priv, "EVT_LOGT:%010u:0x%08x:%04u\n",
2500                                         time, data, ev);
2501                                 trace_iwlwifi_dev_ucode_event(priv, time,
2502                                         data, ev);
2503                         }
2504                 }
2505         }
2506
2507         /* Allow device to power down */
2508         iwl_release_nic_access(priv);
2509         spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
2510         return pos;
2511 }
2512
2513 /**
2514  * iwl_print_last_event_logs - Dump the newest # of event log to syslog
2515  */
2516 static int iwl_print_last_event_logs(struct iwl_priv *priv, u32 capacity,
2517                                     u32 num_wraps, u32 next_entry,
2518                                     u32 size, u32 mode,
2519                                     int pos, char **buf, size_t bufsz)
2520 {
2521         /*
2522          * display the newest DEFAULT_LOG_ENTRIES entries
2523          * i.e the entries just before the next ont that uCode would fill.
2524          */
2525         if (num_wraps) {
2526                 if (next_entry < size) {
2527                         pos = iwl_print_event_log(priv,
2528                                                 capacity - (size - next_entry),
2529                                                 size - next_entry, mode,
2530                                                 pos, buf, bufsz);
2531                         pos = iwl_print_event_log(priv, 0,
2532                                                   next_entry, mode,
2533                                                   pos, buf, bufsz);
2534                 } else
2535                         pos = iwl_print_event_log(priv, next_entry - size,
2536                                                   size, mode, pos, buf, bufsz);
2537         } else {
2538                 if (next_entry < size) {
2539                         pos = iwl_print_event_log(priv, 0, next_entry,
2540                                                   mode, pos, buf, bufsz);
2541                 } else {
2542                         pos = iwl_print_event_log(priv, next_entry - size,
2543                                                   size, mode, pos, buf, bufsz);
2544                 }
2545         }
2546         return pos;
2547 }
2548
2549 #define DEFAULT_DUMP_EVENT_LOG_ENTRIES (20)
2550
2551 int iwl_dump_nic_event_log(struct iwl_priv *priv, bool full_log,
2552                             char **buf, bool display)
2553 {
2554         u32 base;       /* SRAM byte address of event log header */
2555         u32 capacity;   /* event log capacity in # entries */
2556         u32 mode;       /* 0 - no timestamp, 1 - timestamp recorded */
2557         u32 num_wraps;  /* # times uCode wrapped to top of log */
2558         u32 next_entry; /* index of next entry to be written by uCode */
2559         u32 size;       /* # entries that we'll print */
2560         u32 logsize;
2561         int pos = 0;
2562         size_t bufsz = 0;
2563
2564         if (priv->ucode_type == UCODE_INIT) {
2565                 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
2566                 logsize = priv->_agn.init_evtlog_size;
2567                 if (!base)
2568                         base = priv->_agn.init_evtlog_ptr;
2569         } else {
2570                 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
2571                 logsize = priv->_agn.inst_evtlog_size;
2572                 if (!base)
2573                         base = priv->_agn.inst_evtlog_ptr;
2574         }
2575
2576         if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
2577                 IWL_ERR(priv,
2578                         "Invalid event log pointer 0x%08X for %s uCode\n",
2579                         base, (priv->ucode_type == UCODE_INIT) ? "Init" : "RT");
2580                 return -EINVAL;
2581         }
2582
2583         /* event log header */
2584         capacity = iwl_read_targ_mem(priv, base);
2585         mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
2586         num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
2587         next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
2588
2589         if (capacity > logsize) {
2590                 IWL_ERR(priv, "Log capacity %d is bogus, limit to %d entries\n",
2591                         capacity, logsize);
2592                 capacity = logsize;
2593         }
2594
2595         if (next_entry > logsize) {
2596                 IWL_ERR(priv, "Log write index %d is bogus, limit to %d\n",
2597                         next_entry, logsize);
2598                 next_entry = logsize;
2599         }
2600
2601         size = num_wraps ? capacity : next_entry;
2602
2603         /* bail out if nothing in log */
2604         if (size == 0) {
2605                 IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
2606                 return pos;
2607         }
2608
2609 #ifdef CONFIG_IWLWIFI_DEBUG
2610         if (!(iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) && !full_log)
2611                 size = (size > DEFAULT_DUMP_EVENT_LOG_ENTRIES)
2612                         ? DEFAULT_DUMP_EVENT_LOG_ENTRIES : size;
2613 #else
2614         size = (size > DEFAULT_DUMP_EVENT_LOG_ENTRIES)
2615                 ? DEFAULT_DUMP_EVENT_LOG_ENTRIES : size;
2616 #endif
2617         IWL_ERR(priv, "Start IWL Event Log Dump: display last %u entries\n",
2618                 size);
2619
2620 #ifdef CONFIG_IWLWIFI_DEBUG
2621         if (display) {
2622                 if (full_log)
2623                         bufsz = capacity * 48;
2624                 else
2625                         bufsz = size * 48;
2626                 *buf = kmalloc(bufsz, GFP_KERNEL);
2627                 if (!*buf)
2628                         return -ENOMEM;
2629         }
2630         if ((iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) || full_log) {
2631                 /*
2632                  * if uCode has wrapped back to top of log,
2633                  * start at the oldest entry,
2634                  * i.e the next one that uCode would fill.
2635                  */
2636                 if (num_wraps)
2637                         pos = iwl_print_event_log(priv, next_entry,
2638                                                 capacity - next_entry, mode,
2639                                                 pos, buf, bufsz);
2640                 /* (then/else) start at top of log */
2641                 pos = iwl_print_event_log(priv, 0,
2642                                           next_entry, mode, pos, buf, bufsz);
2643         } else
2644                 pos = iwl_print_last_event_logs(priv, capacity, num_wraps,
2645                                                 next_entry, size, mode,
2646                                                 pos, buf, bufsz);
2647 #else
2648         pos = iwl_print_last_event_logs(priv, capacity, num_wraps,
2649                                         next_entry, size, mode,
2650                                         pos, buf, bufsz);
2651 #endif
2652         return pos;
2653 }
2654
2655 static void iwl_rf_kill_ct_config(struct iwl_priv *priv)
2656 {
2657         struct iwl_ct_kill_config cmd;
2658         struct iwl_ct_kill_throttling_config adv_cmd;
2659         unsigned long flags;
2660         int ret = 0;
2661
2662         spin_lock_irqsave(&priv->lock, flags);
2663         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
2664                     CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
2665         spin_unlock_irqrestore(&priv->lock, flags);
2666         priv->thermal_throttle.ct_kill_toggle = false;
2667
2668         if (priv->cfg->support_ct_kill_exit) {
2669                 adv_cmd.critical_temperature_enter =
2670                         cpu_to_le32(priv->hw_params.ct_kill_threshold);
2671                 adv_cmd.critical_temperature_exit =
2672                         cpu_to_le32(priv->hw_params.ct_kill_exit_threshold);
2673
2674                 ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
2675                                        sizeof(adv_cmd), &adv_cmd);
2676                 if (ret)
2677                         IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
2678                 else
2679                         IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD "
2680                                         "succeeded, "
2681                                         "critical temperature enter is %d,"
2682                                         "exit is %d\n",
2683                                        priv->hw_params.ct_kill_threshold,
2684                                        priv->hw_params.ct_kill_exit_threshold);
2685         } else {
2686                 cmd.critical_temperature_R =
2687                         cpu_to_le32(priv->hw_params.ct_kill_threshold);
2688
2689                 ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
2690                                        sizeof(cmd), &cmd);
2691                 if (ret)
2692                         IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
2693                 else
2694                         IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD "
2695                                         "succeeded, "
2696                                         "critical temperature is %d\n",
2697                                         priv->hw_params.ct_kill_threshold);
2698         }
2699 }
2700
2701 /**
2702  * iwl_alive_start - called after REPLY_ALIVE notification received
2703  *                   from protocol/runtime uCode (initialization uCode's
2704  *                   Alive gets handled by iwl_init_alive_start()).
2705  */
2706 static void iwl_alive_start(struct iwl_priv *priv)
2707 {
2708         int ret = 0;
2709
2710         IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
2711
2712         if (priv->card_alive.is_valid != UCODE_VALID_OK) {
2713                 /* We had an error bringing up the hardware, so take it
2714                  * all the way back down so we can try again */
2715                 IWL_DEBUG_INFO(priv, "Alive failed.\n");
2716                 goto restart;
2717         }
2718
2719         /* Initialize uCode has loaded Runtime uCode ... verify inst image.
2720          * This is a paranoid check, because we would not have gotten the
2721          * "runtime" alive if code weren't properly loaded.  */
2722         if (iwl_verify_ucode(priv)) {
2723                 /* Runtime instruction load was bad;
2724                  * take it all the way back down so we can try again */
2725                 IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
2726                 goto restart;
2727         }
2728
2729         ret = priv->cfg->ops->lib->alive_notify(priv);
2730         if (ret) {
2731                 IWL_WARN(priv,
2732                         "Could not complete ALIVE transition [ntf]: %d\n", ret);
2733                 goto restart;
2734         }
2735
2736         /* After the ALIVE response, we can send host commands to the uCode */
2737         set_bit(STATUS_ALIVE, &priv->status);
2738
2739         if (priv->cfg->ops->lib->recover_from_tx_stall) {
2740                 /* Enable timer to monitor the driver queues */
2741                 mod_timer(&priv->monitor_recover,
2742                         jiffies +
2743                         msecs_to_jiffies(priv->cfg->monitor_recover_period));
2744         }
2745
2746         if (iwl_is_rfkill(priv))
2747                 return;
2748
2749         ieee80211_wake_queues(priv->hw);
2750
2751         priv->active_rate = IWL_RATES_MASK;
2752
2753         /* Configure Tx antenna selection based on H/W config */
2754         if (priv->cfg->ops->hcmd->set_tx_ant)
2755                 priv->cfg->ops->hcmd->set_tx_ant(priv, priv->cfg->valid_tx_ant);
2756
2757         if (iwl_is_associated(priv)) {
2758                 struct iwl_rxon_cmd *active_rxon =
2759                                 (struct iwl_rxon_cmd *)&priv->active_rxon;
2760                 /* apply any changes in staging */
2761                 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2762                 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2763         } else {
2764                 /* Initialize our rx_config data */
2765                 iwl_connection_init_rx_config(priv, NULL);
2766
2767                 if (priv->cfg->ops->hcmd->set_rxon_chain)
2768                         priv->cfg->ops->hcmd->set_rxon_chain(priv);
2769         }
2770
2771         if (!priv->cfg->advanced_bt_coexist) {
2772                 /* Configure Bluetooth device coexistence support */
2773                 priv->cfg->ops->hcmd->send_bt_config(priv);
2774         }
2775
2776         iwl_reset_run_time_calib(priv);
2777
2778         /* Configure the adapter for unassociated operation */
2779         iwlcore_commit_rxon(priv);
2780
2781         /* At this point, the NIC is initialized and operational */
2782         iwl_rf_kill_ct_config(priv);
2783
2784         iwl_leds_init(priv);
2785
2786         IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
2787         set_bit(STATUS_READY, &priv->status);
2788         wake_up_interruptible(&priv->wait_command_queue);
2789
2790         iwl_power_update_mode(priv, true);
2791         IWL_DEBUG_INFO(priv, "Updated power mode\n");
2792
2793
2794         return;
2795
2796  restart:
2797         queue_work(priv->workqueue, &priv->restart);
2798 }
2799
2800 static void iwl_cancel_deferred_work(struct iwl_priv *priv);
2801
2802 static void __iwl_down(struct iwl_priv *priv)
2803 {
2804         unsigned long flags;
2805         int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
2806
2807         IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
2808
2809         if (!exit_pending)
2810                 set_bit(STATUS_EXIT_PENDING, &priv->status);
2811
2812         /* Stop TX queues watchdog. We need to have STATUS_EXIT_PENDING bit set
2813          * to prevent rearm timer */
2814         if (priv->cfg->ops->lib->recover_from_tx_stall)
2815                 del_timer_sync(&priv->monitor_recover);
2816
2817         iwl_clear_ucode_stations(priv);
2818         iwl_dealloc_bcast_station(priv);
2819         iwl_clear_driver_stations(priv);
2820
2821         /* reset BT coex data */
2822         priv->bt_traffic_load = priv->cfg->bt_init_traffic_load;
2823         priv->bt_sco_active = false;
2824         priv->bt_full_concurrent = false;
2825         priv->bt_ci_compliance = 0;
2826
2827         /* Unblock any waiting calls */
2828         wake_up_interruptible_all(&priv->wait_command_queue);
2829
2830         /* Wipe out the EXIT_PENDING status bit if we are not actually
2831          * exiting the module */
2832         if (!exit_pending)
2833                 clear_bit(STATUS_EXIT_PENDING, &priv->status);
2834
2835         /* stop and reset the on-board processor */
2836         iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
2837
2838         /* tell the device to stop sending interrupts */
2839         spin_lock_irqsave(&priv->lock, flags);
2840         iwl_disable_interrupts(priv);
2841         spin_unlock_irqrestore(&priv->lock, flags);
2842         iwl_synchronize_irq(priv);
2843
2844         if (priv->mac80211_registered)
2845                 ieee80211_stop_queues(priv->hw);
2846
2847         /* If we have not previously called iwl_init() then
2848          * clear all bits but the RF Kill bit and return */
2849         if (!iwl_is_init(priv)) {
2850                 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2851                                         STATUS_RF_KILL_HW |
2852                                test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2853                                         STATUS_GEO_CONFIGURED |
2854                                test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2855                                         STATUS_EXIT_PENDING;
2856                 goto exit;
2857         }
2858
2859         /* ...otherwise clear out all the status bits but the RF Kill
2860          * bit and continue taking the NIC down. */
2861         priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2862                                 STATUS_RF_KILL_HW |
2863                         test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2864                                 STATUS_GEO_CONFIGURED |
2865                         test_bit(STATUS_FW_ERROR, &priv->status) <<
2866                                 STATUS_FW_ERROR |
2867                        test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2868                                 STATUS_EXIT_PENDING;
2869
2870         /* device going down, Stop using ICT table */
2871         iwl_disable_ict(priv);
2872
2873         iwlagn_txq_ctx_stop(priv);
2874         iwlagn_rxq_stop(priv);
2875
2876         /* Power-down device's busmaster DMA clocks */
2877         iwl_write_prph(priv, APMG_CLK_DIS_REG, APMG_CLK_VAL_DMA_CLK_RQT);
2878         udelay(5);
2879
2880         /* Make sure (redundant) we've released our request to stay awake */
2881         iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
2882
2883         /* Stop the device, and put it in low power state */
2884         priv->cfg->ops->lib->apm_ops.stop(priv);
2885
2886  exit:
2887         memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
2888
2889         if (priv->ibss_beacon)
2890                 dev_kfree_skb(priv->ibss_beacon);
2891         priv->ibss_beacon = NULL;
2892
2893         /* clear out any free frames */
2894         iwl_clear_free_frames(priv);
2895 }
2896
2897 static void iwl_down(struct iwl_priv *priv)
2898 {
2899         mutex_lock(&priv->mutex);
2900         __iwl_down(priv);
2901         mutex_unlock(&priv->mutex);
2902
2903         iwl_cancel_deferred_work(priv);
2904 }
2905
2906 #define HW_READY_TIMEOUT (50)
2907
2908 static int iwl_set_hw_ready(struct iwl_priv *priv)
2909 {
2910         int ret = 0;
2911
2912         iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
2913                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY);
2914
2915         /* See if we got it */
2916         ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
2917                                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
2918                                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
2919                                 HW_READY_TIMEOUT);
2920         if (ret != -ETIMEDOUT)
2921                 priv->hw_ready = true;
2922         else
2923                 priv->hw_ready = false;
2924
2925         IWL_DEBUG_INFO(priv, "hardware %s\n",
2926                       (priv->hw_ready == 1) ? "ready" : "not ready");
2927         return ret;
2928 }
2929
2930 static int iwl_prepare_card_hw(struct iwl_priv *priv)
2931 {
2932         int ret = 0;
2933
2934         IWL_DEBUG_INFO(priv, "iwl_prepare_card_hw enter\n");
2935
2936         ret = iwl_set_hw_ready(priv);
2937         if (priv->hw_ready)
2938                 return ret;
2939
2940         /* If HW is not ready, prepare the conditions to check again */
2941         iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
2942                         CSR_HW_IF_CONFIG_REG_PREPARE);
2943
2944         ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
2945                         ~CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE,
2946                         CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE, 150000);
2947
2948         /* HW should be ready by now, check again. */
2949         if (ret != -ETIMEDOUT)
2950                 iwl_set_hw_ready(priv);
2951
2952         return ret;
2953 }
2954
2955 #define MAX_HW_RESTARTS 5
2956
2957 static int __iwl_up(struct iwl_priv *priv)
2958 {
2959         int i;
2960         int ret;
2961
2962         if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
2963                 IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
2964                 return -EIO;
2965         }
2966
2967         if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
2968                 IWL_ERR(priv, "ucode not available for device bringup\n");
2969                 return -EIO;
2970         }
2971
2972         ret = iwl_alloc_bcast_station(priv, true);
2973         if (ret)
2974                 return ret;
2975
2976         iwl_prepare_card_hw(priv);
2977
2978         if (!priv->hw_ready) {
2979                 IWL_WARN(priv, "Exit HW not ready\n");
2980                 return -EIO;
2981         }
2982
2983         /* If platform's RF_KILL switch is NOT set to KILL */
2984         if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
2985                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2986         else
2987                 set_bit(STATUS_RF_KILL_HW, &priv->status);
2988
2989         if (iwl_is_rfkill(priv)) {
2990                 wiphy_rfkill_set_hw_state(priv->hw->wiphy, true);
2991
2992                 iwl_enable_interrupts(priv);
2993                 IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
2994                 return 0;
2995         }
2996
2997         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2998
2999         ret = iwlagn_hw_nic_init(priv);
3000         if (ret) {
3001                 IWL_ERR(priv, "Unable to init nic\n");
3002                 return ret;
3003         }
3004
3005         /* make sure rfkill handshake bits are cleared */
3006         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
3007         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
3008                     CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
3009
3010         /* clear (again), then enable host interrupts */
3011         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
3012         iwl_enable_interrupts(priv);
3013
3014         /* really make sure rfkill handshake bits are cleared */
3015         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
3016         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
3017
3018         /* Copy original ucode data image from disk into backup cache.
3019          * This will be used to initialize the on-board processor's
3020          * data SRAM for a clean start when the runtime program first loads. */
3021         memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
3022                priv->ucode_data.len);
3023
3024         for (i = 0; i < MAX_HW_RESTARTS; i++) {
3025
3026                 /* load bootstrap state machine,
3027                  * load bootstrap program into processor's memory,
3028                  * prepare to load the "initialize" uCode */
3029                 ret = priv->cfg->ops->lib->load_ucode(priv);
3030
3031                 if (ret) {
3032                         IWL_ERR(priv, "Unable to set up bootstrap uCode: %d\n",
3033                                 ret);
3034                         continue;
3035                 }
3036
3037                 /* start card; "initialize" will load runtime ucode */
3038                 iwl_nic_start(priv);
3039
3040                 IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
3041
3042                 return 0;
3043         }
3044
3045         set_bit(STATUS_EXIT_PENDING, &priv->status);
3046         __iwl_down(priv);
3047         clear_bit(STATUS_EXIT_PENDING, &priv->status);
3048
3049         /* tried to restart and config the device for as long as our
3050          * patience could withstand */
3051         IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
3052         return -EIO;
3053 }
3054
3055
3056 /*****************************************************************************
3057  *
3058  * Workqueue callbacks
3059  *
3060  *****************************************************************************/
3061
3062 static void iwl_bg_init_alive_start(struct work_struct *data)
3063 {
3064         struct iwl_priv *priv =
3065             container_of(data, struct iwl_priv, init_alive_start.work);
3066
3067         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3068                 return;
3069
3070         mutex_lock(&priv->mutex);
3071         priv->cfg->ops->lib->init_alive_start(priv);
3072         mutex_unlock(&priv->mutex);
3073 }
3074
3075 static void iwl_bg_alive_start(struct work_struct *data)
3076 {
3077         struct iwl_priv *priv =
3078             container_of(data, struct iwl_priv, alive_start.work);
3079
3080         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3081                 return;
3082
3083         /* enable dram interrupt */
3084         iwl_reset_ict(priv);
3085
3086         mutex_lock(&priv->mutex);
3087         iwl_alive_start(priv);
3088         mutex_unlock(&priv->mutex);
3089 }
3090
3091 static void iwl_bg_run_time_calib_work(struct work_struct *work)
3092 {
3093         struct iwl_priv *priv = container_of(work, struct iwl_priv,
3094                         run_time_calib_work);
3095
3096         mutex_lock(&priv->mutex);
3097
3098         if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
3099             test_bit(STATUS_SCANNING, &priv->status)) {
3100                 mutex_unlock(&priv->mutex);
3101                 return;
3102         }
3103
3104         if (priv->start_calib) {
3105                 if (priv->cfg->bt_statistics) {
3106                         iwl_chain_noise_calibration(priv,
3107                                         (void *)&priv->_agn.statistics_bt);
3108                         iwl_sensitivity_calibration(priv,
3109                                         (void *)&priv->_agn.statistics_bt);
3110                 } else {
3111                         iwl_chain_noise_calibration(priv,
3112                                         (void *)&priv->_agn.statistics);
3113                         iwl_sensitivity_calibration(priv,
3114                                         (void *)&priv->_agn.statistics);
3115                 }
3116         }
3117
3118         mutex_unlock(&priv->mutex);
3119 }
3120
3121 static void iwl_bg_restart(struct work_struct *data)
3122 {
3123         struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
3124
3125         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3126                 return;
3127
3128         if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) {
3129                 bool bt_sco, bt_full_concurrent;
3130                 u8 bt_ci_compliance;
3131                 u8 bt_load;
3132
3133                 mutex_lock(&priv->mutex);
3134                 priv->vif = NULL;
3135                 priv->is_open = 0;
3136
3137                 /*
3138                  * __iwl_down() will clear the BT status variables,
3139                  * which is correct, but when we restart we really
3140                  * want to keep them so restore them afterwards.
3141                  *
3142                  * The restart process will later pick them up and
3143                  * re-configure the hw when we reconfigure the BT
3144                  * command.
3145                  */
3146                 bt_sco = priv->bt_sco_active;
3147                 bt_full_concurrent = priv->bt_full_concurrent;
3148                 bt_ci_compliance = priv->bt_ci_compliance;
3149                 bt_load = priv->bt_traffic_load;
3150
3151                 __iwl_down(priv);
3152
3153                 priv->bt_sco_active = bt_sco;
3154                 priv->bt_full_concurrent = bt_full_concurrent;
3155                 priv->bt_ci_compliance = bt_ci_compliance;
3156                 priv->bt_traffic_load = bt_load;
3157
3158                 mutex_unlock(&priv->mutex);
3159                 iwl_cancel_deferred_work(priv);
3160                 ieee80211_restart_hw(priv->hw);
3161         } else {
3162                 iwl_down(priv);
3163
3164                 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3165                         return;
3166
3167                 mutex_lock(&priv->mutex);
3168                 __iwl_up(priv);
3169                 mutex_unlock(&priv->mutex);
3170         }
3171 }
3172
3173 static void iwl_bg_rx_replenish(struct work_struct *data)
3174 {
3175         struct iwl_priv *priv =
3176             container_of(data, struct iwl_priv, rx_replenish);
3177
3178         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3179                 return;
3180
3181         mutex_lock(&priv->mutex);
3182         iwlagn_rx_replenish(priv);
3183         mutex_unlock(&priv->mutex);
3184 }
3185
3186 #define IWL_DELAY_NEXT_SCAN (HZ*2)
3187
3188 void iwl_post_associate(struct iwl_priv *priv, struct ieee80211_vif *vif)
3189 {
3190         struct ieee80211_conf *conf = NULL;
3191         int ret = 0;
3192
3193         if (!vif || !priv->is_open)
3194                 return;
3195
3196         if (vif->type == NL80211_IFTYPE_AP) {
3197                 IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
3198                 return;
3199         }
3200
3201         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3202                 return;
3203
3204         iwl_scan_cancel_timeout(priv, 200);
3205
3206         conf = ieee80211_get_hw_conf(priv->hw);
3207
3208         priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
3209         iwlcore_commit_rxon(priv);
3210
3211         ret = iwl_send_rxon_timing(priv, vif);
3212         if (ret)
3213                 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
3214                             "Attempting to continue.\n");
3215
3216         priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
3217
3218         iwl_set_rxon_ht(priv, &priv->current_ht_config);
3219
3220         if (priv->cfg->ops->hcmd->set_rxon_chain)
3221                 priv->cfg->ops->hcmd->set_rxon_chain(priv);
3222
3223         priv->staging_rxon.assoc_id = cpu_to_le16(vif->bss_conf.aid);
3224
3225         IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n",
3226                         vif->bss_conf.aid, vif->bss_conf.beacon_int);
3227
3228         if (vif->bss_conf.use_short_preamble)
3229                 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
3230         else
3231                 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
3232
3233         if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
3234                 if (vif->bss_conf.use_short_slot)
3235                         priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
3236                 else
3237                         priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
3238         }
3239
3240         iwlcore_commit_rxon(priv);
3241
3242         IWL_DEBUG_ASSOC(priv, "Associated as %d to: %pM\n",
3243                         vif->bss_conf.aid, priv->active_rxon.bssid_addr);
3244
3245         switch (vif->type) {
3246         case NL80211_IFTYPE_STATION:
3247                 break;
3248         case NL80211_IFTYPE_ADHOC:
3249                 iwl_send_beacon_cmd(priv);
3250                 break;
3251         default:
3252                 IWL_ERR(priv, "%s Should not be called in %d mode\n",
3253                           __func__, vif->type);
3254                 break;
3255         }
3256
3257         /* the chain noise calibration will enabled PM upon completion
3258          * If chain noise has already been run, then we need to enable
3259          * power management here */
3260         if (priv->chain_noise_data.state == IWL_CHAIN_NOISE_DONE)
3261                 iwl_power_update_mode(priv, false);
3262
3263         /* Enable Rx differential gain and sensitivity calibrations */
3264         iwl_chain_noise_reset(priv);
3265         priv->start_calib = 1;
3266
3267 }
3268
3269 /*****************************************************************************
3270  *
3271  * mac80211 entry point functions
3272  *
3273  *****************************************************************************/
3274
3275 #define UCODE_READY_TIMEOUT     (4 * HZ)
3276
3277 /*
3278  * Not a mac80211 entry point function, but it fits in with all the
3279  * other mac80211 functions grouped here.
3280  */
3281 static int iwl_mac_setup_register(struct iwl_priv *priv,
3282                                   struct iwlagn_ucode_capabilities *capa)
3283 {
3284         int ret;
3285         struct ieee80211_hw *hw = priv->hw;
3286         hw->rate_control_algorithm = "iwl-agn-rs";
3287
3288         /* Tell mac80211 our characteristics */
3289         hw->flags = IEEE80211_HW_SIGNAL_DBM |
3290                     IEEE80211_HW_AMPDU_AGGREGATION |
3291                     IEEE80211_HW_SPECTRUM_MGMT;
3292
3293         if (!priv->cfg->broken_powersave)
3294                 hw->flags |= IEEE80211_HW_SUPPORTS_PS |
3295                              IEEE80211_HW_SUPPORTS_DYNAMIC_PS;
3296
3297         if (priv->cfg->sku & IWL_SKU_N)
3298                 hw->flags |= IEEE80211_HW_SUPPORTS_DYNAMIC_SMPS |
3299                              IEEE80211_HW_SUPPORTS_STATIC_SMPS;
3300
3301         hw->sta_data_size = sizeof(struct iwl_station_priv);
3302         hw->vif_data_size = sizeof(struct iwl_vif_priv);
3303
3304         hw->wiphy->interface_modes =
3305                 BIT(NL80211_IFTYPE_STATION) |
3306                 BIT(NL80211_IFTYPE_ADHOC);
3307
3308         hw->wiphy->flags |= WIPHY_FLAG_CUSTOM_REGULATORY |
3309                             WIPHY_FLAG_DISABLE_BEACON_HINTS;
3310
3311         /*
3312          * For now, disable PS by default because it affects
3313          * RX performance significantly.
3314          */
3315         hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT;
3316
3317         hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX;
3318         /* we create the 802.11 header and a zero-length SSID element */
3319         hw->wiphy->max_scan_ie_len = capa->max_probe_length - 24 - 2;
3320
3321         /* Default value; 4 EDCA QOS priorities */
3322         hw->queues = 4;
3323
3324         hw->max_listen_interval = IWL_CONN_MAX_LISTEN_INTERVAL;
3325
3326         if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
3327                 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
3328                         &priv->bands[IEEE80211_BAND_2GHZ];
3329         if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
3330                 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
3331                         &priv->bands[IEEE80211_BAND_5GHZ];
3332
3333         ret = ieee80211_register_hw(priv->hw);
3334         if (ret) {
3335                 IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
3336                 return ret;
3337         }
3338         priv->mac80211_registered = 1;
3339
3340         return 0;
3341 }
3342
3343
3344 static int iwl_mac_start(struct ieee80211_hw *hw)
3345 {
3346         struct iwl_priv *priv = hw->priv;
3347         int ret;
3348
3349         IWL_DEBUG_MAC80211(priv, "enter\n");
3350
3351         /* we should be verifying the device is ready to be opened */
3352         mutex_lock(&priv->mutex);
3353         ret = __iwl_up(priv);
3354         mutex_unlock(&priv->mutex);
3355
3356         if (ret)
3357                 return ret;
3358
3359         if (iwl_is_rfkill(priv))
3360                 goto out;
3361
3362         IWL_DEBUG_INFO(priv, "Start UP work done.\n");
3363
3364         /* Wait for START_ALIVE from Run Time ucode. Otherwise callbacks from
3365          * mac80211 will not be run successfully. */
3366         ret = wait_event_interruptible_timeout(priv->wait_command_queue,
3367                         test_bit(STATUS_READY, &priv->status),
3368                         UCODE_READY_TIMEOUT);
3369         if (!ret) {
3370                 if (!test_bit(STATUS_READY, &priv->status)) {
3371                         IWL_ERR(priv, "START_ALIVE timeout after %dms.\n",
3372                                 jiffies_to_msecs(UCODE_READY_TIMEOUT));
3373                         return -ETIMEDOUT;
3374                 }
3375         }
3376
3377         iwl_led_start(priv);
3378
3379 out:
3380         priv->is_open = 1;
3381         IWL_DEBUG_MAC80211(priv, "leave\n");
3382         return 0;
3383 }
3384
3385 static void iwl_mac_stop(struct ieee80211_hw *hw)
3386 {
3387         struct iwl_priv *priv = hw->priv;
3388
3389         IWL_DEBUG_MAC80211(priv, "enter\n");
3390
3391         if (!priv->is_open)
3392                 return;
3393
3394         priv->is_open = 0;
3395
3396         if (iwl_is_ready_rf(priv) || test_bit(STATUS_SCAN_HW, &priv->status)) {
3397                 /* stop mac, cancel any scan request and clear
3398                  * RXON_FILTER_ASSOC_MSK BIT
3399                  */
3400                 mutex_lock(&priv->mutex);
3401                 iwl_scan_cancel_timeout(priv, 100);
3402                 mutex_unlock(&priv->mutex);
3403         }
3404
3405         iwl_down(priv);
3406
3407         flush_workqueue(priv->workqueue);
3408
3409         /* enable interrupts again in order to receive rfkill changes */
3410         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
3411         iwl_enable_interrupts(priv);
3412
3413         IWL_DEBUG_MAC80211(priv, "leave\n");
3414 }
3415
3416 static int iwl_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
3417 {
3418         struct iwl_priv *priv = hw->priv;
3419
3420         IWL_DEBUG_MACDUMP(priv, "enter\n");
3421
3422         IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
3423                      ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
3424
3425         if (iwlagn_tx_skb(priv, skb))
3426                 dev_kfree_skb_any(skb);
3427
3428         IWL_DEBUG_MACDUMP(priv, "leave\n");
3429         return NETDEV_TX_OK;
3430 }
3431
3432 void iwl_config_ap(struct iwl_priv *priv, struct ieee80211_vif *vif)
3433 {
3434         int ret = 0;
3435
3436         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3437                 return;
3438
3439         /* The following should be done only at AP bring up */
3440         if (!iwl_is_associated(priv)) {
3441
3442                 /* RXON - unassoc (to set timing command) */
3443                 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
3444                 iwlcore_commit_rxon(priv);
3445
3446                 /* RXON Timing */
3447                 ret = iwl_send_rxon_timing(priv, vif);
3448                 if (ret)
3449                         IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
3450                                         "Attempting to continue.\n");
3451
3452                 /* AP has all antennas */
3453                 priv->chain_noise_data.active_chains =
3454                         priv->hw_params.valid_rx_ant;
3455                 iwl_set_rxon_ht(priv, &priv->current_ht_config);
3456                 if (priv->cfg->ops->hcmd->set_rxon_chain)
3457                         priv->cfg->ops->hcmd->set_rxon_chain(priv);
3458
3459                 priv->staging_rxon.assoc_id = 0;
3460
3461                 if (vif->bss_conf.use_short_preamble)
3462                         priv->staging_rxon.flags |=
3463                                 RXON_FLG_SHORT_PREAMBLE_MSK;
3464                 else
3465                         priv->staging_rxon.flags &=
3466                                 ~RXON_FLG_SHORT_PREAMBLE_MSK;
3467
3468                 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
3469                         if (vif->bss_conf.use_short_slot)
3470                                 priv->staging_rxon.flags |=
3471                                         RXON_FLG_SHORT_SLOT_MSK;
3472                         else
3473                                 priv->staging_rxon.flags &=
3474                                         ~RXON_FLG_SHORT_SLOT_MSK;
3475                 }
3476                 /* restore RXON assoc */
3477                 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
3478                 iwlcore_commit_rxon(priv);
3479         }
3480         iwl_send_beacon_cmd(priv);
3481
3482         /* FIXME - we need to add code here to detect a totally new
3483          * configuration, reset the AP, unassoc, rxon timing, assoc,
3484          * clear sta table, add BCAST sta... */
3485 }
3486
3487 static void iwl_mac_update_tkip_key(struct ieee80211_hw *hw,
3488                                     struct ieee80211_vif *vif,
3489                                     struct ieee80211_key_conf *keyconf,
3490                                     struct ieee80211_sta *sta,
3491                                     u32 iv32, u16 *phase1key)
3492 {
3493
3494         struct iwl_priv *priv = hw->priv;
3495         IWL_DEBUG_MAC80211(priv, "enter\n");
3496
3497         iwl_update_tkip_key(priv, keyconf, sta,
3498                             iv32, phase1key);
3499
3500         IWL_DEBUG_MAC80211(priv, "leave\n");
3501 }
3502
3503 static int iwl_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
3504                            struct ieee80211_vif *vif,
3505                            struct ieee80211_sta *sta,
3506                            struct ieee80211_key_conf *key)
3507 {
3508         struct iwl_priv *priv = hw->priv;
3509         int ret;
3510         u8 sta_id;
3511         bool is_default_wep_key = false;
3512
3513         IWL_DEBUG_MAC80211(priv, "enter\n");
3514
3515         if (priv->cfg->mod_params->sw_crypto) {
3516                 IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
3517                 return -EOPNOTSUPP;
3518         }
3519
3520         sta_id = iwl_sta_id_or_broadcast(priv, sta);
3521         if (sta_id == IWL_INVALID_STATION)
3522                 return -EINVAL;
3523
3524         mutex_lock(&priv->mutex);
3525         iwl_scan_cancel_timeout(priv, 100);
3526
3527         /*
3528          * If we are getting WEP group key and we didn't receive any key mapping
3529          * so far, we are in legacy wep mode (group key only), otherwise we are
3530          * in 1X mode.
3531          * In legacy wep mode, we use another host command to the uCode.
3532          */
3533         if ((key->cipher == WLAN_CIPHER_SUITE_WEP40 ||
3534              key->cipher == WLAN_CIPHER_SUITE_WEP104) &&
3535             !sta) {
3536                 if (cmd == SET_KEY)
3537                         is_default_wep_key = !priv->key_mapping_key;
3538                 else
3539                         is_default_wep_key =
3540                                         (key->hw_key_idx == HW_KEY_DEFAULT);
3541         }
3542
3543         switch (cmd) {
3544         case SET_KEY:
3545                 if (is_default_wep_key)
3546                         ret = iwl_set_default_wep_key(priv, key);
3547                 else
3548                         ret = iwl_set_dynamic_key(priv, key, sta_id);
3549
3550                 IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
3551                 break;
3552         case DISABLE_KEY:
3553                 if (is_default_wep_key)
3554                         ret = iwl_remove_default_wep_key(priv, key);
3555                 else
3556                         ret = iwl_remove_dynamic_key(priv, key, sta_id);
3557
3558                 IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
3559                 break;
3560         default:
3561                 ret = -EINVAL;
3562         }
3563
3564         mutex_unlock(&priv->mutex);
3565         IWL_DEBUG_MAC80211(priv, "leave\n");
3566
3567         return ret;
3568 }
3569
3570 static int iwl_mac_ampdu_action(struct ieee80211_hw *hw,
3571                                 struct ieee80211_vif *vif,
3572                                 enum ieee80211_ampdu_mlme_action action,
3573                                 struct ieee80211_sta *sta, u16 tid, u16 *ssn)
3574 {
3575         struct iwl_priv *priv = hw->priv;
3576         int ret = -EINVAL;
3577
3578         IWL_DEBUG_HT(priv, "A-MPDU action on addr %pM tid %d\n",
3579                      sta->addr, tid);
3580
3581         if (!(priv->cfg->sku & IWL_SKU_N))
3582                 return -EACCES;
3583
3584         mutex_lock(&priv->mutex);
3585
3586         switch (action) {
3587         case IEEE80211_AMPDU_RX_START:
3588                 IWL_DEBUG_HT(priv, "start Rx\n");
3589                 ret = iwl_sta_rx_agg_start(priv, sta, tid, *ssn);
3590                 break;
3591         case IEEE80211_AMPDU_RX_STOP:
3592                 IWL_DEBUG_HT(priv, "stop Rx\n");
3593                 ret = iwl_sta_rx_agg_stop(priv, sta, tid);
3594                 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3595                         ret = 0;
3596                 break;
3597         case IEEE80211_AMPDU_TX_START:
3598                 IWL_DEBUG_HT(priv, "start Tx\n");
3599                 ret = iwlagn_tx_agg_start(priv, vif, sta, tid, ssn);
3600                 if (ret == 0) {
3601                         priv->_agn.agg_tids_count++;
3602                         IWL_DEBUG_HT(priv, "priv->_agn.agg_tids_count = %u\n",
3603                                      priv->_agn.agg_tids_count);
3604                 }
3605                 break;
3606         case IEEE80211_AMPDU_TX_STOP:
3607                 IWL_DEBUG_HT(priv, "stop Tx\n");
3608                 ret = iwlagn_tx_agg_stop(priv, vif, sta, tid);
3609                 if ((ret == 0) && (priv->_agn.agg_tids_count > 0)) {
3610                         priv->_agn.agg_tids_count--;
3611                         IWL_DEBUG_HT(priv, "priv->_agn.agg_tids_count = %u\n",
3612                                      priv->_agn.agg_tids_count);
3613                 }
3614                 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3615                         ret = 0;
3616                 if (priv->cfg->use_rts_for_aggregation) {
3617                         struct iwl_station_priv *sta_priv =
3618                                 (void *) sta->drv_priv;
3619                         /*
3620                          * switch off RTS/CTS if it was previously enabled
3621                          */
3622
3623                         sta_priv->lq_sta.lq.general_params.flags &=
3624                                 ~LINK_QUAL_FLAGS_SET_STA_TLC_RTS_MSK;
3625                         iwl_send_lq_cmd(priv, &sta_priv->lq_sta.lq,
3626                                 CMD_ASYNC, false);
3627                 }
3628                 break;
3629         case IEEE80211_AMPDU_TX_OPERATIONAL:
3630                 if (priv->cfg->use_rts_for_aggregation) {
3631                         struct iwl_station_priv *sta_priv =
3632                                 (void *) sta->drv_priv;
3633
3634                         /*
3635                          * switch to RTS/CTS if it is the prefer protection
3636                          * method for HT traffic
3637                          */
3638
3639                         sta_priv->lq_sta.lq.general_params.flags |=
3640                                 LINK_QUAL_FLAGS_SET_STA_TLC_RTS_MSK;
3641                         iwl_send_lq_cmd(priv, &sta_priv->lq_sta.lq,
3642                                 CMD_ASYNC, false);
3643                 }
3644                 ret = 0;
3645                 break;
3646         }
3647         mutex_unlock(&priv->mutex);
3648
3649         return ret;
3650 }
3651
3652 static void iwl_mac_sta_notify(struct ieee80211_hw *hw,
3653                                struct ieee80211_vif *vif,
3654                                enum sta_notify_cmd cmd,
3655                                struct ieee80211_sta *sta)
3656 {
3657         struct iwl_priv *priv = hw->priv;
3658         struct iwl_station_priv *sta_priv = (void *)sta->drv_priv;
3659         int sta_id;
3660
3661         switch (cmd) {
3662         case STA_NOTIFY_SLEEP:
3663                 WARN_ON(!sta_priv->client);
3664                 sta_priv->asleep = true;
3665                 if (atomic_read(&sta_priv->pending_frames) > 0)
3666                         ieee80211_sta_block_awake(hw, sta, true);
3667                 break;
3668         case STA_NOTIFY_AWAKE:
3669                 WARN_ON(!sta_priv->client);
3670                 if (!sta_priv->asleep)
3671                         break;
3672                 sta_priv->asleep = false;
3673                 sta_id = iwl_sta_id(sta);
3674                 if (sta_id != IWL_INVALID_STATION)
3675                         iwl_sta_modify_ps_wake(priv, sta_id);
3676                 break;
3677         default:
3678                 break;
3679         }
3680 }
3681
3682 static int iwlagn_mac_sta_add(struct ieee80211_hw *hw,
3683                               struct ieee80211_vif *vif,
3684                               struct ieee80211_sta *sta)
3685 {
3686         struct iwl_priv *priv = hw->priv;
3687         struct iwl_station_priv *sta_priv = (void *)sta->drv_priv;
3688         bool is_ap = vif->type == NL80211_IFTYPE_STATION;
3689         int ret;
3690         u8 sta_id;
3691
3692         IWL_DEBUG_INFO(priv, "received request to add station %pM\n",
3693                         sta->addr);
3694         mutex_lock(&priv->mutex);
3695         IWL_DEBUG_INFO(priv, "proceeding to add station %pM\n",
3696                         sta->addr);
3697         sta_priv->common.sta_id = IWL_INVALID_STATION;
3698
3699         atomic_set(&sta_priv->pending_frames, 0);
3700         if (vif->type == NL80211_IFTYPE_AP)
3701                 sta_priv->client = true;
3702
3703         ret = iwl_add_station_common(priv, sta->addr, is_ap, &sta->ht_cap,
3704                                      &sta_id);
3705         if (ret) {
3706                 IWL_ERR(priv, "Unable to add station %pM (%d)\n",
3707                         sta->addr, ret);
3708                 /* Should we return success if return code is EEXIST ? */
3709                 mutex_unlock(&priv->mutex);
3710                 return ret;
3711         }
3712
3713         sta_priv->common.sta_id = sta_id;
3714
3715         /* Initialize rate scaling */
3716         IWL_DEBUG_INFO(priv, "Initializing rate scaling for station %pM\n",
3717                        sta->addr);
3718         iwl_rs_rate_init(priv, sta, sta_id);
3719         mutex_unlock(&priv->mutex);
3720
3721         return 0;
3722 }
3723
3724 static void iwl_mac_channel_switch(struct ieee80211_hw *hw,
3725                                    struct ieee80211_channel_switch *ch_switch)
3726 {
3727         struct iwl_priv *priv = hw->priv;
3728         const struct iwl_channel_info *ch_info;
3729         struct ieee80211_conf *conf = &hw->conf;
3730         struct ieee80211_channel *channel = ch_switch->channel;
3731         struct iwl_ht_config *ht_conf = &priv->current_ht_config;
3732         u16 ch;
3733         unsigned long flags = 0;
3734
3735         IWL_DEBUG_MAC80211(priv, "enter\n");
3736
3737         if (iwl_is_rfkill(priv))
3738                 goto out_exit;
3739
3740         if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
3741             test_bit(STATUS_SCANNING, &priv->status))
3742                 goto out_exit;
3743
3744         if (!iwl_is_associated(priv))
3745                 goto out_exit;
3746
3747         /* channel switch in progress */
3748         if (priv->switch_rxon.switch_in_progress == true)
3749                 goto out_exit;
3750
3751         mutex_lock(&priv->mutex);
3752         if (priv->cfg->ops->lib->set_channel_switch) {
3753
3754                 ch = channel->hw_value;
3755                 if (le16_to_cpu(priv->active_rxon.channel) != ch) {
3756                         ch_info = iwl_get_channel_info(priv,
3757                                                        channel->band,
3758                                                        ch);
3759                         if (!is_channel_valid(ch_info)) {
3760                                 IWL_DEBUG_MAC80211(priv, "invalid channel\n");
3761                                 goto out;
3762                         }
3763                         spin_lock_irqsave(&priv->lock, flags);
3764
3765                         priv->current_ht_config.smps = conf->smps_mode;
3766
3767                         /* Configure HT40 channels */
3768                         ht_conf->is_ht = conf_is_ht(conf);
3769                         if (ht_conf->is_ht) {
3770                                 if (conf_is_ht40_minus(conf)) {
3771                                         ht_conf->extension_chan_offset =
3772                                                 IEEE80211_HT_PARAM_CHA_SEC_BELOW;
3773                                         ht_conf->is_40mhz = true;
3774                                 } else if (conf_is_ht40_plus(conf)) {
3775                                         ht_conf->extension_chan_offset =
3776                                                 IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
3777                                         ht_conf->is_40mhz = true;
3778                                 } else {
3779                                         ht_conf->extension_chan_offset =
3780                                                 IEEE80211_HT_PARAM_CHA_SEC_NONE;
3781                                         ht_conf->is_40mhz = false;
3782                                 }
3783                         } else
3784                                 ht_conf->is_40mhz = false;
3785
3786                         if (le16_to_cpu(priv->staging_rxon.channel) != ch)
3787                                 priv->staging_rxon.flags = 0;
3788
3789                         iwl_set_rxon_channel(priv, channel);
3790                         iwl_set_rxon_ht(priv, ht_conf);
3791                         iwl_set_flags_for_band(priv, channel->band,
3792                                                priv->vif);
3793                         spin_unlock_irqrestore(&priv->lock, flags);
3794
3795                         iwl_set_rate(priv);
3796                         /*
3797                          * at this point, staging_rxon has the
3798                          * configuration for channel switch
3799                          */
3800                         if (priv->cfg->ops->lib->set_channel_switch(priv,
3801                                                                     ch_switch))
3802                                 priv->switch_rxon.switch_in_progress = false;
3803                 }
3804         }
3805 out:
3806         mutex_unlock(&priv->mutex);
3807 out_exit:
3808         if (!priv->switch_rxon.switch_in_progress)
3809                 ieee80211_chswitch_done(priv->vif, false);
3810         IWL_DEBUG_MAC80211(priv, "leave\n");
3811 }
3812
3813 static void iwlagn_configure_filter(struct ieee80211_hw *hw,
3814                                     unsigned int changed_flags,
3815                                     unsigned int *total_flags,
3816                                     u64 multicast)
3817 {
3818         struct iwl_priv *priv = hw->priv;
3819         __le32 filter_or = 0, filter_nand = 0;
3820
3821 #define CHK(test, flag) do { \
3822         if (*total_flags & (test))              \
3823                 filter_or |= (flag);            \
3824         else                                    \
3825                 filter_nand |= (flag);          \
3826         } while (0)
3827
3828         IWL_DEBUG_MAC80211(priv, "Enter: changed: 0x%x, total: 0x%x\n",
3829                         changed_flags, *total_flags);
3830
3831         CHK(FIF_OTHER_BSS | FIF_PROMISC_IN_BSS, RXON_FILTER_PROMISC_MSK);
3832         CHK(FIF_CONTROL, RXON_FILTER_CTL2HOST_MSK);
3833         CHK(FIF_BCN_PRBRESP_PROMISC, RXON_FILTER_BCON_AWARE_MSK);
3834
3835 #undef CHK
3836
3837         mutex_lock(&priv->mutex);
3838
3839         priv->staging_rxon.filter_flags &= ~filter_nand;
3840         priv->staging_rxon.filter_flags |= filter_or;
3841
3842         iwlcore_commit_rxon(priv);
3843
3844         mutex_unlock(&priv->mutex);
3845
3846         /*
3847          * Receiving all multicast frames is always enabled by the
3848          * default flags setup in iwl_connection_init_rx_config()
3849          * since we currently do not support programming multicast
3850          * filters into the device.
3851          */
3852         *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS |
3853                         FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
3854 }
3855
3856 static void iwl_mac_flush(struct ieee80211_hw *hw, bool drop)
3857 {
3858         struct iwl_priv *priv = hw->priv;
3859
3860         mutex_lock(&priv->mutex);
3861         IWL_DEBUG_MAC80211(priv, "enter\n");
3862
3863         /* do not support "flush" */
3864         if (!priv->cfg->ops->lib->txfifo_flush)
3865                 goto done;
3866
3867         if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
3868                 IWL_DEBUG_TX(priv, "Aborting flush due to device shutdown\n");
3869                 goto done;
3870         }
3871         if (iwl_is_rfkill(priv)) {
3872                 IWL_DEBUG_TX(priv, "Aborting flush due to RF Kill\n");
3873                 goto done;
3874         }
3875
3876         /*
3877          * mac80211 will not push any more frames for transmit
3878          * until the flush is completed
3879          */
3880         if (drop) {
3881                 IWL_DEBUG_MAC80211(priv, "send flush command\n");
3882                 if (priv->cfg->ops->lib->txfifo_flush(priv, IWL_DROP_ALL)) {
3883                         IWL_ERR(priv, "flush request fail\n");
3884                         goto done;
3885                 }
3886         }
3887         IWL_DEBUG_MAC80211(priv, "wait transmit/flush all frames\n");
3888         iwlagn_wait_tx_queue_empty(priv);
3889 done:
3890         mutex_unlock(&priv->mutex);
3891         IWL_DEBUG_MAC80211(priv, "leave\n");
3892 }
3893
3894 /*****************************************************************************
3895  *
3896  * driver setup and teardown
3897  *
3898  *****************************************************************************/
3899
3900 static void iwl_setup_deferred_work(struct iwl_priv *priv)
3901 {
3902         priv->workqueue = create_singlethread_workqueue(DRV_NAME);
3903
3904         init_waitqueue_head(&priv->wait_command_queue);
3905
3906         INIT_WORK(&priv->restart, iwl_bg_restart);
3907         INIT_WORK(&priv->rx_replenish, iwl_bg_rx_replenish);
3908         INIT_WORK(&priv->beacon_update, iwl_bg_beacon_update);
3909         INIT_WORK(&priv->run_time_calib_work, iwl_bg_run_time_calib_work);
3910         INIT_WORK(&priv->tx_flush, iwl_bg_tx_flush);
3911         INIT_WORK(&priv->bt_full_concurrency, iwl_bg_bt_full_concurrency);
3912         INIT_WORK(&priv->bt_runtime_config, iwl_bg_bt_runtime_config);
3913         INIT_DELAYED_WORK(&priv->init_alive_start, iwl_bg_init_alive_start);
3914         INIT_DELAYED_WORK(&priv->alive_start, iwl_bg_alive_start);
3915
3916         iwl_setup_scan_deferred_work(priv);
3917
3918         if (priv->cfg->ops->lib->setup_deferred_work)
3919                 priv->cfg->ops->lib->setup_deferred_work(priv);
3920
3921         init_timer(&priv->statistics_periodic);
3922         priv->statistics_periodic.data = (unsigned long)priv;
3923         priv->statistics_periodic.function = iwl_bg_statistics_periodic;
3924
3925         init_timer(&priv->ucode_trace);
3926         priv->ucode_trace.data = (unsigned long)priv;
3927         priv->ucode_trace.function = iwl_bg_ucode_trace;
3928
3929         if (priv->cfg->ops->lib->recover_from_tx_stall) {
3930                 init_timer(&priv->monitor_recover);
3931                 priv->monitor_recover.data = (unsigned long)priv;
3932                 priv->monitor_recover.function =
3933                         priv->cfg->ops->lib->recover_from_tx_stall;
3934         }
3935
3936         if (!priv->cfg->use_isr_legacy)
3937                 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
3938                         iwl_irq_tasklet, (unsigned long)priv);
3939         else
3940                 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
3941                         iwl_irq_tasklet_legacy, (unsigned long)priv);
3942 }
3943
3944 static void iwl_cancel_deferred_work(struct iwl_priv *priv)
3945 {
3946         if (priv->cfg->ops->lib->cancel_deferred_work)
3947                 priv->cfg->ops->lib->cancel_deferred_work(priv);
3948
3949         cancel_delayed_work_sync(&priv->init_alive_start);
3950         cancel_delayed_work(&priv->scan_check);
3951         cancel_work_sync(&priv->start_internal_scan);
3952         cancel_delayed_work(&priv->alive_start);
3953         cancel_work_sync(&priv->run_time_calib_work);
3954         cancel_work_sync(&priv->beacon_update);
3955         cancel_work_sync(&priv->bt_full_concurrency);
3956         cancel_work_sync(&priv->bt_runtime_config);
3957         del_timer_sync(&priv->statistics_periodic);
3958         del_timer_sync(&priv->ucode_trace);
3959 }
3960
3961 static void iwl_init_hw_rates(struct iwl_priv *priv,
3962                               struct ieee80211_rate *rates)
3963 {
3964         int i;
3965
3966         for (i = 0; i < IWL_RATE_COUNT_LEGACY; i++) {
3967                 rates[i].bitrate = iwl_rates[i].ieee * 5;
3968                 rates[i].hw_value = i; /* Rate scaling will work on indexes */
3969                 rates[i].hw_value_short = i;
3970                 rates[i].flags = 0;
3971                 if ((i >= IWL_FIRST_CCK_RATE) && (i <= IWL_LAST_CCK_RATE)) {
3972                         /*
3973                          * If CCK != 1M then set short preamble rate flag.
3974                          */
3975                         rates[i].flags |=
3976                                 (iwl_rates[i].plcp == IWL_RATE_1M_PLCP) ?
3977                                         0 : IEEE80211_RATE_SHORT_PREAMBLE;
3978                 }
3979         }
3980 }
3981
3982 static int iwl_init_drv(struct iwl_priv *priv)
3983 {
3984         int ret;
3985
3986         priv->ibss_beacon = NULL;
3987
3988         spin_lock_init(&priv->sta_lock);
3989         spin_lock_init(&priv->hcmd_lock);
3990
3991         INIT_LIST_HEAD(&priv->free_frames);
3992
3993         mutex_init(&priv->mutex);
3994         mutex_init(&priv->sync_cmd_mutex);
3995
3996         priv->ieee_channels = NULL;
3997         priv->ieee_rates = NULL;
3998         priv->band = IEEE80211_BAND_2GHZ;
3999
4000         priv->iw_mode = NL80211_IFTYPE_STATION;
4001         priv->current_ht_config.smps = IEEE80211_SMPS_STATIC;
4002         priv->missed_beacon_threshold = IWL_MISSED_BEACON_THRESHOLD_DEF;
4003         priv->_agn.agg_tids_count = 0;
4004
4005         /* initialize force reset */
4006         priv->force_reset[IWL_RF_RESET].reset_duration =
4007                 IWL_DELAY_NEXT_FORCE_RF_RESET;
4008         priv->force_reset[IWL_FW_RESET].reset_duration =
4009                 IWL_DELAY_NEXT_FORCE_FW_RELOAD;
4010
4011         /* Choose which receivers/antennas to use */
4012         if (priv->cfg->ops->hcmd->set_rxon_chain)
4013                 priv->cfg->ops->hcmd->set_rxon_chain(priv);
4014
4015         iwl_init_scan_params(priv);
4016
4017         /* init bt coex */
4018         if (priv->cfg->advanced_bt_coexist) {
4019                 priv->kill_ack_mask = IWL6000G2B_BT_KILL_ACK_MASK_DEFAULT;
4020                 priv->kill_cts_mask = IWL6000G2B_BT_KILL_CTS_MASK_DEFAULT;
4021                 priv->bt_valid = IWL6000G2B_BT_ALL_VALID_MSK;
4022                 priv->bt_on_thresh = BT_ON_THRESHOLD_DEF;
4023                 priv->bt_duration = BT_DURATION_LIMIT_DEF;
4024                 priv->dynamic_frag_thresh = BT_FRAG_THRESHOLD_DEF;
4025                 priv->dynamic_agg_thresh = BT_AGG_THRESHOLD_DEF;
4026         }
4027
4028         /* Set the tx_power_user_lmt to the lowest power level
4029          * this value will get overwritten by channel max power avg
4030          * from eeprom */
4031         priv->tx_power_user_lmt = IWLAGN_TX_POWER_TARGET_POWER_MIN;
4032
4033         ret = iwl_init_channel_map(priv);
4034         if (ret) {
4035                 IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
4036                 goto err;
4037         }
4038
4039         ret = iwlcore_init_geos(priv);
4040         if (ret) {
4041                 IWL_ERR(priv, "initializing geos failed: %d\n", ret);
4042                 goto err_free_channel_map;
4043         }
4044         iwl_init_hw_rates(priv, priv->ieee_rates);
4045
4046         return 0;
4047
4048 err_free_channel_map:
4049         iwl_free_channel_map(priv);
4050 err:
4051         return ret;
4052 }
4053
4054 static void iwl_uninit_drv(struct iwl_priv *priv)
4055 {
4056         iwl_calib_free_results(priv);
4057         iwlcore_free_geos(priv);
4058         iwl_free_channel_map(priv);
4059         kfree(priv->scan_cmd);
4060 }
4061
4062 static struct ieee80211_ops iwl_hw_ops = {
4063         .tx = iwl_mac_tx,
4064         .start = iwl_mac_start,
4065         .stop = iwl_mac_stop,
4066         .add_interface = iwl_mac_add_interface,
4067         .remove_interface = iwl_mac_remove_interface,
4068         .config = iwl_mac_config,
4069         .configure_filter = iwlagn_configure_filter,
4070         .set_key = iwl_mac_set_key,
4071         .update_tkip_key = iwl_mac_update_tkip_key,
4072         .conf_tx = iwl_mac_conf_tx,
4073         .reset_tsf = iwl_mac_reset_tsf,
4074         .bss_info_changed = iwl_bss_info_changed,
4075         .ampdu_action = iwl_mac_ampdu_action,
4076         .hw_scan = iwl_mac_hw_scan,
4077         .sta_notify = iwl_mac_sta_notify,
4078         .sta_add = iwlagn_mac_sta_add,
4079         .sta_remove = iwl_mac_sta_remove,
4080         .channel_switch = iwl_mac_channel_switch,
4081         .flush = iwl_mac_flush,
4082         .tx_last_beacon = iwl_mac_tx_last_beacon,
4083 };
4084
4085 static void iwl_hw_detect(struct iwl_priv *priv)
4086 {
4087         priv->hw_rev = _iwl_read32(priv, CSR_HW_REV);
4088         priv->hw_wa_rev = _iwl_read32(priv, CSR_HW_REV_WA_REG);
4089         pci_read_config_byte(priv->pci_dev, PCI_REVISION_ID, &priv->rev_id);
4090         IWL_DEBUG_INFO(priv, "HW Revision ID = 0x%X\n", priv->rev_id);
4091 }
4092
4093 static int iwl_set_hw_params(struct iwl_priv *priv)
4094 {
4095         priv->hw_params.max_rxq_size = RX_QUEUE_SIZE;
4096         priv->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG;
4097         if (priv->cfg->mod_params->amsdu_size_8K)
4098                 priv->hw_params.rx_page_order = get_order(IWL_RX_BUF_SIZE_8K);
4099         else
4100                 priv->hw_params.rx_page_order = get_order(IWL_RX_BUF_SIZE_4K);
4101
4102         priv->hw_params.max_beacon_itrvl = IWL_MAX_UCODE_BEACON_INTERVAL;
4103
4104         if (priv->cfg->mod_params->disable_11n)
4105                 priv->cfg->sku &= ~IWL_SKU_N;
4106
4107         /* Device-specific setup */
4108         return priv->cfg->ops->lib->set_hw_params(priv);
4109 }
4110
4111 static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
4112 {
4113         int err = 0;
4114         struct iwl_priv *priv;
4115         struct ieee80211_hw *hw;
4116         struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
4117         unsigned long flags;
4118         u16 pci_cmd, num_mac;
4119
4120         /************************
4121          * 1. Allocating HW data
4122          ************************/
4123
4124         /* Disabling hardware scan means that mac80211 will perform scans
4125          * "the hard way", rather than using device's scan. */
4126         if (cfg->mod_params->disable_hw_scan) {
4127                 if (iwl_debug_level & IWL_DL_INFO)
4128                         dev_printk(KERN_DEBUG, &(pdev->dev),
4129                                    "Disabling hw_scan\n");
4130                 iwl_hw_ops.hw_scan = NULL;
4131         }
4132
4133         hw = iwl_alloc_all(cfg, &iwl_hw_ops);
4134         if (!hw) {
4135                 err = -ENOMEM;
4136                 goto out;
4137         }
4138         priv = hw->priv;
4139         /* At this point both hw and priv are allocated. */
4140
4141         SET_IEEE80211_DEV(hw, &pdev->dev);
4142
4143         IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
4144         priv->cfg = cfg;
4145         priv->pci_dev = pdev;
4146         priv->inta_mask = CSR_INI_SET_MASK;
4147
4148         /* is antenna coupling more than 35dB ? */
4149         priv->bt_ant_couple_ok =
4150                 (iwlagn_ant_coupling > IWL_BT_ANTENNA_COUPLING_THRESHOLD) ?
4151                 true : false;
4152
4153         if (iwl_alloc_traffic_mem(priv))
4154                 IWL_ERR(priv, "Not enough memory to generate traffic log\n");
4155
4156         /**************************
4157          * 2. Initializing PCI bus
4158          **************************/
4159         pci_disable_link_state(pdev, PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1 |
4160                                 PCIE_LINK_STATE_CLKPM);
4161
4162         if (pci_enable_device(pdev)) {
4163                 err = -ENODEV;
4164                 goto out_ieee80211_free_hw;
4165         }
4166
4167         pci_set_master(pdev);
4168
4169         err = pci_set_dma_mask(pdev, DMA_BIT_MASK(36));
4170         if (!err)
4171                 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(36));
4172         if (err) {
4173                 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
4174                 if (!err)
4175                         err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
4176                 /* both attempts failed: */
4177                 if (err) {
4178                         IWL_WARN(priv, "No suitable DMA available.\n");
4179                         goto out_pci_disable_device;
4180                 }
4181         }
4182
4183         err = pci_request_regions(pdev, DRV_NAME);
4184         if (err)
4185                 goto out_pci_disable_device;
4186
4187         pci_set_drvdata(pdev, priv);
4188
4189
4190         /***********************
4191          * 3. Read REV register
4192          ***********************/
4193         priv->hw_base = pci_iomap(pdev, 0, 0);
4194         if (!priv->hw_base) {
4195                 err = -ENODEV;
4196                 goto out_pci_release_regions;
4197         }
4198
4199         IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
4200                 (unsigned long long) pci_resource_len(pdev, 0));
4201         IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
4202
4203         /* these spin locks will be used in apm_ops.init and EEPROM access
4204          * we should init now
4205          */
4206         spin_lock_init(&priv->reg_lock);
4207         spin_lock_init(&priv->lock);
4208
4209         /*
4210          * stop and reset the on-board processor just in case it is in a
4211          * strange state ... like being left stranded by a primary kernel
4212          * and this is now the kdump kernel trying to start up
4213          */
4214         iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
4215
4216         iwl_hw_detect(priv);
4217         IWL_INFO(priv, "Detected %s, REV=0x%X\n",
4218                 priv->cfg->name, priv->hw_rev);
4219
4220         /* We disable the RETRY_TIMEOUT register (0x41) to keep
4221          * PCI Tx retries from interfering with C3 CPU state */
4222         pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
4223
4224         iwl_prepare_card_hw(priv);
4225         if (!priv->hw_ready) {
4226                 IWL_WARN(priv, "Failed, HW not ready\n");
4227                 goto out_iounmap;
4228         }
4229
4230         /*****************
4231          * 4. Read EEPROM
4232          *****************/
4233         /* Read the EEPROM */
4234         err = iwl_eeprom_init(priv);
4235         if (err) {
4236                 IWL_ERR(priv, "Unable to init EEPROM\n");
4237                 goto out_iounmap;
4238         }
4239         err = iwl_eeprom_check_version(priv);
4240         if (err)
4241                 goto out_free_eeprom;
4242
4243         /* extract MAC Address */
4244         iwl_eeprom_get_mac(priv, priv->addresses[0].addr);
4245         IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->addresses[0].addr);
4246         priv->hw->wiphy->addresses = priv->addresses;
4247         priv->hw->wiphy->n_addresses = 1;
4248         num_mac = iwl_eeprom_query16(priv, EEPROM_NUM_MAC_ADDRESS);
4249         if (num_mac > 1) {
4250                 memcpy(priv->addresses[1].addr, priv->addresses[0].addr,
4251                        ETH_ALEN);
4252                 priv->addresses[1].addr[5]++;
4253                 priv->hw->wiphy->n_addresses++;
4254         }
4255
4256         /************************
4257          * 5. Setup HW constants
4258          ************************/
4259         if (iwl_set_hw_params(priv)) {
4260                 IWL_ERR(priv, "failed to set hw parameters\n");
4261                 goto out_free_eeprom;
4262         }
4263
4264         /*******************
4265          * 6. Setup priv
4266          *******************/
4267
4268         err = iwl_init_drv(priv);
4269         if (err)
4270                 goto out_free_eeprom;
4271         /* At this point both hw and priv are initialized. */
4272
4273         /********************
4274          * 7. Setup services
4275          ********************/
4276         spin_lock_irqsave(&priv->lock, flags);
4277         iwl_disable_interrupts(priv);
4278         spin_unlock_irqrestore(&priv->lock, flags);
4279
4280         pci_enable_msi(priv->pci_dev);
4281
4282         iwl_alloc_isr_ict(priv);
4283         err = request_irq(priv->pci_dev->irq, priv->cfg->ops->lib->isr,
4284                           IRQF_SHARED, DRV_NAME, priv);
4285         if (err) {
4286                 IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
4287                 goto out_disable_msi;
4288         }
4289
4290         iwl_setup_deferred_work(priv);
4291         iwl_setup_rx_handlers(priv);
4292
4293         /*********************************************
4294          * 8. Enable interrupts and read RFKILL state
4295          *********************************************/
4296
4297         /* enable interrupts if needed: hw bug w/a */
4298         pci_read_config_word(priv->pci_dev, PCI_COMMAND, &pci_cmd);
4299         if (pci_cmd & PCI_COMMAND_INTX_DISABLE) {
4300                 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
4301                 pci_write_config_word(priv->pci_dev, PCI_COMMAND, pci_cmd);
4302         }
4303
4304         iwl_enable_interrupts(priv);
4305
4306         /* If platform's RF_KILL switch is NOT set to KILL */
4307         if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
4308                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
4309         else
4310                 set_bit(STATUS_RF_KILL_HW, &priv->status);
4311
4312         wiphy_rfkill_set_hw_state(priv->hw->wiphy,
4313                 test_bit(STATUS_RF_KILL_HW, &priv->status));
4314
4315         iwl_power_initialize(priv);
4316         iwl_tt_initialize(priv);
4317
4318         init_completion(&priv->_agn.firmware_loading_complete);
4319
4320         err = iwl_request_firmware(priv, true);
4321         if (err)
4322                 goto out_destroy_workqueue;
4323
4324         return 0;
4325
4326  out_destroy_workqueue:
4327         destroy_workqueue(priv->workqueue);
4328         priv->workqueue = NULL;
4329         free_irq(priv->pci_dev->irq, priv);
4330         iwl_free_isr_ict(priv);
4331  out_disable_msi:
4332         pci_disable_msi(priv->pci_dev);
4333         iwl_uninit_drv(priv);
4334  out_free_eeprom:
4335         iwl_eeprom_free(priv);
4336  out_iounmap:
4337         pci_iounmap(pdev, priv->hw_base);
4338  out_pci_release_regions:
4339         pci_set_drvdata(pdev, NULL);
4340         pci_release_regions(pdev);
4341  out_pci_disable_device:
4342         pci_disable_device(pdev);
4343  out_ieee80211_free_hw:
4344         iwl_free_traffic_mem(priv);
4345         ieee80211_free_hw(priv->hw);
4346  out:
4347         return err;
4348 }
4349
4350 static void __devexit iwl_pci_remove(struct pci_dev *pdev)
4351 {
4352         struct iwl_priv *priv = pci_get_drvdata(pdev);
4353         unsigned long flags;
4354
4355         if (!priv)
4356                 return;
4357
4358         wait_for_completion(&priv->_agn.firmware_loading_complete);
4359
4360         IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
4361
4362         iwl_dbgfs_unregister(priv);
4363         sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
4364
4365         /* ieee80211_unregister_hw call wil cause iwl_mac_stop to
4366          * to be called and iwl_down since we are removing the device
4367          * we need to set STATUS_EXIT_PENDING bit.
4368          */
4369         set_bit(STATUS_EXIT_PENDING, &priv->status);
4370         if (priv->mac80211_registered) {
4371                 ieee80211_unregister_hw(priv->hw);
4372                 priv->mac80211_registered = 0;
4373         } else {
4374                 iwl_down(priv);
4375         }
4376
4377         /*
4378          * Make sure device is reset to low power before unloading driver.
4379          * This may be redundant with iwl_down(), but there are paths to
4380          * run iwl_down() without calling apm_ops.stop(), and there are
4381          * paths to avoid running iwl_down() at all before leaving driver.
4382          * This (inexpensive) call *makes sure* device is reset.
4383          */
4384         priv->cfg->ops->lib->apm_ops.stop(priv);
4385
4386         iwl_tt_exit(priv);
4387
4388         /* make sure we flush any pending irq or
4389          * tasklet for the driver
4390          */
4391         spin_lock_irqsave(&priv->lock, flags);
4392         iwl_disable_interrupts(priv);
4393         spin_unlock_irqrestore(&priv->lock, flags);
4394
4395         iwl_synchronize_irq(priv);
4396
4397         iwl_dealloc_ucode_pci(priv);
4398
4399         if (priv->rxq.bd)
4400                 iwlagn_rx_queue_free(priv, &priv->rxq);
4401         iwlagn_hw_txq_ctx_free(priv);
4402
4403         iwl_eeprom_free(priv);
4404
4405
4406         /*netif_stop_queue(dev); */
4407         flush_workqueue(priv->workqueue);
4408
4409         /* ieee80211_unregister_hw calls iwl_mac_stop, which flushes
4410          * priv->workqueue... so we can't take down the workqueue
4411          * until now... */
4412         destroy_workqueue(priv->workqueue);
4413         priv->workqueue = NULL;
4414         iwl_free_traffic_mem(priv);
4415
4416         free_irq(priv->pci_dev->irq, priv);
4417         pci_disable_msi(priv->pci_dev);
4418         pci_iounmap(pdev, priv->hw_base);
4419         pci_release_regions(pdev);
4420         pci_disable_device(pdev);
4421         pci_set_drvdata(pdev, NULL);
4422
4423         iwl_uninit_drv(priv);
4424
4425         iwl_free_isr_ict(priv);
4426
4427         if (priv->ibss_beacon)
4428                 dev_kfree_skb(priv->ibss_beacon);
4429
4430         ieee80211_free_hw(priv->hw);
4431 }
4432
4433
4434 /*****************************************************************************
4435  *
4436  * driver and module entry point
4437  *
4438  *****************************************************************************/
4439
4440 /* Hardware specific file defines the PCI IDs table for that hardware module */
4441 static DEFINE_PCI_DEVICE_TABLE(iwl_hw_card_ids) = {
4442 #ifdef CONFIG_IWL4965
4443         {IWL_PCI_DEVICE(0x4229, PCI_ANY_ID, iwl4965_agn_cfg)},
4444         {IWL_PCI_DEVICE(0x4230, PCI_ANY_ID, iwl4965_agn_cfg)},
4445 #endif /* CONFIG_IWL4965 */
4446 #ifdef CONFIG_IWL5000
4447 /* 5100 Series WiFi */
4448         {IWL_PCI_DEVICE(0x4232, 0x1201, iwl5100_agn_cfg)}, /* Mini Card */
4449         {IWL_PCI_DEVICE(0x4232, 0x1301, iwl5100_agn_cfg)}, /* Half Mini Card */
4450         {IWL_PCI_DEVICE(0x4232, 0x1204, iwl5100_agn_cfg)}, /* Mini Card */
4451         {IWL_PCI_DEVICE(0x4232, 0x1304, iwl5100_agn_cfg)}, /* Half Mini Card */
4452         {IWL_PCI_DEVICE(0x4232, 0x1205, iwl5100_bgn_cfg)}, /* Mini Card */
4453         {IWL_PCI_DEVICE(0x4232, 0x1305, iwl5100_bgn_cfg)}, /* Half Mini Card */
4454         {IWL_PCI_DEVICE(0x4232, 0x1206, iwl5100_abg_cfg)}, /* Mini Card */
4455         {IWL_PCI_DEVICE(0x4232, 0x1306, iwl5100_abg_cfg)}, /* Half Mini Card */
4456         {IWL_PCI_DEVICE(0x4232, 0x1221, iwl5100_agn_cfg)}, /* Mini Card */
4457         {IWL_PCI_DEVICE(0x4232, 0x1321, iwl5100_agn_cfg)}, /* Half Mini Card */
4458         {IWL_PCI_DEVICE(0x4232, 0x1224, iwl5100_agn_cfg)}, /* Mini Card */
4459         {IWL_PCI_DEVICE(0x4232, 0x1324, iwl5100_agn_cfg)}, /* Half Mini Card */
4460         {IWL_PCI_DEVICE(0x4232, 0x1225, iwl5100_bgn_cfg)}, /* Mini Card */
4461         {IWL_PCI_DEVICE(0x4232, 0x1325, iwl5100_bgn_cfg)}, /* Half Mini Card */
4462         {IWL_PCI_DEVICE(0x4232, 0x1226, iwl5100_abg_cfg)}, /* Mini Card */
4463         {IWL_PCI_DEVICE(0x4232, 0x1326, iwl5100_abg_cfg)}, /* Half Mini Card */
4464         {IWL_PCI_DEVICE(0x4237, 0x1211, iwl5100_agn_cfg)}, /* Mini Card */
4465         {IWL_PCI_DEVICE(0x4237, 0x1311, iwl5100_agn_cfg)}, /* Half Mini Card */
4466         {IWL_PCI_DEVICE(0x4237, 0x1214, iwl5100_agn_cfg)}, /* Mini Card */
4467         {IWL_PCI_DEVICE(0x4237, 0x1314, iwl5100_agn_cfg)}, /* Half Mini Card */
4468         {IWL_PCI_DEVICE(0x4237, 0x1215, iwl5100_bgn_cfg)}, /* Mini Card */
4469         {IWL_PCI_DEVICE(0x4237, 0x1315, iwl5100_bgn_cfg)}, /* Half Mini Card */
4470         {IWL_PCI_DEVICE(0x4237, 0x1216, iwl5100_abg_cfg)}, /* Mini Card */
4471         {IWL_PCI_DEVICE(0x4237, 0x1316, iwl5100_abg_cfg)}, /* Half Mini Card */
4472
4473 /* 5300 Series WiFi */
4474         {IWL_PCI_DEVICE(0x4235, 0x1021, iwl5300_agn_cfg)}, /* Mini Card */
4475         {IWL_PCI_DEVICE(0x4235, 0x1121, iwl5300_agn_cfg)}, /* Half Mini Card */
4476         {IWL_PCI_DEVICE(0x4235, 0x1024, iwl5300_agn_cfg)}, /* Mini Card */
4477         {IWL_PCI_DEVICE(0x4235, 0x1124, iwl5300_agn_cfg)}, /* Half Mini Card */
4478         {IWL_PCI_DEVICE(0x4235, 0x1001, iwl5300_agn_cfg)}, /* Mini Card */
4479         {IWL_PCI_DEVICE(0x4235, 0x1101, iwl5300_agn_cfg)}, /* Half Mini Card */
4480         {IWL_PCI_DEVICE(0x4235, 0x1004, iwl5300_agn_cfg)}, /* Mini Card */
4481         {IWL_PCI_DEVICE(0x4235, 0x1104, iwl5300_agn_cfg)}, /* Half Mini Card */
4482         {IWL_PCI_DEVICE(0x4236, 0x1011, iwl5300_agn_cfg)}, /* Mini Card */
4483         {IWL_PCI_DEVICE(0x4236, 0x1111, iwl5300_agn_cfg)}, /* Half Mini Card */
4484         {IWL_PCI_DEVICE(0x4236, 0x1014, iwl5300_agn_cfg)}, /* Mini Card */
4485         {IWL_PCI_DEVICE(0x4236, 0x1114, iwl5300_agn_cfg)}, /* Half Mini Card */
4486
4487 /* 5350 Series WiFi/WiMax */
4488         {IWL_PCI_DEVICE(0x423A, 0x1001, iwl5350_agn_cfg)}, /* Mini Card */
4489         {IWL_PCI_DEVICE(0x423A, 0x1021, iwl5350_agn_cfg)}, /* Mini Card */
4490         {IWL_PCI_DEVICE(0x423B, 0x1011, iwl5350_agn_cfg)}, /* Mini Card */
4491
4492 /* 5150 Series Wifi/WiMax */
4493         {IWL_PCI_DEVICE(0x423C, 0x1201, iwl5150_agn_cfg)}, /* Mini Card */
4494         {IWL_PCI_DEVICE(0x423C, 0x1301, iwl5150_agn_cfg)}, /* Half Mini Card */
4495         {IWL_PCI_DEVICE(0x423C, 0x1206, iwl5150_abg_cfg)}, /* Mini Card */
4496         {IWL_PCI_DEVICE(0x423C, 0x1306, iwl5150_abg_cfg)}, /* Half Mini Card */
4497         {IWL_PCI_DEVICE(0x423C, 0x1221, iwl5150_agn_cfg)}, /* Mini Card */
4498         {IWL_PCI_DEVICE(0x423C, 0x1321, iwl5150_agn_cfg)}, /* Half Mini Card */
4499
4500         {IWL_PCI_DEVICE(0x423D, 0x1211, iwl5150_agn_cfg)}, /* Mini Card */
4501         {IWL_PCI_DEVICE(0x423D, 0x1311, iwl5150_agn_cfg)}, /* Half Mini Card */
4502         {IWL_PCI_DEVICE(0x423D, 0x1216, iwl5150_abg_cfg)}, /* Mini Card */
4503         {IWL_PCI_DEVICE(0x423D, 0x1316, iwl5150_abg_cfg)}, /* Half Mini Card */
4504
4505 /* 6x00 Series */
4506         {IWL_PCI_DEVICE(0x422B, 0x1101, iwl6000_3agn_cfg)},
4507         {IWL_PCI_DEVICE(0x422B, 0x1121, iwl6000_3agn_cfg)},
4508         {IWL_PCI_DEVICE(0x422C, 0x1301, iwl6000i_2agn_cfg)},
4509         {IWL_PCI_DEVICE(0x422C, 0x1306, iwl6000i_2abg_cfg)},
4510         {IWL_PCI_DEVICE(0x422C, 0x1307, iwl6000i_2bg_cfg)},
4511         {IWL_PCI_DEVICE(0x422C, 0x1321, iwl6000i_2agn_cfg)},
4512         {IWL_PCI_DEVICE(0x422C, 0x1326, iwl6000i_2abg_cfg)},
4513         {IWL_PCI_DEVICE(0x4238, 0x1111, iwl6000_3agn_cfg)},
4514         {IWL_PCI_DEVICE(0x4239, 0x1311, iwl6000i_2agn_cfg)},
4515         {IWL_PCI_DEVICE(0x4239, 0x1316, iwl6000i_2abg_cfg)},
4516
4517 /* 6x00 Series Gen2a */
4518         {IWL_PCI_DEVICE(0x0082, 0x1201, iwl6000g2a_2agn_cfg)},
4519         {IWL_PCI_DEVICE(0x0085, 0x1211, iwl6000g2a_2agn_cfg)},
4520         {IWL_PCI_DEVICE(0x0082, 0x1221, iwl6000g2a_2agn_cfg)},
4521         {IWL_PCI_DEVICE(0x0082, 0x1206, iwl6000g2a_2abg_cfg)},
4522         {IWL_PCI_DEVICE(0x0085, 0x1216, iwl6000g2a_2abg_cfg)},
4523         {IWL_PCI_DEVICE(0x0082, 0x1226, iwl6000g2a_2abg_cfg)},
4524         {IWL_PCI_DEVICE(0x0082, 0x1207, iwl6000g2a_2bg_cfg)},
4525         {IWL_PCI_DEVICE(0x0082, 0x1301, iwl6000g2a_2agn_cfg)},
4526         {IWL_PCI_DEVICE(0x0082, 0x1306, iwl6000g2a_2abg_cfg)},
4527         {IWL_PCI_DEVICE(0x0082, 0x1307, iwl6000g2a_2bg_cfg)},
4528         {IWL_PCI_DEVICE(0x0082, 0x1321, iwl6000g2a_2agn_cfg)},
4529         {IWL_PCI_DEVICE(0x0082, 0x1326, iwl6000g2a_2abg_cfg)},
4530         {IWL_PCI_DEVICE(0x0085, 0x1311, iwl6000g2a_2agn_cfg)},
4531         {IWL_PCI_DEVICE(0x0085, 0x1316, iwl6000g2a_2abg_cfg)},
4532
4533 /* 6x00 Series Gen2b */
4534         {IWL_PCI_DEVICE(0x008F, 0x5105, iwl6000g2b_bgn_cfg)},
4535         {IWL_PCI_DEVICE(0x0090, 0x5115, iwl6000g2b_bgn_cfg)},
4536         {IWL_PCI_DEVICE(0x008F, 0x5125, iwl6000g2b_bgn_cfg)},
4537         {IWL_PCI_DEVICE(0x008F, 0x5107, iwl6000g2b_bg_cfg)},
4538         {IWL_PCI_DEVICE(0x008F, 0x5201, iwl6000g2b_2agn_cfg)},
4539         {IWL_PCI_DEVICE(0x0090, 0x5211, iwl6000g2b_2agn_cfg)},
4540         {IWL_PCI_DEVICE(0x008F, 0x5221, iwl6000g2b_2agn_cfg)},
4541         {IWL_PCI_DEVICE(0x008F, 0x5206, iwl6000g2b_2abg_cfg)},
4542         {IWL_PCI_DEVICE(0x0090, 0x5216, iwl6000g2b_2abg_cfg)},
4543         {IWL_PCI_DEVICE(0x008F, 0x5226, iwl6000g2b_2abg_cfg)},
4544         {IWL_PCI_DEVICE(0x008F, 0x5207, iwl6000g2b_2bg_cfg)},
4545         {IWL_PCI_DEVICE(0x008A, 0x5301, iwl6000g2b_bgn_cfg)},
4546         {IWL_PCI_DEVICE(0x008A, 0x5305, iwl6000g2b_bgn_cfg)},
4547         {IWL_PCI_DEVICE(0x008A, 0x5307, iwl6000g2b_bg_cfg)},
4548         {IWL_PCI_DEVICE(0x008A, 0x5321, iwl6000g2b_bgn_cfg)},
4549         {IWL_PCI_DEVICE(0x008A, 0x5325, iwl6000g2b_bgn_cfg)},
4550         {IWL_PCI_DEVICE(0x008B, 0x5311, iwl6000g2b_bgn_cfg)},
4551         {IWL_PCI_DEVICE(0x008B, 0x5315, iwl6000g2b_bgn_cfg)},
4552         {IWL_PCI_DEVICE(0x0090, 0x5211, iwl6000g2b_2agn_cfg)},
4553         {IWL_PCI_DEVICE(0x0090, 0x5215, iwl6000g2b_2bgn_cfg)},
4554         {IWL_PCI_DEVICE(0x0090, 0x5216, iwl6000g2b_2abg_cfg)},
4555         {IWL_PCI_DEVICE(0x0091, 0x5201, iwl6000g2b_2agn_cfg)},
4556         {IWL_PCI_DEVICE(0x0091, 0x5205, iwl6000g2b_2bgn_cfg)},
4557         {IWL_PCI_DEVICE(0x0091, 0x5206, iwl6000g2b_2abg_cfg)},
4558         {IWL_PCI_DEVICE(0x0091, 0x5207, iwl6000g2b_2bg_cfg)},
4559         {IWL_PCI_DEVICE(0x0091, 0x5221, iwl6000g2b_2agn_cfg)},
4560         {IWL_PCI_DEVICE(0x0091, 0x5225, iwl6000g2b_2bgn_cfg)},
4561         {IWL_PCI_DEVICE(0x0091, 0x5226, iwl6000g2b_2abg_cfg)},
4562
4563 /* 6x50 WiFi/WiMax Series */
4564         {IWL_PCI_DEVICE(0x0087, 0x1301, iwl6050_2agn_cfg)},
4565         {IWL_PCI_DEVICE(0x0087, 0x1306, iwl6050_2abg_cfg)},
4566         {IWL_PCI_DEVICE(0x0087, 0x1321, iwl6050_2agn_cfg)},
4567         {IWL_PCI_DEVICE(0x0087, 0x1326, iwl6050_2abg_cfg)},
4568         {IWL_PCI_DEVICE(0x0089, 0x1311, iwl6050_2agn_cfg)},
4569         {IWL_PCI_DEVICE(0x0089, 0x1316, iwl6050_2abg_cfg)},
4570
4571 /* 6x50 WiFi/WiMax Series Gen2 */
4572         {IWL_PCI_DEVICE(0x0885, 0x1305, iwl6050g2_bgn_cfg)},
4573         {IWL_PCI_DEVICE(0x0885, 0x1306, iwl6050g2_bgn_cfg)},
4574         {IWL_PCI_DEVICE(0x0885, 0x1325, iwl6050g2_bgn_cfg)},
4575         {IWL_PCI_DEVICE(0x0885, 0x1326, iwl6050g2_bgn_cfg)},
4576         {IWL_PCI_DEVICE(0x0886, 0x1315, iwl6050g2_bgn_cfg)},
4577         {IWL_PCI_DEVICE(0x0886, 0x1316, iwl6050g2_bgn_cfg)},
4578
4579 /* 1000 Series WiFi */
4580         {IWL_PCI_DEVICE(0x0083, 0x1205, iwl1000_bgn_cfg)},
4581         {IWL_PCI_DEVICE(0x0083, 0x1305, iwl1000_bgn_cfg)},
4582         {IWL_PCI_DEVICE(0x0083, 0x1225, iwl1000_bgn_cfg)},
4583         {IWL_PCI_DEVICE(0x0083, 0x1325, iwl1000_bgn_cfg)},
4584         {IWL_PCI_DEVICE(0x0084, 0x1215, iwl1000_bgn_cfg)},
4585         {IWL_PCI_DEVICE(0x0084, 0x1315, iwl1000_bgn_cfg)},
4586         {IWL_PCI_DEVICE(0x0083, 0x1206, iwl1000_bg_cfg)},
4587         {IWL_PCI_DEVICE(0x0083, 0x1306, iwl1000_bg_cfg)},
4588         {IWL_PCI_DEVICE(0x0083, 0x1226, iwl1000_bg_cfg)},
4589         {IWL_PCI_DEVICE(0x0083, 0x1326, iwl1000_bg_cfg)},
4590         {IWL_PCI_DEVICE(0x0084, 0x1216, iwl1000_bg_cfg)},
4591         {IWL_PCI_DEVICE(0x0084, 0x1316, iwl1000_bg_cfg)},
4592 #endif /* CONFIG_IWL5000 */
4593
4594         {0}
4595 };
4596 MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids);
4597
4598 static struct pci_driver iwl_driver = {
4599         .name = DRV_NAME,
4600         .id_table = iwl_hw_card_ids,
4601         .probe = iwl_pci_probe,
4602         .remove = __devexit_p(iwl_pci_remove),
4603 #ifdef CONFIG_PM
4604         .suspend = iwl_pci_suspend,
4605         .resume = iwl_pci_resume,
4606 #endif
4607 };
4608
4609 static int __init iwl_init(void)
4610 {
4611
4612         int ret;
4613         pr_info(DRV_DESCRIPTION ", " DRV_VERSION "\n");
4614         pr_info(DRV_COPYRIGHT "\n");
4615
4616         ret = iwlagn_rate_control_register();
4617         if (ret) {
4618                 pr_err("Unable to register rate control algorithm: %d\n", ret);
4619                 return ret;
4620         }
4621
4622         ret = pci_register_driver(&iwl_driver);
4623         if (ret) {
4624                 pr_err("Unable to initialize PCI module\n");
4625                 goto error_register;
4626         }
4627
4628         return ret;
4629
4630 error_register:
4631         iwlagn_rate_control_unregister();
4632         return ret;
4633 }
4634
4635 static void __exit iwl_exit(void)
4636 {
4637         pci_unregister_driver(&iwl_driver);
4638         iwlagn_rate_control_unregister();
4639 }
4640
4641 module_exit(iwl_exit);
4642 module_init(iwl_init);
4643
4644 #ifdef CONFIG_IWLWIFI_DEBUG
4645 module_param_named(debug50, iwl_debug_level, uint, S_IRUGO);
4646 MODULE_PARM_DESC(debug50, "50XX debug output mask (deprecated)");
4647 module_param_named(debug, iwl_debug_level, uint, S_IRUGO | S_IWUSR);
4648 MODULE_PARM_DESC(debug, "debug output mask");
4649 #endif
4650
4651 module_param_named(swcrypto50, iwlagn_mod_params.sw_crypto, bool, S_IRUGO);
4652 MODULE_PARM_DESC(swcrypto50,
4653                  "using crypto in software (default 0 [hardware]) (deprecated)");
4654 module_param_named(swcrypto, iwlagn_mod_params.sw_crypto, int, S_IRUGO);
4655 MODULE_PARM_DESC(swcrypto, "using crypto in software (default 0 [hardware])");
4656 module_param_named(queues_num50,
4657                    iwlagn_mod_params.num_of_queues, int, S_IRUGO);
4658 MODULE_PARM_DESC(queues_num50,
4659                  "number of hw queues in 50xx series (deprecated)");
4660 module_param_named(queues_num, iwlagn_mod_params.num_of_queues, int, S_IRUGO);
4661 MODULE_PARM_DESC(queues_num, "number of hw queues.");
4662 module_param_named(11n_disable50, iwlagn_mod_params.disable_11n, int, S_IRUGO);
4663 MODULE_PARM_DESC(11n_disable50, "disable 50XX 11n functionality (deprecated)");
4664 module_param_named(11n_disable, iwlagn_mod_params.disable_11n, int, S_IRUGO);
4665 MODULE_PARM_DESC(11n_disable, "disable 11n functionality");
4666 module_param_named(amsdu_size_8K50, iwlagn_mod_params.amsdu_size_8K,
4667                    int, S_IRUGO);
4668 MODULE_PARM_DESC(amsdu_size_8K50,
4669                  "enable 8K amsdu size in 50XX series (deprecated)");
4670 module_param_named(amsdu_size_8K, iwlagn_mod_params.amsdu_size_8K,
4671                    int, S_IRUGO);
4672 MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size");
4673 module_param_named(fw_restart50, iwlagn_mod_params.restart_fw, int, S_IRUGO);
4674 MODULE_PARM_DESC(fw_restart50,
4675                  "restart firmware in case of error (deprecated)");
4676 module_param_named(fw_restart, iwlagn_mod_params.restart_fw, int, S_IRUGO);
4677 MODULE_PARM_DESC(fw_restart, "restart firmware in case of error");
4678 module_param_named(
4679         disable_hw_scan, iwlagn_mod_params.disable_hw_scan, int, S_IRUGO);
4680 MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
4681
4682 module_param_named(ucode_alternative, iwlagn_wanted_ucode_alternative, int,
4683                    S_IRUGO);
4684 MODULE_PARM_DESC(ucode_alternative,
4685                  "specify ucode alternative to use from ucode file");
4686
4687 module_param_named(antenna_coupling, iwlagn_ant_coupling, int, S_IRUGO);
4688 MODULE_PARM_DESC(antenna_coupling,
4689                  "specify antenna coupling in dB (defualt: 0 dB)");