drivers/net/wireless/iwlwifi/iwl-agn.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved.
   4  *
   5  * Portions of this file are derived from the ipw3945 project, as well
   6  * as portions of the ieee80211 subsystem header files.
   7  *
   8  * This program is free software; you can redistribute it and/or modify it
   9  * under the terms of version 2 of the GNU General Public License as
  10  * published by the Free Software Foundation.
  11  *
  12  * This program is distributed in the hope that it will be useful, but WITHOUT
  13  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  15  * more details.
  16  *
  17  * You should have received a copy of the GNU General Public License along with
  18  * this program; if not, write to the Free Software Foundation, Inc.,
  19  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20  *
  21  * The full GNU General Public License is included in this distribution in the
  22  * file called LICENSE.
  23  *
  24  * Contact Information:
  25  *  Intel Linux Wireless <ilw@linux.intel.com>
  26  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27  *
  28  *****************************************************************************/
  29
  30 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  31
  32 #include <linux/kernel.h>
  33 #include <linux/module.h>
  34 #include <linux/init.h>
  35 #include <linux/pci.h>
  36 #include <linux/pci-aspm.h>
  37 #include <linux/slab.h>
  38 #include <linux/dma-mapping.h>
  39 #include <linux/delay.h>
  40 #include <linux/sched.h>
  41 #include <linux/skbuff.h>
  42 #include <linux/netdevice.h>
  43 #include <linux/wireless.h>
  44 #include <linux/firmware.h>
  45 #include <linux/etherdevice.h>
  46 #include <linux/if_arp.h>
  47
  48 #include <net/mac80211.h>
  49
  50 #include <asm/div64.h>
  51
  52 #define DRV_NAME        "iwlagn"
  53
  54 #include "iwl-eeprom.h"
  55 #include "iwl-dev.h"
  56 #include "iwl-core.h"
  57 #include "iwl-io.h"
  58 #include "iwl-helpers.h"
  59 #include "iwl-sta.h"
  60 #include "iwl-calib.h"
  61 #include "iwl-agn.h"
  62
  63
  64 /******************************************************************************
  65  *
  66  * module boiler plate
  67  *
  68  ******************************************************************************/
  69
  70 /*
  71  * module name, copyright, version, etc.
  72  */
  73 #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link AGN driver for Linux"
  74
  75 #ifdef CONFIG_IWLWIFI_DEBUG
  76 #define VD "d"
  77 #else
  78 #define VD
  79 #endif
  80
  81 #define DRV_VERSION     IWLWIFI_VERSION VD
  82
  83
  84 MODULE_DESCRIPTION(DRV_DESCRIPTION);
  85 MODULE_VERSION(DRV_VERSION);
  86 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
  87 MODULE_LICENSE("GPL");
  88 MODULE_ALIAS("iwl4965");
  89
  90 static int iwlagn_ant_coupling;
  91 static bool iwlagn_bt_ch_announce = 1;
  92
  93 /**
  94  * iwl_commit_rxon - commit staging_rxon to hardware
  95  *
  96  * The RXON command in staging_rxon is committed to the hardware and
  97  * the active_rxon structure is updated with the new data.  This
  98  * function correctly transitions out of the RXON_ASSOC_MSK state if
  99  * a HW tune is required based on the RXON structure changes.
 100  */
 101 int iwl_commit_rxon(struct iwl_priv *priv, struct iwl_rxon_context *ctx)
 102 {
 103         /* cast away the const for active_rxon in this function */
 104         struct iwl_rxon_cmd *active_rxon = (void *)&ctx->active;
 105         int ret;
 106         bool new_assoc =
 107                 !!(ctx->staging.filter_flags & RXON_FILTER_ASSOC_MSK);
 108
 109         if (!iwl_is_alive(priv))
 110                 return -EBUSY;
 111
 112         /* always get timestamp with Rx frame */
 113         ctx->staging.flags |= RXON_FLG_TSF2HOST_MSK;
 114
 115         ret = iwl_check_rxon_cmd(priv, ctx);
 116         if (ret) {
 117                 IWL_ERR(priv, "Invalid RXON configuration.  Not committing.\n");
 118                 return -EINVAL;
 119         }
 120
 121         /*
 122          * receive commit_rxon request
 123          * abort any previous channel switch if still in process
 124          */
 125         if (priv->switch_rxon.switch_in_progress &&
 126             (priv->switch_rxon.channel != ctx->staging.channel)) {
 127                 IWL_DEBUG_11H(priv, "abort channel switch on %d\n",
 128                       le16_to_cpu(priv->switch_rxon.channel));
 129                 iwl_chswitch_done(priv, false);
 130         }
 131
 132         /* If we don't need to send a full RXON, we can use
 133          * iwl_rxon_assoc_cmd which is used to reconfigure filter
 134          * and other flags for the current radio configuration. */
 135         if (!iwl_full_rxon_required(priv, ctx)) {
 136                 ret = iwl_send_rxon_assoc(priv, ctx);
 137                 if (ret) {
 138                         IWL_ERR(priv, "Error setting RXON_ASSOC (%d)\n", ret);
 139                         return ret;
 140                 }
 141
 142                 memcpy(active_rxon, &ctx->staging, sizeof(*active_rxon));
 143                 iwl_print_rx_config_cmd(priv, ctx);
 144                 return 0;
 145         }
 146
 147         /* If we are currently associated and the new config requires
 148          * an RXON_ASSOC and the new config wants the associated mask enabled,
 149          * we must clear the associated from the active configuration
 150          * before we apply the new config */
 151         if (iwl_is_associated_ctx(ctx) && new_assoc) {
 152                 IWL_DEBUG_INFO(priv, "Toggling associated bit on current RXON\n");
 153                 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
 154
 155                 ret = iwl_send_cmd_pdu(priv, ctx->rxon_cmd,
 156                                        sizeof(struct iwl_rxon_cmd),
 157                                        active_rxon);
 158
 159                 /* If the mask clearing failed then we set
 160                  * active_rxon back to what it was previously */
 161                 if (ret) {
 162                         active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
 163                         IWL_ERR(priv, "Error clearing ASSOC_MSK (%d)\n", ret);
 164                         return ret;
 165                 }
 166                 iwl_clear_ucode_stations(priv, ctx);
 167                 iwl_restore_stations(priv, ctx);
 168                 ret = iwl_restore_default_wep_keys(priv, ctx);
 169                 if (ret) {
 170                         IWL_ERR(priv, "Failed to restore WEP keys (%d)\n", ret);
 171                         return ret;
 172                 }
 173         }
 174
 175         IWL_DEBUG_INFO(priv, "Sending RXON\n"
 176                        "* with%s RXON_FILTER_ASSOC_MSK\n"
 177                        "* channel = %d\n"
 178                        "* bssid = %pM\n",
 179                        (new_assoc ? "" : "out"),
 180                        le16_to_cpu(ctx->staging.channel),
 181                        ctx->staging.bssid_addr);
 182
 183         iwl_set_rxon_hwcrypto(priv, ctx, !priv->cfg->mod_params->sw_crypto);
 184
 185         /* Apply the new configuration
 186          * RXON unassoc clears the station table in uCode so restoration of
 187          * stations is needed after it (the RXON command) completes
 188          */
 189         if (!new_assoc) {
 190                 ret = iwl_send_cmd_pdu(priv, ctx->rxon_cmd,
 191                               sizeof(struct iwl_rxon_cmd), &ctx->staging);
 192                 if (ret) {
 193                         IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
 194                         return ret;
 195                 }
 196                 IWL_DEBUG_INFO(priv, "Return from !new_assoc RXON.\n");
 197                 memcpy(active_rxon, &ctx->staging, sizeof(*active_rxon));
 198                 iwl_clear_ucode_stations(priv, ctx);
 199                 iwl_restore_stations(priv, ctx);
 200                 ret = iwl_restore_default_wep_keys(priv, ctx);
 201                 if (ret) {
 202                         IWL_ERR(priv, "Failed to restore WEP keys (%d)\n", ret);
 203                         return ret;
 204                 }
 205         }
 206
 207         priv->start_calib = 0;
 208         if (new_assoc) {
 209                 /* Apply the new configuration
 210                  * RXON assoc doesn't clear the station table in uCode,
 211                  */
 212                 ret = iwl_send_cmd_pdu(priv, ctx->rxon_cmd,
 213                               sizeof(struct iwl_rxon_cmd), &ctx->staging);
 214                 if (ret) {
 215                         IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
 216                         return ret;
 217                 }
 218                 memcpy(active_rxon, &ctx->staging, sizeof(*active_rxon));
 219         }
 220         iwl_print_rx_config_cmd(priv, ctx);
 221
 222         iwl_init_sensitivity(priv);
 223
 224         /* If we issue a new RXON command which required a tune then we must
 225          * send a new TXPOWER command or we won't be able to Tx any frames */
 226         ret = iwl_set_tx_power(priv, priv->tx_power_user_lmt, true);
 227         if (ret) {
 228                 IWL_ERR(priv, "Error sending TX power (%d)\n", ret);
 229                 return ret;
 230         }
 231
 232         return 0;
 233 }
 234
 235 void iwl_update_chain_flags(struct iwl_priv *priv)
 236 {
 237         struct iwl_rxon_context *ctx;
 238
 239         if (priv->cfg->ops->hcmd->set_rxon_chain) {
 240                 for_each_context(priv, ctx) {
 241                         priv->cfg->ops->hcmd->set_rxon_chain(priv, ctx);
 242                         iwlcore_commit_rxon(priv, ctx);
 243                 }
 244         }
 245 }
 246
 247 static void iwl_clear_free_frames(struct iwl_priv *priv)
 248 {
 249         struct list_head *element;
 250
 251         IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
 252                        priv->frames_count);
 253
 254         while (!list_empty(&priv->free_frames)) {
 255                 element = priv->free_frames.next;
 256                 list_del(element);
 257                 kfree(list_entry(element, struct iwl_frame, list));
 258                 priv->frames_count--;
 259         }
 260
 261         if (priv->frames_count) {
 262                 IWL_WARN(priv, "%d frames still in use.  Did we lose one?\n",
 263                             priv->frames_count);
 264                 priv->frames_count = 0;
 265         }
 266 }
 267
 268 static struct iwl_frame *iwl_get_free_frame(struct iwl_priv *priv)
 269 {
 270         struct iwl_frame *frame;
 271         struct list_head *element;
 272         if (list_empty(&priv->free_frames)) {
 273                 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
 274                 if (!frame) {
 275                         IWL_ERR(priv, "Could not allocate frame!\n");
 276                         return NULL;
 277                 }
 278
 279                 priv->frames_count++;
 280                 return frame;
 281         }
 282
 283         element = priv->free_frames.next;
 284         list_del(element);
 285         return list_entry(element, struct iwl_frame, list);
 286 }
 287
 288 static void iwl_free_frame(struct iwl_priv *priv, struct iwl_frame *frame)
 289 {
 290         memset(frame, 0, sizeof(*frame));
 291         list_add(&frame->list, &priv->free_frames);
 292 }
 293
 294 static u32 iwl_fill_beacon_frame(struct iwl_priv *priv,
 295                                           struct ieee80211_hdr *hdr,
 296                                           int left)
 297 {
 298         if (!priv->ibss_beacon)
 299                 return 0;
 300
 301         if (priv->ibss_beacon->len > left)
 302                 return 0;
 303
 304         memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
 305
 306         return priv->ibss_beacon->len;
 307 }
 308
 309 /* Parse the beacon frame to find the TIM element and set tim_idx & tim_size */
 310 static void iwl_set_beacon_tim(struct iwl_priv *priv,
 311                 struct iwl_tx_beacon_cmd *tx_beacon_cmd,
 312                 u8 *beacon, u32 frame_size)
 313 {
 314         u16 tim_idx;
 315         struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)beacon;
 316
 317         /*
 318          * The index is relative to frame start but we start looking at the
 319          * variable-length part of the beacon.
 320          */
 321         tim_idx = mgmt->u.beacon.variable - beacon;
 322
 323         /* Parse variable-length elements of beacon to find WLAN_EID_TIM */
 324         while ((tim_idx < (frame_size - 2)) &&
 325                         (beacon[tim_idx] != WLAN_EID_TIM))
 326                 tim_idx += beacon[tim_idx+1] + 2;
 327
 328         /* If TIM field was found, set variables */
 329         if ((tim_idx < (frame_size - 1)) && (beacon[tim_idx] == WLAN_EID_TIM)) {
 330                 tx_beacon_cmd->tim_idx = cpu_to_le16(tim_idx);
 331                 tx_beacon_cmd->tim_size = beacon[tim_idx+1];
 332         } else
 333                 IWL_WARN(priv, "Unable to find TIM Element in beacon\n");
 334 }
 335
 336 static unsigned int iwl_hw_get_beacon_cmd(struct iwl_priv *priv,
 337                                        struct iwl_frame *frame)
 338 {
 339         struct iwl_tx_beacon_cmd *tx_beacon_cmd;
 340         u32 frame_size;
 341         u32 rate_flags;
 342         u32 rate;
 343         /*
 344          * We have to set up the TX command, the TX Beacon command, and the
 345          * beacon contents.
 346          */
 347
 348         lockdep_assert_held(&priv->mutex);
 349
 350         if (!priv->beacon_ctx) {
 351                 IWL_ERR(priv, "trying to build beacon w/o beacon context!\n");
 352                 return -EINVAL;
 353         }
 354
 355         /* Initialize memory */
 356         tx_beacon_cmd = &frame->u.beacon;
 357         memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
 358
 359         /* Set up TX beacon contents */
 360         frame_size = iwl_fill_beacon_frame(priv, tx_beacon_cmd->frame,
 361                                 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
 362         if (WARN_ON_ONCE(frame_size > MAX_MPDU_SIZE))
 363                 return 0;
 364
 365         /* Set up TX command fields */
 366         tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
 367         tx_beacon_cmd->tx.sta_id = priv->beacon_ctx->bcast_sta_id;
 368         tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
 369         tx_beacon_cmd->tx.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK |
 370                 TX_CMD_FLG_TSF_MSK | TX_CMD_FLG_STA_RATE_MSK;
 371
 372         /* Set up TX beacon command fields */
 373         iwl_set_beacon_tim(priv, tx_beacon_cmd, (u8 *)tx_beacon_cmd->frame,
 374                         frame_size);
 375
 376         /* Set up packet rate and flags */
 377         rate = iwl_rate_get_lowest_plcp(priv, priv->beacon_ctx);
 378         priv->mgmt_tx_ant = iwl_toggle_tx_ant(priv, priv->mgmt_tx_ant,
 379                                               priv->hw_params.valid_tx_ant);
 380         rate_flags = iwl_ant_idx_to_flags(priv->mgmt_tx_ant);
 381         if ((rate >= IWL_FIRST_CCK_RATE) && (rate <= IWL_LAST_CCK_RATE))
 382                 rate_flags |= RATE_MCS_CCK_MSK;
 383         tx_beacon_cmd->tx.rate_n_flags = iwl_hw_set_rate_n_flags(rate,
 384                         rate_flags);
 385
 386         return sizeof(*tx_beacon_cmd) + frame_size;
 387 }
 388 static int iwl_send_beacon_cmd(struct iwl_priv *priv)
 389 {
 390         struct iwl_frame *frame;
 391         unsigned int frame_size;
 392         int rc;
 393
 394         frame = iwl_get_free_frame(priv);
 395         if (!frame) {
 396                 IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
 397                           "command.\n");
 398                 return -ENOMEM;
 399         }
 400
 401         frame_size = iwl_hw_get_beacon_cmd(priv, frame);
 402         if (!frame_size) {
 403                 IWL_ERR(priv, "Error configuring the beacon command\n");
 404                 iwl_free_frame(priv, frame);
 405                 return -EINVAL;
 406         }
 407
 408         rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
 409                               &frame->u.cmd[0]);
 410
 411         iwl_free_frame(priv, frame);
 412
 413         return rc;
 414 }
 415
 416 static inline dma_addr_t iwl_tfd_tb_get_addr(struct iwl_tfd *tfd, u8 idx)
 417 {
 418         struct iwl_tfd_tb *tb = &tfd->tbs[idx];
 419
 420         dma_addr_t addr = get_unaligned_le32(&tb->lo);
 421         if (sizeof(dma_addr_t) > sizeof(u32))
 422                 addr |=
 423                 ((dma_addr_t)(le16_to_cpu(tb->hi_n_len) & 0xF) << 16) << 16;
 424
 425         return addr;
 426 }
 427
 428 static inline u16 iwl_tfd_tb_get_len(struct iwl_tfd *tfd, u8 idx)
 429 {
 430         struct iwl_tfd_tb *tb = &tfd->tbs[idx];
 431
 432         return le16_to_cpu(tb->hi_n_len) >> 4;
 433 }
 434
 435 static inline void iwl_tfd_set_tb(struct iwl_tfd *tfd, u8 idx,
 436                                   dma_addr_t addr, u16 len)
 437 {
 438         struct iwl_tfd_tb *tb = &tfd->tbs[idx];
 439         u16 hi_n_len = len << 4;
 440
 441         put_unaligned_le32(addr, &tb->lo);
 442         if (sizeof(dma_addr_t) > sizeof(u32))
 443                 hi_n_len |= ((addr >> 16) >> 16) & 0xF;
 444
 445         tb->hi_n_len = cpu_to_le16(hi_n_len);
 446
 447         tfd->num_tbs = idx + 1;
 448 }
 449
 450 static inline u8 iwl_tfd_get_num_tbs(struct iwl_tfd *tfd)
 451 {
 452         return tfd->num_tbs & 0x1f;
 453 }
 454
 455 /**
 456  * iwl_hw_txq_free_tfd - Free all chunks referenced by TFD [txq->q.read_ptr]
 457  * @priv - driver private data
 458  * @txq - tx queue
 459  *
 460  * Does NOT advance any TFD circular buffer read/write indexes
 461  * Does NOT free the TFD itself (which is within circular buffer)
 462  */
 463 void iwl_hw_txq_free_tfd(struct iwl_priv *priv, struct iwl_tx_queue *txq)
 464 {
 465         struct iwl_tfd *tfd_tmp = (struct iwl_tfd *)txq->tfds;
 466         struct iwl_tfd *tfd;
 467         struct pci_dev *dev = priv->pci_dev;
 468         int index = txq->q.read_ptr;
 469         int i;
 470         int num_tbs;
 471
 472         tfd = &tfd_tmp[index];
 473
 474         /* Sanity check on number of chunks */
 475         num_tbs = iwl_tfd_get_num_tbs(tfd);
 476
 477         if (num_tbs >= IWL_NUM_OF_TBS) {
 478                 IWL_ERR(priv, "Too many chunks: %i\n", num_tbs);
 479                 /* @todo issue fatal error, it is quite serious situation */
 480                 return;
 481         }
 482
 483         /* Unmap tx_cmd */
 484         if (num_tbs)
 485                 pci_unmap_single(dev,
 486                                 dma_unmap_addr(&txq->meta[index], mapping),
 487                                 dma_unmap_len(&txq->meta[index], len),
 488                                 PCI_DMA_BIDIRECTIONAL);
 489
 490         /* Unmap chunks, if any. */
 491         for (i = 1; i < num_tbs; i++)
 492                 pci_unmap_single(dev, iwl_tfd_tb_get_addr(tfd, i),
 493                                 iwl_tfd_tb_get_len(tfd, i), PCI_DMA_TODEVICE);
 494
 495         /* free SKB */
 496         if (txq->txb) {
 497                 struct sk_buff *skb;
 498
 499                 skb = txq->txb[txq->q.read_ptr].skb;
 500
 501                 /* can be called from irqs-disabled context */
 502                 if (skb) {
 503                         dev_kfree_skb_any(skb);
 504                         txq->txb[txq->q.read_ptr].skb = NULL;
 505                 }
 506         }
 507 }
 508
 509 int iwl_hw_txq_attach_buf_to_tfd(struct iwl_priv *priv,
 510                                  struct iwl_tx_queue *txq,
 511                                  dma_addr_t addr, u16 len,
 512                                  u8 reset, u8 pad)
 513 {
 514         struct iwl_queue *q;
 515         struct iwl_tfd *tfd, *tfd_tmp;
 516         u32 num_tbs;
 517
 518         q = &txq->q;
 519         tfd_tmp = (struct iwl_tfd *)txq->tfds;
 520         tfd = &tfd_tmp[q->write_ptr];
 521
 522         if (reset)
 523                 memset(tfd, 0, sizeof(*tfd));
 524
 525         num_tbs = iwl_tfd_get_num_tbs(tfd);
 526
 527         /* Each TFD can point to a maximum 20 Tx buffers */
 528         if (num_tbs >= IWL_NUM_OF_TBS) {
 529                 IWL_ERR(priv, "Error can not send more than %d chunks\n",
 530                           IWL_NUM_OF_TBS);
 531                 return -EINVAL;
 532         }
 533
 534         BUG_ON(addr & ~DMA_BIT_MASK(36));
 535         if (unlikely(addr & ~IWL_TX_DMA_MASK))
 536                 IWL_ERR(priv, "Unaligned address = %llx\n",
 537                           (unsigned long long)addr);
 538
 539         iwl_tfd_set_tb(tfd, num_tbs, addr, len);
 540
 541         return 0;
 542 }
 543
 544 /*
 545  * Tell nic where to find circular buffer of Tx Frame Descriptors for
 546  * given Tx queue, and enable the DMA channel used for that queue.
 547  *
 548  * 4965 supports up to 16 Tx queues in DRAM, mapped to up to 8 Tx DMA
 549  * channels supported in hardware.
 550  */
 551 int iwl_hw_tx_queue_init(struct iwl_priv *priv,
 552                          struct iwl_tx_queue *txq)
 553 {
 554         int txq_id = txq->q.id;
 555
 556         /* Circular buffer (TFD queue in DRAM) physical base address */
 557         iwl_write_direct32(priv, FH_MEM_CBBC_QUEUE(txq_id),
 558                              txq->q.dma_addr >> 8);
 559
 560         return 0;
 561 }
 562
 563 /******************************************************************************
 564  *
 565  * Generic RX handler implementations
 566  *
 567  ******************************************************************************/
 568 static void iwl_rx_reply_alive(struct iwl_priv *priv,
 569                                 struct iwl_rx_mem_buffer *rxb)
 570 {
 571         struct iwl_rx_packet *pkt = rxb_addr(rxb);
 572         struct iwl_alive_resp *palive;
 573         struct delayed_work *pwork;
 574
 575         palive = &pkt->u.alive_frame;
 576
 577         IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
 578                        "0x%01X 0x%01X\n",
 579                        palive->is_valid, palive->ver_type,
 580                        palive->ver_subtype);
 581
 582         if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
 583                 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
 584                 memcpy(&priv->card_alive_init,
 585                        &pkt->u.alive_frame,
 586                        sizeof(struct iwl_init_alive_resp));
 587                 pwork = &priv->init_alive_start;
 588         } else {
 589                 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
 590                 memcpy(&priv->card_alive, &pkt->u.alive_frame,
 591                        sizeof(struct iwl_alive_resp));
 592                 pwork = &priv->alive_start;
 593         }
 594
 595         /* We delay the ALIVE response by 5ms to
 596          * give the HW RF Kill time to activate... */
 597         if (palive->is_valid == UCODE_VALID_OK)
 598                 queue_delayed_work(priv->workqueue, pwork,
 599                                    msecs_to_jiffies(5));
 600         else
 601                 IWL_WARN(priv, "uCode did not respond OK.\n");
 602 }
 603
 604 static void iwl_bg_beacon_update(struct work_struct *work)
 605 {
 606         struct iwl_priv *priv =
 607                 container_of(work, struct iwl_priv, beacon_update);
 608         struct sk_buff *beacon;
 609
 610         mutex_lock(&priv->mutex);
 611         if (!priv->beacon_ctx) {
 612                 IWL_ERR(priv, "updating beacon w/o beacon context!\n");
 613                 goto out;
 614         }
 615
 616         /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
 617         beacon = ieee80211_beacon_get(priv->hw, priv->beacon_ctx->vif);
 618         if (!beacon) {
 619                 IWL_ERR(priv, "update beacon failed\n");
 620                 goto out;
 621         }
 622
 623         /* new beacon skb is allocated every time; dispose previous.*/
 624         if (priv->ibss_beacon)
 625                 dev_kfree_skb(priv->ibss_beacon);
 626
 627         priv->ibss_beacon = beacon;
 628
 629         iwl_send_beacon_cmd(priv);
 630  out:
 631         mutex_unlock(&priv->mutex);
 632 }
 633
 634 static void iwl_bg_bt_runtime_config(struct work_struct *work)
 635 {
 636         struct iwl_priv *priv =
 637                 container_of(work, struct iwl_priv, bt_runtime_config);
 638
 639         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
 640                 return;
 641
 642         /* dont send host command if rf-kill is on */
 643         if (!iwl_is_ready_rf(priv))
 644                 return;
 645         priv->cfg->ops->hcmd->send_bt_config(priv);
 646 }
 647
 648 static void iwl_bg_bt_full_concurrency(struct work_struct *work)
 649 {
 650         struct iwl_priv *priv =
 651                 container_of(work, struct iwl_priv, bt_full_concurrency);
 652         struct iwl_rxon_context *ctx;
 653
 654         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
 655                 return;
 656
 657         /* dont send host command if rf-kill is on */
 658         if (!iwl_is_ready_rf(priv))
 659                 return;
 660
 661         IWL_DEBUG_INFO(priv, "BT coex in %s mode\n",
 662                        priv->bt_full_concurrent ?
 663                        "full concurrency" : "3-wire");
 664
 665         /*
 666          * LQ & RXON updated cmds must be sent before BT Config cmd
 667          * to avoid 3-wire collisions
 668          */
 669         mutex_lock(&priv->mutex);
 670         for_each_context(priv, ctx) {
 671                 if (priv->cfg->ops->hcmd->set_rxon_chain)
 672                         priv->cfg->ops->hcmd->set_rxon_chain(priv, ctx);
 673                 iwlcore_commit_rxon(priv, ctx);
 674         }
 675         mutex_unlock(&priv->mutex);
 676
 677         priv->cfg->ops->hcmd->send_bt_config(priv);
 678 }
 679
 680 /**
 681  * iwl_bg_statistics_periodic - Timer callback to queue statistics
 682  *
 683  * This callback is provided in order to send a statistics request.
 684  *
 685  * This timer function is continually reset to execute within
 686  * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION
 687  * was received.  We need to ensure we receive the statistics in order
 688  * to update the temperature used for calibrating the TXPOWER.
 689  */
 690 static void iwl_bg_statistics_periodic(unsigned long data)
 691 {
 692         struct iwl_priv *priv = (struct iwl_priv *)data;
 693
 694         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
 695                 return;
 696
 697         /* dont send host command if rf-kill is on */
 698         if (!iwl_is_ready_rf(priv))
 699                 return;
 700
 701         iwl_send_statistics_request(priv, CMD_ASYNC, false);
 702 }
 703
 704
 705 static void iwl_print_cont_event_trace(struct iwl_priv *priv, u32 base,
 706                                         u32 start_idx, u32 num_events,
 707                                         u32 mode)
 708 {
 709         u32 i;
 710         u32 ptr;        /* SRAM byte address of log data */
 711         u32 ev, time, data; /* event log data */
 712         unsigned long reg_flags;
 713
 714         if (mode == 0)
 715                 ptr = base + (4 * sizeof(u32)) + (start_idx * 2 * sizeof(u32));
 716         else
 717                 ptr = base + (4 * sizeof(u32)) + (start_idx * 3 * sizeof(u32));
 718
 719         /* Make sure device is powered up for SRAM reads */
 720         spin_lock_irqsave(&priv->reg_lock, reg_flags);
 721         if (iwl_grab_nic_access(priv)) {
 722                 spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
 723                 return;
 724         }
 725
 726         /* Set starting address; reads will auto-increment */
 727         _iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, ptr);
 728         rmb();
 729
 730         /*
 731          * "time" is actually "data" for mode 0 (no timestamp).
 732          * place event id # at far right for easier visual parsing.
 733          */
 734         for (i = 0; i < num_events; i++) {
 735                 ev = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
 736                 time = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
 737                 if (mode == 0) {
 738                         trace_iwlwifi_dev_ucode_cont_event(priv,
 739                                                         0, time, ev);
 740                 } else {
 741                         data = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
 742                         trace_iwlwifi_dev_ucode_cont_event(priv,
 743                                                 time, data, ev);
 744                 }
 745         }
 746         /* Allow device to power down */
 747         iwl_release_nic_access(priv);
 748         spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
 749 }
 750
 751 static void iwl_continuous_event_trace(struct iwl_priv *priv)
 752 {
 753         u32 capacity;   /* event log capacity in # entries */
 754         u32 base;       /* SRAM byte address of event log header */
 755         u32 mode;       /* 0 - no timestamp, 1 - timestamp recorded */
 756         u32 num_wraps;  /* # times uCode wrapped to top of log */
 757         u32 next_entry; /* index of next entry to be written by uCode */
 758
 759         if (priv->ucode_type == UCODE_INIT)
 760                 base = le32_to_cpu(priv->card_alive_init.error_event_table_ptr);
 761         else
 762                 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
 763         if (priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
 764                 capacity = iwl_read_targ_mem(priv, base);
 765                 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
 766                 mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
 767                 next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
 768         } else
 769                 return;
 770
 771         if (num_wraps == priv->event_log.num_wraps) {
 772                 iwl_print_cont_event_trace(priv,
 773                                        base, priv->event_log.next_entry,
 774                                        next_entry - priv->event_log.next_entry,
 775                                        mode);
 776                 priv->event_log.non_wraps_count++;
 777         } else {
 778                 if ((num_wraps - priv->event_log.num_wraps) > 1)
 779                         priv->event_log.wraps_more_count++;
 780                 else
 781                         priv->event_log.wraps_once_count++;
 782                 trace_iwlwifi_dev_ucode_wrap_event(priv,
 783                                 num_wraps - priv->event_log.num_wraps,
 784                                 next_entry, priv->event_log.next_entry);
 785                 if (next_entry < priv->event_log.next_entry) {
 786                         iwl_print_cont_event_trace(priv, base,
 787                                priv->event_log.next_entry,
 788                                capacity - priv->event_log.next_entry,
 789                                mode);
 790
 791                         iwl_print_cont_event_trace(priv, base, 0,
 792                                 next_entry, mode);
 793                 } else {
 794                         iwl_print_cont_event_trace(priv, base,
 795                                next_entry, capacity - next_entry,
 796                                mode);
 797
 798                         iwl_print_cont_event_trace(priv, base, 0,
 799                                 next_entry, mode);
 800                 }
 801         }
 802         priv->event_log.num_wraps = num_wraps;
 803         priv->event_log.next_entry = next_entry;
 804 }
 805
 806 /**
 807  * iwl_bg_ucode_trace - Timer callback to log ucode event
 808  *
 809  * The timer is continually set to execute every
 810  * UCODE_TRACE_PERIOD milliseconds after the last timer expired
 811  * this function is to perform continuous uCode event logging operation
 812  * if enabled
 813  */
 814 static void iwl_bg_ucode_trace(unsigned long data)
 815 {
 816         struct iwl_priv *priv = (struct iwl_priv *)data;
 817
 818         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
 819                 return;
 820
 821         if (priv->event_log.ucode_trace) {
 822                 iwl_continuous_event_trace(priv);
 823                 /* Reschedule the timer to occur in UCODE_TRACE_PERIOD */
 824                 mod_timer(&priv->ucode_trace,
 825                          jiffies + msecs_to_jiffies(UCODE_TRACE_PERIOD));
 826         }
 827 }
 828
 829 static void iwl_rx_beacon_notif(struct iwl_priv *priv,
 830                                 struct iwl_rx_mem_buffer *rxb)
 831 {
 832         struct iwl_rx_packet *pkt = rxb_addr(rxb);
 833         struct iwl4965_beacon_notif *beacon =
 834                 (struct iwl4965_beacon_notif *)pkt->u.raw;
 835 #ifdef CONFIG_IWLWIFI_DEBUG
 836         u8 rate = iwl_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
 837
 838         IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d "
 839                 "tsf %d %d rate %d\n",
 840                 le32_to_cpu(beacon->beacon_notify_hdr.u.status) & TX_STATUS_MSK,
 841                 beacon->beacon_notify_hdr.failure_frame,
 842                 le32_to_cpu(beacon->ibss_mgr_status),
 843                 le32_to_cpu(beacon->high_tsf),
 844                 le32_to_cpu(beacon->low_tsf), rate);
 845 #endif
 846
 847         priv->ibss_manager = le32_to_cpu(beacon->ibss_mgr_status);
 848
 849         if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
 850             (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
 851                 queue_work(priv->workqueue, &priv->beacon_update);
 852 }
 853
 854 /* Handle notification from uCode that card's power state is changing
 855  * due to software, hardware, or critical temperature RFKILL */
 856 static void iwl_rx_card_state_notif(struct iwl_priv *priv,
 857                                     struct iwl_rx_mem_buffer *rxb)
 858 {
 859         struct iwl_rx_packet *pkt = rxb_addr(rxb);
 860         u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
 861         unsigned long status = priv->status;
 862
 863         IWL_DEBUG_RF_KILL(priv, "Card state received: HW:%s SW:%s CT:%s\n",
 864                           (flags & HW_CARD_DISABLED) ? "Kill" : "On",
 865                           (flags & SW_CARD_DISABLED) ? "Kill" : "On",
 866                           (flags & CT_CARD_DISABLED) ?
 867                           "Reached" : "Not reached");
 868
 869         if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
 870                      CT_CARD_DISABLED)) {
 871
 872                 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
 873                             CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
 874
 875                 iwl_write_direct32(priv, HBUS_TARG_MBX_C,
 876                                         HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
 877
 878                 if (!(flags & RXON_CARD_DISABLED)) {
 879                         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
 880                                     CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
 881                         iwl_write_direct32(priv, HBUS_TARG_MBX_C,
 882                                         HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
 883                 }
 884                 if (flags & CT_CARD_DISABLED)
 885                         iwl_tt_enter_ct_kill(priv);
 886         }
 887         if (!(flags & CT_CARD_DISABLED))
 888                 iwl_tt_exit_ct_kill(priv);
 889
 890         if (flags & HW_CARD_DISABLED)
 891                 set_bit(STATUS_RF_KILL_HW, &priv->status);
 892         else
 893                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
 894
 895
 896         if (!(flags & RXON_CARD_DISABLED))
 897                 iwl_scan_cancel(priv);
 898
 899         if ((test_bit(STATUS_RF_KILL_HW, &status) !=
 900              test_bit(STATUS_RF_KILL_HW, &priv->status)))
 901                 wiphy_rfkill_set_hw_state(priv->hw->wiphy,
 902                         test_bit(STATUS_RF_KILL_HW, &priv->status));
 903         else
 904                 wake_up_interruptible(&priv->wait_command_queue);
 905 }
 906
 907 int iwl_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src)
 908 {
 909         if (src == IWL_PWR_SRC_VAUX) {
 910                 if (pci_pme_capable(priv->pci_dev, PCI_D3cold))
 911                         iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
 912                                                APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
 913                                                ~APMG_PS_CTRL_MSK_PWR_SRC);
 914         } else {
 915                 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
 916                                        APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
 917                                        ~APMG_PS_CTRL_MSK_PWR_SRC);
 918         }
 919
 920         return 0;
 921 }
 922
 923 static void iwl_bg_tx_flush(struct work_struct *work)
 924 {
 925         struct iwl_priv *priv =
 926                 container_of(work, struct iwl_priv, tx_flush);
 927
 928         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
 929                 return;
 930
 931         /* do nothing if rf-kill is on */
 932         if (!iwl_is_ready_rf(priv))
 933                 return;
 934
 935         if (priv->cfg->ops->lib->txfifo_flush) {
 936                 IWL_DEBUG_INFO(priv, "device request: flush all tx frames\n");
 937                 iwlagn_dev_txfifo_flush(priv, IWL_DROP_ALL);
 938         }
 939 }
 940
 941 /**
 942  * iwl_setup_rx_handlers - Initialize Rx handler callbacks
 943  *
 944  * Setup the RX handlers for each of the reply types sent from the uCode
 945  * to the host.
 946  *
 947  * This function chains into the hardware specific files for them to setup
 948  * any hardware specific handlers as well.
 949  */
 950 static void iwl_setup_rx_handlers(struct iwl_priv *priv)
 951 {
 952         priv->rx_handlers[REPLY_ALIVE] = iwl_rx_reply_alive;
 953         priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
 954         priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
 955         priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
 956                         iwl_rx_spectrum_measure_notif;
 957         priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
 958         priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
 959             iwl_rx_pm_debug_statistics_notif;
 960         priv->rx_handlers[BEACON_NOTIFICATION] = iwl_rx_beacon_notif;
 961
 962         /*
 963          * The same handler is used for both the REPLY to a discrete
 964          * statistics request from the host as well as for the periodic
 965          * statistics notifications (after received beacons) from the uCode.
 966          */
 967         priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl_reply_statistics;
 968         priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl_rx_statistics;
 969
 970         iwl_setup_rx_scan_handlers(priv);
 971
 972         /* status change handler */
 973         priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl_rx_card_state_notif;
 974
 975         priv->rx_handlers[MISSED_BEACONS_NOTIFICATION] =
 976             iwl_rx_missed_beacon_notif;
 977         /* Rx handlers */
 978         priv->rx_handlers[REPLY_RX_PHY_CMD] = iwlagn_rx_reply_rx_phy;
 979         priv->rx_handlers[REPLY_RX_MPDU_CMD] = iwlagn_rx_reply_rx;
 980         /* block ack */
 981         priv->rx_handlers[REPLY_COMPRESSED_BA] = iwlagn_rx_reply_compressed_ba;
 982         /* Set up hardware specific Rx handlers */
 983         priv->cfg->ops->lib->rx_handler_setup(priv);
 984 }
 985
 986 /**
 987  * iwl_rx_handle - Main entry function for receiving responses from uCode
 988  *
 989  * Uses the priv->rx_handlers callback function array to invoke
 990  * the appropriate handlers, including command responses,
 991  * frame-received notifications, and other notifications.
 992  */
 993 void iwl_rx_handle(struct iwl_priv *priv)
 994 {
 995         struct iwl_rx_mem_buffer *rxb;
 996         struct iwl_rx_packet *pkt;
 997         struct iwl_rx_queue *rxq = &priv->rxq;
 998         u32 r, i;
 999         int reclaim;
1000         unsigned long flags;
1001         u8 fill_rx = 0;
1002         u32 count = 8;
1003         int total_empty;
1004
1005         /* uCode's read index (stored in shared DRAM) indicates the last Rx
1006          * buffer that the driver may process (last buffer filled by ucode). */
1007         r = le16_to_cpu(rxq->rb_stts->closed_rb_num) &  0x0FFF;
1008         i = rxq->read;
1009
1010         /* Rx interrupt, but nothing sent from uCode */
1011         if (i == r)
1012                 IWL_DEBUG_RX(priv, "r = %d, i = %d\n", r, i);
1013
1014         /* calculate total frames need to be restock after handling RX */
1015         total_empty = r - rxq->write_actual;
1016         if (total_empty < 0)
1017                 total_empty += RX_QUEUE_SIZE;
1018
1019         if (total_empty > (RX_QUEUE_SIZE / 2))
1020                 fill_rx = 1;
1021
1022         while (i != r) {
1023                 int len;
1024
1025                 rxb = rxq->queue[i];
1026
1027                 /* If an RXB doesn't have a Rx queue slot associated with it,
1028                  * then a bug has been introduced in the queue refilling
1029                  * routines -- catch it here */
1030                 BUG_ON(rxb == NULL);
1031
1032                 rxq->queue[i] = NULL;
1033
1034                 pci_unmap_page(priv->pci_dev, rxb->page_dma,
1035                                PAGE_SIZE << priv->hw_params.rx_page_order,
1036                                PCI_DMA_FROMDEVICE);
1037                 pkt = rxb_addr(rxb);
1038
1039                 len = le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK;
1040                 len += sizeof(u32); /* account for status word */
1041                 trace_iwlwifi_dev_rx(priv, pkt, len);
1042
1043                 /* Reclaim a command buffer only if this packet is a response
1044                  *   to a (driver-originated) command.
1045                  * If the packet (e.g. Rx frame) originated from uCode,
1046                  *   there is no command buffer to reclaim.
1047                  * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
1048                  *   but apparently a few don't get set; catch them here. */
1049                 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
1050                         (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
1051                         (pkt->hdr.cmd != REPLY_RX) &&
1052                         (pkt->hdr.cmd != REPLY_RX_MPDU_CMD) &&
1053                         (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
1054                         (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
1055                         (pkt->hdr.cmd != REPLY_TX);
1056
1057                 /* Based on type of command response or notification,
1058                  *   handle those that need handling via function in
1059                  *   rx_handlers table.  See iwl_setup_rx_handlers() */
1060                 if (priv->rx_handlers[pkt->hdr.cmd]) {
1061                         IWL_DEBUG_RX(priv, "r = %d, i = %d, %s, 0x%02x\n", r,
1062                                 i, get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
1063                         priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
1064                         priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
1065                 } else {
1066                         /* No handling needed */
1067                         IWL_DEBUG_RX(priv,
1068                                 "r %d i %d No handler needed for %s, 0x%02x\n",
1069                                 r, i, get_cmd_string(pkt->hdr.cmd),
1070                                 pkt->hdr.cmd);
1071                 }
1072
1073                 /*
1074                  * XXX: After here, we should always check rxb->page
1075                  * against NULL before touching it or its virtual
1076                  * memory (pkt). Because some rx_handler might have
1077                  * already taken or freed the pages.
1078                  */
1079
1080                 if (reclaim) {
1081                         /* Invoke any callbacks, transfer the buffer to caller,
1082                          * and fire off the (possibly) blocking iwl_send_cmd()
1083                          * as we reclaim the driver command queue */
1084                         if (rxb->page)
1085                                 iwl_tx_cmd_complete(priv, rxb);
1086                         else
1087                                 IWL_WARN(priv, "Claim null rxb?\n");
1088                 }
1089
1090                 /* Reuse the page if possible. For notification packets and
1091                  * SKBs that fail to Rx correctly, add them back into the
1092                  * rx_free list for reuse later. */
1093                 spin_lock_irqsave(&rxq->lock, flags);
1094                 if (rxb->page != NULL) {
1095                         rxb->page_dma = pci_map_page(priv->pci_dev, rxb->page,
1096                                 0, PAGE_SIZE << priv->hw_params.rx_page_order,
1097                                 PCI_DMA_FROMDEVICE);
1098                         list_add_tail(&rxb->list, &rxq->rx_free);
1099                         rxq->free_count++;
1100                 } else
1101                         list_add_tail(&rxb->list, &rxq->rx_used);
1102
1103                 spin_unlock_irqrestore(&rxq->lock, flags);
1104
1105                 i = (i + 1) & RX_QUEUE_MASK;
1106                 /* If there are a lot of unused frames,
1107                  * restock the Rx queue so ucode wont assert. */
1108                 if (fill_rx) {
1109                         count++;
1110                         if (count >= 8) {
1111                                 rxq->read = i;
1112                                 iwlagn_rx_replenish_now(priv);
1113                                 count = 0;
1114                         }
1115                 }
1116         }
1117
1118         /* Backtrack one entry */
1119         rxq->read = i;
1120         if (fill_rx)
1121                 iwlagn_rx_replenish_now(priv);
1122         else
1123                 iwlagn_rx_queue_restock(priv);
1124 }
1125
1126 /* call this function to flush any scheduled tasklet */
1127 static inline void iwl_synchronize_irq(struct iwl_priv *priv)
1128 {
1129         /* wait to make sure we flush pending tasklet*/
1130         synchronize_irq(priv->pci_dev->irq);
1131         tasklet_kill(&priv->irq_tasklet);
1132 }
1133
1134 static void iwl_irq_tasklet_legacy(struct iwl_priv *priv)
1135 {
1136         u32 inta, handled = 0;
1137         u32 inta_fh;
1138         unsigned long flags;
1139         u32 i;
1140 #ifdef CONFIG_IWLWIFI_DEBUG
1141         u32 inta_mask;
1142 #endif
1143
1144         spin_lock_irqsave(&priv->lock, flags);
1145
1146         /* Ack/clear/reset pending uCode interrupts.
1147          * Note:  Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1148          *  and will clear only when CSR_FH_INT_STATUS gets cleared. */
1149         inta = iwl_read32(priv, CSR_INT);
1150         iwl_write32(priv, CSR_INT, inta);
1151
1152         /* Ack/clear/reset pending flow-handler (DMA) interrupts.
1153          * Any new interrupts that happen after this, either while we're
1154          * in this tasklet, or later, will show up in next ISR/tasklet. */
1155         inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1156         iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
1157
1158 #ifdef CONFIG_IWLWIFI_DEBUG
1159         if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
1160                 /* just for debug */
1161                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1162                 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
1163                               inta, inta_mask, inta_fh);
1164         }
1165 #endif
1166
1167         spin_unlock_irqrestore(&priv->lock, flags);
1168
1169         /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
1170          * atomic, make sure that inta covers all the interrupts that
1171          * we've discovered, even if FH interrupt came in just after
1172          * reading CSR_INT. */
1173         if (inta_fh & CSR49_FH_INT_RX_MASK)
1174                 inta |= CSR_INT_BIT_FH_RX;
1175         if (inta_fh & CSR49_FH_INT_TX_MASK)
1176                 inta |= CSR_INT_BIT_FH_TX;
1177
1178         /* Now service all interrupt bits discovered above. */
1179         if (inta & CSR_INT_BIT_HW_ERR) {
1180                 IWL_ERR(priv, "Hardware error detected.  Restarting.\n");
1181
1182                 /* Tell the device to stop sending interrupts */
1183                 iwl_disable_interrupts(priv);
1184
1185                 priv->isr_stats.hw++;
1186                 iwl_irq_handle_error(priv);
1187
1188                 handled |= CSR_INT_BIT_HW_ERR;
1189
1190                 return;
1191         }
1192
1193 #ifdef CONFIG_IWLWIFI_DEBUG
1194         if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1195                 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1196                 if (inta & CSR_INT_BIT_SCD) {
1197                         IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1198                                       "the frame/frames.\n");
1199                         priv->isr_stats.sch++;
1200                 }
1201
1202                 /* Alive notification via Rx interrupt will do the real work */
1203                 if (inta & CSR_INT_BIT_ALIVE) {
1204                         IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1205                         priv->isr_stats.alive++;
1206                 }
1207         }
1208 #endif
1209         /* Safely ignore these bits for debug checks below */
1210         inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1211
1212         /* HW RF KILL switch toggled */
1213         if (inta & CSR_INT_BIT_RF_KILL) {
1214                 int hw_rf_kill = 0;
1215                 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
1216                                 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1217                         hw_rf_kill = 1;
1218
1219                 IWL_WARN(priv, "RF_KILL bit toggled to %s.\n",
1220                                 hw_rf_kill ? "disable radio" : "enable radio");
1221
1222                 priv->isr_stats.rfkill++;
1223
1224                 /* driver only loads ucode once setting the interface up.
1225                  * the driver allows loading the ucode even if the radio
1226                  * is killed. Hence update the killswitch state here. The
1227                  * rfkill handler will care about restarting if needed.
1228                  */
1229                 if (!test_bit(STATUS_ALIVE, &priv->status)) {
1230                         if (hw_rf_kill)
1231                                 set_bit(STATUS_RF_KILL_HW, &priv->status);
1232                         else
1233                                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1234                         wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
1235                 }
1236
1237                 handled |= CSR_INT_BIT_RF_KILL;
1238         }
1239
1240         /* Chip got too hot and stopped itself */
1241         if (inta & CSR_INT_BIT_CT_KILL) {
1242                 IWL_ERR(priv, "Microcode CT kill error detected.\n");
1243                 priv->isr_stats.ctkill++;
1244                 handled |= CSR_INT_BIT_CT_KILL;
1245         }
1246
1247         /* Error detected by uCode */
1248         if (inta & CSR_INT_BIT_SW_ERR) {
1249                 IWL_ERR(priv, "Microcode SW error detected. "
1250                         " Restarting 0x%X.\n", inta);
1251                 priv->isr_stats.sw++;
1252                 priv->isr_stats.sw_err = inta;
1253                 iwl_irq_handle_error(priv);
1254                 handled |= CSR_INT_BIT_SW_ERR;
1255         }
1256
1257         /*
1258          * uCode wakes up after power-down sleep.
1259          * Tell device about any new tx or host commands enqueued,
1260          * and about any Rx buffers made available while asleep.
1261          */
1262         if (inta & CSR_INT_BIT_WAKEUP) {
1263                 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1264                 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1265                 for (i = 0; i < priv->hw_params.max_txq_num; i++)
1266                         iwl_txq_update_write_ptr(priv, &priv->txq[i]);
1267                 priv->isr_stats.wakeup++;
1268                 handled |= CSR_INT_BIT_WAKEUP;
1269         }
1270
1271         /* All uCode command responses, including Tx command responses,
1272          * Rx "responses" (frame-received notification), and other
1273          * notifications from uCode come through here*/
1274         if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1275                 iwl_rx_handle(priv);
1276                 priv->isr_stats.rx++;
1277                 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1278         }
1279
1280         /* This "Tx" DMA channel is used only for loading uCode */
1281         if (inta & CSR_INT_BIT_FH_TX) {
1282                 IWL_DEBUG_ISR(priv, "uCode load interrupt\n");
1283                 priv->isr_stats.tx++;
1284                 handled |= CSR_INT_BIT_FH_TX;
1285                 /* Wake up uCode load routine, now that load is complete */
1286                 priv->ucode_write_complete = 1;
1287                 wake_up_interruptible(&priv->wait_command_queue);
1288         }
1289
1290         if (inta & ~handled) {
1291                 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1292                 priv->isr_stats.unhandled++;
1293         }
1294
1295         if (inta & ~(priv->inta_mask)) {
1296                 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1297                          inta & ~priv->inta_mask);
1298                 IWL_WARN(priv, "   with FH_INT = 0x%08x\n", inta_fh);
1299         }
1300
1301         /* Re-enable all interrupts */
1302         /* only Re-enable if diabled by irq */
1303         if (test_bit(STATUS_INT_ENABLED, &priv->status))
1304                 iwl_enable_interrupts(priv);
1305
1306 #ifdef CONFIG_IWLWIFI_DEBUG
1307         if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1308                 inta = iwl_read32(priv, CSR_INT);
1309                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1310                 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1311                 IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
1312                         "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
1313         }
1314 #endif
1315 }
1316
1317 /* tasklet for iwlagn interrupt */
1318 static void iwl_irq_tasklet(struct iwl_priv *priv)
1319 {
1320         u32 inta = 0;
1321         u32 handled = 0;
1322         unsigned long flags;
1323         u32 i;
1324 #ifdef CONFIG_IWLWIFI_DEBUG
1325         u32 inta_mask;
1326 #endif
1327
1328         spin_lock_irqsave(&priv->lock, flags);
1329
1330         /* Ack/clear/reset pending uCode interrupts.
1331          * Note:  Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1332          */
1333         /* There is a hardware bug in the interrupt mask function that some
1334          * interrupts (i.e. CSR_INT_BIT_SCD) can still be generated even if
1335          * they are disabled in the CSR_INT_MASK register. Furthermore the
1336          * ICT interrupt handling mechanism has another bug that might cause
1337          * these unmasked interrupts fail to be detected. We workaround the
1338          * hardware bugs here by ACKing all the possible interrupts so that
1339          * interrupt coalescing can still be achieved.
1340          */
1341         iwl_write32(priv, CSR_INT, priv->_agn.inta | ~priv->inta_mask);
1342
1343         inta = priv->_agn.inta;
1344
1345 #ifdef CONFIG_IWLWIFI_DEBUG
1346         if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
1347                 /* just for debug */
1348                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1349                 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x\n ",
1350                                 inta, inta_mask);
1351         }
1352 #endif
1353
1354         spin_unlock_irqrestore(&priv->lock, flags);
1355
1356         /* saved interrupt in inta variable now we can reset priv->_agn.inta */
1357         priv->_agn.inta = 0;
1358
1359         /* Now service all interrupt bits discovered above. */
1360         if (inta & CSR_INT_BIT_HW_ERR) {
1361                 IWL_ERR(priv, "Hardware error detected.  Restarting.\n");
1362
1363                 /* Tell the device to stop sending interrupts */
1364                 iwl_disable_interrupts(priv);
1365
1366                 priv->isr_stats.hw++;
1367                 iwl_irq_handle_error(priv);
1368
1369                 handled |= CSR_INT_BIT_HW_ERR;
1370
1371                 return;
1372         }
1373
1374 #ifdef CONFIG_IWLWIFI_DEBUG
1375         if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1376                 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1377                 if (inta & CSR_INT_BIT_SCD) {
1378                         IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1379                                       "the frame/frames.\n");
1380                         priv->isr_stats.sch++;
1381                 }
1382
1383                 /* Alive notification via Rx interrupt will do the real work */
1384                 if (inta & CSR_INT_BIT_ALIVE) {
1385                         IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1386                         priv->isr_stats.alive++;
1387                 }
1388         }
1389 #endif
1390         /* Safely ignore these bits for debug checks below */
1391         inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1392
1393         /* HW RF KILL switch toggled */
1394         if (inta & CSR_INT_BIT_RF_KILL) {
1395                 int hw_rf_kill = 0;
1396                 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
1397                                 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1398                         hw_rf_kill = 1;
1399
1400                 IWL_WARN(priv, "RF_KILL bit toggled to %s.\n",
1401                                 hw_rf_kill ? "disable radio" : "enable radio");
1402
1403                 priv->isr_stats.rfkill++;
1404
1405                 /* driver only loads ucode once setting the interface up.
1406                  * the driver allows loading the ucode even if the radio
1407                  * is killed. Hence update the killswitch state here. The
1408                  * rfkill handler will care about restarting if needed.
1409                  */
1410                 if (!test_bit(STATUS_ALIVE, &priv->status)) {
1411                         if (hw_rf_kill)
1412                                 set_bit(STATUS_RF_KILL_HW, &priv->status);
1413                         else
1414                                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1415                         wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
1416                 }
1417
1418                 handled |= CSR_INT_BIT_RF_KILL;
1419         }
1420
1421         /* Chip got too hot and stopped itself */
1422         if (inta & CSR_INT_BIT_CT_KILL) {
1423                 IWL_ERR(priv, "Microcode CT kill error detected.\n");
1424                 priv->isr_stats.ctkill++;
1425                 handled |= CSR_INT_BIT_CT_KILL;
1426         }
1427
1428         /* Error detected by uCode */
1429         if (inta & CSR_INT_BIT_SW_ERR) {
1430                 IWL_ERR(priv, "Microcode SW error detected. "
1431                         " Restarting 0x%X.\n", inta);
1432                 priv->isr_stats.sw++;
1433                 priv->isr_stats.sw_err = inta;
1434                 iwl_irq_handle_error(priv);
1435                 handled |= CSR_INT_BIT_SW_ERR;
1436         }
1437
1438         /* uCode wakes up after power-down sleep */
1439         if (inta & CSR_INT_BIT_WAKEUP) {
1440                 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1441                 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1442                 for (i = 0; i < priv->hw_params.max_txq_num; i++)
1443                         iwl_txq_update_write_ptr(priv, &priv->txq[i]);
1444
1445                 priv->isr_stats.wakeup++;
1446
1447                 handled |= CSR_INT_BIT_WAKEUP;
1448         }
1449
1450         /* All uCode command responses, including Tx command responses,
1451          * Rx "responses" (frame-received notification), and other
1452          * notifications from uCode come through here*/
1453         if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX |
1454                         CSR_INT_BIT_RX_PERIODIC)) {
1455                 IWL_DEBUG_ISR(priv, "Rx interrupt\n");
1456                 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1457                         handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1458                         iwl_write32(priv, CSR_FH_INT_STATUS,
1459                                         CSR49_FH_INT_RX_MASK);
1460                 }
1461                 if (inta & CSR_INT_BIT_RX_PERIODIC) {
1462                         handled |= CSR_INT_BIT_RX_PERIODIC;
1463                         iwl_write32(priv, CSR_INT, CSR_INT_BIT_RX_PERIODIC);
1464                 }
1465                 /* Sending RX interrupt require many steps to be done in the
1466                  * the device:
1467                  * 1- write interrupt to current index in ICT table.
1468                  * 2- dma RX frame.
1469                  * 3- update RX shared data to indicate last write index.
1470                  * 4- send interrupt.
1471                  * This could lead to RX race, driver could receive RX interrupt
1472                  * but the shared data changes does not reflect this;
1473                  * periodic interrupt will detect any dangling Rx activity.
1474                  */
1475
1476                 /* Disable periodic interrupt; we use it as just a one-shot. */
1477                 iwl_write8(priv, CSR_INT_PERIODIC_REG,
1478                             CSR_INT_PERIODIC_DIS);
1479                 iwl_rx_handle(priv);
1480
1481                 /*
1482                  * Enable periodic interrupt in 8 msec only if we received
1483                  * real RX interrupt (instead of just periodic int), to catch
1484                  * any dangling Rx interrupt.  If it was just the periodic
1485                  * interrupt, there was no dangling Rx activity, and no need
1486                  * to extend the periodic interrupt; one-shot is enough.
1487                  */
1488                 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX))
1489                         iwl_write8(priv, CSR_INT_PERIODIC_REG,
1490                                     CSR_INT_PERIODIC_ENA);
1491
1492                 priv->isr_stats.rx++;
1493         }
1494
1495         /* This "Tx" DMA channel is used only for loading uCode */
1496         if (inta & CSR_INT_BIT_FH_TX) {
1497                 iwl_write32(priv, CSR_FH_INT_STATUS, CSR49_FH_INT_TX_MASK);
1498                 IWL_DEBUG_ISR(priv, "uCode load interrupt\n");
1499                 priv->isr_stats.tx++;
1500                 handled |= CSR_INT_BIT_FH_TX;
1501                 /* Wake up uCode load routine, now that load is complete */
1502                 priv->ucode_write_complete = 1;
1503                 wake_up_interruptible(&priv->wait_command_queue);
1504         }
1505
1506         if (inta & ~handled) {
1507                 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1508                 priv->isr_stats.unhandled++;
1509         }
1510
1511         if (inta & ~(priv->inta_mask)) {
1512                 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1513                          inta & ~priv->inta_mask);
1514         }
1515
1516         /* Re-enable all interrupts */
1517         /* only Re-enable if diabled by irq */
1518         if (test_bit(STATUS_INT_ENABLED, &priv->status))
1519                 iwl_enable_interrupts(priv);
1520 }
1521
1522 /* the threshold ratio of actual_ack_cnt to expected_ack_cnt in percent */
1523 #define ACK_CNT_RATIO (50)
1524 #define BA_TIMEOUT_CNT (5)
1525 #define BA_TIMEOUT_MAX (16)
1526
1527 /**
1528  * iwl_good_ack_health - checks for ACK count ratios, BA timeout retries.
1529  *
1530  * When the ACK count ratio is 0 and aggregated BA timeout retries exceeding
1531  * the BA_TIMEOUT_MAX, reload firmware and bring system back to normal
1532  * operation state.
1533  */
1534 bool iwl_good_ack_health(struct iwl_priv *priv,
1535                                 struct iwl_rx_packet *pkt)
1536 {
1537         bool rc = true;
1538         int actual_ack_cnt_delta, expected_ack_cnt_delta;
1539         int ba_timeout_delta;
1540
1541         actual_ack_cnt_delta =
1542                 le32_to_cpu(pkt->u.stats.tx.actual_ack_cnt) -
1543                 le32_to_cpu(priv->_agn.statistics.tx.actual_ack_cnt);
1544         expected_ack_cnt_delta =
1545                 le32_to_cpu(pkt->u.stats.tx.expected_ack_cnt) -
1546                 le32_to_cpu(priv->_agn.statistics.tx.expected_ack_cnt);
1547         ba_timeout_delta =
1548                 le32_to_cpu(pkt->u.stats.tx.agg.ba_timeout) -
1549                 le32_to_cpu(priv->_agn.statistics.tx.agg.ba_timeout);
1550         if ((priv->_agn.agg_tids_count > 0) &&
1551             (expected_ack_cnt_delta > 0) &&
1552             (((actual_ack_cnt_delta * 100) / expected_ack_cnt_delta)
1553                 < ACK_CNT_RATIO) &&
1554             (ba_timeout_delta > BA_TIMEOUT_CNT)) {
1555                 IWL_DEBUG_RADIO(priv, "actual_ack_cnt delta = %d,"
1556                                 " expected_ack_cnt = %d\n",
1557                                 actual_ack_cnt_delta, expected_ack_cnt_delta);
1558
1559 #ifdef CONFIG_IWLWIFI_DEBUGFS
1560                 /*
1561                  * This is ifdef'ed on DEBUGFS because otherwise the
1562                  * statistics aren't available. If DEBUGFS is set but
1563                  * DEBUG is not, these will just compile out.
1564                  */
1565                 IWL_DEBUG_RADIO(priv, "rx_detected_cnt delta = %d\n",
1566                                 priv->_agn.delta_statistics.tx.rx_detected_cnt);
1567                 IWL_DEBUG_RADIO(priv,
1568                                 "ack_or_ba_timeout_collision delta = %d\n",
1569                                 priv->_agn.delta_statistics.tx.
1570                                 ack_or_ba_timeout_collision);
1571 #endif
1572                 IWL_DEBUG_RADIO(priv, "agg ba_timeout delta = %d\n",
1573                                 ba_timeout_delta);
1574                 if (!actual_ack_cnt_delta &&
1575                     (ba_timeout_delta >= BA_TIMEOUT_MAX))
1576                         rc = false;
1577         }
1578         return rc;
1579 }
1580
1581
1582 /*****************************************************************************
1583  *
1584  * sysfs attributes
1585  *
1586  *****************************************************************************/
1587
1588 #ifdef CONFIG_IWLWIFI_DEBUG
1589
1590 /*
1591  * The following adds a new attribute to the sysfs representation
1592  * of this device driver (i.e. a new file in /sys/class/net/wlan0/device/)
1593  * used for controlling the debug level.
1594  *
1595  * See the level definitions in iwl for details.
1596  *
1597  * The debug_level being managed using sysfs below is a per device debug
1598  * level that is used instead of the global debug level if it (the per
1599  * device debug level) is set.
1600  */
1601 static ssize_t show_debug_level(struct device *d,
1602                                 struct device_attribute *attr, char *buf)
1603 {
1604         struct iwl_priv *priv = dev_get_drvdata(d);
1605         return sprintf(buf, "0x%08X\n", iwl_get_debug_level(priv));
1606 }
1607 static ssize_t store_debug_level(struct device *d,
1608                                 struct device_attribute *attr,
1609                                  const char *buf, size_t count)
1610 {
1611         struct iwl_priv *priv = dev_get_drvdata(d);
1612         unsigned long val;
1613         int ret;
1614
1615         ret = strict_strtoul(buf, 0, &val);
1616         if (ret)
1617                 IWL_ERR(priv, "%s is not in hex or decimal form.\n", buf);
1618         else {
1619                 priv->debug_level = val;
1620                 if (iwl_alloc_traffic_mem(priv))
1621                         IWL_ERR(priv,
1622                                 "Not enough memory to generate traffic log\n");
1623         }
1624         return strnlen(buf, count);
1625 }
1626
1627 static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
1628                         show_debug_level, store_debug_level);
1629
1630
1631 #endif /* CONFIG_IWLWIFI_DEBUG */
1632
1633
1634 static ssize_t show_temperature(struct device *d,
1635                                 struct device_attribute *attr, char *buf)
1636 {
1637         struct iwl_priv *priv = dev_get_drvdata(d);
1638
1639         if (!iwl_is_alive(priv))
1640                 return -EAGAIN;
1641
1642         return sprintf(buf, "%d\n", priv->temperature);
1643 }
1644
1645 static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
1646
1647 static ssize_t show_tx_power(struct device *d,
1648                              struct device_attribute *attr, char *buf)
1649 {
1650         struct iwl_priv *priv = dev_get_drvdata(d);
1651
1652         if (!iwl_is_ready_rf(priv))
1653                 return sprintf(buf, "off\n");
1654         else
1655                 return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
1656 }
1657
1658 static ssize_t store_tx_power(struct device *d,
1659                               struct device_attribute *attr,
1660                               const char *buf, size_t count)
1661 {
1662         struct iwl_priv *priv = dev_get_drvdata(d);
1663         unsigned long val;
1664         int ret;
1665
1666         ret = strict_strtoul(buf, 10, &val);
1667         if (ret)
1668                 IWL_INFO(priv, "%s is not in decimal form.\n", buf);
1669         else {
1670                 ret = iwl_set_tx_power(priv, val, false);
1671                 if (ret)
1672                         IWL_ERR(priv, "failed setting tx power (0x%d).\n",
1673                                 ret);
1674                 else
1675                         ret = count;
1676         }
1677         return ret;
1678 }
1679
1680 static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
1681
1682 static struct attribute *iwl_sysfs_entries[] = {
1683         &dev_attr_temperature.attr,
1684         &dev_attr_tx_power.attr,
1685 #ifdef CONFIG_IWLWIFI_DEBUG
1686         &dev_attr_debug_level.attr,
1687 #endif
1688         NULL
1689 };
1690
1691 static struct attribute_group iwl_attribute_group = {
1692         .name = NULL,           /* put in device directory */
1693         .attrs = iwl_sysfs_entries,
1694 };
1695
1696 /******************************************************************************
1697  *
1698  * uCode download functions
1699  *
1700  ******************************************************************************/
1701
1702 static void iwl_dealloc_ucode_pci(struct iwl_priv *priv)
1703 {
1704         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
1705         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
1706         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1707         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
1708         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1709         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
1710 }
1711
1712 static void iwl_nic_start(struct iwl_priv *priv)
1713 {
1714         /* Remove all resets to allow NIC to operate */
1715         iwl_write32(priv, CSR_RESET, 0);
1716 }
1717
1718 struct iwlagn_ucode_capabilities {
1719         u32 max_probe_length;
1720         u32 standard_phy_calibration_size;
1721         bool pan;
1722 };
1723
1724 static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context);
1725 static int iwl_mac_setup_register(struct iwl_priv *priv,
1726                                   struct iwlagn_ucode_capabilities *capa);
1727
1728 #define UCODE_EXPERIMENTAL_INDEX        100
1729 #define UCODE_EXPERIMENTAL_TAG          "exp"
1730
1731 static int __must_check iwl_request_firmware(struct iwl_priv *priv, bool first)
1732 {
1733         const char *name_pre = priv->cfg->fw_name_pre;
1734         char tag[8];
1735
1736         if (first) {
1737 #ifdef CONFIG_IWLWIFI_DEBUG_EXPERIMENTAL_UCODE
1738                 priv->fw_index = UCODE_EXPERIMENTAL_INDEX;
1739                 strcpy(tag, UCODE_EXPERIMENTAL_TAG);
1740         } else if (priv->fw_index == UCODE_EXPERIMENTAL_INDEX) {
1741 #endif
1742                 priv->fw_index = priv->cfg->ucode_api_max;
1743                 sprintf(tag, "%d", priv->fw_index);
1744         } else {
1745                 priv->fw_index--;
1746                 sprintf(tag, "%d", priv->fw_index);
1747         }
1748
1749         if (priv->fw_index < priv->cfg->ucode_api_min) {
1750                 IWL_ERR(priv, "no suitable firmware found!\n");
1751                 return -ENOENT;
1752         }
1753
1754         sprintf(priv->firmware_name, "%s%s%s", name_pre, tag, ".ucode");
1755
1756         IWL_DEBUG_INFO(priv, "attempting to load firmware %s'%s'\n",
1757                        (priv->fw_index == UCODE_EXPERIMENTAL_INDEX)
1758                                 ? "EXPERIMENTAL " : "",
1759                        priv->firmware_name);
1760
1761         return request_firmware_nowait(THIS_MODULE, 1, priv->firmware_name,
1762                                        &priv->pci_dev->dev, GFP_KERNEL, priv,
1763                                        iwl_ucode_callback);
1764 }
1765
1766 struct iwlagn_firmware_pieces {
1767         const void *inst, *data, *init, *init_data, *boot;
1768         size_t inst_size, data_size, init_size, init_data_size, boot_size;
1769
1770         u32 build;
1771
1772         u32 init_evtlog_ptr, init_evtlog_size, init_errlog_ptr;
1773         u32 inst_evtlog_ptr, inst_evtlog_size, inst_errlog_ptr;
1774 };
1775
1776 static int iwlagn_load_legacy_firmware(struct iwl_priv *priv,
1777                                        const struct firmware *ucode_raw,
1778                                        struct iwlagn_firmware_pieces *pieces)
1779 {
1780         struct iwl_ucode_header *ucode = (void *)ucode_raw->data;
1781         u32 api_ver, hdr_size;
1782         const u8 *src;
1783
1784         priv->ucode_ver = le32_to_cpu(ucode->ver);
1785         api_ver = IWL_UCODE_API(priv->ucode_ver);
1786
1787         switch (api_ver) {
1788         default:
1789                 /*
1790                  * 4965 doesn't revision the firmware file format
1791                  * along with the API version, it always uses v1
1792                  * file format.
1793                  */
1794                 if ((priv->hw_rev & CSR_HW_REV_TYPE_MSK) !=
1795                                 CSR_HW_REV_TYPE_4965) {
1796                         hdr_size = 28;
1797                         if (ucode_raw->size < hdr_size) {
1798                                 IWL_ERR(priv, "File size too small!\n");
1799                                 return -EINVAL;
1800                         }
1801                         pieces->build = le32_to_cpu(ucode->u.v2.build);
1802                         pieces->inst_size = le32_to_cpu(ucode->u.v2.inst_size);
1803                         pieces->data_size = le32_to_cpu(ucode->u.v2.data_size);
1804                         pieces->init_size = le32_to_cpu(ucode->u.v2.init_size);
1805                         pieces->init_data_size = le32_to_cpu(ucode->u.v2.init_data_size);
1806                         pieces->boot_size = le32_to_cpu(ucode->u.v2.boot_size);
1807                         src = ucode->u.v2.data;
1808                         break;
1809                 }
1810                 /* fall through for 4965 */
1811         case 0:
1812         case 1:
1813         case 2:
1814                 hdr_size = 24;
1815                 if (ucode_raw->size < hdr_size) {
1816                         IWL_ERR(priv, "File size too small!\n");
1817                         return -EINVAL;
1818                 }
1819                 pieces->build = 0;
1820                 pieces->inst_size = le32_to_cpu(ucode->u.v1.inst_size);
1821                 pieces->data_size = le32_to_cpu(ucode->u.v1.data_size);
1822                 pieces->init_size = le32_to_cpu(ucode->u.v1.init_size);
1823                 pieces->init_data_size = le32_to_cpu(ucode->u.v1.init_data_size);
1824                 pieces->boot_size = le32_to_cpu(ucode->u.v1.boot_size);
1825                 src = ucode->u.v1.data;
1826                 break;
1827         }
1828
1829         /* Verify size of file vs. image size info in file's header */
1830         if (ucode_raw->size != hdr_size + pieces->inst_size +
1831                                 pieces->data_size + pieces->init_size +
1832                                 pieces->init_data_size + pieces->boot_size) {
1833
1834                 IWL_ERR(priv,
1835                         "uCode file size %d does not match expected size\n",
1836                         (int)ucode_raw->size);
1837                 return -EINVAL;
1838         }
1839
1840         pieces->inst = src;
1841         src += pieces->inst_size;
1842         pieces->data = src;
1843         src += pieces->data_size;
1844         pieces->init = src;
1845         src += pieces->init_size;
1846         pieces->init_data = src;
1847         src += pieces->init_data_size;
1848         pieces->boot = src;
1849         src += pieces->boot_size;
1850
1851         return 0;
1852 }
1853
1854 static int iwlagn_wanted_ucode_alternative = 1;
1855
1856 static int iwlagn_load_firmware(struct iwl_priv *priv,
1857                                 const struct firmware *ucode_raw,
1858                                 struct iwlagn_firmware_pieces *pieces,
1859                                 struct iwlagn_ucode_capabilities *capa)
1860 {
1861         struct iwl_tlv_ucode_header *ucode = (void *)ucode_raw->data;
1862         struct iwl_ucode_tlv *tlv;
1863         size_t len = ucode_raw->size;
1864         const u8 *data;
1865         int wanted_alternative = iwlagn_wanted_ucode_alternative, tmp;
1866         u64 alternatives;
1867         u32 tlv_len;
1868         enum iwl_ucode_tlv_type tlv_type;
1869         const u8 *tlv_data;
1870
1871         if (len < sizeof(*ucode)) {
1872                 IWL_ERR(priv, "uCode has invalid length: %zd\n", len);
1873                 return -EINVAL;
1874         }
1875
1876         if (ucode->magic != cpu_to_le32(IWL_TLV_UCODE_MAGIC)) {
1877                 IWL_ERR(priv, "invalid uCode magic: 0X%x\n",
1878                         le32_to_cpu(ucode->magic));
1879                 return -EINVAL;
1880         }
1881
1882         /*
1883          * Check which alternatives are present, and "downgrade"
1884          * when the chosen alternative is not present, warning
1885          * the user when that happens. Some files may not have
1886          * any alternatives, so don't warn in that case.
1887          */
1888         alternatives = le64_to_cpu(ucode->alternatives);
1889         tmp = wanted_alternative;
1890         if (wanted_alternative > 63)
1891                 wanted_alternative = 63;
1892         while (wanted_alternative && !(alternatives & BIT(wanted_alternative)))
1893                 wanted_alternative--;
1894         if (wanted_alternative && wanted_alternative != tmp)
1895                 IWL_WARN(priv,
1896                          "uCode alternative %d not available, choosing %d\n",
1897                          tmp, wanted_alternative);
1898
1899         priv->ucode_ver = le32_to_cpu(ucode->ver);
1900         pieces->build = le32_to_cpu(ucode->build);
1901         data = ucode->data;
1902
1903         len -= sizeof(*ucode);
1904
1905         while (len >= sizeof(*tlv)) {
1906                 u16 tlv_alt;
1907
1908                 len -= sizeof(*tlv);
1909                 tlv = (void *)data;
1910
1911                 tlv_len = le32_to_cpu(tlv->length);
1912                 tlv_type = le16_to_cpu(tlv->type);
1913                 tlv_alt = le16_to_cpu(tlv->alternative);
1914                 tlv_data = tlv->data;
1915
1916                 if (len < tlv_len) {
1917                         IWL_ERR(priv, "invalid TLV len: %zd/%u\n",
1918                                 len, tlv_len);
1919                         return -EINVAL;
1920                 }
1921                 len -= ALIGN(tlv_len, 4);
1922                 data += sizeof(*tlv) + ALIGN(tlv_len, 4);
1923
1924                 /*
1925                  * Alternative 0 is always valid.
1926                  *
1927                  * Skip alternative TLVs that are not selected.
1928                  */
1929                 if (tlv_alt != 0 && tlv_alt != wanted_alternative)
1930                         continue;
1931
1932                 switch (tlv_type) {
1933                 case IWL_UCODE_TLV_INST:
1934                         pieces->inst = tlv_data;
1935                         pieces->inst_size = tlv_len;
1936                         break;
1937                 case IWL_UCODE_TLV_DATA:
1938                         pieces->data = tlv_data;
1939                         pieces->data_size = tlv_len;
1940                         break;
1941                 case IWL_UCODE_TLV_INIT:
1942                         pieces->init = tlv_data;
1943                         pieces->init_size = tlv_len;
1944                         break;
1945                 case IWL_UCODE_TLV_INIT_DATA:
1946                         pieces->init_data = tlv_data;
1947                         pieces->init_data_size = tlv_len;
1948                         break;
1949                 case IWL_UCODE_TLV_BOOT:
1950                         pieces->boot = tlv_data;
1951                         pieces->boot_size = tlv_len;
1952                         break;
1953                 case IWL_UCODE_TLV_PROBE_MAX_LEN:
1954                         if (tlv_len != sizeof(u32))
1955                                 goto invalid_tlv_len;
1956                         capa->max_probe_length =
1957                                         le32_to_cpup((__le32 *)tlv_data);
1958                         break;
1959                 case IWL_UCODE_TLV_PAN:
1960                         if (tlv_len)
1961                                 goto invalid_tlv_len;
1962                         capa->pan = true;
1963                         break;
1964                 case IWL_UCODE_TLV_INIT_EVTLOG_PTR:
1965                         if (tlv_len != sizeof(u32))
1966                                 goto invalid_tlv_len;
1967                         pieces->init_evtlog_ptr =
1968                                         le32_to_cpup((__le32 *)tlv_data);
1969                         break;
1970                 case IWL_UCODE_TLV_INIT_EVTLOG_SIZE:
1971                         if (tlv_len != sizeof(u32))
1972                                 goto invalid_tlv_len;
1973                         pieces->init_evtlog_size =
1974                                         le32_to_cpup((__le32 *)tlv_data);
1975                         break;
1976                 case IWL_UCODE_TLV_INIT_ERRLOG_PTR:
1977                         if (tlv_len != sizeof(u32))
1978                                 goto invalid_tlv_len;
1979                         pieces->init_errlog_ptr =
1980                                         le32_to_cpup((__le32 *)tlv_data);
1981                         break;
1982                 case IWL_UCODE_TLV_RUNT_EVTLOG_PTR:
1983                         if (tlv_len != sizeof(u32))
1984                                 goto invalid_tlv_len;
1985                         pieces->inst_evtlog_ptr =
1986                                         le32_to_cpup((__le32 *)tlv_data);
1987                         break;
1988                 case IWL_UCODE_TLV_RUNT_EVTLOG_SIZE:
1989                         if (tlv_len != sizeof(u32))
1990                                 goto invalid_tlv_len;
1991                         pieces->inst_evtlog_size =
1992                                         le32_to_cpup((__le32 *)tlv_data);
1993                         break;
1994                 case IWL_UCODE_TLV_RUNT_ERRLOG_PTR:
1995                         if (tlv_len != sizeof(u32))
1996                                 goto invalid_tlv_len;
1997                         pieces->inst_errlog_ptr =
1998                                         le32_to_cpup((__le32 *)tlv_data);
1999                         break;
2000                 case IWL_UCODE_TLV_ENHANCE_SENS_TBL:
2001                         if (tlv_len)
2002                                 goto invalid_tlv_len;
2003                         priv->enhance_sensitivity_table = true;
2004                         break;
2005                 case IWL_UCODE_TLV_PHY_CALIBRATION_SIZE:
2006                         if (tlv_len != sizeof(u32))
2007                                 goto invalid_tlv_len;
2008                         capa->standard_phy_calibration_size =
2009                                         le32_to_cpup((__le32 *)tlv_data);
2010                         break;
2011                 default:
2012                         IWL_WARN(priv, "unknown TLV: %d\n", tlv_type);
2013                         break;
2014                 }
2015         }
2016
2017         if (len) {
2018                 IWL_ERR(priv, "invalid TLV after parsing: %zd\n", len);
2019                 iwl_print_hex_dump(priv, IWL_DL_FW, (u8 *)data, len);
2020                 return -EINVAL;
2021         }
2022
2023         return 0;
2024
2025  invalid_tlv_len:
2026         IWL_ERR(priv, "TLV %d has invalid size: %u\n", tlv_type, tlv_len);
2027         iwl_print_hex_dump(priv, IWL_DL_FW, tlv_data, tlv_len);
2028
2029         return -EINVAL;
2030 }
2031
2032 /**
2033  * iwl_ucode_callback - callback when firmware was loaded
2034  *
2035  * If loaded successfully, copies the firmware into buffers
2036  * for the card to fetch (via DMA).
2037  */
2038 static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context)
2039 {
2040         struct iwl_priv *priv = context;
2041         struct iwl_ucode_header *ucode;
2042         int err;
2043         struct iwlagn_firmware_pieces pieces;
2044         const unsigned int api_max = priv->cfg->ucode_api_max;
2045         const unsigned int api_min = priv->cfg->ucode_api_min;
2046         u32 api_ver;
2047         char buildstr[25];
2048         u32 build;
2049         struct iwlagn_ucode_capabilities ucode_capa = {
2050                 .max_probe_length = 200,
2051                 .standard_phy_calibration_size =
2052                         IWL_MAX_STANDARD_PHY_CALIBRATE_TBL_SIZE,
2053         };
2054
2055         memset(&pieces, 0, sizeof(pieces));
2056
2057         if (!ucode_raw) {
2058                 if (priv->fw_index <= priv->cfg->ucode_api_max)
2059                         IWL_ERR(priv,
2060                                 "request for firmware file '%s' failed.\n",
2061                                 priv->firmware_name);
2062                 goto try_again;
2063         }
2064
2065         IWL_DEBUG_INFO(priv, "Loaded firmware file '%s' (%zd bytes).\n",
2066                        priv->firmware_name, ucode_raw->size);
2067
2068         /* Make sure that we got at least the API version number */
2069         if (ucode_raw->size < 4) {
2070                 IWL_ERR(priv, "File size way too small!\n");
2071                 goto try_again;
2072         }
2073
2074         /* Data from ucode file:  header followed by uCode images */
2075         ucode = (struct iwl_ucode_header *)ucode_raw->data;
2076
2077         if (ucode->ver)
2078                 err = iwlagn_load_legacy_firmware(priv, ucode_raw, &pieces);
2079         else
2080                 err = iwlagn_load_firmware(priv, ucode_raw, &pieces,
2081                                            &ucode_capa);
2082
2083         if (err)
2084                 goto try_again;
2085
2086         api_ver = IWL_UCODE_API(priv->ucode_ver);
2087         build = pieces.build;
2088
2089         /*
2090          * api_ver should match the api version forming part of the
2091          * firmware filename ... but we don't check for that and only rely
2092          * on the API version read from firmware header from here on forward
2093          */
2094         if (api_ver < api_min || api_ver > api_max) {
2095                 IWL_ERR(priv, "Driver unable to support your firmware API. "
2096                           "Driver supports v%u, firmware is v%u.\n",
2097                           api_max, api_ver);
2098                 goto try_again;
2099         }
2100
2101         if (api_ver != api_max)
2102                 IWL_ERR(priv, "Firmware has old API version. Expected v%u, "
2103                           "got v%u. New firmware can be obtained "
2104                           "from http://www.intellinuxwireless.org.\n",
2105                           api_max, api_ver);
2106
2107         if (build)
2108                 sprintf(buildstr, " build %u%s", build,
2109                        (priv->fw_index == UCODE_EXPERIMENTAL_INDEX)
2110                                 ? " (EXP)" : "");
2111         else
2112                 buildstr[0] = '\0';
2113
2114         IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u%s\n",
2115                  IWL_UCODE_MAJOR(priv->ucode_ver),
2116                  IWL_UCODE_MINOR(priv->ucode_ver),
2117                  IWL_UCODE_API(priv->ucode_ver),
2118                  IWL_UCODE_SERIAL(priv->ucode_ver),
2119                  buildstr);
2120
2121         snprintf(priv->hw->wiphy->fw_version,
2122                  sizeof(priv->hw->wiphy->fw_version),
2123                  "%u.%u.%u.%u%s",
2124                  IWL_UCODE_MAJOR(priv->ucode_ver),
2125                  IWL_UCODE_MINOR(priv->ucode_ver),
2126                  IWL_UCODE_API(priv->ucode_ver),
2127                  IWL_UCODE_SERIAL(priv->ucode_ver),
2128                  buildstr);
2129
2130         /*
2131          * For any of the failures below (before allocating pci memory)
2132          * we will try to load a version with a smaller API -- maybe the
2133          * user just got a corrupted version of the latest API.
2134          */
2135
2136         IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
2137                        priv->ucode_ver);
2138         IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %Zd\n",
2139                        pieces.inst_size);
2140         IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %Zd\n",
2141                        pieces.data_size);
2142         IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %Zd\n",
2143                        pieces.init_size);
2144         IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %Zd\n",
2145                        pieces.init_data_size);
2146         IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %Zd\n",
2147                        pieces.boot_size);
2148
2149         /* Verify that uCode images will fit in card's SRAM */
2150         if (pieces.inst_size > priv->hw_params.max_inst_size) {
2151                 IWL_ERR(priv, "uCode instr len %Zd too large to fit in\n",
2152                         pieces.inst_size);
2153                 goto try_again;
2154         }
2155
2156         if (pieces.data_size > priv->hw_params.max_data_size) {
2157                 IWL_ERR(priv, "uCode data len %Zd too large to fit in\n",
2158                         pieces.data_size);
2159                 goto try_again;
2160         }
2161
2162         if (pieces.init_size > priv->hw_params.max_inst_size) {
2163                 IWL_ERR(priv, "uCode init instr len %Zd too large to fit in\n",
2164                         pieces.init_size);
2165                 goto try_again;
2166         }
2167
2168         if (pieces.init_data_size > priv->hw_params.max_data_size) {
2169                 IWL_ERR(priv, "uCode init data len %Zd too large to fit in\n",
2170                         pieces.init_data_size);
2171                 goto try_again;
2172         }
2173
2174         if (pieces.boot_size > priv->hw_params.max_bsm_size) {
2175                 IWL_ERR(priv, "uCode boot instr len %Zd too large to fit in\n",
2176                         pieces.boot_size);
2177                 goto try_again;
2178         }
2179
2180         /* Allocate ucode buffers for card's bus-master loading ... */
2181
2182         /* Runtime instructions and 2 copies of data:
2183          * 1) unmodified from disk
2184          * 2) backup cache for save/restore during power-downs */
2185         priv->ucode_code.len = pieces.inst_size;
2186         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
2187
2188         priv->ucode_data.len = pieces.data_size;
2189         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
2190
2191         priv->ucode_data_backup.len = pieces.data_size;
2192         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
2193
2194         if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
2195             !priv->ucode_data_backup.v_addr)
2196                 goto err_pci_alloc;
2197
2198         /* Initialization instructions and data */
2199         if (pieces.init_size && pieces.init_data_size) {
2200                 priv->ucode_init.len = pieces.init_size;
2201                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
2202
2203                 priv->ucode_init_data.len = pieces.init_data_size;
2204                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
2205
2206                 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
2207                         goto err_pci_alloc;
2208         }
2209
2210         /* Bootstrap (instructions only, no data) */
2211         if (pieces.boot_size) {
2212                 priv->ucode_boot.len = pieces.boot_size;
2213                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
2214
2215                 if (!priv->ucode_boot.v_addr)
2216                         goto err_pci_alloc;
2217         }
2218
2219         /* Now that we can no longer fail, copy information */
2220
2221         /*
2222          * The (size - 16) / 12 formula is based on the information recorded
2223          * for each event, which is of mode 1 (including timestamp) for all
2224          * new microcodes that include this information.
2225          */
2226         priv->_agn.init_evtlog_ptr = pieces.init_evtlog_ptr;
2227         if (pieces.init_evtlog_size)
2228                 priv->_agn.init_evtlog_size = (pieces.init_evtlog_size - 16)/12;
2229         else
2230                 priv->_agn.init_evtlog_size = priv->cfg->max_event_log_size;
2231         priv->_agn.init_errlog_ptr = pieces.init_errlog_ptr;
2232         priv->_agn.inst_evtlog_ptr = pieces.inst_evtlog_ptr;
2233         if (pieces.inst_evtlog_size)
2234                 priv->_agn.inst_evtlog_size = (pieces.inst_evtlog_size - 16)/12;
2235         else
2236                 priv->_agn.inst_evtlog_size = priv->cfg->max_event_log_size;
2237         priv->_agn.inst_errlog_ptr = pieces.inst_errlog_ptr;
2238
2239         if (ucode_capa.pan) {
2240                 priv->valid_contexts |= BIT(IWL_RXON_CTX_PAN);
2241                 priv->sta_key_max_num = STA_KEY_MAX_NUM_PAN;
2242         } else
2243                 priv->sta_key_max_num = STA_KEY_MAX_NUM;
2244
2245         /* Copy images into buffers for card's bus-master reads ... */
2246
2247         /* Runtime instructions (first block of data in file) */
2248         IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode instr len %Zd\n",
2249                         pieces.inst_size);
2250         memcpy(priv->ucode_code.v_addr, pieces.inst, pieces.inst_size);
2251
2252         IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
2253                 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
2254
2255         /*
2256          * Runtime data
2257          * NOTE:  Copy into backup buffer will be done in iwl_up()
2258          */
2259         IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode data len %Zd\n",
2260                         pieces.data_size);
2261         memcpy(priv->ucode_data.v_addr, pieces.data, pieces.data_size);
2262         memcpy(priv->ucode_data_backup.v_addr, pieces.data, pieces.data_size);
2263
2264         /* Initialization instructions */
2265         if (pieces.init_size) {
2266                 IWL_DEBUG_INFO(priv, "Copying (but not loading) init instr len %Zd\n",
2267                                 pieces.init_size);
2268                 memcpy(priv->ucode_init.v_addr, pieces.init, pieces.init_size);
2269         }
2270
2271         /* Initialization data */
2272         if (pieces.init_data_size) {
2273                 IWL_DEBUG_INFO(priv, "Copying (but not loading) init data len %Zd\n",
2274                                pieces.init_data_size);
2275                 memcpy(priv->ucode_init_data.v_addr, pieces.init_data,
2276                        pieces.init_data_size);
2277         }
2278
2279         /* Bootstrap instructions */
2280         IWL_DEBUG_INFO(priv, "Copying (but not loading) boot instr len %Zd\n",
2281                         pieces.boot_size);
2282         memcpy(priv->ucode_boot.v_addr, pieces.boot, pieces.boot_size);
2283
2284         /*
2285          * figure out the offset of chain noise reset and gain commands
2286          * base on the size of standard phy calibration commands table size
2287          */
2288         if (ucode_capa.standard_phy_calibration_size >
2289             IWL_MAX_PHY_CALIBRATE_TBL_SIZE)
2290                 ucode_capa.standard_phy_calibration_size =
2291                         IWL_MAX_STANDARD_PHY_CALIBRATE_TBL_SIZE;
2292
2293         priv->_agn.phy_calib_chain_noise_reset_cmd =
2294                 ucode_capa.standard_phy_calibration_size;
2295         priv->_agn.phy_calib_chain_noise_gain_cmd =
2296                 ucode_capa.standard_phy_calibration_size + 1;
2297
2298         /**************************************************
2299          * This is still part of probe() in a sense...
2300          *
2301          * 9. Setup and register with mac80211 and debugfs
2302          **************************************************/
2303         err = iwl_mac_setup_register(priv, &ucode_capa);
2304         if (err)
2305                 goto out_unbind;
2306
2307         err = iwl_dbgfs_register(priv, DRV_NAME);
2308         if (err)
2309                 IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err);
2310
2311         err = sysfs_create_group(&priv->pci_dev->dev.kobj,
2312                                         &iwl_attribute_group);
2313         if (err) {
2314                 IWL_ERR(priv, "failed to create sysfs device attributes\n");
2315                 goto out_unbind;
2316         }
2317
2318         /* We have our copies now, allow OS release its copies */
2319         release_firmware(ucode_raw);
2320         complete(&priv->_agn.firmware_loading_complete);
2321         return;
2322
2323  try_again:
2324         /* try next, if any */
2325         if (iwl_request_firmware(priv, false))
2326                 goto out_unbind;
2327         release_firmware(ucode_raw);
2328         return;
2329
2330  err_pci_alloc:
2331         IWL_ERR(priv, "failed to allocate pci memory\n");
2332         iwl_dealloc_ucode_pci(priv);
2333  out_unbind:
2334         complete(&priv->_agn.firmware_loading_complete);
2335         device_release_driver(&priv->pci_dev->dev);
2336         release_firmware(ucode_raw);
2337 }
2338
2339 static const char *desc_lookup_text[] = {
2340         "OK",
2341         "FAIL",
2342         "BAD_PARAM",
2343         "BAD_CHECKSUM",
2344         "NMI_INTERRUPT_WDG",
2345         "SYSASSERT",
2346         "FATAL_ERROR",
2347         "BAD_COMMAND",
2348         "HW_ERROR_TUNE_LOCK",
2349         "HW_ERROR_TEMPERATURE",
2350         "ILLEGAL_CHAN_FREQ",
2351         "VCC_NOT_STABLE",
2352         "FH_ERROR",
2353         "NMI_INTERRUPT_HOST",
2354         "NMI_INTERRUPT_ACTION_PT",
2355         "NMI_INTERRUPT_UNKNOWN",
2356         "UCODE_VERSION_MISMATCH",
2357         "HW_ERROR_ABS_LOCK",
2358         "HW_ERROR_CAL_LOCK_FAIL",
2359         "NMI_INTERRUPT_INST_ACTION_PT",
2360         "NMI_INTERRUPT_DATA_ACTION_PT",
2361         "NMI_TRM_HW_ER",
2362         "NMI_INTERRUPT_TRM",
2363         "NMI_INTERRUPT_BREAK_POINT"
2364         "DEBUG_0",
2365         "DEBUG_1",
2366         "DEBUG_2",
2367         "DEBUG_3",
2368 };
2369
2370 static struct { char *name; u8 num; } advanced_lookup[] = {
2371         { "NMI_INTERRUPT_WDG", 0x34 },
2372         { "SYSASSERT", 0x35 },
2373         { "UCODE_VERSION_MISMATCH", 0x37 },
2374         { "BAD_COMMAND", 0x38 },
2375         { "NMI_INTERRUPT_DATA_ACTION_PT", 0x3C },
2376         { "FATAL_ERROR", 0x3D },
2377         { "NMI_TRM_HW_ERR", 0x46 },
2378         { "NMI_INTERRUPT_TRM", 0x4C },
2379         { "NMI_INTERRUPT_BREAK_POINT", 0x54 },
2380         { "NMI_INTERRUPT_WDG_RXF_FULL", 0x5C },
2381         { "NMI_INTERRUPT_WDG_NO_RBD_RXF_FULL", 0x64 },
2382         { "NMI_INTERRUPT_HOST", 0x66 },
2383         { "NMI_INTERRUPT_ACTION_PT", 0x7C },
2384         { "NMI_INTERRUPT_UNKNOWN", 0x84 },
2385         { "NMI_INTERRUPT_INST_ACTION_PT", 0x86 },
2386         { "ADVANCED_SYSASSERT", 0 },
2387 };
2388
2389 static const char *desc_lookup(u32 num)
2390 {
2391         int i;
2392         int max = ARRAY_SIZE(desc_lookup_text);
2393
2394         if (num < max)
2395                 return desc_lookup_text[num];
2396
2397         max = ARRAY_SIZE(advanced_lookup) - 1;
2398         for (i = 0; i < max; i++) {
2399                 if (advanced_lookup[i].num == num)
2400                         break;;
2401         }
2402         return advanced_lookup[i].name;
2403 }
2404
2405 #define ERROR_START_OFFSET  (1 * sizeof(u32))
2406 #define ERROR_ELEM_SIZE     (7 * sizeof(u32))
2407
2408 void iwl_dump_nic_error_log(struct iwl_priv *priv)
2409 {
2410         u32 data2, line;
2411         u32 desc, time, count, base, data1;
2412         u32 blink1, blink2, ilink1, ilink2;
2413         u32 pc, hcmd;
2414
2415         if (priv->ucode_type == UCODE_INIT) {
2416                 base = le32_to_cpu(priv->card_alive_init.error_event_table_ptr);
2417                 if (!base)
2418                         base = priv->_agn.init_errlog_ptr;
2419         } else {
2420                 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
2421                 if (!base)
2422                         base = priv->_agn.inst_errlog_ptr;
2423         }
2424
2425         if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
2426                 IWL_ERR(priv,
2427                         "Not valid error log pointer 0x%08X for %s uCode\n",
2428                         base, (priv->ucode_type == UCODE_INIT) ? "Init" : "RT");
2429                 return;
2430         }
2431
2432         count = iwl_read_targ_mem(priv, base);
2433
2434         if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
2435                 IWL_ERR(priv, "Start IWL Error Log Dump:\n");
2436                 IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
2437                         priv->status, count);
2438         }
2439
2440         desc = iwl_read_targ_mem(priv, base + 1 * sizeof(u32));
2441         pc = iwl_read_targ_mem(priv, base + 2 * sizeof(u32));
2442         blink1 = iwl_read_targ_mem(priv, base + 3 * sizeof(u32));
2443         blink2 = iwl_read_targ_mem(priv, base + 4 * sizeof(u32));
2444         ilink1 = iwl_read_targ_mem(priv, base + 5 * sizeof(u32));
2445         ilink2 = iwl_read_targ_mem(priv, base + 6 * sizeof(u32));
2446         data1 = iwl_read_targ_mem(priv, base + 7 * sizeof(u32));
2447         data2 = iwl_read_targ_mem(priv, base + 8 * sizeof(u32));
2448         line = iwl_read_targ_mem(priv, base + 9 * sizeof(u32));
2449         time = iwl_read_targ_mem(priv, base + 11 * sizeof(u32));
2450         hcmd = iwl_read_targ_mem(priv, base + 22 * sizeof(u32));
2451
2452         trace_iwlwifi_dev_ucode_error(priv, desc, time, data1, data2, line,
2453                                       blink1, blink2, ilink1, ilink2);
2454
2455         IWL_ERR(priv, "Desc                                  Time       "
2456                 "data1      data2      line\n");
2457         IWL_ERR(priv, "%-28s (0x%04X) %010u 0x%08X 0x%08X %u\n",
2458                 desc_lookup(desc), desc, time, data1, data2, line);
2459         IWL_ERR(priv, "pc      blink1  blink2  ilink1  ilink2  hcmd\n");
2460         IWL_ERR(priv, "0x%05X 0x%05X 0x%05X 0x%05X 0x%05X 0x%05X\n",
2461                 pc, blink1, blink2, ilink1, ilink2, hcmd);
2462 }
2463
2464 #define EVENT_START_OFFSET  (4 * sizeof(u32))
2465
2466 /**
2467  * iwl_print_event_log - Dump error event log to syslog
2468  *
2469  */
2470 static int iwl_print_event_log(struct iwl_priv *priv, u32 start_idx,
2471                                u32 num_events, u32 mode,
2472                                int pos, char **buf, size_t bufsz)
2473 {
2474         u32 i;
2475         u32 base;       /* SRAM byte address of event log header */
2476         u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
2477         u32 ptr;        /* SRAM byte address of log data */
2478         u32 ev, time, data; /* event log data */
2479         unsigned long reg_flags;
2480
2481         if (num_events == 0)
2482                 return pos;
2483
2484         if (priv->ucode_type == UCODE_INIT) {
2485                 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
2486                 if (!base)
2487                         base = priv->_agn.init_evtlog_ptr;
2488         } else {
2489                 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
2490                 if (!base)
2491                         base = priv->_agn.inst_evtlog_ptr;
2492         }
2493
2494         if (mode == 0)
2495                 event_size = 2 * sizeof(u32);
2496         else
2497                 event_size = 3 * sizeof(u32);
2498
2499         ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
2500
2501         /* Make sure device is powered up for SRAM reads */
2502         spin_lock_irqsave(&priv->reg_lock, reg_flags);
2503         iwl_grab_nic_access(priv);
2504
2505         /* Set starting address; reads will auto-increment */
2506         _iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, ptr);
2507         rmb();
2508
2509         /* "time" is actually "data" for mode 0 (no timestamp).
2510         * place event id # at far right for easier visual parsing. */
2511         for (i = 0; i < num_events; i++) {
2512                 ev = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
2513                 time = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
2514                 if (mode == 0) {
2515                         /* data, ev */
2516                         if (bufsz) {
2517                                 pos += scnprintf(*buf + pos, bufsz - pos,
2518                                                 "EVT_LOG:0x%08x:%04u\n",
2519                                                 time, ev);
2520                         } else {
2521                                 trace_iwlwifi_dev_ucode_event(priv, 0,
2522                                         time, ev);
2523                                 IWL_ERR(priv, "EVT_LOG:0x%08x:%04u\n",
2524                                         time, ev);
2525                         }
2526                 } else {
2527                         data = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
2528                         if (bufsz) {
2529                                 pos += scnprintf(*buf + pos, bufsz - pos,
2530                                                 "EVT_LOGT:%010u:0x%08x:%04u\n",
2531                                                  time, data, ev);
2532                         } else {
2533                                 IWL_ERR(priv, "EVT_LOGT:%010u:0x%08x:%04u\n",
2534                                         time, data, ev);
2535                                 trace_iwlwifi_dev_ucode_event(priv, time,
2536                                         data, ev);
2537                         }
2538                 }
2539         }
2540
2541         /* Allow device to power down */
2542         iwl_release_nic_access(priv);
2543         spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
2544         return pos;
2545 }
2546
2547 /**
2548  * iwl_print_last_event_logs - Dump the newest # of event log to syslog
2549  */
2550 static int iwl_print_last_event_logs(struct iwl_priv *priv, u32 capacity,
2551                                     u32 num_wraps, u32 next_entry,
2552                                     u32 size, u32 mode,
2553                                     int pos, char **buf, size_t bufsz)
2554 {
2555         /*
2556          * display the newest DEFAULT_LOG_ENTRIES entries
2557          * i.e the entries just before the next ont that uCode would fill.
2558          */
2559         if (num_wraps) {
2560                 if (next_entry < size) {
2561                         pos = iwl_print_event_log(priv,
2562                                                 capacity - (size - next_entry),
2563                                                 size - next_entry, mode,
2564                                                 pos, buf, bufsz);
2565                         pos = iwl_print_event_log(priv, 0,
2566                                                   next_entry, mode,
2567                                                   pos, buf, bufsz);
2568                 } else
2569                         pos = iwl_print_event_log(priv, next_entry - size,
2570                                                   size, mode, pos, buf, bufsz);
2571         } else {
2572                 if (next_entry < size) {
2573                         pos = iwl_print_event_log(priv, 0, next_entry,
2574                                                   mode, pos, buf, bufsz);
2575                 } else {
2576                         pos = iwl_print_event_log(priv, next_entry - size,
2577                                                   size, mode, pos, buf, bufsz);
2578                 }
2579         }
2580         return pos;
2581 }
2582
2583 #define DEFAULT_DUMP_EVENT_LOG_ENTRIES (20)
2584
2585 int iwl_dump_nic_event_log(struct iwl_priv *priv, bool full_log,
2586                             char **buf, bool display)
2587 {
2588         u32 base;       /* SRAM byte address of event log header */
2589         u32 capacity;   /* event log capacity in # entries */
2590         u32 mode;       /* 0 - no timestamp, 1 - timestamp recorded */
2591         u32 num_wraps;  /* # times uCode wrapped to top of log */
2592         u32 next_entry; /* index of next entry to be written by uCode */
2593         u32 size;       /* # entries that we'll print */
2594         u32 logsize;
2595         int pos = 0;
2596         size_t bufsz = 0;
2597
2598         if (priv->ucode_type == UCODE_INIT) {
2599                 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
2600                 logsize = priv->_agn.init_evtlog_size;
2601                 if (!base)
2602                         base = priv->_agn.init_evtlog_ptr;
2603         } else {
2604                 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
2605                 logsize = priv->_agn.inst_evtlog_size;
2606                 if (!base)
2607                         base = priv->_agn.inst_evtlog_ptr;
2608         }
2609
2610         if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
2611                 IWL_ERR(priv,
2612                         "Invalid event log pointer 0x%08X for %s uCode\n",
2613                         base, (priv->ucode_type == UCODE_INIT) ? "Init" : "RT");
2614                 return -EINVAL;
2615         }
2616
2617         /* event log header */
2618         capacity = iwl_read_targ_mem(priv, base);
2619         mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
2620         num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
2621         next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
2622
2623         if (capacity > logsize) {
2624                 IWL_ERR(priv, "Log capacity %d is bogus, limit to %d entries\n",
2625                         capacity, logsize);
2626                 capacity = logsize;
2627         }
2628
2629         if (next_entry > logsize) {
2630                 IWL_ERR(priv, "Log write index %d is bogus, limit to %d\n",
2631                         next_entry, logsize);
2632                 next_entry = logsize;
2633         }
2634
2635         size = num_wraps ? capacity : next_entry;
2636
2637         /* bail out if nothing in log */
2638         if (size == 0) {
2639                 IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
2640                 return pos;
2641         }
2642
2643         /* enable/disable bt channel announcement */
2644         priv->bt_ch_announce = iwlagn_bt_ch_announce;
2645
2646 #ifdef CONFIG_IWLWIFI_DEBUG
2647         if (!(iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) && !full_log)
2648                 size = (size > DEFAULT_DUMP_EVENT_LOG_ENTRIES)
2649                         ? DEFAULT_DUMP_EVENT_LOG_ENTRIES : size;
2650 #else
2651         size = (size > DEFAULT_DUMP_EVENT_LOG_ENTRIES)
2652                 ? DEFAULT_DUMP_EVENT_LOG_ENTRIES : size;
2653 #endif
2654         IWL_ERR(priv, "Start IWL Event Log Dump: display last %u entries\n",
2655                 size);
2656
2657 #ifdef CONFIG_IWLWIFI_DEBUG
2658         if (display) {
2659                 if (full_log)
2660                         bufsz = capacity * 48;
2661                 else
2662                         bufsz = size * 48;
2663                 *buf = kmalloc(bufsz, GFP_KERNEL);
2664                 if (!*buf)
2665                         return -ENOMEM;
2666         }
2667         if ((iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) || full_log) {
2668                 /*
2669                  * if uCode has wrapped back to top of log,
2670                  * start at the oldest entry,
2671                  * i.e the next one that uCode would fill.
2672                  */
2673                 if (num_wraps)
2674                         pos = iwl_print_event_log(priv, next_entry,
2675                                                 capacity - next_entry, mode,
2676                                                 pos, buf, bufsz);
2677                 /* (then/else) start at top of log */
2678                 pos = iwl_print_event_log(priv, 0,
2679                                           next_entry, mode, pos, buf, bufsz);
2680         } else
2681                 pos = iwl_print_last_event_logs(priv, capacity, num_wraps,
2682                                                 next_entry, size, mode,
2683                                                 pos, buf, bufsz);
2684 #else
2685         pos = iwl_print_last_event_logs(priv, capacity, num_wraps,
2686                                         next_entry, size, mode,
2687                                         pos, buf, bufsz);
2688 #endif
2689         return pos;
2690 }
2691
2692 static void iwl_rf_kill_ct_config(struct iwl_priv *priv)
2693 {
2694         struct iwl_ct_kill_config cmd;
2695         struct iwl_ct_kill_throttling_config adv_cmd;
2696         unsigned long flags;
2697         int ret = 0;
2698
2699         spin_lock_irqsave(&priv->lock, flags);
2700         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
2701                     CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
2702         spin_unlock_irqrestore(&priv->lock, flags);
2703         priv->thermal_throttle.ct_kill_toggle = false;
2704
2705         if (priv->cfg->support_ct_kill_exit) {
2706                 adv_cmd.critical_temperature_enter =
2707                         cpu_to_le32(priv->hw_params.ct_kill_threshold);
2708                 adv_cmd.critical_temperature_exit =
2709                         cpu_to_le32(priv->hw_params.ct_kill_exit_threshold);
2710
2711                 ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
2712                                        sizeof(adv_cmd), &adv_cmd);
2713                 if (ret)
2714                         IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
2715                 else
2716                         IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD "
2717                                         "succeeded, "
2718                                         "critical temperature enter is %d,"
2719                                         "exit is %d\n",
2720                                        priv->hw_params.ct_kill_threshold,
2721                                        priv->hw_params.ct_kill_exit_threshold);
2722         } else {
2723                 cmd.critical_temperature_R =
2724                         cpu_to_le32(priv->hw_params.ct_kill_threshold);
2725
2726                 ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
2727                                        sizeof(cmd), &cmd);
2728                 if (ret)
2729                         IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
2730                 else
2731                         IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD "
2732                                         "succeeded, "
2733                                         "critical temperature is %d\n",
2734                                         priv->hw_params.ct_kill_threshold);
2735         }
2736 }
2737
2738 /**
2739  * iwl_alive_start - called after REPLY_ALIVE notification received
2740  *                   from protocol/runtime uCode (initialization uCode's
2741  *                   Alive gets handled by iwl_init_alive_start()).
2742  */
2743 static void iwl_alive_start(struct iwl_priv *priv)
2744 {
2745         int ret = 0;
2746         struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
2747
2748         IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
2749
2750         if (priv->card_alive.is_valid != UCODE_VALID_OK) {
2751                 /* We had an error bringing up the hardware, so take it
2752                  * all the way back down so we can try again */
2753                 IWL_DEBUG_INFO(priv, "Alive failed.\n");
2754                 goto restart;
2755         }
2756
2757         /* Initialize uCode has loaded Runtime uCode ... verify inst image.
2758          * This is a paranoid check, because we would not have gotten the
2759          * "runtime" alive if code weren't properly loaded.  */
2760         if (iwl_verify_ucode(priv)) {
2761                 /* Runtime instruction load was bad;
2762                  * take it all the way back down so we can try again */
2763                 IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
2764                 goto restart;
2765         }
2766
2767         ret = priv->cfg->ops->lib->alive_notify(priv);
2768         if (ret) {
2769                 IWL_WARN(priv,
2770                         "Could not complete ALIVE transition [ntf]: %d\n", ret);
2771                 goto restart;
2772         }
2773
2774         /* After the ALIVE response, we can send host commands to the uCode */
2775         set_bit(STATUS_ALIVE, &priv->status);
2776
2777         if (priv->cfg->ops->lib->recover_from_tx_stall) {
2778                 /* Enable timer to monitor the driver queues */
2779                 mod_timer(&priv->monitor_recover,
2780                         jiffies +
2781                         msecs_to_jiffies(priv->cfg->monitor_recover_period));
2782         }
2783
2784         if (iwl_is_rfkill(priv))
2785                 return;
2786
2787         ieee80211_wake_queues(priv->hw);
2788
2789         priv->active_rate = IWL_RATES_MASK;
2790
2791         /* Configure Tx antenna selection based on H/W config */
2792         if (priv->cfg->ops->hcmd->set_tx_ant)
2793                 priv->cfg->ops->hcmd->set_tx_ant(priv, priv->cfg->valid_tx_ant);
2794
2795         if (iwl_is_associated_ctx(ctx)) {
2796                 struct iwl_rxon_cmd *active_rxon =
2797                                 (struct iwl_rxon_cmd *)&ctx->active;
2798                 /* apply any changes in staging */
2799                 ctx->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
2800                 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2801         } else {
2802                 /* Initialize our rx_config data */
2803                 iwl_connection_init_rx_config(priv, NULL);
2804
2805                 if (priv->cfg->ops->hcmd->set_rxon_chain)
2806                         priv->cfg->ops->hcmd->set_rxon_chain(priv, ctx);
2807         }
2808
2809         if (!priv->cfg->advanced_bt_coexist) {
2810                 /* Configure Bluetooth device coexistence support */
2811                 priv->cfg->ops->hcmd->send_bt_config(priv);
2812         }
2813
2814         iwl_reset_run_time_calib(priv);
2815
2816         /* Configure the adapter for unassociated operation */
2817         iwlcore_commit_rxon(priv, ctx);
2818
2819         /* At this point, the NIC is initialized and operational */
2820         iwl_rf_kill_ct_config(priv);
2821
2822         iwl_leds_init(priv);
2823
2824         IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
2825         set_bit(STATUS_READY, &priv->status);
2826         wake_up_interruptible(&priv->wait_command_queue);
2827
2828         iwl_power_update_mode(priv, true);
2829         IWL_DEBUG_INFO(priv, "Updated power mode\n");
2830
2831
2832         return;
2833
2834  restart:
2835         queue_work(priv->workqueue, &priv->restart);
2836 }
2837
2838 static void iwl_cancel_deferred_work(struct iwl_priv *priv);
2839
2840 static void __iwl_down(struct iwl_priv *priv)
2841 {
2842         unsigned long flags;
2843         int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
2844
2845         IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
2846
2847         if (!exit_pending)
2848                 set_bit(STATUS_EXIT_PENDING, &priv->status);
2849
2850         /* Stop TX queues watchdog. We need to have STATUS_EXIT_PENDING bit set
2851          * to prevent rearm timer */
2852         if (priv->cfg->ops->lib->recover_from_tx_stall)
2853                 del_timer_sync(&priv->monitor_recover);
2854
2855         iwl_clear_ucode_stations(priv, NULL);
2856         iwl_dealloc_bcast_stations(priv);
2857         iwl_clear_driver_stations(priv);
2858
2859         /* reset BT coex data */
2860         priv->bt_status = 0;
2861         priv->bt_traffic_load = priv->cfg->bt_init_traffic_load;
2862         priv->bt_sco_active = false;
2863         priv->bt_full_concurrent = false;
2864         priv->bt_ci_compliance = 0;
2865
2866         /* Unblock any waiting calls */
2867         wake_up_interruptible_all(&priv->wait_command_queue);
2868
2869         /* Wipe out the EXIT_PENDING status bit if we are not actually
2870          * exiting the module */
2871         if (!exit_pending)
2872                 clear_bit(STATUS_EXIT_PENDING, &priv->status);
2873
2874         /* stop and reset the on-board processor */
2875         iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
2876
2877         /* tell the device to stop sending interrupts */
2878         spin_lock_irqsave(&priv->lock, flags);
2879         iwl_disable_interrupts(priv);
2880         spin_unlock_irqrestore(&priv->lock, flags);
2881         iwl_synchronize_irq(priv);
2882
2883         if (priv->mac80211_registered)
2884                 ieee80211_stop_queues(priv->hw);
2885
2886         /* If we have not previously called iwl_init() then
2887          * clear all bits but the RF Kill bit and return */
2888         if (!iwl_is_init(priv)) {
2889                 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2890                                         STATUS_RF_KILL_HW |
2891                                test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2892                                         STATUS_GEO_CONFIGURED |
2893                                test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2894                                         STATUS_EXIT_PENDING;
2895                 goto exit;
2896         }
2897
2898         /* ...otherwise clear out all the status bits but the RF Kill
2899          * bit and continue taking the NIC down. */
2900         priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2901                                 STATUS_RF_KILL_HW |
2902                         test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2903                                 STATUS_GEO_CONFIGURED |
2904                         test_bit(STATUS_FW_ERROR, &priv->status) <<
2905                                 STATUS_FW_ERROR |
2906                        test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2907                                 STATUS_EXIT_PENDING;
2908
2909         /* device going down, Stop using ICT table */
2910         iwl_disable_ict(priv);
2911
2912         iwlagn_txq_ctx_stop(priv);
2913         iwlagn_rxq_stop(priv);
2914
2915         /* Power-down device's busmaster DMA clocks */
2916         iwl_write_prph(priv, APMG_CLK_DIS_REG, APMG_CLK_VAL_DMA_CLK_RQT);
2917         udelay(5);
2918
2919         /* Make sure (redundant) we've released our request to stay awake */
2920         iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
2921
2922         /* Stop the device, and put it in low power state */
2923         priv->cfg->ops->lib->apm_ops.stop(priv);
2924
2925  exit:
2926         memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
2927
2928         if (priv->ibss_beacon)
2929                 dev_kfree_skb(priv->ibss_beacon);
2930         priv->ibss_beacon = NULL;
2931
2932         /* clear out any free frames */
2933         iwl_clear_free_frames(priv);
2934 }
2935
2936 static void iwl_down(struct iwl_priv *priv)
2937 {
2938         mutex_lock(&priv->mutex);
2939         __iwl_down(priv);
2940         mutex_unlock(&priv->mutex);
2941
2942         iwl_cancel_deferred_work(priv);
2943 }
2944
2945 #define HW_READY_TIMEOUT (50)
2946
2947 static int iwl_set_hw_ready(struct iwl_priv *priv)
2948 {
2949         int ret = 0;
2950
2951         iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
2952                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY);
2953
2954         /* See if we got it */
2955         ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
2956                                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
2957                                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
2958                                 HW_READY_TIMEOUT);
2959         if (ret != -ETIMEDOUT)
2960                 priv->hw_ready = true;
2961         else
2962                 priv->hw_ready = false;
2963
2964         IWL_DEBUG_INFO(priv, "hardware %s\n",
2965                       (priv->hw_ready == 1) ? "ready" : "not ready");
2966         return ret;
2967 }
2968
2969 static int iwl_prepare_card_hw(struct iwl_priv *priv)
2970 {
2971         int ret = 0;
2972
2973         IWL_DEBUG_INFO(priv, "iwl_prepare_card_hw enter\n");
2974
2975         ret = iwl_set_hw_ready(priv);
2976         if (priv->hw_ready)
2977                 return ret;
2978
2979         /* If HW is not ready, prepare the conditions to check again */
2980         iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
2981                         CSR_HW_IF_CONFIG_REG_PREPARE);
2982
2983         ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
2984                         ~CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE,
2985                         CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE, 150000);
2986
2987         /* HW should be ready by now, check again. */
2988         if (ret != -ETIMEDOUT)
2989                 iwl_set_hw_ready(priv);
2990
2991         return ret;
2992 }
2993
2994 #define MAX_HW_RESTARTS 5
2995
2996 static int __iwl_up(struct iwl_priv *priv)
2997 {
2998         struct iwl_rxon_context *ctx;
2999         int i;
3000         int ret;
3001
3002         if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
3003                 IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
3004                 return -EIO;
3005         }
3006
3007         if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
3008                 IWL_ERR(priv, "ucode not available for device bringup\n");
3009                 return -EIO;
3010         }
3011
3012         for_each_context(priv, ctx) {
3013                 ret = iwl_alloc_bcast_station(priv, ctx, true);
3014                 if (ret) {
3015                         iwl_dealloc_bcast_stations(priv);
3016                         return ret;
3017                 }
3018         }
3019
3020         iwl_prepare_card_hw(priv);
3021
3022         if (!priv->hw_ready) {
3023                 IWL_WARN(priv, "Exit HW not ready\n");
3024                 return -EIO;
3025         }
3026
3027         /* If platform's RF_KILL switch is NOT set to KILL */
3028         if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
3029                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3030         else
3031                 set_bit(STATUS_RF_KILL_HW, &priv->status);
3032
3033         if (iwl_is_rfkill(priv)) {
3034                 wiphy_rfkill_set_hw_state(priv->hw->wiphy, true);
3035
3036                 iwl_enable_interrupts(priv);
3037                 IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
3038                 return 0;
3039         }
3040
3041         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
3042
3043         /* must be initialised before iwl_hw_nic_init */
3044         if (priv->valid_contexts != BIT(IWL_RXON_CTX_BSS))
3045                 priv->cmd_queue = IWL_IPAN_CMD_QUEUE_NUM;
3046         else
3047                 priv->cmd_queue = IWL_DEFAULT_CMD_QUEUE_NUM;
3048
3049         ret = iwlagn_hw_nic_init(priv);
3050         if (ret) {
3051                 IWL_ERR(priv, "Unable to init nic\n");
3052                 return ret;
3053         }
3054
3055         /* make sure rfkill handshake bits are cleared */
3056         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
3057         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
3058                     CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
3059
3060         /* clear (again), then enable host interrupts */
3061         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
3062         iwl_enable_interrupts(priv);
3063
3064         /* really make sure rfkill handshake bits are cleared */
3065         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
3066         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
3067
3068         /* Copy original ucode data image from disk into backup cache.
3069          * This will be used to initialize the on-board processor's
3070          * data SRAM for a clean start when the runtime program first loads. */
3071         memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
3072                priv->ucode_data.len);
3073
3074         for (i = 0; i < MAX_HW_RESTARTS; i++) {
3075
3076                 /* load bootstrap state machine,
3077                  * load bootstrap program into processor's memory,
3078                  * prepare to load the "initialize" uCode */
3079                 ret = priv->cfg->ops->lib->load_ucode(priv);
3080
3081                 if (ret) {
3082                         IWL_ERR(priv, "Unable to set up bootstrap uCode: %d\n",
3083                                 ret);
3084                         continue;
3085                 }
3086
3087                 /* start card; "initialize" will load runtime ucode */
3088                 iwl_nic_start(priv);
3089
3090                 IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
3091
3092                 return 0;
3093         }
3094
3095         set_bit(STATUS_EXIT_PENDING, &priv->status);
3096         __iwl_down(priv);
3097         clear_bit(STATUS_EXIT_PENDING, &priv->status);
3098
3099         /* tried to restart and config the device for as long as our
3100          * patience could withstand */
3101         IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
3102         return -EIO;
3103 }
3104
3105
3106 /*****************************************************************************
3107  *
3108  * Workqueue callbacks
3109  *
3110  *****************************************************************************/
3111
3112 static void iwl_bg_init_alive_start(struct work_struct *data)
3113 {
3114         struct iwl_priv *priv =
3115             container_of(data, struct iwl_priv, init_alive_start.work);
3116
3117         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3118                 return;
3119
3120         mutex_lock(&priv->mutex);
3121         priv->cfg->ops->lib->init_alive_start(priv);
3122         mutex_unlock(&priv->mutex);
3123 }
3124
3125 static void iwl_bg_alive_start(struct work_struct *data)
3126 {
3127         struct iwl_priv *priv =
3128             container_of(data, struct iwl_priv, alive_start.work);
3129
3130         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3131                 return;
3132
3133         /* enable dram interrupt */
3134         iwl_reset_ict(priv);
3135
3136         mutex_lock(&priv->mutex);
3137         iwl_alive_start(priv);
3138         mutex_unlock(&priv->mutex);
3139 }
3140
3141 static void iwl_bg_run_time_calib_work(struct work_struct *work)
3142 {
3143         struct iwl_priv *priv = container_of(work, struct iwl_priv,
3144                         run_time_calib_work);
3145
3146         mutex_lock(&priv->mutex);
3147
3148         if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
3149             test_bit(STATUS_SCANNING, &priv->status)) {
3150                 mutex_unlock(&priv->mutex);
3151                 return;
3152         }
3153
3154         if (priv->start_calib) {
3155                 if (priv->cfg->bt_statistics) {
3156                         iwl_chain_noise_calibration(priv,
3157                                         (void *)&priv->_agn.statistics_bt);
3158                         iwl_sensitivity_calibration(priv,
3159                                         (void *)&priv->_agn.statistics_bt);
3160                 } else {
3161                         iwl_chain_noise_calibration(priv,
3162                                         (void *)&priv->_agn.statistics);
3163                         iwl_sensitivity_calibration(priv,
3164                                         (void *)&priv->_agn.statistics);
3165                 }
3166         }
3167
3168         mutex_unlock(&priv->mutex);
3169 }
3170
3171 static void iwl_bg_restart(struct work_struct *data)
3172 {
3173         struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
3174
3175         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3176                 return;
3177
3178         if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) {
3179                 struct iwl_rxon_context *ctx;
3180                 bool bt_sco, bt_full_concurrent;
3181                 u8 bt_ci_compliance;
3182                 u8 bt_load;
3183                 u8 bt_status;
3184
3185                 mutex_lock(&priv->mutex);
3186                 for_each_context(priv, ctx)
3187                         ctx->vif = NULL;
3188                 priv->is_open = 0;
3189
3190                 /*
3191                  * __iwl_down() will clear the BT status variables,
3192                  * which is correct, but when we restart we really
3193                  * want to keep them so restore them afterwards.
3194                  *
3195                  * The restart process will later pick them up and
3196                  * re-configure the hw when we reconfigure the BT
3197                  * command.
3198                  */
3199                 bt_sco = priv->bt_sco_active;
3200                 bt_full_concurrent = priv->bt_full_concurrent;
3201                 bt_ci_compliance = priv->bt_ci_compliance;
3202                 bt_load = priv->bt_traffic_load;
3203                 bt_status = priv->bt_status;
3204
3205                 __iwl_down(priv);
3206
3207                 priv->bt_sco_active = bt_sco;
3208                 priv->bt_full_concurrent = bt_full_concurrent;
3209                 priv->bt_ci_compliance = bt_ci_compliance;
3210                 priv->bt_traffic_load = bt_load;
3211                 priv->bt_status = bt_status;
3212
3213                 mutex_unlock(&priv->mutex);
3214                 iwl_cancel_deferred_work(priv);
3215                 ieee80211_restart_hw(priv->hw);
3216         } else {
3217                 iwl_down(priv);
3218
3219                 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3220                         return;
3221
3222                 mutex_lock(&priv->mutex);
3223                 __iwl_up(priv);
3224                 mutex_unlock(&priv->mutex);
3225         }
3226 }
3227
3228 static void iwl_bg_rx_replenish(struct work_struct *data)
3229 {
3230         struct iwl_priv *priv =
3231             container_of(data, struct iwl_priv, rx_replenish);
3232
3233         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3234                 return;
3235
3236         mutex_lock(&priv->mutex);
3237         iwlagn_rx_replenish(priv);
3238         mutex_unlock(&priv->mutex);
3239 }
3240
3241 #define IWL_DELAY_NEXT_SCAN (HZ*2)
3242
3243 void iwl_post_associate(struct iwl_priv *priv, struct ieee80211_vif *vif)
3244 {
3245         struct iwl_rxon_context *ctx;
3246         struct ieee80211_conf *conf = NULL;
3247         int ret = 0;
3248
3249         if (!vif || !priv->is_open)
3250                 return;
3251
3252         ctx = iwl_rxon_ctx_from_vif(vif);
3253
3254         if (vif->type == NL80211_IFTYPE_AP) {
3255                 IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
3256                 return;
3257         }
3258
3259         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3260                 return;
3261
3262         iwl_scan_cancel_timeout(priv, 200);
3263
3264         conf = ieee80211_get_hw_conf(priv->hw);
3265
3266         ctx->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
3267         iwlcore_commit_rxon(priv, ctx);
3268
3269         ret = iwl_send_rxon_timing(priv, vif);
3270         if (ret)
3271                 IWL_WARN(priv, "RXON timing - "
3272                             "Attempting to continue.\n");
3273
3274         ctx->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
3275
3276         iwl_set_rxon_ht(priv, &priv->current_ht_config);
3277
3278         if (priv->cfg->ops->hcmd->set_rxon_chain)
3279                 priv->cfg->ops->hcmd->set_rxon_chain(priv, ctx);
3280
3281         ctx->staging.assoc_id = cpu_to_le16(vif->bss_conf.aid);
3282
3283         IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n",
3284                         vif->bss_conf.aid, vif->bss_conf.beacon_int);
3285
3286         if (vif->bss_conf.use_short_preamble)
3287                 ctx->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
3288         else
3289                 ctx->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
3290
3291         if (ctx->staging.flags & RXON_FLG_BAND_24G_MSK) {
3292                 if (vif->bss_conf.use_short_slot)
3293                         ctx->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
3294                 else
3295                         ctx->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
3296         }
3297
3298         iwlcore_commit_rxon(priv, ctx);
3299
3300         IWL_DEBUG_ASSOC(priv, "Associated as %d to: %pM\n",
3301                         vif->bss_conf.aid, ctx->active.bssid_addr);
3302
3303         switch (vif->type) {
3304         case NL80211_IFTYPE_STATION:
3305                 break;
3306         case NL80211_IFTYPE_ADHOC:
3307                 iwl_send_beacon_cmd(priv);
3308                 break;
3309         default:
3310                 IWL_ERR(priv, "%s Should not be called in %d mode\n",
3311                           __func__, vif->type);
3312                 break;
3313         }
3314
3315         /* the chain noise calibration will enabled PM upon completion
3316          * If chain noise has already been run, then we need to enable
3317          * power management here */
3318         if (priv->chain_noise_data.state == IWL_CHAIN_NOISE_DONE)
3319                 iwl_power_update_mode(priv, false);
3320
3321         /* Enable Rx differential gain and sensitivity calibrations */
3322         iwl_chain_noise_reset(priv);
3323         priv->start_calib = 1;
3324
3325 }
3326
3327 /*****************************************************************************
3328  *
3329  * mac80211 entry point functions
3330  *
3331  *****************************************************************************/
3332
3333 #define UCODE_READY_TIMEOUT     (4 * HZ)
3334
3335 /*
3336  * Not a mac80211 entry point function, but it fits in with all the
3337  * other mac80211 functions grouped here.
3338  */
3339 static int iwl_mac_setup_register(struct iwl_priv *priv,
3340                                   struct iwlagn_ucode_capabilities *capa)
3341 {
3342         int ret;
3343         struct ieee80211_hw *hw = priv->hw;
3344         hw->rate_control_algorithm = "iwl-agn-rs";
3345
3346         /* Tell mac80211 our characteristics */
3347         hw->flags = IEEE80211_HW_SIGNAL_DBM |
3348                     IEEE80211_HW_AMPDU_AGGREGATION |
3349                     IEEE80211_HW_SPECTRUM_MGMT;
3350
3351         if (!priv->cfg->broken_powersave)
3352                 hw->flags |= IEEE80211_HW_SUPPORTS_PS |
3353                              IEEE80211_HW_SUPPORTS_DYNAMIC_PS;
3354
3355         if (priv->cfg->sku & IWL_SKU_N)
3356                 hw->flags |= IEEE80211_HW_SUPPORTS_DYNAMIC_SMPS |
3357                              IEEE80211_HW_SUPPORTS_STATIC_SMPS;
3358
3359         hw->sta_data_size = sizeof(struct iwl_station_priv);
3360         hw->vif_data_size = sizeof(struct iwl_vif_priv);
3361
3362         hw->wiphy->interface_modes =
3363                 BIT(NL80211_IFTYPE_STATION) |
3364                 BIT(NL80211_IFTYPE_ADHOC);
3365
3366         hw->wiphy->flags |= WIPHY_FLAG_CUSTOM_REGULATORY |
3367                             WIPHY_FLAG_DISABLE_BEACON_HINTS;
3368
3369         /*
3370          * For now, disable PS by default because it affects
3371          * RX performance significantly.
3372          */
3373         hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT;
3374
3375         hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX;
3376         /* we create the 802.11 header and a zero-length SSID element */
3377         hw->wiphy->max_scan_ie_len = capa->max_probe_length - 24 - 2;
3378
3379         /* Default value; 4 EDCA QOS priorities */
3380         hw->queues = 4;
3381
3382         hw->max_listen_interval = IWL_CONN_MAX_LISTEN_INTERVAL;
3383
3384         if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
3385                 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
3386                         &priv->bands[IEEE80211_BAND_2GHZ];
3387         if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
3388                 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
3389                         &priv->bands[IEEE80211_BAND_5GHZ];
3390
3391         ret = ieee80211_register_hw(priv->hw);
3392         if (ret) {
3393                 IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
3394                 return ret;
3395         }
3396         priv->mac80211_registered = 1;
3397
3398         return 0;
3399 }
3400
3401
3402 static int iwl_mac_start(struct ieee80211_hw *hw)
3403 {
3404         struct iwl_priv *priv = hw->priv;
3405         int ret;
3406
3407         IWL_DEBUG_MAC80211(priv, "enter\n");
3408
3409         /* we should be verifying the device is ready to be opened */
3410         mutex_lock(&priv->mutex);
3411         ret = __iwl_up(priv);
3412         mutex_unlock(&priv->mutex);
3413
3414         if (ret)
3415                 return ret;
3416
3417         if (iwl_is_rfkill(priv))
3418                 goto out;
3419
3420         IWL_DEBUG_INFO(priv, "Start UP work done.\n");
3421
3422         /* Wait for START_ALIVE from Run Time ucode. Otherwise callbacks from
3423          * mac80211 will not be run successfully. */
3424         ret = wait_event_interruptible_timeout(priv->wait_command_queue,
3425                         test_bit(STATUS_READY, &priv->status),
3426                         UCODE_READY_TIMEOUT);
3427         if (!ret) {
3428                 if (!test_bit(STATUS_READY, &priv->status)) {
3429                         IWL_ERR(priv, "START_ALIVE timeout after %dms.\n",
3430                                 jiffies_to_msecs(UCODE_READY_TIMEOUT));
3431                         return -ETIMEDOUT;
3432                 }
3433         }
3434
3435         iwl_led_start(priv);
3436
3437 out:
3438         priv->is_open = 1;
3439         IWL_DEBUG_MAC80211(priv, "leave\n");
3440         return 0;
3441 }
3442
3443 static void iwl_mac_stop(struct ieee80211_hw *hw)
3444 {
3445         struct iwl_priv *priv = hw->priv;
3446
3447         IWL_DEBUG_MAC80211(priv, "enter\n");
3448
3449         if (!priv->is_open)
3450                 return;
3451
3452         priv->is_open = 0;
3453
3454         if (iwl_is_ready_rf(priv) || test_bit(STATUS_SCAN_HW, &priv->status)) {
3455                 /* stop mac, cancel any scan request and clear
3456                  * RXON_FILTER_ASSOC_MSK BIT
3457                  */
3458                 mutex_lock(&priv->mutex);
3459                 iwl_scan_cancel_timeout(priv, 100);
3460                 mutex_unlock(&priv->mutex);
3461         }
3462
3463         iwl_down(priv);
3464
3465         flush_workqueue(priv->workqueue);
3466
3467         /* enable interrupts again in order to receive rfkill changes */
3468         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
3469         iwl_enable_interrupts(priv);
3470
3471         IWL_DEBUG_MAC80211(priv, "leave\n");
3472 }
3473
3474 static int iwl_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
3475 {
3476         struct iwl_priv *priv = hw->priv;
3477
3478         IWL_DEBUG_MACDUMP(priv, "enter\n");
3479
3480         IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
3481                      ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
3482
3483         if (iwlagn_tx_skb(priv, skb))
3484                 dev_kfree_skb_any(skb);
3485
3486         IWL_DEBUG_MACDUMP(priv, "leave\n");
3487         return NETDEV_TX_OK;
3488 }
3489
3490 void iwl_config_ap(struct iwl_priv *priv, struct ieee80211_vif *vif)
3491 {
3492         struct iwl_rxon_context *ctx = iwl_rxon_ctx_from_vif(vif);
3493         int ret = 0;
3494
3495         lockdep_assert_held(&priv->mutex);
3496
3497         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3498                 return;
3499
3500         /* The following should be done only at AP bring up */
3501         if (!iwl_is_associated_ctx(ctx)) {
3502
3503                 /* RXON - unassoc (to set timing command) */
3504                 ctx->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
3505                 iwlcore_commit_rxon(priv, ctx);
3506
3507                 /* RXON Timing */
3508                 ret = iwl_send_rxon_timing(priv, vif);
3509                 if (ret)
3510                         IWL_WARN(priv, "RXON timing failed - "
3511                                         "Attempting to continue.\n");
3512
3513                 /* AP has all antennas */
3514                 priv->chain_noise_data.active_chains =
3515                         priv->hw_params.valid_rx_ant;
3516                 iwl_set_rxon_ht(priv, &priv->current_ht_config);
3517                 if (priv->cfg->ops->hcmd->set_rxon_chain)
3518                         priv->cfg->ops->hcmd->set_rxon_chain(priv, ctx);
3519
3520                 ctx->staging.assoc_id = 0;
3521
3522                 if (vif->bss_conf.use_short_preamble)
3523                         ctx->staging.flags |=
3524                                 RXON_FLG_SHORT_PREAMBLE_MSK;
3525                 else
3526                         ctx->staging.flags &=
3527                                 ~RXON_FLG_SHORT_PREAMBLE_MSK;
3528
3529                 if (ctx->staging.flags & RXON_FLG_BAND_24G_MSK) {
3530                         if (vif->bss_conf.use_short_slot)
3531                                 ctx->staging.flags |=
3532                                         RXON_FLG_SHORT_SLOT_MSK;
3533                         else
3534                                 ctx->staging.flags &=
3535                                         ~RXON_FLG_SHORT_SLOT_MSK;
3536                 }
3537                 /* restore RXON assoc */
3538                 ctx->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
3539                 iwlcore_commit_rxon(priv, ctx);
3540         }
3541         iwl_send_beacon_cmd(priv);
3542
3543         /* FIXME - we need to add code here to detect a totally new
3544          * configuration, reset the AP, unassoc, rxon timing, assoc,
3545          * clear sta table, add BCAST sta... */
3546 }
3547
3548 static void iwl_mac_update_tkip_key(struct ieee80211_hw *hw,
3549                                     struct ieee80211_vif *vif,
3550                                     struct ieee80211_key_conf *keyconf,
3551                                     struct ieee80211_sta *sta,
3552                                     u32 iv32, u16 *phase1key)
3553 {
3554
3555         struct iwl_priv *priv = hw->priv;
3556         struct iwl_vif_priv *vif_priv = (void *)vif->drv_priv;
3557
3558         IWL_DEBUG_MAC80211(priv, "enter\n");
3559
3560         iwl_update_tkip_key(priv, vif_priv->ctx, keyconf, sta,
3561                             iv32, phase1key);
3562
3563         IWL_DEBUG_MAC80211(priv, "leave\n");
3564 }
3565
3566 static int iwl_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
3567                            struct ieee80211_vif *vif,
3568                            struct ieee80211_sta *sta,
3569                            struct ieee80211_key_conf *key)
3570 {
3571         struct iwl_priv *priv = hw->priv;
3572         struct iwl_vif_priv *vif_priv = (void *)vif->drv_priv;
3573         struct iwl_rxon_context *ctx = vif_priv->ctx;
3574         int ret;
3575         u8 sta_id;
3576         bool is_default_wep_key = false;
3577
3578         IWL_DEBUG_MAC80211(priv, "enter\n");
3579
3580         if (priv->cfg->mod_params->sw_crypto) {
3581                 IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
3582                 return -EOPNOTSUPP;
3583         }
3584
3585         sta_id = iwl_sta_id_or_broadcast(priv, vif_priv->ctx, sta);
3586         if (sta_id == IWL_INVALID_STATION)
3587                 return -EINVAL;
3588
3589         mutex_lock(&priv->mutex);
3590         iwl_scan_cancel_timeout(priv, 100);
3591
3592         /*
3593          * If we are getting WEP group key and we didn't receive any key mapping
3594          * so far, we are in legacy wep mode (group key only), otherwise we are
3595          * in 1X mode.
3596          * In legacy wep mode, we use another host command to the uCode.
3597          */
3598         if ((key->cipher == WLAN_CIPHER_SUITE_WEP40 ||
3599              key->cipher == WLAN_CIPHER_SUITE_WEP104) &&
3600             !sta) {
3601                 if (cmd == SET_KEY)
3602                         is_default_wep_key = !ctx->key_mapping_keys;
3603                 else
3604                         is_default_wep_key =
3605                                         (key->hw_key_idx == HW_KEY_DEFAULT);
3606         }
3607
3608         switch (cmd) {
3609         case SET_KEY:
3610                 if (is_default_wep_key)
3611                         ret = iwl_set_default_wep_key(priv, vif_priv->ctx, key);
3612                 else
3613                         ret = iwl_set_dynamic_key(priv, vif_priv->ctx,
3614                                                   key, sta_id);
3615
3616                 IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
3617                 break;
3618         case DISABLE_KEY:
3619                 if (is_default_wep_key)
3620                         ret = iwl_remove_default_wep_key(priv, ctx, key);
3621                 else
3622                         ret = iwl_remove_dynamic_key(priv, ctx, key, sta_id);
3623
3624                 IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
3625                 break;
3626         default:
3627                 ret = -EINVAL;
3628         }
3629
3630         mutex_unlock(&priv->mutex);
3631         IWL_DEBUG_MAC80211(priv, "leave\n");
3632
3633         return ret;
3634 }
3635
3636 static int iwl_mac_ampdu_action(struct ieee80211_hw *hw,
3637                                 struct ieee80211_vif *vif,
3638                                 enum ieee80211_ampdu_mlme_action action,
3639                                 struct ieee80211_sta *sta, u16 tid, u16 *ssn)
3640 {
3641         struct iwl_priv *priv = hw->priv;
3642         int ret = -EINVAL;
3643
3644         IWL_DEBUG_HT(priv, "A-MPDU action on addr %pM tid %d\n",
3645                      sta->addr, tid);
3646
3647         if (!(priv->cfg->sku & IWL_SKU_N))
3648                 return -EACCES;
3649
3650         mutex_lock(&priv->mutex);
3651
3652         switch (action) {
3653         case IEEE80211_AMPDU_RX_START:
3654                 IWL_DEBUG_HT(priv, "start Rx\n");
3655                 ret = iwl_sta_rx_agg_start(priv, sta, tid, *ssn);
3656                 break;
3657         case IEEE80211_AMPDU_RX_STOP:
3658                 IWL_DEBUG_HT(priv, "stop Rx\n");
3659                 ret = iwl_sta_rx_agg_stop(priv, sta, tid);
3660                 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3661                         ret = 0;
3662                 break;
3663         case IEEE80211_AMPDU_TX_START:
3664                 IWL_DEBUG_HT(priv, "start Tx\n");
3665                 ret = iwlagn_tx_agg_start(priv, vif, sta, tid, ssn);
3666                 if (ret == 0) {
3667                         priv->_agn.agg_tids_count++;
3668                         IWL_DEBUG_HT(priv, "priv->_agn.agg_tids_count = %u\n",
3669                                      priv->_agn.agg_tids_count);
3670                 }
3671                 break;
3672         case IEEE80211_AMPDU_TX_STOP:
3673                 IWL_DEBUG_HT(priv, "stop Tx\n");
3674                 ret = iwlagn_tx_agg_stop(priv, vif, sta, tid);
3675                 if ((ret == 0) && (priv->_agn.agg_tids_count > 0)) {
3676                         priv->_agn.agg_tids_count--;
3677                         IWL_DEBUG_HT(priv, "priv->_agn.agg_tids_count = %u\n",
3678                                      priv->_agn.agg_tids_count);
3679                 }
3680                 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3681                         ret = 0;
3682                 if (priv->cfg->use_rts_for_aggregation) {
3683                         struct iwl_station_priv *sta_priv =
3684                                 (void *) sta->drv_priv;
3685                         /*
3686                          * switch off RTS/CTS if it was previously enabled
3687                          */
3688
3689                         sta_priv->lq_sta.lq.general_params.flags &=
3690                                 ~LINK_QUAL_FLAGS_SET_STA_TLC_RTS_MSK;
3691                         iwl_send_lq_cmd(priv, iwl_rxon_ctx_from_vif(vif),
3692                                         &sta_priv->lq_sta.lq, CMD_ASYNC, false);
3693                 }
3694                 break;
3695         case IEEE80211_AMPDU_TX_OPERATIONAL:
3696                 if (priv->cfg->use_rts_for_aggregation) {
3697                         struct iwl_station_priv *sta_priv =
3698                                 (void *) sta->drv_priv;
3699
3700                         /*
3701                          * switch to RTS/CTS if it is the prefer protection
3702                          * method for HT traffic
3703                          */
3704
3705                         sta_priv->lq_sta.lq.general_params.flags |=
3706                                 LINK_QUAL_FLAGS_SET_STA_TLC_RTS_MSK;
3707                         iwl_send_lq_cmd(priv, iwl_rxon_ctx_from_vif(vif),
3708                                         &sta_priv->lq_sta.lq, CMD_ASYNC, false);
3709                 }
3710                 ret = 0;
3711                 break;
3712         }
3713         mutex_unlock(&priv->mutex);
3714
3715         return ret;
3716 }
3717
3718 static void iwl_mac_sta_notify(struct ieee80211_hw *hw,
3719                                struct ieee80211_vif *vif,
3720                                enum sta_notify_cmd cmd,
3721                                struct ieee80211_sta *sta)
3722 {
3723         struct iwl_priv *priv = hw->priv;
3724         struct iwl_station_priv *sta_priv = (void *)sta->drv_priv;
3725         int sta_id;
3726
3727         switch (cmd) {
3728         case STA_NOTIFY_SLEEP:
3729                 WARN_ON(!sta_priv->client);
3730                 sta_priv->asleep = true;
3731                 if (atomic_read(&sta_priv->pending_frames) > 0)
3732                         ieee80211_sta_block_awake(hw, sta, true);
3733                 break;
3734         case STA_NOTIFY_AWAKE:
3735                 WARN_ON(!sta_priv->client);
3736                 if (!sta_priv->asleep)
3737                         break;
3738                 sta_priv->asleep = false;
3739                 sta_id = iwl_sta_id(sta);
3740                 if (sta_id != IWL_INVALID_STATION)
3741                         iwl_sta_modify_ps_wake(priv, sta_id);
3742                 break;
3743         default:
3744                 break;
3745         }
3746 }
3747
3748 static int iwlagn_mac_sta_add(struct ieee80211_hw *hw,
3749                               struct ieee80211_vif *vif,
3750                               struct ieee80211_sta *sta)
3751 {
3752         struct iwl_priv *priv = hw->priv;
3753         struct iwl_station_priv *sta_priv = (void *)sta->drv_priv;
3754         struct iwl_vif_priv *vif_priv = (void *)vif->drv_priv;
3755         bool is_ap = vif->type == NL80211_IFTYPE_STATION;
3756         int ret;
3757         u8 sta_id;
3758
3759         IWL_DEBUG_INFO(priv, "received request to add station %pM\n",
3760                         sta->addr);
3761         mutex_lock(&priv->mutex);
3762         IWL_DEBUG_INFO(priv, "proceeding to add station %pM\n",
3763                         sta->addr);
3764         sta_priv->common.sta_id = IWL_INVALID_STATION;
3765
3766         atomic_set(&sta_priv->pending_frames, 0);
3767         if (vif->type == NL80211_IFTYPE_AP)
3768                 sta_priv->client = true;
3769
3770         ret = iwl_add_station_common(priv, vif_priv->ctx, sta->addr,
3771                                      is_ap, sta, &sta_id);
3772         if (ret) {
3773                 IWL_ERR(priv, "Unable to add station %pM (%d)\n",
3774                         sta->addr, ret);
3775                 /* Should we return success if return code is EEXIST ? */
3776                 mutex_unlock(&priv->mutex);
3777                 return ret;
3778         }
3779
3780         sta_priv->common.sta_id = sta_id;
3781
3782         /* Initialize rate scaling */
3783         IWL_DEBUG_INFO(priv, "Initializing rate scaling for station %pM\n",
3784                        sta->addr);
3785         iwl_rs_rate_init(priv, sta, sta_id);
3786         mutex_unlock(&priv->mutex);
3787
3788         return 0;
3789 }
3790
3791 static void iwl_mac_channel_switch(struct ieee80211_hw *hw,
3792                                    struct ieee80211_channel_switch *ch_switch)
3793 {
3794         struct iwl_priv *priv = hw->priv;
3795         const struct iwl_channel_info *ch_info;
3796         struct ieee80211_conf *conf = &hw->conf;
3797         struct ieee80211_channel *channel = ch_switch->channel;
3798         struct iwl_ht_config *ht_conf = &priv->current_ht_config;
3799         /*
3800          * MULTI-FIXME
3801          * When we add support for multiple interfaces, we need to
3802          * revisit this. The channel switch command in the device
3803          * only affects the BSS context, but what does that really
3804          * mean? And what if we get a CSA on the second interface?
3805          * This needs a lot of work.
3806          */
3807         struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
3808         u16 ch;
3809         unsigned long flags = 0;
3810
3811         IWL_DEBUG_MAC80211(priv, "enter\n");
3812
3813         if (iwl_is_rfkill(priv))
3814                 goto out_exit;
3815
3816         if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
3817             test_bit(STATUS_SCANNING, &priv->status))
3818                 goto out_exit;
3819
3820         if (!iwl_is_associated_ctx(ctx))
3821                 goto out_exit;
3822
3823         /* channel switch in progress */
3824         if (priv->switch_rxon.switch_in_progress == true)
3825                 goto out_exit;
3826
3827         mutex_lock(&priv->mutex);
3828         if (priv->cfg->ops->lib->set_channel_switch) {
3829
3830                 ch = channel->hw_value;
3831                 if (le16_to_cpu(ctx->active.channel) != ch) {
3832                         ch_info = iwl_get_channel_info(priv,
3833                                                        channel->band,
3834                                                        ch);
3835                         if (!is_channel_valid(ch_info)) {
3836                                 IWL_DEBUG_MAC80211(priv, "invalid channel\n");
3837                                 goto out;
3838                         }
3839                         spin_lock_irqsave(&priv->lock, flags);
3840
3841                         priv->current_ht_config.smps = conf->smps_mode;
3842
3843                         /* Configure HT40 channels */
3844                         ctx->ht.enabled = conf_is_ht(conf);
3845                         if (ctx->ht.enabled) {
3846                                 if (conf_is_ht40_minus(conf)) {
3847                                         ctx->ht.extension_chan_offset =
3848                                                 IEEE80211_HT_PARAM_CHA_SEC_BELOW;
3849                                         ctx->ht.is_40mhz = true;
3850                                 } else if (conf_is_ht40_plus(conf)) {
3851                                         ctx->ht.extension_chan_offset =
3852                                                 IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
3853                                         ctx->ht.is_40mhz = true;
3854                                 } else {
3855                                         ctx->ht.extension_chan_offset =
3856                                                 IEEE80211_HT_PARAM_CHA_SEC_NONE;
3857                                         ctx->ht.is_40mhz = false;
3858                                 }
3859                         } else
3860                                 ctx->ht.is_40mhz = false;
3861
3862                         if ((le16_to_cpu(ctx->staging.channel) != ch))
3863                                 ctx->staging.flags = 0;
3864
3865                         iwl_set_rxon_channel(priv, channel, ctx);
3866                         iwl_set_rxon_ht(priv, ht_conf);
3867                         iwl_set_flags_for_band(priv, ctx, channel->band,
3868                                                ctx->vif);
3869                         spin_unlock_irqrestore(&priv->lock, flags);
3870
3871                         iwl_set_rate(priv);
3872                         /*
3873                          * at this point, staging_rxon has the
3874                          * configuration for channel switch
3875                          */
3876                         if (priv->cfg->ops->lib->set_channel_switch(priv,
3877                                                                     ch_switch))
3878                                 priv->switch_rxon.switch_in_progress = false;
3879                 }
3880         }
3881 out:
3882         mutex_unlock(&priv->mutex);
3883 out_exit:
3884         if (!priv->switch_rxon.switch_in_progress)
3885                 ieee80211_chswitch_done(ctx->vif, false);
3886         IWL_DEBUG_MAC80211(priv, "leave\n");
3887 }
3888
3889 static void iwlagn_configure_filter(struct ieee80211_hw *hw,
3890                                     unsigned int changed_flags,
3891                                     unsigned int *total_flags,
3892                                     u64 multicast)
3893 {
3894         struct iwl_priv *priv = hw->priv;
3895         __le32 filter_or = 0, filter_nand = 0;
3896         struct iwl_rxon_context *ctx;
3897
3898 #define CHK(test, flag) do { \
3899         if (*total_flags & (test))              \
3900                 filter_or |= (flag);            \
3901         else                                    \
3902                 filter_nand |= (flag);          \
3903         } while (0)
3904
3905         IWL_DEBUG_MAC80211(priv, "Enter: changed: 0x%x, total: 0x%x\n",
3906                         changed_flags, *total_flags);
3907
3908         CHK(FIF_OTHER_BSS | FIF_PROMISC_IN_BSS, RXON_FILTER_PROMISC_MSK);
3909         CHK(FIF_CONTROL, RXON_FILTER_CTL2HOST_MSK);
3910         CHK(FIF_BCN_PRBRESP_PROMISC, RXON_FILTER_BCON_AWARE_MSK);
3911
3912 #undef CHK
3913
3914         mutex_lock(&priv->mutex);
3915
3916         for_each_context(priv, ctx) {
3917                 ctx->staging.filter_flags &= ~filter_nand;
3918                 ctx->staging.filter_flags |= filter_or;
3919                 iwlcore_commit_rxon(priv, ctx);
3920         }
3921
3922         mutex_unlock(&priv->mutex);
3923
3924         /*
3925          * Receiving all multicast frames is always enabled by the
3926          * default flags setup in iwl_connection_init_rx_config()
3927          * since we currently do not support programming multicast
3928          * filters into the device.
3929          */
3930         *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS |
3931                         FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
3932 }
3933
3934 static void iwl_mac_flush(struct ieee80211_hw *hw, bool drop)
3935 {
3936         struct iwl_priv *priv = hw->priv;
3937
3938         mutex_lock(&priv->mutex);
3939         IWL_DEBUG_MAC80211(priv, "enter\n");
3940
3941         /* do not support "flush" */
3942         if (!priv->cfg->ops->lib->txfifo_flush)
3943                 goto done;
3944
3945         if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
3946                 IWL_DEBUG_TX(priv, "Aborting flush due to device shutdown\n");
3947                 goto done;
3948         }
3949         if (iwl_is_rfkill(priv)) {
3950                 IWL_DEBUG_TX(priv, "Aborting flush due to RF Kill\n");
3951                 goto done;
3952         }
3953
3954         /*
3955          * mac80211 will not push any more frames for transmit
3956          * until the flush is completed
3957          */
3958         if (drop) {
3959                 IWL_DEBUG_MAC80211(priv, "send flush command\n");
3960                 if (priv->cfg->ops->lib->txfifo_flush(priv, IWL_DROP_ALL)) {
3961                         IWL_ERR(priv, "flush request fail\n");
3962                         goto done;
3963                 }
3964         }
3965         IWL_DEBUG_MAC80211(priv, "wait transmit/flush all frames\n");
3966         iwlagn_wait_tx_queue_empty(priv);
3967 done:
3968         mutex_unlock(&priv->mutex);
3969         IWL_DEBUG_MAC80211(priv, "leave\n");
3970 }
3971
3972 /*****************************************************************************
3973  *
3974  * driver setup and teardown
3975  *
3976  *****************************************************************************/
3977
3978 static void iwl_setup_deferred_work(struct iwl_priv *priv)
3979 {
3980         priv->workqueue = create_singlethread_workqueue(DRV_NAME);
3981
3982         init_waitqueue_head(&priv->wait_command_queue);
3983
3984         INIT_WORK(&priv->restart, iwl_bg_restart);
3985         INIT_WORK(&priv->rx_replenish, iwl_bg_rx_replenish);
3986         INIT_WORK(&priv->beacon_update, iwl_bg_beacon_update);
3987         INIT_WORK(&priv->run_time_calib_work, iwl_bg_run_time_calib_work);
3988         INIT_WORK(&priv->tx_flush, iwl_bg_tx_flush);
3989         INIT_WORK(&priv->bt_full_concurrency, iwl_bg_bt_full_concurrency);
3990         INIT_WORK(&priv->bt_runtime_config, iwl_bg_bt_runtime_config);
3991         INIT_DELAYED_WORK(&priv->init_alive_start, iwl_bg_init_alive_start);
3992         INIT_DELAYED_WORK(&priv->alive_start, iwl_bg_alive_start);
3993
3994         iwl_setup_scan_deferred_work(priv);
3995
3996         if (priv->cfg->ops->lib->setup_deferred_work)
3997                 priv->cfg->ops->lib->setup_deferred_work(priv);
3998
3999         init_timer(&priv->statistics_periodic);
4000         priv->statistics_periodic.data = (unsigned long)priv;
4001         priv->statistics_periodic.function = iwl_bg_statistics_periodic;
4002
4003         init_timer(&priv->ucode_trace);
4004         priv->ucode_trace.data = (unsigned long)priv;
4005         priv->ucode_trace.function = iwl_bg_ucode_trace;
4006
4007         if (priv->cfg->ops->lib->recover_from_tx_stall) {
4008                 init_timer(&priv->monitor_recover);
4009                 priv->monitor_recover.data = (unsigned long)priv;
4010                 priv->monitor_recover.function =
4011                         priv->cfg->ops->lib->recover_from_tx_stall;
4012         }
4013
4014         if (!priv->cfg->use_isr_legacy)
4015                 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
4016                         iwl_irq_tasklet, (unsigned long)priv);
4017         else
4018                 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
4019                         iwl_irq_tasklet_legacy, (unsigned long)priv);
4020 }
4021
4022 static void iwl_cancel_deferred_work(struct iwl_priv *priv)
4023 {
4024         if (priv->cfg->ops->lib->cancel_deferred_work)
4025                 priv->cfg->ops->lib->cancel_deferred_work(priv);
4026
4027         cancel_delayed_work_sync(&priv->init_alive_start);
4028         cancel_delayed_work(&priv->scan_check);
4029         cancel_work_sync(&priv->start_internal_scan);
4030         cancel_delayed_work(&priv->alive_start);
4031         cancel_work_sync(&priv->run_time_calib_work);
4032         cancel_work_sync(&priv->beacon_update);
4033         cancel_work_sync(&priv->bt_full_concurrency);
4034         cancel_work_sync(&priv->bt_runtime_config);
4035         del_timer_sync(&priv->statistics_periodic);
4036         del_timer_sync(&priv->ucode_trace);
4037 }
4038
4039 static void iwl_init_hw_rates(struct iwl_priv *priv,
4040                               struct ieee80211_rate *rates)
4041 {
4042         int i;
4043
4044         for (i = 0; i < IWL_RATE_COUNT_LEGACY; i++) {
4045                 rates[i].bitrate = iwl_rates[i].ieee * 5;
4046                 rates[i].hw_value = i; /* Rate scaling will work on indexes */
4047                 rates[i].hw_value_short = i;
4048                 rates[i].flags = 0;
4049                 if ((i >= IWL_FIRST_CCK_RATE) && (i <= IWL_LAST_CCK_RATE)) {
4050                         /*
4051                          * If CCK != 1M then set short preamble rate flag.
4052                          */
4053                         rates[i].flags |=
4054                                 (iwl_rates[i].plcp == IWL_RATE_1M_PLCP) ?
4055                                         0 : IEEE80211_RATE_SHORT_PREAMBLE;
4056                 }
4057         }
4058 }
4059
4060 static int iwl_init_drv(struct iwl_priv *priv)
4061 {
4062         int ret;
4063
4064         priv->ibss_beacon = NULL;
4065
4066         spin_lock_init(&priv->sta_lock);
4067         spin_lock_init(&priv->hcmd_lock);
4068
4069         INIT_LIST_HEAD(&priv->free_frames);
4070
4071         mutex_init(&priv->mutex);
4072         mutex_init(&priv->sync_cmd_mutex);
4073
4074         priv->ieee_channels = NULL;
4075         priv->ieee_rates = NULL;
4076         priv->band = IEEE80211_BAND_2GHZ;
4077
4078         priv->iw_mode = NL80211_IFTYPE_STATION;
4079         priv->current_ht_config.smps = IEEE80211_SMPS_STATIC;
4080         priv->missed_beacon_threshold = IWL_MISSED_BEACON_THRESHOLD_DEF;
4081         priv->_agn.agg_tids_count = 0;
4082
4083         /* initialize force reset */
4084         priv->force_reset[IWL_RF_RESET].reset_duration =
4085                 IWL_DELAY_NEXT_FORCE_RF_RESET;
4086         priv->force_reset[IWL_FW_RESET].reset_duration =
4087                 IWL_DELAY_NEXT_FORCE_FW_RELOAD;
4088
4089         /* Choose which receivers/antennas to use */
4090         if (priv->cfg->ops->hcmd->set_rxon_chain)
4091                 priv->cfg->ops->hcmd->set_rxon_chain(priv,
4092                                         &priv->contexts[IWL_RXON_CTX_BSS]);
4093
4094         iwl_init_scan_params(priv);
4095
4096         /* init bt coex */
4097         if (priv->cfg->advanced_bt_coexist) {
4098                 priv->kill_ack_mask = IWLAGN_BT_KILL_ACK_MASK_DEFAULT;
4099                 priv->kill_cts_mask = IWLAGN_BT_KILL_CTS_MASK_DEFAULT;
4100                 priv->bt_valid = IWLAGN_BT_ALL_VALID_MSK;
4101                 priv->bt_on_thresh = BT_ON_THRESHOLD_DEF;
4102                 priv->bt_duration = BT_DURATION_LIMIT_DEF;
4103                 priv->dynamic_frag_thresh = BT_FRAG_THRESHOLD_DEF;
4104                 priv->dynamic_agg_thresh = BT_AGG_THRESHOLD_DEF;
4105         }
4106
4107         /* Set the tx_power_user_lmt to the lowest power level
4108          * this value will get overwritten by channel max power avg
4109          * from eeprom */
4110         priv->tx_power_user_lmt = IWLAGN_TX_POWER_TARGET_POWER_MIN;
4111
4112         ret = iwl_init_channel_map(priv);
4113         if (ret) {
4114                 IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
4115                 goto err;
4116         }
4117
4118         ret = iwlcore_init_geos(priv);
4119         if (ret) {
4120                 IWL_ERR(priv, "initializing geos failed: %d\n", ret);
4121                 goto err_free_channel_map;
4122         }
4123         iwl_init_hw_rates(priv, priv->ieee_rates);
4124
4125         return 0;
4126
4127 err_free_channel_map:
4128         iwl_free_channel_map(priv);
4129 err:
4130         return ret;
4131 }
4132
4133 static void iwl_uninit_drv(struct iwl_priv *priv)
4134 {
4135         iwl_calib_free_results(priv);
4136         iwlcore_free_geos(priv);
4137         iwl_free_channel_map(priv);
4138         kfree(priv->scan_cmd);
4139 }
4140
4141 static struct ieee80211_ops iwl_hw_ops = {
4142         .tx = iwl_mac_tx,
4143         .start = iwl_mac_start,
4144         .stop = iwl_mac_stop,
4145         .add_interface = iwl_mac_add_interface,
4146         .remove_interface = iwl_mac_remove_interface,
4147         .config = iwl_mac_config,
4148         .configure_filter = iwlagn_configure_filter,
4149         .set_key = iwl_mac_set_key,
4150         .update_tkip_key = iwl_mac_update_tkip_key,
4151         .conf_tx = iwl_mac_conf_tx,
4152         .reset_tsf = iwl_mac_reset_tsf,
4153         .bss_info_changed = iwl_bss_info_changed,
4154         .ampdu_action = iwl_mac_ampdu_action,
4155         .hw_scan = iwl_mac_hw_scan,
4156         .sta_notify = iwl_mac_sta_notify,
4157         .sta_add = iwlagn_mac_sta_add,
4158         .sta_remove = iwl_mac_sta_remove,
4159         .channel_switch = iwl_mac_channel_switch,
4160         .flush = iwl_mac_flush,
4161         .tx_last_beacon = iwl_mac_tx_last_beacon,
4162 };
4163
4164 static void iwl_hw_detect(struct iwl_priv *priv)
4165 {
4166         priv->hw_rev = _iwl_read32(priv, CSR_HW_REV);
4167         priv->hw_wa_rev = _iwl_read32(priv, CSR_HW_REV_WA_REG);
4168         pci_read_config_byte(priv->pci_dev, PCI_REVISION_ID, &priv->rev_id);
4169         IWL_DEBUG_INFO(priv, "HW Revision ID = 0x%X\n", priv->rev_id);
4170 }
4171
4172 static int iwl_set_hw_params(struct iwl_priv *priv)
4173 {
4174         priv->hw_params.max_rxq_size = RX_QUEUE_SIZE;
4175         priv->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG;
4176         if (priv->cfg->mod_params->amsdu_size_8K)
4177                 priv->hw_params.rx_page_order = get_order(IWL_RX_BUF_SIZE_8K);
4178         else
4179                 priv->hw_params.rx_page_order = get_order(IWL_RX_BUF_SIZE_4K);
4180
4181         priv->hw_params.max_beacon_itrvl = IWL_MAX_UCODE_BEACON_INTERVAL;
4182
4183         if (priv->cfg->mod_params->disable_11n)
4184                 priv->cfg->sku &= ~IWL_SKU_N;
4185
4186         /* Device-specific setup */
4187         return priv->cfg->ops->lib->set_hw_params(priv);
4188 }
4189
4190 static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
4191 {
4192         int err = 0, i;
4193         struct iwl_priv *priv;
4194         struct ieee80211_hw *hw;
4195         struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
4196         unsigned long flags;
4197         u16 pci_cmd, num_mac;
4198
4199         /************************
4200          * 1. Allocating HW data
4201          ************************/
4202
4203         /* Disabling hardware scan means that mac80211 will perform scans
4204          * "the hard way", rather than using device's scan. */
4205         if (cfg->mod_params->disable_hw_scan) {
4206                 if (iwl_debug_level & IWL_DL_INFO)
4207                         dev_printk(KERN_DEBUG, &(pdev->dev),
4208                                    "Disabling hw_scan\n");
4209                 iwl_hw_ops.hw_scan = NULL;
4210         }
4211
4212         hw = iwl_alloc_all(cfg, &iwl_hw_ops);
4213         if (!hw) {
4214                 err = -ENOMEM;
4215                 goto out;
4216         }
4217         priv = hw->priv;
4218         /* At this point both hw and priv are allocated. */
4219
4220         /*
4221          * The default context is always valid,
4222          * more may be discovered when firmware
4223          * is loaded.
4224          */
4225         priv->valid_contexts = BIT(IWL_RXON_CTX_BSS);
4226
4227         for (i = 0; i < NUM_IWL_RXON_CTX; i++)
4228                 priv->contexts[i].ctxid = i;
4229
4230         priv->contexts[IWL_RXON_CTX_BSS].rxon_cmd = REPLY_RXON;
4231         priv->contexts[IWL_RXON_CTX_BSS].rxon_timing_cmd = REPLY_RXON_TIMING;
4232         priv->contexts[IWL_RXON_CTX_BSS].rxon_assoc_cmd = REPLY_RXON_ASSOC;
4233         priv->contexts[IWL_RXON_CTX_BSS].qos_cmd = REPLY_QOS_PARAM;
4234         priv->contexts[IWL_RXON_CTX_BSS].ap_sta_id = IWL_AP_ID;
4235         priv->contexts[IWL_RXON_CTX_BSS].wep_key_cmd = REPLY_WEPKEY;
4236
4237         priv->contexts[IWL_RXON_CTX_PAN].rxon_cmd = REPLY_WIPAN_RXON;
4238         priv->contexts[IWL_RXON_CTX_PAN].rxon_timing_cmd = REPLY_WIPAN_RXON_TIMING;
4239         priv->contexts[IWL_RXON_CTX_PAN].rxon_assoc_cmd = REPLY_WIPAN_RXON_ASSOC;
4240         priv->contexts[IWL_RXON_CTX_PAN].qos_cmd = REPLY_WIPAN_QOS_PARAM;
4241         priv->contexts[IWL_RXON_CTX_PAN].ap_sta_id = IWL_AP_ID_PAN;
4242         priv->contexts[IWL_RXON_CTX_PAN].wep_key_cmd = REPLY_WIPAN_WEPKEY;
4243         priv->contexts[IWL_RXON_CTX_PAN].bcast_sta_id = IWLAGN_PAN_BCAST_ID;
4244         priv->contexts[IWL_RXON_CTX_PAN].station_flags = STA_FLG_PAN_STATION;
4245
4246         BUILD_BUG_ON(NUM_IWL_RXON_CTX != 2);
4247
4248         SET_IEEE80211_DEV(hw, &pdev->dev);
4249
4250         IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
4251         priv->cfg = cfg;
4252         priv->pci_dev = pdev;
4253         priv->inta_mask = CSR_INI_SET_MASK;
4254
4255         /* is antenna coupling more than 35dB ? */
4256         priv->bt_ant_couple_ok =
4257                 (iwlagn_ant_coupling > IWL_BT_ANTENNA_COUPLING_THRESHOLD) ?
4258                 true : false;
4259
4260         /* enable/disable bt channel announcement */
4261         priv->bt_ch_announce = iwlagn_bt_ch_announce;
4262
4263         if (iwl_alloc_traffic_mem(priv))
4264                 IWL_ERR(priv, "Not enough memory to generate traffic log\n");
4265
4266         /**************************
4267          * 2. Initializing PCI bus
4268          **************************/
4269         pci_disable_link_state(pdev, PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1 |
4270                                 PCIE_LINK_STATE_CLKPM);
4271
4272         if (pci_enable_device(pdev)) {
4273                 err = -ENODEV;
4274                 goto out_ieee80211_free_hw;
4275         }
4276
4277         pci_set_master(pdev);
4278
4279         err = pci_set_dma_mask(pdev, DMA_BIT_MASK(36));
4280         if (!err)
4281                 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(36));
4282         if (err) {
4283                 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
4284                 if (!err)
4285                         err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
4286                 /* both attempts failed: */
4287                 if (err) {
4288                         IWL_WARN(priv, "No suitable DMA available.\n");
4289                         goto out_pci_disable_device;
4290                 }
4291         }
4292
4293         err = pci_request_regions(pdev, DRV_NAME);
4294         if (err)
4295                 goto out_pci_disable_device;
4296
4297         pci_set_drvdata(pdev, priv);
4298
4299
4300         /***********************
4301          * 3. Read REV register
4302          ***********************/
4303         priv->hw_base = pci_iomap(pdev, 0, 0);
4304         if (!priv->hw_base) {
4305                 err = -ENODEV;
4306                 goto out_pci_release_regions;
4307         }
4308
4309         IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
4310                 (unsigned long long) pci_resource_len(pdev, 0));
4311         IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
4312
4313         /* these spin locks will be used in apm_ops.init and EEPROM access
4314          * we should init now
4315          */
4316         spin_lock_init(&priv->reg_lock);
4317         spin_lock_init(&priv->lock);
4318
4319         /*
4320          * stop and reset the on-board processor just in case it is in a
4321          * strange state ... like being left stranded by a primary kernel
4322          * and this is now the kdump kernel trying to start up
4323          */
4324         iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
4325
4326         iwl_hw_detect(priv);
4327         IWL_INFO(priv, "Detected %s, REV=0x%X\n",
4328                 priv->cfg->name, priv->hw_rev);
4329
4330         /* We disable the RETRY_TIMEOUT register (0x41) to keep
4331          * PCI Tx retries from interfering with C3 CPU state */
4332         pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
4333
4334         iwl_prepare_card_hw(priv);
4335         if (!priv->hw_ready) {
4336                 IWL_WARN(priv, "Failed, HW not ready\n");
4337                 goto out_iounmap;
4338         }
4339
4340         /*****************
4341          * 4. Read EEPROM
4342          *****************/
4343         /* Read the EEPROM */
4344         err = iwl_eeprom_init(priv);
4345         if (err) {
4346                 IWL_ERR(priv, "Unable to init EEPROM\n");
4347                 goto out_iounmap;
4348         }
4349         err = iwl_eeprom_check_version(priv);
4350         if (err)
4351                 goto out_free_eeprom;
4352
4353         /* extract MAC Address */
4354         iwl_eeprom_get_mac(priv, priv->addresses[0].addr);
4355         IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->addresses[0].addr);
4356         priv->hw->wiphy->addresses = priv->addresses;
4357         priv->hw->wiphy->n_addresses = 1;
4358         num_mac = iwl_eeprom_query16(priv, EEPROM_NUM_MAC_ADDRESS);
4359         if (num_mac > 1) {
4360                 memcpy(priv->addresses[1].addr, priv->addresses[0].addr,
4361                        ETH_ALEN);
4362                 priv->addresses[1].addr[5]++;
4363                 priv->hw->wiphy->n_addresses++;
4364         }
4365
4366         /************************
4367          * 5. Setup HW constants
4368          ************************/
4369         if (iwl_set_hw_params(priv)) {
4370                 IWL_ERR(priv, "failed to set hw parameters\n");
4371                 goto out_free_eeprom;
4372         }
4373
4374         /*******************
4375          * 6. Setup priv
4376          *******************/
4377
4378         err = iwl_init_drv(priv);
4379         if (err)
4380                 goto out_free_eeprom;
4381         /* At this point both hw and priv are initialized. */
4382
4383         /********************
4384          * 7. Setup services
4385          ********************/
4386         spin_lock_irqsave(&priv->lock, flags);
4387         iwl_disable_interrupts(priv);
4388         spin_unlock_irqrestore(&priv->lock, flags);
4389
4390         pci_enable_msi(priv->pci_dev);
4391
4392         iwl_alloc_isr_ict(priv);
4393         err = request_irq(priv->pci_dev->irq, priv->cfg->ops->lib->isr,
4394                           IRQF_SHARED, DRV_NAME, priv);
4395         if (err) {
4396                 IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
4397                 goto out_disable_msi;
4398         }
4399
4400         iwl_setup_deferred_work(priv);
4401         iwl_setup_rx_handlers(priv);
4402
4403         /*********************************************
4404          * 8. Enable interrupts and read RFKILL state
4405          *********************************************/
4406
4407         /* enable interrupts if needed: hw bug w/a */
4408         pci_read_config_word(priv->pci_dev, PCI_COMMAND, &pci_cmd);
4409         if (pci_cmd & PCI_COMMAND_INTX_DISABLE) {
4410                 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
4411                 pci_write_config_word(priv->pci_dev, PCI_COMMAND, pci_cmd);
4412         }
4413
4414         iwl_enable_interrupts(priv);
4415
4416         /* If platform's RF_KILL switch is NOT set to KILL */
4417         if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
4418                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
4419         else
4420                 set_bit(STATUS_RF_KILL_HW, &priv->status);
4421
4422         wiphy_rfkill_set_hw_state(priv->hw->wiphy,
4423                 test_bit(STATUS_RF_KILL_HW, &priv->status));
4424
4425         iwl_power_initialize(priv);
4426         iwl_tt_initialize(priv);
4427
4428         init_completion(&priv->_agn.firmware_loading_complete);
4429
4430         err = iwl_request_firmware(priv, true);
4431         if (err)
4432                 goto out_destroy_workqueue;
4433
4434         return 0;
4435
4436  out_destroy_workqueue:
4437         destroy_workqueue(priv->workqueue);
4438         priv->workqueue = NULL;
4439         free_irq(priv->pci_dev->irq, priv);
4440         iwl_free_isr_ict(priv);
4441  out_disable_msi:
4442         pci_disable_msi(priv->pci_dev);
4443         iwl_uninit_drv(priv);
4444  out_free_eeprom:
4445         iwl_eeprom_free(priv);
4446  out_iounmap:
4447         pci_iounmap(pdev, priv->hw_base);
4448  out_pci_release_regions:
4449         pci_set_drvdata(pdev, NULL);
4450         pci_release_regions(pdev);
4451  out_pci_disable_device:
4452         pci_disable_device(pdev);
4453  out_ieee80211_free_hw:
4454         iwl_free_traffic_mem(priv);
4455         ieee80211_free_hw(priv->hw);
4456  out:
4457         return err;
4458 }
4459
4460 static void __devexit iwl_pci_remove(struct pci_dev *pdev)
4461 {
4462         struct iwl_priv *priv = pci_get_drvdata(pdev);
4463         unsigned long flags;
4464
4465         if (!priv)
4466                 return;
4467
4468         wait_for_completion(&priv->_agn.firmware_loading_complete);
4469
4470         IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
4471
4472         iwl_dbgfs_unregister(priv);
4473         sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
4474
4475         /* ieee80211_unregister_hw call wil cause iwl_mac_stop to
4476          * to be called and iwl_down since we are removing the device
4477          * we need to set STATUS_EXIT_PENDING bit.
4478          */
4479         set_bit(STATUS_EXIT_PENDING, &priv->status);
4480         if (priv->mac80211_registered) {
4481                 ieee80211_unregister_hw(priv->hw);
4482                 priv->mac80211_registered = 0;
4483         } else {
4484                 iwl_down(priv);
4485         }
4486
4487         /*
4488          * Make sure device is reset to low power before unloading driver.
4489          * This may be redundant with iwl_down(), but there are paths to
4490          * run iwl_down() without calling apm_ops.stop(), and there are
4491          * paths to avoid running iwl_down() at all before leaving driver.
4492          * This (inexpensive) call *makes sure* device is reset.
4493          */
4494         priv->cfg->ops->lib->apm_ops.stop(priv);
4495
4496         iwl_tt_exit(priv);
4497
4498         /* make sure we flush any pending irq or
4499          * tasklet for the driver
4500          */
4501         spin_lock_irqsave(&priv->lock, flags);
4502         iwl_disable_interrupts(priv);
4503         spin_unlock_irqrestore(&priv->lock, flags);
4504
4505         iwl_synchronize_irq(priv);
4506
4507         iwl_dealloc_ucode_pci(priv);
4508
4509         if (priv->rxq.bd)
4510                 iwlagn_rx_queue_free(priv, &priv->rxq);
4511         iwlagn_hw_txq_ctx_free(priv);
4512
4513         iwl_eeprom_free(priv);
4514
4515
4516         /*netif_stop_queue(dev); */
4517         flush_workqueue(priv->workqueue);
4518
4519         /* ieee80211_unregister_hw calls iwl_mac_stop, which flushes
4520          * priv->workqueue... so we can't take down the workqueue
4521          * until now... */
4522         destroy_workqueue(priv->workqueue);
4523         priv->workqueue = NULL;
4524         iwl_free_traffic_mem(priv);
4525
4526         free_irq(priv->pci_dev->irq, priv);
4527         pci_disable_msi(priv->pci_dev);
4528         pci_iounmap(pdev, priv->hw_base);
4529         pci_release_regions(pdev);
4530         pci_disable_device(pdev);
4531         pci_set_drvdata(pdev, NULL);
4532
4533         iwl_uninit_drv(priv);
4534
4535         iwl_free_isr_ict(priv);
4536
4537         if (priv->ibss_beacon)
4538                 dev_kfree_skb(priv->ibss_beacon);
4539
4540         ieee80211_free_hw(priv->hw);
4541 }
4542
4543
4544 /*****************************************************************************
4545  *
4546  * driver and module entry point
4547  *
4548  *****************************************************************************/
4549
4550 /* Hardware specific file defines the PCI IDs table for that hardware module */
4551 static DEFINE_PCI_DEVICE_TABLE(iwl_hw_card_ids) = {
4552 #ifdef CONFIG_IWL4965
4553         {IWL_PCI_DEVICE(0x4229, PCI_ANY_ID, iwl4965_agn_cfg)},
4554         {IWL_PCI_DEVICE(0x4230, PCI_ANY_ID, iwl4965_agn_cfg)},
4555 #endif /* CONFIG_IWL4965 */
4556 #ifdef CONFIG_IWL5000
4557 /* 5100 Series WiFi */
4558         {IWL_PCI_DEVICE(0x4232, 0x1201, iwl5100_agn_cfg)}, /* Mini Card */
4559         {IWL_PCI_DEVICE(0x4232, 0x1301, iwl5100_agn_cfg)}, /* Half Mini Card */
4560         {IWL_PCI_DEVICE(0x4232, 0x1204, iwl5100_agn_cfg)}, /* Mini Card */
4561         {IWL_PCI_DEVICE(0x4232, 0x1304, iwl5100_agn_cfg)}, /* Half Mini Card */
4562         {IWL_PCI_DEVICE(0x4232, 0x1205, iwl5100_bgn_cfg)}, /* Mini Card */
4563         {IWL_PCI_DEVICE(0x4232, 0x1305, iwl5100_bgn_cfg)}, /* Half Mini Card */
4564         {IWL_PCI_DEVICE(0x4232, 0x1206, iwl5100_abg_cfg)}, /* Mini Card */
4565         {IWL_PCI_DEVICE(0x4232, 0x1306, iwl5100_abg_cfg)}, /* Half Mini Card */
4566         {IWL_PCI_DEVICE(0x4232, 0x1221, iwl5100_agn_cfg)}, /* Mini Card */
4567         {IWL_PCI_DEVICE(0x4232, 0x1321, iwl5100_agn_cfg)}, /* Half Mini Card */
4568         {IWL_PCI_DEVICE(0x4232, 0x1224, iwl5100_agn_cfg)}, /* Mini Card */
4569         {IWL_PCI_DEVICE(0x4232, 0x1324, iwl5100_agn_cfg)}, /* Half Mini Card */
4570         {IWL_PCI_DEVICE(0x4232, 0x1225, iwl5100_bgn_cfg)}, /* Mini Card */
4571         {IWL_PCI_DEVICE(0x4232, 0x1325, iwl5100_bgn_cfg)}, /* Half Mini Card */
4572         {IWL_PCI_DEVICE(0x4232, 0x1226, iwl5100_abg_cfg)}, /* Mini Card */
4573         {IWL_PCI_DEVICE(0x4232, 0x1326, iwl5100_abg_cfg)}, /* Half Mini Card */
4574         {IWL_PCI_DEVICE(0x4237, 0x1211, iwl5100_agn_cfg)}, /* Mini Card */
4575         {IWL_PCI_DEVICE(0x4237, 0x1311, iwl5100_agn_cfg)}, /* Half Mini Card */
4576         {IWL_PCI_DEVICE(0x4237, 0x1214, iwl5100_agn_cfg)}, /* Mini Card */
4577         {IWL_PCI_DEVICE(0x4237, 0x1314, iwl5100_agn_cfg)}, /* Half Mini Card */
4578         {IWL_PCI_DEVICE(0x4237, 0x1215, iwl5100_bgn_cfg)}, /* Mini Card */
4579         {IWL_PCI_DEVICE(0x4237, 0x1315, iwl5100_bgn_cfg)}, /* Half Mini Card */
4580         {IWL_PCI_DEVICE(0x4237, 0x1216, iwl5100_abg_cfg)}, /* Mini Card */
4581         {IWL_PCI_DEVICE(0x4237, 0x1316, iwl5100_abg_cfg)}, /* Half Mini Card */
4582
4583 /* 5300 Series WiFi */
4584         {IWL_PCI_DEVICE(0x4235, 0x1021, iwl5300_agn_cfg)}, /* Mini Card */
4585         {IWL_PCI_DEVICE(0x4235, 0x1121, iwl5300_agn_cfg)}, /* Half Mini Card */
4586         {IWL_PCI_DEVICE(0x4235, 0x1024, iwl5300_agn_cfg)}, /* Mini Card */
4587         {IWL_PCI_DEVICE(0x4235, 0x1124, iwl5300_agn_cfg)}, /* Half Mini Card */
4588         {IWL_PCI_DEVICE(0x4235, 0x1001, iwl5300_agn_cfg)}, /* Mini Card */
4589         {IWL_PCI_DEVICE(0x4235, 0x1101, iwl5300_agn_cfg)}, /* Half Mini Card */
4590         {IWL_PCI_DEVICE(0x4235, 0x1004, iwl5300_agn_cfg)}, /* Mini Card */
4591         {IWL_PCI_DEVICE(0x4235, 0x1104, iwl5300_agn_cfg)}, /* Half Mini Card */
4592         {IWL_PCI_DEVICE(0x4236, 0x1011, iwl5300_agn_cfg)}, /* Mini Card */
4593         {IWL_PCI_DEVICE(0x4236, 0x1111, iwl5300_agn_cfg)}, /* Half Mini Card */
4594         {IWL_PCI_DEVICE(0x4236, 0x1014, iwl5300_agn_cfg)}, /* Mini Card */
4595         {IWL_PCI_DEVICE(0x4236, 0x1114, iwl5300_agn_cfg)}, /* Half Mini Card */
4596
4597 /* 5350 Series WiFi/WiMax */
4598         {IWL_PCI_DEVICE(0x423A, 0x1001, iwl5350_agn_cfg)}, /* Mini Card */
4599         {IWL_PCI_DEVICE(0x423A, 0x1021, iwl5350_agn_cfg)}, /* Mini Card */
4600         {IWL_PCI_DEVICE(0x423B, 0x1011, iwl5350_agn_cfg)}, /* Mini Card */
4601
4602 /* 5150 Series Wifi/WiMax */
4603         {IWL_PCI_DEVICE(0x423C, 0x1201, iwl5150_agn_cfg)}, /* Mini Card */
4604         {IWL_PCI_DEVICE(0x423C, 0x1301, iwl5150_agn_cfg)}, /* Half Mini Card */
4605         {IWL_PCI_DEVICE(0x423C, 0x1206, iwl5150_abg_cfg)}, /* Mini Card */
4606         {IWL_PCI_DEVICE(0x423C, 0x1306, iwl5150_abg_cfg)}, /* Half Mini Card */
4607         {IWL_PCI_DEVICE(0x423C, 0x1221, iwl5150_agn_cfg)}, /* Mini Card */
4608         {IWL_PCI_DEVICE(0x423C, 0x1321, iwl5150_agn_cfg)}, /* Half Mini Card */
4609
4610         {IWL_PCI_DEVICE(0x423D, 0x1211, iwl5150_agn_cfg)}, /* Mini Card */
4611         {IWL_PCI_DEVICE(0x423D, 0x1311, iwl5150_agn_cfg)}, /* Half Mini Card */
4612         {IWL_PCI_DEVICE(0x423D, 0x1216, iwl5150_abg_cfg)}, /* Mini Card */
4613         {IWL_PCI_DEVICE(0x423D, 0x1316, iwl5150_abg_cfg)}, /* Half Mini Card */
4614
4615 /* 6x00 Series */
4616         {IWL_PCI_DEVICE(0x422B, 0x1101, iwl6000_3agn_cfg)},
4617         {IWL_PCI_DEVICE(0x422B, 0x1121, iwl6000_3agn_cfg)},
4618         {IWL_PCI_DEVICE(0x422C, 0x1301, iwl6000i_2agn_cfg)},
4619         {IWL_PCI_DEVICE(0x422C, 0x1306, iwl6000i_2abg_cfg)},
4620         {IWL_PCI_DEVICE(0x422C, 0x1307, iwl6000i_2bg_cfg)},
4621         {IWL_PCI_DEVICE(0x422C, 0x1321, iwl6000i_2agn_cfg)},
4622         {IWL_PCI_DEVICE(0x422C, 0x1326, iwl6000i_2abg_cfg)},
4623         {IWL_PCI_DEVICE(0x4238, 0x1111, iwl6000_3agn_cfg)},
4624         {IWL_PCI_DEVICE(0x4239, 0x1311, iwl6000i_2agn_cfg)},
4625         {IWL_PCI_DEVICE(0x4239, 0x1316, iwl6000i_2abg_cfg)},
4626
4627 /* 6x00 Series Gen2a */
4628         {IWL_PCI_DEVICE(0x0082, 0x1201, iwl6000g2a_2agn_cfg)},
4629         {IWL_PCI_DEVICE(0x0085, 0x1211, iwl6000g2a_2agn_cfg)},
4630         {IWL_PCI_DEVICE(0x0082, 0x1221, iwl6000g2a_2agn_cfg)},
4631         {IWL_PCI_DEVICE(0x0082, 0x1206, iwl6000g2a_2abg_cfg)},
4632         {IWL_PCI_DEVICE(0x0085, 0x1216, iwl6000g2a_2abg_cfg)},
4633         {IWL_PCI_DEVICE(0x0082, 0x1226, iwl6000g2a_2abg_cfg)},
4634         {IWL_PCI_DEVICE(0x0082, 0x1207, iwl6000g2a_2bg_cfg)},
4635         {IWL_PCI_DEVICE(0x0082, 0x1301, iwl6000g2a_2agn_cfg)},
4636         {IWL_PCI_DEVICE(0x0082, 0x1306, iwl6000g2a_2abg_cfg)},
4637         {IWL_PCI_DEVICE(0x0082, 0x1307, iwl6000g2a_2bg_cfg)},
4638         {IWL_PCI_DEVICE(0x0082, 0x1321, iwl6000g2a_2agn_cfg)},
4639         {IWL_PCI_DEVICE(0x0082, 0x1326, iwl6000g2a_2abg_cfg)},
4640         {IWL_PCI_DEVICE(0x0085, 0x1311, iwl6000g2a_2agn_cfg)},
4641         {IWL_PCI_DEVICE(0x0085, 0x1316, iwl6000g2a_2abg_cfg)},
4642
4643 /* 6x00 Series Gen2b */
4644         {IWL_PCI_DEVICE(0x008F, 0x5105, iwl6000g2b_bgn_cfg)},
4645         {IWL_PCI_DEVICE(0x0090, 0x5115, iwl6000g2b_bgn_cfg)},
4646         {IWL_PCI_DEVICE(0x008F, 0x5125, iwl6000g2b_bgn_cfg)},
4647         {IWL_PCI_DEVICE(0x008F, 0x5107, iwl6000g2b_bg_cfg)},
4648         {IWL_PCI_DEVICE(0x008F, 0x5201, iwl6000g2b_2agn_cfg)},
4649         {IWL_PCI_DEVICE(0x0090, 0x5211, iwl6000g2b_2agn_cfg)},
4650         {IWL_PCI_DEVICE(0x008F, 0x5221, iwl6000g2b_2agn_cfg)},
4651         {IWL_PCI_DEVICE(0x008F, 0x5206, iwl6000g2b_2abg_cfg)},
4652         {IWL_PCI_DEVICE(0x0090, 0x5216, iwl6000g2b_2abg_cfg)},
4653         {IWL_PCI_DEVICE(0x008F, 0x5226, iwl6000g2b_2abg_cfg)},
4654         {IWL_PCI_DEVICE(0x008F, 0x5207, iwl6000g2b_2bg_cfg)},
4655         {IWL_PCI_DEVICE(0x008A, 0x5301, iwl6000g2b_bgn_cfg)},
4656         {IWL_PCI_DEVICE(0x008A, 0x5305, iwl6000g2b_bgn_cfg)},
4657         {IWL_PCI_DEVICE(0x008A, 0x5307, iwl6000g2b_bg_cfg)},
4658         {IWL_PCI_DEVICE(0x008A, 0x5321, iwl6000g2b_bgn_cfg)},
4659         {IWL_PCI_DEVICE(0x008A, 0x5325, iwl6000g2b_bgn_cfg)},
4660         {IWL_PCI_DEVICE(0x008B, 0x5311, iwl6000g2b_bgn_cfg)},
4661         {IWL_PCI_DEVICE(0x008B, 0x5315, iwl6000g2b_bgn_cfg)},
4662         {IWL_PCI_DEVICE(0x0090, 0x5211, iwl6000g2b_2agn_cfg)},
4663         {IWL_PCI_DEVICE(0x0090, 0x5215, iwl6000g2b_2bgn_cfg)},
4664         {IWL_PCI_DEVICE(0x0090, 0x5216, iwl6000g2b_2abg_cfg)},
4665         {IWL_PCI_DEVICE(0x0091, 0x5201, iwl6000g2b_2agn_cfg)},
4666         {IWL_PCI_DEVICE(0x0091, 0x5205, iwl6000g2b_2bgn_cfg)},
4667         {IWL_PCI_DEVICE(0x0091, 0x5206, iwl6000g2b_2abg_cfg)},
4668         {IWL_PCI_DEVICE(0x0091, 0x5207, iwl6000g2b_2bg_cfg)},
4669         {IWL_PCI_DEVICE(0x0091, 0x5221, iwl6000g2b_2agn_cfg)},
4670         {IWL_PCI_DEVICE(0x0091, 0x5225, iwl6000g2b_2bgn_cfg)},
4671         {IWL_PCI_DEVICE(0x0091, 0x5226, iwl6000g2b_2abg_cfg)},
4672
4673 /* 6x50 WiFi/WiMax Series */
4674         {IWL_PCI_DEVICE(0x0087, 0x1301, iwl6050_2agn_cfg)},
4675         {IWL_PCI_DEVICE(0x0087, 0x1306, iwl6050_2abg_cfg)},
4676         {IWL_PCI_DEVICE(0x0087, 0x1321, iwl6050_2agn_cfg)},
4677         {IWL_PCI_DEVICE(0x0087, 0x1326, iwl6050_2abg_cfg)},
4678         {IWL_PCI_DEVICE(0x0089, 0x1311, iwl6050_2agn_cfg)},
4679         {IWL_PCI_DEVICE(0x0089, 0x1316, iwl6050_2abg_cfg)},
4680
4681 /* 6x50 WiFi/WiMax Series Gen2 */
4682         {IWL_PCI_DEVICE(0x0885, 0x1305, iwl6050g2_bgn_cfg)},
4683         {IWL_PCI_DEVICE(0x0885, 0x1306, iwl6050g2_bgn_cfg)},
4684         {IWL_PCI_DEVICE(0x0885, 0x1325, iwl6050g2_bgn_cfg)},
4685         {IWL_PCI_DEVICE(0x0885, 0x1326, iwl6050g2_bgn_cfg)},
4686         {IWL_PCI_DEVICE(0x0886, 0x1315, iwl6050g2_bgn_cfg)},
4687         {IWL_PCI_DEVICE(0x0886, 0x1316, iwl6050g2_bgn_cfg)},
4688
4689 /* 1000 Series WiFi */
4690         {IWL_PCI_DEVICE(0x0083, 0x1205, iwl1000_bgn_cfg)},
4691         {IWL_PCI_DEVICE(0x0083, 0x1305, iwl1000_bgn_cfg)},
4692         {IWL_PCI_DEVICE(0x0083, 0x1225, iwl1000_bgn_cfg)},
4693         {IWL_PCI_DEVICE(0x0083, 0x1325, iwl1000_bgn_cfg)},
4694         {IWL_PCI_DEVICE(0x0084, 0x1215, iwl1000_bgn_cfg)},
4695         {IWL_PCI_DEVICE(0x0084, 0x1315, iwl1000_bgn_cfg)},
4696         {IWL_PCI_DEVICE(0x0083, 0x1206, iwl1000_bg_cfg)},
4697         {IWL_PCI_DEVICE(0x0083, 0x1306, iwl1000_bg_cfg)},
4698         {IWL_PCI_DEVICE(0x0083, 0x1226, iwl1000_bg_cfg)},
4699         {IWL_PCI_DEVICE(0x0083, 0x1326, iwl1000_bg_cfg)},
4700         {IWL_PCI_DEVICE(0x0084, 0x1216, iwl1000_bg_cfg)},
4701         {IWL_PCI_DEVICE(0x0084, 0x1316, iwl1000_bg_cfg)},
4702 #endif /* CONFIG_IWL5000 */
4703
4704         {0}
4705 };
4706 MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids);
4707
4708 static struct pci_driver iwl_driver = {
4709         .name = DRV_NAME,
4710         .id_table = iwl_hw_card_ids,
4711         .probe = iwl_pci_probe,
4712         .remove = __devexit_p(iwl_pci_remove),
4713 #ifdef CONFIG_PM
4714         .suspend = iwl_pci_suspend,
4715         .resume = iwl_pci_resume,
4716 #endif
4717 };
4718
4719 static int __init iwl_init(void)
4720 {
4721
4722         int ret;
4723         pr_info(DRV_DESCRIPTION ", " DRV_VERSION "\n");
4724         pr_info(DRV_COPYRIGHT "\n");
4725
4726         ret = iwlagn_rate_control_register();
4727         if (ret) {
4728                 pr_err("Unable to register rate control algorithm: %d\n", ret);
4729                 return ret;
4730         }
4731
4732         ret = pci_register_driver(&iwl_driver);
4733         if (ret) {
4734                 pr_err("Unable to initialize PCI module\n");
4735                 goto error_register;
4736         }
4737
4738         return ret;
4739
4740 error_register:
4741         iwlagn_rate_control_unregister();
4742         return ret;
4743 }
4744
4745 static void __exit iwl_exit(void)
4746 {
4747         pci_unregister_driver(&iwl_driver);
4748         iwlagn_rate_control_unregister();
4749 }
4750
4751 module_exit(iwl_exit);
4752 module_init(iwl_init);
4753
4754 #ifdef CONFIG_IWLWIFI_DEBUG
4755 module_param_named(debug50, iwl_debug_level, uint, S_IRUGO);
4756 MODULE_PARM_DESC(debug50, "50XX debug output mask (deprecated)");
4757 module_param_named(debug, iwl_debug_level, uint, S_IRUGO | S_IWUSR);
4758 MODULE_PARM_DESC(debug, "debug output mask");
4759 #endif
4760
4761 module_param_named(swcrypto50, iwlagn_mod_params.sw_crypto, bool, S_IRUGO);
4762 MODULE_PARM_DESC(swcrypto50,
4763                  "using crypto in software (default 0 [hardware]) (deprecated)");
4764 module_param_named(swcrypto, iwlagn_mod_params.sw_crypto, int, S_IRUGO);
4765 MODULE_PARM_DESC(swcrypto, "using crypto in software (default 0 [hardware])");
4766 module_param_named(queues_num50,
4767                    iwlagn_mod_params.num_of_queues, int, S_IRUGO);
4768 MODULE_PARM_DESC(queues_num50,
4769                  "number of hw queues in 50xx series (deprecated)");
4770 module_param_named(queues_num, iwlagn_mod_params.num_of_queues, int, S_IRUGO);
4771 MODULE_PARM_DESC(queues_num, "number of hw queues.");
4772 module_param_named(11n_disable50, iwlagn_mod_params.disable_11n, int, S_IRUGO);
4773 MODULE_PARM_DESC(11n_disable50, "disable 50XX 11n functionality (deprecated)");
4774 module_param_named(11n_disable, iwlagn_mod_params.disable_11n, int, S_IRUGO);
4775 MODULE_PARM_DESC(11n_disable, "disable 11n functionality");
4776 module_param_named(amsdu_size_8K50, iwlagn_mod_params.amsdu_size_8K,
4777                    int, S_IRUGO);
4778 MODULE_PARM_DESC(amsdu_size_8K50,
4779                  "enable 8K amsdu size in 50XX series (deprecated)");
4780 module_param_named(amsdu_size_8K, iwlagn_mod_params.amsdu_size_8K,
4781                    int, S_IRUGO);
4782 MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size");
4783 module_param_named(fw_restart50, iwlagn_mod_params.restart_fw, int, S_IRUGO);
4784 MODULE_PARM_DESC(fw_restart50,
4785                  "restart firmware in case of error (deprecated)");
4786 module_param_named(fw_restart, iwlagn_mod_params.restart_fw, int, S_IRUGO);
4787 MODULE_PARM_DESC(fw_restart, "restart firmware in case of error");
4788 module_param_named(
4789         disable_hw_scan, iwlagn_mod_params.disable_hw_scan, int, S_IRUGO);
4790 MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
4791
4792 module_param_named(ucode_alternative, iwlagn_wanted_ucode_alternative, int,
4793                    S_IRUGO);
4794 MODULE_PARM_DESC(ucode_alternative,
4795                  "specify ucode alternative to use from ucode file");
4796
4797 module_param_named(antenna_coupling, iwlagn_ant_coupling, int, S_IRUGO);
4798 MODULE_PARM_DESC(antenna_coupling,
4799                  "specify antenna coupling in dB (defualt: 0 dB)");
4800
4801 module_param_named(bt_ch_announce, iwlagn_bt_ch_announce, bool, S_IRUGO);
4802 MODULE_PARM_DESC(bt_ch_announce,
4803                  "Enable BT channel announcement mode (default: enable)");