drivers/net/wireless/iwlwifi/iwl-agn.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved.
   4  *
   5  * Portions of this file are derived from the ipw3945 project, as well
   6  * as portions of the ieee80211 subsystem header files.
   7  *
   8  * This program is free software; you can redistribute it and/or modify it
   9  * under the terms of version 2 of the GNU General Public License as
  10  * published by the Free Software Foundation.
  11  *
  12  * This program is distributed in the hope that it will be useful, but WITHOUT
  13  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  15  * more details.
  16  *
  17  * You should have received a copy of the GNU General Public License along with
  18  * this program; if not, write to the Free Software Foundation, Inc.,
  19  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20  *
  21  * The full GNU General Public License is included in this distribution in the
  22  * file called LICENSE.
  23  *
  24  * Contact Information:
  25  *  Intel Linux Wireless <ilw@linux.intel.com>
  26  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27  *
  28  *****************************************************************************/
  29
  30 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  31
  32 #include <linux/kernel.h>
  33 #include <linux/module.h>
  34 #include <linux/init.h>
  35 #include <linux/pci.h>
  36 #include <linux/pci-aspm.h>
  37 #include <linux/slab.h>
  38 #include <linux/dma-mapping.h>
  39 #include <linux/delay.h>
  40 #include <linux/sched.h>
  41 #include <linux/skbuff.h>
  42 #include <linux/netdevice.h>
  43 #include <linux/wireless.h>
  44 #include <linux/firmware.h>
  45 #include <linux/etherdevice.h>
  46 #include <linux/if_arp.h>
  47
  48 #include <net/mac80211.h>
  49
  50 #include <asm/div64.h>
  51
  52 #define DRV_NAME        "iwlagn"
  53
  54 #include "iwl-eeprom.h"
  55 #include "iwl-dev.h"
  56 #include "iwl-core.h"
  57 #include "iwl-io.h"
  58 #include "iwl-helpers.h"
  59 #include "iwl-sta.h"
  60 #include "iwl-agn-calib.h"
  61 #include "iwl-agn.h"
  62 #include "iwl-agn-led.h"
  63
  64
  65 /******************************************************************************
  66  *
  67  * module boiler plate
  68  *
  69  ******************************************************************************/
  70
  71 /*
  72  * module name, copyright, version, etc.
  73  */
  74 #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link AGN driver for Linux"
  75
  76 #ifdef CONFIG_IWLWIFI_DEBUG
  77 #define VD "d"
  78 #else
  79 #define VD
  80 #endif
  81
  82 #define DRV_VERSION     IWLWIFI_VERSION VD
  83
  84
  85 MODULE_DESCRIPTION(DRV_DESCRIPTION);
  86 MODULE_VERSION(DRV_VERSION);
  87 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
  88 MODULE_LICENSE("GPL");
  89
  90 static int iwlagn_ant_coupling;
  91 static bool iwlagn_bt_ch_announce = 1;
  92
  93 void iwl_update_chain_flags(struct iwl_priv *priv)
  94 {
  95         struct iwl_rxon_context *ctx;
  96
  97         if (priv->cfg->ops->hcmd->set_rxon_chain) {
  98                 for_each_context(priv, ctx) {
  99                         priv->cfg->ops->hcmd->set_rxon_chain(priv, ctx);
 100                         if (ctx->active.rx_chain != ctx->staging.rx_chain)
 101                                 iwlcore_commit_rxon(priv, ctx);
 102                 }
 103         }
 104 }
 105
 106 static void iwl_clear_free_frames(struct iwl_priv *priv)
 107 {
 108         struct list_head *element;
 109
 110         IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
 111                        priv->frames_count);
 112
 113         while (!list_empty(&priv->free_frames)) {
 114                 element = priv->free_frames.next;
 115                 list_del(element);
 116                 kfree(list_entry(element, struct iwl_frame, list));
 117                 priv->frames_count--;
 118         }
 119
 120         if (priv->frames_count) {
 121                 IWL_WARN(priv, "%d frames still in use.  Did we lose one?\n",
 122                             priv->frames_count);
 123                 priv->frames_count = 0;
 124         }
 125 }
 126
 127 static struct iwl_frame *iwl_get_free_frame(struct iwl_priv *priv)
 128 {
 129         struct iwl_frame *frame;
 130         struct list_head *element;
 131         if (list_empty(&priv->free_frames)) {
 132                 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
 133                 if (!frame) {
 134                         IWL_ERR(priv, "Could not allocate frame!\n");
 135                         return NULL;
 136                 }
 137
 138                 priv->frames_count++;
 139                 return frame;
 140         }
 141
 142         element = priv->free_frames.next;
 143         list_del(element);
 144         return list_entry(element, struct iwl_frame, list);
 145 }
 146
 147 static void iwl_free_frame(struct iwl_priv *priv, struct iwl_frame *frame)
 148 {
 149         memset(frame, 0, sizeof(*frame));
 150         list_add(&frame->list, &priv->free_frames);
 151 }
 152
 153 static u32 iwl_fill_beacon_frame(struct iwl_priv *priv,
 154                                  struct ieee80211_hdr *hdr,
 155                                  int left)
 156 {
 157         lockdep_assert_held(&priv->mutex);
 158
 159         if (!priv->beacon_skb)
 160                 return 0;
 161
 162         if (priv->beacon_skb->len > left)
 163                 return 0;
 164
 165         memcpy(hdr, priv->beacon_skb->data, priv->beacon_skb->len);
 166
 167         return priv->beacon_skb->len;
 168 }
 169
 170 /* Parse the beacon frame to find the TIM element and set tim_idx & tim_size */
 171 static void iwl_set_beacon_tim(struct iwl_priv *priv,
 172                                struct iwl_tx_beacon_cmd *tx_beacon_cmd,
 173                                u8 *beacon, u32 frame_size)
 174 {
 175         u16 tim_idx;
 176         struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)beacon;
 177
 178         /*
 179          * The index is relative to frame start but we start looking at the
 180          * variable-length part of the beacon.
 181          */
 182         tim_idx = mgmt->u.beacon.variable - beacon;
 183
 184         /* Parse variable-length elements of beacon to find WLAN_EID_TIM */
 185         while ((tim_idx < (frame_size - 2)) &&
 186                         (beacon[tim_idx] != WLAN_EID_TIM))
 187                 tim_idx += beacon[tim_idx+1] + 2;
 188
 189         /* If TIM field was found, set variables */
 190         if ((tim_idx < (frame_size - 1)) && (beacon[tim_idx] == WLAN_EID_TIM)) {
 191                 tx_beacon_cmd->tim_idx = cpu_to_le16(tim_idx);
 192                 tx_beacon_cmd->tim_size = beacon[tim_idx+1];
 193         } else
 194                 IWL_WARN(priv, "Unable to find TIM Element in beacon\n");
 195 }
 196
 197 static unsigned int iwl_hw_get_beacon_cmd(struct iwl_priv *priv,
 198                                        struct iwl_frame *frame)
 199 {
 200         struct iwl_tx_beacon_cmd *tx_beacon_cmd;
 201         u32 frame_size;
 202         u32 rate_flags;
 203         u32 rate;
 204         /*
 205          * We have to set up the TX command, the TX Beacon command, and the
 206          * beacon contents.
 207          */
 208
 209         lockdep_assert_held(&priv->mutex);
 210
 211         if (!priv->beacon_ctx) {
 212                 IWL_ERR(priv, "trying to build beacon w/o beacon context!\n");
 213                 return 0;
 214         }
 215
 216         /* Initialize memory */
 217         tx_beacon_cmd = &frame->u.beacon;
 218         memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
 219
 220         /* Set up TX beacon contents */
 221         frame_size = iwl_fill_beacon_frame(priv, tx_beacon_cmd->frame,
 222                                 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
 223         if (WARN_ON_ONCE(frame_size > MAX_MPDU_SIZE))
 224                 return 0;
 225         if (!frame_size)
 226                 return 0;
 227
 228         /* Set up TX command fields */
 229         tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
 230         tx_beacon_cmd->tx.sta_id = priv->beacon_ctx->bcast_sta_id;
 231         tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
 232         tx_beacon_cmd->tx.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK |
 233                 TX_CMD_FLG_TSF_MSK | TX_CMD_FLG_STA_RATE_MSK;
 234
 235         /* Set up TX beacon command fields */
 236         iwl_set_beacon_tim(priv, tx_beacon_cmd, (u8 *)tx_beacon_cmd->frame,
 237                            frame_size);
 238
 239         /* Set up packet rate and flags */
 240         rate = iwl_rate_get_lowest_plcp(priv, priv->beacon_ctx);
 241         priv->mgmt_tx_ant = iwl_toggle_tx_ant(priv, priv->mgmt_tx_ant,
 242                                               priv->hw_params.valid_tx_ant);
 243         rate_flags = iwl_ant_idx_to_flags(priv->mgmt_tx_ant);
 244         if ((rate >= IWL_FIRST_CCK_RATE) && (rate <= IWL_LAST_CCK_RATE))
 245                 rate_flags |= RATE_MCS_CCK_MSK;
 246         tx_beacon_cmd->tx.rate_n_flags = iwl_hw_set_rate_n_flags(rate,
 247                         rate_flags);
 248
 249         return sizeof(*tx_beacon_cmd) + frame_size;
 250 }
 251
 252 int iwlagn_send_beacon_cmd(struct iwl_priv *priv)
 253 {
 254         struct iwl_frame *frame;
 255         unsigned int frame_size;
 256         int rc;
 257
 258         frame = iwl_get_free_frame(priv);
 259         if (!frame) {
 260                 IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
 261                           "command.\n");
 262                 return -ENOMEM;
 263         }
 264
 265         frame_size = iwl_hw_get_beacon_cmd(priv, frame);
 266         if (!frame_size) {
 267                 IWL_ERR(priv, "Error configuring the beacon command\n");
 268                 iwl_free_frame(priv, frame);
 269                 return -EINVAL;
 270         }
 271
 272         rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
 273                               &frame->u.cmd[0]);
 274
 275         iwl_free_frame(priv, frame);
 276
 277         return rc;
 278 }
 279
 280 static inline dma_addr_t iwl_tfd_tb_get_addr(struct iwl_tfd *tfd, u8 idx)
 281 {
 282         struct iwl_tfd_tb *tb = &tfd->tbs[idx];
 283
 284         dma_addr_t addr = get_unaligned_le32(&tb->lo);
 285         if (sizeof(dma_addr_t) > sizeof(u32))
 286                 addr |=
 287                 ((dma_addr_t)(le16_to_cpu(tb->hi_n_len) & 0xF) << 16) << 16;
 288
 289         return addr;
 290 }
 291
 292 static inline u16 iwl_tfd_tb_get_len(struct iwl_tfd *tfd, u8 idx)
 293 {
 294         struct iwl_tfd_tb *tb = &tfd->tbs[idx];
 295
 296         return le16_to_cpu(tb->hi_n_len) >> 4;
 297 }
 298
 299 static inline void iwl_tfd_set_tb(struct iwl_tfd *tfd, u8 idx,
 300                                   dma_addr_t addr, u16 len)
 301 {
 302         struct iwl_tfd_tb *tb = &tfd->tbs[idx];
 303         u16 hi_n_len = len << 4;
 304
 305         put_unaligned_le32(addr, &tb->lo);
 306         if (sizeof(dma_addr_t) > sizeof(u32))
 307                 hi_n_len |= ((addr >> 16) >> 16) & 0xF;
 308
 309         tb->hi_n_len = cpu_to_le16(hi_n_len);
 310
 311         tfd->num_tbs = idx + 1;
 312 }
 313
 314 static inline u8 iwl_tfd_get_num_tbs(struct iwl_tfd *tfd)
 315 {
 316         return tfd->num_tbs & 0x1f;
 317 }
 318
 319 /**
 320  * iwl_hw_txq_free_tfd - Free all chunks referenced by TFD [txq->q.read_ptr]
 321  * @priv - driver private data
 322  * @txq - tx queue
 323  *
 324  * Does NOT advance any TFD circular buffer read/write indexes
 325  * Does NOT free the TFD itself (which is within circular buffer)
 326  */
 327 void iwl_hw_txq_free_tfd(struct iwl_priv *priv, struct iwl_tx_queue *txq)
 328 {
 329         struct iwl_tfd *tfd_tmp = (struct iwl_tfd *)txq->tfds;
 330         struct iwl_tfd *tfd;
 331         struct pci_dev *dev = priv->pci_dev;
 332         int index = txq->q.read_ptr;
 333         int i;
 334         int num_tbs;
 335
 336         tfd = &tfd_tmp[index];
 337
 338         /* Sanity check on number of chunks */
 339         num_tbs = iwl_tfd_get_num_tbs(tfd);
 340
 341         if (num_tbs >= IWL_NUM_OF_TBS) {
 342                 IWL_ERR(priv, "Too many chunks: %i\n", num_tbs);
 343                 /* @todo issue fatal error, it is quite serious situation */
 344                 return;
 345         }
 346
 347         /* Unmap tx_cmd */
 348         if (num_tbs)
 349                 pci_unmap_single(dev,
 350                                 dma_unmap_addr(&txq->meta[index], mapping),
 351                                 dma_unmap_len(&txq->meta[index], len),
 352                                 PCI_DMA_BIDIRECTIONAL);
 353
 354         /* Unmap chunks, if any. */
 355         for (i = 1; i < num_tbs; i++)
 356                 pci_unmap_single(dev, iwl_tfd_tb_get_addr(tfd, i),
 357                                 iwl_tfd_tb_get_len(tfd, i), PCI_DMA_TODEVICE);
 358
 359         /* free SKB */
 360         if (txq->txb) {
 361                 struct sk_buff *skb;
 362
 363                 skb = txq->txb[txq->q.read_ptr].skb;
 364
 365                 /* can be called from irqs-disabled context */
 366                 if (skb) {
 367                         dev_kfree_skb_any(skb);
 368                         txq->txb[txq->q.read_ptr].skb = NULL;
 369                 }
 370         }
 371 }
 372
 373 int iwl_hw_txq_attach_buf_to_tfd(struct iwl_priv *priv,
 374                                  struct iwl_tx_queue *txq,
 375                                  dma_addr_t addr, u16 len,
 376                                  u8 reset, u8 pad)
 377 {
 378         struct iwl_queue *q;
 379         struct iwl_tfd *tfd, *tfd_tmp;
 380         u32 num_tbs;
 381
 382         q = &txq->q;
 383         tfd_tmp = (struct iwl_tfd *)txq->tfds;
 384         tfd = &tfd_tmp[q->write_ptr];
 385
 386         if (reset)
 387                 memset(tfd, 0, sizeof(*tfd));
 388
 389         num_tbs = iwl_tfd_get_num_tbs(tfd);
 390
 391         /* Each TFD can point to a maximum 20 Tx buffers */
 392         if (num_tbs >= IWL_NUM_OF_TBS) {
 393                 IWL_ERR(priv, "Error can not send more than %d chunks\n",
 394                           IWL_NUM_OF_TBS);
 395                 return -EINVAL;
 396         }
 397
 398         BUG_ON(addr & ~DMA_BIT_MASK(36));
 399         if (unlikely(addr & ~IWL_TX_DMA_MASK))
 400                 IWL_ERR(priv, "Unaligned address = %llx\n",
 401                           (unsigned long long)addr);
 402
 403         iwl_tfd_set_tb(tfd, num_tbs, addr, len);
 404
 405         return 0;
 406 }
 407
 408 /*
 409  * Tell nic where to find circular buffer of Tx Frame Descriptors for
 410  * given Tx queue, and enable the DMA channel used for that queue.
 411  *
 412  * supports up to 16 Tx queues in DRAM, mapped to up to 8 Tx DMA
 413  * channels supported in hardware.
 414  */
 415 int iwl_hw_tx_queue_init(struct iwl_priv *priv,
 416                          struct iwl_tx_queue *txq)
 417 {
 418         int txq_id = txq->q.id;
 419
 420         /* Circular buffer (TFD queue in DRAM) physical base address */
 421         iwl_write_direct32(priv, FH_MEM_CBBC_QUEUE(txq_id),
 422                              txq->q.dma_addr >> 8);
 423
 424         return 0;
 425 }
 426
 427 static void iwl_bg_beacon_update(struct work_struct *work)
 428 {
 429         struct iwl_priv *priv =
 430                 container_of(work, struct iwl_priv, beacon_update);
 431         struct sk_buff *beacon;
 432
 433         mutex_lock(&priv->mutex);
 434         if (!priv->beacon_ctx) {
 435                 IWL_ERR(priv, "updating beacon w/o beacon context!\n");
 436                 goto out;
 437         }
 438
 439         if (priv->beacon_ctx->vif->type != NL80211_IFTYPE_AP) {
 440                 /*
 441                  * The ucode will send beacon notifications even in
 442                  * IBSS mode, but we don't want to process them. But
 443                  * we need to defer the type check to here due to
 444                  * requiring locking around the beacon_ctx access.
 445                  */
 446                 goto out;
 447         }
 448
 449         /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
 450         beacon = ieee80211_beacon_get(priv->hw, priv->beacon_ctx->vif);
 451         if (!beacon) {
 452                 IWL_ERR(priv, "update beacon failed -- keeping old\n");
 453                 goto out;
 454         }
 455
 456         /* new beacon skb is allocated every time; dispose previous.*/
 457         dev_kfree_skb(priv->beacon_skb);
 458
 459         priv->beacon_skb = beacon;
 460
 461         iwlagn_send_beacon_cmd(priv);
 462  out:
 463         mutex_unlock(&priv->mutex);
 464 }
 465
 466 static void iwl_bg_bt_runtime_config(struct work_struct *work)
 467 {
 468         struct iwl_priv *priv =
 469                 container_of(work, struct iwl_priv, bt_runtime_config);
 470
 471         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
 472                 return;
 473
 474         /* dont send host command if rf-kill is on */
 475         if (!iwl_is_ready_rf(priv))
 476                 return;
 477         priv->cfg->ops->hcmd->send_bt_config(priv);
 478 }
 479
 480 static void iwl_bg_bt_full_concurrency(struct work_struct *work)
 481 {
 482         struct iwl_priv *priv =
 483                 container_of(work, struct iwl_priv, bt_full_concurrency);
 484         struct iwl_rxon_context *ctx;
 485
 486         mutex_lock(&priv->mutex);
 487
 488         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
 489                 goto out;
 490
 491         /* dont send host command if rf-kill is on */
 492         if (!iwl_is_ready_rf(priv))
 493                 goto out;
 494
 495         IWL_DEBUG_INFO(priv, "BT coex in %s mode\n",
 496                        priv->bt_full_concurrent ?
 497                        "full concurrency" : "3-wire");
 498
 499         /*
 500          * LQ & RXON updated cmds must be sent before BT Config cmd
 501          * to avoid 3-wire collisions
 502          */
 503         for_each_context(priv, ctx) {
 504                 if (priv->cfg->ops->hcmd->set_rxon_chain)
 505                         priv->cfg->ops->hcmd->set_rxon_chain(priv, ctx);
 506                 iwlcore_commit_rxon(priv, ctx);
 507         }
 508
 509         priv->cfg->ops->hcmd->send_bt_config(priv);
 510 out:
 511         mutex_unlock(&priv->mutex);
 512 }
 513
 514 /**
 515  * iwl_bg_statistics_periodic - Timer callback to queue statistics
 516  *
 517  * This callback is provided in order to send a statistics request.
 518  *
 519  * This timer function is continually reset to execute within
 520  * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION
 521  * was received.  We need to ensure we receive the statistics in order
 522  * to update the temperature used for calibrating the TXPOWER.
 523  */
 524 static void iwl_bg_statistics_periodic(unsigned long data)
 525 {
 526         struct iwl_priv *priv = (struct iwl_priv *)data;
 527
 528         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
 529                 return;
 530
 531         /* dont send host command if rf-kill is on */
 532         if (!iwl_is_ready_rf(priv))
 533                 return;
 534
 535         iwl_send_statistics_request(priv, CMD_ASYNC, false);
 536 }
 537
 538
 539 static void iwl_print_cont_event_trace(struct iwl_priv *priv, u32 base,
 540                                         u32 start_idx, u32 num_events,
 541                                         u32 mode)
 542 {
 543         u32 i;
 544         u32 ptr;        /* SRAM byte address of log data */
 545         u32 ev, time, data; /* event log data */
 546         unsigned long reg_flags;
 547
 548         if (mode == 0)
 549                 ptr = base + (4 * sizeof(u32)) + (start_idx * 2 * sizeof(u32));
 550         else
 551                 ptr = base + (4 * sizeof(u32)) + (start_idx * 3 * sizeof(u32));
 552
 553         /* Make sure device is powered up for SRAM reads */
 554         spin_lock_irqsave(&priv->reg_lock, reg_flags);
 555         if (iwl_grab_nic_access(priv)) {
 556                 spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
 557                 return;
 558         }
 559
 560         /* Set starting address; reads will auto-increment */
 561         _iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, ptr);
 562         rmb();
 563
 564         /*
 565          * "time" is actually "data" for mode 0 (no timestamp).
 566          * place event id # at far right for easier visual parsing.
 567          */
 568         for (i = 0; i < num_events; i++) {
 569                 ev = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
 570                 time = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
 571                 if (mode == 0) {
 572                         trace_iwlwifi_dev_ucode_cont_event(priv,
 573                                                         0, time, ev);
 574                 } else {
 575                         data = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
 576                         trace_iwlwifi_dev_ucode_cont_event(priv,
 577                                                 time, data, ev);
 578                 }
 579         }
 580         /* Allow device to power down */
 581         iwl_release_nic_access(priv);
 582         spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
 583 }
 584
 585 static void iwl_continuous_event_trace(struct iwl_priv *priv)
 586 {
 587         u32 capacity;   /* event log capacity in # entries */
 588         u32 base;       /* SRAM byte address of event log header */
 589         u32 mode;       /* 0 - no timestamp, 1 - timestamp recorded */
 590         u32 num_wraps;  /* # times uCode wrapped to top of log */
 591         u32 next_entry; /* index of next entry to be written by uCode */
 592
 593         base = priv->device_pointers.error_event_table;
 594         if (priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
 595                 capacity = iwl_read_targ_mem(priv, base);
 596                 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
 597                 mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
 598                 next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
 599         } else
 600                 return;
 601
 602         if (num_wraps == priv->event_log.num_wraps) {
 603                 iwl_print_cont_event_trace(priv,
 604                                        base, priv->event_log.next_entry,
 605                                        next_entry - priv->event_log.next_entry,
 606                                        mode);
 607                 priv->event_log.non_wraps_count++;
 608         } else {
 609                 if ((num_wraps - priv->event_log.num_wraps) > 1)
 610                         priv->event_log.wraps_more_count++;
 611                 else
 612                         priv->event_log.wraps_once_count++;
 613                 trace_iwlwifi_dev_ucode_wrap_event(priv,
 614                                 num_wraps - priv->event_log.num_wraps,
 615                                 next_entry, priv->event_log.next_entry);
 616                 if (next_entry < priv->event_log.next_entry) {
 617                         iwl_print_cont_event_trace(priv, base,
 618                                priv->event_log.next_entry,
 619                                capacity - priv->event_log.next_entry,
 620                                mode);
 621
 622                         iwl_print_cont_event_trace(priv, base, 0,
 623                                 next_entry, mode);
 624                 } else {
 625                         iwl_print_cont_event_trace(priv, base,
 626                                next_entry, capacity - next_entry,
 627                                mode);
 628
 629                         iwl_print_cont_event_trace(priv, base, 0,
 630                                 next_entry, mode);
 631                 }
 632         }
 633         priv->event_log.num_wraps = num_wraps;
 634         priv->event_log.next_entry = next_entry;
 635 }
 636
 637 /**
 638  * iwl_bg_ucode_trace - Timer callback to log ucode event
 639  *
 640  * The timer is continually set to execute every
 641  * UCODE_TRACE_PERIOD milliseconds after the last timer expired
 642  * this function is to perform continuous uCode event logging operation
 643  * if enabled
 644  */
 645 static void iwl_bg_ucode_trace(unsigned long data)
 646 {
 647         struct iwl_priv *priv = (struct iwl_priv *)data;
 648
 649         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
 650                 return;
 651
 652         if (priv->event_log.ucode_trace) {
 653                 iwl_continuous_event_trace(priv);
 654                 /* Reschedule the timer to occur in UCODE_TRACE_PERIOD */
 655                 mod_timer(&priv->ucode_trace,
 656                          jiffies + msecs_to_jiffies(UCODE_TRACE_PERIOD));
 657         }
 658 }
 659
 660 static void iwl_bg_tx_flush(struct work_struct *work)
 661 {
 662         struct iwl_priv *priv =
 663                 container_of(work, struct iwl_priv, tx_flush);
 664
 665         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
 666                 return;
 667
 668         /* do nothing if rf-kill is on */
 669         if (!iwl_is_ready_rf(priv))
 670                 return;
 671
 672         if (priv->cfg->ops->lib->txfifo_flush) {
 673                 IWL_DEBUG_INFO(priv, "device request: flush all tx frames\n");
 674                 iwlagn_dev_txfifo_flush(priv, IWL_DROP_ALL);
 675         }
 676 }
 677
 678 /**
 679  * iwl_rx_handle - Main entry function for receiving responses from uCode
 680  *
 681  * Uses the priv->rx_handlers callback function array to invoke
 682  * the appropriate handlers, including command responses,
 683  * frame-received notifications, and other notifications.
 684  */
 685 static void iwl_rx_handle(struct iwl_priv *priv)
 686 {
 687         struct iwl_rx_mem_buffer *rxb;
 688         struct iwl_rx_packet *pkt;
 689         struct iwl_rx_queue *rxq = &priv->rxq;
 690         u32 r, i;
 691         int reclaim;
 692         unsigned long flags;
 693         u8 fill_rx = 0;
 694         u32 count = 8;
 695         int total_empty;
 696
 697         /* uCode's read index (stored in shared DRAM) indicates the last Rx
 698          * buffer that the driver may process (last buffer filled by ucode). */
 699         r = le16_to_cpu(rxq->rb_stts->closed_rb_num) &  0x0FFF;
 700         i = rxq->read;
 701
 702         /* Rx interrupt, but nothing sent from uCode */
 703         if (i == r)
 704                 IWL_DEBUG_RX(priv, "r = %d, i = %d\n", r, i);
 705
 706         /* calculate total frames need to be restock after handling RX */
 707         total_empty = r - rxq->write_actual;
 708         if (total_empty < 0)
 709                 total_empty += RX_QUEUE_SIZE;
 710
 711         if (total_empty > (RX_QUEUE_SIZE / 2))
 712                 fill_rx = 1;
 713
 714         while (i != r) {
 715                 int len;
 716
 717                 rxb = rxq->queue[i];
 718
 719                 /* If an RXB doesn't have a Rx queue slot associated with it,
 720                  * then a bug has been introduced in the queue refilling
 721                  * routines -- catch it here */
 722                 BUG_ON(rxb == NULL);
 723
 724                 rxq->queue[i] = NULL;
 725
 726                 pci_unmap_page(priv->pci_dev, rxb->page_dma,
 727                                PAGE_SIZE << priv->hw_params.rx_page_order,
 728                                PCI_DMA_FROMDEVICE);
 729                 pkt = rxb_addr(rxb);
 730
 731                 len = le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK;
 732                 len += sizeof(u32); /* account for status word */
 733                 trace_iwlwifi_dev_rx(priv, pkt, len);
 734
 735                 /* Reclaim a command buffer only if this packet is a response
 736                  *   to a (driver-originated) command.
 737                  * If the packet (e.g. Rx frame) originated from uCode,
 738                  *   there is no command buffer to reclaim.
 739                  * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
 740                  *   but apparently a few don't get set; catch them here. */
 741                 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
 742                         (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
 743                         (pkt->hdr.cmd != REPLY_RX) &&
 744                         (pkt->hdr.cmd != REPLY_RX_MPDU_CMD) &&
 745                         (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
 746                         (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
 747                         (pkt->hdr.cmd != REPLY_TX);
 748
 749                 /*
 750                  * Do the notification wait before RX handlers so
 751                  * even if the RX handler consumes the RXB we have
 752                  * access to it in the notification wait entry.
 753                  */
 754                 if (!list_empty(&priv->_agn.notif_waits)) {
 755                         struct iwl_notification_wait *w;
 756
 757                         spin_lock(&priv->_agn.notif_wait_lock);
 758                         list_for_each_entry(w, &priv->_agn.notif_waits, list) {
 759                                 if (w->cmd == pkt->hdr.cmd) {
 760                                         w->triggered = true;
 761                                         if (w->fn)
 762                                                 w->fn(priv, pkt);
 763                                 }
 764                         }
 765                         spin_unlock(&priv->_agn.notif_wait_lock);
 766
 767                         wake_up_all(&priv->_agn.notif_waitq);
 768                 }
 769
 770                 /* Based on type of command response or notification,
 771                  *   handle those that need handling via function in
 772                  *   rx_handlers table.  See iwl_setup_rx_handlers() */
 773                 if (priv->rx_handlers[pkt->hdr.cmd]) {
 774                         IWL_DEBUG_RX(priv, "r = %d, i = %d, %s, 0x%02x\n", r,
 775                                 i, get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
 776                         priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
 777                         priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
 778                 } else {
 779                         /* No handling needed */
 780                         IWL_DEBUG_RX(priv,
 781                                 "r %d i %d No handler needed for %s, 0x%02x\n",
 782                                 r, i, get_cmd_string(pkt->hdr.cmd),
 783                                 pkt->hdr.cmd);
 784                 }
 785
 786                 /*
 787                  * XXX: After here, we should always check rxb->page
 788                  * against NULL before touching it or its virtual
 789                  * memory (pkt). Because some rx_handler might have
 790                  * already taken or freed the pages.
 791                  */
 792
 793                 if (reclaim) {
 794                         /* Invoke any callbacks, transfer the buffer to caller,
 795                          * and fire off the (possibly) blocking iwl_send_cmd()
 796                          * as we reclaim the driver command queue */
 797                         if (rxb->page)
 798                                 iwl_tx_cmd_complete(priv, rxb);
 799                         else
 800                                 IWL_WARN(priv, "Claim null rxb?\n");
 801                 }
 802
 803                 /* Reuse the page if possible. For notification packets and
 804                  * SKBs that fail to Rx correctly, add them back into the
 805                  * rx_free list for reuse later. */
 806                 spin_lock_irqsave(&rxq->lock, flags);
 807                 if (rxb->page != NULL) {
 808                         rxb->page_dma = pci_map_page(priv->pci_dev, rxb->page,
 809                                 0, PAGE_SIZE << priv->hw_params.rx_page_order,
 810                                 PCI_DMA_FROMDEVICE);
 811                         list_add_tail(&rxb->list, &rxq->rx_free);
 812                         rxq->free_count++;
 813                 } else
 814                         list_add_tail(&rxb->list, &rxq->rx_used);
 815
 816                 spin_unlock_irqrestore(&rxq->lock, flags);
 817
 818                 i = (i + 1) & RX_QUEUE_MASK;
 819                 /* If there are a lot of unused frames,
 820                  * restock the Rx queue so ucode wont assert. */
 821                 if (fill_rx) {
 822                         count++;
 823                         if (count >= 8) {
 824                                 rxq->read = i;
 825                                 iwlagn_rx_replenish_now(priv);
 826                                 count = 0;
 827                         }
 828                 }
 829         }
 830
 831         /* Backtrack one entry */
 832         rxq->read = i;
 833         if (fill_rx)
 834                 iwlagn_rx_replenish_now(priv);
 835         else
 836                 iwlagn_rx_queue_restock(priv);
 837 }
 838
 839 /* call this function to flush any scheduled tasklet */
 840 static inline void iwl_synchronize_irq(struct iwl_priv *priv)
 841 {
 842         /* wait to make sure we flush pending tasklet*/
 843         synchronize_irq(priv->pci_dev->irq);
 844         tasklet_kill(&priv->irq_tasklet);
 845 }
 846
 847 /* tasklet for iwlagn interrupt */
 848 static void iwl_irq_tasklet(struct iwl_priv *priv)
 849 {
 850         u32 inta = 0;
 851         u32 handled = 0;
 852         unsigned long flags;
 853         u32 i;
 854 #ifdef CONFIG_IWLWIFI_DEBUG
 855         u32 inta_mask;
 856 #endif
 857
 858         spin_lock_irqsave(&priv->lock, flags);
 859
 860         /* Ack/clear/reset pending uCode interrupts.
 861          * Note:  Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
 862          */
 863         /* There is a hardware bug in the interrupt mask function that some
 864          * interrupts (i.e. CSR_INT_BIT_SCD) can still be generated even if
 865          * they are disabled in the CSR_INT_MASK register. Furthermore the
 866          * ICT interrupt handling mechanism has another bug that might cause
 867          * these unmasked interrupts fail to be detected. We workaround the
 868          * hardware bugs here by ACKing all the possible interrupts so that
 869          * interrupt coalescing can still be achieved.
 870          */
 871         iwl_write32(priv, CSR_INT, priv->_agn.inta | ~priv->inta_mask);
 872
 873         inta = priv->_agn.inta;
 874
 875 #ifdef CONFIG_IWLWIFI_DEBUG
 876         if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
 877                 /* just for debug */
 878                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
 879                 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x\n ",
 880                                 inta, inta_mask);
 881         }
 882 #endif
 883
 884         spin_unlock_irqrestore(&priv->lock, flags);
 885
 886         /* saved interrupt in inta variable now we can reset priv->_agn.inta */
 887         priv->_agn.inta = 0;
 888
 889         /* Now service all interrupt bits discovered above. */
 890         if (inta & CSR_INT_BIT_HW_ERR) {
 891                 IWL_ERR(priv, "Hardware error detected.  Restarting.\n");
 892
 893                 /* Tell the device to stop sending interrupts */
 894                 iwl_disable_interrupts(priv);
 895
 896                 priv->isr_stats.hw++;
 897                 iwl_irq_handle_error(priv);
 898
 899                 handled |= CSR_INT_BIT_HW_ERR;
 900
 901                 return;
 902         }
 903
 904 #ifdef CONFIG_IWLWIFI_DEBUG
 905         if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
 906                 /* NIC fires this, but we don't use it, redundant with WAKEUP */
 907                 if (inta & CSR_INT_BIT_SCD) {
 908                         IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
 909                                       "the frame/frames.\n");
 910                         priv->isr_stats.sch++;
 911                 }
 912
 913                 /* Alive notification via Rx interrupt will do the real work */
 914                 if (inta & CSR_INT_BIT_ALIVE) {
 915                         IWL_DEBUG_ISR(priv, "Alive interrupt\n");
 916                         priv->isr_stats.alive++;
 917                 }
 918         }
 919 #endif
 920         /* Safely ignore these bits for debug checks below */
 921         inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
 922
 923         /* HW RF KILL switch toggled */
 924         if (inta & CSR_INT_BIT_RF_KILL) {
 925                 int hw_rf_kill = 0;
 926                 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
 927                                 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
 928                         hw_rf_kill = 1;
 929
 930                 IWL_WARN(priv, "RF_KILL bit toggled to %s.\n",
 931                                 hw_rf_kill ? "disable radio" : "enable radio");
 932
 933                 priv->isr_stats.rfkill++;
 934
 935                 /* driver only loads ucode once setting the interface up.
 936                  * the driver allows loading the ucode even if the radio
 937                  * is killed. Hence update the killswitch state here. The
 938                  * rfkill handler will care about restarting if needed.
 939                  */
 940                 if (!test_bit(STATUS_ALIVE, &priv->status)) {
 941                         if (hw_rf_kill)
 942                                 set_bit(STATUS_RF_KILL_HW, &priv->status);
 943                         else
 944                                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
 945                         wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
 946                 }
 947
 948                 handled |= CSR_INT_BIT_RF_KILL;
 949         }
 950
 951         /* Chip got too hot and stopped itself */
 952         if (inta & CSR_INT_BIT_CT_KILL) {
 953                 IWL_ERR(priv, "Microcode CT kill error detected.\n");
 954                 priv->isr_stats.ctkill++;
 955                 handled |= CSR_INT_BIT_CT_KILL;
 956         }
 957
 958         /* Error detected by uCode */
 959         if (inta & CSR_INT_BIT_SW_ERR) {
 960                 IWL_ERR(priv, "Microcode SW error detected. "
 961                         " Restarting 0x%X.\n", inta);
 962                 priv->isr_stats.sw++;
 963                 iwl_irq_handle_error(priv);
 964                 handled |= CSR_INT_BIT_SW_ERR;
 965         }
 966
 967         /* uCode wakes up after power-down sleep */
 968         if (inta & CSR_INT_BIT_WAKEUP) {
 969                 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
 970                 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
 971                 for (i = 0; i < priv->hw_params.max_txq_num; i++)
 972                         iwl_txq_update_write_ptr(priv, &priv->txq[i]);
 973
 974                 priv->isr_stats.wakeup++;
 975
 976                 handled |= CSR_INT_BIT_WAKEUP;
 977         }
 978
 979         /* All uCode command responses, including Tx command responses,
 980          * Rx "responses" (frame-received notification), and other
 981          * notifications from uCode come through here*/
 982         if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX |
 983                         CSR_INT_BIT_RX_PERIODIC)) {
 984                 IWL_DEBUG_ISR(priv, "Rx interrupt\n");
 985                 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
 986                         handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
 987                         iwl_write32(priv, CSR_FH_INT_STATUS,
 988                                         CSR_FH_INT_RX_MASK);
 989                 }
 990                 if (inta & CSR_INT_BIT_RX_PERIODIC) {
 991                         handled |= CSR_INT_BIT_RX_PERIODIC;
 992                         iwl_write32(priv, CSR_INT, CSR_INT_BIT_RX_PERIODIC);
 993                 }
 994                 /* Sending RX interrupt require many steps to be done in the
 995                  * the device:
 996                  * 1- write interrupt to current index in ICT table.
 997                  * 2- dma RX frame.
 998                  * 3- update RX shared data to indicate last write index.
 999                  * 4- send interrupt.
1000                  * This could lead to RX race, driver could receive RX interrupt
1001                  * but the shared data changes does not reflect this;
1002                  * periodic interrupt will detect any dangling Rx activity.
1003                  */
1004
1005                 /* Disable periodic interrupt; we use it as just a one-shot. */
1006                 iwl_write8(priv, CSR_INT_PERIODIC_REG,
1007                             CSR_INT_PERIODIC_DIS);
1008                 iwl_rx_handle(priv);
1009
1010                 /*
1011                  * Enable periodic interrupt in 8 msec only if we received
1012                  * real RX interrupt (instead of just periodic int), to catch
1013                  * any dangling Rx interrupt.  If it was just the periodic
1014                  * interrupt, there was no dangling Rx activity, and no need
1015                  * to extend the periodic interrupt; one-shot is enough.
1016                  */
1017                 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX))
1018                         iwl_write8(priv, CSR_INT_PERIODIC_REG,
1019                                     CSR_INT_PERIODIC_ENA);
1020
1021                 priv->isr_stats.rx++;
1022         }
1023
1024         /* This "Tx" DMA channel is used only for loading uCode */
1025         if (inta & CSR_INT_BIT_FH_TX) {
1026                 iwl_write32(priv, CSR_FH_INT_STATUS, CSR_FH_INT_TX_MASK);
1027                 IWL_DEBUG_ISR(priv, "uCode load interrupt\n");
1028                 priv->isr_stats.tx++;
1029                 handled |= CSR_INT_BIT_FH_TX;
1030                 /* Wake up uCode load routine, now that load is complete */
1031                 priv->ucode_write_complete = 1;
1032                 wake_up_interruptible(&priv->wait_command_queue);
1033         }
1034
1035         if (inta & ~handled) {
1036                 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1037                 priv->isr_stats.unhandled++;
1038         }
1039
1040         if (inta & ~(priv->inta_mask)) {
1041                 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1042                          inta & ~priv->inta_mask);
1043         }
1044
1045         /* Re-enable all interrupts */
1046         /* only Re-enable if disabled by irq */
1047         if (test_bit(STATUS_INT_ENABLED, &priv->status))
1048                 iwl_enable_interrupts(priv);
1049         /* Re-enable RF_KILL if it occurred */
1050         else if (handled & CSR_INT_BIT_RF_KILL)
1051                 iwl_enable_rfkill_int(priv);
1052 }
1053
1054 /*****************************************************************************
1055  *
1056  * sysfs attributes
1057  *
1058  *****************************************************************************/
1059
1060 #ifdef CONFIG_IWLWIFI_DEBUG
1061
1062 /*
1063  * The following adds a new attribute to the sysfs representation
1064  * of this device driver (i.e. a new file in /sys/class/net/wlan0/device/)
1065  * used for controlling the debug level.
1066  *
1067  * See the level definitions in iwl for details.
1068  *
1069  * The debug_level being managed using sysfs below is a per device debug
1070  * level that is used instead of the global debug level if it (the per
1071  * device debug level) is set.
1072  */
1073 static ssize_t show_debug_level(struct device *d,
1074                                 struct device_attribute *attr, char *buf)
1075 {
1076         struct iwl_priv *priv = dev_get_drvdata(d);
1077         return sprintf(buf, "0x%08X\n", iwl_get_debug_level(priv));
1078 }
1079 static ssize_t store_debug_level(struct device *d,
1080                                 struct device_attribute *attr,
1081                                  const char *buf, size_t count)
1082 {
1083         struct iwl_priv *priv = dev_get_drvdata(d);
1084         unsigned long val;
1085         int ret;
1086
1087         ret = strict_strtoul(buf, 0, &val);
1088         if (ret)
1089                 IWL_ERR(priv, "%s is not in hex or decimal form.\n", buf);
1090         else {
1091                 priv->debug_level = val;
1092                 if (iwl_alloc_traffic_mem(priv))
1093                         IWL_ERR(priv,
1094                                 "Not enough memory to generate traffic log\n");
1095         }
1096         return strnlen(buf, count);
1097 }
1098
1099 static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
1100                         show_debug_level, store_debug_level);
1101
1102
1103 #endif /* CONFIG_IWLWIFI_DEBUG */
1104
1105
1106 static ssize_t show_temperature(struct device *d,
1107                                 struct device_attribute *attr, char *buf)
1108 {
1109         struct iwl_priv *priv = dev_get_drvdata(d);
1110
1111         if (!iwl_is_alive(priv))
1112                 return -EAGAIN;
1113
1114         return sprintf(buf, "%d\n", priv->temperature);
1115 }
1116
1117 static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
1118
1119 static ssize_t show_tx_power(struct device *d,
1120                              struct device_attribute *attr, char *buf)
1121 {
1122         struct iwl_priv *priv = dev_get_drvdata(d);
1123
1124         if (!iwl_is_ready_rf(priv))
1125                 return sprintf(buf, "off\n");
1126         else
1127                 return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
1128 }
1129
1130 static ssize_t store_tx_power(struct device *d,
1131                               struct device_attribute *attr,
1132                               const char *buf, size_t count)
1133 {
1134         struct iwl_priv *priv = dev_get_drvdata(d);
1135         unsigned long val;
1136         int ret;
1137
1138         ret = strict_strtoul(buf, 10, &val);
1139         if (ret)
1140                 IWL_INFO(priv, "%s is not in decimal form.\n", buf);
1141         else {
1142                 ret = iwl_set_tx_power(priv, val, false);
1143                 if (ret)
1144                         IWL_ERR(priv, "failed setting tx power (0x%d).\n",
1145                                 ret);
1146                 else
1147                         ret = count;
1148         }
1149         return ret;
1150 }
1151
1152 static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
1153
1154 static struct attribute *iwl_sysfs_entries[] = {
1155         &dev_attr_temperature.attr,
1156         &dev_attr_tx_power.attr,
1157 #ifdef CONFIG_IWLWIFI_DEBUG
1158         &dev_attr_debug_level.attr,
1159 #endif
1160         NULL
1161 };
1162
1163 static struct attribute_group iwl_attribute_group = {
1164         .name = NULL,           /* put in device directory */
1165         .attrs = iwl_sysfs_entries,
1166 };
1167
1168 /******************************************************************************
1169  *
1170  * uCode download functions
1171  *
1172  ******************************************************************************/
1173
1174 static void iwl_dealloc_ucode_pci(struct iwl_priv *priv)
1175 {
1176         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
1177         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
1178         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
1179         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1180 }
1181
1182 static void iwl_nic_start(struct iwl_priv *priv)
1183 {
1184         /* Remove all resets to allow NIC to operate */
1185         iwl_write32(priv, CSR_RESET, 0);
1186 }
1187
1188 struct iwlagn_ucode_capabilities {
1189         u32 max_probe_length;
1190         u32 standard_phy_calibration_size;
1191         u32 flags;
1192 };
1193
1194 static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context);
1195 static int iwl_mac_setup_register(struct iwl_priv *priv,
1196                                   struct iwlagn_ucode_capabilities *capa);
1197
1198 #define UCODE_EXPERIMENTAL_INDEX        100
1199 #define UCODE_EXPERIMENTAL_TAG          "exp"
1200
1201 static int __must_check iwl_request_firmware(struct iwl_priv *priv, bool first)
1202 {
1203         const char *name_pre = priv->cfg->fw_name_pre;
1204         char tag[8];
1205
1206         if (first) {
1207 #ifdef CONFIG_IWLWIFI_DEBUG_EXPERIMENTAL_UCODE
1208                 priv->fw_index = UCODE_EXPERIMENTAL_INDEX;
1209                 strcpy(tag, UCODE_EXPERIMENTAL_TAG);
1210         } else if (priv->fw_index == UCODE_EXPERIMENTAL_INDEX) {
1211 #endif
1212                 priv->fw_index = priv->cfg->ucode_api_max;
1213                 sprintf(tag, "%d", priv->fw_index);
1214         } else {
1215                 priv->fw_index--;
1216                 sprintf(tag, "%d", priv->fw_index);
1217         }
1218
1219         if (priv->fw_index < priv->cfg->ucode_api_min) {
1220                 IWL_ERR(priv, "no suitable firmware found!\n");
1221                 return -ENOENT;
1222         }
1223
1224         sprintf(priv->firmware_name, "%s%s%s", name_pre, tag, ".ucode");
1225
1226         IWL_DEBUG_INFO(priv, "attempting to load firmware %s'%s'\n",
1227                        (priv->fw_index == UCODE_EXPERIMENTAL_INDEX)
1228                                 ? "EXPERIMENTAL " : "",
1229                        priv->firmware_name);
1230
1231         return request_firmware_nowait(THIS_MODULE, 1, priv->firmware_name,
1232                                        &priv->pci_dev->dev, GFP_KERNEL, priv,
1233                                        iwl_ucode_callback);
1234 }
1235
1236 struct iwlagn_firmware_pieces {
1237         const void *inst, *data, *init, *init_data;
1238         size_t inst_size, data_size, init_size, init_data_size;
1239
1240         u32 build;
1241
1242         u32 init_evtlog_ptr, init_evtlog_size, init_errlog_ptr;
1243         u32 inst_evtlog_ptr, inst_evtlog_size, inst_errlog_ptr;
1244 };
1245
1246 static int iwlagn_load_legacy_firmware(struct iwl_priv *priv,
1247                                        const struct firmware *ucode_raw,
1248                                        struct iwlagn_firmware_pieces *pieces)
1249 {
1250         struct iwl_ucode_header *ucode = (void *)ucode_raw->data;
1251         u32 api_ver, hdr_size;
1252         const u8 *src;
1253
1254         priv->ucode_ver = le32_to_cpu(ucode->ver);
1255         api_ver = IWL_UCODE_API(priv->ucode_ver);
1256
1257         switch (api_ver) {
1258         default:
1259                 hdr_size = 28;
1260                 if (ucode_raw->size < hdr_size) {
1261                         IWL_ERR(priv, "File size too small!\n");
1262                         return -EINVAL;
1263                 }
1264                 pieces->build = le32_to_cpu(ucode->u.v2.build);
1265                 pieces->inst_size = le32_to_cpu(ucode->u.v2.inst_size);
1266                 pieces->data_size = le32_to_cpu(ucode->u.v2.data_size);
1267                 pieces->init_size = le32_to_cpu(ucode->u.v2.init_size);
1268                 pieces->init_data_size = le32_to_cpu(ucode->u.v2.init_data_size);
1269                 src = ucode->u.v2.data;
1270                 break;
1271         case 0:
1272         case 1:
1273         case 2:
1274                 hdr_size = 24;
1275                 if (ucode_raw->size < hdr_size) {
1276                         IWL_ERR(priv, "File size too small!\n");
1277                         return -EINVAL;
1278                 }
1279                 pieces->build = 0;
1280                 pieces->inst_size = le32_to_cpu(ucode->u.v1.inst_size);
1281                 pieces->data_size = le32_to_cpu(ucode->u.v1.data_size);
1282                 pieces->init_size = le32_to_cpu(ucode->u.v1.init_size);
1283                 pieces->init_data_size = le32_to_cpu(ucode->u.v1.init_data_size);
1284                 src = ucode->u.v1.data;
1285                 break;
1286         }
1287
1288         /* Verify size of file vs. image size info in file's header */
1289         if (ucode_raw->size != hdr_size + pieces->inst_size +
1290                                 pieces->data_size + pieces->init_size +
1291                                 pieces->init_data_size) {
1292
1293                 IWL_ERR(priv,
1294                         "uCode file size %d does not match expected size\n",
1295                         (int)ucode_raw->size);
1296                 return -EINVAL;
1297         }
1298
1299         pieces->inst = src;
1300         src += pieces->inst_size;
1301         pieces->data = src;
1302         src += pieces->data_size;
1303         pieces->init = src;
1304         src += pieces->init_size;
1305         pieces->init_data = src;
1306         src += pieces->init_data_size;
1307
1308         return 0;
1309 }
1310
1311 static int iwlagn_wanted_ucode_alternative = 1;
1312
1313 static int iwlagn_load_firmware(struct iwl_priv *priv,
1314                                 const struct firmware *ucode_raw,
1315                                 struct iwlagn_firmware_pieces *pieces,
1316                                 struct iwlagn_ucode_capabilities *capa)
1317 {
1318         struct iwl_tlv_ucode_header *ucode = (void *)ucode_raw->data;
1319         struct iwl_ucode_tlv *tlv;
1320         size_t len = ucode_raw->size;
1321         const u8 *data;
1322         int wanted_alternative = iwlagn_wanted_ucode_alternative, tmp;
1323         u64 alternatives;
1324         u32 tlv_len;
1325         enum iwl_ucode_tlv_type tlv_type;
1326         const u8 *tlv_data;
1327
1328         if (len < sizeof(*ucode)) {
1329                 IWL_ERR(priv, "uCode has invalid length: %zd\n", len);
1330                 return -EINVAL;
1331         }
1332
1333         if (ucode->magic != cpu_to_le32(IWL_TLV_UCODE_MAGIC)) {
1334                 IWL_ERR(priv, "invalid uCode magic: 0X%x\n",
1335                         le32_to_cpu(ucode->magic));
1336                 return -EINVAL;
1337         }
1338
1339         /*
1340          * Check which alternatives are present, and "downgrade"
1341          * when the chosen alternative is not present, warning
1342          * the user when that happens. Some files may not have
1343          * any alternatives, so don't warn in that case.
1344          */
1345         alternatives = le64_to_cpu(ucode->alternatives);
1346         tmp = wanted_alternative;
1347         if (wanted_alternative > 63)
1348                 wanted_alternative = 63;
1349         while (wanted_alternative && !(alternatives & BIT(wanted_alternative)))
1350                 wanted_alternative--;
1351         if (wanted_alternative && wanted_alternative != tmp)
1352                 IWL_WARN(priv,
1353                          "uCode alternative %d not available, choosing %d\n",
1354                          tmp, wanted_alternative);
1355
1356         priv->ucode_ver = le32_to_cpu(ucode->ver);
1357         pieces->build = le32_to_cpu(ucode->build);
1358         data = ucode->data;
1359
1360         len -= sizeof(*ucode);
1361
1362         while (len >= sizeof(*tlv)) {
1363                 u16 tlv_alt;
1364
1365                 len -= sizeof(*tlv);
1366                 tlv = (void *)data;
1367
1368                 tlv_len = le32_to_cpu(tlv->length);
1369                 tlv_type = le16_to_cpu(tlv->type);
1370                 tlv_alt = le16_to_cpu(tlv->alternative);
1371                 tlv_data = tlv->data;
1372
1373                 if (len < tlv_len) {
1374                         IWL_ERR(priv, "invalid TLV len: %zd/%u\n",
1375                                 len, tlv_len);
1376                         return -EINVAL;
1377                 }
1378                 len -= ALIGN(tlv_len, 4);
1379                 data += sizeof(*tlv) + ALIGN(tlv_len, 4);
1380
1381                 /*
1382                  * Alternative 0 is always valid.
1383                  *
1384                  * Skip alternative TLVs that are not selected.
1385                  */
1386                 if (tlv_alt != 0 && tlv_alt != wanted_alternative)
1387                         continue;
1388
1389                 switch (tlv_type) {
1390                 case IWL_UCODE_TLV_INST:
1391                         pieces->inst = tlv_data;
1392                         pieces->inst_size = tlv_len;
1393                         break;
1394                 case IWL_UCODE_TLV_DATA:
1395                         pieces->data = tlv_data;
1396                         pieces->data_size = tlv_len;
1397                         break;
1398                 case IWL_UCODE_TLV_INIT:
1399                         pieces->init = tlv_data;
1400                         pieces->init_size = tlv_len;
1401                         break;
1402                 case IWL_UCODE_TLV_INIT_DATA:
1403                         pieces->init_data = tlv_data;
1404                         pieces->init_data_size = tlv_len;
1405                         break;
1406                 case IWL_UCODE_TLV_BOOT:
1407                         IWL_ERR(priv, "Found unexpected BOOT ucode\n");
1408                         break;
1409                 case IWL_UCODE_TLV_PROBE_MAX_LEN:
1410                         if (tlv_len != sizeof(u32))
1411                                 goto invalid_tlv_len;
1412                         capa->max_probe_length =
1413                                         le32_to_cpup((__le32 *)tlv_data);
1414                         break;
1415                 case IWL_UCODE_TLV_PAN:
1416                         if (tlv_len)
1417                                 goto invalid_tlv_len;
1418                         capa->flags |= IWL_UCODE_TLV_FLAGS_PAN;
1419                         break;
1420                 case IWL_UCODE_TLV_FLAGS:
1421                         /* must be at least one u32 */
1422                         if (tlv_len < sizeof(u32))
1423                                 goto invalid_tlv_len;
1424                         /* and a proper number of u32s */
1425                         if (tlv_len % sizeof(u32))
1426                                 goto invalid_tlv_len;
1427                         /*
1428                          * This driver only reads the first u32 as
1429                          * right now no more features are defined,
1430                          * if that changes then either the driver
1431                          * will not work with the new firmware, or
1432                          * it'll not take advantage of new features.
1433                          */
1434                         capa->flags = le32_to_cpup((__le32 *)tlv_data);
1435                         break;
1436                 case IWL_UCODE_TLV_INIT_EVTLOG_PTR:
1437                         if (tlv_len != sizeof(u32))
1438                                 goto invalid_tlv_len;
1439                         pieces->init_evtlog_ptr =
1440                                         le32_to_cpup((__le32 *)tlv_data);
1441                         break;
1442                 case IWL_UCODE_TLV_INIT_EVTLOG_SIZE:
1443                         if (tlv_len != sizeof(u32))
1444                                 goto invalid_tlv_len;
1445                         pieces->init_evtlog_size =
1446                                         le32_to_cpup((__le32 *)tlv_data);
1447                         break;
1448                 case IWL_UCODE_TLV_INIT_ERRLOG_PTR:
1449                         if (tlv_len != sizeof(u32))
1450                                 goto invalid_tlv_len;
1451                         pieces->init_errlog_ptr =
1452                                         le32_to_cpup((__le32 *)tlv_data);
1453                         break;
1454                 case IWL_UCODE_TLV_RUNT_EVTLOG_PTR:
1455                         if (tlv_len != sizeof(u32))
1456                                 goto invalid_tlv_len;
1457                         pieces->inst_evtlog_ptr =
1458                                         le32_to_cpup((__le32 *)tlv_data);
1459                         break;
1460                 case IWL_UCODE_TLV_RUNT_EVTLOG_SIZE:
1461                         if (tlv_len != sizeof(u32))
1462                                 goto invalid_tlv_len;
1463                         pieces->inst_evtlog_size =
1464                                         le32_to_cpup((__le32 *)tlv_data);
1465                         break;
1466                 case IWL_UCODE_TLV_RUNT_ERRLOG_PTR:
1467                         if (tlv_len != sizeof(u32))
1468                                 goto invalid_tlv_len;
1469                         pieces->inst_errlog_ptr =
1470                                         le32_to_cpup((__le32 *)tlv_data);
1471                         break;
1472                 case IWL_UCODE_TLV_ENHANCE_SENS_TBL:
1473                         if (tlv_len)
1474                                 goto invalid_tlv_len;
1475                         priv->enhance_sensitivity_table = true;
1476                         break;
1477                 case IWL_UCODE_TLV_PHY_CALIBRATION_SIZE:
1478                         if (tlv_len != sizeof(u32))
1479                                 goto invalid_tlv_len;
1480                         capa->standard_phy_calibration_size =
1481                                         le32_to_cpup((__le32 *)tlv_data);
1482                         break;
1483                 default:
1484                         IWL_WARN(priv, "unknown TLV: %d\n", tlv_type);
1485                         break;
1486                 }
1487         }
1488
1489         if (len) {
1490                 IWL_ERR(priv, "invalid TLV after parsing: %zd\n", len);
1491                 iwl_print_hex_dump(priv, IWL_DL_FW, (u8 *)data, len);
1492                 return -EINVAL;
1493         }
1494
1495         return 0;
1496
1497  invalid_tlv_len:
1498         IWL_ERR(priv, "TLV %d has invalid size: %u\n", tlv_type, tlv_len);
1499         iwl_print_hex_dump(priv, IWL_DL_FW, tlv_data, tlv_len);
1500
1501         return -EINVAL;
1502 }
1503
1504 /**
1505  * iwl_ucode_callback - callback when firmware was loaded
1506  *
1507  * If loaded successfully, copies the firmware into buffers
1508  * for the card to fetch (via DMA).
1509  */
1510 static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context)
1511 {
1512         struct iwl_priv *priv = context;
1513         struct iwl_ucode_header *ucode;
1514         int err;
1515         struct iwlagn_firmware_pieces pieces;
1516         const unsigned int api_max = priv->cfg->ucode_api_max;
1517         const unsigned int api_min = priv->cfg->ucode_api_min;
1518         u32 api_ver;
1519         char buildstr[25];
1520         u32 build;
1521         struct iwlagn_ucode_capabilities ucode_capa = {
1522                 .max_probe_length = 200,
1523                 .standard_phy_calibration_size =
1524                         IWL_DEFAULT_STANDARD_PHY_CALIBRATE_TBL_SIZE,
1525         };
1526
1527         memset(&pieces, 0, sizeof(pieces));
1528
1529         if (!ucode_raw) {
1530                 if (priv->fw_index <= priv->cfg->ucode_api_max)
1531                         IWL_ERR(priv,
1532                                 "request for firmware file '%s' failed.\n",
1533                                 priv->firmware_name);
1534                 goto try_again;
1535         }
1536
1537         IWL_DEBUG_INFO(priv, "Loaded firmware file '%s' (%zd bytes).\n",
1538                        priv->firmware_name, ucode_raw->size);
1539
1540         /* Make sure that we got at least the API version number */
1541         if (ucode_raw->size < 4) {
1542                 IWL_ERR(priv, "File size way too small!\n");
1543                 goto try_again;
1544         }
1545
1546         /* Data from ucode file:  header followed by uCode images */
1547         ucode = (struct iwl_ucode_header *)ucode_raw->data;
1548
1549         if (ucode->ver)
1550                 err = iwlagn_load_legacy_firmware(priv, ucode_raw, &pieces);
1551         else
1552                 err = iwlagn_load_firmware(priv, ucode_raw, &pieces,
1553                                            &ucode_capa);
1554
1555         if (err)
1556                 goto try_again;
1557
1558         api_ver = IWL_UCODE_API(priv->ucode_ver);
1559         build = pieces.build;
1560
1561         /*
1562          * api_ver should match the api version forming part of the
1563          * firmware filename ... but we don't check for that and only rely
1564          * on the API version read from firmware header from here on forward
1565          */
1566         /* no api version check required for experimental uCode */
1567         if (priv->fw_index != UCODE_EXPERIMENTAL_INDEX) {
1568                 if (api_ver < api_min || api_ver > api_max) {
1569                         IWL_ERR(priv,
1570                                 "Driver unable to support your firmware API. "
1571                                 "Driver supports v%u, firmware is v%u.\n",
1572                                 api_max, api_ver);
1573                         goto try_again;
1574                 }
1575
1576                 if (api_ver != api_max)
1577                         IWL_ERR(priv,
1578                                 "Firmware has old API version. Expected v%u, "
1579                                 "got v%u. New firmware can be obtained "
1580                                 "from http://www.intellinuxwireless.org.\n",
1581                                 api_max, api_ver);
1582         }
1583
1584         if (build)
1585                 sprintf(buildstr, " build %u%s", build,
1586                        (priv->fw_index == UCODE_EXPERIMENTAL_INDEX)
1587                                 ? " (EXP)" : "");
1588         else
1589                 buildstr[0] = '\0';
1590
1591         IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u%s\n",
1592                  IWL_UCODE_MAJOR(priv->ucode_ver),
1593                  IWL_UCODE_MINOR(priv->ucode_ver),
1594                  IWL_UCODE_API(priv->ucode_ver),
1595                  IWL_UCODE_SERIAL(priv->ucode_ver),
1596                  buildstr);
1597
1598         snprintf(priv->hw->wiphy->fw_version,
1599                  sizeof(priv->hw->wiphy->fw_version),
1600                  "%u.%u.%u.%u%s",
1601                  IWL_UCODE_MAJOR(priv->ucode_ver),
1602                  IWL_UCODE_MINOR(priv->ucode_ver),
1603                  IWL_UCODE_API(priv->ucode_ver),
1604                  IWL_UCODE_SERIAL(priv->ucode_ver),
1605                  buildstr);
1606
1607         /*
1608          * For any of the failures below (before allocating pci memory)
1609          * we will try to load a version with a smaller API -- maybe the
1610          * user just got a corrupted version of the latest API.
1611          */
1612
1613         IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
1614                        priv->ucode_ver);
1615         IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %Zd\n",
1616                        pieces.inst_size);
1617         IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %Zd\n",
1618                        pieces.data_size);
1619         IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %Zd\n",
1620                        pieces.init_size);
1621         IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %Zd\n",
1622                        pieces.init_data_size);
1623
1624         /* Verify that uCode images will fit in card's SRAM */
1625         if (pieces.inst_size > priv->hw_params.max_inst_size) {
1626                 IWL_ERR(priv, "uCode instr len %Zd too large to fit in\n",
1627                         pieces.inst_size);
1628                 goto try_again;
1629         }
1630
1631         if (pieces.data_size > priv->hw_params.max_data_size) {
1632                 IWL_ERR(priv, "uCode data len %Zd too large to fit in\n",
1633                         pieces.data_size);
1634                 goto try_again;
1635         }
1636
1637         if (pieces.init_size > priv->hw_params.max_inst_size) {
1638                 IWL_ERR(priv, "uCode init instr len %Zd too large to fit in\n",
1639                         pieces.init_size);
1640                 goto try_again;
1641         }
1642
1643         if (pieces.init_data_size > priv->hw_params.max_data_size) {
1644                 IWL_ERR(priv, "uCode init data len %Zd too large to fit in\n",
1645                         pieces.init_data_size);
1646                 goto try_again;
1647         }
1648
1649         /* Allocate ucode buffers for card's bus-master loading ... */
1650
1651         /* Runtime instructions and 2 copies of data:
1652          * 1) unmodified from disk
1653          * 2) backup cache for save/restore during power-downs */
1654         priv->ucode_code.len = pieces.inst_size;
1655         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
1656
1657         priv->ucode_data.len = pieces.data_size;
1658         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
1659
1660         if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr)
1661                 goto err_pci_alloc;
1662
1663         /* Initialization instructions and data */
1664         if (pieces.init_size && pieces.init_data_size) {
1665                 priv->ucode_init.len = pieces.init_size;
1666                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
1667
1668                 priv->ucode_init_data.len = pieces.init_data_size;
1669                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1670
1671                 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
1672                         goto err_pci_alloc;
1673         }
1674
1675         /* Now that we can no longer fail, copy information */
1676
1677         /*
1678          * The (size - 16) / 12 formula is based on the information recorded
1679          * for each event, which is of mode 1 (including timestamp) for all
1680          * new microcodes that include this information.
1681          */
1682         priv->_agn.init_evtlog_ptr = pieces.init_evtlog_ptr;
1683         if (pieces.init_evtlog_size)
1684                 priv->_agn.init_evtlog_size = (pieces.init_evtlog_size - 16)/12;
1685         else
1686                 priv->_agn.init_evtlog_size =
1687                         priv->cfg->base_params->max_event_log_size;
1688         priv->_agn.init_errlog_ptr = pieces.init_errlog_ptr;
1689         priv->_agn.inst_evtlog_ptr = pieces.inst_evtlog_ptr;
1690         if (pieces.inst_evtlog_size)
1691                 priv->_agn.inst_evtlog_size = (pieces.inst_evtlog_size - 16)/12;
1692         else
1693                 priv->_agn.inst_evtlog_size =
1694                         priv->cfg->base_params->max_event_log_size;
1695         priv->_agn.inst_errlog_ptr = pieces.inst_errlog_ptr;
1696
1697         if (ucode_capa.flags & IWL_UCODE_TLV_FLAGS_PAN) {
1698                 priv->valid_contexts |= BIT(IWL_RXON_CTX_PAN);
1699                 priv->sta_key_max_num = STA_KEY_MAX_NUM_PAN;
1700         } else
1701                 priv->sta_key_max_num = STA_KEY_MAX_NUM;
1702
1703         if (ucode_capa.flags & IWL_UCODE_TLV_FLAGS_BTSTATS ||
1704             (priv->cfg->bt_params && priv->cfg->bt_params->bt_statistics))
1705                 priv->bt_statistics = true;
1706
1707         /* Copy images into buffers for card's bus-master reads ... */
1708
1709         /* Runtime instructions (first block of data in file) */
1710         IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode instr len %Zd\n",
1711                         pieces.inst_size);
1712         memcpy(priv->ucode_code.v_addr, pieces.inst, pieces.inst_size);
1713
1714         IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
1715                 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
1716
1717         /*
1718          * Runtime data
1719          * NOTE:  Copy into backup buffer will be done in iwl_up()
1720          */
1721         IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode data len %Zd\n",
1722                         pieces.data_size);
1723         memcpy(priv->ucode_data.v_addr, pieces.data, pieces.data_size);
1724
1725         /* Initialization instructions */
1726         if (pieces.init_size) {
1727                 IWL_DEBUG_INFO(priv, "Copying (but not loading) init instr len %Zd\n",
1728                                 pieces.init_size);
1729                 memcpy(priv->ucode_init.v_addr, pieces.init, pieces.init_size);
1730         }
1731
1732         /* Initialization data */
1733         if (pieces.init_data_size) {
1734                 IWL_DEBUG_INFO(priv, "Copying (but not loading) init data len %Zd\n",
1735                                pieces.init_data_size);
1736                 memcpy(priv->ucode_init_data.v_addr, pieces.init_data,
1737                        pieces.init_data_size);
1738         }
1739
1740         /*
1741          * figure out the offset of chain noise reset and gain commands
1742          * base on the size of standard phy calibration commands table size
1743          */
1744         if (ucode_capa.standard_phy_calibration_size >
1745             IWL_MAX_PHY_CALIBRATE_TBL_SIZE)
1746                 ucode_capa.standard_phy_calibration_size =
1747                         IWL_MAX_STANDARD_PHY_CALIBRATE_TBL_SIZE;
1748
1749         priv->_agn.phy_calib_chain_noise_reset_cmd =
1750                 ucode_capa.standard_phy_calibration_size;
1751         priv->_agn.phy_calib_chain_noise_gain_cmd =
1752                 ucode_capa.standard_phy_calibration_size + 1;
1753
1754         /**************************************************
1755          * This is still part of probe() in a sense...
1756          *
1757          * 9. Setup and register with mac80211 and debugfs
1758          **************************************************/
1759         err = iwl_mac_setup_register(priv, &ucode_capa);
1760         if (err)
1761                 goto out_unbind;
1762
1763         err = iwl_dbgfs_register(priv, DRV_NAME);
1764         if (err)
1765                 IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err);
1766
1767         err = sysfs_create_group(&priv->pci_dev->dev.kobj,
1768                                         &iwl_attribute_group);
1769         if (err) {
1770                 IWL_ERR(priv, "failed to create sysfs device attributes\n");
1771                 goto out_unbind;
1772         }
1773
1774         /* We have our copies now, allow OS release its copies */
1775         release_firmware(ucode_raw);
1776         complete(&priv->_agn.firmware_loading_complete);
1777         return;
1778
1779  try_again:
1780         /* try next, if any */
1781         if (iwl_request_firmware(priv, false))
1782                 goto out_unbind;
1783         release_firmware(ucode_raw);
1784         return;
1785
1786  err_pci_alloc:
1787         IWL_ERR(priv, "failed to allocate pci memory\n");
1788         iwl_dealloc_ucode_pci(priv);
1789  out_unbind:
1790         complete(&priv->_agn.firmware_loading_complete);
1791         device_release_driver(&priv->pci_dev->dev);
1792         release_firmware(ucode_raw);
1793 }
1794
1795 static const char *desc_lookup_text[] = {
1796         "OK",
1797         "FAIL",
1798         "BAD_PARAM",
1799         "BAD_CHECKSUM",
1800         "NMI_INTERRUPT_WDG",
1801         "SYSASSERT",
1802         "FATAL_ERROR",
1803         "BAD_COMMAND",
1804         "HW_ERROR_TUNE_LOCK",
1805         "HW_ERROR_TEMPERATURE",
1806         "ILLEGAL_CHAN_FREQ",
1807         "VCC_NOT_STABLE",
1808         "FH_ERROR",
1809         "NMI_INTERRUPT_HOST",
1810         "NMI_INTERRUPT_ACTION_PT",
1811         "NMI_INTERRUPT_UNKNOWN",
1812         "UCODE_VERSION_MISMATCH",
1813         "HW_ERROR_ABS_LOCK",
1814         "HW_ERROR_CAL_LOCK_FAIL",
1815         "NMI_INTERRUPT_INST_ACTION_PT",
1816         "NMI_INTERRUPT_DATA_ACTION_PT",
1817         "NMI_TRM_HW_ER",
1818         "NMI_INTERRUPT_TRM",
1819         "NMI_INTERRUPT_BREAK_POINT"
1820         "DEBUG_0",
1821         "DEBUG_1",
1822         "DEBUG_2",
1823         "DEBUG_3",
1824 };
1825
1826 static struct { char *name; u8 num; } advanced_lookup[] = {
1827         { "NMI_INTERRUPT_WDG", 0x34 },
1828         { "SYSASSERT", 0x35 },
1829         { "UCODE_VERSION_MISMATCH", 0x37 },
1830         { "BAD_COMMAND", 0x38 },
1831         { "NMI_INTERRUPT_DATA_ACTION_PT", 0x3C },
1832         { "FATAL_ERROR", 0x3D },
1833         { "NMI_TRM_HW_ERR", 0x46 },
1834         { "NMI_INTERRUPT_TRM", 0x4C },
1835         { "NMI_INTERRUPT_BREAK_POINT", 0x54 },
1836         { "NMI_INTERRUPT_WDG_RXF_FULL", 0x5C },
1837         { "NMI_INTERRUPT_WDG_NO_RBD_RXF_FULL", 0x64 },
1838         { "NMI_INTERRUPT_HOST", 0x66 },
1839         { "NMI_INTERRUPT_ACTION_PT", 0x7C },
1840         { "NMI_INTERRUPT_UNKNOWN", 0x84 },
1841         { "NMI_INTERRUPT_INST_ACTION_PT", 0x86 },
1842         { "ADVANCED_SYSASSERT", 0 },
1843 };
1844
1845 static const char *desc_lookup(u32 num)
1846 {
1847         int i;
1848         int max = ARRAY_SIZE(desc_lookup_text);
1849
1850         if (num < max)
1851                 return desc_lookup_text[num];
1852
1853         max = ARRAY_SIZE(advanced_lookup) - 1;
1854         for (i = 0; i < max; i++) {
1855                 if (advanced_lookup[i].num == num)
1856                         break;;
1857         }
1858         return advanced_lookup[i].name;
1859 }
1860
1861 #define ERROR_START_OFFSET  (1 * sizeof(u32))
1862 #define ERROR_ELEM_SIZE     (7 * sizeof(u32))
1863
1864 void iwl_dump_nic_error_log(struct iwl_priv *priv)
1865 {
1866         u32 data2, line;
1867         u32 desc, time, count, base, data1;
1868         u32 blink1, blink2, ilink1, ilink2;
1869         u32 pc, hcmd;
1870
1871         base = priv->device_pointers.error_event_table;
1872         if (priv->ucode_type == UCODE_INIT) {
1873                 if (!base)
1874                         base = priv->_agn.init_errlog_ptr;
1875         } else {
1876                 if (!base)
1877                         base = priv->_agn.inst_errlog_ptr;
1878         }
1879
1880         if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
1881                 IWL_ERR(priv,
1882                         "Not valid error log pointer 0x%08X for %s uCode\n",
1883                         base, (priv->ucode_type == UCODE_INIT) ? "Init" : "RT");
1884                 return;
1885         }
1886
1887         count = iwl_read_targ_mem(priv, base);
1888
1889         if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
1890                 IWL_ERR(priv, "Start IWL Error Log Dump:\n");
1891                 IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
1892                         priv->status, count);
1893         }
1894
1895         desc = iwl_read_targ_mem(priv, base + 1 * sizeof(u32));
1896         priv->isr_stats.err_code = desc;
1897         pc = iwl_read_targ_mem(priv, base + 2 * sizeof(u32));
1898         blink1 = iwl_read_targ_mem(priv, base + 3 * sizeof(u32));
1899         blink2 = iwl_read_targ_mem(priv, base + 4 * sizeof(u32));
1900         ilink1 = iwl_read_targ_mem(priv, base + 5 * sizeof(u32));
1901         ilink2 = iwl_read_targ_mem(priv, base + 6 * sizeof(u32));
1902         data1 = iwl_read_targ_mem(priv, base + 7 * sizeof(u32));
1903         data2 = iwl_read_targ_mem(priv, base + 8 * sizeof(u32));
1904         line = iwl_read_targ_mem(priv, base + 9 * sizeof(u32));
1905         time = iwl_read_targ_mem(priv, base + 11 * sizeof(u32));
1906         hcmd = iwl_read_targ_mem(priv, base + 22 * sizeof(u32));
1907
1908         trace_iwlwifi_dev_ucode_error(priv, desc, time, data1, data2, line,
1909                                       blink1, blink2, ilink1, ilink2);
1910
1911         IWL_ERR(priv, "Desc                                  Time       "
1912                 "data1      data2      line\n");
1913         IWL_ERR(priv, "%-28s (0x%04X) %010u 0x%08X 0x%08X %u\n",
1914                 desc_lookup(desc), desc, time, data1, data2, line);
1915         IWL_ERR(priv, "pc      blink1  blink2  ilink1  ilink2  hcmd\n");
1916         IWL_ERR(priv, "0x%05X 0x%05X 0x%05X 0x%05X 0x%05X 0x%05X\n",
1917                 pc, blink1, blink2, ilink1, ilink2, hcmd);
1918 }
1919
1920 #define EVENT_START_OFFSET  (4 * sizeof(u32))
1921
1922 /**
1923  * iwl_print_event_log - Dump error event log to syslog
1924  *
1925  */
1926 static int iwl_print_event_log(struct iwl_priv *priv, u32 start_idx,
1927                                u32 num_events, u32 mode,
1928                                int pos, char **buf, size_t bufsz)
1929 {
1930         u32 i;
1931         u32 base;       /* SRAM byte address of event log header */
1932         u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
1933         u32 ptr;        /* SRAM byte address of log data */
1934         u32 ev, time, data; /* event log data */
1935         unsigned long reg_flags;
1936
1937         if (num_events == 0)
1938                 return pos;
1939
1940         base = priv->device_pointers.log_event_table;
1941         if (priv->ucode_type == UCODE_INIT) {
1942                 if (!base)
1943                         base = priv->_agn.init_evtlog_ptr;
1944         } else {
1945                 if (!base)
1946                         base = priv->_agn.inst_evtlog_ptr;
1947         }
1948
1949         if (mode == 0)
1950                 event_size = 2 * sizeof(u32);
1951         else
1952                 event_size = 3 * sizeof(u32);
1953
1954         ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
1955
1956         /* Make sure device is powered up for SRAM reads */
1957         spin_lock_irqsave(&priv->reg_lock, reg_flags);
1958         iwl_grab_nic_access(priv);
1959
1960         /* Set starting address; reads will auto-increment */
1961         _iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, ptr);
1962         rmb();
1963
1964         /* "time" is actually "data" for mode 0 (no timestamp).
1965         * place event id # at far right for easier visual parsing. */
1966         for (i = 0; i < num_events; i++) {
1967                 ev = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1968                 time = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1969                 if (mode == 0) {
1970                         /* data, ev */
1971                         if (bufsz) {
1972                                 pos += scnprintf(*buf + pos, bufsz - pos,
1973                                                 "EVT_LOG:0x%08x:%04u\n",
1974                                                 time, ev);
1975                         } else {
1976                                 trace_iwlwifi_dev_ucode_event(priv, 0,
1977                                         time, ev);
1978                                 IWL_ERR(priv, "EVT_LOG:0x%08x:%04u\n",
1979                                         time, ev);
1980                         }
1981                 } else {
1982                         data = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1983                         if (bufsz) {
1984                                 pos += scnprintf(*buf + pos, bufsz - pos,
1985                                                 "EVT_LOGT:%010u:0x%08x:%04u\n",
1986                                                  time, data, ev);
1987                         } else {
1988                                 IWL_ERR(priv, "EVT_LOGT:%010u:0x%08x:%04u\n",
1989                                         time, data, ev);
1990                                 trace_iwlwifi_dev_ucode_event(priv, time,
1991                                         data, ev);
1992                         }
1993                 }
1994         }
1995
1996         /* Allow device to power down */
1997         iwl_release_nic_access(priv);
1998         spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
1999         return pos;
2000 }
2001
2002 /**
2003  * iwl_print_last_event_logs - Dump the newest # of event log to syslog
2004  */
2005 static int iwl_print_last_event_logs(struct iwl_priv *priv, u32 capacity,
2006                                     u32 num_wraps, u32 next_entry,
2007                                     u32 size, u32 mode,
2008                                     int pos, char **buf, size_t bufsz)
2009 {
2010         /*
2011          * display the newest DEFAULT_LOG_ENTRIES entries
2012          * i.e the entries just before the next ont that uCode would fill.
2013          */
2014         if (num_wraps) {
2015                 if (next_entry < size) {
2016                         pos = iwl_print_event_log(priv,
2017                                                 capacity - (size - next_entry),
2018                                                 size - next_entry, mode,
2019                                                 pos, buf, bufsz);
2020                         pos = iwl_print_event_log(priv, 0,
2021                                                   next_entry, mode,
2022                                                   pos, buf, bufsz);
2023                 } else
2024                         pos = iwl_print_event_log(priv, next_entry - size,
2025                                                   size, mode, pos, buf, bufsz);
2026         } else {
2027                 if (next_entry < size) {
2028                         pos = iwl_print_event_log(priv, 0, next_entry,
2029                                                   mode, pos, buf, bufsz);
2030                 } else {
2031                         pos = iwl_print_event_log(priv, next_entry - size,
2032                                                   size, mode, pos, buf, bufsz);
2033                 }
2034         }
2035         return pos;
2036 }
2037
2038 #define DEFAULT_DUMP_EVENT_LOG_ENTRIES (20)
2039
2040 int iwl_dump_nic_event_log(struct iwl_priv *priv, bool full_log,
2041                             char **buf, bool display)
2042 {
2043         u32 base;       /* SRAM byte address of event log header */
2044         u32 capacity;   /* event log capacity in # entries */
2045         u32 mode;       /* 0 - no timestamp, 1 - timestamp recorded */
2046         u32 num_wraps;  /* # times uCode wrapped to top of log */
2047         u32 next_entry; /* index of next entry to be written by uCode */
2048         u32 size;       /* # entries that we'll print */
2049         u32 logsize;
2050         int pos = 0;
2051         size_t bufsz = 0;
2052
2053         base = priv->device_pointers.log_event_table;
2054         if (priv->ucode_type == UCODE_INIT) {
2055                 logsize = priv->_agn.init_evtlog_size;
2056                 if (!base)
2057                         base = priv->_agn.init_evtlog_ptr;
2058         } else {
2059                 logsize = priv->_agn.inst_evtlog_size;
2060                 if (!base)
2061                         base = priv->_agn.inst_evtlog_ptr;
2062         }
2063
2064         if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
2065                 IWL_ERR(priv,
2066                         "Invalid event log pointer 0x%08X for %s uCode\n",
2067                         base, (priv->ucode_type == UCODE_INIT) ? "Init" : "RT");
2068                 return -EINVAL;
2069         }
2070
2071         /* event log header */
2072         capacity = iwl_read_targ_mem(priv, base);
2073         mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
2074         num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
2075         next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
2076
2077         if (capacity > logsize) {
2078                 IWL_ERR(priv, "Log capacity %d is bogus, limit to %d entries\n",
2079                         capacity, logsize);
2080                 capacity = logsize;
2081         }
2082
2083         if (next_entry > logsize) {
2084                 IWL_ERR(priv, "Log write index %d is bogus, limit to %d\n",
2085                         next_entry, logsize);
2086                 next_entry = logsize;
2087         }
2088
2089         size = num_wraps ? capacity : next_entry;
2090
2091         /* bail out if nothing in log */
2092         if (size == 0) {
2093                 IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
2094                 return pos;
2095         }
2096
2097         /* enable/disable bt channel inhibition */
2098         priv->bt_ch_announce = iwlagn_bt_ch_announce;
2099
2100 #ifdef CONFIG_IWLWIFI_DEBUG
2101         if (!(iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) && !full_log)
2102                 size = (size > DEFAULT_DUMP_EVENT_LOG_ENTRIES)
2103                         ? DEFAULT_DUMP_EVENT_LOG_ENTRIES : size;
2104 #else
2105         size = (size > DEFAULT_DUMP_EVENT_LOG_ENTRIES)
2106                 ? DEFAULT_DUMP_EVENT_LOG_ENTRIES : size;
2107 #endif
2108         IWL_ERR(priv, "Start IWL Event Log Dump: display last %u entries\n",
2109                 size);
2110
2111 #ifdef CONFIG_IWLWIFI_DEBUG
2112         if (display) {
2113                 if (full_log)
2114                         bufsz = capacity * 48;
2115                 else
2116                         bufsz = size * 48;
2117                 *buf = kmalloc(bufsz, GFP_KERNEL);
2118                 if (!*buf)
2119                         return -ENOMEM;
2120         }
2121         if ((iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) || full_log) {
2122                 /*
2123                  * if uCode has wrapped back to top of log,
2124                  * start at the oldest entry,
2125                  * i.e the next one that uCode would fill.
2126                  */
2127                 if (num_wraps)
2128                         pos = iwl_print_event_log(priv, next_entry,
2129                                                 capacity - next_entry, mode,
2130                                                 pos, buf, bufsz);
2131                 /* (then/else) start at top of log */
2132                 pos = iwl_print_event_log(priv, 0,
2133                                           next_entry, mode, pos, buf, bufsz);
2134         } else
2135                 pos = iwl_print_last_event_logs(priv, capacity, num_wraps,
2136                                                 next_entry, size, mode,
2137                                                 pos, buf, bufsz);
2138 #else
2139         pos = iwl_print_last_event_logs(priv, capacity, num_wraps,
2140                                         next_entry, size, mode,
2141                                         pos, buf, bufsz);
2142 #endif
2143         return pos;
2144 }
2145
2146 static void iwl_rf_kill_ct_config(struct iwl_priv *priv)
2147 {
2148         struct iwl_ct_kill_config cmd;
2149         struct iwl_ct_kill_throttling_config adv_cmd;
2150         unsigned long flags;
2151         int ret = 0;
2152
2153         spin_lock_irqsave(&priv->lock, flags);
2154         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
2155                     CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
2156         spin_unlock_irqrestore(&priv->lock, flags);
2157         priv->thermal_throttle.ct_kill_toggle = false;
2158
2159         if (priv->cfg->base_params->support_ct_kill_exit) {
2160                 adv_cmd.critical_temperature_enter =
2161                         cpu_to_le32(priv->hw_params.ct_kill_threshold);
2162                 adv_cmd.critical_temperature_exit =
2163                         cpu_to_le32(priv->hw_params.ct_kill_exit_threshold);
2164
2165                 ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
2166                                        sizeof(adv_cmd), &adv_cmd);
2167                 if (ret)
2168                         IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
2169                 else
2170                         IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD "
2171                                         "succeeded, "
2172                                         "critical temperature enter is %d,"
2173                                         "exit is %d\n",
2174                                        priv->hw_params.ct_kill_threshold,
2175                                        priv->hw_params.ct_kill_exit_threshold);
2176         } else {
2177                 cmd.critical_temperature_R =
2178                         cpu_to_le32(priv->hw_params.ct_kill_threshold);
2179
2180                 ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
2181                                        sizeof(cmd), &cmd);
2182                 if (ret)
2183                         IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
2184                 else
2185                         IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD "
2186                                         "succeeded, "
2187                                         "critical temperature is %d\n",
2188                                         priv->hw_params.ct_kill_threshold);
2189         }
2190 }
2191
2192 static int iwlagn_send_calib_cfg_rt(struct iwl_priv *priv, u32 cfg)
2193 {
2194         struct iwl_calib_cfg_cmd calib_cfg_cmd;
2195         struct iwl_host_cmd cmd = {
2196                 .id = CALIBRATION_CFG_CMD,
2197                 .len = sizeof(struct iwl_calib_cfg_cmd),
2198                 .data = &calib_cfg_cmd,
2199         };
2200
2201         memset(&calib_cfg_cmd, 0, sizeof(calib_cfg_cmd));
2202         calib_cfg_cmd.ucd_calib_cfg.once.is_enable = IWL_CALIB_INIT_CFG_ALL;
2203         calib_cfg_cmd.ucd_calib_cfg.once.start = cpu_to_le32(cfg);
2204
2205         return iwl_send_cmd(priv, &cmd);
2206 }
2207
2208
2209 /**
2210  * iwl_alive_start - called after REPLY_ALIVE notification received
2211  *                   from protocol/runtime uCode (initialization uCode's
2212  *                   Alive gets handled by iwl_init_alive_start()).
2213  */
2214 static void iwl_alive_start(struct iwl_priv *priv)
2215 {
2216         int ret = 0;
2217         struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
2218
2219         IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
2220
2221         /* Initialize uCode has loaded Runtime uCode ... verify inst image.
2222          * This is a paranoid check, because we would not have gotten the
2223          * "runtime" alive if code weren't properly loaded.  */
2224         if (iwl_verify_ucode(priv, &priv->ucode_code)) {
2225                 /* Runtime instruction load was bad;
2226                  * take it all the way back down so we can try again */
2227                 IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
2228                 goto restart;
2229         }
2230
2231         ret = iwlagn_alive_notify(priv);
2232         if (ret) {
2233                 IWL_WARN(priv,
2234                         "Could not complete ALIVE transition [ntf]: %d\n", ret);
2235                 goto restart;
2236         }
2237
2238
2239         /* After the ALIVE response, we can send host commands to the uCode */
2240         set_bit(STATUS_ALIVE, &priv->status);
2241
2242         /* Enable watchdog to monitor the driver tx queues */
2243         iwl_setup_watchdog(priv);
2244
2245         if (iwl_is_rfkill(priv))
2246                 return;
2247
2248         /* download priority table before any calibration request */
2249         if (priv->cfg->bt_params &&
2250             priv->cfg->bt_params->advanced_bt_coexist) {
2251                 /* Configure Bluetooth device coexistence support */
2252                 priv->bt_valid = IWLAGN_BT_ALL_VALID_MSK;
2253                 priv->kill_ack_mask = IWLAGN_BT_KILL_ACK_MASK_DEFAULT;
2254                 priv->kill_cts_mask = IWLAGN_BT_KILL_CTS_MASK_DEFAULT;
2255                 priv->cfg->ops->hcmd->send_bt_config(priv);
2256                 priv->bt_valid = IWLAGN_BT_VALID_ENABLE_FLAGS;
2257                 iwlagn_send_prio_tbl(priv);
2258
2259                 /* FIXME: w/a to force change uCode BT state machine */
2260                 iwlagn_send_bt_env(priv, IWL_BT_COEX_ENV_OPEN,
2261                         BT_COEX_PRIO_TBL_EVT_INIT_CALIB2);
2262                 iwlagn_send_bt_env(priv, IWL_BT_COEX_ENV_CLOSE,
2263                         BT_COEX_PRIO_TBL_EVT_INIT_CALIB2);
2264         }
2265         if (priv->hw_params.calib_rt_cfg)
2266                 iwlagn_send_calib_cfg_rt(priv, priv->hw_params.calib_rt_cfg);
2267
2268         ieee80211_wake_queues(priv->hw);
2269
2270         priv->active_rate = IWL_RATES_MASK;
2271
2272         /* Configure Tx antenna selection based on H/W config */
2273         if (priv->cfg->ops->hcmd->set_tx_ant)
2274                 priv->cfg->ops->hcmd->set_tx_ant(priv, priv->cfg->valid_tx_ant);
2275
2276         if (iwl_is_associated_ctx(ctx)) {
2277                 struct iwl_rxon_cmd *active_rxon =
2278                                 (struct iwl_rxon_cmd *)&ctx->active;
2279                 /* apply any changes in staging */
2280                 ctx->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
2281                 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2282         } else {
2283                 struct iwl_rxon_context *tmp;
2284                 /* Initialize our rx_config data */
2285                 for_each_context(priv, tmp)
2286                         iwl_connection_init_rx_config(priv, tmp);
2287
2288                 if (priv->cfg->ops->hcmd->set_rxon_chain)
2289                         priv->cfg->ops->hcmd->set_rxon_chain(priv, ctx);
2290         }
2291
2292         if (!priv->cfg->bt_params || (priv->cfg->bt_params &&
2293             !priv->cfg->bt_params->advanced_bt_coexist)) {
2294                 /*
2295                  * default is 2-wire BT coexexistence support
2296                  */
2297                 priv->cfg->ops->hcmd->send_bt_config(priv);
2298         }
2299
2300         iwl_reset_run_time_calib(priv);
2301
2302         set_bit(STATUS_READY, &priv->status);
2303
2304         /* Configure the adapter for unassociated operation */
2305         iwlcore_commit_rxon(priv, ctx);
2306
2307         /* At this point, the NIC is initialized and operational */
2308         iwl_rf_kill_ct_config(priv);
2309
2310         IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
2311         wake_up_interruptible(&priv->wait_command_queue);
2312
2313         iwl_power_update_mode(priv, true);
2314         IWL_DEBUG_INFO(priv, "Updated power mode\n");
2315
2316
2317         return;
2318
2319  restart:
2320         queue_work(priv->workqueue, &priv->restart);
2321 }
2322
2323 static void iwl_cancel_deferred_work(struct iwl_priv *priv);
2324
2325 static void __iwl_down(struct iwl_priv *priv)
2326 {
2327         unsigned long flags;
2328         int exit_pending;
2329
2330         IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
2331
2332         iwl_scan_cancel_timeout(priv, 200);
2333
2334         exit_pending = test_and_set_bit(STATUS_EXIT_PENDING, &priv->status);
2335
2336         /* Stop TX queues watchdog. We need to have STATUS_EXIT_PENDING bit set
2337          * to prevent rearm timer */
2338         del_timer_sync(&priv->watchdog);
2339
2340         iwl_clear_ucode_stations(priv, NULL);
2341         iwl_dealloc_bcast_stations(priv);
2342         iwl_clear_driver_stations(priv);
2343
2344         /* reset BT coex data */
2345         priv->bt_status = 0;
2346         if (priv->cfg->bt_params)
2347                 priv->bt_traffic_load =
2348                          priv->cfg->bt_params->bt_init_traffic_load;
2349         else
2350                 priv->bt_traffic_load = 0;
2351         priv->bt_full_concurrent = false;
2352         priv->bt_ci_compliance = 0;
2353
2354         /* Wipe out the EXIT_PENDING status bit if we are not actually
2355          * exiting the module */
2356         if (!exit_pending)
2357                 clear_bit(STATUS_EXIT_PENDING, &priv->status);
2358
2359         /* stop and reset the on-board processor */
2360         iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
2361
2362         /* tell the device to stop sending interrupts */
2363         spin_lock_irqsave(&priv->lock, flags);
2364         iwl_disable_interrupts(priv);
2365         spin_unlock_irqrestore(&priv->lock, flags);
2366         iwl_synchronize_irq(priv);
2367
2368         if (priv->mac80211_registered)
2369                 ieee80211_stop_queues(priv->hw);
2370
2371         /* If we have not previously called iwl_init() then
2372          * clear all bits but the RF Kill bit and return */
2373         if (!iwl_is_init(priv)) {
2374                 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2375                                         STATUS_RF_KILL_HW |
2376                                test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2377                                         STATUS_GEO_CONFIGURED |
2378                                test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2379                                         STATUS_EXIT_PENDING;
2380                 goto exit;
2381         }
2382
2383         /* ...otherwise clear out all the status bits but the RF Kill
2384          * bit and continue taking the NIC down. */
2385         priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2386                                 STATUS_RF_KILL_HW |
2387                         test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2388                                 STATUS_GEO_CONFIGURED |
2389                         test_bit(STATUS_FW_ERROR, &priv->status) <<
2390                                 STATUS_FW_ERROR |
2391                        test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2392                                 STATUS_EXIT_PENDING;
2393
2394         /* device going down, Stop using ICT table */
2395         if (priv->cfg->ops->lib->isr_ops.disable)
2396                 priv->cfg->ops->lib->isr_ops.disable(priv);
2397
2398         iwlagn_txq_ctx_stop(priv);
2399         iwlagn_rxq_stop(priv);
2400
2401         /* Power-down device's busmaster DMA clocks */
2402         iwl_write_prph(priv, APMG_CLK_DIS_REG, APMG_CLK_VAL_DMA_CLK_RQT);
2403         udelay(5);
2404
2405         /* Make sure (redundant) we've released our request to stay awake */
2406         iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
2407
2408         /* Stop the device, and put it in low power state */
2409         iwl_apm_stop(priv);
2410
2411  exit:
2412         dev_kfree_skb(priv->beacon_skb);
2413         priv->beacon_skb = NULL;
2414
2415         /* clear out any free frames */
2416         iwl_clear_free_frames(priv);
2417 }
2418
2419 static void iwl_down(struct iwl_priv *priv)
2420 {
2421         mutex_lock(&priv->mutex);
2422         __iwl_down(priv);
2423         mutex_unlock(&priv->mutex);
2424
2425         iwl_cancel_deferred_work(priv);
2426 }
2427
2428 #define HW_READY_TIMEOUT (50)
2429
2430 static int iwl_set_hw_ready(struct iwl_priv *priv)
2431 {
2432         int ret = 0;
2433
2434         iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
2435                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY);
2436
2437         /* See if we got it */
2438         ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
2439                                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
2440                                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
2441                                 HW_READY_TIMEOUT);
2442         if (ret != -ETIMEDOUT)
2443                 priv->hw_ready = true;
2444         else
2445                 priv->hw_ready = false;
2446
2447         IWL_DEBUG_INFO(priv, "hardware %s\n",
2448                       (priv->hw_ready == 1) ? "ready" : "not ready");
2449         return ret;
2450 }
2451
2452 static int iwl_prepare_card_hw(struct iwl_priv *priv)
2453 {
2454         int ret = 0;
2455
2456         IWL_DEBUG_INFO(priv, "iwl_prepare_card_hw enter\n");
2457
2458         ret = iwl_set_hw_ready(priv);
2459         if (priv->hw_ready)
2460                 return ret;
2461
2462         /* If HW is not ready, prepare the conditions to check again */
2463         iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
2464                         CSR_HW_IF_CONFIG_REG_PREPARE);
2465
2466         ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
2467                         ~CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE,
2468                         CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE, 150000);
2469
2470         /* HW should be ready by now, check again. */
2471         if (ret != -ETIMEDOUT)
2472                 iwl_set_hw_ready(priv);
2473
2474         return ret;
2475 }
2476
2477 #define MAX_HW_RESTARTS 5
2478
2479 static int __iwl_up(struct iwl_priv *priv)
2480 {
2481         struct iwl_rxon_context *ctx;
2482         int i;
2483         int ret;
2484
2485         if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
2486                 IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
2487                 return -EIO;
2488         }
2489
2490         for_each_context(priv, ctx) {
2491                 ret = iwlagn_alloc_bcast_station(priv, ctx);
2492                 if (ret) {
2493                         iwl_dealloc_bcast_stations(priv);
2494                         return ret;
2495                 }
2496         }
2497
2498         iwl_prepare_card_hw(priv);
2499
2500         if (!priv->hw_ready) {
2501                 IWL_WARN(priv, "Exit HW not ready\n");
2502                 return -EIO;
2503         }
2504
2505         /* If platform's RF_KILL switch is NOT set to KILL */
2506         if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
2507                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2508         else
2509                 set_bit(STATUS_RF_KILL_HW, &priv->status);
2510
2511         if (iwl_is_rfkill(priv)) {
2512                 wiphy_rfkill_set_hw_state(priv->hw->wiphy, true);
2513
2514                 iwl_enable_interrupts(priv);
2515                 IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
2516                 return 0;
2517         }
2518
2519         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2520
2521         /* must be initialised before iwl_hw_nic_init */
2522         if (priv->valid_contexts != BIT(IWL_RXON_CTX_BSS))
2523                 priv->cmd_queue = IWL_IPAN_CMD_QUEUE_NUM;
2524         else
2525                 priv->cmd_queue = IWL_DEFAULT_CMD_QUEUE_NUM;
2526
2527         ret = iwlagn_hw_nic_init(priv);
2528         if (ret) {
2529                 IWL_ERR(priv, "Unable to init nic\n");
2530                 return ret;
2531         }
2532
2533         /* make sure rfkill handshake bits are cleared */
2534         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2535         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
2536                     CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
2537
2538         /* clear (again), then enable host interrupts */
2539         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2540         iwl_enable_interrupts(priv);
2541
2542         /* really make sure rfkill handshake bits are cleared */
2543         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2544         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2545
2546         for (i = 0; i < MAX_HW_RESTARTS; i++) {
2547
2548                 /* load bootstrap state machine,
2549                  * load bootstrap program into processor's memory,
2550                  * prepare to load the "initialize" uCode */
2551                 ret = iwlagn_load_ucode(priv);
2552
2553                 if (ret) {
2554                         IWL_ERR(priv, "Unable to set up bootstrap uCode: %d\n",
2555                                 ret);
2556                         continue;
2557                 }
2558
2559                 /* start card; "initialize" will load runtime ucode */
2560                 iwl_nic_start(priv);
2561
2562                 IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
2563
2564                 return 0;
2565         }
2566
2567         set_bit(STATUS_EXIT_PENDING, &priv->status);
2568         __iwl_down(priv);
2569         clear_bit(STATUS_EXIT_PENDING, &priv->status);
2570
2571         /* tried to restart and config the device for as long as our
2572          * patience could withstand */
2573         IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
2574         return -EIO;
2575 }
2576
2577
2578 /*****************************************************************************
2579  *
2580  * Workqueue callbacks
2581  *
2582  *****************************************************************************/
2583
2584 static void iwl_bg_init_alive_start(struct work_struct *data)
2585 {
2586         struct iwl_priv *priv =
2587             container_of(data, struct iwl_priv, init_alive_start.work);
2588
2589         mutex_lock(&priv->mutex);
2590
2591         if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
2592                 mutex_unlock(&priv->mutex);
2593                 return;
2594         }
2595
2596         iwlagn_init_alive_start(priv);
2597         mutex_unlock(&priv->mutex);
2598 }
2599
2600 static void iwl_bg_alive_start(struct work_struct *data)
2601 {
2602         struct iwl_priv *priv =
2603             container_of(data, struct iwl_priv, alive_start.work);
2604
2605         mutex_lock(&priv->mutex);
2606         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2607                 goto unlock;
2608
2609         /* enable dram interrupt */
2610         if (priv->cfg->ops->lib->isr_ops.reset)
2611                 priv->cfg->ops->lib->isr_ops.reset(priv);
2612
2613         iwl_alive_start(priv);
2614 unlock:
2615         mutex_unlock(&priv->mutex);
2616 }
2617
2618 static void iwl_bg_run_time_calib_work(struct work_struct *work)
2619 {
2620         struct iwl_priv *priv = container_of(work, struct iwl_priv,
2621                         run_time_calib_work);
2622
2623         mutex_lock(&priv->mutex);
2624
2625         if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
2626             test_bit(STATUS_SCANNING, &priv->status)) {
2627                 mutex_unlock(&priv->mutex);
2628                 return;
2629         }
2630
2631         if (priv->start_calib) {
2632                 if (iwl_bt_statistics(priv)) {
2633                         iwl_chain_noise_calibration(priv,
2634                                         (void *)&priv->_agn.statistics_bt);
2635                         iwl_sensitivity_calibration(priv,
2636                                         (void *)&priv->_agn.statistics_bt);
2637                 } else {
2638                         iwl_chain_noise_calibration(priv,
2639                                         (void *)&priv->_agn.statistics);
2640                         iwl_sensitivity_calibration(priv,
2641                                         (void *)&priv->_agn.statistics);
2642                 }
2643         }
2644
2645         mutex_unlock(&priv->mutex);
2646 }
2647
2648 static void iwl_bg_restart(struct work_struct *data)
2649 {
2650         struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
2651
2652         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2653                 return;
2654
2655         if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) {
2656                 struct iwl_rxon_context *ctx;
2657                 bool bt_full_concurrent;
2658                 u8 bt_ci_compliance;
2659                 u8 bt_load;
2660                 u8 bt_status;
2661
2662                 mutex_lock(&priv->mutex);
2663                 for_each_context(priv, ctx)
2664                         ctx->vif = NULL;
2665                 priv->is_open = 0;
2666
2667                 /*
2668                  * __iwl_down() will clear the BT status variables,
2669                  * which is correct, but when we restart we really
2670                  * want to keep them so restore them afterwards.
2671                  *
2672                  * The restart process will later pick them up and
2673                  * re-configure the hw when we reconfigure the BT
2674                  * command.
2675                  */
2676                 bt_full_concurrent = priv->bt_full_concurrent;
2677                 bt_ci_compliance = priv->bt_ci_compliance;
2678                 bt_load = priv->bt_traffic_load;
2679                 bt_status = priv->bt_status;
2680
2681                 __iwl_down(priv);
2682
2683                 priv->bt_full_concurrent = bt_full_concurrent;
2684                 priv->bt_ci_compliance = bt_ci_compliance;
2685                 priv->bt_traffic_load = bt_load;
2686                 priv->bt_status = bt_status;
2687
2688                 mutex_unlock(&priv->mutex);
2689                 iwl_cancel_deferred_work(priv);
2690                 ieee80211_restart_hw(priv->hw);
2691         } else {
2692                 iwl_down(priv);
2693
2694                 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2695                         return;
2696
2697                 mutex_lock(&priv->mutex);
2698                 __iwl_up(priv);
2699                 mutex_unlock(&priv->mutex);
2700         }
2701 }
2702
2703 static void iwl_bg_rx_replenish(struct work_struct *data)
2704 {
2705         struct iwl_priv *priv =
2706             container_of(data, struct iwl_priv, rx_replenish);
2707
2708         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2709                 return;
2710
2711         mutex_lock(&priv->mutex);
2712         iwlagn_rx_replenish(priv);
2713         mutex_unlock(&priv->mutex);
2714 }
2715
2716 static int iwl_mac_offchannel_tx(struct ieee80211_hw *hw, struct sk_buff *skb,
2717                                  struct ieee80211_channel *chan,
2718                                  enum nl80211_channel_type channel_type,
2719                                  unsigned int wait)
2720 {
2721         struct iwl_priv *priv = hw->priv;
2722         int ret;
2723
2724         /* Not supported if we don't have PAN */
2725         if (!(priv->valid_contexts & BIT(IWL_RXON_CTX_PAN))) {
2726                 ret = -EOPNOTSUPP;
2727                 goto free;
2728         }
2729
2730         /* Not supported on pre-P2P firmware */
2731         if (!(priv->contexts[IWL_RXON_CTX_PAN].interface_modes &
2732                                         BIT(NL80211_IFTYPE_P2P_CLIENT))) {
2733                 ret = -EOPNOTSUPP;
2734                 goto free;
2735         }
2736
2737         mutex_lock(&priv->mutex);
2738
2739         if (!priv->contexts[IWL_RXON_CTX_PAN].is_active) {
2740                 /*
2741                  * If the PAN context is free, use the normal
2742                  * way of doing remain-on-channel offload + TX.
2743                  */
2744                 ret = 1;
2745                 goto out;
2746         }
2747
2748         /* TODO: queue up if scanning? */
2749         if (test_bit(STATUS_SCANNING, &priv->status) ||
2750             priv->_agn.offchan_tx_skb) {
2751                 ret = -EBUSY;
2752                 goto out;
2753         }
2754
2755         /*
2756          * max_scan_ie_len doesn't include the blank SSID or the header,
2757          * so need to add that again here.
2758          */
2759         if (skb->len > hw->wiphy->max_scan_ie_len + 24 + 2) {
2760                 ret = -ENOBUFS;
2761                 goto out;
2762         }
2763
2764         priv->_agn.offchan_tx_skb = skb;
2765         priv->_agn.offchan_tx_timeout = wait;
2766         priv->_agn.offchan_tx_chan = chan;
2767
2768         ret = iwl_scan_initiate(priv, priv->contexts[IWL_RXON_CTX_PAN].vif,
2769                                 IWL_SCAN_OFFCH_TX, chan->band);
2770         if (ret)
2771                 priv->_agn.offchan_tx_skb = NULL;
2772  out:
2773         mutex_unlock(&priv->mutex);
2774  free:
2775         if (ret < 0)
2776                 kfree_skb(skb);
2777
2778         return ret;
2779 }
2780
2781 static int iwl_mac_offchannel_tx_cancel_wait(struct ieee80211_hw *hw)
2782 {
2783         struct iwl_priv *priv = hw->priv;
2784         int ret;
2785
2786         mutex_lock(&priv->mutex);
2787
2788         if (!priv->_agn.offchan_tx_skb) {
2789                 ret = -EINVAL;
2790                 goto unlock;
2791         }
2792
2793         priv->_agn.offchan_tx_skb = NULL;
2794
2795         ret = iwl_scan_cancel_timeout(priv, 200);
2796         if (ret)
2797                 ret = -EIO;
2798 unlock:
2799         mutex_unlock(&priv->mutex);
2800
2801         return ret;
2802 }
2803
2804 /*****************************************************************************
2805  *
2806  * mac80211 entry point functions
2807  *
2808  *****************************************************************************/
2809
2810 #define UCODE_READY_TIMEOUT     (4 * HZ)
2811
2812 /*
2813  * Not a mac80211 entry point function, but it fits in with all the
2814  * other mac80211 functions grouped here.
2815  */
2816 static int iwl_mac_setup_register(struct iwl_priv *priv,
2817                                   struct iwlagn_ucode_capabilities *capa)
2818 {
2819         int ret;
2820         struct ieee80211_hw *hw = priv->hw;
2821         struct iwl_rxon_context *ctx;
2822
2823         hw->rate_control_algorithm = "iwl-agn-rs";
2824
2825         /* Tell mac80211 our characteristics */
2826         hw->flags = IEEE80211_HW_SIGNAL_DBM |
2827                     IEEE80211_HW_AMPDU_AGGREGATION |
2828                     IEEE80211_HW_NEED_DTIM_PERIOD |
2829                     IEEE80211_HW_SPECTRUM_MGMT |
2830                     IEEE80211_HW_REPORTS_TX_ACK_STATUS;
2831
2832         hw->max_tx_aggregation_subframes = LINK_QUAL_AGG_FRAME_LIMIT_DEF;
2833
2834         if (!priv->cfg->base_params->broken_powersave)
2835                 hw->flags |= IEEE80211_HW_SUPPORTS_PS |
2836                              IEEE80211_HW_SUPPORTS_DYNAMIC_PS;
2837
2838         if (priv->cfg->sku & IWL_SKU_N)
2839                 hw->flags |= IEEE80211_HW_SUPPORTS_DYNAMIC_SMPS |
2840                              IEEE80211_HW_SUPPORTS_STATIC_SMPS;
2841
2842         if (capa->flags & IWL_UCODE_TLV_FLAGS_MFP)
2843                 hw->flags |= IEEE80211_HW_MFP_CAPABLE;
2844
2845         hw->sta_data_size = sizeof(struct iwl_station_priv);
2846         hw->vif_data_size = sizeof(struct iwl_vif_priv);
2847
2848         for_each_context(priv, ctx) {
2849                 hw->wiphy->interface_modes |= ctx->interface_modes;
2850                 hw->wiphy->interface_modes |= ctx->exclusive_interface_modes;
2851         }
2852
2853         hw->wiphy->max_remain_on_channel_duration = 1000;
2854
2855         hw->wiphy->flags |= WIPHY_FLAG_CUSTOM_REGULATORY |
2856                             WIPHY_FLAG_DISABLE_BEACON_HINTS |
2857                             WIPHY_FLAG_IBSS_RSN;
2858
2859         /*
2860          * For now, disable PS by default because it affects
2861          * RX performance significantly.
2862          */
2863         hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT;
2864
2865         hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX;
2866         /* we create the 802.11 header and a zero-length SSID element */
2867         hw->wiphy->max_scan_ie_len = capa->max_probe_length - 24 - 2;
2868
2869         /* Default value; 4 EDCA QOS priorities */
2870         hw->queues = 4;
2871
2872         hw->max_listen_interval = IWL_CONN_MAX_LISTEN_INTERVAL;
2873
2874         if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
2875                 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
2876                         &priv->bands[IEEE80211_BAND_2GHZ];
2877         if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
2878                 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
2879                         &priv->bands[IEEE80211_BAND_5GHZ];
2880
2881         iwl_leds_init(priv);
2882
2883         ret = ieee80211_register_hw(priv->hw);
2884         if (ret) {
2885                 IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
2886                 return ret;
2887         }
2888         priv->mac80211_registered = 1;
2889
2890         return 0;
2891 }
2892
2893
2894 static int iwlagn_mac_start(struct ieee80211_hw *hw)
2895 {
2896         struct iwl_priv *priv = hw->priv;
2897         int ret;
2898
2899         IWL_DEBUG_MAC80211(priv, "enter\n");
2900
2901         /* we should be verifying the device is ready to be opened */
2902         mutex_lock(&priv->mutex);
2903         ret = __iwl_up(priv);
2904         mutex_unlock(&priv->mutex);
2905
2906         if (ret)
2907                 return ret;
2908
2909         if (iwl_is_rfkill(priv))
2910                 goto out;
2911
2912         IWL_DEBUG_INFO(priv, "Start UP work done.\n");
2913
2914         /* Wait for START_ALIVE from Run Time ucode. Otherwise callbacks from
2915          * mac80211 will not be run successfully. */
2916         ret = wait_event_interruptible_timeout(priv->wait_command_queue,
2917                         test_bit(STATUS_READY, &priv->status),
2918                         UCODE_READY_TIMEOUT);
2919         if (!ret) {
2920                 if (!test_bit(STATUS_READY, &priv->status)) {
2921                         IWL_ERR(priv, "START_ALIVE timeout after %dms.\n",
2922                                 jiffies_to_msecs(UCODE_READY_TIMEOUT));
2923                         return -ETIMEDOUT;
2924                 }
2925         }
2926
2927         iwlagn_led_enable(priv);
2928
2929 out:
2930         priv->is_open = 1;
2931         IWL_DEBUG_MAC80211(priv, "leave\n");
2932         return 0;
2933 }
2934
2935 static void iwlagn_mac_stop(struct ieee80211_hw *hw)
2936 {
2937         struct iwl_priv *priv = hw->priv;
2938
2939         IWL_DEBUG_MAC80211(priv, "enter\n");
2940
2941         if (!priv->is_open)
2942                 return;
2943
2944         priv->is_open = 0;
2945
2946         iwl_down(priv);
2947
2948         flush_workqueue(priv->workqueue);
2949
2950         /* User space software may expect getting rfkill changes
2951          * even if interface is down */
2952         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2953         iwl_enable_rfkill_int(priv);
2954
2955         IWL_DEBUG_MAC80211(priv, "leave\n");
2956 }
2957
2958 static void iwlagn_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
2959 {
2960         struct iwl_priv *priv = hw->priv;
2961
2962         IWL_DEBUG_MACDUMP(priv, "enter\n");
2963
2964         IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
2965                      ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
2966
2967         if (iwlagn_tx_skb(priv, skb))
2968                 dev_kfree_skb_any(skb);
2969
2970         IWL_DEBUG_MACDUMP(priv, "leave\n");
2971 }
2972
2973 static void iwlagn_mac_update_tkip_key(struct ieee80211_hw *hw,
2974                                        struct ieee80211_vif *vif,
2975                                        struct ieee80211_key_conf *keyconf,
2976                                        struct ieee80211_sta *sta,
2977                                        u32 iv32, u16 *phase1key)
2978 {
2979         struct iwl_priv *priv = hw->priv;
2980         struct iwl_vif_priv *vif_priv = (void *)vif->drv_priv;
2981
2982         IWL_DEBUG_MAC80211(priv, "enter\n");
2983
2984         iwl_update_tkip_key(priv, vif_priv->ctx, keyconf, sta,
2985                             iv32, phase1key);
2986
2987         IWL_DEBUG_MAC80211(priv, "leave\n");
2988 }
2989
2990 static int iwlagn_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
2991                               struct ieee80211_vif *vif,
2992                               struct ieee80211_sta *sta,
2993                               struct ieee80211_key_conf *key)
2994 {
2995         struct iwl_priv *priv = hw->priv;
2996         struct iwl_vif_priv *vif_priv = (void *)vif->drv_priv;
2997         struct iwl_rxon_context *ctx = vif_priv->ctx;
2998         int ret;
2999         u8 sta_id;
3000         bool is_default_wep_key = false;
3001
3002         IWL_DEBUG_MAC80211(priv, "enter\n");
3003
3004         if (priv->cfg->mod_params->sw_crypto) {
3005                 IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
3006                 return -EOPNOTSUPP;
3007         }
3008
3009         /*
3010          * To support IBSS RSN, don't program group keys in IBSS, the
3011          * hardware will then not attempt to decrypt the frames.
3012          */
3013         if (vif->type == NL80211_IFTYPE_ADHOC &&
3014             !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE))
3015                 return -EOPNOTSUPP;
3016
3017         sta_id = iwl_sta_id_or_broadcast(priv, vif_priv->ctx, sta);
3018         if (sta_id == IWL_INVALID_STATION)
3019                 return -EINVAL;
3020
3021         mutex_lock(&priv->mutex);
3022         iwl_scan_cancel_timeout(priv, 100);
3023
3024         /*
3025          * If we are getting WEP group key and we didn't receive any key mapping
3026          * so far, we are in legacy wep mode (group key only), otherwise we are
3027          * in 1X mode.
3028          * In legacy wep mode, we use another host command to the uCode.
3029          */
3030         if ((key->cipher == WLAN_CIPHER_SUITE_WEP40 ||
3031              key->cipher == WLAN_CIPHER_SUITE_WEP104) &&
3032             !sta) {
3033                 if (cmd == SET_KEY)
3034                         is_default_wep_key = !ctx->key_mapping_keys;
3035                 else
3036                         is_default_wep_key =
3037                                         (key->hw_key_idx == HW_KEY_DEFAULT);
3038         }
3039
3040         switch (cmd) {
3041         case SET_KEY:
3042                 if (is_default_wep_key)
3043                         ret = iwl_set_default_wep_key(priv, vif_priv->ctx, key);
3044                 else
3045                         ret = iwl_set_dynamic_key(priv, vif_priv->ctx,
3046                                                   key, sta_id);
3047
3048                 IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
3049                 break;
3050         case DISABLE_KEY:
3051                 if (is_default_wep_key)
3052                         ret = iwl_remove_default_wep_key(priv, ctx, key);
3053                 else
3054                         ret = iwl_remove_dynamic_key(priv, ctx, key, sta_id);
3055
3056                 IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
3057                 break;
3058         default:
3059                 ret = -EINVAL;
3060         }
3061
3062         mutex_unlock(&priv->mutex);
3063         IWL_DEBUG_MAC80211(priv, "leave\n");
3064
3065         return ret;
3066 }
3067
3068 static int iwlagn_mac_ampdu_action(struct ieee80211_hw *hw,
3069                                    struct ieee80211_vif *vif,
3070                                    enum ieee80211_ampdu_mlme_action action,
3071                                    struct ieee80211_sta *sta, u16 tid, u16 *ssn,
3072                                    u8 buf_size)
3073 {
3074         struct iwl_priv *priv = hw->priv;
3075         int ret = -EINVAL;
3076         struct iwl_station_priv *sta_priv = (void *) sta->drv_priv;
3077
3078         IWL_DEBUG_HT(priv, "A-MPDU action on addr %pM tid %d\n",
3079                      sta->addr, tid);
3080
3081         if (!(priv->cfg->sku & IWL_SKU_N))
3082                 return -EACCES;
3083
3084         mutex_lock(&priv->mutex);
3085
3086         switch (action) {
3087         case IEEE80211_AMPDU_RX_START:
3088                 IWL_DEBUG_HT(priv, "start Rx\n");
3089                 ret = iwl_sta_rx_agg_start(priv, sta, tid, *ssn);
3090                 break;
3091         case IEEE80211_AMPDU_RX_STOP:
3092                 IWL_DEBUG_HT(priv, "stop Rx\n");
3093                 ret = iwl_sta_rx_agg_stop(priv, sta, tid);
3094                 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3095                         ret = 0;
3096                 break;
3097         case IEEE80211_AMPDU_TX_START:
3098                 IWL_DEBUG_HT(priv, "start Tx\n");
3099                 ret = iwlagn_tx_agg_start(priv, vif, sta, tid, ssn);
3100                 if (ret == 0) {
3101                         priv->_agn.agg_tids_count++;
3102                         IWL_DEBUG_HT(priv, "priv->_agn.agg_tids_count = %u\n",
3103                                      priv->_agn.agg_tids_count);
3104                 }
3105                 break;
3106         case IEEE80211_AMPDU_TX_STOP:
3107                 IWL_DEBUG_HT(priv, "stop Tx\n");
3108                 ret = iwlagn_tx_agg_stop(priv, vif, sta, tid);
3109                 if ((ret == 0) && (priv->_agn.agg_tids_count > 0)) {
3110                         priv->_agn.agg_tids_count--;
3111                         IWL_DEBUG_HT(priv, "priv->_agn.agg_tids_count = %u\n",
3112                                      priv->_agn.agg_tids_count);
3113                 }
3114                 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3115                         ret = 0;
3116                 if (priv->cfg->ht_params &&
3117                     priv->cfg->ht_params->use_rts_for_aggregation) {
3118                         struct iwl_station_priv *sta_priv =
3119                                 (void *) sta->drv_priv;
3120                         /*
3121                          * switch off RTS/CTS if it was previously enabled
3122                          */
3123
3124                         sta_priv->lq_sta.lq.general_params.flags &=
3125                                 ~LINK_QUAL_FLAGS_SET_STA_TLC_RTS_MSK;
3126                         iwl_send_lq_cmd(priv, iwl_rxon_ctx_from_vif(vif),
3127                                         &sta_priv->lq_sta.lq, CMD_ASYNC, false);
3128                 }
3129                 break;
3130         case IEEE80211_AMPDU_TX_OPERATIONAL:
3131                 buf_size = min_t(int, buf_size, LINK_QUAL_AGG_FRAME_LIMIT_DEF);
3132
3133                 iwlagn_txq_agg_queue_setup(priv, sta, tid, buf_size);
3134
3135                 /*
3136                  * If the limit is 0, then it wasn't initialised yet,
3137                  * use the default. We can do that since we take the
3138                  * minimum below, and we don't want to go above our
3139                  * default due to hardware restrictions.
3140                  */
3141                 if (sta_priv->max_agg_bufsize == 0)
3142                         sta_priv->max_agg_bufsize =
3143                                 LINK_QUAL_AGG_FRAME_LIMIT_DEF;
3144
3145                 /*
3146                  * Even though in theory the peer could have different
3147                  * aggregation reorder buffer sizes for different sessions,
3148                  * our ucode doesn't allow for that and has a global limit
3149                  * for each station. Therefore, use the minimum of all the
3150                  * aggregation sessions and our default value.
3151                  */
3152                 sta_priv->max_agg_bufsize =
3153                         min(sta_priv->max_agg_bufsize, buf_size);
3154
3155                 if (priv->cfg->ht_params &&
3156                     priv->cfg->ht_params->use_rts_for_aggregation) {
3157                         /*
3158                          * switch to RTS/CTS if it is the prefer protection
3159                          * method for HT traffic
3160                          */
3161
3162                         sta_priv->lq_sta.lq.general_params.flags |=
3163                                 LINK_QUAL_FLAGS_SET_STA_TLC_RTS_MSK;
3164                 }
3165
3166                 sta_priv->lq_sta.lq.agg_params.agg_frame_cnt_limit =
3167                         sta_priv->max_agg_bufsize;
3168
3169                 iwl_send_lq_cmd(priv, iwl_rxon_ctx_from_vif(vif),
3170                                 &sta_priv->lq_sta.lq, CMD_ASYNC, false);
3171                 ret = 0;
3172                 break;
3173         }
3174         mutex_unlock(&priv->mutex);
3175
3176         return ret;
3177 }
3178
3179 static int iwlagn_mac_sta_add(struct ieee80211_hw *hw,
3180                               struct ieee80211_vif *vif,
3181                               struct ieee80211_sta *sta)
3182 {
3183         struct iwl_priv *priv = hw->priv;
3184         struct iwl_station_priv *sta_priv = (void *)sta->drv_priv;
3185         struct iwl_vif_priv *vif_priv = (void *)vif->drv_priv;
3186         bool is_ap = vif->type == NL80211_IFTYPE_STATION;
3187         int ret;
3188         u8 sta_id;
3189
3190         IWL_DEBUG_INFO(priv, "received request to add station %pM\n",
3191                         sta->addr);
3192         mutex_lock(&priv->mutex);
3193         IWL_DEBUG_INFO(priv, "proceeding to add station %pM\n",
3194                         sta->addr);
3195         sta_priv->common.sta_id = IWL_INVALID_STATION;
3196
3197         atomic_set(&sta_priv->pending_frames, 0);
3198         if (vif->type == NL80211_IFTYPE_AP)
3199                 sta_priv->client = true;
3200
3201         ret = iwl_add_station_common(priv, vif_priv->ctx, sta->addr,
3202                                      is_ap, sta, &sta_id);
3203         if (ret) {
3204                 IWL_ERR(priv, "Unable to add station %pM (%d)\n",
3205                         sta->addr, ret);
3206                 /* Should we return success if return code is EEXIST ? */
3207                 mutex_unlock(&priv->mutex);
3208                 return ret;
3209         }
3210
3211         sta_priv->common.sta_id = sta_id;
3212
3213         /* Initialize rate scaling */
3214         IWL_DEBUG_INFO(priv, "Initializing rate scaling for station %pM\n",
3215                        sta->addr);
3216         iwl_rs_rate_init(priv, sta, sta_id);
3217         mutex_unlock(&priv->mutex);
3218
3219         return 0;
3220 }
3221
3222 static void iwlagn_mac_channel_switch(struct ieee80211_hw *hw,
3223                                 struct ieee80211_channel_switch *ch_switch)
3224 {
3225         struct iwl_priv *priv = hw->priv;
3226         const struct iwl_channel_info *ch_info;
3227         struct ieee80211_conf *conf = &hw->conf;
3228         struct ieee80211_channel *channel = ch_switch->channel;
3229         struct iwl_ht_config *ht_conf = &priv->current_ht_config;
3230         /*
3231          * MULTI-FIXME
3232          * When we add support for multiple interfaces, we need to
3233          * revisit this. The channel switch command in the device
3234          * only affects the BSS context, but what does that really
3235          * mean? And what if we get a CSA on the second interface?
3236          * This needs a lot of work.
3237          */
3238         struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
3239         u16 ch;
3240         unsigned long flags = 0;
3241
3242         IWL_DEBUG_MAC80211(priv, "enter\n");
3243
3244         mutex_lock(&priv->mutex);
3245
3246         if (iwl_is_rfkill(priv))
3247                 goto out;
3248
3249         if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
3250             test_bit(STATUS_SCANNING, &priv->status))
3251                 goto out;
3252
3253         if (!iwl_is_associated_ctx(ctx))
3254                 goto out;
3255
3256         /* channel switch in progress */
3257         if (priv->switch_rxon.switch_in_progress == true)
3258                 goto out;
3259
3260         if (priv->cfg->ops->lib->set_channel_switch) {
3261
3262                 ch = channel->hw_value;
3263                 if (le16_to_cpu(ctx->active.channel) != ch) {
3264                         ch_info = iwl_get_channel_info(priv,
3265                                                        channel->band,
3266                                                        ch);
3267                         if (!is_channel_valid(ch_info)) {
3268                                 IWL_DEBUG_MAC80211(priv, "invalid channel\n");
3269                                 goto out;
3270                         }
3271                         spin_lock_irqsave(&priv->lock, flags);
3272
3273                         priv->current_ht_config.smps = conf->smps_mode;
3274
3275                         /* Configure HT40 channels */
3276                         ctx->ht.enabled = conf_is_ht(conf);
3277                         if (ctx->ht.enabled) {
3278                                 if (conf_is_ht40_minus(conf)) {
3279                                         ctx->ht.extension_chan_offset =
3280                                                 IEEE80211_HT_PARAM_CHA_SEC_BELOW;
3281                                         ctx->ht.is_40mhz = true;
3282                                 } else if (conf_is_ht40_plus(conf)) {
3283                                         ctx->ht.extension_chan_offset =
3284                                                 IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
3285                                         ctx->ht.is_40mhz = true;
3286                                 } else {
3287                                         ctx->ht.extension_chan_offset =
3288                                                 IEEE80211_HT_PARAM_CHA_SEC_NONE;
3289                                         ctx->ht.is_40mhz = false;
3290                                 }
3291                         } else
3292                                 ctx->ht.is_40mhz = false;
3293
3294                         if ((le16_to_cpu(ctx->staging.channel) != ch))
3295                                 ctx->staging.flags = 0;
3296
3297                         iwl_set_rxon_channel(priv, channel, ctx);
3298                         iwl_set_rxon_ht(priv, ht_conf);
3299                         iwl_set_flags_for_band(priv, ctx, channel->band,
3300                                                ctx->vif);
3301                         spin_unlock_irqrestore(&priv->lock, flags);
3302
3303                         iwl_set_rate(priv);
3304                         /*
3305                          * at this point, staging_rxon has the
3306                          * configuration for channel switch
3307                          */
3308                         if (priv->cfg->ops->lib->set_channel_switch(priv,
3309                                                                     ch_switch))
3310                                 priv->switch_rxon.switch_in_progress = false;
3311                 }
3312         }
3313 out:
3314         mutex_unlock(&priv->mutex);
3315         if (!priv->switch_rxon.switch_in_progress)
3316                 ieee80211_chswitch_done(ctx->vif, false);
3317         IWL_DEBUG_MAC80211(priv, "leave\n");
3318 }
3319
3320 static void iwlagn_configure_filter(struct ieee80211_hw *hw,
3321                                     unsigned int changed_flags,
3322                                     unsigned int *total_flags,
3323                                     u64 multicast)
3324 {
3325         struct iwl_priv *priv = hw->priv;
3326         __le32 filter_or = 0, filter_nand = 0;
3327         struct iwl_rxon_context *ctx;
3328
3329 #define CHK(test, flag) do { \
3330         if (*total_flags & (test))              \
3331                 filter_or |= (flag);            \
3332         else                                    \
3333                 filter_nand |= (flag);          \
3334         } while (0)
3335
3336         IWL_DEBUG_MAC80211(priv, "Enter: changed: 0x%x, total: 0x%x\n",
3337                         changed_flags, *total_flags);
3338
3339         CHK(FIF_OTHER_BSS | FIF_PROMISC_IN_BSS, RXON_FILTER_PROMISC_MSK);
3340         /* Setting _just_ RXON_FILTER_CTL2HOST_MSK causes FH errors */
3341         CHK(FIF_CONTROL, RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_PROMISC_MSK);
3342         CHK(FIF_BCN_PRBRESP_PROMISC, RXON_FILTER_BCON_AWARE_MSK);
3343
3344 #undef CHK
3345
3346         mutex_lock(&priv->mutex);
3347
3348         for_each_context(priv, ctx) {
3349                 ctx->staging.filter_flags &= ~filter_nand;
3350                 ctx->staging.filter_flags |= filter_or;
3351
3352                 /*
3353                  * Not committing directly because hardware can perform a scan,
3354                  * but we'll eventually commit the filter flags change anyway.
3355                  */
3356         }
3357
3358         mutex_unlock(&priv->mutex);
3359
3360         /*
3361          * Receiving all multicast frames is always enabled by the
3362          * default flags setup in iwl_connection_init_rx_config()
3363          * since we currently do not support programming multicast
3364          * filters into the device.
3365          */
3366         *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS |
3367                         FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
3368 }
3369
3370 static void iwlagn_mac_flush(struct ieee80211_hw *hw, bool drop)
3371 {
3372         struct iwl_priv *priv = hw->priv;
3373
3374         mutex_lock(&priv->mutex);
3375         IWL_DEBUG_MAC80211(priv, "enter\n");
3376
3377         /* do not support "flush" */
3378         if (!priv->cfg->ops->lib->txfifo_flush)
3379                 goto done;
3380
3381         if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
3382                 IWL_DEBUG_TX(priv, "Aborting flush due to device shutdown\n");
3383                 goto done;
3384         }
3385         if (iwl_is_rfkill(priv)) {
3386                 IWL_DEBUG_TX(priv, "Aborting flush due to RF Kill\n");
3387                 goto done;
3388         }
3389
3390         /*
3391          * mac80211 will not push any more frames for transmit
3392          * until the flush is completed
3393          */
3394         if (drop) {
3395                 IWL_DEBUG_MAC80211(priv, "send flush command\n");
3396                 if (priv->cfg->ops->lib->txfifo_flush(priv, IWL_DROP_ALL)) {
3397                         IWL_ERR(priv, "flush request fail\n");
3398                         goto done;
3399                 }
3400         }
3401         IWL_DEBUG_MAC80211(priv, "wait transmit/flush all frames\n");
3402         iwlagn_wait_tx_queue_empty(priv);
3403 done:
3404         mutex_unlock(&priv->mutex);
3405         IWL_DEBUG_MAC80211(priv, "leave\n");
3406 }
3407
3408 static void iwlagn_disable_roc(struct iwl_priv *priv)
3409 {
3410         struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_PAN];
3411         struct ieee80211_channel *chan = ACCESS_ONCE(priv->hw->conf.channel);
3412
3413         lockdep_assert_held(&priv->mutex);
3414
3415         if (!ctx->is_active)
3416                 return;
3417
3418         ctx->staging.dev_type = RXON_DEV_TYPE_2STA;
3419         ctx->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
3420         iwl_set_rxon_channel(priv, chan, ctx);
3421         iwl_set_flags_for_band(priv, ctx, chan->band, NULL);
3422
3423         priv->_agn.hw_roc_channel = NULL;
3424
3425         iwlcore_commit_rxon(priv, ctx);
3426
3427         ctx->is_active = false;
3428 }
3429
3430 static void iwlagn_bg_roc_done(struct work_struct *work)
3431 {
3432         struct iwl_priv *priv = container_of(work, struct iwl_priv,
3433                                              _agn.hw_roc_work.work);
3434
3435         mutex_lock(&priv->mutex);
3436         ieee80211_remain_on_channel_expired(priv->hw);
3437         iwlagn_disable_roc(priv);
3438         mutex_unlock(&priv->mutex);
3439 }
3440
3441 static int iwl_mac_remain_on_channel(struct ieee80211_hw *hw,
3442                                      struct ieee80211_channel *channel,
3443                                      enum nl80211_channel_type channel_type,
3444                                      int duration)
3445 {
3446         struct iwl_priv *priv = hw->priv;
3447         int err = 0;
3448
3449         if (!(priv->valid_contexts & BIT(IWL_RXON_CTX_PAN)))
3450                 return -EOPNOTSUPP;
3451
3452         if (!(priv->contexts[IWL_RXON_CTX_PAN].interface_modes &
3453                                         BIT(NL80211_IFTYPE_P2P_CLIENT)))
3454                 return -EOPNOTSUPP;
3455
3456         mutex_lock(&priv->mutex);
3457
3458         if (priv->contexts[IWL_RXON_CTX_PAN].is_active ||
3459             test_bit(STATUS_SCAN_HW, &priv->status)) {
3460                 err = -EBUSY;
3461                 goto out;
3462         }
3463
3464         priv->contexts[IWL_RXON_CTX_PAN].is_active = true;
3465         priv->_agn.hw_roc_channel = channel;
3466         priv->_agn.hw_roc_chantype = channel_type;
3467         priv->_agn.hw_roc_duration = DIV_ROUND_UP(duration * 1000, 1024);
3468         iwlcore_commit_rxon(priv, &priv->contexts[IWL_RXON_CTX_PAN]);
3469         queue_delayed_work(priv->workqueue, &priv->_agn.hw_roc_work,
3470                            msecs_to_jiffies(duration + 20));
3471
3472         msleep(IWL_MIN_SLOT_TIME); /* TU is almost ms */
3473         ieee80211_ready_on_channel(priv->hw);
3474
3475  out:
3476         mutex_unlock(&priv->mutex);
3477
3478         return err;
3479 }
3480
3481 static int iwl_mac_cancel_remain_on_channel(struct ieee80211_hw *hw)
3482 {
3483         struct iwl_priv *priv = hw->priv;
3484
3485         if (!(priv->valid_contexts & BIT(IWL_RXON_CTX_PAN)))
3486                 return -EOPNOTSUPP;
3487
3488         cancel_delayed_work_sync(&priv->_agn.hw_roc_work);
3489
3490         mutex_lock(&priv->mutex);
3491         iwlagn_disable_roc(priv);
3492         mutex_unlock(&priv->mutex);
3493
3494         return 0;
3495 }
3496
3497 /*****************************************************************************
3498  *
3499  * driver setup and teardown
3500  *
3501  *****************************************************************************/
3502
3503 static void iwl_setup_deferred_work(struct iwl_priv *priv)
3504 {
3505         priv->workqueue = create_singlethread_workqueue(DRV_NAME);
3506
3507         init_waitqueue_head(&priv->wait_command_queue);
3508
3509         INIT_WORK(&priv->restart, iwl_bg_restart);
3510         INIT_WORK(&priv->rx_replenish, iwl_bg_rx_replenish);
3511         INIT_WORK(&priv->beacon_update, iwl_bg_beacon_update);
3512         INIT_WORK(&priv->run_time_calib_work, iwl_bg_run_time_calib_work);
3513         INIT_WORK(&priv->tx_flush, iwl_bg_tx_flush);
3514         INIT_WORK(&priv->bt_full_concurrency, iwl_bg_bt_full_concurrency);
3515         INIT_WORK(&priv->bt_runtime_config, iwl_bg_bt_runtime_config);
3516         INIT_DELAYED_WORK(&priv->init_alive_start, iwl_bg_init_alive_start);
3517         INIT_DELAYED_WORK(&priv->alive_start, iwl_bg_alive_start);
3518         INIT_DELAYED_WORK(&priv->_agn.hw_roc_work, iwlagn_bg_roc_done);
3519
3520         iwl_setup_scan_deferred_work(priv);
3521
3522         if (priv->cfg->ops->lib->setup_deferred_work)
3523                 priv->cfg->ops->lib->setup_deferred_work(priv);
3524
3525         init_timer(&priv->statistics_periodic);
3526         priv->statistics_periodic.data = (unsigned long)priv;
3527         priv->statistics_periodic.function = iwl_bg_statistics_periodic;
3528
3529         init_timer(&priv->ucode_trace);
3530         priv->ucode_trace.data = (unsigned long)priv;
3531         priv->ucode_trace.function = iwl_bg_ucode_trace;
3532
3533         init_timer(&priv->watchdog);
3534         priv->watchdog.data = (unsigned long)priv;
3535         priv->watchdog.function = iwl_bg_watchdog;
3536
3537         tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
3538                 iwl_irq_tasklet, (unsigned long)priv);
3539 }
3540
3541 static void iwl_cancel_deferred_work(struct iwl_priv *priv)
3542 {
3543         if (priv->cfg->ops->lib->cancel_deferred_work)
3544                 priv->cfg->ops->lib->cancel_deferred_work(priv);
3545
3546         cancel_delayed_work_sync(&priv->init_alive_start);
3547         cancel_delayed_work(&priv->alive_start);
3548         cancel_work_sync(&priv->run_time_calib_work);
3549         cancel_work_sync(&priv->beacon_update);
3550
3551         iwl_cancel_scan_deferred_work(priv);
3552
3553         cancel_work_sync(&priv->bt_full_concurrency);
3554         cancel_work_sync(&priv->bt_runtime_config);
3555
3556         del_timer_sync(&priv->statistics_periodic);
3557         del_timer_sync(&priv->ucode_trace);
3558 }
3559
3560 static void iwl_init_hw_rates(struct iwl_priv *priv,
3561                               struct ieee80211_rate *rates)
3562 {
3563         int i;
3564
3565         for (i = 0; i < IWL_RATE_COUNT_LEGACY; i++) {
3566                 rates[i].bitrate = iwl_rates[i].ieee * 5;
3567                 rates[i].hw_value = i; /* Rate scaling will work on indexes */
3568                 rates[i].hw_value_short = i;
3569                 rates[i].flags = 0;
3570                 if ((i >= IWL_FIRST_CCK_RATE) && (i <= IWL_LAST_CCK_RATE)) {
3571                         /*
3572                          * If CCK != 1M then set short preamble rate flag.
3573                          */
3574                         rates[i].flags |=
3575                                 (iwl_rates[i].plcp == IWL_RATE_1M_PLCP) ?
3576                                         0 : IEEE80211_RATE_SHORT_PREAMBLE;
3577                 }
3578         }
3579 }
3580
3581 static int iwl_init_drv(struct iwl_priv *priv)
3582 {
3583         int ret;
3584
3585         spin_lock_init(&priv->sta_lock);
3586         spin_lock_init(&priv->hcmd_lock);
3587
3588         INIT_LIST_HEAD(&priv->free_frames);
3589
3590         mutex_init(&priv->mutex);
3591
3592         priv->ieee_channels = NULL;
3593         priv->ieee_rates = NULL;
3594         priv->band = IEEE80211_BAND_2GHZ;
3595
3596         priv->iw_mode = NL80211_IFTYPE_STATION;
3597         priv->current_ht_config.smps = IEEE80211_SMPS_STATIC;
3598         priv->missed_beacon_threshold = IWL_MISSED_BEACON_THRESHOLD_DEF;
3599         priv->_agn.agg_tids_count = 0;
3600
3601         /* initialize force reset */
3602         priv->force_reset[IWL_RF_RESET].reset_duration =
3603                 IWL_DELAY_NEXT_FORCE_RF_RESET;
3604         priv->force_reset[IWL_FW_RESET].reset_duration =
3605                 IWL_DELAY_NEXT_FORCE_FW_RELOAD;
3606
3607         priv->rx_statistics_jiffies = jiffies;
3608
3609         /* Choose which receivers/antennas to use */
3610         if (priv->cfg->ops->hcmd->set_rxon_chain)
3611                 priv->cfg->ops->hcmd->set_rxon_chain(priv,
3612                                         &priv->contexts[IWL_RXON_CTX_BSS]);
3613
3614         iwl_init_scan_params(priv);
3615
3616         /* init bt coex */
3617         if (priv->cfg->bt_params &&
3618             priv->cfg->bt_params->advanced_bt_coexist) {
3619                 priv->kill_ack_mask = IWLAGN_BT_KILL_ACK_MASK_DEFAULT;
3620                 priv->kill_cts_mask = IWLAGN_BT_KILL_CTS_MASK_DEFAULT;
3621                 priv->bt_valid = IWLAGN_BT_ALL_VALID_MSK;
3622                 priv->bt_on_thresh = BT_ON_THRESHOLD_DEF;
3623                 priv->bt_duration = BT_DURATION_LIMIT_DEF;
3624                 priv->dynamic_frag_thresh = BT_FRAG_THRESHOLD_DEF;
3625         }
3626
3627         /* Set the tx_power_user_lmt to the lowest power level
3628          * this value will get overwritten by channel max power avg
3629          * from eeprom */
3630         priv->tx_power_user_lmt = IWLAGN_TX_POWER_TARGET_POWER_MIN;
3631         priv->tx_power_next = IWLAGN_TX_POWER_TARGET_POWER_MIN;
3632
3633         ret = iwl_init_channel_map(priv);
3634         if (ret) {
3635                 IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
3636                 goto err;
3637         }
3638
3639         ret = iwlcore_init_geos(priv);
3640         if (ret) {
3641                 IWL_ERR(priv, "initializing geos failed: %d\n", ret);
3642                 goto err_free_channel_map;
3643         }
3644         iwl_init_hw_rates(priv, priv->ieee_rates);
3645
3646         return 0;
3647
3648 err_free_channel_map:
3649         iwl_free_channel_map(priv);
3650 err:
3651         return ret;
3652 }
3653
3654 static void iwl_uninit_drv(struct iwl_priv *priv)
3655 {
3656         iwl_calib_free_results(priv);
3657         iwlcore_free_geos(priv);
3658         iwl_free_channel_map(priv);
3659         kfree(priv->scan_cmd);
3660 }
3661
3662 struct ieee80211_ops iwlagn_hw_ops = {
3663         .tx = iwlagn_mac_tx,
3664         .start = iwlagn_mac_start,
3665         .stop = iwlagn_mac_stop,
3666         .add_interface = iwl_mac_add_interface,
3667         .remove_interface = iwl_mac_remove_interface,
3668         .change_interface = iwl_mac_change_interface,
3669         .config = iwlagn_mac_config,
3670         .configure_filter = iwlagn_configure_filter,
3671         .set_key = iwlagn_mac_set_key,
3672         .update_tkip_key = iwlagn_mac_update_tkip_key,
3673         .conf_tx = iwl_mac_conf_tx,
3674         .bss_info_changed = iwlagn_bss_info_changed,
3675         .ampdu_action = iwlagn_mac_ampdu_action,
3676         .hw_scan = iwl_mac_hw_scan,
3677         .sta_notify = iwlagn_mac_sta_notify,
3678         .sta_add = iwlagn_mac_sta_add,
3679         .sta_remove = iwl_mac_sta_remove,
3680         .channel_switch = iwlagn_mac_channel_switch,
3681         .flush = iwlagn_mac_flush,
3682         .tx_last_beacon = iwl_mac_tx_last_beacon,
3683         .remain_on_channel = iwl_mac_remain_on_channel,
3684         .cancel_remain_on_channel = iwl_mac_cancel_remain_on_channel,
3685         .offchannel_tx = iwl_mac_offchannel_tx,
3686         .offchannel_tx_cancel_wait = iwl_mac_offchannel_tx_cancel_wait,
3687 };
3688
3689 static void iwl_hw_detect(struct iwl_priv *priv)
3690 {
3691         priv->hw_rev = _iwl_read32(priv, CSR_HW_REV);
3692         priv->hw_wa_rev = _iwl_read32(priv, CSR_HW_REV_WA_REG);
3693         priv->rev_id = priv->pci_dev->revision;
3694         IWL_DEBUG_INFO(priv, "HW Revision ID = 0x%X\n", priv->rev_id);
3695 }
3696
3697 static int iwl_set_hw_params(struct iwl_priv *priv)
3698 {
3699         priv->hw_params.max_rxq_size = RX_QUEUE_SIZE;
3700         priv->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG;
3701         if (priv->cfg->mod_params->amsdu_size_8K)
3702                 priv->hw_params.rx_page_order = get_order(IWL_RX_BUF_SIZE_8K);
3703         else
3704                 priv->hw_params.rx_page_order = get_order(IWL_RX_BUF_SIZE_4K);
3705
3706         priv->hw_params.max_beacon_itrvl = IWL_MAX_UCODE_BEACON_INTERVAL;
3707
3708         if (priv->cfg->mod_params->disable_11n)
3709                 priv->cfg->sku &= ~IWL_SKU_N;
3710
3711         /* Device-specific setup */
3712         return priv->cfg->ops->lib->set_hw_params(priv);
3713 }
3714
3715 static const u8 iwlagn_bss_ac_to_fifo[] = {
3716         IWL_TX_FIFO_VO,
3717         IWL_TX_FIFO_VI,
3718         IWL_TX_FIFO_BE,
3719         IWL_TX_FIFO_BK,
3720 };
3721
3722 static const u8 iwlagn_bss_ac_to_queue[] = {
3723         0, 1, 2, 3,
3724 };
3725
3726 static const u8 iwlagn_pan_ac_to_fifo[] = {
3727         IWL_TX_FIFO_VO_IPAN,
3728         IWL_TX_FIFO_VI_IPAN,
3729         IWL_TX_FIFO_BE_IPAN,
3730         IWL_TX_FIFO_BK_IPAN,
3731 };
3732
3733 static const u8 iwlagn_pan_ac_to_queue[] = {
3734         7, 6, 5, 4,
3735 };
3736
3737 static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
3738 {
3739         int err = 0, i;
3740         struct iwl_priv *priv;
3741         struct ieee80211_hw *hw;
3742         struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
3743         unsigned long flags;
3744         u16 pci_cmd, num_mac;
3745
3746         /************************
3747          * 1. Allocating HW data
3748          ************************/
3749
3750         hw = iwl_alloc_all(cfg);
3751         if (!hw) {
3752                 err = -ENOMEM;
3753                 goto out;
3754         }
3755         priv = hw->priv;
3756         /* At this point both hw and priv are allocated. */
3757
3758         /*
3759          * The default context is always valid,
3760          * more may be discovered when firmware
3761          * is loaded.
3762          */
3763         priv->valid_contexts = BIT(IWL_RXON_CTX_BSS);
3764
3765         for (i = 0; i < NUM_IWL_RXON_CTX; i++)
3766                 priv->contexts[i].ctxid = i;
3767
3768         priv->contexts[IWL_RXON_CTX_BSS].always_active = true;
3769         priv->contexts[IWL_RXON_CTX_BSS].is_active = true;
3770         priv->contexts[IWL_RXON_CTX_BSS].rxon_cmd = REPLY_RXON;
3771         priv->contexts[IWL_RXON_CTX_BSS].rxon_timing_cmd = REPLY_RXON_TIMING;
3772         priv->contexts[IWL_RXON_CTX_BSS].rxon_assoc_cmd = REPLY_RXON_ASSOC;
3773         priv->contexts[IWL_RXON_CTX_BSS].qos_cmd = REPLY_QOS_PARAM;
3774         priv->contexts[IWL_RXON_CTX_BSS].ap_sta_id = IWL_AP_ID;
3775         priv->contexts[IWL_RXON_CTX_BSS].wep_key_cmd = REPLY_WEPKEY;
3776         priv->contexts[IWL_RXON_CTX_BSS].ac_to_fifo = iwlagn_bss_ac_to_fifo;
3777         priv->contexts[IWL_RXON_CTX_BSS].ac_to_queue = iwlagn_bss_ac_to_queue;
3778         priv->contexts[IWL_RXON_CTX_BSS].exclusive_interface_modes =
3779                 BIT(NL80211_IFTYPE_ADHOC);
3780         priv->contexts[IWL_RXON_CTX_BSS].interface_modes =
3781                 BIT(NL80211_IFTYPE_STATION);
3782         priv->contexts[IWL_RXON_CTX_BSS].ap_devtype = RXON_DEV_TYPE_AP;
3783         priv->contexts[IWL_RXON_CTX_BSS].ibss_devtype = RXON_DEV_TYPE_IBSS;
3784         priv->contexts[IWL_RXON_CTX_BSS].station_devtype = RXON_DEV_TYPE_ESS;
3785         priv->contexts[IWL_RXON_CTX_BSS].unused_devtype = RXON_DEV_TYPE_ESS;
3786
3787         priv->contexts[IWL_RXON_CTX_PAN].rxon_cmd = REPLY_WIPAN_RXON;
3788         priv->contexts[IWL_RXON_CTX_PAN].rxon_timing_cmd = REPLY_WIPAN_RXON_TIMING;
3789         priv->contexts[IWL_RXON_CTX_PAN].rxon_assoc_cmd = REPLY_WIPAN_RXON_ASSOC;
3790         priv->contexts[IWL_RXON_CTX_PAN].qos_cmd = REPLY_WIPAN_QOS_PARAM;
3791         priv->contexts[IWL_RXON_CTX_PAN].ap_sta_id = IWL_AP_ID_PAN;
3792         priv->contexts[IWL_RXON_CTX_PAN].wep_key_cmd = REPLY_WIPAN_WEPKEY;
3793         priv->contexts[IWL_RXON_CTX_PAN].bcast_sta_id = IWLAGN_PAN_BCAST_ID;
3794         priv->contexts[IWL_RXON_CTX_PAN].station_flags = STA_FLG_PAN_STATION;
3795         priv->contexts[IWL_RXON_CTX_PAN].ac_to_fifo = iwlagn_pan_ac_to_fifo;
3796         priv->contexts[IWL_RXON_CTX_PAN].ac_to_queue = iwlagn_pan_ac_to_queue;
3797         priv->contexts[IWL_RXON_CTX_PAN].mcast_queue = IWL_IPAN_MCAST_QUEUE;
3798         priv->contexts[IWL_RXON_CTX_PAN].interface_modes =
3799                 BIT(NL80211_IFTYPE_STATION) | BIT(NL80211_IFTYPE_AP);
3800 #ifdef CONFIG_IWL_P2P
3801         priv->contexts[IWL_RXON_CTX_PAN].interface_modes |=
3802                 BIT(NL80211_IFTYPE_P2P_CLIENT) | BIT(NL80211_IFTYPE_P2P_GO);
3803 #endif
3804         priv->contexts[IWL_RXON_CTX_PAN].ap_devtype = RXON_DEV_TYPE_CP;
3805         priv->contexts[IWL_RXON_CTX_PAN].station_devtype = RXON_DEV_TYPE_2STA;
3806         priv->contexts[IWL_RXON_CTX_PAN].unused_devtype = RXON_DEV_TYPE_P2P;
3807
3808         BUILD_BUG_ON(NUM_IWL_RXON_CTX != 2);
3809
3810         SET_IEEE80211_DEV(hw, &pdev->dev);
3811
3812         IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
3813         priv->cfg = cfg;
3814         priv->pci_dev = pdev;
3815         priv->inta_mask = CSR_INI_SET_MASK;
3816
3817         /* is antenna coupling more than 35dB ? */
3818         priv->bt_ant_couple_ok =
3819                 (iwlagn_ant_coupling > IWL_BT_ANTENNA_COUPLING_THRESHOLD) ?
3820                 true : false;
3821
3822         /* enable/disable bt channel inhibition */
3823         priv->bt_ch_announce = iwlagn_bt_ch_announce;
3824         IWL_DEBUG_INFO(priv, "BT channel inhibition is %s\n",
3825                        (priv->bt_ch_announce) ? "On" : "Off");
3826
3827         if (iwl_alloc_traffic_mem(priv))
3828                 IWL_ERR(priv, "Not enough memory to generate traffic log\n");
3829
3830         /**************************
3831          * 2. Initializing PCI bus
3832          **************************/
3833         pci_disable_link_state(pdev, PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1 |
3834                                 PCIE_LINK_STATE_CLKPM);
3835
3836         if (pci_enable_device(pdev)) {
3837                 err = -ENODEV;
3838                 goto out_ieee80211_free_hw;
3839         }
3840
3841         pci_set_master(pdev);
3842
3843         err = pci_set_dma_mask(pdev, DMA_BIT_MASK(36));
3844         if (!err)
3845                 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(36));
3846         if (err) {
3847                 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
3848                 if (!err)
3849                         err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
3850                 /* both attempts failed: */
3851                 if (err) {
3852                         IWL_WARN(priv, "No suitable DMA available.\n");
3853                         goto out_pci_disable_device;
3854                 }
3855         }
3856
3857         err = pci_request_regions(pdev, DRV_NAME);
3858         if (err)
3859                 goto out_pci_disable_device;
3860
3861         pci_set_drvdata(pdev, priv);
3862
3863
3864         /***********************
3865          * 3. Read REV register
3866          ***********************/
3867         priv->hw_base = pci_iomap(pdev, 0, 0);
3868         if (!priv->hw_base) {
3869                 err = -ENODEV;
3870                 goto out_pci_release_regions;
3871         }
3872
3873         IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
3874                 (unsigned long long) pci_resource_len(pdev, 0));
3875         IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
3876
3877         /* these spin locks will be used in apm_ops.init and EEPROM access
3878          * we should init now
3879          */
3880         spin_lock_init(&priv->reg_lock);
3881         spin_lock_init(&priv->lock);
3882
3883         /*
3884          * stop and reset the on-board processor just in case it is in a
3885          * strange state ... like being left stranded by a primary kernel
3886          * and this is now the kdump kernel trying to start up
3887          */
3888         iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
3889
3890         iwl_hw_detect(priv);
3891         IWL_INFO(priv, "Detected %s, REV=0x%X\n",
3892                 priv->cfg->name, priv->hw_rev);
3893
3894         /* We disable the RETRY_TIMEOUT register (0x41) to keep
3895          * PCI Tx retries from interfering with C3 CPU state */
3896         pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
3897
3898         iwl_prepare_card_hw(priv);
3899         if (!priv->hw_ready) {
3900                 IWL_WARN(priv, "Failed, HW not ready\n");
3901                 goto out_iounmap;
3902         }
3903
3904         /*****************
3905          * 4. Read EEPROM
3906          *****************/
3907         /* Read the EEPROM */
3908         err = iwl_eeprom_init(priv);
3909         if (err) {
3910                 IWL_ERR(priv, "Unable to init EEPROM\n");
3911                 goto out_iounmap;
3912         }
3913         err = iwl_eeprom_check_version(priv);
3914         if (err)
3915                 goto out_free_eeprom;
3916
3917         err = iwl_eeprom_check_sku(priv);
3918         if (err)
3919                 goto out_free_eeprom;
3920
3921         /* extract MAC Address */
3922         iwl_eeprom_get_mac(priv, priv->addresses[0].addr);
3923         IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->addresses[0].addr);
3924         priv->hw->wiphy->addresses = priv->addresses;
3925         priv->hw->wiphy->n_addresses = 1;
3926         num_mac = iwl_eeprom_query16(priv, EEPROM_NUM_MAC_ADDRESS);
3927         if (num_mac > 1) {
3928                 memcpy(priv->addresses[1].addr, priv->addresses[0].addr,
3929                        ETH_ALEN);
3930                 priv->addresses[1].addr[5]++;
3931                 priv->hw->wiphy->n_addresses++;
3932         }
3933
3934         /************************
3935          * 5. Setup HW constants
3936          ************************/
3937         if (iwl_set_hw_params(priv)) {
3938                 IWL_ERR(priv, "failed to set hw parameters\n");
3939                 goto out_free_eeprom;
3940         }
3941
3942         /*******************
3943          * 6. Setup priv
3944          *******************/
3945
3946         err = iwl_init_drv(priv);
3947         if (err)
3948                 goto out_free_eeprom;
3949         /* At this point both hw and priv are initialized. */
3950
3951         /********************
3952          * 7. Setup services
3953          ********************/
3954         spin_lock_irqsave(&priv->lock, flags);
3955         iwl_disable_interrupts(priv);
3956         spin_unlock_irqrestore(&priv->lock, flags);
3957
3958         pci_enable_msi(priv->pci_dev);
3959
3960         if (priv->cfg->ops->lib->isr_ops.alloc)
3961                 priv->cfg->ops->lib->isr_ops.alloc(priv);
3962
3963         err = request_irq(priv->pci_dev->irq, priv->cfg->ops->lib->isr_ops.isr,
3964                           IRQF_SHARED, DRV_NAME, priv);
3965         if (err) {
3966                 IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
3967                 goto out_disable_msi;
3968         }
3969
3970         iwl_setup_deferred_work(priv);
3971         iwl_setup_rx_handlers(priv);
3972
3973         /*********************************************
3974          * 8. Enable interrupts and read RFKILL state
3975          *********************************************/
3976
3977         /* enable rfkill interrupt: hw bug w/a */
3978         pci_read_config_word(priv->pci_dev, PCI_COMMAND, &pci_cmd);
3979         if (pci_cmd & PCI_COMMAND_INTX_DISABLE) {
3980                 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
3981                 pci_write_config_word(priv->pci_dev, PCI_COMMAND, pci_cmd);
3982         }
3983
3984         iwl_enable_rfkill_int(priv);
3985
3986         /* If platform's RF_KILL switch is NOT set to KILL */
3987         if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
3988                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3989         else
3990                 set_bit(STATUS_RF_KILL_HW, &priv->status);
3991
3992         wiphy_rfkill_set_hw_state(priv->hw->wiphy,
3993                 test_bit(STATUS_RF_KILL_HW, &priv->status));
3994
3995         iwl_power_initialize(priv);
3996         iwl_tt_initialize(priv);
3997
3998         init_completion(&priv->_agn.firmware_loading_complete);
3999
4000         err = iwl_request_firmware(priv, true);
4001         if (err)
4002                 goto out_destroy_workqueue;
4003
4004         return 0;
4005
4006  out_destroy_workqueue:
4007         destroy_workqueue(priv->workqueue);
4008         priv->workqueue = NULL;
4009         free_irq(priv->pci_dev->irq, priv);
4010         if (priv->cfg->ops->lib->isr_ops.free)
4011                 priv->cfg->ops->lib->isr_ops.free(priv);
4012  out_disable_msi:
4013         pci_disable_msi(priv->pci_dev);
4014         iwl_uninit_drv(priv);
4015  out_free_eeprom:
4016         iwl_eeprom_free(priv);
4017  out_iounmap:
4018         pci_iounmap(pdev, priv->hw_base);
4019  out_pci_release_regions:
4020         pci_set_drvdata(pdev, NULL);
4021         pci_release_regions(pdev);
4022  out_pci_disable_device:
4023         pci_disable_device(pdev);
4024  out_ieee80211_free_hw:
4025         iwl_free_traffic_mem(priv);
4026         ieee80211_free_hw(priv->hw);
4027  out:
4028         return err;
4029 }
4030
4031 static void __devexit iwl_pci_remove(struct pci_dev *pdev)
4032 {
4033         struct iwl_priv *priv = pci_get_drvdata(pdev);
4034         unsigned long flags;
4035
4036         if (!priv)
4037                 return;
4038
4039         wait_for_completion(&priv->_agn.firmware_loading_complete);
4040
4041         IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
4042
4043         iwl_dbgfs_unregister(priv);
4044         sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
4045
4046         /* ieee80211_unregister_hw call wil cause iwl_mac_stop to
4047          * to be called and iwl_down since we are removing the device
4048          * we need to set STATUS_EXIT_PENDING bit.
4049          */
4050         set_bit(STATUS_EXIT_PENDING, &priv->status);
4051
4052         iwl_leds_exit(priv);
4053
4054         if (priv->mac80211_registered) {
4055                 ieee80211_unregister_hw(priv->hw);
4056                 priv->mac80211_registered = 0;
4057         } else {
4058                 iwl_down(priv);
4059         }
4060
4061         /*
4062          * Make sure device is reset to low power before unloading driver.
4063          * This may be redundant with iwl_down(), but there are paths to
4064          * run iwl_down() without calling apm_ops.stop(), and there are
4065          * paths to avoid running iwl_down() at all before leaving driver.
4066          * This (inexpensive) call *makes sure* device is reset.
4067          */
4068         iwl_apm_stop(priv);
4069
4070         iwl_tt_exit(priv);
4071
4072         /* make sure we flush any pending irq or
4073          * tasklet for the driver
4074          */
4075         spin_lock_irqsave(&priv->lock, flags);
4076         iwl_disable_interrupts(priv);
4077         spin_unlock_irqrestore(&priv->lock, flags);
4078
4079         iwl_synchronize_irq(priv);
4080
4081         iwl_dealloc_ucode_pci(priv);
4082
4083         if (priv->rxq.bd)
4084                 iwlagn_rx_queue_free(priv, &priv->rxq);
4085         iwlagn_hw_txq_ctx_free(priv);
4086
4087         iwl_eeprom_free(priv);
4088
4089
4090         /*netif_stop_queue(dev); */
4091         flush_workqueue(priv->workqueue);
4092
4093         /* ieee80211_unregister_hw calls iwl_mac_stop, which flushes
4094          * priv->workqueue... so we can't take down the workqueue
4095          * until now... */
4096         destroy_workqueue(priv->workqueue);
4097         priv->workqueue = NULL;
4098         iwl_free_traffic_mem(priv);
4099
4100         free_irq(priv->pci_dev->irq, priv);
4101         pci_disable_msi(priv->pci_dev);
4102         pci_iounmap(pdev, priv->hw_base);
4103         pci_release_regions(pdev);
4104         pci_disable_device(pdev);
4105         pci_set_drvdata(pdev, NULL);
4106
4107         iwl_uninit_drv(priv);
4108
4109         if (priv->cfg->ops->lib->isr_ops.free)
4110                 priv->cfg->ops->lib->isr_ops.free(priv);
4111
4112         dev_kfree_skb(priv->beacon_skb);
4113
4114         ieee80211_free_hw(priv->hw);
4115 }
4116
4117
4118 /*****************************************************************************
4119  *
4120  * driver and module entry point
4121  *
4122  *****************************************************************************/
4123
4124 /* Hardware specific file defines the PCI IDs table for that hardware module */
4125 static DEFINE_PCI_DEVICE_TABLE(iwl_hw_card_ids) = {
4126         {IWL_PCI_DEVICE(0x4232, 0x1201, iwl5100_agn_cfg)}, /* Mini Card */
4127         {IWL_PCI_DEVICE(0x4232, 0x1301, iwl5100_agn_cfg)}, /* Half Mini Card */
4128         {IWL_PCI_DEVICE(0x4232, 0x1204, iwl5100_agn_cfg)}, /* Mini Card */
4129         {IWL_PCI_DEVICE(0x4232, 0x1304, iwl5100_agn_cfg)}, /* Half Mini Card */
4130         {IWL_PCI_DEVICE(0x4232, 0x1205, iwl5100_bgn_cfg)}, /* Mini Card */
4131         {IWL_PCI_DEVICE(0x4232, 0x1305, iwl5100_bgn_cfg)}, /* Half Mini Card */
4132         {IWL_PCI_DEVICE(0x4232, 0x1206, iwl5100_abg_cfg)}, /* Mini Card */
4133         {IWL_PCI_DEVICE(0x4232, 0x1306, iwl5100_abg_cfg)}, /* Half Mini Card */
4134         {IWL_PCI_DEVICE(0x4232, 0x1221, iwl5100_agn_cfg)}, /* Mini Card */
4135         {IWL_PCI_DEVICE(0x4232, 0x1321, iwl5100_agn_cfg)}, /* Half Mini Card */
4136         {IWL_PCI_DEVICE(0x4232, 0x1224, iwl5100_agn_cfg)}, /* Mini Card */
4137         {IWL_PCI_DEVICE(0x4232, 0x1324, iwl5100_agn_cfg)}, /* Half Mini Card */
4138         {IWL_PCI_DEVICE(0x4232, 0x1225, iwl5100_bgn_cfg)}, /* Mini Card */
4139         {IWL_PCI_DEVICE(0x4232, 0x1325, iwl5100_bgn_cfg)}, /* Half Mini Card */
4140         {IWL_PCI_DEVICE(0x4232, 0x1226, iwl5100_abg_cfg)}, /* Mini Card */
4141         {IWL_PCI_DEVICE(0x4232, 0x1326, iwl5100_abg_cfg)}, /* Half Mini Card */
4142         {IWL_PCI_DEVICE(0x4237, 0x1211, iwl5100_agn_cfg)}, /* Mini Card */
4143         {IWL_PCI_DEVICE(0x4237, 0x1311, iwl5100_agn_cfg)}, /* Half Mini Card */
4144         {IWL_PCI_DEVICE(0x4237, 0x1214, iwl5100_agn_cfg)}, /* Mini Card */
4145         {IWL_PCI_DEVICE(0x4237, 0x1314, iwl5100_agn_cfg)}, /* Half Mini Card */
4146         {IWL_PCI_DEVICE(0x4237, 0x1215, iwl5100_bgn_cfg)}, /* Mini Card */
4147         {IWL_PCI_DEVICE(0x4237, 0x1315, iwl5100_bgn_cfg)}, /* Half Mini Card */
4148         {IWL_PCI_DEVICE(0x4237, 0x1216, iwl5100_abg_cfg)}, /* Mini Card */
4149         {IWL_PCI_DEVICE(0x4237, 0x1316, iwl5100_abg_cfg)}, /* Half Mini Card */
4150
4151 /* 5300 Series WiFi */
4152         {IWL_PCI_DEVICE(0x4235, 0x1021, iwl5300_agn_cfg)}, /* Mini Card */
4153         {IWL_PCI_DEVICE(0x4235, 0x1121, iwl5300_agn_cfg)}, /* Half Mini Card */
4154         {IWL_PCI_DEVICE(0x4235, 0x1024, iwl5300_agn_cfg)}, /* Mini Card */
4155         {IWL_PCI_DEVICE(0x4235, 0x1124, iwl5300_agn_cfg)}, /* Half Mini Card */
4156         {IWL_PCI_DEVICE(0x4235, 0x1001, iwl5300_agn_cfg)}, /* Mini Card */
4157         {IWL_PCI_DEVICE(0x4235, 0x1101, iwl5300_agn_cfg)}, /* Half Mini Card */
4158         {IWL_PCI_DEVICE(0x4235, 0x1004, iwl5300_agn_cfg)}, /* Mini Card */
4159         {IWL_PCI_DEVICE(0x4235, 0x1104, iwl5300_agn_cfg)}, /* Half Mini Card */
4160         {IWL_PCI_DEVICE(0x4236, 0x1011, iwl5300_agn_cfg)}, /* Mini Card */
4161         {IWL_PCI_DEVICE(0x4236, 0x1111, iwl5300_agn_cfg)}, /* Half Mini Card */
4162         {IWL_PCI_DEVICE(0x4236, 0x1014, iwl5300_agn_cfg)}, /* Mini Card */
4163         {IWL_PCI_DEVICE(0x4236, 0x1114, iwl5300_agn_cfg)}, /* Half Mini Card */
4164
4165 /* 5350 Series WiFi/WiMax */
4166         {IWL_PCI_DEVICE(0x423A, 0x1001, iwl5350_agn_cfg)}, /* Mini Card */
4167         {IWL_PCI_DEVICE(0x423A, 0x1021, iwl5350_agn_cfg)}, /* Mini Card */
4168         {IWL_PCI_DEVICE(0x423B, 0x1011, iwl5350_agn_cfg)}, /* Mini Card */
4169
4170 /* 5150 Series Wifi/WiMax */
4171         {IWL_PCI_DEVICE(0x423C, 0x1201, iwl5150_agn_cfg)}, /* Mini Card */
4172         {IWL_PCI_DEVICE(0x423C, 0x1301, iwl5150_agn_cfg)}, /* Half Mini Card */
4173         {IWL_PCI_DEVICE(0x423C, 0x1206, iwl5150_abg_cfg)}, /* Mini Card */
4174         {IWL_PCI_DEVICE(0x423C, 0x1306, iwl5150_abg_cfg)}, /* Half Mini Card */
4175         {IWL_PCI_DEVICE(0x423C, 0x1221, iwl5150_agn_cfg)}, /* Mini Card */
4176         {IWL_PCI_DEVICE(0x423C, 0x1321, iwl5150_agn_cfg)}, /* Half Mini Card */
4177
4178         {IWL_PCI_DEVICE(0x423D, 0x1211, iwl5150_agn_cfg)}, /* Mini Card */
4179         {IWL_PCI_DEVICE(0x423D, 0x1311, iwl5150_agn_cfg)}, /* Half Mini Card */
4180         {IWL_PCI_DEVICE(0x423D, 0x1216, iwl5150_abg_cfg)}, /* Mini Card */
4181         {IWL_PCI_DEVICE(0x423D, 0x1316, iwl5150_abg_cfg)}, /* Half Mini Card */
4182
4183 /* 6x00 Series */
4184         {IWL_PCI_DEVICE(0x422B, 0x1101, iwl6000_3agn_cfg)},
4185         {IWL_PCI_DEVICE(0x422B, 0x1121, iwl6000_3agn_cfg)},
4186         {IWL_PCI_DEVICE(0x422C, 0x1301, iwl6000i_2agn_cfg)},
4187         {IWL_PCI_DEVICE(0x422C, 0x1306, iwl6000i_2abg_cfg)},
4188         {IWL_PCI_DEVICE(0x422C, 0x1307, iwl6000i_2bg_cfg)},
4189         {IWL_PCI_DEVICE(0x422C, 0x1321, iwl6000i_2agn_cfg)},
4190         {IWL_PCI_DEVICE(0x422C, 0x1326, iwl6000i_2abg_cfg)},
4191         {IWL_PCI_DEVICE(0x4238, 0x1111, iwl6000_3agn_cfg)},
4192         {IWL_PCI_DEVICE(0x4239, 0x1311, iwl6000i_2agn_cfg)},
4193         {IWL_PCI_DEVICE(0x4239, 0x1316, iwl6000i_2abg_cfg)},
4194
4195 /* 6x05 Series */
4196         {IWL_PCI_DEVICE(0x0082, 0x1301, iwl6005_2agn_cfg)},
4197         {IWL_PCI_DEVICE(0x0082, 0x1306, iwl6005_2abg_cfg)},
4198         {IWL_PCI_DEVICE(0x0082, 0x1307, iwl6005_2bg_cfg)},
4199         {IWL_PCI_DEVICE(0x0082, 0x1321, iwl6005_2agn_cfg)},
4200         {IWL_PCI_DEVICE(0x0082, 0x1326, iwl6005_2abg_cfg)},
4201         {IWL_PCI_DEVICE(0x0085, 0x1311, iwl6005_2agn_cfg)},
4202         {IWL_PCI_DEVICE(0x0085, 0x1316, iwl6005_2abg_cfg)},
4203
4204 /* 6x30 Series */
4205         {IWL_PCI_DEVICE(0x008A, 0x5305, iwl1030_bgn_cfg)},
4206         {IWL_PCI_DEVICE(0x008A, 0x5307, iwl1030_bg_cfg)},
4207         {IWL_PCI_DEVICE(0x008A, 0x5325, iwl1030_bgn_cfg)},
4208         {IWL_PCI_DEVICE(0x008A, 0x5327, iwl1030_bg_cfg)},
4209         {IWL_PCI_DEVICE(0x008B, 0x5315, iwl1030_bgn_cfg)},
4210         {IWL_PCI_DEVICE(0x008B, 0x5317, iwl1030_bg_cfg)},
4211         {IWL_PCI_DEVICE(0x0090, 0x5211, iwl6030_2agn_cfg)},
4212         {IWL_PCI_DEVICE(0x0090, 0x5215, iwl6030_2bgn_cfg)},
4213         {IWL_PCI_DEVICE(0x0090, 0x5216, iwl6030_2abg_cfg)},
4214         {IWL_PCI_DEVICE(0x0091, 0x5201, iwl6030_2agn_cfg)},
4215         {IWL_PCI_DEVICE(0x0091, 0x5205, iwl6030_2bgn_cfg)},
4216         {IWL_PCI_DEVICE(0x0091, 0x5206, iwl6030_2abg_cfg)},
4217         {IWL_PCI_DEVICE(0x0091, 0x5207, iwl6030_2bg_cfg)},
4218         {IWL_PCI_DEVICE(0x0091, 0x5221, iwl6030_2agn_cfg)},
4219         {IWL_PCI_DEVICE(0x0091, 0x5225, iwl6030_2bgn_cfg)},
4220         {IWL_PCI_DEVICE(0x0091, 0x5226, iwl6030_2abg_cfg)},
4221
4222 /* 6x50 WiFi/WiMax Series */
4223         {IWL_PCI_DEVICE(0x0087, 0x1301, iwl6050_2agn_cfg)},
4224         {IWL_PCI_DEVICE(0x0087, 0x1306, iwl6050_2abg_cfg)},
4225         {IWL_PCI_DEVICE(0x0087, 0x1321, iwl6050_2agn_cfg)},
4226         {IWL_PCI_DEVICE(0x0087, 0x1326, iwl6050_2abg_cfg)},
4227         {IWL_PCI_DEVICE(0x0089, 0x1311, iwl6050_2agn_cfg)},
4228         {IWL_PCI_DEVICE(0x0089, 0x1316, iwl6050_2abg_cfg)},
4229
4230 /* 6150 WiFi/WiMax Series */
4231         {IWL_PCI_DEVICE(0x0885, 0x1305, iwl6150_bgn_cfg)},
4232         {IWL_PCI_DEVICE(0x0885, 0x1306, iwl6150_bgn_cfg)},
4233         {IWL_PCI_DEVICE(0x0885, 0x1325, iwl6150_bgn_cfg)},
4234         {IWL_PCI_DEVICE(0x0885, 0x1326, iwl6150_bgn_cfg)},
4235         {IWL_PCI_DEVICE(0x0886, 0x1315, iwl6150_bgn_cfg)},
4236         {IWL_PCI_DEVICE(0x0886, 0x1316, iwl6150_bgn_cfg)},
4237
4238 /* 1000 Series WiFi */
4239         {IWL_PCI_DEVICE(0x0083, 0x1205, iwl1000_bgn_cfg)},
4240         {IWL_PCI_DEVICE(0x0083, 0x1305, iwl1000_bgn_cfg)},
4241         {IWL_PCI_DEVICE(0x0083, 0x1225, iwl1000_bgn_cfg)},
4242         {IWL_PCI_DEVICE(0x0083, 0x1325, iwl1000_bgn_cfg)},
4243         {IWL_PCI_DEVICE(0x0084, 0x1215, iwl1000_bgn_cfg)},
4244         {IWL_PCI_DEVICE(0x0084, 0x1315, iwl1000_bgn_cfg)},
4245         {IWL_PCI_DEVICE(0x0083, 0x1206, iwl1000_bg_cfg)},
4246         {IWL_PCI_DEVICE(0x0083, 0x1306, iwl1000_bg_cfg)},
4247         {IWL_PCI_DEVICE(0x0083, 0x1226, iwl1000_bg_cfg)},
4248         {IWL_PCI_DEVICE(0x0083, 0x1326, iwl1000_bg_cfg)},
4249         {IWL_PCI_DEVICE(0x0084, 0x1216, iwl1000_bg_cfg)},
4250         {IWL_PCI_DEVICE(0x0084, 0x1316, iwl1000_bg_cfg)},
4251
4252 /* 100 Series WiFi */
4253         {IWL_PCI_DEVICE(0x08AE, 0x1005, iwl100_bgn_cfg)},
4254         {IWL_PCI_DEVICE(0x08AE, 0x1007, iwl100_bg_cfg)},
4255         {IWL_PCI_DEVICE(0x08AF, 0x1015, iwl100_bgn_cfg)},
4256         {IWL_PCI_DEVICE(0x08AF, 0x1017, iwl100_bg_cfg)},
4257         {IWL_PCI_DEVICE(0x08AE, 0x1025, iwl100_bgn_cfg)},
4258         {IWL_PCI_DEVICE(0x08AE, 0x1027, iwl100_bg_cfg)},
4259
4260 /* 130 Series WiFi */
4261         {IWL_PCI_DEVICE(0x0896, 0x5005, iwl130_bgn_cfg)},
4262         {IWL_PCI_DEVICE(0x0896, 0x5007, iwl130_bg_cfg)},
4263         {IWL_PCI_DEVICE(0x0897, 0x5015, iwl130_bgn_cfg)},
4264         {IWL_PCI_DEVICE(0x0897, 0x5017, iwl130_bg_cfg)},
4265         {IWL_PCI_DEVICE(0x0896, 0x5025, iwl130_bgn_cfg)},
4266         {IWL_PCI_DEVICE(0x0896, 0x5027, iwl130_bg_cfg)},
4267
4268 /* 2x00 Series */
4269         {IWL_PCI_DEVICE(0x0890, 0x4022, iwl2000_2bgn_cfg)},
4270         {IWL_PCI_DEVICE(0x0891, 0x4222, iwl2000_2bgn_cfg)},
4271         {IWL_PCI_DEVICE(0x0890, 0x4422, iwl2000_2bgn_cfg)},
4272         {IWL_PCI_DEVICE(0x0890, 0x4026, iwl2000_2bg_cfg)},
4273         {IWL_PCI_DEVICE(0x0891, 0x4226, iwl2000_2bg_cfg)},
4274         {IWL_PCI_DEVICE(0x0890, 0x4426, iwl2000_2bg_cfg)},
4275
4276 /* 2x30 Series */
4277         {IWL_PCI_DEVICE(0x0887, 0x4062, iwl2030_2bgn_cfg)},
4278         {IWL_PCI_DEVICE(0x0888, 0x4262, iwl2030_2bgn_cfg)},
4279         {IWL_PCI_DEVICE(0x0887, 0x4462, iwl2030_2bgn_cfg)},
4280         {IWL_PCI_DEVICE(0x0887, 0x4066, iwl2030_2bg_cfg)},
4281         {IWL_PCI_DEVICE(0x0888, 0x4266, iwl2030_2bg_cfg)},
4282         {IWL_PCI_DEVICE(0x0887, 0x4466, iwl2030_2bg_cfg)},
4283
4284 /* 6x35 Series */
4285         {IWL_PCI_DEVICE(0x088E, 0x4060, iwl6035_2agn_cfg)},
4286         {IWL_PCI_DEVICE(0x088F, 0x4260, iwl6035_2agn_cfg)},
4287         {IWL_PCI_DEVICE(0x088E, 0x4460, iwl6035_2agn_cfg)},
4288         {IWL_PCI_DEVICE(0x088E, 0x4064, iwl6035_2abg_cfg)},
4289         {IWL_PCI_DEVICE(0x088F, 0x4264, iwl6035_2abg_cfg)},
4290         {IWL_PCI_DEVICE(0x088E, 0x4464, iwl6035_2abg_cfg)},
4291         {IWL_PCI_DEVICE(0x088E, 0x4066, iwl6035_2bg_cfg)},
4292         {IWL_PCI_DEVICE(0x088F, 0x4266, iwl6035_2bg_cfg)},
4293         {IWL_PCI_DEVICE(0x088E, 0x4466, iwl6035_2bg_cfg)},
4294
4295 /* 200 Series */
4296         {IWL_PCI_DEVICE(0x0894, 0x0022, iwl200_bgn_cfg)},
4297         {IWL_PCI_DEVICE(0x0895, 0x0222, iwl200_bgn_cfg)},
4298         {IWL_PCI_DEVICE(0x0894, 0x0422, iwl200_bgn_cfg)},
4299         {IWL_PCI_DEVICE(0x0894, 0x0026, iwl200_bg_cfg)},
4300         {IWL_PCI_DEVICE(0x0895, 0x0226, iwl200_bg_cfg)},
4301         {IWL_PCI_DEVICE(0x0894, 0x0426, iwl200_bg_cfg)},
4302
4303 /* 230 Series */
4304         {IWL_PCI_DEVICE(0x0892, 0x0062, iwl230_bgn_cfg)},
4305         {IWL_PCI_DEVICE(0x0893, 0x0262, iwl230_bgn_cfg)},
4306         {IWL_PCI_DEVICE(0x0892, 0x0462, iwl230_bgn_cfg)},
4307         {IWL_PCI_DEVICE(0x0892, 0x0066, iwl230_bg_cfg)},
4308         {IWL_PCI_DEVICE(0x0893, 0x0266, iwl230_bg_cfg)},
4309         {IWL_PCI_DEVICE(0x0892, 0x0466, iwl230_bg_cfg)},
4310
4311         {0}
4312 };
4313 MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids);
4314
4315 static struct pci_driver iwl_driver = {
4316         .name = DRV_NAME,
4317         .id_table = iwl_hw_card_ids,
4318         .probe = iwl_pci_probe,
4319         .remove = __devexit_p(iwl_pci_remove),
4320         .driver.pm = IWL_PM_OPS,
4321 };
4322
4323 static int __init iwl_init(void)
4324 {
4325
4326         int ret;
4327         pr_info(DRV_DESCRIPTION ", " DRV_VERSION "\n");
4328         pr_info(DRV_COPYRIGHT "\n");
4329
4330         ret = iwlagn_rate_control_register();
4331         if (ret) {
4332                 pr_err("Unable to register rate control algorithm: %d\n", ret);
4333                 return ret;
4334         }
4335
4336         ret = pci_register_driver(&iwl_driver);
4337         if (ret) {
4338                 pr_err("Unable to initialize PCI module\n");
4339                 goto error_register;
4340         }
4341
4342         return ret;
4343
4344 error_register:
4345         iwlagn_rate_control_unregister();
4346         return ret;
4347 }
4348
4349 static void __exit iwl_exit(void)
4350 {
4351         pci_unregister_driver(&iwl_driver);
4352         iwlagn_rate_control_unregister();
4353 }
4354
4355 module_exit(iwl_exit);
4356 module_init(iwl_init);
4357
4358 #ifdef CONFIG_IWLWIFI_DEBUG
4359 module_param_named(debug, iwl_debug_level, uint, S_IRUGO | S_IWUSR);
4360 MODULE_PARM_DESC(debug, "debug output mask");
4361 #endif
4362
4363 module_param_named(swcrypto, iwlagn_mod_params.sw_crypto, int, S_IRUGO);
4364 MODULE_PARM_DESC(swcrypto, "using crypto in software (default 0 [hardware])");
4365 module_param_named(queues_num, iwlagn_mod_params.num_of_queues, int, S_IRUGO);
4366 MODULE_PARM_DESC(queues_num, "number of hw queues.");
4367 module_param_named(11n_disable, iwlagn_mod_params.disable_11n, int, S_IRUGO);
4368 MODULE_PARM_DESC(11n_disable, "disable 11n functionality");
4369 module_param_named(amsdu_size_8K, iwlagn_mod_params.amsdu_size_8K,
4370                    int, S_IRUGO);
4371 MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size");
4372 module_param_named(fw_restart, iwlagn_mod_params.restart_fw, int, S_IRUGO);
4373 MODULE_PARM_DESC(fw_restart, "restart firmware in case of error");
4374
4375 module_param_named(ucode_alternative, iwlagn_wanted_ucode_alternative, int,
4376                    S_IRUGO);
4377 MODULE_PARM_DESC(ucode_alternative,
4378                  "specify ucode alternative to use from ucode file");
4379
4380 module_param_named(antenna_coupling, iwlagn_ant_coupling, int, S_IRUGO);
4381 MODULE_PARM_DESC(antenna_coupling,
4382                  "specify antenna coupling in dB (defualt: 0 dB)");
4383
4384 module_param_named(bt_ch_inhibition, iwlagn_bt_ch_announce, bool, S_IRUGO);
4385 MODULE_PARM_DESC(bt_ch_inhibition,
4386                  "Disable BT channel inhibition (default: enable)");
4387
4388 module_param_named(plcp_check, iwlagn_mod_params.plcp_check, bool, S_IRUGO);
4389 MODULE_PARM_DESC(plcp_check, "Check plcp health (default: 1 [enabled])");
4390
4391 module_param_named(ack_check, iwlagn_mod_params.ack_check, bool, S_IRUGO);
4392 MODULE_PARM_DESC(ack_check, "Check ack health (default: 0 [disabled])");