drivers/net/wireless/iwlwifi/iwl-agn-ucode.c

   1 /******************************************************************************
   2  *
   3  * GPL LICENSE SUMMARY
   4  *
   5  * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of version 2 of the GNU General Public License as
   9  * published by the Free Software Foundation.
  10  *
  11  * This program is distributed in the hope that it will be useful, but
  12  * WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14  * General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
  19  * USA
  20  *
  21  * The full GNU General Public License is included in this distribution
  22  * in the file called LICENSE.GPL.
  23  *
  24  * Contact Information:
  25  *  Intel Linux Wireless <ilw@linux.intel.com>
  26  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27  *
  28  *****************************************************************************/
  29
  30 #include <linux/kernel.h>
  31 #include <linux/module.h>
  32 #include <linux/init.h>
  33 #include <linux/sched.h>
  34
  35 #include "iwl-dev.h"
  36 #include "iwl-core.h"
  37 #include "iwl-io.h"
  38 #include "iwl-helpers.h"
  39 #include "iwl-agn-hw.h"
  40 #include "iwl-agn.h"
  41 #include "iwl-agn-calib.h"
  42 #include "iwl-trans.h"
  43 #include "iwl-fh.h"
  44
  45 static struct iwl_wimax_coex_event_entry cu_priorities[COEX_NUM_OF_EVENTS] = {
  46         {COEX_CU_UNASSOC_IDLE_RP, COEX_CU_UNASSOC_IDLE_WP,
  47          0, COEX_UNASSOC_IDLE_FLAGS},
  48         {COEX_CU_UNASSOC_MANUAL_SCAN_RP, COEX_CU_UNASSOC_MANUAL_SCAN_WP,
  49          0, COEX_UNASSOC_MANUAL_SCAN_FLAGS},
  50         {COEX_CU_UNASSOC_AUTO_SCAN_RP, COEX_CU_UNASSOC_AUTO_SCAN_WP,
  51          0, COEX_UNASSOC_AUTO_SCAN_FLAGS},
  52         {COEX_CU_CALIBRATION_RP, COEX_CU_CALIBRATION_WP,
  53          0, COEX_CALIBRATION_FLAGS},
  54         {COEX_CU_PERIODIC_CALIBRATION_RP, COEX_CU_PERIODIC_CALIBRATION_WP,
  55          0, COEX_PERIODIC_CALIBRATION_FLAGS},
  56         {COEX_CU_CONNECTION_ESTAB_RP, COEX_CU_CONNECTION_ESTAB_WP,
  57          0, COEX_CONNECTION_ESTAB_FLAGS},
  58         {COEX_CU_ASSOCIATED_IDLE_RP, COEX_CU_ASSOCIATED_IDLE_WP,
  59          0, COEX_ASSOCIATED_IDLE_FLAGS},
  60         {COEX_CU_ASSOC_MANUAL_SCAN_RP, COEX_CU_ASSOC_MANUAL_SCAN_WP,
  61          0, COEX_ASSOC_MANUAL_SCAN_FLAGS},
  62         {COEX_CU_ASSOC_AUTO_SCAN_RP, COEX_CU_ASSOC_AUTO_SCAN_WP,
  63          0, COEX_ASSOC_AUTO_SCAN_FLAGS},
  64         {COEX_CU_ASSOC_ACTIVE_LEVEL_RP, COEX_CU_ASSOC_ACTIVE_LEVEL_WP,
  65          0, COEX_ASSOC_ACTIVE_LEVEL_FLAGS},
  66         {COEX_CU_RF_ON_RP, COEX_CU_RF_ON_WP, 0, COEX_CU_RF_ON_FLAGS},
  67         {COEX_CU_RF_OFF_RP, COEX_CU_RF_OFF_WP, 0, COEX_RF_OFF_FLAGS},
  68         {COEX_CU_STAND_ALONE_DEBUG_RP, COEX_CU_STAND_ALONE_DEBUG_WP,
  69          0, COEX_STAND_ALONE_DEBUG_FLAGS},
  70         {COEX_CU_IPAN_ASSOC_LEVEL_RP, COEX_CU_IPAN_ASSOC_LEVEL_WP,
  71          0, COEX_IPAN_ASSOC_LEVEL_FLAGS},
  72         {COEX_CU_RSRVD1_RP, COEX_CU_RSRVD1_WP, 0, COEX_RSRVD1_FLAGS},
  73         {COEX_CU_RSRVD2_RP, COEX_CU_RSRVD2_WP, 0, COEX_RSRVD2_FLAGS}
  74 };
  75
  76 /*
  77  * ucode
  78  */
  79 static int iwlagn_load_section(struct iwl_priv *priv, const char *name,
  80                                 struct fw_desc *image, u32 dst_addr)
  81 {
  82         dma_addr_t phy_addr = image->p_addr;
  83         u32 byte_cnt = image->len;
  84         int ret;
  85
  86         priv->ucode_write_complete = 0;
  87
  88         iwl_write_direct32(bus(priv),
  89                 FH_TCSR_CHNL_TX_CONFIG_REG(FH_SRVC_CHNL),
  90                 FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_PAUSE);
  91
  92         iwl_write_direct32(bus(priv),
  93                 FH_SRVC_CHNL_SRAM_ADDR_REG(FH_SRVC_CHNL), dst_addr);
  94
  95         iwl_write_direct32(bus(priv),
  96                 FH_TFDIB_CTRL0_REG(FH_SRVC_CHNL),
  97                 phy_addr & FH_MEM_TFDIB_DRAM_ADDR_LSB_MSK);
  98
  99         iwl_write_direct32(bus(priv),
 100                 FH_TFDIB_CTRL1_REG(FH_SRVC_CHNL),
 101                 (iwl_get_dma_hi_addr(phy_addr)
 102                         << FH_MEM_TFDIB_REG1_ADDR_BITSHIFT) | byte_cnt);
 103
 104         iwl_write_direct32(bus(priv),
 105                 FH_TCSR_CHNL_TX_BUF_STS_REG(FH_SRVC_CHNL),
 106                 1 << FH_TCSR_CHNL_TX_BUF_STS_REG_POS_TB_NUM |
 107                 1 << FH_TCSR_CHNL_TX_BUF_STS_REG_POS_TB_IDX |
 108                 FH_TCSR_CHNL_TX_BUF_STS_REG_VAL_TFDB_VALID);
 109
 110         iwl_write_direct32(bus(priv),
 111                 FH_TCSR_CHNL_TX_CONFIG_REG(FH_SRVC_CHNL),
 112                 FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE       |
 113                 FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_DISABLE    |
 114                 FH_TCSR_TX_CONFIG_REG_VAL_CIRQ_HOST_ENDTFD);
 115
 116         IWL_DEBUG_FW(priv, "%s uCode section being loaded...\n", name);
 117         ret = wait_event_timeout(priv->shrd->wait_command_queue,
 118                                  priv->ucode_write_complete, 5 * HZ);
 119         if (!ret) {
 120                 IWL_ERR(priv, "Could not load the %s uCode section\n",
 121                         name);
 122                 return -ETIMEDOUT;
 123         }
 124
 125         return 0;
 126 }
 127
 128 static int iwlagn_load_given_ucode(struct iwl_priv *priv,
 129                                    struct fw_img *image)
 130 {
 131         int ret = 0;
 132
 133         ret = iwlagn_load_section(priv, "INST", &image->code,
 134                                    IWLAGN_RTC_INST_LOWER_BOUND);
 135         if (ret)
 136                 return ret;
 137
 138         return iwlagn_load_section(priv, "DATA", &image->data,
 139                                     IWLAGN_RTC_DATA_LOWER_BOUND);
 140 }
 141
 142 /*
 143  *  Calibration
 144  */
 145 static int iwlagn_set_Xtal_calib(struct iwl_priv *priv)
 146 {
 147         struct iwl_calib_xtal_freq_cmd cmd;
 148         __le16 *xtal_calib =
 149                 (__le16 *)iwl_eeprom_query_addr(priv, EEPROM_XTAL);
 150
 151         iwl_set_calib_hdr(&cmd.hdr, IWL_PHY_CALIBRATE_CRYSTAL_FRQ_CMD);
 152         cmd.cap_pin1 = le16_to_cpu(xtal_calib[0]);
 153         cmd.cap_pin2 = le16_to_cpu(xtal_calib[1]);
 154         return iwl_calib_set(&priv->calib_results[IWL_CALIB_XTAL],
 155                              (u8 *)&cmd, sizeof(cmd));
 156 }
 157
 158 static int iwlagn_set_temperature_offset_calib(struct iwl_priv *priv)
 159 {
 160         struct iwl_calib_temperature_offset_cmd cmd;
 161         __le16 *offset_calib =
 162                 (__le16 *)iwl_eeprom_query_addr(priv, EEPROM_RAW_TEMPERATURE);
 163
 164         memset(&cmd, 0, sizeof(cmd));
 165         iwl_set_calib_hdr(&cmd.hdr, IWL_PHY_CALIBRATE_TEMP_OFFSET_CMD);
 166         memcpy(&cmd.radio_sensor_offset, offset_calib, sizeof(*offset_calib));
 167         if (!(cmd.radio_sensor_offset))
 168                 cmd.radio_sensor_offset = DEFAULT_RADIO_SENSOR_OFFSET;
 169
 170         IWL_DEBUG_CALIB(priv, "Radio sensor offset: %d\n",
 171                         le16_to_cpu(cmd.radio_sensor_offset));
 172         return iwl_calib_set(&priv->calib_results[IWL_CALIB_TEMP_OFFSET],
 173                              (u8 *)&cmd, sizeof(cmd));
 174 }
 175
 176 static int iwlagn_set_temperature_offset_calib_v2(struct iwl_priv *priv)
 177 {
 178         struct iwl_calib_temperature_offset_v2_cmd cmd;
 179         __le16 *offset_calib_high = (__le16 *)iwl_eeprom_query_addr(priv,
 180                                      EEPROM_KELVIN_TEMPERATURE);
 181         __le16 *offset_calib_low =
 182                 (__le16 *)iwl_eeprom_query_addr(priv, EEPROM_RAW_TEMPERATURE);
 183         struct iwl_eeprom_calib_hdr *hdr;
 184
 185         memset(&cmd, 0, sizeof(cmd));
 186         iwl_set_calib_hdr(&cmd.hdr, IWL_PHY_CALIBRATE_TEMP_OFFSET_CMD);
 187         hdr = (struct iwl_eeprom_calib_hdr *)iwl_eeprom_query_addr(priv,
 188                                                         EEPROM_CALIB_ALL);
 189         memcpy(&cmd.radio_sensor_offset_high, offset_calib_high,
 190                 sizeof(*offset_calib_high));
 191         memcpy(&cmd.radio_sensor_offset_low, offset_calib_low,
 192                 sizeof(*offset_calib_low));
 193         if (!(cmd.radio_sensor_offset_low)) {
 194                 IWL_DEBUG_CALIB(priv, "no info in EEPROM, use default\n");
 195                 cmd.radio_sensor_offset_low = DEFAULT_RADIO_SENSOR_OFFSET;
 196                 cmd.radio_sensor_offset_high = DEFAULT_RADIO_SENSOR_OFFSET;
 197         }
 198         memcpy(&cmd.burntVoltageRef, &hdr->voltage,
 199                 sizeof(hdr->voltage));
 200
 201         IWL_DEBUG_CALIB(priv, "Radio sensor offset high: %d\n",
 202                         le16_to_cpu(cmd.radio_sensor_offset_high));
 203         IWL_DEBUG_CALIB(priv, "Radio sensor offset low: %d\n",
 204                         le16_to_cpu(cmd.radio_sensor_offset_low));
 205         IWL_DEBUG_CALIB(priv, "Voltage Ref: %d\n",
 206                         le16_to_cpu(cmd.burntVoltageRef));
 207
 208         return iwl_calib_set(&priv->calib_results[IWL_CALIB_TEMP_OFFSET],
 209                              (u8 *)&cmd, sizeof(cmd));
 210 }
 211
 212 static int iwlagn_send_calib_cfg(struct iwl_priv *priv)
 213 {
 214         struct iwl_calib_cfg_cmd calib_cfg_cmd;
 215         struct iwl_host_cmd cmd = {
 216                 .id = CALIBRATION_CFG_CMD,
 217                 .len = { sizeof(struct iwl_calib_cfg_cmd), },
 218                 .data = { &calib_cfg_cmd, },
 219         };
 220
 221         memset(&calib_cfg_cmd, 0, sizeof(calib_cfg_cmd));
 222         calib_cfg_cmd.ucd_calib_cfg.once.is_enable = IWL_CALIB_INIT_CFG_ALL;
 223         calib_cfg_cmd.ucd_calib_cfg.once.start = IWL_CALIB_INIT_CFG_ALL;
 224         calib_cfg_cmd.ucd_calib_cfg.once.send_res = IWL_CALIB_INIT_CFG_ALL;
 225         calib_cfg_cmd.ucd_calib_cfg.flags =
 226                 IWL_CALIB_CFG_FLAG_SEND_COMPLETE_NTFY_MSK;
 227
 228         return iwl_trans_send_cmd(trans(priv), &cmd);
 229 }
 230
 231 void iwlagn_rx_calib_result(struct iwl_priv *priv,
 232                              struct iwl_rx_mem_buffer *rxb)
 233 {
 234         struct iwl_rx_packet *pkt = rxb_addr(rxb);
 235         struct iwl_calib_hdr *hdr = (struct iwl_calib_hdr *)pkt->u.raw;
 236         int len = le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK;
 237         int index;
 238
 239         /* reduce the size of the length field itself */
 240         len -= 4;
 241
 242         /* Define the order in which the results will be sent to the runtime
 243          * uCode. iwl_send_calib_results sends them in a row according to
 244          * their index. We sort them here
 245          */
 246         switch (hdr->op_code) {
 247         case IWL_PHY_CALIBRATE_DC_CMD:
 248                 index = IWL_CALIB_DC;
 249                 break;
 250         case IWL_PHY_CALIBRATE_LO_CMD:
 251                 index = IWL_CALIB_LO;
 252                 break;
 253         case IWL_PHY_CALIBRATE_TX_IQ_CMD:
 254                 index = IWL_CALIB_TX_IQ;
 255                 break;
 256         case IWL_PHY_CALIBRATE_TX_IQ_PERD_CMD:
 257                 index = IWL_CALIB_TX_IQ_PERD;
 258                 break;
 259         case IWL_PHY_CALIBRATE_BASE_BAND_CMD:
 260                 index = IWL_CALIB_BASE_BAND;
 261                 break;
 262         default:
 263                 IWL_ERR(priv, "Unknown calibration notification %d\n",
 264                           hdr->op_code);
 265                 return;
 266         }
 267         iwl_calib_set(&priv->calib_results[index], pkt->u.raw, len);
 268 }
 269
 270 int iwlagn_init_alive_start(struct iwl_priv *priv)
 271 {
 272         int ret;
 273
 274         if (priv->cfg->bt_params &&
 275             priv->cfg->bt_params->advanced_bt_coexist) {
 276                 /*
 277                  * Tell uCode we are ready to perform calibration
 278                  * need to perform this before any calibration
 279                  * no need to close the envlope since we are going
 280                  * to load the runtime uCode later.
 281                  */
 282                 ret = iwlagn_send_bt_env(priv, IWL_BT_COEX_ENV_OPEN,
 283                         BT_COEX_PRIO_TBL_EVT_INIT_CALIB2);
 284                 if (ret)
 285                         return ret;
 286
 287         }
 288
 289         ret = iwlagn_send_calib_cfg(priv);
 290         if (ret)
 291                 return ret;
 292
 293         /**
 294          * temperature offset calibration is only needed for runtime ucode,
 295          * so prepare the value now.
 296          */
 297         if (priv->cfg->need_temp_offset_calib) {
 298                 if (priv->cfg->temp_offset_v2)
 299                         return iwlagn_set_temperature_offset_calib_v2(priv);
 300                 else
 301                         return iwlagn_set_temperature_offset_calib(priv);
 302         }
 303
 304         return 0;
 305 }
 306
 307 static int iwlagn_send_wimax_coex(struct iwl_priv *priv)
 308 {
 309         struct iwl_wimax_coex_cmd coex_cmd;
 310
 311         if (priv->cfg->base_params->support_wimax_coexist) {
 312                 /* UnMask wake up src at associated sleep */
 313                 coex_cmd.flags = COEX_FLAGS_ASSOC_WA_UNMASK_MSK;
 314
 315                 /* UnMask wake up src at unassociated sleep */
 316                 coex_cmd.flags |= COEX_FLAGS_UNASSOC_WA_UNMASK_MSK;
 317                 memcpy(coex_cmd.sta_prio, cu_priorities,
 318                         sizeof(struct iwl_wimax_coex_event_entry) *
 319                          COEX_NUM_OF_EVENTS);
 320
 321                 /* enabling the coexistence feature */
 322                 coex_cmd.flags |= COEX_FLAGS_COEX_ENABLE_MSK;
 323
 324                 /* enabling the priorities tables */
 325                 coex_cmd.flags |= COEX_FLAGS_STA_TABLE_VALID_MSK;
 326         } else {
 327                 /* coexistence is disabled */
 328                 memset(&coex_cmd, 0, sizeof(coex_cmd));
 329         }
 330         return iwl_trans_send_cmd_pdu(trans(priv),
 331                                 COEX_PRIORITY_TABLE_CMD, CMD_SYNC,
 332                                 sizeof(coex_cmd), &coex_cmd);
 333 }
 334
 335 static const u8 iwlagn_bt_prio_tbl[BT_COEX_PRIO_TBL_EVT_MAX] = {
 336         ((BT_COEX_PRIO_TBL_PRIO_BYPASS << IWL_BT_COEX_PRIO_TBL_PRIO_POS) |
 337                 (0 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)),
 338         ((BT_COEX_PRIO_TBL_PRIO_BYPASS << IWL_BT_COEX_PRIO_TBL_PRIO_POS) |
 339                 (1 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)),
 340         ((BT_COEX_PRIO_TBL_PRIO_LOW << IWL_BT_COEX_PRIO_TBL_PRIO_POS) |
 341                 (0 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)),
 342         ((BT_COEX_PRIO_TBL_PRIO_LOW << IWL_BT_COEX_PRIO_TBL_PRIO_POS) |
 343                 (1 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)),
 344         ((BT_COEX_PRIO_TBL_PRIO_HIGH << IWL_BT_COEX_PRIO_TBL_PRIO_POS) |
 345                 (0 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)),
 346         ((BT_COEX_PRIO_TBL_PRIO_HIGH << IWL_BT_COEX_PRIO_TBL_PRIO_POS) |
 347                 (1 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)),
 348         ((BT_COEX_PRIO_TBL_PRIO_BYPASS << IWL_BT_COEX_PRIO_TBL_PRIO_POS) |
 349                 (0 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)),
 350         ((BT_COEX_PRIO_TBL_PRIO_COEX_OFF << IWL_BT_COEX_PRIO_TBL_PRIO_POS) |
 351                 (0 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)),
 352         ((BT_COEX_PRIO_TBL_PRIO_COEX_ON << IWL_BT_COEX_PRIO_TBL_PRIO_POS) |
 353                 (0 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)),
 354         0, 0, 0, 0, 0, 0, 0
 355 };
 356
 357 void iwlagn_send_prio_tbl(struct iwl_priv *priv)
 358 {
 359         struct iwl_bt_coex_prio_table_cmd prio_tbl_cmd;
 360
 361         memcpy(prio_tbl_cmd.prio_tbl, iwlagn_bt_prio_tbl,
 362                 sizeof(iwlagn_bt_prio_tbl));
 363         if (iwl_trans_send_cmd_pdu(trans(priv),
 364                                 REPLY_BT_COEX_PRIO_TABLE, CMD_SYNC,
 365                                 sizeof(prio_tbl_cmd), &prio_tbl_cmd))
 366                 IWL_ERR(priv, "failed to send BT prio tbl command\n");
 367 }
 368
 369 int iwlagn_send_bt_env(struct iwl_priv *priv, u8 action, u8 type)
 370 {
 371         struct iwl_bt_coex_prot_env_cmd env_cmd;
 372         int ret;
 373
 374         env_cmd.action = action;
 375         env_cmd.type = type;
 376         ret = iwl_trans_send_cmd_pdu(trans(priv),
 377                                REPLY_BT_COEX_PROT_ENV, CMD_SYNC,
 378                                sizeof(env_cmd), &env_cmd);
 379         if (ret)
 380                 IWL_ERR(priv, "failed to send BT env command\n");
 381         return ret;
 382 }
 383
 384
 385 static int iwlagn_alive_notify(struct iwl_priv *priv)
 386 {
 387         struct iwl_rxon_context *ctx;
 388         int ret;
 389
 390         if (!priv->tx_cmd_pool)
 391                 priv->tx_cmd_pool =
 392                         kmem_cache_create("iwlagn_dev_cmd",
 393                                           sizeof(struct iwl_device_cmd),
 394                                           sizeof(void *), 0, NULL);
 395
 396         if (!priv->tx_cmd_pool)
 397                 return -ENOMEM;
 398
 399         iwl_trans_tx_start(trans(priv));
 400         for_each_context(priv, ctx)
 401                 ctx->last_tx_rejected = false;
 402
 403         ret = iwlagn_send_wimax_coex(priv);
 404         if (ret)
 405                 return ret;
 406
 407         ret = iwlagn_set_Xtal_calib(priv);
 408         if (ret)
 409                 return ret;
 410
 411         return iwl_send_calib_results(priv);
 412 }
 413
 414
 415 /**
 416  * iwl_verify_inst_sparse - verify runtime uCode image in card vs. host,
 417  *   using sample data 100 bytes apart.  If these sample points are good,
 418  *   it's a pretty good bet that everything between them is good, too.
 419  */
 420 static int iwl_verify_inst_sparse(struct iwl_priv *priv,
 421                                       struct fw_desc *fw_desc)
 422 {
 423         __le32 *image = (__le32 *)fw_desc->v_addr;
 424         u32 len = fw_desc->len;
 425         u32 val;
 426         u32 i;
 427
 428         IWL_DEBUG_FW(priv, "ucode inst image size is %u\n", len);
 429
 430         for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
 431                 /* read data comes through single port, auto-incr addr */
 432                 /* NOTE: Use the debugless read so we don't flood kernel log
 433                  * if IWL_DL_IO is set */
 434                 iwl_write_direct32(bus(priv), HBUS_TARG_MEM_RADDR,
 435                         i + IWLAGN_RTC_INST_LOWER_BOUND);
 436                 val = iwl_read32(bus(priv), HBUS_TARG_MEM_RDAT);
 437                 if (val != le32_to_cpu(*image))
 438                         return -EIO;
 439         }
 440
 441         return 0;
 442 }
 443
 444 static void iwl_print_mismatch_inst(struct iwl_priv *priv,
 445                                     struct fw_desc *fw_desc)
 446 {
 447         __le32 *image = (__le32 *)fw_desc->v_addr;
 448         u32 len = fw_desc->len;
 449         u32 val;
 450         u32 offs;
 451         int errors = 0;
 452
 453         IWL_DEBUG_FW(priv, "ucode inst image size is %u\n", len);
 454
 455         iwl_write_direct32(bus(priv), HBUS_TARG_MEM_RADDR,
 456                            IWLAGN_RTC_INST_LOWER_BOUND);
 457
 458         for (offs = 0;
 459              offs < len && errors < 20;
 460              offs += sizeof(u32), image++) {
 461                 /* read data comes through single port, auto-incr addr */
 462                 val = iwl_read32(bus(priv), HBUS_TARG_MEM_RDAT);
 463                 if (val != le32_to_cpu(*image)) {
 464                         IWL_ERR(priv, "uCode INST section at "
 465                                 "offset 0x%x, is 0x%x, s/b 0x%x\n",
 466                                 offs, val, le32_to_cpu(*image));
 467                         errors++;
 468                 }
 469         }
 470 }
 471
 472 /**
 473  * iwl_verify_ucode - determine which instruction image is in SRAM,
 474  *    and verify its contents
 475  */
 476 static int iwl_verify_ucode(struct iwl_priv *priv, struct fw_img *img)
 477 {
 478         if (!iwl_verify_inst_sparse(priv, &img->code)) {
 479                 IWL_DEBUG_FW(priv, "uCode is good in inst SRAM\n");
 480                 return 0;
 481         }
 482
 483         IWL_ERR(priv, "UCODE IMAGE IN INSTRUCTION SRAM NOT VALID!!\n");
 484
 485         iwl_print_mismatch_inst(priv, &img->code);
 486         return -EIO;
 487 }
 488
 489 struct iwlagn_alive_data {
 490         bool valid;
 491         u8 subtype;
 492 };
 493
 494 static void iwlagn_alive_fn(struct iwl_priv *priv,
 495                             struct iwl_rx_packet *pkt,
 496                             void *data)
 497 {
 498         struct iwlagn_alive_data *alive_data = data;
 499         struct iwl_alive_resp *palive;
 500
 501         palive = &pkt->u.alive_frame;
 502
 503         IWL_DEBUG_FW(priv, "Alive ucode status 0x%08X revision "
 504                        "0x%01X 0x%01X\n",
 505                        palive->is_valid, palive->ver_type,
 506                        palive->ver_subtype);
 507
 508         priv->device_pointers.error_event_table =
 509                 le32_to_cpu(palive->error_event_table_ptr);
 510         priv->device_pointers.log_event_table =
 511                 le32_to_cpu(palive->log_event_table_ptr);
 512
 513         alive_data->subtype = palive->ver_subtype;
 514         alive_data->valid = palive->is_valid == UCODE_VALID_OK;
 515 }
 516
 517 #define UCODE_ALIVE_TIMEOUT     HZ
 518 #define UCODE_CALIB_TIMEOUT     (2*HZ)
 519
 520 int iwlagn_load_ucode_wait_alive(struct iwl_priv *priv,
 521                                  struct fw_img *image,
 522                                  enum iwlagn_ucode_type ucode_type)
 523 {
 524         struct iwl_notification_wait alive_wait;
 525         struct iwlagn_alive_data alive_data;
 526         int ret;
 527         enum iwlagn_ucode_type old_type;
 528
 529         ret = iwl_trans_start_device(trans(priv));
 530         if (ret)
 531                 return ret;
 532
 533         iwlagn_init_notification_wait(priv, &alive_wait, REPLY_ALIVE,
 534                                       iwlagn_alive_fn, &alive_data);
 535
 536         old_type = priv->ucode_type;
 537         priv->ucode_type = ucode_type;
 538
 539         ret = iwlagn_load_given_ucode(priv, image);
 540         if (ret) {
 541                 priv->ucode_type = old_type;
 542                 iwlagn_remove_notification(priv, &alive_wait);
 543                 return ret;
 544         }
 545
 546         iwl_trans_kick_nic(trans(priv));
 547
 548         /*
 549          * Some things may run in the background now, but we
 550          * just wait for the ALIVE notification here.
 551          */
 552         ret = iwlagn_wait_notification(priv, &alive_wait, UCODE_ALIVE_TIMEOUT);
 553         if (ret) {
 554                 priv->ucode_type = old_type;
 555                 return ret;
 556         }
 557
 558         if (!alive_data.valid) {
 559                 IWL_ERR(priv, "Loaded ucode is not valid!\n");
 560                 priv->ucode_type = old_type;
 561                 return -EIO;
 562         }
 563
 564         /*
 565          * This step takes a long time (60-80ms!!) and
 566          * WoWLAN image should be loaded quickly, so
 567          * skip it for WoWLAN.
 568          */
 569         if (ucode_type != IWL_UCODE_WOWLAN) {
 570                 ret = iwl_verify_ucode(priv, image);
 571                 if (ret) {
 572                         priv->ucode_type = old_type;
 573                         return ret;
 574                 }
 575
 576                 /* delay a bit to give rfkill time to run */
 577                 msleep(5);
 578         }
 579
 580         ret = iwlagn_alive_notify(priv);
 581         if (ret) {
 582                 IWL_WARN(priv,
 583                         "Could not complete ALIVE transition: %d\n", ret);
 584                 priv->ucode_type = old_type;
 585                 return ret;
 586         }
 587
 588         return 0;
 589 }
 590
 591 int iwlagn_run_init_ucode(struct iwl_priv *priv)
 592 {
 593         struct iwl_notification_wait calib_wait;
 594         int ret;
 595
 596         lockdep_assert_held(&priv->shrd->mutex);
 597
 598         /* No init ucode required? Curious, but maybe ok */
 599         if (!priv->ucode_init.code.len)
 600                 return 0;
 601
 602         if (priv->ucode_type != IWL_UCODE_NONE)
 603                 return 0;
 604
 605         iwlagn_init_notification_wait(priv, &calib_wait,
 606                                       CALIBRATION_COMPLETE_NOTIFICATION,
 607                                       NULL, NULL);
 608
 609         /* Will also start the device */
 610         ret = iwlagn_load_ucode_wait_alive(priv, &priv->ucode_init,
 611                                            IWL_UCODE_INIT);
 612         if (ret)
 613                 goto error;
 614
 615         ret = iwlagn_init_alive_start(priv);
 616         if (ret)
 617                 goto error;
 618
 619         /*
 620          * Some things may run in the background now, but we
 621          * just wait for the calibration complete notification.
 622          */
 623         ret = iwlagn_wait_notification(priv, &calib_wait, UCODE_CALIB_TIMEOUT);
 624
 625         goto out;
 626
 627  error:
 628         iwlagn_remove_notification(priv, &calib_wait);
 629  out:
 630         /* Whatever happened, stop the device */
 631         iwl_trans_stop_device(trans(priv));
 632         return ret;
 633 }