drivers/net/wireless/iwlegacy/iwl4965-base.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved.
   4  *
   5  * Portions of this file are derived from the ipw3945 project, as well
   6  * as portions of the ieee80211 subsystem header files.
   7  *
   8  * This program is free software; you can redistribute it and/or modify it
   9  * under the terms of version 2 of the GNU General Public License as
  10  * published by the Free Software Foundation.
  11  *
  12  * This program is distributed in the hope that it will be useful, but WITHOUT
  13  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  15  * more details.
  16  *
  17  * You should have received a copy of the GNU General Public License along with
  18  * this program; if not, write to the Free Software Foundation, Inc.,
  19  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20  *
  21  * The full GNU General Public License is included in this distribution in the
  22  * file called LICENSE.
  23  *
  24  * Contact Information:
  25  *  Intel Linux Wireless <ilw@linux.intel.com>
  26  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27  *
  28  *****************************************************************************/
  29
  30 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  31
  32 #include <linux/kernel.h>
  33 #include <linux/module.h>
  34 #include <linux/init.h>
  35 #include <linux/pci.h>
  36 #include <linux/pci-aspm.h>
  37 #include <linux/slab.h>
  38 #include <linux/dma-mapping.h>
  39 #include <linux/delay.h>
  40 #include <linux/sched.h>
  41 #include <linux/skbuff.h>
  42 #include <linux/netdevice.h>
  43 #include <linux/firmware.h>
  44 #include <linux/etherdevice.h>
  45 #include <linux/if_arp.h>
  46
  47 #include <net/mac80211.h>
  48
  49 #include <asm/div64.h>
  50
  51 #define DRV_NAME        "iwl4965"
  52
  53 #include "iwl-eeprom.h"
  54 #include "iwl-dev.h"
  55 #include "iwl-core.h"
  56 #include "iwl-io.h"
  57 #include "iwl-helpers.h"
  58 #include "iwl-sta.h"
  59 #include "iwl-4965-calib.h"
  60 #include "iwl-4965.h"
  61 #include "iwl-4965-led.h"
  62
  63
  64 /******************************************************************************
  65  *
  66  * module boiler plate
  67  *
  68  ******************************************************************************/
  69
  70 /*
  71  * module name, copyright, version, etc.
  72  */
  73 #define DRV_DESCRIPTION "Intel(R) Wireless WiFi 4965 driver for Linux"
  74
  75 #ifdef CONFIG_IWLWIFI_LEGACY_DEBUG
  76 #define VD "d"
  77 #else
  78 #define VD
  79 #endif
  80
  81 #define DRV_VERSION     IWLWIFI_VERSION VD
  82
  83
  84 MODULE_DESCRIPTION(DRV_DESCRIPTION);
  85 MODULE_VERSION(DRV_VERSION);
  86 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
  87 MODULE_LICENSE("GPL");
  88 MODULE_ALIAS("iwl4965");
  89
  90 void iwl4965_update_chain_flags(struct iwl_priv *priv)
  91 {
  92         struct iwl_rxon_context *ctx;
  93
  94         if (priv->cfg->ops->hcmd->set_rxon_chain) {
  95                 for_each_context(priv, ctx) {
  96                         priv->cfg->ops->hcmd->set_rxon_chain(priv, ctx);
  97                         if (ctx->active.rx_chain != ctx->staging.rx_chain)
  98                                 iwl_legacy_commit_rxon(priv, ctx);
  99                 }
 100         }
 101 }
 102
 103 static void iwl4965_clear_free_frames(struct iwl_priv *priv)
 104 {
 105         struct list_head *element;
 106
 107         IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
 108                        priv->frames_count);
 109
 110         while (!list_empty(&priv->free_frames)) {
 111                 element = priv->free_frames.next;
 112                 list_del(element);
 113                 kfree(list_entry(element, struct iwl_frame, list));
 114                 priv->frames_count--;
 115         }
 116
 117         if (priv->frames_count) {
 118                 IWL_WARN(priv, "%d frames still in use.  Did we lose one?\n",
 119                             priv->frames_count);
 120                 priv->frames_count = 0;
 121         }
 122 }
 123
 124 static struct iwl_frame *iwl4965_get_free_frame(struct iwl_priv *priv)
 125 {
 126         struct iwl_frame *frame;
 127         struct list_head *element;
 128         if (list_empty(&priv->free_frames)) {
 129                 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
 130                 if (!frame) {
 131                         IWL_ERR(priv, "Could not allocate frame!\n");
 132                         return NULL;
 133                 }
 134
 135                 priv->frames_count++;
 136                 return frame;
 137         }
 138
 139         element = priv->free_frames.next;
 140         list_del(element);
 141         return list_entry(element, struct iwl_frame, list);
 142 }
 143
 144 static void iwl4965_free_frame(struct iwl_priv *priv, struct iwl_frame *frame)
 145 {
 146         memset(frame, 0, sizeof(*frame));
 147         list_add(&frame->list, &priv->free_frames);
 148 }
 149
 150 static u32 iwl4965_fill_beacon_frame(struct iwl_priv *priv,
 151                                  struct ieee80211_hdr *hdr,
 152                                  int left)
 153 {
 154         lockdep_assert_held(&priv->mutex);
 155
 156         if (!priv->beacon_skb)
 157                 return 0;
 158
 159         if (priv->beacon_skb->len > left)
 160                 return 0;
 161
 162         memcpy(hdr, priv->beacon_skb->data, priv->beacon_skb->len);
 163
 164         return priv->beacon_skb->len;
 165 }
 166
 167 /* Parse the beacon frame to find the TIM element and set tim_idx & tim_size */
 168 static void iwl4965_set_beacon_tim(struct iwl_priv *priv,
 169                                struct iwl_tx_beacon_cmd *tx_beacon_cmd,
 170                                u8 *beacon, u32 frame_size)
 171 {
 172         u16 tim_idx;
 173         struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)beacon;
 174
 175         /*
 176          * The index is relative to frame start but we start looking at the
 177          * variable-length part of the beacon.
 178          */
 179         tim_idx = mgmt->u.beacon.variable - beacon;
 180
 181         /* Parse variable-length elements of beacon to find WLAN_EID_TIM */
 182         while ((tim_idx < (frame_size - 2)) &&
 183                         (beacon[tim_idx] != WLAN_EID_TIM))
 184                 tim_idx += beacon[tim_idx+1] + 2;
 185
 186         /* If TIM field was found, set variables */
 187         if ((tim_idx < (frame_size - 1)) && (beacon[tim_idx] == WLAN_EID_TIM)) {
 188                 tx_beacon_cmd->tim_idx = cpu_to_le16(tim_idx);
 189                 tx_beacon_cmd->tim_size = beacon[tim_idx+1];
 190         } else
 191                 IWL_WARN(priv, "Unable to find TIM Element in beacon\n");
 192 }
 193
 194 static unsigned int iwl4965_hw_get_beacon_cmd(struct iwl_priv *priv,
 195                                        struct iwl_frame *frame)
 196 {
 197         struct iwl_tx_beacon_cmd *tx_beacon_cmd;
 198         u32 frame_size;
 199         u32 rate_flags;
 200         u32 rate;
 201         /*
 202          * We have to set up the TX command, the TX Beacon command, and the
 203          * beacon contents.
 204          */
 205
 206         lockdep_assert_held(&priv->mutex);
 207
 208         if (!priv->beacon_ctx) {
 209                 IWL_ERR(priv, "trying to build beacon w/o beacon context!\n");
 210                 return 0;
 211         }
 212
 213         /* Initialize memory */
 214         tx_beacon_cmd = &frame->u.beacon;
 215         memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
 216
 217         /* Set up TX beacon contents */
 218         frame_size = iwl4965_fill_beacon_frame(priv, tx_beacon_cmd->frame,
 219                                 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
 220         if (WARN_ON_ONCE(frame_size > MAX_MPDU_SIZE))
 221                 return 0;
 222         if (!frame_size)
 223                 return 0;
 224
 225         /* Set up TX command fields */
 226         tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
 227         tx_beacon_cmd->tx.sta_id = priv->beacon_ctx->bcast_sta_id;
 228         tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
 229         tx_beacon_cmd->tx.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK |
 230                 TX_CMD_FLG_TSF_MSK | TX_CMD_FLG_STA_RATE_MSK;
 231
 232         /* Set up TX beacon command fields */
 233         iwl4965_set_beacon_tim(priv, tx_beacon_cmd, (u8 *)tx_beacon_cmd->frame,
 234                            frame_size);
 235
 236         /* Set up packet rate and flags */
 237         rate = iwl_legacy_get_lowest_plcp(priv, priv->beacon_ctx);
 238         priv->mgmt_tx_ant = iwl4965_toggle_tx_ant(priv, priv->mgmt_tx_ant,
 239                                               priv->hw_params.valid_tx_ant);
 240         rate_flags = iwl4965_ant_idx_to_flags(priv->mgmt_tx_ant);
 241         if ((rate >= IWL_FIRST_CCK_RATE) && (rate <= IWL_LAST_CCK_RATE))
 242                 rate_flags |= RATE_MCS_CCK_MSK;
 243         tx_beacon_cmd->tx.rate_n_flags = iwl4965_hw_set_rate_n_flags(rate,
 244                         rate_flags);
 245
 246         return sizeof(*tx_beacon_cmd) + frame_size;
 247 }
 248
 249 int iwl4965_send_beacon_cmd(struct iwl_priv *priv)
 250 {
 251         struct iwl_frame *frame;
 252         unsigned int frame_size;
 253         int rc;
 254
 255         frame = iwl4965_get_free_frame(priv);
 256         if (!frame) {
 257                 IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
 258                           "command.\n");
 259                 return -ENOMEM;
 260         }
 261
 262         frame_size = iwl4965_hw_get_beacon_cmd(priv, frame);
 263         if (!frame_size) {
 264                 IWL_ERR(priv, "Error configuring the beacon command\n");
 265                 iwl4965_free_frame(priv, frame);
 266                 return -EINVAL;
 267         }
 268
 269         rc = iwl_legacy_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
 270                               &frame->u.cmd[0]);
 271
 272         iwl4965_free_frame(priv, frame);
 273
 274         return rc;
 275 }
 276
 277 static inline dma_addr_t iwl4965_tfd_tb_get_addr(struct iwl_tfd *tfd, u8 idx)
 278 {
 279         struct iwl_tfd_tb *tb = &tfd->tbs[idx];
 280
 281         dma_addr_t addr = get_unaligned_le32(&tb->lo);
 282         if (sizeof(dma_addr_t) > sizeof(u32))
 283                 addr |=
 284                 ((dma_addr_t)(le16_to_cpu(tb->hi_n_len) & 0xF) << 16) << 16;
 285
 286         return addr;
 287 }
 288
 289 static inline u16 iwl4965_tfd_tb_get_len(struct iwl_tfd *tfd, u8 idx)
 290 {
 291         struct iwl_tfd_tb *tb = &tfd->tbs[idx];
 292
 293         return le16_to_cpu(tb->hi_n_len) >> 4;
 294 }
 295
 296 static inline void iwl4965_tfd_set_tb(struct iwl_tfd *tfd, u8 idx,
 297                                   dma_addr_t addr, u16 len)
 298 {
 299         struct iwl_tfd_tb *tb = &tfd->tbs[idx];
 300         u16 hi_n_len = len << 4;
 301
 302         put_unaligned_le32(addr, &tb->lo);
 303         if (sizeof(dma_addr_t) > sizeof(u32))
 304                 hi_n_len |= ((addr >> 16) >> 16) & 0xF;
 305
 306         tb->hi_n_len = cpu_to_le16(hi_n_len);
 307
 308         tfd->num_tbs = idx + 1;
 309 }
 310
 311 static inline u8 iwl4965_tfd_get_num_tbs(struct iwl_tfd *tfd)
 312 {
 313         return tfd->num_tbs & 0x1f;
 314 }
 315
 316 /**
 317  * iwl4965_hw_txq_free_tfd - Free all chunks referenced by TFD [txq->q.read_ptr]
 318  * @priv - driver private data
 319  * @txq - tx queue
 320  *
 321  * Does NOT advance any TFD circular buffer read/write indexes
 322  * Does NOT free the TFD itself (which is within circular buffer)
 323  */
 324 void iwl4965_hw_txq_free_tfd(struct iwl_priv *priv, struct iwl_tx_queue *txq)
 325 {
 326         struct iwl_tfd *tfd_tmp = (struct iwl_tfd *)txq->tfds;
 327         struct iwl_tfd *tfd;
 328         struct pci_dev *dev = priv->pci_dev;
 329         int index = txq->q.read_ptr;
 330         int i;
 331         int num_tbs;
 332
 333         tfd = &tfd_tmp[index];
 334
 335         /* Sanity check on number of chunks */
 336         num_tbs = iwl4965_tfd_get_num_tbs(tfd);
 337
 338         if (num_tbs >= IWL_NUM_OF_TBS) {
 339                 IWL_ERR(priv, "Too many chunks: %i\n", num_tbs);
 340                 /* @todo issue fatal error, it is quite serious situation */
 341                 return;
 342         }
 343
 344         /* Unmap tx_cmd */
 345         if (num_tbs)
 346                 pci_unmap_single(dev,
 347                                 dma_unmap_addr(&txq->meta[index], mapping),
 348                                 dma_unmap_len(&txq->meta[index], len),
 349                                 PCI_DMA_BIDIRECTIONAL);
 350
 351         /* Unmap chunks, if any. */
 352         for (i = 1; i < num_tbs; i++)
 353                 pci_unmap_single(dev, iwl4965_tfd_tb_get_addr(tfd, i),
 354                                 iwl4965_tfd_tb_get_len(tfd, i),
 355                                 PCI_DMA_TODEVICE);
 356
 357         /* free SKB */
 358         if (txq->txb) {
 359                 struct sk_buff *skb;
 360
 361                 skb = txq->txb[txq->q.read_ptr].skb;
 362
 363                 /* can be called from irqs-disabled context */
 364                 if (skb) {
 365                         dev_kfree_skb_any(skb);
 366                         txq->txb[txq->q.read_ptr].skb = NULL;
 367                 }
 368         }
 369 }
 370
 371 int iwl4965_hw_txq_attach_buf_to_tfd(struct iwl_priv *priv,
 372                                  struct iwl_tx_queue *txq,
 373                                  dma_addr_t addr, u16 len,
 374                                  u8 reset, u8 pad)
 375 {
 376         struct iwl_queue *q;
 377         struct iwl_tfd *tfd, *tfd_tmp;
 378         u32 num_tbs;
 379
 380         q = &txq->q;
 381         tfd_tmp = (struct iwl_tfd *)txq->tfds;
 382         tfd = &tfd_tmp[q->write_ptr];
 383
 384         if (reset)
 385                 memset(tfd, 0, sizeof(*tfd));
 386
 387         num_tbs = iwl4965_tfd_get_num_tbs(tfd);
 388
 389         /* Each TFD can point to a maximum 20 Tx buffers */
 390         if (num_tbs >= IWL_NUM_OF_TBS) {
 391                 IWL_ERR(priv, "Error can not send more than %d chunks\n",
 392                           IWL_NUM_OF_TBS);
 393                 return -EINVAL;
 394         }
 395
 396         BUG_ON(addr & ~DMA_BIT_MASK(36));
 397         if (unlikely(addr & ~IWL_TX_DMA_MASK))
 398                 IWL_ERR(priv, "Unaligned address = %llx\n",
 399                           (unsigned long long)addr);
 400
 401         iwl4965_tfd_set_tb(tfd, num_tbs, addr, len);
 402
 403         return 0;
 404 }
 405
 406 /*
 407  * Tell nic where to find circular buffer of Tx Frame Descriptors for
 408  * given Tx queue, and enable the DMA channel used for that queue.
 409  *
 410  * 4965 supports up to 16 Tx queues in DRAM, mapped to up to 8 Tx DMA
 411  * channels supported in hardware.
 412  */
 413 int iwl4965_hw_tx_queue_init(struct iwl_priv *priv,
 414                          struct iwl_tx_queue *txq)
 415 {
 416         int txq_id = txq->q.id;
 417
 418         /* Circular buffer (TFD queue in DRAM) physical base address */
 419         iwl_legacy_write_direct32(priv, FH_MEM_CBBC_QUEUE(txq_id),
 420                              txq->q.dma_addr >> 8);
 421
 422         return 0;
 423 }
 424
 425 /******************************************************************************
 426  *
 427  * Generic RX handler implementations
 428  *
 429  ******************************************************************************/
 430 static void iwl4965_rx_reply_alive(struct iwl_priv *priv,
 431                                 struct iwl_rx_mem_buffer *rxb)
 432 {
 433         struct iwl_rx_packet *pkt = rxb_addr(rxb);
 434         struct iwl_alive_resp *palive;
 435         struct delayed_work *pwork;
 436
 437         palive = &pkt->u.alive_frame;
 438
 439         IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
 440                        "0x%01X 0x%01X\n",
 441                        palive->is_valid, palive->ver_type,
 442                        palive->ver_subtype);
 443
 444         if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
 445                 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
 446                 memcpy(&priv->card_alive_init,
 447                        &pkt->u.alive_frame,
 448                        sizeof(struct iwl_init_alive_resp));
 449                 pwork = &priv->init_alive_start;
 450         } else {
 451                 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
 452                 memcpy(&priv->card_alive, &pkt->u.alive_frame,
 453                        sizeof(struct iwl_alive_resp));
 454                 pwork = &priv->alive_start;
 455         }
 456
 457         /* We delay the ALIVE response by 5ms to
 458          * give the HW RF Kill time to activate... */
 459         if (palive->is_valid == UCODE_VALID_OK)
 460                 queue_delayed_work(priv->workqueue, pwork,
 461                                    msecs_to_jiffies(5));
 462         else
 463                 IWL_WARN(priv, "uCode did not respond OK.\n");
 464 }
 465
 466 /**
 467  * iwl4965_bg_statistics_periodic - Timer callback to queue statistics
 468  *
 469  * This callback is provided in order to send a statistics request.
 470  *
 471  * This timer function is continually reset to execute within
 472  * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION
 473  * was received.  We need to ensure we receive the statistics in order
 474  * to update the temperature used for calibrating the TXPOWER.
 475  */
 476 static void iwl4965_bg_statistics_periodic(unsigned long data)
 477 {
 478         struct iwl_priv *priv = (struct iwl_priv *)data;
 479
 480         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
 481                 return;
 482
 483         /* dont send host command if rf-kill is on */
 484         if (!iwl_legacy_is_ready_rf(priv))
 485                 return;
 486
 487         iwl_legacy_send_statistics_request(priv, CMD_ASYNC, false);
 488 }
 489
 490 static void iwl4965_rx_beacon_notif(struct iwl_priv *priv,
 491                                 struct iwl_rx_mem_buffer *rxb)
 492 {
 493         struct iwl_rx_packet *pkt = rxb_addr(rxb);
 494         struct iwl4965_beacon_notif *beacon =
 495                 (struct iwl4965_beacon_notif *)pkt->u.raw;
 496 #ifdef CONFIG_IWLWIFI_LEGACY_DEBUG
 497         u8 rate = iwl4965_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
 498
 499         IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d "
 500                 "tsf %d %d rate %d\n",
 501                 le32_to_cpu(beacon->beacon_notify_hdr.u.status) & TX_STATUS_MSK,
 502                 beacon->beacon_notify_hdr.failure_frame,
 503                 le32_to_cpu(beacon->ibss_mgr_status),
 504                 le32_to_cpu(beacon->high_tsf),
 505                 le32_to_cpu(beacon->low_tsf), rate);
 506 #endif
 507
 508         priv->ibss_manager = le32_to_cpu(beacon->ibss_mgr_status);
 509 }
 510
 511 static void iwl4965_perform_ct_kill_task(struct iwl_priv *priv)
 512 {
 513         unsigned long flags;
 514
 515         IWL_DEBUG_POWER(priv, "Stop all queues\n");
 516
 517         if (priv->mac80211_registered)
 518                 ieee80211_stop_queues(priv->hw);
 519
 520         iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
 521                         CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
 522         iwl_read32(priv, CSR_UCODE_DRV_GP1);
 523
 524         spin_lock_irqsave(&priv->reg_lock, flags);
 525         if (!iwl_grab_nic_access(priv))
 526                 iwl_release_nic_access(priv);
 527         spin_unlock_irqrestore(&priv->reg_lock, flags);
 528 }
 529
 530 /* Handle notification from uCode that card's power state is changing
 531  * due to software, hardware, or critical temperature RFKILL */
 532 static void iwl4965_rx_card_state_notif(struct iwl_priv *priv,
 533                                     struct iwl_rx_mem_buffer *rxb)
 534 {
 535         struct iwl_rx_packet *pkt = rxb_addr(rxb);
 536         u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
 537         unsigned long status = priv->status;
 538
 539         IWL_DEBUG_RF_KILL(priv, "Card state received: HW:%s SW:%s CT:%s\n",
 540                           (flags & HW_CARD_DISABLED) ? "Kill" : "On",
 541                           (flags & SW_CARD_DISABLED) ? "Kill" : "On",
 542                           (flags & CT_CARD_DISABLED) ?
 543                           "Reached" : "Not reached");
 544
 545         if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
 546                      CT_CARD_DISABLED)) {
 547
 548                 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
 549                             CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
 550
 551                 iwl_legacy_write_direct32(priv, HBUS_TARG_MBX_C,
 552                                         HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
 553
 554                 if (!(flags & RXON_CARD_DISABLED)) {
 555                         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
 556                                     CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
 557                         iwl_legacy_write_direct32(priv, HBUS_TARG_MBX_C,
 558                                         HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
 559                 }
 560         }
 561
 562         if (flags & CT_CARD_DISABLED)
 563                 iwl4965_perform_ct_kill_task(priv);
 564
 565         if (flags & HW_CARD_DISABLED)
 566                 set_bit(STATUS_RF_KILL_HW, &priv->status);
 567         else
 568                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
 569
 570         if (!(flags & RXON_CARD_DISABLED))
 571                 iwl_legacy_scan_cancel(priv);
 572
 573         if ((test_bit(STATUS_RF_KILL_HW, &status) !=
 574              test_bit(STATUS_RF_KILL_HW, &priv->status)))
 575                 wiphy_rfkill_set_hw_state(priv->hw->wiphy,
 576                         test_bit(STATUS_RF_KILL_HW, &priv->status));
 577         else
 578                 wake_up(&priv->wait_command_queue);
 579 }
 580
 581 /**
 582  * iwl4965_setup_rx_handlers - Initialize Rx handler callbacks
 583  *
 584  * Setup the RX handlers for each of the reply types sent from the uCode
 585  * to the host.
 586  *
 587  * This function chains into the hardware specific files for them to setup
 588  * any hardware specific handlers as well.
 589  */
 590 static void iwl4965_setup_rx_handlers(struct iwl_priv *priv)
 591 {
 592         priv->rx_handlers[REPLY_ALIVE] = iwl4965_rx_reply_alive;
 593         priv->rx_handlers[REPLY_ERROR] = iwl_legacy_rx_reply_error;
 594         priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_legacy_rx_csa;
 595         priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
 596                         iwl_legacy_rx_spectrum_measure_notif;
 597         priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_legacy_rx_pm_sleep_notif;
 598         priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
 599             iwl_legacy_rx_pm_debug_statistics_notif;
 600         priv->rx_handlers[BEACON_NOTIFICATION] = iwl4965_rx_beacon_notif;
 601
 602         /*
 603          * The same handler is used for both the REPLY to a discrete
 604          * statistics request from the host as well as for the periodic
 605          * statistics notifications (after received beacons) from the uCode.
 606          */
 607         priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl4965_reply_statistics;
 608         priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl4965_rx_statistics;
 609
 610         iwl_legacy_setup_rx_scan_handlers(priv);
 611
 612         /* status change handler */
 613         priv->rx_handlers[CARD_STATE_NOTIFICATION] =
 614                                         iwl4965_rx_card_state_notif;
 615
 616         priv->rx_handlers[MISSED_BEACONS_NOTIFICATION] =
 617             iwl4965_rx_missed_beacon_notif;
 618         /* Rx handlers */
 619         priv->rx_handlers[REPLY_RX_PHY_CMD] = iwl4965_rx_reply_rx_phy;
 620         priv->rx_handlers[REPLY_RX_MPDU_CMD] = iwl4965_rx_reply_rx;
 621         /* block ack */
 622         priv->rx_handlers[REPLY_COMPRESSED_BA] = iwl4965_rx_reply_compressed_ba;
 623         /* Set up hardware specific Rx handlers */
 624         priv->cfg->ops->lib->rx_handler_setup(priv);
 625 }
 626
 627 /**
 628  * iwl4965_rx_handle - Main entry function for receiving responses from uCode
 629  *
 630  * Uses the priv->rx_handlers callback function array to invoke
 631  * the appropriate handlers, including command responses,
 632  * frame-received notifications, and other notifications.
 633  */
 634 void iwl4965_rx_handle(struct iwl_priv *priv)
 635 {
 636         struct iwl_rx_mem_buffer *rxb;
 637         struct iwl_rx_packet *pkt;
 638         struct iwl_rx_queue *rxq = &priv->rxq;
 639         u32 r, i;
 640         int reclaim;
 641         unsigned long flags;
 642         u8 fill_rx = 0;
 643         u32 count = 8;
 644         int total_empty;
 645
 646         /* uCode's read index (stored in shared DRAM) indicates the last Rx
 647          * buffer that the driver may process (last buffer filled by ucode). */
 648         r = le16_to_cpu(rxq->rb_stts->closed_rb_num) &  0x0FFF;
 649         i = rxq->read;
 650
 651         /* Rx interrupt, but nothing sent from uCode */
 652         if (i == r)
 653                 IWL_DEBUG_RX(priv, "r = %d, i = %d\n", r, i);
 654
 655         /* calculate total frames need to be restock after handling RX */
 656         total_empty = r - rxq->write_actual;
 657         if (total_empty < 0)
 658                 total_empty += RX_QUEUE_SIZE;
 659
 660         if (total_empty > (RX_QUEUE_SIZE / 2))
 661                 fill_rx = 1;
 662
 663         while (i != r) {
 664                 int len;
 665
 666                 rxb = rxq->queue[i];
 667
 668                 /* If an RXB doesn't have a Rx queue slot associated with it,
 669                  * then a bug has been introduced in the queue refilling
 670                  * routines -- catch it here */
 671                 BUG_ON(rxb == NULL);
 672
 673                 rxq->queue[i] = NULL;
 674
 675                 pci_unmap_page(priv->pci_dev, rxb->page_dma,
 676                                PAGE_SIZE << priv->hw_params.rx_page_order,
 677                                PCI_DMA_FROMDEVICE);
 678                 pkt = rxb_addr(rxb);
 679
 680                 len = le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK;
 681                 len += sizeof(u32); /* account for status word */
 682                 trace_iwlwifi_legacy_dev_rx(priv, pkt, len);
 683
 684                 /* Reclaim a command buffer only if this packet is a response
 685                  *   to a (driver-originated) command.
 686                  * If the packet (e.g. Rx frame) originated from uCode,
 687                  *   there is no command buffer to reclaim.
 688                  * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
 689                  *   but apparently a few don't get set; catch them here. */
 690                 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
 691                         (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
 692                         (pkt->hdr.cmd != REPLY_RX) &&
 693                         (pkt->hdr.cmd != REPLY_RX_MPDU_CMD) &&
 694                         (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
 695                         (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
 696                         (pkt->hdr.cmd != REPLY_TX);
 697
 698                 /* Based on type of command response or notification,
 699                  *   handle those that need handling via function in
 700                  *   rx_handlers table.  See iwl4965_setup_rx_handlers() */
 701                 if (priv->rx_handlers[pkt->hdr.cmd]) {
 702                         IWL_DEBUG_RX(priv, "r = %d, i = %d, %s, 0x%02x\n", r,
 703                                 i, iwl_legacy_get_cmd_string(pkt->hdr.cmd),
 704                                 pkt->hdr.cmd);
 705                         priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
 706                         priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
 707                 } else {
 708                         /* No handling needed */
 709                         IWL_DEBUG_RX(priv,
 710                                 "r %d i %d No handler needed for %s, 0x%02x\n",
 711                                 r, i, iwl_legacy_get_cmd_string(pkt->hdr.cmd),
 712                                 pkt->hdr.cmd);
 713                 }
 714
 715                 /*
 716                  * XXX: After here, we should always check rxb->page
 717                  * against NULL before touching it or its virtual
 718                  * memory (pkt). Because some rx_handler might have
 719                  * already taken or freed the pages.
 720                  */
 721
 722                 if (reclaim) {
 723                         /* Invoke any callbacks, transfer the buffer to caller,
 724                          * and fire off the (possibly) blocking iwl_legacy_send_cmd()
 725                          * as we reclaim the driver command queue */
 726                         if (rxb->page)
 727                                 iwl_legacy_tx_cmd_complete(priv, rxb);
 728                         else
 729                                 IWL_WARN(priv, "Claim null rxb?\n");
 730                 }
 731
 732                 /* Reuse the page if possible. For notification packets and
 733                  * SKBs that fail to Rx correctly, add them back into the
 734                  * rx_free list for reuse later. */
 735                 spin_lock_irqsave(&rxq->lock, flags);
 736                 if (rxb->page != NULL) {
 737                         rxb->page_dma = pci_map_page(priv->pci_dev, rxb->page,
 738                                 0, PAGE_SIZE << priv->hw_params.rx_page_order,
 739                                 PCI_DMA_FROMDEVICE);
 740                         list_add_tail(&rxb->list, &rxq->rx_free);
 741                         rxq->free_count++;
 742                 } else
 743                         list_add_tail(&rxb->list, &rxq->rx_used);
 744
 745                 spin_unlock_irqrestore(&rxq->lock, flags);
 746
 747                 i = (i + 1) & RX_QUEUE_MASK;
 748                 /* If there are a lot of unused frames,
 749                  * restock the Rx queue so ucode wont assert. */
 750                 if (fill_rx) {
 751                         count++;
 752                         if (count >= 8) {
 753                                 rxq->read = i;
 754                                 iwl4965_rx_replenish_now(priv);
 755                                 count = 0;
 756                         }
 757                 }
 758         }
 759
 760         /* Backtrack one entry */
 761         rxq->read = i;
 762         if (fill_rx)
 763                 iwl4965_rx_replenish_now(priv);
 764         else
 765                 iwl4965_rx_queue_restock(priv);
 766 }
 767
 768 /* call this function to flush any scheduled tasklet */
 769 static inline void iwl4965_synchronize_irq(struct iwl_priv *priv)
 770 {
 771         /* wait to make sure we flush pending tasklet*/
 772         synchronize_irq(priv->pci_dev->irq);
 773         tasklet_kill(&priv->irq_tasklet);
 774 }
 775
 776 static void iwl4965_irq_tasklet(struct iwl_priv *priv)
 777 {
 778         u32 inta, handled = 0;
 779         u32 inta_fh;
 780         unsigned long flags;
 781         u32 i;
 782 #ifdef CONFIG_IWLWIFI_LEGACY_DEBUG
 783         u32 inta_mask;
 784 #endif
 785
 786         spin_lock_irqsave(&priv->lock, flags);
 787
 788         /* Ack/clear/reset pending uCode interrupts.
 789          * Note:  Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
 790          *  and will clear only when CSR_FH_INT_STATUS gets cleared. */
 791         inta = iwl_read32(priv, CSR_INT);
 792         iwl_write32(priv, CSR_INT, inta);
 793
 794         /* Ack/clear/reset pending flow-handler (DMA) interrupts.
 795          * Any new interrupts that happen after this, either while we're
 796          * in this tasklet, or later, will show up in next ISR/tasklet. */
 797         inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
 798         iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
 799
 800 #ifdef CONFIG_IWLWIFI_LEGACY_DEBUG
 801         if (iwl_legacy_get_debug_level(priv) & IWL_DL_ISR) {
 802                 /* just for debug */
 803                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
 804                 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
 805                               inta, inta_mask, inta_fh);
 806         }
 807 #endif
 808
 809         spin_unlock_irqrestore(&priv->lock, flags);
 810
 811         /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
 812          * atomic, make sure that inta covers all the interrupts that
 813          * we've discovered, even if FH interrupt came in just after
 814          * reading CSR_INT. */
 815         if (inta_fh & CSR49_FH_INT_RX_MASK)
 816                 inta |= CSR_INT_BIT_FH_RX;
 817         if (inta_fh & CSR49_FH_INT_TX_MASK)
 818                 inta |= CSR_INT_BIT_FH_TX;
 819
 820         /* Now service all interrupt bits discovered above. */
 821         if (inta & CSR_INT_BIT_HW_ERR) {
 822                 IWL_ERR(priv, "Hardware error detected.  Restarting.\n");
 823
 824                 /* Tell the device to stop sending interrupts */
 825                 iwl_legacy_disable_interrupts(priv);
 826
 827                 priv->isr_stats.hw++;
 828                 iwl_legacy_irq_handle_error(priv);
 829
 830                 handled |= CSR_INT_BIT_HW_ERR;
 831
 832                 return;
 833         }
 834
 835 #ifdef CONFIG_IWLWIFI_LEGACY_DEBUG
 836         if (iwl_legacy_get_debug_level(priv) & (IWL_DL_ISR)) {
 837                 /* NIC fires this, but we don't use it, redundant with WAKEUP */
 838                 if (inta & CSR_INT_BIT_SCD) {
 839                         IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
 840                                       "the frame/frames.\n");
 841                         priv->isr_stats.sch++;
 842                 }
 843
 844                 /* Alive notification via Rx interrupt will do the real work */
 845                 if (inta & CSR_INT_BIT_ALIVE) {
 846                         IWL_DEBUG_ISR(priv, "Alive interrupt\n");
 847                         priv->isr_stats.alive++;
 848                 }
 849         }
 850 #endif
 851         /* Safely ignore these bits for debug checks below */
 852         inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
 853
 854         /* HW RF KILL switch toggled */
 855         if (inta & CSR_INT_BIT_RF_KILL) {
 856                 int hw_rf_kill = 0;
 857                 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
 858                                 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
 859                         hw_rf_kill = 1;
 860
 861                 IWL_WARN(priv, "RF_KILL bit toggled to %s.\n",
 862                                 hw_rf_kill ? "disable radio" : "enable radio");
 863
 864                 priv->isr_stats.rfkill++;
 865
 866                 /* driver only loads ucode once setting the interface up.
 867                  * the driver allows loading the ucode even if the radio
 868                  * is killed. Hence update the killswitch state here. The
 869                  * rfkill handler will care about restarting if needed.
 870                  */
 871                 if (hw_rf_kill) {
 872                         set_bit(STATUS_RF_KILL_HW, &priv->status);
 873                 } else {
 874                         clear_bit(STATUS_RF_KILL_HW, &priv->status);
 875                         iwl_legacy_force_reset(priv, true);
 876                 }
 877                 wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
 878
 879                 handled |= CSR_INT_BIT_RF_KILL;
 880         }
 881
 882         /* Chip got too hot and stopped itself */
 883         if (inta & CSR_INT_BIT_CT_KILL) {
 884                 IWL_ERR(priv, "Microcode CT kill error detected.\n");
 885                 priv->isr_stats.ctkill++;
 886                 handled |= CSR_INT_BIT_CT_KILL;
 887         }
 888
 889         /* Error detected by uCode */
 890         if (inta & CSR_INT_BIT_SW_ERR) {
 891                 IWL_ERR(priv, "Microcode SW error detected. "
 892                         " Restarting 0x%X.\n", inta);
 893                 priv->isr_stats.sw++;
 894                 iwl_legacy_irq_handle_error(priv);
 895                 handled |= CSR_INT_BIT_SW_ERR;
 896         }
 897
 898         /*
 899          * uCode wakes up after power-down sleep.
 900          * Tell device about any new tx or host commands enqueued,
 901          * and about any Rx buffers made available while asleep.
 902          */
 903         if (inta & CSR_INT_BIT_WAKEUP) {
 904                 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
 905                 iwl_legacy_rx_queue_update_write_ptr(priv, &priv->rxq);
 906                 for (i = 0; i < priv->hw_params.max_txq_num; i++)
 907                         iwl_legacy_txq_update_write_ptr(priv, &priv->txq[i]);
 908                 priv->isr_stats.wakeup++;
 909                 handled |= CSR_INT_BIT_WAKEUP;
 910         }
 911
 912         /* All uCode command responses, including Tx command responses,
 913          * Rx "responses" (frame-received notification), and other
 914          * notifications from uCode come through here*/
 915         if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
 916                 iwl4965_rx_handle(priv);
 917                 priv->isr_stats.rx++;
 918                 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
 919         }
 920
 921         /* This "Tx" DMA channel is used only for loading uCode */
 922         if (inta & CSR_INT_BIT_FH_TX) {
 923                 IWL_DEBUG_ISR(priv, "uCode load interrupt\n");
 924                 priv->isr_stats.tx++;
 925                 handled |= CSR_INT_BIT_FH_TX;
 926                 /* Wake up uCode load routine, now that load is complete */
 927                 priv->ucode_write_complete = 1;
 928                 wake_up(&priv->wait_command_queue);
 929         }
 930
 931         if (inta & ~handled) {
 932                 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
 933                 priv->isr_stats.unhandled++;
 934         }
 935
 936         if (inta & ~(priv->inta_mask)) {
 937                 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
 938                          inta & ~priv->inta_mask);
 939                 IWL_WARN(priv, "   with FH_INT = 0x%08x\n", inta_fh);
 940         }
 941
 942         /* Re-enable all interrupts */
 943         /* only Re-enable if disabled by irq */
 944         if (test_bit(STATUS_INT_ENABLED, &priv->status))
 945                 iwl_legacy_enable_interrupts(priv);
 946         /* Re-enable RF_KILL if it occurred */
 947         else if (handled & CSR_INT_BIT_RF_KILL)
 948                 iwl_legacy_enable_rfkill_int(priv);
 949
 950 #ifdef CONFIG_IWLWIFI_LEGACY_DEBUG
 951         if (iwl_legacy_get_debug_level(priv) & (IWL_DL_ISR)) {
 952                 inta = iwl_read32(priv, CSR_INT);
 953                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
 954                 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
 955                 IWL_DEBUG_ISR(priv,
 956                         "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
 957                         "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
 958         }
 959 #endif
 960 }
 961
 962 /*****************************************************************************
 963  *
 964  * sysfs attributes
 965  *
 966  *****************************************************************************/
 967
 968 #ifdef CONFIG_IWLWIFI_LEGACY_DEBUG
 969
 970 /*
 971  * The following adds a new attribute to the sysfs representation
 972  * of this device driver (i.e. a new file in /sys/class/net/wlan0/device/)
 973  * used for controlling the debug level.
 974  *
 975  * See the level definitions in iwl for details.
 976  *
 977  * The debug_level being managed using sysfs below is a per device debug
 978  * level that is used instead of the global debug level if it (the per
 979  * device debug level) is set.
 980  */
 981 static ssize_t iwl4965_show_debug_level(struct device *d,
 982                                 struct device_attribute *attr, char *buf)
 983 {
 984         struct iwl_priv *priv = dev_get_drvdata(d);
 985         return sprintf(buf, "0x%08X\n", iwl_legacy_get_debug_level(priv));
 986 }
 987 static ssize_t iwl4965_store_debug_level(struct device *d,
 988                                 struct device_attribute *attr,
 989                                  const char *buf, size_t count)
 990 {
 991         struct iwl_priv *priv = dev_get_drvdata(d);
 992         unsigned long val;
 993         int ret;
 994
 995         ret = strict_strtoul(buf, 0, &val);
 996         if (ret)
 997                 IWL_ERR(priv, "%s is not in hex or decimal form.\n", buf);
 998         else {
 999                 priv->debug_level = val;
1000                 if (iwl_legacy_alloc_traffic_mem(priv))
1001                         IWL_ERR(priv,
1002                                 "Not enough memory to generate traffic log\n");
1003         }
1004         return strnlen(buf, count);
1005 }
1006
1007 static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
1008                         iwl4965_show_debug_level, iwl4965_store_debug_level);
1009
1010
1011 #endif /* CONFIG_IWLWIFI_LEGACY_DEBUG */
1012
1013
1014 static ssize_t iwl4965_show_temperature(struct device *d,
1015                                 struct device_attribute *attr, char *buf)
1016 {
1017         struct iwl_priv *priv = dev_get_drvdata(d);
1018
1019         if (!iwl_legacy_is_alive(priv))
1020                 return -EAGAIN;
1021
1022         return sprintf(buf, "%d\n", priv->temperature);
1023 }
1024
1025 static DEVICE_ATTR(temperature, S_IRUGO, iwl4965_show_temperature, NULL);
1026
1027 static ssize_t iwl4965_show_tx_power(struct device *d,
1028                              struct device_attribute *attr, char *buf)
1029 {
1030         struct iwl_priv *priv = dev_get_drvdata(d);
1031
1032         if (!iwl_legacy_is_ready_rf(priv))
1033                 return sprintf(buf, "off\n");
1034         else
1035                 return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
1036 }
1037
1038 static ssize_t iwl4965_store_tx_power(struct device *d,
1039                               struct device_attribute *attr,
1040                               const char *buf, size_t count)
1041 {
1042         struct iwl_priv *priv = dev_get_drvdata(d);
1043         unsigned long val;
1044         int ret;
1045
1046         ret = strict_strtoul(buf, 10, &val);
1047         if (ret)
1048                 IWL_INFO(priv, "%s is not in decimal form.\n", buf);
1049         else {
1050                 ret = iwl_legacy_set_tx_power(priv, val, false);
1051                 if (ret)
1052                         IWL_ERR(priv, "failed setting tx power (0x%d).\n",
1053                                 ret);
1054                 else
1055                         ret = count;
1056         }
1057         return ret;
1058 }
1059
1060 static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO,
1061                         iwl4965_show_tx_power, iwl4965_store_tx_power);
1062
1063 static struct attribute *iwl_sysfs_entries[] = {
1064         &dev_attr_temperature.attr,
1065         &dev_attr_tx_power.attr,
1066 #ifdef CONFIG_IWLWIFI_LEGACY_DEBUG
1067         &dev_attr_debug_level.attr,
1068 #endif
1069         NULL
1070 };
1071
1072 static struct attribute_group iwl_attribute_group = {
1073         .name = NULL,           /* put in device directory */
1074         .attrs = iwl_sysfs_entries,
1075 };
1076
1077 /******************************************************************************
1078  *
1079  * uCode download functions
1080  *
1081  ******************************************************************************/
1082
1083 static void iwl4965_dealloc_ucode_pci(struct iwl_priv *priv)
1084 {
1085         iwl_legacy_free_fw_desc(priv->pci_dev, &priv->ucode_code);
1086         iwl_legacy_free_fw_desc(priv->pci_dev, &priv->ucode_data);
1087         iwl_legacy_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1088         iwl_legacy_free_fw_desc(priv->pci_dev, &priv->ucode_init);
1089         iwl_legacy_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1090         iwl_legacy_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
1091 }
1092
1093 static void iwl4965_nic_start(struct iwl_priv *priv)
1094 {
1095         /* Remove all resets to allow NIC to operate */
1096         iwl_write32(priv, CSR_RESET, 0);
1097 }
1098
1099 static void iwl4965_ucode_callback(const struct firmware *ucode_raw,
1100                                         void *context);
1101 static int iwl4965_mac_setup_register(struct iwl_priv *priv,
1102                                                 u32 max_probe_length);
1103
1104 static int __must_check iwl4965_request_firmware(struct iwl_priv *priv, bool first)
1105 {
1106         const char *name_pre = priv->cfg->fw_name_pre;
1107         char tag[8];
1108
1109         if (first) {
1110                 priv->fw_index = priv->cfg->ucode_api_max;
1111                 sprintf(tag, "%d", priv->fw_index);
1112         } else {
1113                 priv->fw_index--;
1114                 sprintf(tag, "%d", priv->fw_index);
1115         }
1116
1117         if (priv->fw_index < priv->cfg->ucode_api_min) {
1118                 IWL_ERR(priv, "no suitable firmware found!\n");
1119                 return -ENOENT;
1120         }
1121
1122         sprintf(priv->firmware_name, "%s%s%s", name_pre, tag, ".ucode");
1123
1124         IWL_DEBUG_INFO(priv, "attempting to load firmware '%s'\n",
1125                        priv->firmware_name);
1126
1127         return request_firmware_nowait(THIS_MODULE, 1, priv->firmware_name,
1128                                        &priv->pci_dev->dev, GFP_KERNEL, priv,
1129                                        iwl4965_ucode_callback);
1130 }
1131
1132 struct iwl4965_firmware_pieces {
1133         const void *inst, *data, *init, *init_data, *boot;
1134         size_t inst_size, data_size, init_size, init_data_size, boot_size;
1135 };
1136
1137 static int iwl4965_load_firmware(struct iwl_priv *priv,
1138                                        const struct firmware *ucode_raw,
1139                                        struct iwl4965_firmware_pieces *pieces)
1140 {
1141         struct iwl_ucode_header *ucode = (void *)ucode_raw->data;
1142         u32 api_ver, hdr_size;
1143         const u8 *src;
1144
1145         priv->ucode_ver = le32_to_cpu(ucode->ver);
1146         api_ver = IWL_UCODE_API(priv->ucode_ver);
1147
1148         switch (api_ver) {
1149         default:
1150         case 0:
1151         case 1:
1152         case 2:
1153                 hdr_size = 24;
1154                 if (ucode_raw->size < hdr_size) {
1155                         IWL_ERR(priv, "File size too small!\n");
1156                         return -EINVAL;
1157                 }
1158                 pieces->inst_size = le32_to_cpu(ucode->v1.inst_size);
1159                 pieces->data_size = le32_to_cpu(ucode->v1.data_size);
1160                 pieces->init_size = le32_to_cpu(ucode->v1.init_size);
1161                 pieces->init_data_size =
1162                                 le32_to_cpu(ucode->v1.init_data_size);
1163                 pieces->boot_size = le32_to_cpu(ucode->v1.boot_size);
1164                 src = ucode->v1.data;
1165                 break;
1166         }
1167
1168         /* Verify size of file vs. image size info in file's header */
1169         if (ucode_raw->size != hdr_size + pieces->inst_size +
1170                                 pieces->data_size + pieces->init_size +
1171                                 pieces->init_data_size + pieces->boot_size) {
1172
1173                 IWL_ERR(priv,
1174                         "uCode file size %d does not match expected size\n",
1175                         (int)ucode_raw->size);
1176                 return -EINVAL;
1177         }
1178
1179         pieces->inst = src;
1180         src += pieces->inst_size;
1181         pieces->data = src;
1182         src += pieces->data_size;
1183         pieces->init = src;
1184         src += pieces->init_size;
1185         pieces->init_data = src;
1186         src += pieces->init_data_size;
1187         pieces->boot = src;
1188         src += pieces->boot_size;
1189
1190         return 0;
1191 }
1192
1193 /**
1194  * iwl4965_ucode_callback - callback when firmware was loaded
1195  *
1196  * If loaded successfully, copies the firmware into buffers
1197  * for the card to fetch (via DMA).
1198  */
1199 static void
1200 iwl4965_ucode_callback(const struct firmware *ucode_raw, void *context)
1201 {
1202         struct iwl_priv *priv = context;
1203         struct iwl_ucode_header *ucode;
1204         int err;
1205         struct iwl4965_firmware_pieces pieces;
1206         const unsigned int api_max = priv->cfg->ucode_api_max;
1207         const unsigned int api_min = priv->cfg->ucode_api_min;
1208         u32 api_ver;
1209
1210         u32 max_probe_length = 200;
1211         u32 standard_phy_calibration_size =
1212                         IWL_DEFAULT_STANDARD_PHY_CALIBRATE_TBL_SIZE;
1213
1214         memset(&pieces, 0, sizeof(pieces));
1215
1216         if (!ucode_raw) {
1217                 if (priv->fw_index <= priv->cfg->ucode_api_max)
1218                         IWL_ERR(priv,
1219                                 "request for firmware file '%s' failed.\n",
1220                                 priv->firmware_name);
1221                 goto try_again;
1222         }
1223
1224         IWL_DEBUG_INFO(priv, "Loaded firmware file '%s' (%zd bytes).\n",
1225                        priv->firmware_name, ucode_raw->size);
1226
1227         /* Make sure that we got at least the API version number */
1228         if (ucode_raw->size < 4) {
1229                 IWL_ERR(priv, "File size way too small!\n");
1230                 goto try_again;
1231         }
1232
1233         /* Data from ucode file:  header followed by uCode images */
1234         ucode = (struct iwl_ucode_header *)ucode_raw->data;
1235
1236         err = iwl4965_load_firmware(priv, ucode_raw, &pieces);
1237
1238         if (err)
1239                 goto try_again;
1240
1241         api_ver = IWL_UCODE_API(priv->ucode_ver);
1242
1243         /*
1244          * api_ver should match the api version forming part of the
1245          * firmware filename ... but we don't check for that and only rely
1246          * on the API version read from firmware header from here on forward
1247          */
1248         if (api_ver < api_min || api_ver > api_max) {
1249                 IWL_ERR(priv,
1250                         "Driver unable to support your firmware API. "
1251                         "Driver supports v%u, firmware is v%u.\n",
1252                         api_max, api_ver);
1253                 goto try_again;
1254         }
1255
1256         if (api_ver != api_max)
1257                 IWL_ERR(priv,
1258                         "Firmware has old API version. Expected v%u, "
1259                         "got v%u. New firmware can be obtained "
1260                         "from http://www.intellinuxwireless.org.\n",
1261                         api_max, api_ver);
1262
1263         IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n",
1264                  IWL_UCODE_MAJOR(priv->ucode_ver),
1265                  IWL_UCODE_MINOR(priv->ucode_ver),
1266                  IWL_UCODE_API(priv->ucode_ver),
1267                  IWL_UCODE_SERIAL(priv->ucode_ver));
1268
1269         snprintf(priv->hw->wiphy->fw_version,
1270                  sizeof(priv->hw->wiphy->fw_version),
1271                  "%u.%u.%u.%u",
1272                  IWL_UCODE_MAJOR(priv->ucode_ver),
1273                  IWL_UCODE_MINOR(priv->ucode_ver),
1274                  IWL_UCODE_API(priv->ucode_ver),
1275                  IWL_UCODE_SERIAL(priv->ucode_ver));
1276
1277         /*
1278          * For any of the failures below (before allocating pci memory)
1279          * we will try to load a version with a smaller API -- maybe the
1280          * user just got a corrupted version of the latest API.
1281          */
1282
1283         IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
1284                        priv->ucode_ver);
1285         IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %Zd\n",
1286                        pieces.inst_size);
1287         IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %Zd\n",
1288                        pieces.data_size);
1289         IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %Zd\n",
1290                        pieces.init_size);
1291         IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %Zd\n",
1292                        pieces.init_data_size);
1293         IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %Zd\n",
1294                        pieces.boot_size);
1295
1296         /* Verify that uCode images will fit in card's SRAM */
1297         if (pieces.inst_size > priv->hw_params.max_inst_size) {
1298                 IWL_ERR(priv, "uCode instr len %Zd too large to fit in\n",
1299                         pieces.inst_size);
1300                 goto try_again;
1301         }
1302
1303         if (pieces.data_size > priv->hw_params.max_data_size) {
1304                 IWL_ERR(priv, "uCode data len %Zd too large to fit in\n",
1305                         pieces.data_size);
1306                 goto try_again;
1307         }
1308
1309         if (pieces.init_size > priv->hw_params.max_inst_size) {
1310                 IWL_ERR(priv, "uCode init instr len %Zd too large to fit in\n",
1311                         pieces.init_size);
1312                 goto try_again;
1313         }
1314
1315         if (pieces.init_data_size > priv->hw_params.max_data_size) {
1316                 IWL_ERR(priv, "uCode init data len %Zd too large to fit in\n",
1317                         pieces.init_data_size);
1318                 goto try_again;
1319         }
1320
1321         if (pieces.boot_size > priv->hw_params.max_bsm_size) {
1322                 IWL_ERR(priv, "uCode boot instr len %Zd too large to fit in\n",
1323                         pieces.boot_size);
1324                 goto try_again;
1325         }
1326
1327         /* Allocate ucode buffers for card's bus-master loading ... */
1328
1329         /* Runtime instructions and 2 copies of data:
1330          * 1) unmodified from disk
1331          * 2) backup cache for save/restore during power-downs */
1332         priv->ucode_code.len = pieces.inst_size;
1333         iwl_legacy_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
1334
1335         priv->ucode_data.len = pieces.data_size;
1336         iwl_legacy_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
1337
1338         priv->ucode_data_backup.len = pieces.data_size;
1339         iwl_legacy_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1340
1341         if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
1342             !priv->ucode_data_backup.v_addr)
1343                 goto err_pci_alloc;
1344
1345         /* Initialization instructions and data */
1346         if (pieces.init_size && pieces.init_data_size) {
1347                 priv->ucode_init.len = pieces.init_size;
1348                 iwl_legacy_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
1349
1350                 priv->ucode_init_data.len = pieces.init_data_size;
1351                 iwl_legacy_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1352
1353                 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
1354                         goto err_pci_alloc;
1355         }
1356
1357         /* Bootstrap (instructions only, no data) */
1358         if (pieces.boot_size) {
1359                 priv->ucode_boot.len = pieces.boot_size;
1360                 iwl_legacy_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
1361
1362                 if (!priv->ucode_boot.v_addr)
1363                         goto err_pci_alloc;
1364         }
1365
1366         /* Now that we can no longer fail, copy information */
1367
1368         priv->sta_key_max_num = STA_KEY_MAX_NUM;
1369
1370         /* Copy images into buffers for card's bus-master reads ... */
1371
1372         /* Runtime instructions (first block of data in file) */
1373         IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode instr len %Zd\n",
1374                         pieces.inst_size);
1375         memcpy(priv->ucode_code.v_addr, pieces.inst, pieces.inst_size);
1376
1377         IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
1378                 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
1379
1380         /*
1381          * Runtime data
1382          * NOTE:  Copy into backup buffer will be done in iwl_up()
1383          */
1384         IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode data len %Zd\n",
1385                         pieces.data_size);
1386         memcpy(priv->ucode_data.v_addr, pieces.data, pieces.data_size);
1387         memcpy(priv->ucode_data_backup.v_addr, pieces.data, pieces.data_size);
1388
1389         /* Initialization instructions */
1390         if (pieces.init_size) {
1391                 IWL_DEBUG_INFO(priv,
1392                                 "Copying (but not loading) init instr len %Zd\n",
1393                                 pieces.init_size);
1394                 memcpy(priv->ucode_init.v_addr, pieces.init, pieces.init_size);
1395         }
1396
1397         /* Initialization data */
1398         if (pieces.init_data_size) {
1399                 IWL_DEBUG_INFO(priv,
1400                                 "Copying (but not loading) init data len %Zd\n",
1401                                pieces.init_data_size);
1402                 memcpy(priv->ucode_init_data.v_addr, pieces.init_data,
1403                        pieces.init_data_size);
1404         }
1405
1406         /* Bootstrap instructions */
1407         IWL_DEBUG_INFO(priv, "Copying (but not loading) boot instr len %Zd\n",
1408                         pieces.boot_size);
1409         memcpy(priv->ucode_boot.v_addr, pieces.boot, pieces.boot_size);
1410
1411         /*
1412          * figure out the offset of chain noise reset and gain commands
1413          * base on the size of standard phy calibration commands table size
1414          */
1415         priv->_4965.phy_calib_chain_noise_reset_cmd =
1416                 standard_phy_calibration_size;
1417         priv->_4965.phy_calib_chain_noise_gain_cmd =
1418                 standard_phy_calibration_size + 1;
1419
1420         /**************************************************
1421          * This is still part of probe() in a sense...
1422          *
1423          * 9. Setup and register with mac80211 and debugfs
1424          **************************************************/
1425         err = iwl4965_mac_setup_register(priv, max_probe_length);
1426         if (err)
1427                 goto out_unbind;
1428
1429         err = iwl_legacy_dbgfs_register(priv, DRV_NAME);
1430         if (err)
1431                 IWL_ERR(priv,
1432                 "failed to create debugfs files. Ignoring error: %d\n", err);
1433
1434         err = sysfs_create_group(&priv->pci_dev->dev.kobj,
1435                                         &iwl_attribute_group);
1436         if (err) {
1437                 IWL_ERR(priv, "failed to create sysfs device attributes\n");
1438                 goto out_unbind;
1439         }
1440
1441         /* We have our copies now, allow OS release its copies */
1442         release_firmware(ucode_raw);
1443         complete(&priv->_4965.firmware_loading_complete);
1444         return;
1445
1446  try_again:
1447         /* try next, if any */
1448         if (iwl4965_request_firmware(priv, false))
1449                 goto out_unbind;
1450         release_firmware(ucode_raw);
1451         return;
1452
1453  err_pci_alloc:
1454         IWL_ERR(priv, "failed to allocate pci memory\n");
1455         iwl4965_dealloc_ucode_pci(priv);
1456  out_unbind:
1457         complete(&priv->_4965.firmware_loading_complete);
1458         device_release_driver(&priv->pci_dev->dev);
1459         release_firmware(ucode_raw);
1460 }
1461
1462 static const char * const desc_lookup_text[] = {
1463         "OK",
1464         "FAIL",
1465         "BAD_PARAM",
1466         "BAD_CHECKSUM",
1467         "NMI_INTERRUPT_WDG",
1468         "SYSASSERT",
1469         "FATAL_ERROR",
1470         "BAD_COMMAND",
1471         "HW_ERROR_TUNE_LOCK",
1472         "HW_ERROR_TEMPERATURE",
1473         "ILLEGAL_CHAN_FREQ",
1474         "VCC_NOT_STABLE",
1475         "FH_ERROR",
1476         "NMI_INTERRUPT_HOST",
1477         "NMI_INTERRUPT_ACTION_PT",
1478         "NMI_INTERRUPT_UNKNOWN",
1479         "UCODE_VERSION_MISMATCH",
1480         "HW_ERROR_ABS_LOCK",
1481         "HW_ERROR_CAL_LOCK_FAIL",
1482         "NMI_INTERRUPT_INST_ACTION_PT",
1483         "NMI_INTERRUPT_DATA_ACTION_PT",
1484         "NMI_TRM_HW_ER",
1485         "NMI_INTERRUPT_TRM",
1486         "NMI_INTERRUPT_BREAK_POINT",
1487         "DEBUG_0",
1488         "DEBUG_1",
1489         "DEBUG_2",
1490         "DEBUG_3",
1491 };
1492
1493 static struct { char *name; u8 num; } advanced_lookup[] = {
1494         { "NMI_INTERRUPT_WDG", 0x34 },
1495         { "SYSASSERT", 0x35 },
1496         { "UCODE_VERSION_MISMATCH", 0x37 },
1497         { "BAD_COMMAND", 0x38 },
1498         { "NMI_INTERRUPT_DATA_ACTION_PT", 0x3C },
1499         { "FATAL_ERROR", 0x3D },
1500         { "NMI_TRM_HW_ERR", 0x46 },
1501         { "NMI_INTERRUPT_TRM", 0x4C },
1502         { "NMI_INTERRUPT_BREAK_POINT", 0x54 },
1503         { "NMI_INTERRUPT_WDG_RXF_FULL", 0x5C },
1504         { "NMI_INTERRUPT_WDG_NO_RBD_RXF_FULL", 0x64 },
1505         { "NMI_INTERRUPT_HOST", 0x66 },
1506         { "NMI_INTERRUPT_ACTION_PT", 0x7C },
1507         { "NMI_INTERRUPT_UNKNOWN", 0x84 },
1508         { "NMI_INTERRUPT_INST_ACTION_PT", 0x86 },
1509         { "ADVANCED_SYSASSERT", 0 },
1510 };
1511
1512 static const char *iwl4965_desc_lookup(u32 num)
1513 {
1514         int i;
1515         int max = ARRAY_SIZE(desc_lookup_text);
1516
1517         if (num < max)
1518                 return desc_lookup_text[num];
1519
1520         max = ARRAY_SIZE(advanced_lookup) - 1;
1521         for (i = 0; i < max; i++) {
1522                 if (advanced_lookup[i].num == num)
1523                         break;
1524         }
1525         return advanced_lookup[i].name;
1526 }
1527
1528 #define ERROR_START_OFFSET  (1 * sizeof(u32))
1529 #define ERROR_ELEM_SIZE     (7 * sizeof(u32))
1530
1531 void iwl4965_dump_nic_error_log(struct iwl_priv *priv)
1532 {
1533         u32 data2, line;
1534         u32 desc, time, count, base, data1;
1535         u32 blink1, blink2, ilink1, ilink2;
1536         u32 pc, hcmd;
1537
1538         if (priv->ucode_type == UCODE_INIT) {
1539                 base = le32_to_cpu(priv->card_alive_init.error_event_table_ptr);
1540         } else {
1541                 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
1542         }
1543
1544         if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
1545                 IWL_ERR(priv,
1546                         "Not valid error log pointer 0x%08X for %s uCode\n",
1547                         base, (priv->ucode_type == UCODE_INIT) ? "Init" : "RT");
1548                 return;
1549         }
1550
1551         count = iwl_legacy_read_targ_mem(priv, base);
1552
1553         if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
1554                 IWL_ERR(priv, "Start IWL Error Log Dump:\n");
1555                 IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
1556                         priv->status, count);
1557         }
1558
1559         desc = iwl_legacy_read_targ_mem(priv, base + 1 * sizeof(u32));
1560         priv->isr_stats.err_code = desc;
1561         pc = iwl_legacy_read_targ_mem(priv, base + 2 * sizeof(u32));
1562         blink1 = iwl_legacy_read_targ_mem(priv, base + 3 * sizeof(u32));
1563         blink2 = iwl_legacy_read_targ_mem(priv, base + 4 * sizeof(u32));
1564         ilink1 = iwl_legacy_read_targ_mem(priv, base + 5 * sizeof(u32));
1565         ilink2 = iwl_legacy_read_targ_mem(priv, base + 6 * sizeof(u32));
1566         data1 = iwl_legacy_read_targ_mem(priv, base + 7 * sizeof(u32));
1567         data2 = iwl_legacy_read_targ_mem(priv, base + 8 * sizeof(u32));
1568         line = iwl_legacy_read_targ_mem(priv, base + 9 * sizeof(u32));
1569         time = iwl_legacy_read_targ_mem(priv, base + 11 * sizeof(u32));
1570         hcmd = iwl_legacy_read_targ_mem(priv, base + 22 * sizeof(u32));
1571
1572         trace_iwlwifi_legacy_dev_ucode_error(priv, desc,
1573                                         time, data1, data2, line,
1574                                       blink1, blink2, ilink1, ilink2);
1575
1576         IWL_ERR(priv, "Desc                                  Time       "
1577                 "data1      data2      line\n");
1578         IWL_ERR(priv, "%-28s (0x%04X) %010u 0x%08X 0x%08X %u\n",
1579                 iwl4965_desc_lookup(desc), desc, time, data1, data2, line);
1580         IWL_ERR(priv, "pc      blink1  blink2  ilink1  ilink2  hcmd\n");
1581         IWL_ERR(priv, "0x%05X 0x%05X 0x%05X 0x%05X 0x%05X 0x%05X\n",
1582                 pc, blink1, blink2, ilink1, ilink2, hcmd);
1583 }
1584
1585 static void iwl4965_rf_kill_ct_config(struct iwl_priv *priv)
1586 {
1587         struct iwl_ct_kill_config cmd;
1588         unsigned long flags;
1589         int ret = 0;
1590
1591         spin_lock_irqsave(&priv->lock, flags);
1592         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
1593                     CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
1594         spin_unlock_irqrestore(&priv->lock, flags);
1595
1596         cmd.critical_temperature_R =
1597                 cpu_to_le32(priv->hw_params.ct_kill_threshold);
1598
1599         ret = iwl_legacy_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
1600                                sizeof(cmd), &cmd);
1601         if (ret)
1602                 IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
1603         else
1604                 IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD "
1605                                 "succeeded, "
1606                                 "critical temperature is %d\n",
1607                                 priv->hw_params.ct_kill_threshold);
1608 }
1609
1610 static const s8 default_queue_to_tx_fifo[] = {
1611         IWL_TX_FIFO_VO,
1612         IWL_TX_FIFO_VI,
1613         IWL_TX_FIFO_BE,
1614         IWL_TX_FIFO_BK,
1615         IWL49_CMD_FIFO_NUM,
1616         IWL_TX_FIFO_UNUSED,
1617         IWL_TX_FIFO_UNUSED,
1618 };
1619
1620 static int iwl4965_alive_notify(struct iwl_priv *priv)
1621 {
1622         u32 a;
1623         unsigned long flags;
1624         int i, chan;
1625         u32 reg_val;
1626
1627         spin_lock_irqsave(&priv->lock, flags);
1628
1629         /* Clear 4965's internal Tx Scheduler data base */
1630         priv->scd_base_addr = iwl_legacy_read_prph(priv,
1631                                         IWL49_SCD_SRAM_BASE_ADDR);
1632         a = priv->scd_base_addr + IWL49_SCD_CONTEXT_DATA_OFFSET;
1633         for (; a < priv->scd_base_addr + IWL49_SCD_TX_STTS_BITMAP_OFFSET; a += 4)
1634                 iwl_legacy_write_targ_mem(priv, a, 0);
1635         for (; a < priv->scd_base_addr + IWL49_SCD_TRANSLATE_TBL_OFFSET; a += 4)
1636                 iwl_legacy_write_targ_mem(priv, a, 0);
1637         for (; a < priv->scd_base_addr +
1638                IWL49_SCD_TRANSLATE_TBL_OFFSET_QUEUE(priv->hw_params.max_txq_num); a += 4)
1639                 iwl_legacy_write_targ_mem(priv, a, 0);
1640
1641         /* Tel 4965 where to find Tx byte count tables */
1642         iwl_legacy_write_prph(priv, IWL49_SCD_DRAM_BASE_ADDR,
1643                         priv->scd_bc_tbls.dma >> 10);
1644
1645         /* Enable DMA channel */
1646         for (chan = 0; chan < FH49_TCSR_CHNL_NUM ; chan++)
1647                 iwl_legacy_write_direct32(priv,
1648                                 FH_TCSR_CHNL_TX_CONFIG_REG(chan),
1649                                 FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE |
1650                                 FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE);
1651
1652         /* Update FH chicken bits */
1653         reg_val = iwl_legacy_read_direct32(priv, FH_TX_CHICKEN_BITS_REG);
1654         iwl_legacy_write_direct32(priv, FH_TX_CHICKEN_BITS_REG,
1655                            reg_val | FH_TX_CHICKEN_BITS_SCD_AUTO_RETRY_EN);
1656
1657         /* Disable chain mode for all queues */
1658         iwl_legacy_write_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, 0);
1659
1660         /* Initialize each Tx queue (including the command queue) */
1661         for (i = 0; i < priv->hw_params.max_txq_num; i++) {
1662
1663                 /* TFD circular buffer read/write indexes */
1664                 iwl_legacy_write_prph(priv, IWL49_SCD_QUEUE_RDPTR(i), 0);
1665                 iwl_legacy_write_direct32(priv, HBUS_TARG_WRPTR, 0 | (i << 8));
1666
1667                 /* Max Tx Window size for Scheduler-ACK mode */
1668                 iwl_legacy_write_targ_mem(priv, priv->scd_base_addr +
1669                                 IWL49_SCD_CONTEXT_QUEUE_OFFSET(i),
1670                                 (SCD_WIN_SIZE <<
1671                                 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
1672                                 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
1673
1674                 /* Frame limit */
1675                 iwl_legacy_write_targ_mem(priv, priv->scd_base_addr +
1676                                 IWL49_SCD_CONTEXT_QUEUE_OFFSET(i) +
1677                                 sizeof(u32),
1678                                 (SCD_FRAME_LIMIT <<
1679                                 IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS) &
1680                                 IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
1681
1682         }
1683         iwl_legacy_write_prph(priv, IWL49_SCD_INTERRUPT_MASK,
1684                                  (1 << priv->hw_params.max_txq_num) - 1);
1685
1686         /* Activate all Tx DMA/FIFO channels */
1687         iwl4965_txq_set_sched(priv, IWL_MASK(0, 6));
1688
1689         iwl4965_set_wr_ptrs(priv, IWL_DEFAULT_CMD_QUEUE_NUM, 0);
1690
1691         /* make sure all queue are not stopped */
1692         memset(&priv->queue_stopped[0], 0, sizeof(priv->queue_stopped));
1693         for (i = 0; i < 4; i++)
1694                 atomic_set(&priv->queue_stop_count[i], 0);
1695
1696         /* reset to 0 to enable all the queue first */
1697         priv->txq_ctx_active_msk = 0;
1698         /* Map each Tx/cmd queue to its corresponding fifo */
1699         BUILD_BUG_ON(ARRAY_SIZE(default_queue_to_tx_fifo) != 7);
1700
1701         for (i = 0; i < ARRAY_SIZE(default_queue_to_tx_fifo); i++) {
1702                 int ac = default_queue_to_tx_fifo[i];
1703
1704                 iwl_txq_ctx_activate(priv, i);
1705
1706                 if (ac == IWL_TX_FIFO_UNUSED)
1707                         continue;
1708
1709                 iwl4965_tx_queue_set_status(priv, &priv->txq[i], ac, 0);
1710         }
1711
1712         spin_unlock_irqrestore(&priv->lock, flags);
1713
1714         return 0;
1715 }
1716
1717 /**
1718  * iwl4965_alive_start - called after REPLY_ALIVE notification received
1719  *                   from protocol/runtime uCode (initialization uCode's
1720  *                   Alive gets handled by iwl_init_alive_start()).
1721  */
1722 static void iwl4965_alive_start(struct iwl_priv *priv)
1723 {
1724         int ret = 0;
1725         struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
1726
1727         IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
1728
1729         if (priv->card_alive.is_valid != UCODE_VALID_OK) {
1730                 /* We had an error bringing up the hardware, so take it
1731                  * all the way back down so we can try again */
1732                 IWL_DEBUG_INFO(priv, "Alive failed.\n");
1733                 goto restart;
1734         }
1735
1736         /* Initialize uCode has loaded Runtime uCode ... verify inst image.
1737          * This is a paranoid check, because we would not have gotten the
1738          * "runtime" alive if code weren't properly loaded.  */
1739         if (iwl4965_verify_ucode(priv)) {
1740                 /* Runtime instruction load was bad;
1741                  * take it all the way back down so we can try again */
1742                 IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
1743                 goto restart;
1744         }
1745
1746         ret = iwl4965_alive_notify(priv);
1747         if (ret) {
1748                 IWL_WARN(priv,
1749                         "Could not complete ALIVE transition [ntf]: %d\n", ret);
1750                 goto restart;
1751         }
1752
1753
1754         /* After the ALIVE response, we can send host commands to the uCode */
1755         set_bit(STATUS_ALIVE, &priv->status);
1756
1757         /* Enable watchdog to monitor the driver tx queues */
1758         iwl_legacy_setup_watchdog(priv);
1759
1760         if (iwl_legacy_is_rfkill(priv))
1761                 return;
1762
1763         ieee80211_wake_queues(priv->hw);
1764
1765         priv->active_rate = IWL_RATES_MASK;
1766
1767         iwl_legacy_power_update_mode(priv, true);
1768         IWL_DEBUG_INFO(priv, "Updated power mode\n");
1769
1770         if (iwl_legacy_is_associated_ctx(ctx)) {
1771                 struct iwl_legacy_rxon_cmd *active_rxon =
1772                                 (struct iwl_legacy_rxon_cmd *)&ctx->active;
1773                 /* apply any changes in staging */
1774                 ctx->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
1775                 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
1776         } else {
1777                 struct iwl_rxon_context *tmp;
1778                 /* Initialize our rx_config data */
1779                 for_each_context(priv, tmp)
1780                         iwl_legacy_connection_init_rx_config(priv, tmp);
1781
1782                 if (priv->cfg->ops->hcmd->set_rxon_chain)
1783                         priv->cfg->ops->hcmd->set_rxon_chain(priv, ctx);
1784         }
1785
1786         /* Configure bluetooth coexistence if enabled */
1787         iwl_legacy_send_bt_config(priv);
1788
1789         iwl4965_reset_run_time_calib(priv);
1790
1791         set_bit(STATUS_READY, &priv->status);
1792
1793         /* Configure the adapter for unassociated operation */
1794         iwl_legacy_commit_rxon(priv, ctx);
1795
1796         /* At this point, the NIC is initialized and operational */
1797         iwl4965_rf_kill_ct_config(priv);
1798
1799         IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
1800         wake_up(&priv->wait_command_queue);
1801
1802         return;
1803
1804  restart:
1805         queue_work(priv->workqueue, &priv->restart);
1806 }
1807
1808 static void iwl4965_cancel_deferred_work(struct iwl_priv *priv);
1809
1810 static void __iwl4965_down(struct iwl_priv *priv)
1811 {
1812         unsigned long flags;
1813         int exit_pending;
1814
1815         IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
1816
1817         iwl_legacy_scan_cancel_timeout(priv, 200);
1818
1819         exit_pending = test_and_set_bit(STATUS_EXIT_PENDING, &priv->status);
1820
1821         /* Stop TX queues watchdog. We need to have STATUS_EXIT_PENDING bit set
1822          * to prevent rearm timer */
1823         del_timer_sync(&priv->watchdog);
1824
1825         iwl_legacy_clear_ucode_stations(priv, NULL);
1826         iwl_legacy_dealloc_bcast_stations(priv);
1827         iwl_legacy_clear_driver_stations(priv);
1828
1829         /* Unblock any waiting calls */
1830         wake_up_all(&priv->wait_command_queue);
1831
1832         /* Wipe out the EXIT_PENDING status bit if we are not actually
1833          * exiting the module */
1834         if (!exit_pending)
1835                 clear_bit(STATUS_EXIT_PENDING, &priv->status);
1836
1837         /* stop and reset the on-board processor */
1838         iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
1839
1840         /* tell the device to stop sending interrupts */
1841         spin_lock_irqsave(&priv->lock, flags);
1842         iwl_legacy_disable_interrupts(priv);
1843         spin_unlock_irqrestore(&priv->lock, flags);
1844         iwl4965_synchronize_irq(priv);
1845
1846         if (priv->mac80211_registered)
1847                 ieee80211_stop_queues(priv->hw);
1848
1849         /* If we have not previously called iwl_init() then
1850          * clear all bits but the RF Kill bit and return */
1851         if (!iwl_legacy_is_init(priv)) {
1852                 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
1853                                         STATUS_RF_KILL_HW |
1854                                test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
1855                                         STATUS_GEO_CONFIGURED |
1856                                test_bit(STATUS_EXIT_PENDING, &priv->status) <<
1857                                         STATUS_EXIT_PENDING;
1858                 goto exit;
1859         }
1860
1861         /* ...otherwise clear out all the status bits but the RF Kill
1862          * bit and continue taking the NIC down. */
1863         priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
1864                                 STATUS_RF_KILL_HW |
1865                         test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
1866                                 STATUS_GEO_CONFIGURED |
1867                         test_bit(STATUS_FW_ERROR, &priv->status) <<
1868                                 STATUS_FW_ERROR |
1869                        test_bit(STATUS_EXIT_PENDING, &priv->status) <<
1870                                 STATUS_EXIT_PENDING;
1871
1872         iwl4965_txq_ctx_stop(priv);
1873         iwl4965_rxq_stop(priv);
1874
1875         /* Power-down device's busmaster DMA clocks */
1876         iwl_legacy_write_prph(priv, APMG_CLK_DIS_REG, APMG_CLK_VAL_DMA_CLK_RQT);
1877         udelay(5);
1878
1879         /* Make sure (redundant) we've released our request to stay awake */
1880         iwl_legacy_clear_bit(priv, CSR_GP_CNTRL,
1881                                 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
1882
1883         /* Stop the device, and put it in low power state */
1884         iwl_legacy_apm_stop(priv);
1885
1886  exit:
1887         memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
1888
1889         dev_kfree_skb(priv->beacon_skb);
1890         priv->beacon_skb = NULL;
1891
1892         /* clear out any free frames */
1893         iwl4965_clear_free_frames(priv);
1894 }
1895
1896 static void iwl4965_down(struct iwl_priv *priv)
1897 {
1898         mutex_lock(&priv->mutex);
1899         __iwl4965_down(priv);
1900         mutex_unlock(&priv->mutex);
1901
1902         iwl4965_cancel_deferred_work(priv);
1903 }
1904
1905 #define HW_READY_TIMEOUT (50)
1906
1907 static int iwl4965_set_hw_ready(struct iwl_priv *priv)
1908 {
1909         int ret = 0;
1910
1911         iwl_legacy_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1912                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY);
1913
1914         /* See if we got it */
1915         ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
1916                                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
1917                                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
1918                                 HW_READY_TIMEOUT);
1919         if (ret != -ETIMEDOUT)
1920                 priv->hw_ready = true;
1921         else
1922                 priv->hw_ready = false;
1923
1924         IWL_DEBUG_INFO(priv, "hardware %s\n",
1925                       (priv->hw_ready == 1) ? "ready" : "not ready");
1926         return ret;
1927 }
1928
1929 static int iwl4965_prepare_card_hw(struct iwl_priv *priv)
1930 {
1931         int ret = 0;
1932
1933         IWL_DEBUG_INFO(priv, "iwl4965_prepare_card_hw enter\n");
1934
1935         ret = iwl4965_set_hw_ready(priv);
1936         if (priv->hw_ready)
1937                 return ret;
1938
1939         /* If HW is not ready, prepare the conditions to check again */
1940         iwl_legacy_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1941                         CSR_HW_IF_CONFIG_REG_PREPARE);
1942
1943         ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
1944                         ~CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE,
1945                         CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE, 150000);
1946
1947         /* HW should be ready by now, check again. */
1948         if (ret != -ETIMEDOUT)
1949                 iwl4965_set_hw_ready(priv);
1950
1951         return ret;
1952 }
1953
1954 #define MAX_HW_RESTARTS 5
1955
1956 static int __iwl4965_up(struct iwl_priv *priv)
1957 {
1958         struct iwl_rxon_context *ctx;
1959         int i;
1960         int ret;
1961
1962         if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
1963                 IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
1964                 return -EIO;
1965         }
1966
1967         if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
1968                 IWL_ERR(priv, "ucode not available for device bringup\n");
1969                 return -EIO;
1970         }
1971
1972         for_each_context(priv, ctx) {
1973                 ret = iwl4965_alloc_bcast_station(priv, ctx);
1974                 if (ret) {
1975                         iwl_legacy_dealloc_bcast_stations(priv);
1976                         return ret;
1977                 }
1978         }
1979
1980         iwl4965_prepare_card_hw(priv);
1981
1982         if (!priv->hw_ready) {
1983                 IWL_WARN(priv, "Exit HW not ready\n");
1984                 return -EIO;
1985         }
1986
1987         /* If platform's RF_KILL switch is NOT set to KILL */
1988         if (iwl_read32(priv,
1989                 CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
1990                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1991         else
1992                 set_bit(STATUS_RF_KILL_HW, &priv->status);
1993
1994         if (iwl_legacy_is_rfkill(priv)) {
1995                 wiphy_rfkill_set_hw_state(priv->hw->wiphy, true);
1996
1997                 iwl_legacy_enable_interrupts(priv);
1998                 IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
1999                 return 0;
2000         }
2001
2002         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2003
2004         /* must be initialised before iwl_hw_nic_init */
2005         priv->cmd_queue = IWL_DEFAULT_CMD_QUEUE_NUM;
2006
2007         ret = iwl4965_hw_nic_init(priv);
2008         if (ret) {
2009                 IWL_ERR(priv, "Unable to init nic\n");
2010                 return ret;
2011         }
2012
2013         /* make sure rfkill handshake bits are cleared */
2014         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2015         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
2016                     CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
2017
2018         /* clear (again), then enable host interrupts */
2019         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2020         iwl_legacy_enable_interrupts(priv);
2021
2022         /* really make sure rfkill handshake bits are cleared */
2023         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2024         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2025
2026         /* Copy original ucode data image from disk into backup cache.
2027          * This will be used to initialize the on-board processor's
2028          * data SRAM for a clean start when the runtime program first loads. */
2029         memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
2030                priv->ucode_data.len);
2031
2032         for (i = 0; i < MAX_HW_RESTARTS; i++) {
2033
2034                 /* load bootstrap state machine,
2035                  * load bootstrap program into processor's memory,
2036                  * prepare to load the "initialize" uCode */
2037                 ret = priv->cfg->ops->lib->load_ucode(priv);
2038
2039                 if (ret) {
2040                         IWL_ERR(priv, "Unable to set up bootstrap uCode: %d\n",
2041                                 ret);
2042                         continue;
2043                 }
2044
2045                 /* start card; "initialize" will load runtime ucode */
2046                 iwl4965_nic_start(priv);
2047
2048                 IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
2049
2050                 return 0;
2051         }
2052
2053         set_bit(STATUS_EXIT_PENDING, &priv->status);
2054         __iwl4965_down(priv);
2055         clear_bit(STATUS_EXIT_PENDING, &priv->status);
2056
2057         /* tried to restart and config the device for as long as our
2058          * patience could withstand */
2059         IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
2060         return -EIO;
2061 }
2062
2063
2064 /*****************************************************************************
2065  *
2066  * Workqueue callbacks
2067  *
2068  *****************************************************************************/
2069
2070 static void iwl4965_bg_init_alive_start(struct work_struct *data)
2071 {
2072         struct iwl_priv *priv =
2073             container_of(data, struct iwl_priv, init_alive_start.work);
2074
2075         mutex_lock(&priv->mutex);
2076         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2077                 goto out;
2078
2079         priv->cfg->ops->lib->init_alive_start(priv);
2080 out:
2081         mutex_unlock(&priv->mutex);
2082 }
2083
2084 static void iwl4965_bg_alive_start(struct work_struct *data)
2085 {
2086         struct iwl_priv *priv =
2087             container_of(data, struct iwl_priv, alive_start.work);
2088
2089         mutex_lock(&priv->mutex);
2090         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2091                 goto out;
2092
2093         iwl4965_alive_start(priv);
2094 out:
2095         mutex_unlock(&priv->mutex);
2096 }
2097
2098 static void iwl4965_bg_run_time_calib_work(struct work_struct *work)
2099 {
2100         struct iwl_priv *priv = container_of(work, struct iwl_priv,
2101                         run_time_calib_work);
2102
2103         mutex_lock(&priv->mutex);
2104
2105         if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
2106             test_bit(STATUS_SCANNING, &priv->status)) {
2107                 mutex_unlock(&priv->mutex);
2108                 return;
2109         }
2110
2111         if (priv->start_calib) {
2112                 iwl4965_chain_noise_calibration(priv,
2113                                 (void *)&priv->_4965.statistics);
2114                 iwl4965_sensitivity_calibration(priv,
2115                                 (void *)&priv->_4965.statistics);
2116         }
2117
2118         mutex_unlock(&priv->mutex);
2119 }
2120
2121 static void iwl4965_bg_restart(struct work_struct *data)
2122 {
2123         struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
2124
2125         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2126                 return;
2127
2128         if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) {
2129                 struct iwl_rxon_context *ctx;
2130
2131                 mutex_lock(&priv->mutex);
2132                 for_each_context(priv, ctx)
2133                         ctx->vif = NULL;
2134                 priv->is_open = 0;
2135
2136                 __iwl4965_down(priv);
2137
2138                 mutex_unlock(&priv->mutex);
2139                 iwl4965_cancel_deferred_work(priv);
2140                 ieee80211_restart_hw(priv->hw);
2141         } else {
2142                 iwl4965_down(priv);
2143
2144                 mutex_lock(&priv->mutex);
2145                 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
2146                         mutex_unlock(&priv->mutex);
2147                         return;
2148                 }
2149
2150                 __iwl4965_up(priv);
2151                 mutex_unlock(&priv->mutex);
2152         }
2153 }
2154
2155 static void iwl4965_bg_rx_replenish(struct work_struct *data)
2156 {
2157         struct iwl_priv *priv =
2158             container_of(data, struct iwl_priv, rx_replenish);
2159
2160         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2161                 return;
2162
2163         mutex_lock(&priv->mutex);
2164         iwl4965_rx_replenish(priv);
2165         mutex_unlock(&priv->mutex);
2166 }
2167
2168 /*****************************************************************************
2169  *
2170  * mac80211 entry point functions
2171  *
2172  *****************************************************************************/
2173
2174 #define UCODE_READY_TIMEOUT     (4 * HZ)
2175
2176 /*
2177  * Not a mac80211 entry point function, but it fits in with all the
2178  * other mac80211 functions grouped here.
2179  */
2180 static int iwl4965_mac_setup_register(struct iwl_priv *priv,
2181                                   u32 max_probe_length)
2182 {
2183         int ret;
2184         struct ieee80211_hw *hw = priv->hw;
2185         struct iwl_rxon_context *ctx;
2186
2187         hw->rate_control_algorithm = "iwl-4965-rs";
2188
2189         /* Tell mac80211 our characteristics */
2190         hw->flags = IEEE80211_HW_SIGNAL_DBM |
2191                     IEEE80211_HW_AMPDU_AGGREGATION |
2192                     IEEE80211_HW_NEED_DTIM_PERIOD |
2193                     IEEE80211_HW_SPECTRUM_MGMT |
2194                     IEEE80211_HW_REPORTS_TX_ACK_STATUS;
2195
2196         if (priv->cfg->sku & IWL_SKU_N)
2197                 hw->flags |= IEEE80211_HW_SUPPORTS_DYNAMIC_SMPS |
2198                              IEEE80211_HW_SUPPORTS_STATIC_SMPS;
2199
2200         hw->sta_data_size = sizeof(struct iwl_station_priv);
2201         hw->vif_data_size = sizeof(struct iwl_vif_priv);
2202
2203         for_each_context(priv, ctx) {
2204                 hw->wiphy->interface_modes |= ctx->interface_modes;
2205                 hw->wiphy->interface_modes |= ctx->exclusive_interface_modes;
2206         }
2207
2208         hw->wiphy->flags |= WIPHY_FLAG_CUSTOM_REGULATORY |
2209                             WIPHY_FLAG_DISABLE_BEACON_HINTS;
2210
2211         /*
2212          * For now, disable PS by default because it affects
2213          * RX performance significantly.
2214          */
2215         hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT;
2216
2217         hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX;
2218         /* we create the 802.11 header and a zero-length SSID element */
2219         hw->wiphy->max_scan_ie_len = max_probe_length - 24 - 2;
2220
2221         /* Default value; 4 EDCA QOS priorities */
2222         hw->queues = 4;
2223
2224         hw->max_listen_interval = IWL_CONN_MAX_LISTEN_INTERVAL;
2225
2226         if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
2227                 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
2228                         &priv->bands[IEEE80211_BAND_2GHZ];
2229         if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
2230                 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
2231                         &priv->bands[IEEE80211_BAND_5GHZ];
2232
2233         iwl_legacy_leds_init(priv);
2234
2235         ret = ieee80211_register_hw(priv->hw);
2236         if (ret) {
2237                 IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
2238                 return ret;
2239         }
2240         priv->mac80211_registered = 1;
2241
2242         return 0;
2243 }
2244
2245
2246 int iwl4965_mac_start(struct ieee80211_hw *hw)
2247 {
2248         struct iwl_priv *priv = hw->priv;
2249         int ret;
2250
2251         IWL_DEBUG_MAC80211(priv, "enter\n");
2252
2253         /* we should be verifying the device is ready to be opened */
2254         mutex_lock(&priv->mutex);
2255         ret = __iwl4965_up(priv);
2256         mutex_unlock(&priv->mutex);
2257
2258         if (ret)
2259                 return ret;
2260
2261         if (iwl_legacy_is_rfkill(priv))
2262                 goto out;
2263
2264         IWL_DEBUG_INFO(priv, "Start UP work done.\n");
2265
2266         /* Wait for START_ALIVE from Run Time ucode. Otherwise callbacks from
2267          * mac80211 will not be run successfully. */
2268         ret = wait_event_timeout(priv->wait_command_queue,
2269                         test_bit(STATUS_READY, &priv->status),
2270                         UCODE_READY_TIMEOUT);
2271         if (!ret) {
2272                 if (!test_bit(STATUS_READY, &priv->status)) {
2273                         IWL_ERR(priv, "START_ALIVE timeout after %dms.\n",
2274                                 jiffies_to_msecs(UCODE_READY_TIMEOUT));
2275                         return -ETIMEDOUT;
2276                 }
2277         }
2278
2279         iwl4965_led_enable(priv);
2280
2281 out:
2282         priv->is_open = 1;
2283         IWL_DEBUG_MAC80211(priv, "leave\n");
2284         return 0;
2285 }
2286
2287 void iwl4965_mac_stop(struct ieee80211_hw *hw)
2288 {
2289         struct iwl_priv *priv = hw->priv;
2290
2291         IWL_DEBUG_MAC80211(priv, "enter\n");
2292
2293         if (!priv->is_open)
2294                 return;
2295
2296         priv->is_open = 0;
2297
2298         iwl4965_down(priv);
2299
2300         flush_workqueue(priv->workqueue);
2301
2302         /* User space software may expect getting rfkill changes
2303          * even if interface is down */
2304         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2305         iwl_legacy_enable_rfkill_int(priv);
2306
2307         IWL_DEBUG_MAC80211(priv, "leave\n");
2308 }
2309
2310 void iwl4965_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
2311 {
2312         struct iwl_priv *priv = hw->priv;
2313
2314         IWL_DEBUG_MACDUMP(priv, "enter\n");
2315
2316         IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
2317                      ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
2318
2319         if (iwl4965_tx_skb(priv, skb))
2320                 dev_kfree_skb_any(skb);
2321
2322         IWL_DEBUG_MACDUMP(priv, "leave\n");
2323 }
2324
2325 void iwl4965_mac_update_tkip_key(struct ieee80211_hw *hw,
2326                                 struct ieee80211_vif *vif,
2327                                 struct ieee80211_key_conf *keyconf,
2328                                 struct ieee80211_sta *sta,
2329                                 u32 iv32, u16 *phase1key)
2330 {
2331         struct iwl_priv *priv = hw->priv;
2332         struct iwl_vif_priv *vif_priv = (void *)vif->drv_priv;
2333
2334         IWL_DEBUG_MAC80211(priv, "enter\n");
2335
2336         iwl4965_update_tkip_key(priv, vif_priv->ctx, keyconf, sta,
2337                             iv32, phase1key);
2338
2339         IWL_DEBUG_MAC80211(priv, "leave\n");
2340 }
2341
2342 int iwl4965_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
2343                        struct ieee80211_vif *vif, struct ieee80211_sta *sta,
2344                        struct ieee80211_key_conf *key)
2345 {
2346         struct iwl_priv *priv = hw->priv;
2347         struct iwl_vif_priv *vif_priv = (void *)vif->drv_priv;
2348         struct iwl_rxon_context *ctx = vif_priv->ctx;
2349         int ret;
2350         u8 sta_id;
2351         bool is_default_wep_key = false;
2352
2353         IWL_DEBUG_MAC80211(priv, "enter\n");
2354
2355         if (priv->cfg->mod_params->sw_crypto) {
2356                 IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
2357                 return -EOPNOTSUPP;
2358         }
2359
2360         sta_id = iwl_legacy_sta_id_or_broadcast(priv, vif_priv->ctx, sta);
2361         if (sta_id == IWL_INVALID_STATION)
2362                 return -EINVAL;
2363
2364         mutex_lock(&priv->mutex);
2365         iwl_legacy_scan_cancel_timeout(priv, 100);
2366
2367         /*
2368          * If we are getting WEP group key and we didn't receive any key mapping
2369          * so far, we are in legacy wep mode (group key only), otherwise we are
2370          * in 1X mode.
2371          * In legacy wep mode, we use another host command to the uCode.
2372          */
2373         if ((key->cipher == WLAN_CIPHER_SUITE_WEP40 ||
2374              key->cipher == WLAN_CIPHER_SUITE_WEP104) &&
2375             !sta) {
2376                 if (cmd == SET_KEY)
2377                         is_default_wep_key = !ctx->key_mapping_keys;
2378                 else
2379                         is_default_wep_key =
2380                                         (key->hw_key_idx == HW_KEY_DEFAULT);
2381         }
2382
2383         switch (cmd) {
2384         case SET_KEY:
2385                 if (is_default_wep_key)
2386                         ret = iwl4965_set_default_wep_key(priv,
2387                                                         vif_priv->ctx, key);
2388                 else
2389                         ret = iwl4965_set_dynamic_key(priv, vif_priv->ctx,
2390                                                   key, sta_id);
2391
2392                 IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
2393                 break;
2394         case DISABLE_KEY:
2395                 if (is_default_wep_key)
2396                         ret = iwl4965_remove_default_wep_key(priv, ctx, key);
2397                 else
2398                         ret = iwl4965_remove_dynamic_key(priv, ctx,
2399                                                         key, sta_id);
2400
2401                 IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
2402                 break;
2403         default:
2404                 ret = -EINVAL;
2405         }
2406
2407         mutex_unlock(&priv->mutex);
2408         IWL_DEBUG_MAC80211(priv, "leave\n");
2409
2410         return ret;
2411 }
2412
2413 int iwl4965_mac_ampdu_action(struct ieee80211_hw *hw,
2414                             struct ieee80211_vif *vif,
2415                             enum ieee80211_ampdu_mlme_action action,
2416                             struct ieee80211_sta *sta, u16 tid, u16 *ssn,
2417                             u8 buf_size)
2418 {
2419         struct iwl_priv *priv = hw->priv;
2420         int ret = -EINVAL;
2421
2422         IWL_DEBUG_HT(priv, "A-MPDU action on addr %pM tid %d\n",
2423                      sta->addr, tid);
2424
2425         if (!(priv->cfg->sku & IWL_SKU_N))
2426                 return -EACCES;
2427
2428         mutex_lock(&priv->mutex);
2429
2430         switch (action) {
2431         case IEEE80211_AMPDU_RX_START:
2432                 IWL_DEBUG_HT(priv, "start Rx\n");
2433                 ret = iwl4965_sta_rx_agg_start(priv, sta, tid, *ssn);
2434                 break;
2435         case IEEE80211_AMPDU_RX_STOP:
2436                 IWL_DEBUG_HT(priv, "stop Rx\n");
2437                 ret = iwl4965_sta_rx_agg_stop(priv, sta, tid);
2438                 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2439                         ret = 0;
2440                 break;
2441         case IEEE80211_AMPDU_TX_START:
2442                 IWL_DEBUG_HT(priv, "start Tx\n");
2443                 ret = iwl4965_tx_agg_start(priv, vif, sta, tid, ssn);
2444                 break;
2445         case IEEE80211_AMPDU_TX_STOP:
2446                 IWL_DEBUG_HT(priv, "stop Tx\n");
2447                 ret = iwl4965_tx_agg_stop(priv, vif, sta, tid);
2448                 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2449                         ret = 0;
2450                 break;
2451         case IEEE80211_AMPDU_TX_OPERATIONAL:
2452                 ret = 0;
2453                 break;
2454         }
2455         mutex_unlock(&priv->mutex);
2456
2457         return ret;
2458 }
2459
2460 int iwl4965_mac_sta_add(struct ieee80211_hw *hw,
2461                        struct ieee80211_vif *vif,
2462                        struct ieee80211_sta *sta)
2463 {
2464         struct iwl_priv *priv = hw->priv;
2465         struct iwl_station_priv *sta_priv = (void *)sta->drv_priv;
2466         struct iwl_vif_priv *vif_priv = (void *)vif->drv_priv;
2467         bool is_ap = vif->type == NL80211_IFTYPE_STATION;
2468         int ret;
2469         u8 sta_id;
2470
2471         IWL_DEBUG_INFO(priv, "received request to add station %pM\n",
2472                         sta->addr);
2473         mutex_lock(&priv->mutex);
2474         IWL_DEBUG_INFO(priv, "proceeding to add station %pM\n",
2475                         sta->addr);
2476         sta_priv->common.sta_id = IWL_INVALID_STATION;
2477
2478         atomic_set(&sta_priv->pending_frames, 0);
2479
2480         ret = iwl_legacy_add_station_common(priv, vif_priv->ctx, sta->addr,
2481                                      is_ap, sta, &sta_id);
2482         if (ret) {
2483                 IWL_ERR(priv, "Unable to add station %pM (%d)\n",
2484                         sta->addr, ret);
2485                 /* Should we return success if return code is EEXIST ? */
2486                 mutex_unlock(&priv->mutex);
2487                 return ret;
2488         }
2489
2490         sta_priv->common.sta_id = sta_id;
2491
2492         /* Initialize rate scaling */
2493         IWL_DEBUG_INFO(priv, "Initializing rate scaling for station %pM\n",
2494                        sta->addr);
2495         iwl4965_rs_rate_init(priv, sta, sta_id);
2496         mutex_unlock(&priv->mutex);
2497
2498         return 0;
2499 }
2500
2501 void iwl4965_mac_channel_switch(struct ieee80211_hw *hw,
2502                                struct ieee80211_channel_switch *ch_switch)
2503 {
2504         struct iwl_priv *priv = hw->priv;
2505         const struct iwl_channel_info *ch_info;
2506         struct ieee80211_conf *conf = &hw->conf;
2507         struct ieee80211_channel *channel = ch_switch->channel;
2508         struct iwl_ht_config *ht_conf = &priv->current_ht_config;
2509
2510         struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
2511         u16 ch;
2512
2513         IWL_DEBUG_MAC80211(priv, "enter\n");
2514
2515         mutex_lock(&priv->mutex);
2516
2517         if (iwl_legacy_is_rfkill(priv))
2518                 goto out;
2519
2520         if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
2521             test_bit(STATUS_SCANNING, &priv->status) ||
2522             test_bit(STATUS_CHANNEL_SWITCH_PENDING, &priv->status))
2523                 goto out;
2524
2525         if (!iwl_legacy_is_associated_ctx(ctx))
2526                 goto out;
2527
2528         if (!priv->cfg->ops->lib->set_channel_switch)
2529                 goto out;
2530
2531         ch = channel->hw_value;
2532         if (le16_to_cpu(ctx->active.channel) == ch)
2533                 goto out;
2534
2535         ch_info = iwl_legacy_get_channel_info(priv, channel->band, ch);
2536         if (!iwl_legacy_is_channel_valid(ch_info)) {
2537                 IWL_DEBUG_MAC80211(priv, "invalid channel\n");
2538                 goto out;
2539         }
2540
2541         spin_lock_irq(&priv->lock);
2542
2543         priv->current_ht_config.smps = conf->smps_mode;
2544
2545         /* Configure HT40 channels */
2546         ctx->ht.enabled = conf_is_ht(conf);
2547         if (ctx->ht.enabled) {
2548                 if (conf_is_ht40_minus(conf)) {
2549                         ctx->ht.extension_chan_offset =
2550                                 IEEE80211_HT_PARAM_CHA_SEC_BELOW;
2551                         ctx->ht.is_40mhz = true;
2552                 } else if (conf_is_ht40_plus(conf)) {
2553                         ctx->ht.extension_chan_offset =
2554                                 IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
2555                         ctx->ht.is_40mhz = true;
2556                 } else {
2557                         ctx->ht.extension_chan_offset =
2558                                 IEEE80211_HT_PARAM_CHA_SEC_NONE;
2559                         ctx->ht.is_40mhz = false;
2560                 }
2561         } else
2562                 ctx->ht.is_40mhz = false;
2563
2564         if ((le16_to_cpu(ctx->staging.channel) != ch))
2565                 ctx->staging.flags = 0;
2566
2567         iwl_legacy_set_rxon_channel(priv, channel, ctx);
2568         iwl_legacy_set_rxon_ht(priv, ht_conf);
2569         iwl_legacy_set_flags_for_band(priv, ctx, channel->band, ctx->vif);
2570
2571         spin_unlock_irq(&priv->lock);
2572
2573         iwl_legacy_set_rate(priv);
2574         /*
2575          * at this point, staging_rxon has the
2576          * configuration for channel switch
2577          */
2578         set_bit(STATUS_CHANNEL_SWITCH_PENDING, &priv->status);
2579         priv->switch_channel = cpu_to_le16(ch);
2580         if (priv->cfg->ops->lib->set_channel_switch(priv, ch_switch)) {
2581                 clear_bit(STATUS_CHANNEL_SWITCH_PENDING, &priv->status);
2582                 priv->switch_channel = 0;
2583                 ieee80211_chswitch_done(ctx->vif, false);
2584         }
2585
2586 out:
2587         mutex_unlock(&priv->mutex);
2588         IWL_DEBUG_MAC80211(priv, "leave\n");
2589 }
2590
2591 void iwl4965_configure_filter(struct ieee80211_hw *hw,
2592                              unsigned int changed_flags,
2593                              unsigned int *total_flags,
2594                              u64 multicast)
2595 {
2596         struct iwl_priv *priv = hw->priv;
2597         __le32 filter_or = 0, filter_nand = 0;
2598         struct iwl_rxon_context *ctx;
2599
2600 #define CHK(test, flag) do { \
2601         if (*total_flags & (test))              \
2602                 filter_or |= (flag);            \
2603         else                                    \
2604                 filter_nand |= (flag);          \
2605         } while (0)
2606
2607         IWL_DEBUG_MAC80211(priv, "Enter: changed: 0x%x, total: 0x%x\n",
2608                         changed_flags, *total_flags);
2609
2610         CHK(FIF_OTHER_BSS | FIF_PROMISC_IN_BSS, RXON_FILTER_PROMISC_MSK);
2611         /* Setting _just_ RXON_FILTER_CTL2HOST_MSK causes FH errors */
2612         CHK(FIF_CONTROL, RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_PROMISC_MSK);
2613         CHK(FIF_BCN_PRBRESP_PROMISC, RXON_FILTER_BCON_AWARE_MSK);
2614
2615 #undef CHK
2616
2617         mutex_lock(&priv->mutex);
2618
2619         for_each_context(priv, ctx) {
2620                 ctx->staging.filter_flags &= ~filter_nand;
2621                 ctx->staging.filter_flags |= filter_or;
2622
2623                 /*
2624                  * Not committing directly because hardware can perform a scan,
2625                  * but we'll eventually commit the filter flags change anyway.
2626                  */
2627         }
2628
2629         mutex_unlock(&priv->mutex);
2630
2631         /*
2632          * Receiving all multicast frames is always enabled by the
2633          * default flags setup in iwl_legacy_connection_init_rx_config()
2634          * since we currently do not support programming multicast
2635          * filters into the device.
2636          */
2637         *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS |
2638                         FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
2639 }
2640
2641 /*****************************************************************************
2642  *
2643  * driver setup and teardown
2644  *
2645  *****************************************************************************/
2646
2647 static void iwl4965_bg_txpower_work(struct work_struct *work)
2648 {
2649         struct iwl_priv *priv = container_of(work, struct iwl_priv,
2650                         txpower_work);
2651
2652         mutex_lock(&priv->mutex);
2653
2654         /* If a scan happened to start before we got here
2655          * then just return; the statistics notification will
2656          * kick off another scheduled work to compensate for
2657          * any temperature delta we missed here. */
2658         if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
2659             test_bit(STATUS_SCANNING, &priv->status))
2660                 goto out;
2661
2662         /* Regardless of if we are associated, we must reconfigure the
2663          * TX power since frames can be sent on non-radar channels while
2664          * not associated */
2665         priv->cfg->ops->lib->send_tx_power(priv);
2666
2667         /* Update last_temperature to keep is_calib_needed from running
2668          * when it isn't needed... */
2669         priv->last_temperature = priv->temperature;
2670 out:
2671         mutex_unlock(&priv->mutex);
2672 }
2673
2674 static void iwl4965_setup_deferred_work(struct iwl_priv *priv)
2675 {
2676         priv->workqueue = create_singlethread_workqueue(DRV_NAME);
2677
2678         init_waitqueue_head(&priv->wait_command_queue);
2679
2680         INIT_WORK(&priv->restart, iwl4965_bg_restart);
2681         INIT_WORK(&priv->rx_replenish, iwl4965_bg_rx_replenish);
2682         INIT_WORK(&priv->run_time_calib_work, iwl4965_bg_run_time_calib_work);
2683         INIT_DELAYED_WORK(&priv->init_alive_start, iwl4965_bg_init_alive_start);
2684         INIT_DELAYED_WORK(&priv->alive_start, iwl4965_bg_alive_start);
2685
2686         iwl_legacy_setup_scan_deferred_work(priv);
2687
2688         INIT_WORK(&priv->txpower_work, iwl4965_bg_txpower_work);
2689
2690         init_timer(&priv->statistics_periodic);
2691         priv->statistics_periodic.data = (unsigned long)priv;
2692         priv->statistics_periodic.function = iwl4965_bg_statistics_periodic;
2693
2694         init_timer(&priv->watchdog);
2695         priv->watchdog.data = (unsigned long)priv;
2696         priv->watchdog.function = iwl_legacy_bg_watchdog;
2697
2698         tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
2699                 iwl4965_irq_tasklet, (unsigned long)priv);
2700 }
2701
2702 static void iwl4965_cancel_deferred_work(struct iwl_priv *priv)
2703 {
2704         cancel_work_sync(&priv->txpower_work);
2705         cancel_delayed_work_sync(&priv->init_alive_start);
2706         cancel_delayed_work(&priv->alive_start);
2707         cancel_work_sync(&priv->run_time_calib_work);
2708
2709         iwl_legacy_cancel_scan_deferred_work(priv);
2710
2711         del_timer_sync(&priv->statistics_periodic);
2712 }
2713
2714 static void iwl4965_init_hw_rates(struct iwl_priv *priv,
2715                               struct ieee80211_rate *rates)
2716 {
2717         int i;
2718
2719         for (i = 0; i < IWL_RATE_COUNT_LEGACY; i++) {
2720                 rates[i].bitrate = iwlegacy_rates[i].ieee * 5;
2721                 rates[i].hw_value = i; /* Rate scaling will work on indexes */
2722                 rates[i].hw_value_short = i;
2723                 rates[i].flags = 0;
2724                 if ((i >= IWL_FIRST_CCK_RATE) && (i <= IWL_LAST_CCK_RATE)) {
2725                         /*
2726                          * If CCK != 1M then set short preamble rate flag.
2727                          */
2728                         rates[i].flags |=
2729                                 (iwlegacy_rates[i].plcp == IWL_RATE_1M_PLCP) ?
2730                                         0 : IEEE80211_RATE_SHORT_PREAMBLE;
2731                 }
2732         }
2733 }
2734 /*
2735  * Acquire priv->lock before calling this function !
2736  */
2737 void iwl4965_set_wr_ptrs(struct iwl_priv *priv, int txq_id, u32 index)
2738 {
2739         iwl_legacy_write_direct32(priv, HBUS_TARG_WRPTR,
2740                              (index & 0xff) | (txq_id << 8));
2741         iwl_legacy_write_prph(priv, IWL49_SCD_QUEUE_RDPTR(txq_id), index);
2742 }
2743
2744 void iwl4965_tx_queue_set_status(struct iwl_priv *priv,
2745                                         struct iwl_tx_queue *txq,
2746                                         int tx_fifo_id, int scd_retry)
2747 {
2748         int txq_id = txq->q.id;
2749
2750         /* Find out whether to activate Tx queue */
2751         int active = test_bit(txq_id, &priv->txq_ctx_active_msk) ? 1 : 0;
2752
2753         /* Set up and activate */
2754         iwl_legacy_write_prph(priv, IWL49_SCD_QUEUE_STATUS_BITS(txq_id),
2755                          (active << IWL49_SCD_QUEUE_STTS_REG_POS_ACTIVE) |
2756                          (tx_fifo_id << IWL49_SCD_QUEUE_STTS_REG_POS_TXF) |
2757                          (scd_retry << IWL49_SCD_QUEUE_STTS_REG_POS_WSL) |
2758                          (scd_retry << IWL49_SCD_QUEUE_STTS_REG_POS_SCD_ACK) |
2759                          IWL49_SCD_QUEUE_STTS_REG_MSK);
2760
2761         txq->sched_retry = scd_retry;
2762
2763         IWL_DEBUG_INFO(priv, "%s %s Queue %d on AC %d\n",
2764                        active ? "Activate" : "Deactivate",
2765                        scd_retry ? "BA" : "AC", txq_id, tx_fifo_id);
2766 }
2767
2768
2769 static int iwl4965_init_drv(struct iwl_priv *priv)
2770 {
2771         int ret;
2772
2773         spin_lock_init(&priv->sta_lock);
2774         spin_lock_init(&priv->hcmd_lock);
2775
2776         INIT_LIST_HEAD(&priv->free_frames);
2777
2778         mutex_init(&priv->mutex);
2779
2780         priv->ieee_channels = NULL;
2781         priv->ieee_rates = NULL;
2782         priv->band = IEEE80211_BAND_2GHZ;
2783
2784         priv->iw_mode = NL80211_IFTYPE_STATION;
2785         priv->current_ht_config.smps = IEEE80211_SMPS_STATIC;
2786         priv->missed_beacon_threshold = IWL_MISSED_BEACON_THRESHOLD_DEF;
2787
2788         /* initialize force reset */
2789         priv->force_reset.reset_duration = IWL_DELAY_NEXT_FORCE_FW_RELOAD;
2790
2791         /* Choose which receivers/antennas to use */
2792         if (priv->cfg->ops->hcmd->set_rxon_chain)
2793                 priv->cfg->ops->hcmd->set_rxon_chain(priv,
2794                                         &priv->contexts[IWL_RXON_CTX_BSS]);
2795
2796         iwl_legacy_init_scan_params(priv);
2797
2798         ret = iwl_legacy_init_channel_map(priv);
2799         if (ret) {
2800                 IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
2801                 goto err;
2802         }
2803
2804         ret = iwl_legacy_init_geos(priv);
2805         if (ret) {
2806                 IWL_ERR(priv, "initializing geos failed: %d\n", ret);
2807                 goto err_free_channel_map;
2808         }
2809         iwl4965_init_hw_rates(priv, priv->ieee_rates);
2810
2811         return 0;
2812
2813 err_free_channel_map:
2814         iwl_legacy_free_channel_map(priv);
2815 err:
2816         return ret;
2817 }
2818
2819 static void iwl4965_uninit_drv(struct iwl_priv *priv)
2820 {
2821         iwl4965_calib_free_results(priv);
2822         iwl_legacy_free_geos(priv);
2823         iwl_legacy_free_channel_map(priv);
2824         kfree(priv->scan_cmd);
2825 }
2826
2827 static void iwl4965_hw_detect(struct iwl_priv *priv)
2828 {
2829         priv->hw_rev = _iwl_legacy_read32(priv, CSR_HW_REV);
2830         priv->hw_wa_rev = _iwl_legacy_read32(priv, CSR_HW_REV_WA_REG);
2831         priv->rev_id = priv->pci_dev->revision;
2832         IWL_DEBUG_INFO(priv, "HW Revision ID = 0x%X\n", priv->rev_id);
2833 }
2834
2835 static int iwl4965_set_hw_params(struct iwl_priv *priv)
2836 {
2837         priv->hw_params.max_rxq_size = RX_QUEUE_SIZE;
2838         priv->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG;
2839         if (priv->cfg->mod_params->amsdu_size_8K)
2840                 priv->hw_params.rx_page_order = get_order(IWL_RX_BUF_SIZE_8K);
2841         else
2842                 priv->hw_params.rx_page_order = get_order(IWL_RX_BUF_SIZE_4K);
2843
2844         priv->hw_params.max_beacon_itrvl = IWL_MAX_UCODE_BEACON_INTERVAL;
2845
2846         if (priv->cfg->mod_params->disable_11n)
2847                 priv->cfg->sku &= ~IWL_SKU_N;
2848
2849         /* Device-specific setup */
2850         return priv->cfg->ops->lib->set_hw_params(priv);
2851 }
2852
2853 static const u8 iwl4965_bss_ac_to_fifo[] = {
2854         IWL_TX_FIFO_VO,
2855         IWL_TX_FIFO_VI,
2856         IWL_TX_FIFO_BE,
2857         IWL_TX_FIFO_BK,
2858 };
2859
2860 static const u8 iwl4965_bss_ac_to_queue[] = {
2861         0, 1, 2, 3,
2862 };
2863
2864 static int
2865 iwl4965_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
2866 {
2867         int err = 0, i;
2868         struct iwl_priv *priv;
2869         struct ieee80211_hw *hw;
2870         struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
2871         unsigned long flags;
2872         u16 pci_cmd;
2873
2874         /************************
2875          * 1. Allocating HW data
2876          ************************/
2877
2878         hw = iwl_legacy_alloc_all(cfg);
2879         if (!hw) {
2880                 err = -ENOMEM;
2881                 goto out;
2882         }
2883         priv = hw->priv;
2884         /* At this point both hw and priv are allocated. */
2885
2886         /*
2887          * The default context is always valid,
2888          * more may be discovered when firmware
2889          * is loaded.
2890          */
2891         priv->valid_contexts = BIT(IWL_RXON_CTX_BSS);
2892
2893         for (i = 0; i < NUM_IWL_RXON_CTX; i++)
2894                 priv->contexts[i].ctxid = i;
2895
2896         priv->contexts[IWL_RXON_CTX_BSS].always_active = true;
2897         priv->contexts[IWL_RXON_CTX_BSS].is_active = true;
2898         priv->contexts[IWL_RXON_CTX_BSS].rxon_cmd = REPLY_RXON;
2899         priv->contexts[IWL_RXON_CTX_BSS].rxon_timing_cmd = REPLY_RXON_TIMING;
2900         priv->contexts[IWL_RXON_CTX_BSS].rxon_assoc_cmd = REPLY_RXON_ASSOC;
2901         priv->contexts[IWL_RXON_CTX_BSS].qos_cmd = REPLY_QOS_PARAM;
2902         priv->contexts[IWL_RXON_CTX_BSS].ap_sta_id = IWL_AP_ID;
2903         priv->contexts[IWL_RXON_CTX_BSS].wep_key_cmd = REPLY_WEPKEY;
2904         priv->contexts[IWL_RXON_CTX_BSS].ac_to_fifo = iwl4965_bss_ac_to_fifo;
2905         priv->contexts[IWL_RXON_CTX_BSS].ac_to_queue = iwl4965_bss_ac_to_queue;
2906         priv->contexts[IWL_RXON_CTX_BSS].exclusive_interface_modes =
2907                 BIT(NL80211_IFTYPE_ADHOC);
2908         priv->contexts[IWL_RXON_CTX_BSS].interface_modes =
2909                 BIT(NL80211_IFTYPE_STATION);
2910         priv->contexts[IWL_RXON_CTX_BSS].ap_devtype = RXON_DEV_TYPE_AP;
2911         priv->contexts[IWL_RXON_CTX_BSS].ibss_devtype = RXON_DEV_TYPE_IBSS;
2912         priv->contexts[IWL_RXON_CTX_BSS].station_devtype = RXON_DEV_TYPE_ESS;
2913         priv->contexts[IWL_RXON_CTX_BSS].unused_devtype = RXON_DEV_TYPE_ESS;
2914
2915         BUILD_BUG_ON(NUM_IWL_RXON_CTX != 1);
2916
2917         SET_IEEE80211_DEV(hw, &pdev->dev);
2918
2919         IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
2920         priv->cfg = cfg;
2921         priv->pci_dev = pdev;
2922         priv->inta_mask = CSR_INI_SET_MASK;
2923
2924         if (iwl_legacy_alloc_traffic_mem(priv))
2925                 IWL_ERR(priv, "Not enough memory to generate traffic log\n");
2926
2927         /**************************
2928          * 2. Initializing PCI bus
2929          **************************/
2930         pci_disable_link_state(pdev, PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1 |
2931                                 PCIE_LINK_STATE_CLKPM);
2932
2933         if (pci_enable_device(pdev)) {
2934                 err = -ENODEV;
2935                 goto out_ieee80211_free_hw;
2936         }
2937
2938         pci_set_master(pdev);
2939
2940         err = pci_set_dma_mask(pdev, DMA_BIT_MASK(36));
2941         if (!err)
2942                 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(36));
2943         if (err) {
2944                 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
2945                 if (!err)
2946                         err = pci_set_consistent_dma_mask(pdev,
2947                                                         DMA_BIT_MASK(32));
2948                 /* both attempts failed: */
2949                 if (err) {
2950                         IWL_WARN(priv, "No suitable DMA available.\n");
2951                         goto out_pci_disable_device;
2952                 }
2953         }
2954
2955         err = pci_request_regions(pdev, DRV_NAME);
2956         if (err)
2957                 goto out_pci_disable_device;
2958
2959         pci_set_drvdata(pdev, priv);
2960
2961
2962         /***********************
2963          * 3. Read REV register
2964          ***********************/
2965         priv->hw_base = pci_iomap(pdev, 0, 0);
2966         if (!priv->hw_base) {
2967                 err = -ENODEV;
2968                 goto out_pci_release_regions;
2969         }
2970
2971         IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
2972                 (unsigned long long) pci_resource_len(pdev, 0));
2973         IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
2974
2975         /* these spin locks will be used in apm_ops.init and EEPROM access
2976          * we should init now
2977          */
2978         spin_lock_init(&priv->reg_lock);
2979         spin_lock_init(&priv->lock);
2980
2981         /*
2982          * stop and reset the on-board processor just in case it is in a
2983          * strange state ... like being left stranded by a primary kernel
2984          * and this is now the kdump kernel trying to start up
2985          */
2986         iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
2987
2988         iwl4965_hw_detect(priv);
2989         IWL_INFO(priv, "Detected %s, REV=0x%X\n",
2990                 priv->cfg->name, priv->hw_rev);
2991
2992         /* We disable the RETRY_TIMEOUT register (0x41) to keep
2993          * PCI Tx retries from interfering with C3 CPU state */
2994         pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
2995
2996         iwl4965_prepare_card_hw(priv);
2997         if (!priv->hw_ready) {
2998                 IWL_WARN(priv, "Failed, HW not ready\n");
2999                 goto out_iounmap;
3000         }
3001
3002         /*****************
3003          * 4. Read EEPROM
3004          *****************/
3005         /* Read the EEPROM */
3006         err = iwl_legacy_eeprom_init(priv);
3007         if (err) {
3008                 IWL_ERR(priv, "Unable to init EEPROM\n");
3009                 goto out_iounmap;
3010         }
3011         err = iwl4965_eeprom_check_version(priv);
3012         if (err)
3013                 goto out_free_eeprom;
3014
3015         if (err)
3016                 goto out_free_eeprom;
3017
3018         /* extract MAC Address */
3019         iwl4965_eeprom_get_mac(priv, priv->addresses[0].addr);
3020         IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->addresses[0].addr);
3021         priv->hw->wiphy->addresses = priv->addresses;
3022         priv->hw->wiphy->n_addresses = 1;
3023
3024         /************************
3025          * 5. Setup HW constants
3026          ************************/
3027         if (iwl4965_set_hw_params(priv)) {
3028                 IWL_ERR(priv, "failed to set hw parameters\n");
3029                 goto out_free_eeprom;
3030         }
3031
3032         /*******************
3033          * 6. Setup priv
3034          *******************/
3035
3036         err = iwl4965_init_drv(priv);
3037         if (err)
3038                 goto out_free_eeprom;
3039         /* At this point both hw and priv are initialized. */
3040
3041         /********************
3042          * 7. Setup services
3043          ********************/
3044         spin_lock_irqsave(&priv->lock, flags);
3045         iwl_legacy_disable_interrupts(priv);
3046         spin_unlock_irqrestore(&priv->lock, flags);
3047
3048         pci_enable_msi(priv->pci_dev);
3049
3050         err = request_irq(priv->pci_dev->irq, iwl_legacy_isr,
3051                           IRQF_SHARED, DRV_NAME, priv);
3052         if (err) {
3053                 IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
3054                 goto out_disable_msi;
3055         }
3056
3057         iwl4965_setup_deferred_work(priv);
3058         iwl4965_setup_rx_handlers(priv);
3059
3060         /*********************************************
3061          * 8. Enable interrupts and read RFKILL state
3062          *********************************************/
3063
3064         /* enable rfkill interrupt: hw bug w/a */
3065         pci_read_config_word(priv->pci_dev, PCI_COMMAND, &pci_cmd);
3066         if (pci_cmd & PCI_COMMAND_INTX_DISABLE) {
3067                 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
3068                 pci_write_config_word(priv->pci_dev, PCI_COMMAND, pci_cmd);
3069         }
3070
3071         iwl_legacy_enable_rfkill_int(priv);
3072
3073         /* If platform's RF_KILL switch is NOT set to KILL */
3074         if (iwl_read32(priv, CSR_GP_CNTRL) &
3075                 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
3076                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3077         else
3078                 set_bit(STATUS_RF_KILL_HW, &priv->status);
3079
3080         wiphy_rfkill_set_hw_state(priv->hw->wiphy,
3081                 test_bit(STATUS_RF_KILL_HW, &priv->status));
3082
3083         iwl_legacy_power_initialize(priv);
3084
3085         init_completion(&priv->_4965.firmware_loading_complete);
3086
3087         err = iwl4965_request_firmware(priv, true);
3088         if (err)
3089                 goto out_destroy_workqueue;
3090
3091         return 0;
3092
3093  out_destroy_workqueue:
3094         destroy_workqueue(priv->workqueue);
3095         priv->workqueue = NULL;
3096         free_irq(priv->pci_dev->irq, priv);
3097  out_disable_msi:
3098         pci_disable_msi(priv->pci_dev);
3099         iwl4965_uninit_drv(priv);
3100  out_free_eeprom:
3101         iwl_legacy_eeprom_free(priv);
3102  out_iounmap:
3103         pci_iounmap(pdev, priv->hw_base);
3104  out_pci_release_regions:
3105         pci_set_drvdata(pdev, NULL);
3106         pci_release_regions(pdev);
3107  out_pci_disable_device:
3108         pci_disable_device(pdev);
3109  out_ieee80211_free_hw:
3110         iwl_legacy_free_traffic_mem(priv);
3111         ieee80211_free_hw(priv->hw);
3112  out:
3113         return err;
3114 }
3115
3116 static void __devexit iwl4965_pci_remove(struct pci_dev *pdev)
3117 {
3118         struct iwl_priv *priv = pci_get_drvdata(pdev);
3119         unsigned long flags;
3120
3121         if (!priv)
3122                 return;
3123
3124         wait_for_completion(&priv->_4965.firmware_loading_complete);
3125
3126         IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
3127
3128         iwl_legacy_dbgfs_unregister(priv);
3129         sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
3130
3131         /* ieee80211_unregister_hw call wil cause iwl_mac_stop to
3132          * to be called and iwl4965_down since we are removing the device
3133          * we need to set STATUS_EXIT_PENDING bit.
3134          */
3135         set_bit(STATUS_EXIT_PENDING, &priv->status);
3136
3137         iwl_legacy_leds_exit(priv);
3138
3139         if (priv->mac80211_registered) {
3140                 ieee80211_unregister_hw(priv->hw);
3141                 priv->mac80211_registered = 0;
3142         } else {
3143                 iwl4965_down(priv);
3144         }
3145
3146         /*
3147          * Make sure device is reset to low power before unloading driver.
3148          * This may be redundant with iwl4965_down(), but there are paths to
3149          * run iwl4965_down() without calling apm_ops.stop(), and there are
3150          * paths to avoid running iwl4965_down() at all before leaving driver.
3151          * This (inexpensive) call *makes sure* device is reset.
3152          */
3153         iwl_legacy_apm_stop(priv);
3154
3155         /* make sure we flush any pending irq or
3156          * tasklet for the driver
3157          */
3158         spin_lock_irqsave(&priv->lock, flags);
3159         iwl_legacy_disable_interrupts(priv);
3160         spin_unlock_irqrestore(&priv->lock, flags);
3161
3162         iwl4965_synchronize_irq(priv);
3163
3164         iwl4965_dealloc_ucode_pci(priv);
3165
3166         if (priv->rxq.bd)
3167                 iwl4965_rx_queue_free(priv, &priv->rxq);
3168         iwl4965_hw_txq_ctx_free(priv);
3169
3170         iwl_legacy_eeprom_free(priv);
3171
3172
3173         /*netif_stop_queue(dev); */
3174         flush_workqueue(priv->workqueue);
3175
3176         /* ieee80211_unregister_hw calls iwl_mac_stop, which flushes
3177          * priv->workqueue... so we can't take down the workqueue
3178          * until now... */
3179         destroy_workqueue(priv->workqueue);
3180         priv->workqueue = NULL;
3181         iwl_legacy_free_traffic_mem(priv);
3182
3183         free_irq(priv->pci_dev->irq, priv);
3184         pci_disable_msi(priv->pci_dev);
3185         pci_iounmap(pdev, priv->hw_base);
3186         pci_release_regions(pdev);
3187         pci_disable_device(pdev);
3188         pci_set_drvdata(pdev, NULL);
3189
3190         iwl4965_uninit_drv(priv);
3191
3192         dev_kfree_skb(priv->beacon_skb);
3193
3194         ieee80211_free_hw(priv->hw);
3195 }
3196
3197 /*
3198  * Activate/Deactivate Tx DMA/FIFO channels according tx fifos mask
3199  * must be called under priv->lock and mac access
3200  */
3201 void iwl4965_txq_set_sched(struct iwl_priv *priv, u32 mask)
3202 {
3203         iwl_legacy_write_prph(priv, IWL49_SCD_TXFACT, mask);
3204 }
3205
3206 /*****************************************************************************
3207  *
3208  * driver and module entry point
3209  *
3210  *****************************************************************************/
3211
3212 /* Hardware specific file defines the PCI IDs table for that hardware module */
3213 static DEFINE_PCI_DEVICE_TABLE(iwl4965_hw_card_ids) = {
3214 #if defined(CONFIG_IWL4965_MODULE) || defined(CONFIG_IWL4965)
3215         {IWL_PCI_DEVICE(0x4229, PCI_ANY_ID, iwl4965_cfg)},
3216         {IWL_PCI_DEVICE(0x4230, PCI_ANY_ID, iwl4965_cfg)},
3217 #endif /* CONFIG_IWL4965 */
3218
3219         {0}
3220 };
3221 MODULE_DEVICE_TABLE(pci, iwl4965_hw_card_ids);
3222
3223 static struct pci_driver iwl4965_driver = {
3224         .name = DRV_NAME,
3225         .id_table = iwl4965_hw_card_ids,
3226         .probe = iwl4965_pci_probe,
3227         .remove = __devexit_p(iwl4965_pci_remove),
3228         .driver.pm = IWL_LEGACY_PM_OPS,
3229 };
3230
3231 static int __init iwl4965_init(void)
3232 {
3233
3234         int ret;
3235         pr_info(DRV_DESCRIPTION ", " DRV_VERSION "\n");
3236         pr_info(DRV_COPYRIGHT "\n");
3237
3238         ret = iwl4965_rate_control_register();
3239         if (ret) {
3240                 pr_err("Unable to register rate control algorithm: %d\n", ret);
3241                 return ret;
3242         }
3243
3244         ret = pci_register_driver(&iwl4965_driver);
3245         if (ret) {
3246                 pr_err("Unable to initialize PCI module\n");
3247                 goto error_register;
3248         }
3249
3250         return ret;
3251
3252 error_register:
3253         iwl4965_rate_control_unregister();
3254         return ret;
3255 }
3256
3257 static void __exit iwl4965_exit(void)
3258 {
3259         pci_unregister_driver(&iwl4965_driver);
3260         iwl4965_rate_control_unregister();
3261 }
3262
3263 module_exit(iwl4965_exit);
3264 module_init(iwl4965_init);
3265
3266 #ifdef CONFIG_IWLWIFI_LEGACY_DEBUG
3267 module_param_named(debug, iwlegacy_debug_level, uint, S_IRUGO | S_IWUSR);
3268 MODULE_PARM_DESC(debug, "debug output mask");
3269 #endif
3270
3271 module_param_named(swcrypto, iwl4965_mod_params.sw_crypto, int, S_IRUGO);
3272 MODULE_PARM_DESC(swcrypto, "using crypto in software (default 0 [hardware])");
3273 module_param_named(queues_num, iwl4965_mod_params.num_of_queues, int, S_IRUGO);
3274 MODULE_PARM_DESC(queues_num, "number of hw queues.");
3275 module_param_named(11n_disable, iwl4965_mod_params.disable_11n, int, S_IRUGO);
3276 MODULE_PARM_DESC(11n_disable, "disable 11n functionality");
3277 module_param_named(amsdu_size_8K, iwl4965_mod_params.amsdu_size_8K,
3278                    int, S_IRUGO);
3279 MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size");
3280 module_param_named(fw_restart, iwl4965_mod_params.restart_fw, int, S_IRUGO);
3281 MODULE_PARM_DESC(fw_restart, "restart firmware in case of error");