drivers/net/wireless/iwlegacy/iwl-3945.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of version 2 of the GNU General Public License as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program; if not, write to the Free Software Foundation, Inc.,
  16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17  *
  18  * The full GNU General Public License is included in this distribution in the
  19  * file called LICENSE.
  20  *
  21  * Contact Information:
  22  *  Intel Linux Wireless <ilw@linux.intel.com>
  23  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  24  *
  25  *****************************************************************************/
  26
  27 #include <linux/kernel.h>
  28 #include <linux/module.h>
  29 #include <linux/init.h>
  30 #include <linux/slab.h>
  31 #include <linux/pci.h>
  32 #include <linux/dma-mapping.h>
  33 #include <linux/delay.h>
  34 #include <linux/sched.h>
  35 #include <linux/skbuff.h>
  36 #include <linux/netdevice.h>
  37 #include <linux/firmware.h>
  38 #include <linux/etherdevice.h>
  39 #include <asm/unaligned.h>
  40 #include <net/mac80211.h>
  41
  42 #include "iwl-fh.h"
  43 #include "iwl-3945-fh.h"
  44 #include "iwl-commands.h"
  45 #include "iwl-sta.h"
  46 #include "iwl-3945.h"
  47 #include "iwl-eeprom.h"
  48 #include "iwl-core.h"
  49 #include "iwl-helpers.h"
  50 #include "iwl-led.h"
  51 #include "iwl-3945-led.h"
  52 #include "iwl-3945-debugfs.h"
  53
  54 #define IWL_DECLARE_RATE_INFO(r, ip, in, rp, rn, pp, np)    \
  55         [IWL_RATE_##r##M_INDEX] = { IWL_RATE_##r##M_PLCP,   \
  56                                     IWL_RATE_##r##M_IEEE,   \
  57                                     IWL_RATE_##ip##M_INDEX, \
  58                                     IWL_RATE_##in##M_INDEX, \
  59                                     IWL_RATE_##rp##M_INDEX, \
  60                                     IWL_RATE_##rn##M_INDEX, \
  61                                     IWL_RATE_##pp##M_INDEX, \
  62                                     IWL_RATE_##np##M_INDEX, \
  63                                     IWL_RATE_##r##M_INDEX_TABLE, \
  64                                     IWL_RATE_##ip##M_INDEX_TABLE }
  65
  66 /*
  67  * Parameter order:
  68  *   rate, prev rate, next rate, prev tgg rate, next tgg rate
  69  *
  70  * If there isn't a valid next or previous rate then INV is used which
  71  * maps to IWL_RATE_INVALID
  72  *
  73  */
  74 const struct iwl3945_rate_info iwl3945_rates[IWL_RATE_COUNT_3945] = {
  75         IWL_DECLARE_RATE_INFO(1, INV, 2, INV, 2, INV, 2),    /*  1mbps */
  76         IWL_DECLARE_RATE_INFO(2, 1, 5, 1, 5, 1, 5),          /*  2mbps */
  77         IWL_DECLARE_RATE_INFO(5, 2, 6, 2, 11, 2, 11),        /*5.5mbps */
  78         IWL_DECLARE_RATE_INFO(11, 9, 12, 5, 12, 5, 18),      /* 11mbps */
  79         IWL_DECLARE_RATE_INFO(6, 5, 9, 5, 11, 5, 11),        /*  6mbps */
  80         IWL_DECLARE_RATE_INFO(9, 6, 11, 5, 11, 5, 11),       /*  9mbps */
  81         IWL_DECLARE_RATE_INFO(12, 11, 18, 11, 18, 11, 18),   /* 12mbps */
  82         IWL_DECLARE_RATE_INFO(18, 12, 24, 12, 24, 11, 24),   /* 18mbps */
  83         IWL_DECLARE_RATE_INFO(24, 18, 36, 18, 36, 18, 36),   /* 24mbps */
  84         IWL_DECLARE_RATE_INFO(36, 24, 48, 24, 48, 24, 48),   /* 36mbps */
  85         IWL_DECLARE_RATE_INFO(48, 36, 54, 36, 54, 36, 54),   /* 48mbps */
  86         IWL_DECLARE_RATE_INFO(54, 48, INV, 48, INV, 48, INV),/* 54mbps */
  87 };
  88
  89 static inline u8 iwl3945_get_prev_ieee_rate(u8 rate_index)
  90 {
  91         u8 rate = iwl3945_rates[rate_index].prev_ieee;
  92
  93         if (rate == IWL_RATE_INVALID)
  94                 rate = rate_index;
  95         return rate;
  96 }
  97
  98 /* 1 = enable the iwl3945_disable_events() function */
  99 #define IWL_EVT_DISABLE (0)
 100 #define IWL_EVT_DISABLE_SIZE (1532/32)
 101
 102 /**
 103  * iwl3945_disable_events - Disable selected events in uCode event log
 104  *
 105  * Disable an event by writing "1"s into "disable"
 106  *   bitmap in SRAM.  Bit position corresponds to Event # (id/type).
 107  *   Default values of 0 enable uCode events to be logged.
 108  * Use for only special debugging.  This function is just a placeholder as-is,
 109  *   you'll need to provide the special bits! ...
 110  *   ... and set IWL_EVT_DISABLE to 1. */
 111 void iwl3945_disable_events(struct iwl_priv *priv)
 112 {
 113         int i;
 114         u32 base;               /* SRAM address of event log header */
 115         u32 disable_ptr;        /* SRAM address of event-disable bitmap array */
 116         u32 array_size;         /* # of u32 entries in array */
 117         static const u32 evt_disable[IWL_EVT_DISABLE_SIZE] = {
 118                 0x00000000,     /*   31 -    0  Event id numbers */
 119                 0x00000000,     /*   63 -   32 */
 120                 0x00000000,     /*   95 -   64 */
 121                 0x00000000,     /*  127 -   96 */
 122                 0x00000000,     /*  159 -  128 */
 123                 0x00000000,     /*  191 -  160 */
 124                 0x00000000,     /*  223 -  192 */
 125                 0x00000000,     /*  255 -  224 */
 126                 0x00000000,     /*  287 -  256 */
 127                 0x00000000,     /*  319 -  288 */
 128                 0x00000000,     /*  351 -  320 */
 129                 0x00000000,     /*  383 -  352 */
 130                 0x00000000,     /*  415 -  384 */
 131                 0x00000000,     /*  447 -  416 */
 132                 0x00000000,     /*  479 -  448 */
 133                 0x00000000,     /*  511 -  480 */
 134                 0x00000000,     /*  543 -  512 */
 135                 0x00000000,     /*  575 -  544 */
 136                 0x00000000,     /*  607 -  576 */
 137                 0x00000000,     /*  639 -  608 */
 138                 0x00000000,     /*  671 -  640 */
 139                 0x00000000,     /*  703 -  672 */
 140                 0x00000000,     /*  735 -  704 */
 141                 0x00000000,     /*  767 -  736 */
 142                 0x00000000,     /*  799 -  768 */
 143                 0x00000000,     /*  831 -  800 */
 144                 0x00000000,     /*  863 -  832 */
 145                 0x00000000,     /*  895 -  864 */
 146                 0x00000000,     /*  927 -  896 */
 147                 0x00000000,     /*  959 -  928 */
 148                 0x00000000,     /*  991 -  960 */
 149                 0x00000000,     /* 1023 -  992 */
 150                 0x00000000,     /* 1055 - 1024 */
 151                 0x00000000,     /* 1087 - 1056 */
 152                 0x00000000,     /* 1119 - 1088 */
 153                 0x00000000,     /* 1151 - 1120 */
 154                 0x00000000,     /* 1183 - 1152 */
 155                 0x00000000,     /* 1215 - 1184 */
 156                 0x00000000,     /* 1247 - 1216 */
 157                 0x00000000,     /* 1279 - 1248 */
 158                 0x00000000,     /* 1311 - 1280 */
 159                 0x00000000,     /* 1343 - 1312 */
 160                 0x00000000,     /* 1375 - 1344 */
 161                 0x00000000,     /* 1407 - 1376 */
 162                 0x00000000,     /* 1439 - 1408 */
 163                 0x00000000,     /* 1471 - 1440 */
 164                 0x00000000,     /* 1503 - 1472 */
 165         };
 166
 167         base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
 168         if (!iwl3945_hw_valid_rtc_data_addr(base)) {
 169                 IWL_ERR(priv, "Invalid event log pointer 0x%08X\n", base);
 170                 return;
 171         }
 172
 173         disable_ptr = iwl_legacy_read_targ_mem(priv, base + (4 * sizeof(u32)));
 174         array_size = iwl_legacy_read_targ_mem(priv, base + (5 * sizeof(u32)));
 175
 176         if (IWL_EVT_DISABLE && (array_size == IWL_EVT_DISABLE_SIZE)) {
 177                 IWL_DEBUG_INFO(priv, "Disabling selected uCode log events at 0x%x\n",
 178                                disable_ptr);
 179                 for (i = 0; i < IWL_EVT_DISABLE_SIZE; i++)
 180                         iwl_legacy_write_targ_mem(priv,
 181                                            disable_ptr + (i * sizeof(u32)),
 182                                            evt_disable[i]);
 183
 184         } else {
 185                 IWL_DEBUG_INFO(priv, "Selected uCode log events may be disabled\n");
 186                 IWL_DEBUG_INFO(priv, "  by writing \"1\"s into disable bitmap\n");
 187                 IWL_DEBUG_INFO(priv, "  in SRAM at 0x%x, size %d u32s\n",
 188                                disable_ptr, array_size);
 189         }
 190
 191 }
 192
 193 static int iwl3945_hwrate_to_plcp_idx(u8 plcp)
 194 {
 195         int idx;
 196
 197         for (idx = 0; idx < IWL_RATE_COUNT_3945; idx++)
 198                 if (iwl3945_rates[idx].plcp == plcp)
 199                         return idx;
 200         return -1;
 201 }
 202
 203 #ifdef CONFIG_IWLWIFI_LEGACY_DEBUG
 204 #define TX_STATUS_ENTRY(x) case TX_3945_STATUS_FAIL_ ## x: return #x
 205
 206 static const char *iwl3945_get_tx_fail_reason(u32 status)
 207 {
 208         switch (status & TX_STATUS_MSK) {
 209         case TX_3945_STATUS_SUCCESS:
 210                 return "SUCCESS";
 211                 TX_STATUS_ENTRY(SHORT_LIMIT);
 212                 TX_STATUS_ENTRY(LONG_LIMIT);
 213                 TX_STATUS_ENTRY(FIFO_UNDERRUN);
 214                 TX_STATUS_ENTRY(MGMNT_ABORT);
 215                 TX_STATUS_ENTRY(NEXT_FRAG);
 216                 TX_STATUS_ENTRY(LIFE_EXPIRE);
 217                 TX_STATUS_ENTRY(DEST_PS);
 218                 TX_STATUS_ENTRY(ABORTED);
 219                 TX_STATUS_ENTRY(BT_RETRY);
 220                 TX_STATUS_ENTRY(STA_INVALID);
 221                 TX_STATUS_ENTRY(FRAG_DROPPED);
 222                 TX_STATUS_ENTRY(TID_DISABLE);
 223                 TX_STATUS_ENTRY(FRAME_FLUSHED);
 224                 TX_STATUS_ENTRY(INSUFFICIENT_CF_POLL);
 225                 TX_STATUS_ENTRY(TX_LOCKED);
 226                 TX_STATUS_ENTRY(NO_BEACON_ON_RADAR);
 227         }
 228
 229         return "UNKNOWN";
 230 }
 231 #else
 232 static inline const char *iwl3945_get_tx_fail_reason(u32 status)
 233 {
 234         return "";
 235 }
 236 #endif
 237
 238 /*
 239  * get ieee prev rate from rate scale table.
 240  * for A and B mode we need to overright prev
 241  * value
 242  */
 243 int iwl3945_rs_next_rate(struct iwl_priv *priv, int rate)
 244 {
 245         int next_rate = iwl3945_get_prev_ieee_rate(rate);
 246
 247         switch (priv->band) {
 248         case IEEE80211_BAND_5GHZ:
 249                 if (rate == IWL_RATE_12M_INDEX)
 250                         next_rate = IWL_RATE_9M_INDEX;
 251                 else if (rate == IWL_RATE_6M_INDEX)
 252                         next_rate = IWL_RATE_6M_INDEX;
 253                 break;
 254         case IEEE80211_BAND_2GHZ:
 255                 if (!(priv->_3945.sta_supp_rates & IWL_OFDM_RATES_MASK) &&
 256                     iwl_legacy_is_associated(priv, IWL_RXON_CTX_BSS)) {
 257                         if (rate == IWL_RATE_11M_INDEX)
 258                                 next_rate = IWL_RATE_5M_INDEX;
 259                 }
 260                 break;
 261
 262         default:
 263                 break;
 264         }
 265
 266         return next_rate;
 267 }
 268
 269
 270 /**
 271  * iwl3945_tx_queue_reclaim - Reclaim Tx queue entries already Tx'd
 272  *
 273  * When FW advances 'R' index, all entries between old and new 'R' index
 274  * need to be reclaimed. As result, some free space forms. If there is
 275  * enough free space (> low mark), wake the stack that feeds us.
 276  */
 277 static void iwl3945_tx_queue_reclaim(struct iwl_priv *priv,
 278                                      int txq_id, int index)
 279 {
 280         struct iwl_tx_queue *txq = &priv->txq[txq_id];
 281         struct iwl_queue *q = &txq->q;
 282         struct iwl_tx_info *tx_info;
 283
 284         BUG_ON(txq_id == IWL39_CMD_QUEUE_NUM);
 285
 286         for (index = iwl_legacy_queue_inc_wrap(index, q->n_bd);
 287                 q->read_ptr != index;
 288                 q->read_ptr = iwl_legacy_queue_inc_wrap(q->read_ptr, q->n_bd)) {
 289
 290                 tx_info = &txq->txb[txq->q.read_ptr];
 291                 ieee80211_tx_status_irqsafe(priv->hw, tx_info->skb);
 292                 tx_info->skb = NULL;
 293                 priv->cfg->ops->lib->txq_free_tfd(priv, txq);
 294         }
 295
 296         if (iwl_legacy_queue_space(q) > q->low_mark && (txq_id >= 0) &&
 297                         (txq_id != IWL39_CMD_QUEUE_NUM) &&
 298                         priv->mac80211_registered)
 299                 iwl_legacy_wake_queue(priv, txq);
 300 }
 301
 302 /**
 303  * iwl3945_rx_reply_tx - Handle Tx response
 304  */
 305 static void iwl3945_rx_reply_tx(struct iwl_priv *priv,
 306                                 struct iwl_rx_mem_buffer *rxb)
 307 {
 308         struct iwl_rx_packet *pkt = rxb_addr(rxb);
 309         u16 sequence = le16_to_cpu(pkt->hdr.sequence);
 310         int txq_id = SEQ_TO_QUEUE(sequence);
 311         int index = SEQ_TO_INDEX(sequence);
 312         struct iwl_tx_queue *txq = &priv->txq[txq_id];
 313         struct ieee80211_tx_info *info;
 314         struct iwl3945_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
 315         u32  status = le32_to_cpu(tx_resp->status);
 316         int rate_idx;
 317         int fail;
 318
 319         if ((index >= txq->q.n_bd) || (iwl_legacy_queue_used(&txq->q, index) == 0)) {
 320                 IWL_ERR(priv, "Read index for DMA queue txq_id (%d) index %d "
 321                           "is out of range [0-%d] %d %d\n", txq_id,
 322                           index, txq->q.n_bd, txq->q.write_ptr,
 323                           txq->q.read_ptr);
 324                 return;
 325         }
 326
 327         txq->time_stamp = jiffies;
 328         info = IEEE80211_SKB_CB(txq->txb[txq->q.read_ptr].skb);
 329         ieee80211_tx_info_clear_status(info);
 330
 331         /* Fill the MRR chain with some info about on-chip retransmissions */
 332         rate_idx = iwl3945_hwrate_to_plcp_idx(tx_resp->rate);
 333         if (info->band == IEEE80211_BAND_5GHZ)
 334                 rate_idx -= IWL_FIRST_OFDM_RATE;
 335
 336         fail = tx_resp->failure_frame;
 337
 338         info->status.rates[0].idx = rate_idx;
 339         info->status.rates[0].count = fail + 1; /* add final attempt */
 340
 341         /* tx_status->rts_retry_count = tx_resp->failure_rts; */
 342         info->flags |= ((status & TX_STATUS_MSK) == TX_STATUS_SUCCESS) ?
 343                                 IEEE80211_TX_STAT_ACK : 0;
 344
 345         IWL_DEBUG_TX(priv, "Tx queue %d Status %s (0x%08x) plcp rate %d retries %d\n",
 346                         txq_id, iwl3945_get_tx_fail_reason(status), status,
 347                         tx_resp->rate, tx_resp->failure_frame);
 348
 349         IWL_DEBUG_TX_REPLY(priv, "Tx queue reclaim %d\n", index);
 350         iwl3945_tx_queue_reclaim(priv, txq_id, index);
 351
 352         if (status & TX_ABORT_REQUIRED_MSK)
 353                 IWL_ERR(priv, "TODO:  Implement Tx ABORT REQUIRED!!!\n");
 354 }
 355
 356
 357
 358 /*****************************************************************************
 359  *
 360  * Intel PRO/Wireless 3945ABG/BG Network Connection
 361  *
 362  *  RX handler implementations
 363  *
 364  *****************************************************************************/
 365 #ifdef CONFIG_IWLWIFI_LEGACY_DEBUGFS
 366 static void iwl3945_accumulative_statistics(struct iwl_priv *priv,
 367                                             __le32 *stats)
 368 {
 369         int i;
 370         __le32 *prev_stats;
 371         u32 *accum_stats;
 372         u32 *delta, *max_delta;
 373
 374         prev_stats = (__le32 *)&priv->_3945.statistics;
 375         accum_stats = (u32 *)&priv->_3945.accum_statistics;
 376         delta = (u32 *)&priv->_3945.delta_statistics;
 377         max_delta = (u32 *)&priv->_3945.max_delta;
 378
 379         for (i = sizeof(__le32); i < sizeof(struct iwl3945_notif_statistics);
 380              i += sizeof(__le32), stats++, prev_stats++, delta++,
 381              max_delta++, accum_stats++) {
 382                 if (le32_to_cpu(*stats) > le32_to_cpu(*prev_stats)) {
 383                         *delta = (le32_to_cpu(*stats) -
 384                                 le32_to_cpu(*prev_stats));
 385                         *accum_stats += *delta;
 386                         if (*delta > *max_delta)
 387                                 *max_delta = *delta;
 388                 }
 389         }
 390
 391         /* reset accumulative statistics for "no-counter" type statistics */
 392         priv->_3945.accum_statistics.general.temperature =
 393                 priv->_3945.statistics.general.temperature;
 394         priv->_3945.accum_statistics.general.ttl_timestamp =
 395                 priv->_3945.statistics.general.ttl_timestamp;
 396 }
 397 #endif
 398
 399 void iwl3945_hw_rx_statistics(struct iwl_priv *priv,
 400                 struct iwl_rx_mem_buffer *rxb)
 401 {
 402         struct iwl_rx_packet *pkt = rxb_addr(rxb);
 403
 404         IWL_DEBUG_RX(priv, "Statistics notification received (%d vs %d).\n",
 405                      (int)sizeof(struct iwl3945_notif_statistics),
 406                      le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK);
 407 #ifdef CONFIG_IWLWIFI_LEGACY_DEBUGFS
 408         iwl3945_accumulative_statistics(priv, (__le32 *)&pkt->u.raw);
 409 #endif
 410
 411         memcpy(&priv->_3945.statistics, pkt->u.raw, sizeof(priv->_3945.statistics));
 412 }
 413
 414 void iwl3945_reply_statistics(struct iwl_priv *priv,
 415                               struct iwl_rx_mem_buffer *rxb)
 416 {
 417         struct iwl_rx_packet *pkt = rxb_addr(rxb);
 418         __le32 *flag = (__le32 *)&pkt->u.raw;
 419
 420         if (le32_to_cpu(*flag) & UCODE_STATISTICS_CLEAR_MSK) {
 421 #ifdef CONFIG_IWLWIFI_LEGACY_DEBUGFS
 422                 memset(&priv->_3945.accum_statistics, 0,
 423                         sizeof(struct iwl3945_notif_statistics));
 424                 memset(&priv->_3945.delta_statistics, 0,
 425                         sizeof(struct iwl3945_notif_statistics));
 426                 memset(&priv->_3945.max_delta, 0,
 427                         sizeof(struct iwl3945_notif_statistics));
 428 #endif
 429                 IWL_DEBUG_RX(priv, "Statistics have been cleared\n");
 430         }
 431         iwl3945_hw_rx_statistics(priv, rxb);
 432 }
 433
 434
 435 /******************************************************************************
 436  *
 437  * Misc. internal state and helper functions
 438  *
 439  ******************************************************************************/
 440
 441 /* This is necessary only for a number of statistics, see the caller. */
 442 static int iwl3945_is_network_packet(struct iwl_priv *priv,
 443                 struct ieee80211_hdr *header)
 444 {
 445         /* Filter incoming packets to determine if they are targeted toward
 446          * this network, discarding packets coming from ourselves */
 447         switch (priv->iw_mode) {
 448         case NL80211_IFTYPE_ADHOC: /* Header: Dest. | Source    | BSSID */
 449                 /* packets to our IBSS update information */
 450                 return !compare_ether_addr(header->addr3, priv->bssid);
 451         case NL80211_IFTYPE_STATION: /* Header: Dest. | AP{BSSID} | Source */
 452                 /* packets to our IBSS update information */
 453                 return !compare_ether_addr(header->addr2, priv->bssid);
 454         default:
 455                 return 1;
 456         }
 457 }
 458
 459 static void iwl3945_pass_packet_to_mac80211(struct iwl_priv *priv,
 460                                    struct iwl_rx_mem_buffer *rxb,
 461                                    struct ieee80211_rx_status *stats)
 462 {
 463         struct iwl_rx_packet *pkt = rxb_addr(rxb);
 464         struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)IWL_RX_DATA(pkt);
 465         struct iwl3945_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
 466         struct iwl3945_rx_frame_end *rx_end = IWL_RX_END(pkt);
 467         u16 len = le16_to_cpu(rx_hdr->len);
 468         struct sk_buff *skb;
 469         __le16 fc = hdr->frame_control;
 470
 471         /* We received data from the HW, so stop the watchdog */
 472         if (unlikely(len + IWL39_RX_FRAME_SIZE >
 473                      PAGE_SIZE << priv->hw_params.rx_page_order)) {
 474                 IWL_DEBUG_DROP(priv, "Corruption detected!\n");
 475                 return;
 476         }
 477
 478         /* We only process data packets if the interface is open */
 479         if (unlikely(!priv->is_open)) {
 480                 IWL_DEBUG_DROP_LIMIT(priv,
 481                         "Dropping packet while interface is not open.\n");
 482                 return;
 483         }
 484
 485         skb = dev_alloc_skb(128);
 486         if (!skb) {
 487                 IWL_ERR(priv, "dev_alloc_skb failed\n");
 488                 return;
 489         }
 490
 491         if (!iwl3945_mod_params.sw_crypto)
 492                 iwl_legacy_set_decrypted_flag(priv,
 493                                        (struct ieee80211_hdr *)rxb_addr(rxb),
 494                                        le32_to_cpu(rx_end->status), stats);
 495
 496         skb_add_rx_frag(skb, 0, rxb->page,
 497                         (void *)rx_hdr->payload - (void *)pkt, len);
 498
 499         iwl_legacy_update_stats(priv, false, fc, len);
 500         memcpy(IEEE80211_SKB_RXCB(skb), stats, sizeof(*stats));
 501
 502         ieee80211_rx(priv->hw, skb);
 503         priv->alloc_rxb_page--;
 504         rxb->page = NULL;
 505 }
 506
 507 #define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
 508
 509 static void iwl3945_rx_reply_rx(struct iwl_priv *priv,
 510                                 struct iwl_rx_mem_buffer *rxb)
 511 {
 512         struct ieee80211_hdr *header;
 513         struct ieee80211_rx_status rx_status;
 514         struct iwl_rx_packet *pkt = rxb_addr(rxb);
 515         struct iwl3945_rx_frame_stats *rx_stats = IWL_RX_STATS(pkt);
 516         struct iwl3945_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
 517         struct iwl3945_rx_frame_end *rx_end = IWL_RX_END(pkt);
 518         u16 rx_stats_sig_avg __maybe_unused = le16_to_cpu(rx_stats->sig_avg);
 519         u16 rx_stats_noise_diff __maybe_unused = le16_to_cpu(rx_stats->noise_diff);
 520         u8 network_packet;
 521
 522         rx_status.flag = 0;
 523         rx_status.mactime = le64_to_cpu(rx_end->timestamp);
 524         rx_status.band = (rx_hdr->phy_flags & RX_RES_PHY_FLAGS_BAND_24_MSK) ?
 525                                 IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
 526         rx_status.freq =
 527                 ieee80211_channel_to_frequency(le16_to_cpu(rx_hdr->channel),
 528                                                rx_status.band);
 529
 530         rx_status.rate_idx = iwl3945_hwrate_to_plcp_idx(rx_hdr->rate);
 531         if (rx_status.band == IEEE80211_BAND_5GHZ)
 532                 rx_status.rate_idx -= IWL_FIRST_OFDM_RATE;
 533
 534         rx_status.antenna = (le16_to_cpu(rx_hdr->phy_flags) &
 535                                         RX_RES_PHY_FLAGS_ANTENNA_MSK) >> 4;
 536
 537         /* set the preamble flag if appropriate */
 538         if (rx_hdr->phy_flags & RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK)
 539                 rx_status.flag |= RX_FLAG_SHORTPRE;
 540
 541         if ((unlikely(rx_stats->phy_count > 20))) {
 542                 IWL_DEBUG_DROP(priv, "dsp size out of range [0,20]: %d/n",
 543                                 rx_stats->phy_count);
 544                 return;
 545         }
 546
 547         if (!(rx_end->status & RX_RES_STATUS_NO_CRC32_ERROR)
 548             || !(rx_end->status & RX_RES_STATUS_NO_RXE_OVERFLOW)) {
 549                 IWL_DEBUG_RX(priv, "Bad CRC or FIFO: 0x%08X.\n", rx_end->status);
 550                 return;
 551         }
 552
 553
 554
 555         /* Convert 3945's rssi indicator to dBm */
 556         rx_status.signal = rx_stats->rssi - IWL39_RSSI_OFFSET;
 557
 558         IWL_DEBUG_STATS(priv, "Rssi %d sig_avg %d noise_diff %d\n",
 559                         rx_status.signal, rx_stats_sig_avg,
 560                         rx_stats_noise_diff);
 561
 562         header = (struct ieee80211_hdr *)IWL_RX_DATA(pkt);
 563
 564         network_packet = iwl3945_is_network_packet(priv, header);
 565
 566         IWL_DEBUG_STATS_LIMIT(priv, "[%c] %d RSSI:%d Signal:%u, Rate:%u\n",
 567                               network_packet ? '*' : ' ',
 568                               le16_to_cpu(rx_hdr->channel),
 569                               rx_status.signal, rx_status.signal,
 570                               rx_status.rate_idx);
 571
 572         iwl_legacy_dbg_log_rx_data_frame(priv, le16_to_cpu(rx_hdr->len),
 573                                                 header);
 574
 575         if (network_packet) {
 576                 priv->_3945.last_beacon_time =
 577                         le32_to_cpu(rx_end->beacon_timestamp);
 578                 priv->_3945.last_tsf = le64_to_cpu(rx_end->timestamp);
 579                 priv->_3945.last_rx_rssi = rx_status.signal;
 580         }
 581
 582         iwl3945_pass_packet_to_mac80211(priv, rxb, &rx_status);
 583 }
 584
 585 int iwl3945_hw_txq_attach_buf_to_tfd(struct iwl_priv *priv,
 586                                      struct iwl_tx_queue *txq,
 587                                      dma_addr_t addr, u16 len, u8 reset, u8 pad)
 588 {
 589         int count;
 590         struct iwl_queue *q;
 591         struct iwl3945_tfd *tfd, *tfd_tmp;
 592
 593         q = &txq->q;
 594         tfd_tmp = (struct iwl3945_tfd *)txq->tfds;
 595         tfd = &tfd_tmp[q->write_ptr];
 596
 597         if (reset)
 598                 memset(tfd, 0, sizeof(*tfd));
 599
 600         count = TFD_CTL_COUNT_GET(le32_to_cpu(tfd->control_flags));
 601
 602         if ((count >= NUM_TFD_CHUNKS) || (count < 0)) {
 603                 IWL_ERR(priv, "Error can not send more than %d chunks\n",
 604                           NUM_TFD_CHUNKS);
 605                 return -EINVAL;
 606         }
 607
 608         tfd->tbs[count].addr = cpu_to_le32(addr);
 609         tfd->tbs[count].len = cpu_to_le32(len);
 610
 611         count++;
 612
 613         tfd->control_flags = cpu_to_le32(TFD_CTL_COUNT_SET(count) |
 614                                          TFD_CTL_PAD_SET(pad));
 615
 616         return 0;
 617 }
 618
 619 /**
 620  * iwl3945_hw_txq_free_tfd - Free one TFD, those at index [txq->q.read_ptr]
 621  *
 622  * Does NOT advance any indexes
 623  */
 624 void iwl3945_hw_txq_free_tfd(struct iwl_priv *priv, struct iwl_tx_queue *txq)
 625 {
 626         struct iwl3945_tfd *tfd_tmp = (struct iwl3945_tfd *)txq->tfds;
 627         int index = txq->q.read_ptr;
 628         struct iwl3945_tfd *tfd = &tfd_tmp[index];
 629         struct pci_dev *dev = priv->pci_dev;
 630         int i;
 631         int counter;
 632
 633         /* sanity check */
 634         counter = TFD_CTL_COUNT_GET(le32_to_cpu(tfd->control_flags));
 635         if (counter > NUM_TFD_CHUNKS) {
 636                 IWL_ERR(priv, "Too many chunks: %i\n", counter);
 637                 /* @todo issue fatal error, it is quite serious situation */
 638                 return;
 639         }
 640
 641         /* Unmap tx_cmd */
 642         if (counter)
 643                 pci_unmap_single(dev,
 644                                 dma_unmap_addr(&txq->meta[index], mapping),
 645                                 dma_unmap_len(&txq->meta[index], len),
 646                                 PCI_DMA_TODEVICE);
 647
 648         /* unmap chunks if any */
 649
 650         for (i = 1; i < counter; i++)
 651                 pci_unmap_single(dev, le32_to_cpu(tfd->tbs[i].addr),
 652                          le32_to_cpu(tfd->tbs[i].len), PCI_DMA_TODEVICE);
 653
 654         /* free SKB */
 655         if (txq->txb) {
 656                 struct sk_buff *skb;
 657
 658                 skb = txq->txb[txq->q.read_ptr].skb;
 659
 660                 /* can be called from irqs-disabled context */
 661                 if (skb) {
 662                         dev_kfree_skb_any(skb);
 663                         txq->txb[txq->q.read_ptr].skb = NULL;
 664                 }
 665         }
 666 }
 667
 668 /**
 669  * iwl3945_hw_build_tx_cmd_rate - Add rate portion to TX_CMD:
 670  *
 671 */
 672 void iwl3945_hw_build_tx_cmd_rate(struct iwl_priv *priv,
 673                                   struct iwl_device_cmd *cmd,
 674                                   struct ieee80211_tx_info *info,
 675                                   struct ieee80211_hdr *hdr,
 676                                   int sta_id, int tx_id)
 677 {
 678         u16 hw_value = ieee80211_get_tx_rate(priv->hw, info)->hw_value;
 679         u16 rate_index = min(hw_value & 0xffff, IWL_RATE_COUNT_3945);
 680         u16 rate_mask;
 681         int rate;
 682         u8 rts_retry_limit;
 683         u8 data_retry_limit;
 684         __le32 tx_flags;
 685         __le16 fc = hdr->frame_control;
 686         struct iwl3945_tx_cmd *tx_cmd = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
 687
 688         rate = iwl3945_rates[rate_index].plcp;
 689         tx_flags = tx_cmd->tx_flags;
 690
 691         /* We need to figure out how to get the sta->supp_rates while
 692          * in this running context */
 693         rate_mask = IWL_RATES_MASK_3945;
 694
 695         /* Set retry limit on DATA packets and Probe Responses*/
 696         if (ieee80211_is_probe_resp(fc))
 697                 data_retry_limit = 3;
 698         else
 699                 data_retry_limit = IWL_DEFAULT_TX_RETRY;
 700         tx_cmd->data_retry_limit = data_retry_limit;
 701
 702         if (tx_id >= IWL39_CMD_QUEUE_NUM)
 703                 rts_retry_limit = 3;
 704         else
 705                 rts_retry_limit = 7;
 706
 707         if (data_retry_limit < rts_retry_limit)
 708                 rts_retry_limit = data_retry_limit;
 709         tx_cmd->rts_retry_limit = rts_retry_limit;
 710
 711         tx_cmd->rate = rate;
 712         tx_cmd->tx_flags = tx_flags;
 713
 714         /* OFDM */
 715         tx_cmd->supp_rates[0] =
 716            ((rate_mask & IWL_OFDM_RATES_MASK) >> IWL_FIRST_OFDM_RATE) & 0xFF;
 717
 718         /* CCK */
 719         tx_cmd->supp_rates[1] = (rate_mask & 0xF);
 720
 721         IWL_DEBUG_RATE(priv, "Tx sta id: %d, rate: %d (plcp), flags: 0x%4X "
 722                        "cck/ofdm mask: 0x%x/0x%x\n", sta_id,
 723                        tx_cmd->rate, le32_to_cpu(tx_cmd->tx_flags),
 724                        tx_cmd->supp_rates[1], tx_cmd->supp_rates[0]);
 725 }
 726
 727 static u8 iwl3945_sync_sta(struct iwl_priv *priv, int sta_id, u16 tx_rate)
 728 {
 729         unsigned long flags_spin;
 730         struct iwl_station_entry *station;
 731
 732         if (sta_id == IWL_INVALID_STATION)
 733                 return IWL_INVALID_STATION;
 734
 735         spin_lock_irqsave(&priv->sta_lock, flags_spin);
 736         station = &priv->stations[sta_id];
 737
 738         station->sta.sta.modify_mask = STA_MODIFY_TX_RATE_MSK;
 739         station->sta.rate_n_flags = cpu_to_le16(tx_rate);
 740         station->sta.mode = STA_CONTROL_MODIFY_MSK;
 741         iwl_legacy_send_add_sta(priv, &station->sta, CMD_ASYNC);
 742         spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
 743
 744         IWL_DEBUG_RATE(priv, "SCALE sync station %d to rate %d\n",
 745                         sta_id, tx_rate);
 746         return sta_id;
 747 }
 748
 749 static void iwl3945_set_pwr_vmain(struct iwl_priv *priv)
 750 {
 751 /*
 752  * (for documentation purposes)
 753  * to set power to V_AUX, do
 754
 755                 if (pci_pme_capable(priv->pci_dev, PCI_D3cold)) {
 756                         iwl_legacy_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
 757                                         APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
 758                                         ~APMG_PS_CTRL_MSK_PWR_SRC);
 759
 760                         iwl_poll_bit(priv, CSR_GPIO_IN,
 761                                      CSR_GPIO_IN_VAL_VAUX_PWR_SRC,
 762                                      CSR_GPIO_IN_BIT_AUX_POWER, 5000);
 763                 }
 764  */
 765
 766         iwl_legacy_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
 767                         APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
 768                         ~APMG_PS_CTRL_MSK_PWR_SRC);
 769
 770         iwl_poll_bit(priv, CSR_GPIO_IN, CSR_GPIO_IN_VAL_VMAIN_PWR_SRC,
 771                      CSR_GPIO_IN_BIT_AUX_POWER, 5000);  /* uS */
 772 }
 773
 774 static int iwl3945_rx_init(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
 775 {
 776         iwl_legacy_write_direct32(priv, FH39_RCSR_RBD_BASE(0), rxq->bd_dma);
 777         iwl_legacy_write_direct32(priv, FH39_RCSR_RPTR_ADDR(0),
 778                                         rxq->rb_stts_dma);
 779         iwl_legacy_write_direct32(priv, FH39_RCSR_WPTR(0), 0);
 780         iwl_legacy_write_direct32(priv, FH39_RCSR_CONFIG(0),
 781                 FH39_RCSR_RX_CONFIG_REG_VAL_DMA_CHNL_EN_ENABLE |
 782                 FH39_RCSR_RX_CONFIG_REG_VAL_RDRBD_EN_ENABLE |
 783                 FH39_RCSR_RX_CONFIG_REG_BIT_WR_STTS_EN |
 784                 FH39_RCSR_RX_CONFIG_REG_VAL_MAX_FRAG_SIZE_128 |
 785                 (RX_QUEUE_SIZE_LOG << FH39_RCSR_RX_CONFIG_REG_POS_RBDC_SIZE) |
 786                 FH39_RCSR_RX_CONFIG_REG_VAL_IRQ_DEST_INT_HOST |
 787                 (1 << FH39_RCSR_RX_CONFIG_REG_POS_IRQ_RBTH) |
 788                 FH39_RCSR_RX_CONFIG_REG_VAL_MSG_MODE_FH);
 789
 790         /* fake read to flush all prev I/O */
 791         iwl_legacy_read_direct32(priv, FH39_RSSR_CTRL);
 792
 793         return 0;
 794 }
 795
 796 static int iwl3945_tx_reset(struct iwl_priv *priv)
 797 {
 798
 799         /* bypass mode */
 800         iwl_legacy_write_prph(priv, ALM_SCD_MODE_REG, 0x2);
 801
 802         /* RA 0 is active */
 803         iwl_legacy_write_prph(priv, ALM_SCD_ARASTAT_REG, 0x01);
 804
 805         /* all 6 fifo are active */
 806         iwl_legacy_write_prph(priv, ALM_SCD_TXFACT_REG, 0x3f);
 807
 808         iwl_legacy_write_prph(priv, ALM_SCD_SBYP_MODE_1_REG, 0x010000);
 809         iwl_legacy_write_prph(priv, ALM_SCD_SBYP_MODE_2_REG, 0x030002);
 810         iwl_legacy_write_prph(priv, ALM_SCD_TXF4MF_REG, 0x000004);
 811         iwl_legacy_write_prph(priv, ALM_SCD_TXF5MF_REG, 0x000005);
 812
 813         iwl_legacy_write_direct32(priv, FH39_TSSR_CBB_BASE,
 814                              priv->_3945.shared_phys);
 815
 816         iwl_legacy_write_direct32(priv, FH39_TSSR_MSG_CONFIG,
 817                 FH39_TSSR_TX_MSG_CONFIG_REG_VAL_SNOOP_RD_TXPD_ON |
 818                 FH39_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RD_TXPD_ON |
 819                 FH39_TSSR_TX_MSG_CONFIG_REG_VAL_MAX_FRAG_SIZE_128B |
 820                 FH39_TSSR_TX_MSG_CONFIG_REG_VAL_SNOOP_RD_TFD_ON |
 821                 FH39_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RD_CBB_ON |
 822                 FH39_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RSP_WAIT_TH |
 823                 FH39_TSSR_TX_MSG_CONFIG_REG_VAL_RSP_WAIT_TH);
 824
 825
 826         return 0;
 827 }
 828
 829 /**
 830  * iwl3945_txq_ctx_reset - Reset TX queue context
 831  *
 832  * Destroys all DMA structures and initialize them again
 833  */
 834 static int iwl3945_txq_ctx_reset(struct iwl_priv *priv)
 835 {
 836         int rc;
 837         int txq_id, slots_num;
 838
 839         iwl3945_hw_txq_ctx_free(priv);
 840
 841         /* allocate tx queue structure */
 842         rc = iwl_legacy_alloc_txq_mem(priv);
 843         if (rc)
 844                 return rc;
 845
 846         /* Tx CMD queue */
 847         rc = iwl3945_tx_reset(priv);
 848         if (rc)
 849                 goto error;
 850
 851         /* Tx queue(s) */
 852         for (txq_id = 0; txq_id < priv->hw_params.max_txq_num; txq_id++) {
 853                 slots_num = (txq_id == IWL39_CMD_QUEUE_NUM) ?
 854                                 TFD_CMD_SLOTS : TFD_TX_CMD_SLOTS;
 855                 rc = iwl_legacy_tx_queue_init(priv, &priv->txq[txq_id],
 856                                                 slots_num, txq_id);
 857                 if (rc) {
 858                         IWL_ERR(priv, "Tx %d queue init failed\n", txq_id);
 859                         goto error;
 860                 }
 861         }
 862
 863         return rc;
 864
 865  error:
 866         iwl3945_hw_txq_ctx_free(priv);
 867         return rc;
 868 }
 869
 870
 871 /*
 872  * Start up 3945's basic functionality after it has been reset
 873  * (e.g. after platform boot, or shutdown via iwl_legacy_apm_stop())
 874  * NOTE:  This does not load uCode nor start the embedded processor
 875  */
 876 static int iwl3945_apm_init(struct iwl_priv *priv)
 877 {
 878         int ret = iwl_legacy_apm_init(priv);
 879
 880         /* Clear APMG (NIC's internal power management) interrupts */
 881         iwl_legacy_write_prph(priv, APMG_RTC_INT_MSK_REG, 0x0);
 882         iwl_legacy_write_prph(priv, APMG_RTC_INT_STT_REG, 0xFFFFFFFF);
 883
 884         /* Reset radio chip */
 885         iwl_legacy_set_bits_prph(priv, APMG_PS_CTRL_REG,
 886                                 APMG_PS_CTRL_VAL_RESET_REQ);
 887         udelay(5);
 888         iwl_legacy_clear_bits_prph(priv, APMG_PS_CTRL_REG,
 889                                 APMG_PS_CTRL_VAL_RESET_REQ);
 890
 891         return ret;
 892 }
 893
 894 static void iwl3945_nic_config(struct iwl_priv *priv)
 895 {
 896         struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
 897         unsigned long flags;
 898         u8 rev_id = priv->pci_dev->revision;
 899
 900         spin_lock_irqsave(&priv->lock, flags);
 901
 902         /* Determine HW type */
 903         IWL_DEBUG_INFO(priv, "HW Revision ID = 0x%X\n", rev_id);
 904
 905         if (rev_id & PCI_CFG_REV_ID_BIT_RTP)
 906                 IWL_DEBUG_INFO(priv, "RTP type\n");
 907         else if (rev_id & PCI_CFG_REV_ID_BIT_BASIC_SKU) {
 908                 IWL_DEBUG_INFO(priv, "3945 RADIO-MB type\n");
 909                 iwl_legacy_set_bit(priv, CSR_HW_IF_CONFIG_REG,
 910                             CSR39_HW_IF_CONFIG_REG_BIT_3945_MB);
 911         } else {
 912                 IWL_DEBUG_INFO(priv, "3945 RADIO-MM type\n");
 913                 iwl_legacy_set_bit(priv, CSR_HW_IF_CONFIG_REG,
 914                             CSR39_HW_IF_CONFIG_REG_BIT_3945_MM);
 915         }
 916
 917         if (EEPROM_SKU_CAP_OP_MODE_MRC == eeprom->sku_cap) {
 918                 IWL_DEBUG_INFO(priv, "SKU OP mode is mrc\n");
 919                 iwl_legacy_set_bit(priv, CSR_HW_IF_CONFIG_REG,
 920                             CSR39_HW_IF_CONFIG_REG_BIT_SKU_MRC);
 921         } else
 922                 IWL_DEBUG_INFO(priv, "SKU OP mode is basic\n");
 923
 924         if ((eeprom->board_revision & 0xF0) == 0xD0) {
 925                 IWL_DEBUG_INFO(priv, "3945ABG revision is 0x%X\n",
 926                                eeprom->board_revision);
 927                 iwl_legacy_set_bit(priv, CSR_HW_IF_CONFIG_REG,
 928                             CSR39_HW_IF_CONFIG_REG_BIT_BOARD_TYPE);
 929         } else {
 930                 IWL_DEBUG_INFO(priv, "3945ABG revision is 0x%X\n",
 931                                eeprom->board_revision);
 932                 iwl_legacy_clear_bit(priv, CSR_HW_IF_CONFIG_REG,
 933                               CSR39_HW_IF_CONFIG_REG_BIT_BOARD_TYPE);
 934         }
 935
 936         if (eeprom->almgor_m_version <= 1) {
 937                 iwl_legacy_set_bit(priv, CSR_HW_IF_CONFIG_REG,
 938                             CSR39_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_A);
 939                 IWL_DEBUG_INFO(priv, "Card M type A version is 0x%X\n",
 940                                eeprom->almgor_m_version);
 941         } else {
 942                 IWL_DEBUG_INFO(priv, "Card M type B version is 0x%X\n",
 943                                eeprom->almgor_m_version);
 944                 iwl_legacy_set_bit(priv, CSR_HW_IF_CONFIG_REG,
 945                             CSR39_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_B);
 946         }
 947         spin_unlock_irqrestore(&priv->lock, flags);
 948
 949         if (eeprom->sku_cap & EEPROM_SKU_CAP_SW_RF_KILL_ENABLE)
 950                 IWL_DEBUG_RF_KILL(priv, "SW RF KILL supported in EEPROM.\n");
 951
 952         if (eeprom->sku_cap & EEPROM_SKU_CAP_HW_RF_KILL_ENABLE)
 953                 IWL_DEBUG_RF_KILL(priv, "HW RF KILL supported in EEPROM.\n");
 954 }
 955
 956 int iwl3945_hw_nic_init(struct iwl_priv *priv)
 957 {
 958         int rc;
 959         unsigned long flags;
 960         struct iwl_rx_queue *rxq = &priv->rxq;
 961
 962         spin_lock_irqsave(&priv->lock, flags);
 963         priv->cfg->ops->lib->apm_ops.init(priv);
 964         spin_unlock_irqrestore(&priv->lock, flags);
 965
 966         iwl3945_set_pwr_vmain(priv);
 967
 968         priv->cfg->ops->lib->apm_ops.config(priv);
 969
 970         /* Allocate the RX queue, or reset if it is already allocated */
 971         if (!rxq->bd) {
 972                 rc = iwl_legacy_rx_queue_alloc(priv);
 973                 if (rc) {
 974                         IWL_ERR(priv, "Unable to initialize Rx queue\n");
 975                         return -ENOMEM;
 976                 }
 977         } else
 978                 iwl3945_rx_queue_reset(priv, rxq);
 979
 980         iwl3945_rx_replenish(priv);
 981
 982         iwl3945_rx_init(priv, rxq);
 983
 984
 985         /* Look at using this instead:
 986         rxq->need_update = 1;
 987         iwl_legacy_rx_queue_update_write_ptr(priv, rxq);
 988         */
 989
 990         iwl_legacy_write_direct32(priv, FH39_RCSR_WPTR(0), rxq->write & ~7);
 991
 992         rc = iwl3945_txq_ctx_reset(priv);
 993         if (rc)
 994                 return rc;
 995
 996         set_bit(STATUS_INIT, &priv->status);
 997
 998         return 0;
 999 }
1000
1001 /**
1002  * iwl3945_hw_txq_ctx_free - Free TXQ Context
1003  *
1004  * Destroy all TX DMA queues and structures
1005  */
1006 void iwl3945_hw_txq_ctx_free(struct iwl_priv *priv)
1007 {
1008         int txq_id;
1009
1010         /* Tx queues */
1011         if (priv->txq)
1012                 for (txq_id = 0; txq_id < priv->hw_params.max_txq_num;
1013                      txq_id++)
1014                         if (txq_id == IWL39_CMD_QUEUE_NUM)
1015                                 iwl_legacy_cmd_queue_free(priv);
1016                         else
1017                                 iwl_legacy_tx_queue_free(priv, txq_id);
1018
1019         /* free tx queue structure */
1020         iwl_legacy_txq_mem(priv);
1021 }
1022
1023 void iwl3945_hw_txq_ctx_stop(struct iwl_priv *priv)
1024 {
1025         int txq_id;
1026
1027         /* stop SCD */
1028         iwl_legacy_write_prph(priv, ALM_SCD_MODE_REG, 0);
1029         iwl_legacy_write_prph(priv, ALM_SCD_TXFACT_REG, 0);
1030
1031         /* reset TFD queues */
1032         for (txq_id = 0; txq_id < priv->hw_params.max_txq_num; txq_id++) {
1033                 iwl_legacy_write_direct32(priv, FH39_TCSR_CONFIG(txq_id), 0x0);
1034                 iwl_poll_direct_bit(priv, FH39_TSSR_TX_STATUS,
1035                                 FH39_TSSR_TX_STATUS_REG_MSK_CHNL_IDLE(txq_id),
1036                                 1000);
1037         }
1038
1039         iwl3945_hw_txq_ctx_free(priv);
1040 }
1041
1042 /**
1043  * iwl3945_hw_reg_adjust_power_by_temp
1044  * return index delta into power gain settings table
1045 */
1046 static int iwl3945_hw_reg_adjust_power_by_temp(int new_reading, int old_reading)
1047 {
1048         return (new_reading - old_reading) * (-11) / 100;
1049 }
1050
1051 /**
1052  * iwl3945_hw_reg_temp_out_of_range - Keep temperature in sane range
1053  */
1054 static inline int iwl3945_hw_reg_temp_out_of_range(int temperature)
1055 {
1056         return ((temperature < -260) || (temperature > 25)) ? 1 : 0;
1057 }
1058
1059 int iwl3945_hw_get_temperature(struct iwl_priv *priv)
1060 {
1061         return iwl_read32(priv, CSR_UCODE_DRV_GP2);
1062 }
1063
1064 /**
1065  * iwl3945_hw_reg_txpower_get_temperature
1066  * get the current temperature by reading from NIC
1067 */
1068 static int iwl3945_hw_reg_txpower_get_temperature(struct iwl_priv *priv)
1069 {
1070         struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
1071         int temperature;
1072
1073         temperature = iwl3945_hw_get_temperature(priv);
1074
1075         /* driver's okay range is -260 to +25.
1076          *   human readable okay range is 0 to +285 */
1077         IWL_DEBUG_INFO(priv, "Temperature: %d\n", temperature + IWL_TEMP_CONVERT);
1078
1079         /* handle insane temp reading */
1080         if (iwl3945_hw_reg_temp_out_of_range(temperature)) {
1081                 IWL_ERR(priv, "Error bad temperature value  %d\n", temperature);
1082
1083                 /* if really really hot(?),
1084                  *   substitute the 3rd band/group's temp measured at factory */
1085                 if (priv->last_temperature > 100)
1086                         temperature = eeprom->groups[2].temperature;
1087                 else /* else use most recent "sane" value from driver */
1088                         temperature = priv->last_temperature;
1089         }
1090
1091         return temperature;     /* raw, not "human readable" */
1092 }
1093
1094 /* Adjust Txpower only if temperature variance is greater than threshold.
1095  *
1096  * Both are lower than older versions' 9 degrees */
1097 #define IWL_TEMPERATURE_LIMIT_TIMER   6
1098
1099 /**
1100  * iwl3945_is_temp_calib_needed - determines if new calibration is needed
1101  *
1102  * records new temperature in tx_mgr->temperature.
1103  * replaces tx_mgr->last_temperature *only* if calib needed
1104  *    (assumes caller will actually do the calibration!). */
1105 static int iwl3945_is_temp_calib_needed(struct iwl_priv *priv)
1106 {
1107         int temp_diff;
1108
1109         priv->temperature = iwl3945_hw_reg_txpower_get_temperature(priv);
1110         temp_diff = priv->temperature - priv->last_temperature;
1111
1112         /* get absolute value */
1113         if (temp_diff < 0) {
1114                 IWL_DEBUG_POWER(priv, "Getting cooler, delta %d,\n", temp_diff);
1115                 temp_diff = -temp_diff;
1116         } else if (temp_diff == 0)
1117                 IWL_DEBUG_POWER(priv, "Same temp,\n");
1118         else
1119                 IWL_DEBUG_POWER(priv, "Getting warmer, delta %d,\n", temp_diff);
1120
1121         /* if we don't need calibration, *don't* update last_temperature */
1122         if (temp_diff < IWL_TEMPERATURE_LIMIT_TIMER) {
1123                 IWL_DEBUG_POWER(priv, "Timed thermal calib not needed\n");
1124                 return 0;
1125         }
1126
1127         IWL_DEBUG_POWER(priv, "Timed thermal calib needed\n");
1128
1129         /* assume that caller will actually do calib ...
1130          *   update the "last temperature" value */
1131         priv->last_temperature = priv->temperature;
1132         return 1;
1133 }
1134
1135 #define IWL_MAX_GAIN_ENTRIES 78
1136 #define IWL_CCK_FROM_OFDM_POWER_DIFF  -5
1137 #define IWL_CCK_FROM_OFDM_INDEX_DIFF (10)
1138
1139 /* radio and DSP power table, each step is 1/2 dB.
1140  * 1st number is for RF analog gain, 2nd number is for DSP pre-DAC gain. */
1141 static struct iwl3945_tx_power power_gain_table[2][IWL_MAX_GAIN_ENTRIES] = {
1142         {
1143          {251, 127},            /* 2.4 GHz, highest power */
1144          {251, 127},
1145          {251, 127},
1146          {251, 127},
1147          {251, 125},
1148          {251, 110},
1149          {251, 105},
1150          {251, 98},
1151          {187, 125},
1152          {187, 115},
1153          {187, 108},
1154          {187, 99},
1155          {243, 119},
1156          {243, 111},
1157          {243, 105},
1158          {243, 97},
1159          {243, 92},
1160          {211, 106},
1161          {211, 100},
1162          {179, 120},
1163          {179, 113},
1164          {179, 107},
1165          {147, 125},
1166          {147, 119},
1167          {147, 112},
1168          {147, 106},
1169          {147, 101},
1170          {147, 97},
1171          {147, 91},
1172          {115, 107},
1173          {235, 121},
1174          {235, 115},
1175          {235, 109},
1176          {203, 127},
1177          {203, 121},
1178          {203, 115},
1179          {203, 108},
1180          {203, 102},
1181          {203, 96},
1182          {203, 92},
1183          {171, 110},
1184          {171, 104},
1185          {171, 98},
1186          {139, 116},
1187          {227, 125},
1188          {227, 119},
1189          {227, 113},
1190          {227, 107},
1191          {227, 101},
1192          {227, 96},
1193          {195, 113},
1194          {195, 106},
1195          {195, 102},
1196          {195, 95},
1197          {163, 113},
1198          {163, 106},
1199          {163, 102},
1200          {163, 95},
1201          {131, 113},
1202          {131, 106},
1203          {131, 102},
1204          {131, 95},
1205          {99, 113},
1206          {99, 106},
1207          {99, 102},
1208          {99, 95},
1209          {67, 113},
1210          {67, 106},
1211          {67, 102},
1212          {67, 95},
1213          {35, 113},
1214          {35, 106},
1215          {35, 102},
1216          {35, 95},
1217          {3, 113},
1218          {3, 106},
1219          {3, 102},
1220          {3, 95} },             /* 2.4 GHz, lowest power */
1221         {
1222          {251, 127},            /* 5.x GHz, highest power */
1223          {251, 120},
1224          {251, 114},
1225          {219, 119},
1226          {219, 101},
1227          {187, 113},
1228          {187, 102},
1229          {155, 114},
1230          {155, 103},
1231          {123, 117},
1232          {123, 107},
1233          {123, 99},
1234          {123, 92},
1235          {91, 108},
1236          {59, 125},
1237          {59, 118},
1238          {59, 109},
1239          {59, 102},
1240          {59, 96},
1241          {59, 90},
1242          {27, 104},
1243          {27, 98},
1244          {27, 92},
1245          {115, 118},
1246          {115, 111},
1247          {115, 104},
1248          {83, 126},
1249          {83, 121},
1250          {83, 113},
1251          {83, 105},
1252          {83, 99},
1253          {51, 118},
1254          {51, 111},
1255          {51, 104},
1256          {51, 98},
1257          {19, 116},
1258          {19, 109},
1259          {19, 102},
1260          {19, 98},
1261          {19, 93},
1262          {171, 113},
1263          {171, 107},
1264          {171, 99},
1265          {139, 120},
1266          {139, 113},
1267          {139, 107},
1268          {139, 99},
1269          {107, 120},
1270          {107, 113},
1271          {107, 107},
1272          {107, 99},
1273          {75, 120},
1274          {75, 113},
1275          {75, 107},
1276          {75, 99},
1277          {43, 120},
1278          {43, 113},
1279          {43, 107},
1280          {43, 99},
1281          {11, 120},
1282          {11, 113},
1283          {11, 107},
1284          {11, 99},
1285          {131, 107},
1286          {131, 99},
1287          {99, 120},
1288          {99, 113},
1289          {99, 107},
1290          {99, 99},
1291          {67, 120},
1292          {67, 113},
1293          {67, 107},
1294          {67, 99},
1295          {35, 120},
1296          {35, 113},
1297          {35, 107},
1298          {35, 99},
1299          {3, 120} }             /* 5.x GHz, lowest power */
1300 };
1301
1302 static inline u8 iwl3945_hw_reg_fix_power_index(int index)
1303 {
1304         if (index < 0)
1305                 return 0;
1306         if (index >= IWL_MAX_GAIN_ENTRIES)
1307                 return IWL_MAX_GAIN_ENTRIES - 1;
1308         return (u8) index;
1309 }
1310
1311 /* Kick off thermal recalibration check every 60 seconds */
1312 #define REG_RECALIB_PERIOD (60)
1313
1314 /**
1315  * iwl3945_hw_reg_set_scan_power - Set Tx power for scan probe requests
1316  *
1317  * Set (in our channel info database) the direct scan Tx power for 1 Mbit (CCK)
1318  * or 6 Mbit (OFDM) rates.
1319  */
1320 static void iwl3945_hw_reg_set_scan_power(struct iwl_priv *priv, u32 scan_tbl_index,
1321                                s32 rate_index, const s8 *clip_pwrs,
1322                                struct iwl_channel_info *ch_info,
1323                                int band_index)
1324 {
1325         struct iwl3945_scan_power_info *scan_power_info;
1326         s8 power;
1327         u8 power_index;
1328
1329         scan_power_info = &ch_info->scan_pwr_info[scan_tbl_index];
1330
1331         /* use this channel group's 6Mbit clipping/saturation pwr,
1332          *   but cap at regulatory scan power restriction (set during init
1333          *   based on eeprom channel data) for this channel.  */
1334         power = min(ch_info->scan_power, clip_pwrs[IWL_RATE_6M_INDEX_TABLE]);
1335
1336         power = min(power, priv->tx_power_user_lmt);
1337         scan_power_info->requested_power = power;
1338
1339         /* find difference between new scan *power* and current "normal"
1340          *   Tx *power* for 6Mb.  Use this difference (x2) to adjust the
1341          *   current "normal" temperature-compensated Tx power *index* for
1342          *   this rate (1Mb or 6Mb) to yield new temp-compensated scan power
1343          *   *index*. */
1344         power_index = ch_info->power_info[rate_index].power_table_index
1345             - (power - ch_info->power_info
1346                [IWL_RATE_6M_INDEX_TABLE].requested_power) * 2;
1347
1348         /* store reference index that we use when adjusting *all* scan
1349          *   powers.  So we can accommodate user (all channel) or spectrum
1350          *   management (single channel) power changes "between" temperature
1351          *   feedback compensation procedures.
1352          * don't force fit this reference index into gain table; it may be a
1353          *   negative number.  This will help avoid errors when we're at
1354          *   the lower bounds (highest gains, for warmest temperatures)
1355          *   of the table. */
1356
1357         /* don't exceed table bounds for "real" setting */
1358         power_index = iwl3945_hw_reg_fix_power_index(power_index);
1359
1360         scan_power_info->power_table_index = power_index;
1361         scan_power_info->tpc.tx_gain =
1362             power_gain_table[band_index][power_index].tx_gain;
1363         scan_power_info->tpc.dsp_atten =
1364             power_gain_table[band_index][power_index].dsp_atten;
1365 }
1366
1367 /**
1368  * iwl3945_send_tx_power - fill in Tx Power command with gain settings
1369  *
1370  * Configures power settings for all rates for the current channel,
1371  * using values from channel info struct, and send to NIC
1372  */
1373 static int iwl3945_send_tx_power(struct iwl_priv *priv)
1374 {
1375         int rate_idx, i;
1376         const struct iwl_channel_info *ch_info = NULL;
1377         struct iwl3945_txpowertable_cmd txpower = {
1378                 .channel = priv->contexts[IWL_RXON_CTX_BSS].active.channel,
1379         };
1380         u16 chan;
1381
1382         if (WARN_ONCE(test_bit(STATUS_SCAN_HW, &priv->status),
1383                       "TX Power requested while scanning!\n"))
1384                 return -EAGAIN;
1385
1386         chan = le16_to_cpu(priv->contexts[IWL_RXON_CTX_BSS].active.channel);
1387
1388         txpower.band = (priv->band == IEEE80211_BAND_5GHZ) ? 0 : 1;
1389         ch_info = iwl_legacy_get_channel_info(priv, priv->band, chan);
1390         if (!ch_info) {
1391                 IWL_ERR(priv,
1392                         "Failed to get channel info for channel %d [%d]\n",
1393                         chan, priv->band);
1394                 return -EINVAL;
1395         }
1396
1397         if (!iwl_legacy_is_channel_valid(ch_info)) {
1398                 IWL_DEBUG_POWER(priv, "Not calling TX_PWR_TABLE_CMD on "
1399                                 "non-Tx channel.\n");
1400                 return 0;
1401         }
1402
1403         /* fill cmd with power settings for all rates for current channel */
1404         /* Fill OFDM rate */
1405         for (rate_idx = IWL_FIRST_OFDM_RATE, i = 0;
1406              rate_idx <= IWL39_LAST_OFDM_RATE; rate_idx++, i++) {
1407
1408                 txpower.power[i].tpc = ch_info->power_info[i].tpc;
1409                 txpower.power[i].rate = iwl3945_rates[rate_idx].plcp;
1410
1411                 IWL_DEBUG_POWER(priv, "ch %d:%d rf %d dsp %3d rate code 0x%02x\n",
1412                                 le16_to_cpu(txpower.channel),
1413                                 txpower.band,
1414                                 txpower.power[i].tpc.tx_gain,
1415                                 txpower.power[i].tpc.dsp_atten,
1416                                 txpower.power[i].rate);
1417         }
1418         /* Fill CCK rates */
1419         for (rate_idx = IWL_FIRST_CCK_RATE;
1420              rate_idx <= IWL_LAST_CCK_RATE; rate_idx++, i++) {
1421                 txpower.power[i].tpc = ch_info->power_info[i].tpc;
1422                 txpower.power[i].rate = iwl3945_rates[rate_idx].plcp;
1423
1424                 IWL_DEBUG_POWER(priv, "ch %d:%d rf %d dsp %3d rate code 0x%02x\n",
1425                                 le16_to_cpu(txpower.channel),
1426                                 txpower.band,
1427                                 txpower.power[i].tpc.tx_gain,
1428                                 txpower.power[i].tpc.dsp_atten,
1429                                 txpower.power[i].rate);
1430         }
1431
1432         return iwl_legacy_send_cmd_pdu(priv, REPLY_TX_PWR_TABLE_CMD,
1433                                 sizeof(struct iwl3945_txpowertable_cmd),
1434                                 &txpower);
1435
1436 }
1437
1438 /**
1439  * iwl3945_hw_reg_set_new_power - Configures power tables at new levels
1440  * @ch_info: Channel to update.  Uses power_info.requested_power.
1441  *
1442  * Replace requested_power and base_power_index ch_info fields for
1443  * one channel.
1444  *
1445  * Called if user or spectrum management changes power preferences.
1446  * Takes into account h/w and modulation limitations (clip power).
1447  *
1448  * This does *not* send anything to NIC, just sets up ch_info for one channel.
1449  *
1450  * NOTE: reg_compensate_for_temperature_dif() *must* be run after this to
1451  *       properly fill out the scan powers, and actual h/w gain settings,
1452  *       and send changes to NIC
1453  */
1454 static int iwl3945_hw_reg_set_new_power(struct iwl_priv *priv,
1455                              struct iwl_channel_info *ch_info)
1456 {
1457         struct iwl3945_channel_power_info *power_info;
1458         int power_changed = 0;
1459         int i;
1460         const s8 *clip_pwrs;
1461         int power;
1462
1463         /* Get this chnlgrp's rate-to-max/clip-powers table */
1464         clip_pwrs = priv->_3945.clip_groups[ch_info->group_index].clip_powers;
1465
1466         /* Get this channel's rate-to-current-power settings table */
1467         power_info = ch_info->power_info;
1468
1469         /* update OFDM Txpower settings */
1470         for (i = IWL_RATE_6M_INDEX_TABLE; i <= IWL_RATE_54M_INDEX_TABLE;
1471              i++, ++power_info) {
1472                 int delta_idx;
1473
1474                 /* limit new power to be no more than h/w capability */
1475                 power = min(ch_info->curr_txpow, clip_pwrs[i]);
1476                 if (power == power_info->requested_power)
1477                         continue;
1478
1479                 /* find difference between old and new requested powers,
1480                  *    update base (non-temp-compensated) power index */
1481                 delta_idx = (power - power_info->requested_power) * 2;
1482                 power_info->base_power_index -= delta_idx;
1483
1484                 /* save new requested power value */
1485                 power_info->requested_power = power;
1486
1487                 power_changed = 1;
1488         }
1489
1490         /* update CCK Txpower settings, based on OFDM 12M setting ...
1491          *    ... all CCK power settings for a given channel are the *same*. */
1492         if (power_changed) {
1493                 power =
1494                     ch_info->power_info[IWL_RATE_12M_INDEX_TABLE].
1495                     requested_power + IWL_CCK_FROM_OFDM_POWER_DIFF;
1496
1497                 /* do all CCK rates' iwl3945_channel_power_info structures */
1498                 for (i = IWL_RATE_1M_INDEX_TABLE; i <= IWL_RATE_11M_INDEX_TABLE; i++) {
1499                         power_info->requested_power = power;
1500                         power_info->base_power_index =
1501                             ch_info->power_info[IWL_RATE_12M_INDEX_TABLE].
1502                             base_power_index + IWL_CCK_FROM_OFDM_INDEX_DIFF;
1503                         ++power_info;
1504                 }
1505         }
1506
1507         return 0;
1508 }
1509
1510 /**
1511  * iwl3945_hw_reg_get_ch_txpower_limit - returns new power limit for channel
1512  *
1513  * NOTE: Returned power limit may be less (but not more) than requested,
1514  *       based strictly on regulatory (eeprom and spectrum mgt) limitations
1515  *       (no consideration for h/w clipping limitations).
1516  */
1517 static int iwl3945_hw_reg_get_ch_txpower_limit(struct iwl_channel_info *ch_info)
1518 {
1519         s8 max_power;
1520
1521 #if 0
1522         /* if we're using TGd limits, use lower of TGd or EEPROM */
1523         if (ch_info->tgd_data.max_power != 0)
1524                 max_power = min(ch_info->tgd_data.max_power,
1525                                 ch_info->eeprom.max_power_avg);
1526
1527         /* else just use EEPROM limits */
1528         else
1529 #endif
1530                 max_power = ch_info->eeprom.max_power_avg;
1531
1532         return min(max_power, ch_info->max_power_avg);
1533 }
1534
1535 /**
1536  * iwl3945_hw_reg_comp_txpower_temp - Compensate for temperature
1537  *
1538  * Compensate txpower settings of *all* channels for temperature.
1539  * This only accounts for the difference between current temperature
1540  *   and the factory calibration temperatures, and bases the new settings
1541  *   on the channel's base_power_index.
1542  *
1543  * If RxOn is "associated", this sends the new Txpower to NIC!
1544  */
1545 static int iwl3945_hw_reg_comp_txpower_temp(struct iwl_priv *priv)
1546 {
1547         struct iwl_channel_info *ch_info = NULL;
1548         struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
1549         int delta_index;
1550         const s8 *clip_pwrs; /* array of h/w max power levels for each rate */
1551         u8 a_band;
1552         u8 rate_index;
1553         u8 scan_tbl_index;
1554         u8 i;
1555         int ref_temp;
1556         int temperature = priv->temperature;
1557
1558         if (priv->disable_tx_power_cal ||
1559             test_bit(STATUS_SCANNING, &priv->status)) {
1560                 /* do not perform tx power calibration */
1561                 return 0;
1562         }
1563         /* set up new Tx power info for each and every channel, 2.4 and 5.x */
1564         for (i = 0; i < priv->channel_count; i++) {
1565                 ch_info = &priv->channel_info[i];
1566                 a_band = iwl_legacy_is_channel_a_band(ch_info);
1567
1568                 /* Get this chnlgrp's factory calibration temperature */
1569                 ref_temp = (s16)eeprom->groups[ch_info->group_index].
1570                     temperature;
1571
1572                 /* get power index adjustment based on current and factory
1573                  * temps */
1574                 delta_index = iwl3945_hw_reg_adjust_power_by_temp(temperature,
1575                                                               ref_temp);
1576
1577                 /* set tx power value for all rates, OFDM and CCK */
1578                 for (rate_index = 0; rate_index < IWL_RATE_COUNT_3945;
1579                      rate_index++) {
1580                         int power_idx =
1581                             ch_info->power_info[rate_index].base_power_index;
1582
1583                         /* temperature compensate */
1584                         power_idx += delta_index;
1585
1586                         /* stay within table range */
1587                         power_idx = iwl3945_hw_reg_fix_power_index(power_idx);
1588                         ch_info->power_info[rate_index].
1589                             power_table_index = (u8) power_idx;
1590                         ch_info->power_info[rate_index].tpc =
1591                             power_gain_table[a_band][power_idx];
1592                 }
1593
1594                 /* Get this chnlgrp's rate-to-max/clip-powers table */
1595                 clip_pwrs = priv->_3945.clip_groups[ch_info->group_index].clip_powers;
1596
1597                 /* set scan tx power, 1Mbit for CCK, 6Mbit for OFDM */
1598                 for (scan_tbl_index = 0;
1599                      scan_tbl_index < IWL_NUM_SCAN_RATES; scan_tbl_index++) {
1600                         s32 actual_index = (scan_tbl_index == 0) ?
1601                             IWL_RATE_1M_INDEX_TABLE : IWL_RATE_6M_INDEX_TABLE;
1602                         iwl3945_hw_reg_set_scan_power(priv, scan_tbl_index,
1603                                            actual_index, clip_pwrs,
1604                                            ch_info, a_band);
1605                 }
1606         }
1607
1608         /* send Txpower command for current channel to ucode */
1609         return priv->cfg->ops->lib->send_tx_power(priv);
1610 }
1611
1612 int iwl3945_hw_reg_set_txpower(struct iwl_priv *priv, s8 power)
1613 {
1614         struct iwl_channel_info *ch_info;
1615         s8 max_power;
1616         u8 a_band;
1617         u8 i;
1618
1619         if (priv->tx_power_user_lmt == power) {
1620                 IWL_DEBUG_POWER(priv, "Requested Tx power same as current "
1621                                 "limit: %ddBm.\n", power);
1622                 return 0;
1623         }
1624
1625         IWL_DEBUG_POWER(priv, "Setting upper limit clamp to %ddBm.\n", power);
1626         priv->tx_power_user_lmt = power;
1627
1628         /* set up new Tx powers for each and every channel, 2.4 and 5.x */
1629
1630         for (i = 0; i < priv->channel_count; i++) {
1631                 ch_info = &priv->channel_info[i];
1632                 a_band = iwl_legacy_is_channel_a_band(ch_info);
1633
1634                 /* find minimum power of all user and regulatory constraints
1635                  *    (does not consider h/w clipping limitations) */
1636                 max_power = iwl3945_hw_reg_get_ch_txpower_limit(ch_info);
1637                 max_power = min(power, max_power);
1638                 if (max_power != ch_info->curr_txpow) {
1639                         ch_info->curr_txpow = max_power;
1640
1641                         /* this considers the h/w clipping limitations */
1642                         iwl3945_hw_reg_set_new_power(priv, ch_info);
1643                 }
1644         }
1645
1646         /* update txpower settings for all channels,
1647          *   send to NIC if associated. */
1648         iwl3945_is_temp_calib_needed(priv);
1649         iwl3945_hw_reg_comp_txpower_temp(priv);
1650
1651         return 0;
1652 }
1653
1654 static int iwl3945_send_rxon_assoc(struct iwl_priv *priv,
1655                                    struct iwl_rxon_context *ctx)
1656 {
1657         int rc = 0;
1658         struct iwl_rx_packet *pkt;
1659         struct iwl3945_rxon_assoc_cmd rxon_assoc;
1660         struct iwl_host_cmd cmd = {
1661                 .id = REPLY_RXON_ASSOC,
1662                 .len = sizeof(rxon_assoc),
1663                 .flags = CMD_WANT_SKB,
1664                 .data = &rxon_assoc,
1665         };
1666         const struct iwl_legacy_rxon_cmd *rxon1 = &ctx->staging;
1667         const struct iwl_legacy_rxon_cmd *rxon2 = &ctx->active;
1668
1669         if ((rxon1->flags == rxon2->flags) &&
1670             (rxon1->filter_flags == rxon2->filter_flags) &&
1671             (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
1672             (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
1673                 IWL_DEBUG_INFO(priv, "Using current RXON_ASSOC.  Not resending.\n");
1674                 return 0;
1675         }
1676
1677         rxon_assoc.flags = ctx->staging.flags;
1678         rxon_assoc.filter_flags = ctx->staging.filter_flags;
1679         rxon_assoc.ofdm_basic_rates = ctx->staging.ofdm_basic_rates;
1680         rxon_assoc.cck_basic_rates = ctx->staging.cck_basic_rates;
1681         rxon_assoc.reserved = 0;
1682
1683         rc = iwl_legacy_send_cmd_sync(priv, &cmd);
1684         if (rc)
1685                 return rc;
1686
1687         pkt = (struct iwl_rx_packet *)cmd.reply_page;
1688         if (pkt->hdr.flags & IWL_CMD_FAILED_MSK) {
1689                 IWL_ERR(priv, "Bad return from REPLY_RXON_ASSOC command\n");
1690                 rc = -EIO;
1691         }
1692
1693         iwl_legacy_free_pages(priv, cmd.reply_page);
1694
1695         return rc;
1696 }
1697
1698 /**
1699  * iwl3945_commit_rxon - commit staging_rxon to hardware
1700  *
1701  * The RXON command in staging_rxon is committed to the hardware and
1702  * the active_rxon structure is updated with the new data.  This
1703  * function correctly transitions out of the RXON_ASSOC_MSK state if
1704  * a HW tune is required based on the RXON structure changes.
1705  */
1706 int iwl3945_commit_rxon(struct iwl_priv *priv, struct iwl_rxon_context *ctx)
1707 {
1708         /* cast away the const for active_rxon in this function */
1709         struct iwl3945_rxon_cmd *active_rxon = (void *)&ctx->active;
1710         struct iwl3945_rxon_cmd *staging_rxon = (void *)&ctx->staging;
1711         int rc = 0;
1712         bool new_assoc = !!(staging_rxon->filter_flags & RXON_FILTER_ASSOC_MSK);
1713
1714         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1715                 return -EINVAL;
1716
1717         if (!iwl_legacy_is_alive(priv))
1718                 return -1;
1719
1720         /* always get timestamp with Rx frame */
1721         staging_rxon->flags |= RXON_FLG_TSF2HOST_MSK;
1722
1723         /* select antenna */
1724         staging_rxon->flags &=
1725             ~(RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_SEL_MSK);
1726         staging_rxon->flags |= iwl3945_get_antenna_flags(priv);
1727
1728         rc = iwl_legacy_check_rxon_cmd(priv, ctx);
1729         if (rc) {
1730                 IWL_ERR(priv, "Invalid RXON configuration.  Not committing.\n");
1731                 return -EINVAL;
1732         }
1733
1734         /* If we don't need to send a full RXON, we can use
1735          * iwl3945_rxon_assoc_cmd which is used to reconfigure filter
1736          * and other flags for the current radio configuration. */
1737         if (!iwl_legacy_full_rxon_required(priv,
1738                         &priv->contexts[IWL_RXON_CTX_BSS])) {
1739                 rc = iwl_legacy_send_rxon_assoc(priv,
1740                                          &priv->contexts[IWL_RXON_CTX_BSS]);
1741                 if (rc) {
1742                         IWL_ERR(priv, "Error setting RXON_ASSOC "
1743                                   "configuration (%d).\n", rc);
1744                         return rc;
1745                 }
1746
1747                 memcpy(active_rxon, staging_rxon, sizeof(*active_rxon));
1748                 /*
1749                  * We do not commit tx power settings while channel changing,
1750                  * do it now if tx power changed.
1751                  */
1752                 iwl_legacy_set_tx_power(priv, priv->tx_power_next, false);
1753                 return 0;
1754         }
1755
1756         /* If we are currently associated and the new config requires
1757          * an RXON_ASSOC and the new config wants the associated mask enabled,
1758          * we must clear the associated from the active configuration
1759          * before we apply the new config */
1760         if (iwl_legacy_is_associated(priv, IWL_RXON_CTX_BSS) && new_assoc) {
1761                 IWL_DEBUG_INFO(priv, "Toggling associated bit on current RXON\n");
1762                 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
1763
1764                 /*
1765                  * reserved4 and 5 could have been filled by the iwlcore code.
1766                  * Let's clear them before pushing to the 3945.
1767                  */
1768                 active_rxon->reserved4 = 0;
1769                 active_rxon->reserved5 = 0;
1770                 rc = iwl_legacy_send_cmd_pdu(priv, REPLY_RXON,
1771                                       sizeof(struct iwl3945_rxon_cmd),
1772                                       &priv->contexts[IWL_RXON_CTX_BSS].active);
1773
1774                 /* If the mask clearing failed then we set
1775                  * active_rxon back to what it was previously */
1776                 if (rc) {
1777                         active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
1778                         IWL_ERR(priv, "Error clearing ASSOC_MSK on current "
1779                                   "configuration (%d).\n", rc);
1780                         return rc;
1781                 }
1782                 iwl_legacy_clear_ucode_stations(priv,
1783                                          &priv->contexts[IWL_RXON_CTX_BSS]);
1784                 iwl_legacy_restore_stations(priv,
1785                                          &priv->contexts[IWL_RXON_CTX_BSS]);
1786         }
1787
1788         IWL_DEBUG_INFO(priv, "Sending RXON\n"
1789                        "* with%s RXON_FILTER_ASSOC_MSK\n"
1790                        "* channel = %d\n"
1791                        "* bssid = %pM\n",
1792                        (new_assoc ? "" : "out"),
1793                        le16_to_cpu(staging_rxon->channel),
1794                        staging_rxon->bssid_addr);
1795
1796         /*
1797          * reserved4 and 5 could have been filled by the iwlcore code.
1798          * Let's clear them before pushing to the 3945.
1799          */
1800         staging_rxon->reserved4 = 0;
1801         staging_rxon->reserved5 = 0;
1802
1803         iwl_legacy_set_rxon_hwcrypto(priv, ctx, !iwl3945_mod_params.sw_crypto);
1804
1805         /* Apply the new configuration */
1806         rc = iwl_legacy_send_cmd_pdu(priv, REPLY_RXON,
1807                               sizeof(struct iwl3945_rxon_cmd),
1808                               staging_rxon);
1809         if (rc) {
1810                 IWL_ERR(priv, "Error setting new configuration (%d).\n", rc);
1811                 return rc;
1812         }
1813
1814         memcpy(active_rxon, staging_rxon, sizeof(*active_rxon));
1815
1816         if (!new_assoc) {
1817                 iwl_legacy_clear_ucode_stations(priv,
1818                                          &priv->contexts[IWL_RXON_CTX_BSS]);
1819                 iwl_legacy_restore_stations(priv,
1820                                         &priv->contexts[IWL_RXON_CTX_BSS]);
1821         }
1822
1823         /* If we issue a new RXON command which required a tune then we must
1824          * send a new TXPOWER command or we won't be able to Tx any frames */
1825         rc = iwl_legacy_set_tx_power(priv, priv->tx_power_next, true);
1826         if (rc) {
1827                 IWL_ERR(priv, "Error setting Tx power (%d).\n", rc);
1828                 return rc;
1829         }
1830
1831         /* Init the hardware's rate fallback order based on the band */
1832         rc = iwl3945_init_hw_rate_table(priv);
1833         if (rc) {
1834                 IWL_ERR(priv, "Error setting HW rate table: %02X\n", rc);
1835                 return -EIO;
1836         }
1837
1838         return 0;
1839 }
1840
1841 /**
1842  * iwl3945_reg_txpower_periodic -  called when time to check our temperature.
1843  *
1844  * -- reset periodic timer
1845  * -- see if temp has changed enough to warrant re-calibration ... if so:
1846  *     -- correct coeffs for temp (can reset temp timer)
1847  *     -- save this temp as "last",
1848  *     -- send new set of gain settings to NIC
1849  * NOTE:  This should continue working, even when we're not associated,
1850  *   so we can keep our internal table of scan powers current. */
1851 void iwl3945_reg_txpower_periodic(struct iwl_priv *priv)
1852 {
1853         /* This will kick in the "brute force"
1854          * iwl3945_hw_reg_comp_txpower_temp() below */
1855         if (!iwl3945_is_temp_calib_needed(priv))
1856                 goto reschedule;
1857
1858         /* Set up a new set of temp-adjusted TxPowers, send to NIC.
1859          * This is based *only* on current temperature,
1860          * ignoring any previous power measurements */
1861         iwl3945_hw_reg_comp_txpower_temp(priv);
1862
1863  reschedule:
1864         queue_delayed_work(priv->workqueue,
1865                            &priv->_3945.thermal_periodic, REG_RECALIB_PERIOD * HZ);
1866 }
1867
1868 static void iwl3945_bg_reg_txpower_periodic(struct work_struct *work)
1869 {
1870         struct iwl_priv *priv = container_of(work, struct iwl_priv,
1871                                              _3945.thermal_periodic.work);
1872
1873         mutex_lock(&priv->mutex);
1874         if (test_bit(STATUS_EXIT_PENDING, &priv->status) || priv->txq == NULL)
1875                 goto out;
1876
1877         iwl3945_reg_txpower_periodic(priv);
1878 out:
1879         mutex_unlock(&priv->mutex);
1880 }
1881
1882 /**
1883  * iwl3945_hw_reg_get_ch_grp_index - find the channel-group index (0-4)
1884  *                                 for the channel.
1885  *
1886  * This function is used when initializing channel-info structs.
1887  *
1888  * NOTE: These channel groups do *NOT* match the bands above!
1889  *       These channel groups are based on factory-tested channels;
1890  *       on A-band, EEPROM's "group frequency" entries represent the top
1891  *       channel in each group 1-4.  Group 5 All B/G channels are in group 0.
1892  */
1893 static u16 iwl3945_hw_reg_get_ch_grp_index(struct iwl_priv *priv,
1894                                        const struct iwl_channel_info *ch_info)
1895 {
1896         struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
1897         struct iwl3945_eeprom_txpower_group *ch_grp = &eeprom->groups[0];
1898         u8 group;
1899         u16 group_index = 0;    /* based on factory calib frequencies */
1900         u8 grp_channel;
1901
1902         /* Find the group index for the channel ... don't use index 1(?) */
1903         if (iwl_legacy_is_channel_a_band(ch_info)) {
1904                 for (group = 1; group < 5; group++) {
1905                         grp_channel = ch_grp[group].group_channel;
1906                         if (ch_info->channel <= grp_channel) {
1907                                 group_index = group;
1908                                 break;
1909                         }
1910                 }
1911                 /* group 4 has a few channels *above* its factory cal freq */
1912                 if (group == 5)
1913                         group_index = 4;
1914         } else
1915                 group_index = 0;        /* 2.4 GHz, group 0 */
1916
1917         IWL_DEBUG_POWER(priv, "Chnl %d mapped to grp %d\n", ch_info->channel,
1918                         group_index);
1919         return group_index;
1920 }
1921
1922 /**
1923  * iwl3945_hw_reg_get_matched_power_index - Interpolate to get nominal index
1924  *
1925  * Interpolate to get nominal (i.e. at factory calibration temperature) index
1926  *   into radio/DSP gain settings table for requested power.
1927  */
1928 static int iwl3945_hw_reg_get_matched_power_index(struct iwl_priv *priv,
1929                                        s8 requested_power,
1930                                        s32 setting_index, s32 *new_index)
1931 {
1932         const struct iwl3945_eeprom_txpower_group *chnl_grp = NULL;
1933         struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
1934         s32 index0, index1;
1935         s32 power = 2 * requested_power;
1936         s32 i;
1937         const struct iwl3945_eeprom_txpower_sample *samples;
1938         s32 gains0, gains1;
1939         s32 res;
1940         s32 denominator;
1941
1942         chnl_grp = &eeprom->groups[setting_index];
1943         samples = chnl_grp->samples;
1944         for (i = 0; i < 5; i++) {
1945                 if (power == samples[i].power) {
1946                         *new_index = samples[i].gain_index;
1947                         return 0;
1948                 }
1949         }
1950
1951         if (power > samples[1].power) {
1952                 index0 = 0;
1953                 index1 = 1;
1954         } else if (power > samples[2].power) {
1955                 index0 = 1;
1956                 index1 = 2;
1957         } else if (power > samples[3].power) {
1958                 index0 = 2;
1959                 index1 = 3;
1960         } else {
1961                 index0 = 3;
1962                 index1 = 4;
1963         }
1964
1965         denominator = (s32) samples[index1].power - (s32) samples[index0].power;
1966         if (denominator == 0)
1967                 return -EINVAL;
1968         gains0 = (s32) samples[index0].gain_index * (1 << 19);
1969         gains1 = (s32) samples[index1].gain_index * (1 << 19);
1970         res = gains0 + (gains1 - gains0) *
1971             ((s32) power - (s32) samples[index0].power) / denominator +
1972             (1 << 18);
1973         *new_index = res >> 19;
1974         return 0;
1975 }
1976
1977 static void iwl3945_hw_reg_init_channel_groups(struct iwl_priv *priv)
1978 {
1979         u32 i;
1980         s32 rate_index;
1981         struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
1982         const struct iwl3945_eeprom_txpower_group *group;
1983
1984         IWL_DEBUG_POWER(priv, "Initializing factory calib info from EEPROM\n");
1985
1986         for (i = 0; i < IWL_NUM_TX_CALIB_GROUPS; i++) {
1987                 s8 *clip_pwrs;  /* table of power levels for each rate */
1988                 s8 satur_pwr;   /* saturation power for each chnl group */
1989                 group = &eeprom->groups[i];
1990
1991                 /* sanity check on factory saturation power value */
1992                 if (group->saturation_power < 40) {
1993                         IWL_WARN(priv, "Error: saturation power is %d, "
1994                                     "less than minimum expected 40\n",
1995                                     group->saturation_power);
1996                         return;
1997                 }
1998
1999                 /*
2000                  * Derive requested power levels for each rate, based on
2001                  *   hardware capabilities (saturation power for band).
2002                  * Basic value is 3dB down from saturation, with further
2003                  *   power reductions for highest 3 data rates.  These
2004                  *   backoffs provide headroom for high rate modulation
2005                  *   power peaks, without too much distortion (clipping).
2006                  */
2007                 /* we'll fill in this array with h/w max power levels */
2008                 clip_pwrs = (s8 *) priv->_3945.clip_groups[i].clip_powers;
2009
2010                 /* divide factory saturation power by 2 to find -3dB level */
2011                 satur_pwr = (s8) (group->saturation_power >> 1);
2012
2013                 /* fill in channel group's nominal powers for each rate */
2014                 for (rate_index = 0;
2015                      rate_index < IWL_RATE_COUNT_3945; rate_index++, clip_pwrs++) {
2016                         switch (rate_index) {
2017                         case IWL_RATE_36M_INDEX_TABLE:
2018                                 if (i == 0)     /* B/G */
2019                                         *clip_pwrs = satur_pwr;
2020                                 else    /* A */
2021                                         *clip_pwrs = satur_pwr - 5;
2022                                 break;
2023                         case IWL_RATE_48M_INDEX_TABLE:
2024                                 if (i == 0)
2025                                         *clip_pwrs = satur_pwr - 7;
2026                                 else
2027                                         *clip_pwrs = satur_pwr - 10;
2028                                 break;
2029                         case IWL_RATE_54M_INDEX_TABLE:
2030                                 if (i == 0)
2031                                         *clip_pwrs = satur_pwr - 9;
2032                                 else
2033                                         *clip_pwrs = satur_pwr - 12;
2034                                 break;
2035                         default:
2036                                 *clip_pwrs = satur_pwr;
2037                                 break;
2038                         }
2039                 }
2040         }
2041 }
2042
2043 /**
2044  * iwl3945_txpower_set_from_eeprom - Set channel power info based on EEPROM
2045  *
2046  * Second pass (during init) to set up priv->channel_info
2047  *
2048  * Set up Tx-power settings in our channel info database for each VALID
2049  * (for this geo/SKU) channel, at all Tx data rates, based on eeprom values
2050  * and current temperature.
2051  *
2052  * Since this is based on current temperature (at init time), these values may
2053  * not be valid for very long, but it gives us a starting/default point,
2054  * and allows us to active (i.e. using Tx) scan.
2055  *
2056  * This does *not* write values to NIC, just sets up our internal table.
2057  */
2058 int iwl3945_txpower_set_from_eeprom(struct iwl_priv *priv)
2059 {
2060         struct iwl_channel_info *ch_info = NULL;
2061         struct iwl3945_channel_power_info *pwr_info;
2062         struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
2063         int delta_index;
2064         u8 rate_index;
2065         u8 scan_tbl_index;
2066         const s8 *clip_pwrs;    /* array of power levels for each rate */
2067         u8 gain, dsp_atten;
2068         s8 power;
2069         u8 pwr_index, base_pwr_index, a_band;
2070         u8 i;
2071         int temperature;
2072
2073         /* save temperature reference,
2074          *   so we can determine next time to calibrate */
2075         temperature = iwl3945_hw_reg_txpower_get_temperature(priv);
2076         priv->last_temperature = temperature;
2077
2078         iwl3945_hw_reg_init_channel_groups(priv);
2079
2080         /* initialize Tx power info for each and every channel, 2.4 and 5.x */
2081         for (i = 0, ch_info = priv->channel_info; i < priv->channel_count;
2082              i++, ch_info++) {
2083                 a_band = iwl_legacy_is_channel_a_band(ch_info);
2084                 if (!iwl_legacy_is_channel_valid(ch_info))
2085                         continue;
2086
2087                 /* find this channel's channel group (*not* "band") index */
2088                 ch_info->group_index =
2089                         iwl3945_hw_reg_get_ch_grp_index(priv, ch_info);
2090
2091                 /* Get this chnlgrp's rate->max/clip-powers table */
2092                 clip_pwrs = priv->_3945.clip_groups[ch_info->group_index].clip_powers;
2093
2094                 /* calculate power index *adjustment* value according to
2095                  *  diff between current temperature and factory temperature */
2096                 delta_index = iwl3945_hw_reg_adjust_power_by_temp(temperature,
2097                                 eeprom->groups[ch_info->group_index].
2098                                 temperature);
2099
2100                 IWL_DEBUG_POWER(priv, "Delta index for channel %d: %d [%d]\n",
2101                                 ch_info->channel, delta_index, temperature +
2102                                 IWL_TEMP_CONVERT);
2103
2104                 /* set tx power value for all OFDM rates */
2105                 for (rate_index = 0; rate_index < IWL_OFDM_RATES;
2106                      rate_index++) {
2107                         s32 uninitialized_var(power_idx);
2108                         int rc;
2109
2110                         /* use channel group's clip-power table,
2111                          *   but don't exceed channel's max power */
2112                         s8 pwr = min(ch_info->max_power_avg,
2113                                      clip_pwrs[rate_index]);
2114
2115                         pwr_info = &ch_info->power_info[rate_index];
2116
2117                         /* get base (i.e. at factory-measured temperature)
2118                          *    power table index for this rate's power */
2119                         rc = iwl3945_hw_reg_get_matched_power_index(priv, pwr,
2120                                                          ch_info->group_index,
2121                                                          &power_idx);
2122                         if (rc) {
2123                                 IWL_ERR(priv, "Invalid power index\n");
2124                                 return rc;
2125                         }
2126                         pwr_info->base_power_index = (u8) power_idx;
2127
2128                         /* temperature compensate */
2129                         power_idx += delta_index;
2130
2131                         /* stay within range of gain table */
2132                         power_idx = iwl3945_hw_reg_fix_power_index(power_idx);
2133
2134                         /* fill 1 OFDM rate's iwl3945_channel_power_info struct */
2135                         pwr_info->requested_power = pwr;
2136                         pwr_info->power_table_index = (u8) power_idx;
2137                         pwr_info->tpc.tx_gain =
2138                             power_gain_table[a_band][power_idx].tx_gain;
2139                         pwr_info->tpc.dsp_atten =
2140                             power_gain_table[a_band][power_idx].dsp_atten;
2141                 }
2142
2143                 /* set tx power for CCK rates, based on OFDM 12 Mbit settings*/
2144                 pwr_info = &ch_info->power_info[IWL_RATE_12M_INDEX_TABLE];
2145                 power = pwr_info->requested_power +
2146                         IWL_CCK_FROM_OFDM_POWER_DIFF;
2147                 pwr_index = pwr_info->power_table_index +
2148                         IWL_CCK_FROM_OFDM_INDEX_DIFF;
2149                 base_pwr_index = pwr_info->base_power_index +
2150                         IWL_CCK_FROM_OFDM_INDEX_DIFF;
2151
2152                 /* stay within table range */
2153                 pwr_index = iwl3945_hw_reg_fix_power_index(pwr_index);
2154                 gain = power_gain_table[a_band][pwr_index].tx_gain;
2155                 dsp_atten = power_gain_table[a_band][pwr_index].dsp_atten;
2156
2157                 /* fill each CCK rate's iwl3945_channel_power_info structure
2158                  * NOTE:  All CCK-rate Txpwrs are the same for a given chnl!
2159                  * NOTE:  CCK rates start at end of OFDM rates! */
2160                 for (rate_index = 0;
2161                      rate_index < IWL_CCK_RATES; rate_index++) {
2162                         pwr_info = &ch_info->power_info[rate_index+IWL_OFDM_RATES];
2163                         pwr_info->requested_power = power;
2164                         pwr_info->power_table_index = pwr_index;
2165                         pwr_info->base_power_index = base_pwr_index;
2166                         pwr_info->tpc.tx_gain = gain;
2167                         pwr_info->tpc.dsp_atten = dsp_atten;
2168                 }
2169
2170                 /* set scan tx power, 1Mbit for CCK, 6Mbit for OFDM */
2171                 for (scan_tbl_index = 0;
2172                      scan_tbl_index < IWL_NUM_SCAN_RATES; scan_tbl_index++) {
2173                         s32 actual_index = (scan_tbl_index == 0) ?
2174                                 IWL_RATE_1M_INDEX_TABLE : IWL_RATE_6M_INDEX_TABLE;
2175                         iwl3945_hw_reg_set_scan_power(priv, scan_tbl_index,
2176                                 actual_index, clip_pwrs, ch_info, a_band);
2177                 }
2178         }
2179
2180         return 0;
2181 }
2182
2183 int iwl3945_hw_rxq_stop(struct iwl_priv *priv)
2184 {
2185         int rc;
2186
2187         iwl_legacy_write_direct32(priv, FH39_RCSR_CONFIG(0), 0);
2188         rc = iwl_poll_direct_bit(priv, FH39_RSSR_STATUS,
2189                         FH39_RSSR_CHNL0_RX_STATUS_CHNL_IDLE, 1000);
2190         if (rc < 0)
2191                 IWL_ERR(priv, "Can't stop Rx DMA.\n");
2192
2193         return 0;
2194 }
2195
2196 int iwl3945_hw_tx_queue_init(struct iwl_priv *priv, struct iwl_tx_queue *txq)
2197 {
2198         int txq_id = txq->q.id;
2199
2200         struct iwl3945_shared *shared_data = priv->_3945.shared_virt;
2201
2202         shared_data->tx_base_ptr[txq_id] = cpu_to_le32((u32)txq->q.dma_addr);
2203
2204         iwl_legacy_write_direct32(priv, FH39_CBCC_CTRL(txq_id), 0);
2205         iwl_legacy_write_direct32(priv, FH39_CBCC_BASE(txq_id), 0);
2206
2207         iwl_legacy_write_direct32(priv, FH39_TCSR_CONFIG(txq_id),
2208                 FH39_TCSR_TX_CONFIG_REG_VAL_CIRQ_RTC_NOINT |
2209                 FH39_TCSR_TX_CONFIG_REG_VAL_MSG_MODE_TXF |
2210                 FH39_TCSR_TX_CONFIG_REG_VAL_CIRQ_HOST_IFTFD |
2211                 FH39_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE_VAL |
2212                 FH39_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE);
2213
2214         /* fake read to flush all prev. writes */
2215         iwl_read32(priv, FH39_TSSR_CBB_BASE);
2216
2217         return 0;
2218 }
2219
2220 /*
2221  * HCMD utils
2222  */
2223 static u16 iwl3945_get_hcmd_size(u8 cmd_id, u16 len)
2224 {
2225         switch (cmd_id) {
2226         case REPLY_RXON:
2227                 return sizeof(struct iwl3945_rxon_cmd);
2228         case POWER_TABLE_CMD:
2229                 return sizeof(struct iwl3945_powertable_cmd);
2230         default:
2231                 return len;
2232         }
2233 }
2234
2235
2236 static u16 iwl3945_build_addsta_hcmd(const struct iwl_legacy_addsta_cmd *cmd,
2237                                                                 u8 *data)
2238 {
2239         struct iwl3945_addsta_cmd *addsta = (struct iwl3945_addsta_cmd *)data;
2240         addsta->mode = cmd->mode;
2241         memcpy(&addsta->sta, &cmd->sta, sizeof(struct sta_id_modify));
2242         memcpy(&addsta->key, &cmd->key, sizeof(struct iwl4965_keyinfo));
2243         addsta->station_flags = cmd->station_flags;
2244         addsta->station_flags_msk = cmd->station_flags_msk;
2245         addsta->tid_disable_tx = cpu_to_le16(0);
2246         addsta->rate_n_flags = cmd->rate_n_flags;
2247         addsta->add_immediate_ba_tid = cmd->add_immediate_ba_tid;
2248         addsta->remove_immediate_ba_tid = cmd->remove_immediate_ba_tid;
2249         addsta->add_immediate_ba_ssn = cmd->add_immediate_ba_ssn;
2250
2251         return (u16)sizeof(struct iwl3945_addsta_cmd);
2252 }
2253
2254 static int iwl3945_add_bssid_station(struct iwl_priv *priv,
2255                                      const u8 *addr, u8 *sta_id_r)
2256 {
2257         struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
2258         int ret;
2259         u8 sta_id;
2260         unsigned long flags;
2261
2262         if (sta_id_r)
2263                 *sta_id_r = IWL_INVALID_STATION;
2264
2265         ret = iwl_legacy_add_station_common(priv, ctx, addr, 0, NULL, &sta_id);
2266         if (ret) {
2267                 IWL_ERR(priv, "Unable to add station %pM\n", addr);
2268                 return ret;
2269         }
2270
2271         if (sta_id_r)
2272                 *sta_id_r = sta_id;
2273
2274         spin_lock_irqsave(&priv->sta_lock, flags);
2275         priv->stations[sta_id].used |= IWL_STA_LOCAL;
2276         spin_unlock_irqrestore(&priv->sta_lock, flags);
2277
2278         return 0;
2279 }
2280 static int iwl3945_manage_ibss_station(struct iwl_priv *priv,
2281                                        struct ieee80211_vif *vif, bool add)
2282 {
2283         struct iwl_vif_priv *vif_priv = (void *)vif->drv_priv;
2284         int ret;
2285
2286         if (add) {
2287                 ret = iwl3945_add_bssid_station(priv, vif->bss_conf.bssid,
2288                                                 &vif_priv->ibss_bssid_sta_id);
2289                 if (ret)
2290                         return ret;
2291
2292                 iwl3945_sync_sta(priv, vif_priv->ibss_bssid_sta_id,
2293                                  (priv->band == IEEE80211_BAND_5GHZ) ?
2294                                  IWL_RATE_6M_PLCP : IWL_RATE_1M_PLCP);
2295                 iwl3945_rate_scale_init(priv->hw, vif_priv->ibss_bssid_sta_id);
2296
2297                 return 0;
2298         }
2299
2300         return iwl_legacy_remove_station(priv, vif_priv->ibss_bssid_sta_id,
2301                                   vif->bss_conf.bssid);
2302 }
2303
2304 /**
2305  * iwl3945_init_hw_rate_table - Initialize the hardware rate fallback table
2306  */
2307 int iwl3945_init_hw_rate_table(struct iwl_priv *priv)
2308 {
2309         int rc, i, index, prev_index;
2310         struct iwl3945_rate_scaling_cmd rate_cmd = {
2311                 .reserved = {0, 0, 0},
2312         };
2313         struct iwl3945_rate_scaling_info *table = rate_cmd.table;
2314
2315         for (i = 0; i < ARRAY_SIZE(iwl3945_rates); i++) {
2316                 index = iwl3945_rates[i].table_rs_index;
2317
2318                 table[index].rate_n_flags =
2319                         iwl3945_hw_set_rate_n_flags(iwl3945_rates[i].plcp, 0);
2320                 table[index].try_cnt = priv->retry_rate;
2321                 prev_index = iwl3945_get_prev_ieee_rate(i);
2322                 table[index].next_rate_index =
2323                                 iwl3945_rates[prev_index].table_rs_index;
2324         }
2325
2326         switch (priv->band) {
2327         case IEEE80211_BAND_5GHZ:
2328                 IWL_DEBUG_RATE(priv, "Select A mode rate scale\n");
2329                 /* If one of the following CCK rates is used,
2330                  * have it fall back to the 6M OFDM rate */
2331                 for (i = IWL_RATE_1M_INDEX_TABLE;
2332                         i <= IWL_RATE_11M_INDEX_TABLE; i++)
2333                         table[i].next_rate_index =
2334                           iwl3945_rates[IWL_FIRST_OFDM_RATE].table_rs_index;
2335
2336                 /* Don't fall back to CCK rates */
2337                 table[IWL_RATE_12M_INDEX_TABLE].next_rate_index =
2338                                                 IWL_RATE_9M_INDEX_TABLE;
2339
2340                 /* Don't drop out of OFDM rates */
2341                 table[IWL_RATE_6M_INDEX_TABLE].next_rate_index =
2342                     iwl3945_rates[IWL_FIRST_OFDM_RATE].table_rs_index;
2343                 break;
2344
2345         case IEEE80211_BAND_2GHZ:
2346                 IWL_DEBUG_RATE(priv, "Select B/G mode rate scale\n");
2347                 /* If an OFDM rate is used, have it fall back to the
2348                  * 1M CCK rates */
2349
2350                 if (!(priv->_3945.sta_supp_rates & IWL_OFDM_RATES_MASK) &&
2351                     iwl_legacy_is_associated(priv, IWL_RXON_CTX_BSS)) {
2352
2353                         index = IWL_FIRST_CCK_RATE;
2354                         for (i = IWL_RATE_6M_INDEX_TABLE;
2355                              i <= IWL_RATE_54M_INDEX_TABLE; i++)
2356                                 table[i].next_rate_index =
2357                                         iwl3945_rates[index].table_rs_index;
2358
2359                         index = IWL_RATE_11M_INDEX_TABLE;
2360                         /* CCK shouldn't fall back to OFDM... */
2361                         table[index].next_rate_index = IWL_RATE_5M_INDEX_TABLE;
2362                 }
2363                 break;
2364
2365         default:
2366                 WARN_ON(1);
2367                 break;
2368         }
2369
2370         /* Update the rate scaling for control frame Tx */
2371         rate_cmd.table_id = 0;
2372         rc = iwl_legacy_send_cmd_pdu(priv, REPLY_RATE_SCALE, sizeof(rate_cmd),
2373                               &rate_cmd);
2374         if (rc)
2375                 return rc;
2376
2377         /* Update the rate scaling for data frame Tx */
2378         rate_cmd.table_id = 1;
2379         return iwl_legacy_send_cmd_pdu(priv, REPLY_RATE_SCALE, sizeof(rate_cmd),
2380                                 &rate_cmd);
2381 }
2382
2383 /* Called when initializing driver */
2384 int iwl3945_hw_set_hw_params(struct iwl_priv *priv)
2385 {
2386         memset((void *)&priv->hw_params, 0,
2387                sizeof(struct iwl_hw_params));
2388
2389         priv->_3945.shared_virt =
2390                 dma_alloc_coherent(&priv->pci_dev->dev,
2391                                    sizeof(struct iwl3945_shared),
2392                                    &priv->_3945.shared_phys, GFP_KERNEL);
2393         if (!priv->_3945.shared_virt) {
2394                 IWL_ERR(priv, "failed to allocate pci memory\n");
2395                 return -ENOMEM;
2396         }
2397
2398         /* Assign number of Usable TX queues */
2399         priv->hw_params.max_txq_num = priv->cfg->base_params->num_of_queues;
2400
2401         priv->hw_params.tfd_size = sizeof(struct iwl3945_tfd);
2402         priv->hw_params.rx_page_order = get_order(IWL_RX_BUF_SIZE_3K);
2403         priv->hw_params.max_rxq_size = RX_QUEUE_SIZE;
2404         priv->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG;
2405         priv->hw_params.max_stations = IWL3945_STATION_COUNT;
2406         priv->contexts[IWL_RXON_CTX_BSS].bcast_sta_id = IWL3945_BROADCAST_ID;
2407
2408         priv->sta_key_max_num = STA_KEY_MAX_NUM;
2409
2410         priv->hw_params.rx_wrt_ptr_reg = FH39_RSCSR_CHNL0_WPTR;
2411         priv->hw_params.max_beacon_itrvl = IWL39_MAX_UCODE_BEACON_INTERVAL;
2412         priv->hw_params.beacon_time_tsf_bits = IWL3945_EXT_BEACON_TIME_POS;
2413
2414         return 0;
2415 }
2416
2417 unsigned int iwl3945_hw_get_beacon_cmd(struct iwl_priv *priv,
2418                           struct iwl3945_frame *frame, u8 rate)
2419 {
2420         struct iwl3945_tx_beacon_cmd *tx_beacon_cmd;
2421         unsigned int frame_size;
2422
2423         tx_beacon_cmd = (struct iwl3945_tx_beacon_cmd *)&frame->u;
2424         memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
2425
2426         tx_beacon_cmd->tx.sta_id =
2427                 priv->contexts[IWL_RXON_CTX_BSS].bcast_sta_id;
2428         tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
2429
2430         frame_size = iwl3945_fill_beacon_frame(priv,
2431                                 tx_beacon_cmd->frame,
2432                                 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
2433
2434         BUG_ON(frame_size > MAX_MPDU_SIZE);
2435         tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
2436
2437         tx_beacon_cmd->tx.rate = rate;
2438         tx_beacon_cmd->tx.tx_flags = (TX_CMD_FLG_SEQ_CTL_MSK |
2439                                       TX_CMD_FLG_TSF_MSK);
2440
2441         /* supp_rates[0] == OFDM start at IWL_FIRST_OFDM_RATE*/
2442         tx_beacon_cmd->tx.supp_rates[0] =
2443                 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
2444
2445         tx_beacon_cmd->tx.supp_rates[1] =
2446                 (IWL_CCK_BASIC_RATES_MASK & 0xF);
2447
2448         return sizeof(struct iwl3945_tx_beacon_cmd) + frame_size;
2449 }
2450
2451 void iwl3945_hw_rx_handler_setup(struct iwl_priv *priv)
2452 {
2453         priv->rx_handlers[REPLY_TX] = iwl3945_rx_reply_tx;
2454         priv->rx_handlers[REPLY_3945_RX] = iwl3945_rx_reply_rx;
2455 }
2456
2457 void iwl3945_hw_setup_deferred_work(struct iwl_priv *priv)
2458 {
2459         INIT_DELAYED_WORK(&priv->_3945.thermal_periodic,
2460                           iwl3945_bg_reg_txpower_periodic);
2461 }
2462
2463 void iwl3945_hw_cancel_deferred_work(struct iwl_priv *priv)
2464 {
2465         cancel_delayed_work(&priv->_3945.thermal_periodic);
2466 }
2467
2468 /* check contents of special bootstrap uCode SRAM */
2469 static int iwl3945_verify_bsm(struct iwl_priv *priv)
2470  {
2471         __le32 *image = priv->ucode_boot.v_addr;
2472         u32 len = priv->ucode_boot.len;
2473         u32 reg;
2474         u32 val;
2475
2476         IWL_DEBUG_INFO(priv, "Begin verify bsm\n");
2477
2478         /* verify BSM SRAM contents */
2479         val = iwl_legacy_read_prph(priv, BSM_WR_DWCOUNT_REG);
2480         for (reg = BSM_SRAM_LOWER_BOUND;
2481              reg < BSM_SRAM_LOWER_BOUND + len;
2482              reg += sizeof(u32), image++) {
2483                 val = iwl_legacy_read_prph(priv, reg);
2484                 if (val != le32_to_cpu(*image)) {
2485                         IWL_ERR(priv, "BSM uCode verification failed at "
2486                                   "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
2487                                   BSM_SRAM_LOWER_BOUND,
2488                                   reg - BSM_SRAM_LOWER_BOUND, len,
2489                                   val, le32_to_cpu(*image));
2490                         return -EIO;
2491                 }
2492         }
2493
2494         IWL_DEBUG_INFO(priv, "BSM bootstrap uCode image OK\n");
2495
2496         return 0;
2497 }
2498
2499
2500 /******************************************************************************
2501  *
2502  * EEPROM related functions
2503  *
2504  ******************************************************************************/
2505
2506 /*
2507  * Clear the OWNER_MSK, to establish driver (instead of uCode running on
2508  * embedded controller) as EEPROM reader; each read is a series of pulses
2509  * to/from the EEPROM chip, not a single event, so even reads could conflict
2510  * if they weren't arbitrated by some ownership mechanism.  Here, the driver
2511  * simply claims ownership, which should be safe when this function is called
2512  * (i.e. before loading uCode!).
2513  */
2514 static int iwl3945_eeprom_acquire_semaphore(struct iwl_priv *priv)
2515 {
2516         _iwl_legacy_clear_bit(priv, CSR_EEPROM_GP, CSR_EEPROM_GP_IF_OWNER_MSK);
2517         return 0;
2518 }
2519
2520
2521 static void iwl3945_eeprom_release_semaphore(struct iwl_priv *priv)
2522 {
2523         return;
2524 }
2525
2526  /**
2527   * iwl3945_load_bsm - Load bootstrap instructions
2528   *
2529   * BSM operation:
2530   *
2531   * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
2532   * in special SRAM that does not power down during RFKILL.  When powering back
2533   * up after power-saving sleeps (or during initial uCode load), the BSM loads
2534   * the bootstrap program into the on-board processor, and starts it.
2535   *
2536   * The bootstrap program loads (via DMA) instructions and data for a new
2537   * program from host DRAM locations indicated by the host driver in the
2538   * BSM_DRAM_* registers.  Once the new program is loaded, it starts
2539   * automatically.
2540   *
2541   * When initializing the NIC, the host driver points the BSM to the
2542   * "initialize" uCode image.  This uCode sets up some internal data, then
2543   * notifies host via "initialize alive" that it is complete.
2544   *
2545   * The host then replaces the BSM_DRAM_* pointer values to point to the
2546   * normal runtime uCode instructions and a backup uCode data cache buffer
2547   * (filled initially with starting data values for the on-board processor),
2548   * then triggers the "initialize" uCode to load and launch the runtime uCode,
2549   * which begins normal operation.
2550   *
2551   * When doing a power-save shutdown, runtime uCode saves data SRAM into
2552   * the backup data cache in DRAM before SRAM is powered down.
2553   *
2554   * When powering back up, the BSM loads the bootstrap program.  This reloads
2555   * the runtime uCode instructions and the backup data cache into SRAM,
2556   * and re-launches the runtime uCode from where it left off.
2557   */
2558 static int iwl3945_load_bsm(struct iwl_priv *priv)
2559 {
2560         __le32 *image = priv->ucode_boot.v_addr;
2561         u32 len = priv->ucode_boot.len;
2562         dma_addr_t pinst;
2563         dma_addr_t pdata;
2564         u32 inst_len;
2565         u32 data_len;
2566         int rc;
2567         int i;
2568         u32 done;
2569         u32 reg_offset;
2570
2571         IWL_DEBUG_INFO(priv, "Begin load bsm\n");
2572
2573         /* make sure bootstrap program is no larger than BSM's SRAM size */
2574         if (len > IWL39_MAX_BSM_SIZE)
2575                 return -EINVAL;
2576
2577         /* Tell bootstrap uCode where to find the "Initialize" uCode
2578         *   in host DRAM ... host DRAM physical address bits 31:0 for 3945.
2579         * NOTE:  iwl3945_initialize_alive_start() will replace these values,
2580         *        after the "initialize" uCode has run, to point to
2581         *        runtime/protocol instructions and backup data cache. */
2582         pinst = priv->ucode_init.p_addr;
2583         pdata = priv->ucode_init_data.p_addr;
2584         inst_len = priv->ucode_init.len;
2585         data_len = priv->ucode_init_data.len;
2586
2587         iwl_legacy_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
2588         iwl_legacy_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
2589         iwl_legacy_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
2590         iwl_legacy_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
2591
2592         /* Fill BSM memory with bootstrap instructions */
2593         for (reg_offset = BSM_SRAM_LOWER_BOUND;
2594              reg_offset < BSM_SRAM_LOWER_BOUND + len;
2595              reg_offset += sizeof(u32), image++)
2596                 _iwl_legacy_write_prph(priv, reg_offset,
2597                                           le32_to_cpu(*image));
2598
2599         rc = iwl3945_verify_bsm(priv);
2600         if (rc)
2601                 return rc;
2602
2603         /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
2604         iwl_legacy_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
2605         iwl_legacy_write_prph(priv, BSM_WR_MEM_DST_REG,
2606                                  IWL39_RTC_INST_LOWER_BOUND);
2607         iwl_legacy_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
2608
2609         /* Load bootstrap code into instruction SRAM now,
2610          *   to prepare to load "initialize" uCode */
2611         iwl_legacy_write_prph(priv, BSM_WR_CTRL_REG,
2612                 BSM_WR_CTRL_REG_BIT_START);
2613
2614         /* Wait for load of bootstrap uCode to finish */
2615         for (i = 0; i < 100; i++) {
2616                 done = iwl_legacy_read_prph(priv, BSM_WR_CTRL_REG);
2617                 if (!(done & BSM_WR_CTRL_REG_BIT_START))
2618                         break;
2619                 udelay(10);
2620         }
2621         if (i < 100)
2622                 IWL_DEBUG_INFO(priv, "BSM write complete, poll %d iterations\n", i);
2623         else {
2624                 IWL_ERR(priv, "BSM write did not complete!\n");
2625                 return -EIO;
2626         }
2627
2628         /* Enable future boot loads whenever power management unit triggers it
2629          *   (e.g. when powering back up after power-save shutdown) */
2630         iwl_legacy_write_prph(priv, BSM_WR_CTRL_REG,
2631                 BSM_WR_CTRL_REG_BIT_START_EN);
2632
2633         return 0;
2634 }
2635
2636 static struct iwl_hcmd_ops iwl3945_hcmd = {
2637         .rxon_assoc = iwl3945_send_rxon_assoc,
2638         .commit_rxon = iwl3945_commit_rxon,
2639 };
2640
2641 static struct iwl_lib_ops iwl3945_lib = {
2642         .txq_attach_buf_to_tfd = iwl3945_hw_txq_attach_buf_to_tfd,
2643         .txq_free_tfd = iwl3945_hw_txq_free_tfd,
2644         .txq_init = iwl3945_hw_tx_queue_init,
2645         .load_ucode = iwl3945_load_bsm,
2646         .dump_nic_error_log = iwl3945_dump_nic_error_log,
2647         .apm_ops = {
2648                 .init = iwl3945_apm_init,
2649                 .config = iwl3945_nic_config,
2650         },
2651         .eeprom_ops = {
2652                 .regulatory_bands = {
2653                         EEPROM_REGULATORY_BAND_1_CHANNELS,
2654                         EEPROM_REGULATORY_BAND_2_CHANNELS,
2655                         EEPROM_REGULATORY_BAND_3_CHANNELS,
2656                         EEPROM_REGULATORY_BAND_4_CHANNELS,
2657                         EEPROM_REGULATORY_BAND_5_CHANNELS,
2658                         EEPROM_REGULATORY_BAND_NO_HT40,
2659                         EEPROM_REGULATORY_BAND_NO_HT40,
2660                 },
2661                 .acquire_semaphore = iwl3945_eeprom_acquire_semaphore,
2662                 .release_semaphore = iwl3945_eeprom_release_semaphore,
2663         },
2664         .send_tx_power  = iwl3945_send_tx_power,
2665         .is_valid_rtc_data_addr = iwl3945_hw_valid_rtc_data_addr,
2666
2667         .debugfs_ops = {
2668                 .rx_stats_read = iwl3945_ucode_rx_stats_read,
2669                 .tx_stats_read = iwl3945_ucode_tx_stats_read,
2670                 .general_stats_read = iwl3945_ucode_general_stats_read,
2671         },
2672 };
2673
2674 static const struct iwl_legacy_ops iwl3945_legacy_ops = {
2675         .post_associate = iwl3945_post_associate,
2676         .config_ap = iwl3945_config_ap,
2677         .manage_ibss_station = iwl3945_manage_ibss_station,
2678 };
2679
2680 static struct iwl_hcmd_utils_ops iwl3945_hcmd_utils = {
2681         .get_hcmd_size = iwl3945_get_hcmd_size,
2682         .build_addsta_hcmd = iwl3945_build_addsta_hcmd,
2683         .request_scan = iwl3945_request_scan,
2684         .post_scan = iwl3945_post_scan,
2685 };
2686
2687 static const struct iwl_ops iwl3945_ops = {
2688         .lib = &iwl3945_lib,
2689         .hcmd = &iwl3945_hcmd,
2690         .utils = &iwl3945_hcmd_utils,
2691         .led = &iwl3945_led_ops,
2692         .legacy = &iwl3945_legacy_ops,
2693         .ieee80211_ops = &iwl3945_hw_ops,
2694 };
2695
2696 static struct iwl_base_params iwl3945_base_params = {
2697         .eeprom_size = IWL3945_EEPROM_IMG_SIZE,
2698         .num_of_queues = IWL39_NUM_QUEUES,
2699         .pll_cfg_val = CSR39_ANA_PLL_CFG_VAL,
2700         .set_l0s = false,
2701         .use_bsm = true,
2702         .led_compensation = 64,
2703         .wd_timeout = IWL_DEF_WD_TIMEOUT,
2704 };
2705
2706 static struct iwl_cfg iwl3945_bg_cfg = {
2707         .name = "3945BG",
2708         .fw_name_pre = IWL3945_FW_PRE,
2709         .ucode_api_max = IWL3945_UCODE_API_MAX,
2710         .ucode_api_min = IWL3945_UCODE_API_MIN,
2711         .sku = IWL_SKU_G,
2712         .eeprom_ver = EEPROM_3945_EEPROM_VERSION,
2713         .ops = &iwl3945_ops,
2714         .mod_params = &iwl3945_mod_params,
2715         .base_params = &iwl3945_base_params,
2716         .led_mode = IWL_LED_BLINK,
2717 };
2718
2719 static struct iwl_cfg iwl3945_abg_cfg = {
2720         .name = "3945ABG",
2721         .fw_name_pre = IWL3945_FW_PRE,
2722         .ucode_api_max = IWL3945_UCODE_API_MAX,
2723         .ucode_api_min = IWL3945_UCODE_API_MIN,
2724         .sku = IWL_SKU_A|IWL_SKU_G,
2725         .eeprom_ver = EEPROM_3945_EEPROM_VERSION,
2726         .ops = &iwl3945_ops,
2727         .mod_params = &iwl3945_mod_params,
2728         .base_params = &iwl3945_base_params,
2729         .led_mode = IWL_LED_BLINK,
2730 };
2731
2732 DEFINE_PCI_DEVICE_TABLE(iwl3945_hw_card_ids) = {
2733         {IWL_PCI_DEVICE(0x4222, 0x1005, iwl3945_bg_cfg)},
2734         {IWL_PCI_DEVICE(0x4222, 0x1034, iwl3945_bg_cfg)},
2735         {IWL_PCI_DEVICE(0x4222, 0x1044, iwl3945_bg_cfg)},
2736         {IWL_PCI_DEVICE(0x4227, 0x1014, iwl3945_bg_cfg)},
2737         {IWL_PCI_DEVICE(0x4222, PCI_ANY_ID, iwl3945_abg_cfg)},
2738         {IWL_PCI_DEVICE(0x4227, PCI_ANY_ID, iwl3945_abg_cfg)},
2739         {0}
2740 };
2741
2742 MODULE_DEVICE_TABLE(pci, iwl3945_hw_card_ids);