2 * Copyright (c) 2010 Broadcom Corporation
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
11 * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
13 * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
14 * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 #include <linux/types.h>
18 #include <linux/kernel.h>
19 #include <linux/kthread.h>
20 #include <linux/printk.h>
21 #include <linux/pci_ids.h>
22 #include <linux/netdevice.h>
23 #include <linux/interrupt.h>
24 #include <linux/sched.h>
25 #include <linux/mmc/sdio.h>
26 #include <linux/mmc/sdio_func.h>
27 #include <linux/mmc/card.h>
28 #include <linux/semaphore.h>
29 #include <linux/firmware.h>
30 #include <linux/module.h>
31 #include <linux/bcma/bcma.h>
32 #include <asm/unaligned.h>
34 #include <brcmu_wifi.h>
35 #include <brcmu_utils.h>
36 #include <brcm_hw_ids.h>
38 #include "sdio_host.h"
39 #include "sdio_chip.h"
41 #define DCMD_RESP_TIMEOUT 2000 /* In milli second */
45 #define BRCMF_TRAP_INFO_SIZE 80
47 #define CBUF_LEN (128)
50 __le32 buf; /* Can't be pointer on (64-bit) hosts */
53 char *_buf_compat; /* Redundant pointer for backward compat. */
58 * When there is no UART (e.g. Quickturn),
59 * the host should write a complete
60 * input line directly into cbuf and then write
61 * the length into vcons_in.
62 * This may also be used when there is a real UART
63 * (at risk of conflicting with
64 * the real UART). vcons_out is currently unused.
69 /* Output (logging) buffer
70 * Console output is written to a ring buffer log_buf at index log_idx.
71 * The host may read the output when it sees log_idx advance.
72 * Output will be lost if the output wraps around faster than the host
75 struct rte_log_le log_le;
77 /* Console input line buffer
78 * Characters are read one at a time into cbuf
79 * until <CR> is received, then
80 * the buffer is processed as a command line.
81 * Also used for virtual UART.
88 #include <chipcommon.h>
92 #include "dhd_proto.h"
95 #define TXQLEN 2048 /* bulk tx queue length */
96 #define TXHI (TXQLEN - 256) /* turn on flow control above TXHI */
97 #define TXLOW (TXHI - 256) /* turn off flow control below TXLOW */
100 #define TXRETRIES 2 /* # of retries for tx frames */
102 #define BRCMF_RXBOUND 50 /* Default for max rx frames in
105 #define BRCMF_TXBOUND 20 /* Default for max tx frames in
108 #define BRCMF_TXMINMAX 1 /* Max tx frames if rx still pending */
110 #define MEMBLOCK 2048 /* Block size used for downloading
112 #define MAX_DATA_BUF (32 * 1024) /* Must be large enough to hold
113 biggest possible glom */
115 #define BRCMF_FIRSTREAD (1 << 6)
118 /* SBSDIO_DEVICE_CTL */
120 /* 1: device will assert busy signal when receiving CMD53 */
121 #define SBSDIO_DEVCTL_SETBUSY 0x01
122 /* 1: assertion of sdio interrupt is synchronous to the sdio clock */
123 #define SBSDIO_DEVCTL_SPI_INTR_SYNC 0x02
124 /* 1: mask all interrupts to host except the chipActive (rev 8) */
125 #define SBSDIO_DEVCTL_CA_INT_ONLY 0x04
126 /* 1: isolate internal sdio signals, put external pads in tri-state; requires
127 * sdio bus power cycle to clear (rev 9) */
128 #define SBSDIO_DEVCTL_PADS_ISO 0x08
129 /* Force SD->SB reset mapping (rev 11) */
130 #define SBSDIO_DEVCTL_SB_RST_CTL 0x30
131 /* Determined by CoreControl bit */
132 #define SBSDIO_DEVCTL_RST_CORECTL 0x00
133 /* Force backplane reset */
134 #define SBSDIO_DEVCTL_RST_BPRESET 0x10
135 /* Force no backplane reset */
136 #define SBSDIO_DEVCTL_RST_NOBPRESET 0x20
138 /* direct(mapped) cis space */
140 /* MAPPED common CIS address */
141 #define SBSDIO_CIS_BASE_COMMON 0x1000
142 /* maximum bytes in one CIS */
143 #define SBSDIO_CIS_SIZE_LIMIT 0x200
144 /* cis offset addr is < 17 bits */
145 #define SBSDIO_CIS_OFT_ADDR_MASK 0x1FFFF
147 /* manfid tuple length, include tuple, link bytes */
148 #define SBSDIO_CIS_MANFID_TUPLE_LEN 6
151 #define I_SMB_SW0 (1 << 0) /* To SB Mail S/W interrupt 0 */
152 #define I_SMB_SW1 (1 << 1) /* To SB Mail S/W interrupt 1 */
153 #define I_SMB_SW2 (1 << 2) /* To SB Mail S/W interrupt 2 */
154 #define I_SMB_SW3 (1 << 3) /* To SB Mail S/W interrupt 3 */
155 #define I_SMB_SW_MASK 0x0000000f /* To SB Mail S/W interrupts mask */
156 #define I_SMB_SW_SHIFT 0 /* To SB Mail S/W interrupts shift */
157 #define I_HMB_SW0 (1 << 4) /* To Host Mail S/W interrupt 0 */
158 #define I_HMB_SW1 (1 << 5) /* To Host Mail S/W interrupt 1 */
159 #define I_HMB_SW2 (1 << 6) /* To Host Mail S/W interrupt 2 */
160 #define I_HMB_SW3 (1 << 7) /* To Host Mail S/W interrupt 3 */
161 #define I_HMB_SW_MASK 0x000000f0 /* To Host Mail S/W interrupts mask */
162 #define I_HMB_SW_SHIFT 4 /* To Host Mail S/W interrupts shift */
163 #define I_WR_OOSYNC (1 << 8) /* Write Frame Out Of Sync */
164 #define I_RD_OOSYNC (1 << 9) /* Read Frame Out Of Sync */
165 #define I_PC (1 << 10) /* descriptor error */
166 #define I_PD (1 << 11) /* data error */
167 #define I_DE (1 << 12) /* Descriptor protocol Error */
168 #define I_RU (1 << 13) /* Receive descriptor Underflow */
169 #define I_RO (1 << 14) /* Receive fifo Overflow */
170 #define I_XU (1 << 15) /* Transmit fifo Underflow */
171 #define I_RI (1 << 16) /* Receive Interrupt */
172 #define I_BUSPWR (1 << 17) /* SDIO Bus Power Change (rev 9) */
173 #define I_XMTDATA_AVAIL (1 << 23) /* bits in fifo */
174 #define I_XI (1 << 24) /* Transmit Interrupt */
175 #define I_RF_TERM (1 << 25) /* Read Frame Terminate */
176 #define I_WF_TERM (1 << 26) /* Write Frame Terminate */
177 #define I_PCMCIA_XU (1 << 27) /* PCMCIA Transmit FIFO Underflow */
178 #define I_SBINT (1 << 28) /* sbintstatus Interrupt */
179 #define I_CHIPACTIVE (1 << 29) /* chip from doze to active state */
180 #define I_SRESET (1 << 30) /* CCCR RES interrupt */
181 #define I_IOE2 (1U << 31) /* CCCR IOE2 Bit Changed */
182 #define I_ERRORS (I_PC | I_PD | I_DE | I_RU | I_RO | I_XU)
183 #define I_DMA (I_RI | I_XI | I_ERRORS)
186 #define CC_CISRDY (1 << 0) /* CIS Ready */
187 #define CC_BPRESEN (1 << 1) /* CCCR RES signal */
188 #define CC_F2RDY (1 << 2) /* set CCCR IOR2 bit */
189 #define CC_CLRPADSISO (1 << 3) /* clear SDIO pads isolation */
190 #define CC_XMTDATAAVAIL_MODE (1 << 4)
191 #define CC_XMTDATAAVAIL_CTRL (1 << 5)
194 #define SFC_RF_TERM (1 << 0) /* Read Frame Terminate */
195 #define SFC_WF_TERM (1 << 1) /* Write Frame Terminate */
196 #define SFC_CRC4WOOS (1 << 2) /* CRC error for write out of sync */
197 #define SFC_ABORTALL (1 << 3) /* Abort all in-progress frames */
200 #define SDPCM_FRAMETAG_LEN 4 /* 2 bytes len, 2 bytes check val */
202 /* Total length of frame header for dongle protocol */
203 #define SDPCM_HDRLEN (SDPCM_FRAMETAG_LEN + SDPCM_SWHEADER_LEN)
204 #define SDPCM_RESERVE (SDPCM_HDRLEN + BRCMF_SDALIGN)
207 * Software allocation of To SB Mailbox resources
210 /* tosbmailbox bits corresponding to intstatus bits */
211 #define SMB_NAK (1 << 0) /* Frame NAK */
212 #define SMB_INT_ACK (1 << 1) /* Host Interrupt ACK */
213 #define SMB_USE_OOB (1 << 2) /* Use OOB Wakeup */
214 #define SMB_DEV_INT (1 << 3) /* Miscellaneous Interrupt */
216 /* tosbmailboxdata */
217 #define SMB_DATA_VERSION_SHIFT 16 /* host protocol version */
220 * Software allocation of To Host Mailbox resources
224 #define I_HMB_FC_STATE I_HMB_SW0 /* Flow Control State */
225 #define I_HMB_FC_CHANGE I_HMB_SW1 /* Flow Control State Changed */
226 #define I_HMB_FRAME_IND I_HMB_SW2 /* Frame Indication */
227 #define I_HMB_HOST_INT I_HMB_SW3 /* Miscellaneous Interrupt */
229 /* tohostmailboxdata */
230 #define HMB_DATA_NAKHANDLED 1 /* retransmit NAK'd frame */
231 #define HMB_DATA_DEVREADY 2 /* talk to host after enable */
232 #define HMB_DATA_FC 4 /* per prio flowcontrol update flag */
233 #define HMB_DATA_FWREADY 8 /* fw ready for protocol activity */
235 #define HMB_DATA_FCDATA_MASK 0xff000000
236 #define HMB_DATA_FCDATA_SHIFT 24
238 #define HMB_DATA_VERSION_MASK 0x00ff0000
239 #define HMB_DATA_VERSION_SHIFT 16
242 * Software-defined protocol header
245 /* Current protocol version */
246 #define SDPCM_PROT_VERSION 4
248 /* SW frame header */
249 #define SDPCM_PACKET_SEQUENCE(p) (((u8 *)p)[0] & 0xff)
251 #define SDPCM_CHANNEL_MASK 0x00000f00
252 #define SDPCM_CHANNEL_SHIFT 8
253 #define SDPCM_PACKET_CHANNEL(p) (((u8 *)p)[1] & 0x0f)
255 #define SDPCM_NEXTLEN_OFFSET 2
257 /* Data Offset from SOF (HW Tag, SW Tag, Pad) */
258 #define SDPCM_DOFFSET_OFFSET 3 /* Data Offset */
259 #define SDPCM_DOFFSET_VALUE(p) (((u8 *)p)[SDPCM_DOFFSET_OFFSET] & 0xff)
260 #define SDPCM_DOFFSET_MASK 0xff000000
261 #define SDPCM_DOFFSET_SHIFT 24
262 #define SDPCM_FCMASK_OFFSET 4 /* Flow control */
263 #define SDPCM_FCMASK_VALUE(p) (((u8 *)p)[SDPCM_FCMASK_OFFSET] & 0xff)
264 #define SDPCM_WINDOW_OFFSET 5 /* Credit based fc */
265 #define SDPCM_WINDOW_VALUE(p) (((u8 *)p)[SDPCM_WINDOW_OFFSET] & 0xff)
267 #define SDPCM_SWHEADER_LEN 8 /* SW header is 64 bits */
269 /* logical channel numbers */
270 #define SDPCM_CONTROL_CHANNEL 0 /* Control channel Id */
271 #define SDPCM_EVENT_CHANNEL 1 /* Asyc Event Indication Channel Id */
272 #define SDPCM_DATA_CHANNEL 2 /* Data Xmit/Recv Channel Id */
273 #define SDPCM_GLOM_CHANNEL 3 /* For coalesced packets */
274 #define SDPCM_TEST_CHANNEL 15 /* Reserved for test/debug packets */
276 #define SDPCM_SEQUENCE_WRAP 256 /* wrap-around val for 8bit frame seq */
278 #define SDPCM_GLOMDESC(p) (((u8 *)p)[1] & 0x80)
281 * Shared structure between dongle and the host.
282 * The structure contains pointers to trap or assert information.
284 #define SDPCM_SHARED_VERSION 0x0002
285 #define SDPCM_SHARED_VERSION_MASK 0x00FF
286 #define SDPCM_SHARED_ASSERT_BUILT 0x0100
287 #define SDPCM_SHARED_ASSERT 0x0200
288 #define SDPCM_SHARED_TRAP 0x0400
290 /* Space for header read, limit for data packets */
291 #define MAX_HDR_READ (1 << 6)
292 #define MAX_RX_DATASZ 2048
294 /* Maximum milliseconds to wait for F2 to come up */
295 #define BRCMF_WAIT_F2RDY 3000
297 /* Bump up limit on waiting for HT to account for first startup;
298 * if the image is doing a CRC calculation before programming the PMU
299 * for HT availability, it could take a couple hundred ms more, so
300 * max out at a 1 second (1000000us).
302 #undef PMU_MAX_TRANSITION_DLY
303 #define PMU_MAX_TRANSITION_DLY 1000000
305 /* Value for ChipClockCSR during initial setup */
306 #define BRCMF_INIT_CLKCTL1 (SBSDIO_FORCE_HW_CLKREQ_OFF | \
307 SBSDIO_ALP_AVAIL_REQ)
309 /* Flags for SDH calls */
310 #define F2SYNC (SDIO_REQ_4BYTE | SDIO_REQ_FIXED)
312 #define BRCMFMAC_FW_NAME "brcm/brcmfmac.bin"
313 #define BRCMFMAC_NV_NAME "brcm/brcmfmac.txt"
314 MODULE_FIRMWARE(BRCMFMAC_FW_NAME);
315 MODULE_FIRMWARE(BRCMFMAC_NV_NAME);
318 * Conversion of 802.1D priority to precedence level
320 static uint prio2prec(u32 prio)
322 return (prio == PRIO_8021D_NONE || prio == PRIO_8021D_BE) ?
328 u32 corecontrol; /* 0x00, rev8 */
329 u32 corestatus; /* rev8 */
331 u32 biststatus; /* rev8 */
334 u16 pcmciamesportaladdr; /* 0x010, rev8 */
336 u16 pcmciamesportalmask; /* rev8 */
338 u16 pcmciawrframebc; /* rev8 */
340 u16 pcmciaunderflowtimer; /* rev8 */
344 u32 intstatus; /* 0x020, rev8 */
345 u32 hostintmask; /* rev8 */
346 u32 intmask; /* rev8 */
347 u32 sbintstatus; /* rev8 */
348 u32 sbintmask; /* rev8 */
349 u32 funcintmask; /* rev4 */
351 u32 tosbmailbox; /* 0x040, rev8 */
352 u32 tohostmailbox; /* rev8 */
353 u32 tosbmailboxdata; /* rev8 */
354 u32 tohostmailboxdata; /* rev8 */
356 /* synchronized access to registers in SDIO clock domain */
357 u32 sdioaccess; /* 0x050, rev8 */
360 /* PCMCIA frame control */
361 u8 pcmciaframectrl; /* 0x060, rev8 */
363 u8 pcmciawatermark; /* rev8 */
366 /* interrupt batching control */
367 u32 intrcvlazy; /* 0x100, rev8 */
371 u32 cmd52rd; /* 0x110, rev8 */
372 u32 cmd52wr; /* rev8 */
373 u32 cmd53rd; /* rev8 */
374 u32 cmd53wr; /* rev8 */
375 u32 abort; /* rev8 */
376 u32 datacrcerror; /* rev8 */
377 u32 rdoutofsync; /* rev8 */
378 u32 wroutofsync; /* rev8 */
379 u32 writebusy; /* rev8 */
380 u32 readwait; /* rev8 */
381 u32 readterm; /* rev8 */
382 u32 writeterm; /* rev8 */
384 u32 clockctlstatus; /* rev8 */
387 u32 PAD[128]; /* DMA engines */
389 /* SDIO/PCMCIA CIS region */
390 char cis[512]; /* 0x400-0x5ff, rev6 */
392 /* PCMCIA function control registers */
393 char pcmciafcr[256]; /* 0x600-6ff, rev6 */
396 /* PCMCIA backplane access */
397 u16 backplanecsr; /* 0x76E, rev6 */
398 u16 backplaneaddr0; /* rev6 */
399 u16 backplaneaddr1; /* rev6 */
400 u16 backplaneaddr2; /* rev6 */
401 u16 backplaneaddr3; /* rev6 */
402 u16 backplanedata0; /* rev6 */
403 u16 backplanedata1; /* rev6 */
404 u16 backplanedata2; /* rev6 */
405 u16 backplanedata3; /* rev6 */
408 /* sprom "size" & "blank" info */
409 u16 spromstatus; /* 0x7BE, rev2 */
416 /* Device console log buffer state */
417 struct brcmf_console {
418 uint count; /* Poll interval msec counter */
419 uint log_addr; /* Log struct address (fixed) */
420 struct rte_log_le log_le; /* Log struct (host copy) */
421 uint bufsize; /* Size of log buffer */
422 u8 *buf; /* Log buffer (host copy) */
423 uint last; /* Last buffer read index */
427 struct sdpcm_shared {
431 u32 assert_file_addr;
433 u32 console_addr; /* Address of struct rte_console */
438 struct sdpcm_shared_le {
441 __le32 assert_exp_addr;
442 __le32 assert_file_addr;
444 __le32 console_addr; /* Address of struct rte_console */
445 __le32 msgtrace_addr;
450 /* misc chip info needed by some of the routines */
451 /* Private data for SDIO bus interaction */
453 struct brcmf_pub *drvr;
455 struct brcmf_sdio_dev *sdiodev; /* sdio device handler */
456 struct chip_info *ci; /* Chip info struct */
457 char *vars; /* Variables (from CIS and/or other) */
458 uint varsz; /* Size of variables buffer */
460 u32 ramsize; /* Size of RAM in SOCRAM (bytes) */
462 u32 hostintmask; /* Copy of Host Interrupt Mask */
463 u32 intstatus; /* Intstatus bits (events) pending */
464 bool dpc_sched; /* Indicates DPC schedule (intrpt rcvd) */
465 bool fcstate; /* State of dongle flow-control */
467 uint blocksize; /* Block size of SDIO transfers */
468 uint roundup; /* Max roundup limit */
470 struct pktq txq; /* Queue length used for flow-control */
471 u8 flowcontrol; /* per prio flow control bitmask */
472 u8 tx_seq; /* Transmit sequence number (next) */
473 u8 tx_max; /* Maximum transmit sequence allowed */
475 u8 hdrbuf[MAX_HDR_READ + BRCMF_SDALIGN];
476 u8 *rxhdr; /* Header of current rx frame (in hdrbuf) */
477 u16 nextlen; /* Next Read Len from last header */
478 u8 rx_seq; /* Receive sequence number (expected) */
479 bool rxskip; /* Skip receive (awaiting NAK ACK) */
481 uint rxbound; /* Rx frames to read before resched */
482 uint txbound; /* Tx frames to send before resched */
485 struct sk_buff *glomd; /* Packet containing glomming descriptor */
486 struct sk_buff_head glom; /* Packet list for glommed superframe */
487 uint glomerr; /* Glom packet read errors */
489 u8 *rxbuf; /* Buffer for receiving control packets */
490 uint rxblen; /* Allocated length of rxbuf */
491 u8 *rxctl; /* Aligned pointer into rxbuf */
492 u8 *databuf; /* Buffer for receiving big glom packet */
493 u8 *dataptr; /* Aligned pointer into databuf */
494 uint rxlen; /* Length of valid data in buffer */
496 u8 sdpcm_ver; /* Bus protocol reported by dongle */
498 bool intr; /* Use interrupts */
499 bool poll; /* Use polling */
500 bool ipend; /* Device interrupt is pending */
501 uint intrcount; /* Count of device interrupt callbacks */
502 uint lastintrs; /* Count as of last watchdog timer */
503 uint spurious; /* Count of spurious interrupts */
504 uint pollrate; /* Ticks between device polls */
505 uint polltick; /* Tick counter */
506 uint pollcnt; /* Count of active polls */
509 uint console_interval;
510 struct brcmf_console console; /* Console output polling support */
511 uint console_addr; /* Console address from shared struct */
514 uint regfails; /* Count of R_REG failures */
516 uint clkstate; /* State of sd and backplane clock(s) */
517 bool activity; /* Activity flag for clock down */
518 s32 idletime; /* Control for activity timeout */
519 s32 idlecount; /* Activity timeout counter */
520 s32 idleclock; /* How to set bus driver when idle */
522 bool use_rxchain; /* If brcmf should use PKT chains */
523 bool sleeping; /* Is SDIO bus sleeping? */
524 bool rxflow_mode; /* Rx flow control mode */
525 bool rxflow; /* Is rx flow control on */
526 bool alp_only; /* Don't use HT clock (ALP only) */
527 /* Field to decide if rx of control frames happen in rxbuf or lb-pool */
530 /* Some additional counters */
531 uint tx_sderrs; /* Count of tx attempts with sd errors */
532 uint fcqueued; /* Tx packets that got queued */
533 uint rxrtx; /* Count of rtx requests (NAK to dongle) */
534 uint rx_toolong; /* Receive frames too long to receive */
535 uint rxc_errors; /* SDIO errors when reading control frames */
536 uint rx_hdrfail; /* SDIO errors on header reads */
537 uint rx_badhdr; /* Bad received headers (roosync?) */
538 uint rx_badseq; /* Mismatched rx sequence number */
539 uint fc_rcvd; /* Number of flow-control events received */
540 uint fc_xoff; /* Number which turned on flow-control */
541 uint fc_xon; /* Number which turned off flow-control */
542 uint rxglomfail; /* Failed deglom attempts */
543 uint rxglomframes; /* Number of glom frames (superframes) */
544 uint rxglompkts; /* Number of packets from glom frames */
545 uint f2rxhdrs; /* Number of header reads */
546 uint f2rxdata; /* Number of frame data reads */
547 uint f2txdata; /* Number of f2 frame writes */
548 uint f1regdata; /* Number of f1 register accesses */
552 bool ctrl_frame_stat;
555 wait_queue_head_t ctrl_wait;
556 wait_queue_head_t dcmd_resp_wait;
558 struct timer_list timer;
559 struct completion watchdog_wait;
560 struct task_struct *watchdog_tsk;
564 struct task_struct *dpc_tsk;
565 struct completion dpc_wait;
567 struct semaphore sdsem;
569 const struct firmware *firmware;
576 #define CLK_PENDING 2 /* Not used yet */
580 static int qcount[NUMPRIO];
581 static int tx_packets[NUMPRIO];
584 #define SDIO_DRIVE_STRENGTH 6 /* in milliamps */
586 #define RETRYCHAN(chan) ((chan) == SDPCM_EVENT_CHANNEL)
588 /* Retry count for register access failures */
589 static const uint retry_limit = 2;
591 /* Limit on rounding up frames */
592 static const uint max_roundup = 512;
596 static void pkt_align(struct sk_buff *p, int len, int align)
599 datalign = (unsigned long)(p->data);
600 datalign = roundup(datalign, (align)) - datalign;
602 skb_pull(p, datalign);
606 /* To check if there's window offered */
607 static bool data_ok(struct brcmf_sdio *bus)
609 return (u8)(bus->tx_max - bus->tx_seq) != 0 &&
610 ((u8)(bus->tx_max - bus->tx_seq) & 0x80) == 0;
614 * Reads a register in the SDIO hardware block. This block occupies a series of
615 * adresses on the 32 bit backplane bus.
618 r_sdreg32(struct brcmf_sdio *bus, u32 *regvar, u32 reg_offset, u32 *retryvar)
620 u8 idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV);
623 *regvar = brcmf_sdcard_reg_read(bus->sdiodev,
624 bus->ci->c_inf[idx].base + reg_offset,
626 } while (brcmf_sdcard_regfail(bus->sdiodev) &&
627 (++(*retryvar) <= retry_limit));
629 bus->regfails += (*retryvar-1);
630 if (*retryvar > retry_limit) {
631 brcmf_dbg(ERROR, "FAILED READ %Xh\n", reg_offset);
638 w_sdreg32(struct brcmf_sdio *bus, u32 regval, u32 reg_offset, u32 *retryvar)
640 u8 idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV);
643 brcmf_sdcard_reg_write(bus->sdiodev,
644 bus->ci->c_inf[idx].base + reg_offset,
645 sizeof(u32), regval);
646 } while (brcmf_sdcard_regfail(bus->sdiodev) &&
647 (++(*retryvar) <= retry_limit));
649 bus->regfails += (*retryvar-1);
650 if (*retryvar > retry_limit)
651 brcmf_dbg(ERROR, "FAILED REGISTER WRITE %Xh\n",
656 #define PKT_AVAILABLE() (intstatus & I_HMB_FRAME_IND)
658 #define HOSTINTMASK (I_HMB_SW_MASK | I_CHIPACTIVE)
660 /* Packet free applicable unconditionally for sdio and sdspi.
661 * Conditional if bufpool was present for gspi bus.
663 static void brcmf_sdbrcm_pktfree2(struct brcmf_sdio *bus, struct sk_buff *pkt)
666 brcmu_pkt_buf_free_skb(pkt);
669 /* Turn backplane clock on or off */
670 static int brcmf_sdbrcm_htclk(struct brcmf_sdio *bus, bool on, bool pendok)
673 u8 clkctl, clkreq, devctl;
674 unsigned long timeout;
676 brcmf_dbg(TRACE, "Enter\n");
681 /* Request HT Avail */
683 bus->alp_only ? SBSDIO_ALP_AVAIL_REQ : SBSDIO_HT_AVAIL_REQ;
685 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
686 SBSDIO_FUNC1_CHIPCLKCSR, clkreq, &err);
688 brcmf_dbg(ERROR, "HT Avail request error: %d\n", err);
692 /* Check current status */
693 clkctl = brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1,
694 SBSDIO_FUNC1_CHIPCLKCSR, &err);
696 brcmf_dbg(ERROR, "HT Avail read error: %d\n", err);
700 /* Go to pending and await interrupt if appropriate */
701 if (!SBSDIO_CLKAV(clkctl, bus->alp_only) && pendok) {
702 /* Allow only clock-available interrupt */
703 devctl = brcmf_sdcard_cfg_read(bus->sdiodev,
705 SBSDIO_DEVICE_CTL, &err);
707 brcmf_dbg(ERROR, "Devctl error setting CA: %d\n",
712 devctl |= SBSDIO_DEVCTL_CA_INT_ONLY;
713 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
714 SBSDIO_DEVICE_CTL, devctl, &err);
715 brcmf_dbg(INFO, "CLKCTL: set PENDING\n");
716 bus->clkstate = CLK_PENDING;
719 } else if (bus->clkstate == CLK_PENDING) {
720 /* Cancel CA-only interrupt filter */
722 brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1,
723 SBSDIO_DEVICE_CTL, &err);
724 devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
725 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
726 SBSDIO_DEVICE_CTL, devctl, &err);
729 /* Otherwise, wait here (polling) for HT Avail */
731 msecs_to_jiffies(PMU_MAX_TRANSITION_DLY/1000);
732 while (!SBSDIO_CLKAV(clkctl, bus->alp_only)) {
733 clkctl = brcmf_sdcard_cfg_read(bus->sdiodev,
735 SBSDIO_FUNC1_CHIPCLKCSR,
737 if (time_after(jiffies, timeout))
740 usleep_range(5000, 10000);
743 brcmf_dbg(ERROR, "HT Avail request error: %d\n", err);
746 if (!SBSDIO_CLKAV(clkctl, bus->alp_only)) {
747 brcmf_dbg(ERROR, "HT Avail timeout (%d): clkctl 0x%02x\n",
748 PMU_MAX_TRANSITION_DLY, clkctl);
752 /* Mark clock available */
753 bus->clkstate = CLK_AVAIL;
754 brcmf_dbg(INFO, "CLKCTL: turned ON\n");
757 if (bus->alp_only != true) {
758 if (SBSDIO_ALPONLY(clkctl))
759 brcmf_dbg(ERROR, "HT Clock should be on\n");
761 #endif /* defined (BCMDBG) */
763 bus->activity = true;
767 if (bus->clkstate == CLK_PENDING) {
768 /* Cancel CA-only interrupt filter */
769 devctl = brcmf_sdcard_cfg_read(bus->sdiodev,
771 SBSDIO_DEVICE_CTL, &err);
772 devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
773 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
774 SBSDIO_DEVICE_CTL, devctl, &err);
777 bus->clkstate = CLK_SDONLY;
778 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
779 SBSDIO_FUNC1_CHIPCLKCSR, clkreq, &err);
780 brcmf_dbg(INFO, "CLKCTL: turned OFF\n");
782 brcmf_dbg(ERROR, "Failed access turning clock off: %d\n",
790 /* Change idle/active SD state */
791 static int brcmf_sdbrcm_sdclk(struct brcmf_sdio *bus, bool on)
793 brcmf_dbg(TRACE, "Enter\n");
796 bus->clkstate = CLK_SDONLY;
798 bus->clkstate = CLK_NONE;
803 /* Transition SD and backplane clock readiness */
804 static int brcmf_sdbrcm_clkctl(struct brcmf_sdio *bus, uint target, bool pendok)
807 uint oldstate = bus->clkstate;
810 brcmf_dbg(TRACE, "Enter\n");
812 /* Early exit if we're already there */
813 if (bus->clkstate == target) {
814 if (target == CLK_AVAIL) {
815 brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS);
816 bus->activity = true;
823 /* Make sure SD clock is available */
824 if (bus->clkstate == CLK_NONE)
825 brcmf_sdbrcm_sdclk(bus, true);
826 /* Now request HT Avail on the backplane */
827 brcmf_sdbrcm_htclk(bus, true, pendok);
828 brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS);
829 bus->activity = true;
833 /* Remove HT request, or bring up SD clock */
834 if (bus->clkstate == CLK_NONE)
835 brcmf_sdbrcm_sdclk(bus, true);
836 else if (bus->clkstate == CLK_AVAIL)
837 brcmf_sdbrcm_htclk(bus, false, false);
839 brcmf_dbg(ERROR, "request for %d -> %d\n",
840 bus->clkstate, target);
841 brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS);
845 /* Make sure to remove HT request */
846 if (bus->clkstate == CLK_AVAIL)
847 brcmf_sdbrcm_htclk(bus, false, false);
848 /* Now remove the SD clock */
849 brcmf_sdbrcm_sdclk(bus, false);
850 brcmf_sdbrcm_wd_timer(bus, 0);
854 brcmf_dbg(INFO, "%d -> %d\n", oldstate, bus->clkstate);
860 static int brcmf_sdbrcm_bussleep(struct brcmf_sdio *bus, bool sleep)
864 brcmf_dbg(INFO, "request %s (currently %s)\n",
865 sleep ? "SLEEP" : "WAKE",
866 bus->sleeping ? "SLEEP" : "WAKE");
868 /* Done if we're already in the requested state */
869 if (sleep == bus->sleeping)
872 /* Going to sleep: set the alarm and turn off the lights... */
874 /* Don't sleep if something is pending */
875 if (bus->dpc_sched || bus->rxskip || pktq_len(&bus->txq))
878 /* Make sure the controller has the bus up */
879 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
881 /* Tell device to start using OOB wakeup */
882 w_sdreg32(bus, SMB_USE_OOB,
883 offsetof(struct sdpcmd_regs, tosbmailbox), &retries);
884 if (retries > retry_limit)
885 brcmf_dbg(ERROR, "CANNOT SIGNAL CHIP, WILL NOT WAKE UP!!\n");
887 /* Turn off our contribution to the HT clock request */
888 brcmf_sdbrcm_clkctl(bus, CLK_SDONLY, false);
890 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
891 SBSDIO_FUNC1_CHIPCLKCSR,
892 SBSDIO_FORCE_HW_CLKREQ_OFF, NULL);
894 /* Isolate the bus */
895 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
897 SBSDIO_DEVCTL_PADS_ISO, NULL);
900 bus->sleeping = true;
903 /* Waking up: bus power up is ok, set local state */
905 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
906 SBSDIO_FUNC1_CHIPCLKCSR, 0, NULL);
908 /* Make sure the controller has the bus up */
909 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
911 /* Send misc interrupt to indicate OOB not needed */
912 w_sdreg32(bus, 0, offsetof(struct sdpcmd_regs, tosbmailboxdata),
914 if (retries <= retry_limit)
915 w_sdreg32(bus, SMB_DEV_INT,
916 offsetof(struct sdpcmd_regs, tosbmailbox),
919 if (retries > retry_limit)
920 brcmf_dbg(ERROR, "CANNOT SIGNAL CHIP TO CLEAR OOB!!\n");
922 /* Make sure we have SD bus access */
923 brcmf_sdbrcm_clkctl(bus, CLK_SDONLY, false);
926 bus->sleeping = false;
932 static void bus_wake(struct brcmf_sdio *bus)
935 brcmf_sdbrcm_bussleep(bus, false);
938 static u32 brcmf_sdbrcm_hostmail(struct brcmf_sdio *bus)
945 brcmf_dbg(TRACE, "Enter\n");
947 /* Read mailbox data and ack that we did so */
948 r_sdreg32(bus, &hmb_data,
949 offsetof(struct sdpcmd_regs, tohostmailboxdata), &retries);
951 if (retries <= retry_limit)
952 w_sdreg32(bus, SMB_INT_ACK,
953 offsetof(struct sdpcmd_regs, tosbmailbox), &retries);
956 /* Dongle recomposed rx frames, accept them again */
957 if (hmb_data & HMB_DATA_NAKHANDLED) {
958 brcmf_dbg(INFO, "Dongle reports NAK handled, expect rtx of %d\n",
961 brcmf_dbg(ERROR, "unexpected NAKHANDLED!\n");
964 intstatus |= I_HMB_FRAME_IND;
968 * DEVREADY does not occur with gSPI.
970 if (hmb_data & (HMB_DATA_DEVREADY | HMB_DATA_FWREADY)) {
972 (hmb_data & HMB_DATA_VERSION_MASK) >>
973 HMB_DATA_VERSION_SHIFT;
974 if (bus->sdpcm_ver != SDPCM_PROT_VERSION)
975 brcmf_dbg(ERROR, "Version mismatch, dongle reports %d, "
977 bus->sdpcm_ver, SDPCM_PROT_VERSION);
979 brcmf_dbg(INFO, "Dongle ready, protocol version %d\n",
984 * Flow Control has been moved into the RX headers and this out of band
985 * method isn't used any more.
986 * remaining backward compatible with older dongles.
988 if (hmb_data & HMB_DATA_FC) {
989 fcbits = (hmb_data & HMB_DATA_FCDATA_MASK) >>
990 HMB_DATA_FCDATA_SHIFT;
992 if (fcbits & ~bus->flowcontrol)
995 if (bus->flowcontrol & ~fcbits)
999 bus->flowcontrol = fcbits;
1002 /* Shouldn't be any others */
1003 if (hmb_data & ~(HMB_DATA_DEVREADY |
1004 HMB_DATA_NAKHANDLED |
1007 HMB_DATA_FCDATA_MASK | HMB_DATA_VERSION_MASK))
1008 brcmf_dbg(ERROR, "Unknown mailbox data content: 0x%02x\n",
1014 static void brcmf_sdbrcm_rxfail(struct brcmf_sdio *bus, bool abort, bool rtx)
1021 brcmf_dbg(ERROR, "%sterminate frame%s\n",
1022 abort ? "abort command, " : "",
1023 rtx ? ", send NAK" : "");
1026 brcmf_sdcard_abort(bus->sdiodev, SDIO_FUNC_2);
1028 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
1029 SBSDIO_FUNC1_FRAMECTRL,
1033 /* Wait until the packet has been flushed (device/FIFO stable) */
1034 for (lastrbc = retries = 0xffff; retries > 0; retries--) {
1035 hi = brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1,
1036 SBSDIO_FUNC1_RFRAMEBCHI, NULL);
1037 lo = brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1,
1038 SBSDIO_FUNC1_RFRAMEBCLO, NULL);
1039 bus->f1regdata += 2;
1041 if ((hi == 0) && (lo == 0))
1044 if ((hi > (lastrbc >> 8)) && (lo > (lastrbc & 0x00ff))) {
1045 brcmf_dbg(ERROR, "count growing: last 0x%04x now 0x%04x\n",
1046 lastrbc, (hi << 8) + lo);
1048 lastrbc = (hi << 8) + lo;
1052 brcmf_dbg(ERROR, "count never zeroed: last 0x%04x\n", lastrbc);
1054 brcmf_dbg(INFO, "flush took %d iterations\n", 0xffff - retries);
1058 w_sdreg32(bus, SMB_NAK,
1059 offsetof(struct sdpcmd_regs, tosbmailbox), &retries);
1062 if (retries <= retry_limit)
1066 /* Clear partial in any case */
1069 /* If we can't reach the device, signal failure */
1070 if (err || brcmf_sdcard_regfail(bus->sdiodev))
1071 bus->drvr->bus_if->state = BRCMF_BUS_DOWN;
1074 /* copy a buffer into a pkt buffer chain */
1075 static uint brcmf_sdbrcm_glom_from_buf(struct brcmf_sdio *bus, uint len)
1084 skb_queue_walk(&bus->glom, p) {
1085 n = min_t(uint, p->len, len);
1086 memcpy(p->data, buf, n);
1097 /* return total length of buffer chain */
1098 static uint brcmf_sdbrcm_glom_len(struct brcmf_sdio *bus)
1104 skb_queue_walk(&bus->glom, p)
1109 static void brcmf_sdbrcm_free_glom(struct brcmf_sdio *bus)
1111 struct sk_buff *cur, *next;
1113 skb_queue_walk_safe(&bus->glom, cur, next) {
1114 skb_unlink(cur, &bus->glom);
1115 brcmu_pkt_buf_free_skb(cur);
1119 static u8 brcmf_sdbrcm_rxglom(struct brcmf_sdio *bus, u8 rxseq)
1125 struct sk_buff *pfirst, *pnext;
1128 u8 chan, seq, doff, sfdoff;
1132 bool usechain = bus->use_rxchain;
1134 /* If packets, issue read(s) and send up packet chain */
1135 /* Return sequence numbers consumed? */
1137 brcmf_dbg(TRACE, "start: glomd %p glom %p\n",
1138 bus->glomd, skb_peek(&bus->glom));
1140 /* If there's a descriptor, generate the packet chain */
1142 pfirst = pnext = NULL;
1143 dlen = (u16) (bus->glomd->len);
1144 dptr = bus->glomd->data;
1145 if (!dlen || (dlen & 1)) {
1146 brcmf_dbg(ERROR, "bad glomd len(%d), ignore descriptor\n",
1151 for (totlen = num = 0; dlen; num++) {
1152 /* Get (and move past) next length */
1153 sublen = get_unaligned_le16(dptr);
1154 dlen -= sizeof(u16);
1155 dptr += sizeof(u16);
1156 if ((sublen < SDPCM_HDRLEN) ||
1157 ((num == 0) && (sublen < (2 * SDPCM_HDRLEN)))) {
1158 brcmf_dbg(ERROR, "descriptor len %d bad: %d\n",
1163 if (sublen % BRCMF_SDALIGN) {
1164 brcmf_dbg(ERROR, "sublen %d not multiple of %d\n",
1165 sublen, BRCMF_SDALIGN);
1170 /* For last frame, adjust read len so total
1171 is a block multiple */
1174 (roundup(totlen, bus->blocksize) - totlen);
1175 totlen = roundup(totlen, bus->blocksize);
1178 /* Allocate/chain packet for next subframe */
1179 pnext = brcmu_pkt_buf_get_skb(sublen + BRCMF_SDALIGN);
1180 if (pnext == NULL) {
1181 brcmf_dbg(ERROR, "bcm_pkt_buf_get_skb failed, num %d len %d\n",
1185 skb_queue_tail(&bus->glom, pnext);
1187 /* Adhere to start alignment requirements */
1188 pkt_align(pnext, sublen, BRCMF_SDALIGN);
1191 /* If all allocations succeeded, save packet chain
1194 brcmf_dbg(GLOM, "allocated %d-byte packet chain for %d subframes\n",
1196 if (BRCMF_GLOM_ON() && bus->nextlen &&
1197 totlen != bus->nextlen) {
1198 brcmf_dbg(GLOM, "glomdesc mismatch: nextlen %d glomdesc %d rxseq %d\n",
1199 bus->nextlen, totlen, rxseq);
1201 pfirst = pnext = NULL;
1203 brcmf_sdbrcm_free_glom(bus);
1207 /* Done with descriptor packet */
1208 brcmu_pkt_buf_free_skb(bus->glomd);
1213 /* Ok -- either we just generated a packet chain,
1214 or had one from before */
1215 if (!skb_queue_empty(&bus->glom)) {
1216 if (BRCMF_GLOM_ON()) {
1217 brcmf_dbg(GLOM, "try superframe read, packet chain:\n");
1218 skb_queue_walk(&bus->glom, pnext) {
1219 brcmf_dbg(GLOM, " %p: %p len 0x%04x (%d)\n",
1220 pnext, (u8 *) (pnext->data),
1221 pnext->len, pnext->len);
1225 pfirst = skb_peek(&bus->glom);
1226 dlen = (u16) brcmf_sdbrcm_glom_len(bus);
1228 /* Do an SDIO read for the superframe. Configurable iovar to
1229 * read directly into the chained packet, or allocate a large
1230 * packet and and copy into the chain.
1233 errcode = brcmf_sdcard_recv_chain(bus->sdiodev,
1234 bus->sdiodev->sbwad,
1235 SDIO_FUNC_2, F2SYNC, &bus->glom);
1236 } else if (bus->dataptr) {
1237 errcode = brcmf_sdcard_recv_buf(bus->sdiodev,
1238 bus->sdiodev->sbwad,
1239 SDIO_FUNC_2, F2SYNC,
1240 bus->dataptr, dlen);
1241 sublen = (u16) brcmf_sdbrcm_glom_from_buf(bus, dlen);
1242 if (sublen != dlen) {
1243 brcmf_dbg(ERROR, "FAILED TO COPY, dlen %d sublen %d\n",
1249 brcmf_dbg(ERROR, "COULDN'T ALLOC %d-BYTE GLOM, FORCE FAILURE\n",
1255 /* On failure, kill the superframe, allow a couple retries */
1257 brcmf_dbg(ERROR, "glom read of %d bytes failed: %d\n",
1259 bus->drvr->rx_errors++;
1261 if (bus->glomerr++ < 3) {
1262 brcmf_sdbrcm_rxfail(bus, true, true);
1265 brcmf_sdbrcm_rxfail(bus, true, false);
1267 brcmf_sdbrcm_free_glom(bus);
1272 if (BRCMF_GLOM_ON()) {
1273 printk(KERN_DEBUG "SUPERFRAME:\n");
1274 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
1275 pfirst->data, min_t(int, pfirst->len, 48));
1279 /* Validate the superframe header */
1280 dptr = (u8 *) (pfirst->data);
1281 sublen = get_unaligned_le16(dptr);
1282 check = get_unaligned_le16(dptr + sizeof(u16));
1284 chan = SDPCM_PACKET_CHANNEL(&dptr[SDPCM_FRAMETAG_LEN]);
1285 seq = SDPCM_PACKET_SEQUENCE(&dptr[SDPCM_FRAMETAG_LEN]);
1286 bus->nextlen = dptr[SDPCM_FRAMETAG_LEN + SDPCM_NEXTLEN_OFFSET];
1287 if ((bus->nextlen << 4) > MAX_RX_DATASZ) {
1288 brcmf_dbg(INFO, "nextlen too large (%d) seq %d\n",
1292 doff = SDPCM_DOFFSET_VALUE(&dptr[SDPCM_FRAMETAG_LEN]);
1293 txmax = SDPCM_WINDOW_VALUE(&dptr[SDPCM_FRAMETAG_LEN]);
1296 if ((u16)~(sublen ^ check)) {
1297 brcmf_dbg(ERROR, "(superframe): HW hdr error: len/check 0x%04x/0x%04x\n",
1300 } else if (roundup(sublen, bus->blocksize) != dlen) {
1301 brcmf_dbg(ERROR, "(superframe): len 0x%04x, rounded 0x%04x, expect 0x%04x\n",
1302 sublen, roundup(sublen, bus->blocksize),
1305 } else if (SDPCM_PACKET_CHANNEL(&dptr[SDPCM_FRAMETAG_LEN]) !=
1306 SDPCM_GLOM_CHANNEL) {
1307 brcmf_dbg(ERROR, "(superframe): bad channel %d\n",
1308 SDPCM_PACKET_CHANNEL(
1309 &dptr[SDPCM_FRAMETAG_LEN]));
1311 } else if (SDPCM_GLOMDESC(&dptr[SDPCM_FRAMETAG_LEN])) {
1312 brcmf_dbg(ERROR, "(superframe): got 2nd descriptor?\n");
1314 } else if ((doff < SDPCM_HDRLEN) ||
1315 (doff > (pfirst->len - SDPCM_HDRLEN))) {
1316 brcmf_dbg(ERROR, "(superframe): Bad data offset %d: HW %d pkt %d min %d\n",
1317 doff, sublen, pfirst->len, SDPCM_HDRLEN);
1321 /* Check sequence number of superframe SW header */
1323 brcmf_dbg(INFO, "(superframe) rx_seq %d, expected %d\n",
1329 /* Check window for sanity */
1330 if ((u8) (txmax - bus->tx_seq) > 0x40) {
1331 brcmf_dbg(ERROR, "unlikely tx max %d with tx_seq %d\n",
1332 txmax, bus->tx_seq);
1333 txmax = bus->tx_seq + 2;
1335 bus->tx_max = txmax;
1337 /* Remove superframe header, remember offset */
1338 skb_pull(pfirst, doff);
1342 /* Validate all the subframe headers */
1343 skb_queue_walk(&bus->glom, pnext) {
1344 /* leave when invalid subframe is found */
1348 dptr = (u8 *) (pnext->data);
1349 dlen = (u16) (pnext->len);
1350 sublen = get_unaligned_le16(dptr);
1351 check = get_unaligned_le16(dptr + sizeof(u16));
1352 chan = SDPCM_PACKET_CHANNEL(&dptr[SDPCM_FRAMETAG_LEN]);
1353 doff = SDPCM_DOFFSET_VALUE(&dptr[SDPCM_FRAMETAG_LEN]);
1355 if (BRCMF_GLOM_ON()) {
1356 printk(KERN_DEBUG "subframe:\n");
1357 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
1362 if ((u16)~(sublen ^ check)) {
1363 brcmf_dbg(ERROR, "(subframe %d): HW hdr error: len/check 0x%04x/0x%04x\n",
1364 num, sublen, check);
1366 } else if ((sublen > dlen) || (sublen < SDPCM_HDRLEN)) {
1367 brcmf_dbg(ERROR, "(subframe %d): length mismatch: len 0x%04x, expect 0x%04x\n",
1370 } else if ((chan != SDPCM_DATA_CHANNEL) &&
1371 (chan != SDPCM_EVENT_CHANNEL)) {
1372 brcmf_dbg(ERROR, "(subframe %d): bad channel %d\n",
1375 } else if ((doff < SDPCM_HDRLEN) || (doff > sublen)) {
1376 brcmf_dbg(ERROR, "(subframe %d): Bad data offset %d: HW %d min %d\n",
1377 num, doff, sublen, SDPCM_HDRLEN);
1380 /* increase the subframe count */
1385 /* Terminate frame on error, request
1387 if (bus->glomerr++ < 3) {
1388 /* Restore superframe header space */
1389 skb_push(pfirst, sfdoff);
1390 brcmf_sdbrcm_rxfail(bus, true, true);
1393 brcmf_sdbrcm_rxfail(bus, true, false);
1395 brcmf_sdbrcm_free_glom(bus);
1401 /* Basic SD framing looks ok - process each packet (header) */
1403 skb_queue_walk_safe(&bus->glom, pfirst, pnext) {
1404 dptr = (u8 *) (pfirst->data);
1405 sublen = get_unaligned_le16(dptr);
1406 chan = SDPCM_PACKET_CHANNEL(&dptr[SDPCM_FRAMETAG_LEN]);
1407 seq = SDPCM_PACKET_SEQUENCE(&dptr[SDPCM_FRAMETAG_LEN]);
1408 doff = SDPCM_DOFFSET_VALUE(&dptr[SDPCM_FRAMETAG_LEN]);
1410 brcmf_dbg(GLOM, "Get subframe %d, %p(%p/%d), sublen %d chan %d seq %d\n",
1411 num, pfirst, pfirst->data,
1412 pfirst->len, sublen, chan, seq);
1414 /* precondition: chan == SDPCM_DATA_CHANNEL ||
1415 chan == SDPCM_EVENT_CHANNEL */
1418 brcmf_dbg(GLOM, "rx_seq %d, expected %d\n",
1426 if (BRCMF_BYTES_ON() && BRCMF_DATA_ON()) {
1427 printk(KERN_DEBUG "Rx Subframe Data:\n");
1428 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
1433 __skb_trim(pfirst, sublen);
1434 skb_pull(pfirst, doff);
1436 if (pfirst->len == 0) {
1437 skb_unlink(pfirst, &bus->glom);
1438 brcmu_pkt_buf_free_skb(pfirst);
1440 } else if (brcmf_proto_hdrpull(bus->drvr, &ifidx,
1442 brcmf_dbg(ERROR, "rx protocol error\n");
1443 bus->drvr->rx_errors++;
1444 skb_unlink(pfirst, &bus->glom);
1445 brcmu_pkt_buf_free_skb(pfirst);
1450 if (BRCMF_GLOM_ON()) {
1451 brcmf_dbg(GLOM, "subframe %d to stack, %p (%p/%d) nxt/lnk %p/%p\n",
1452 bus->glom.qlen, pfirst, pfirst->data,
1453 pfirst->len, pfirst->next,
1455 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
1457 min_t(int, pfirst->len, 32));
1461 /* sent any remaining packets up */
1462 if (bus->glom.qlen) {
1464 brcmf_rx_frame(bus->drvr, ifidx, &bus->glom);
1468 bus->rxglomframes++;
1469 bus->rxglompkts += bus->glom.qlen;
1474 static int brcmf_sdbrcm_dcmd_resp_wait(struct brcmf_sdio *bus, uint *condition,
1477 DECLARE_WAITQUEUE(wait, current);
1478 int timeout = msecs_to_jiffies(DCMD_RESP_TIMEOUT);
1480 /* Wait until control frame is available */
1481 add_wait_queue(&bus->dcmd_resp_wait, &wait);
1482 set_current_state(TASK_INTERRUPTIBLE);
1484 while (!(*condition) && (!signal_pending(current) && timeout))
1485 timeout = schedule_timeout(timeout);
1487 if (signal_pending(current))
1490 set_current_state(TASK_RUNNING);
1491 remove_wait_queue(&bus->dcmd_resp_wait, &wait);
1496 static int brcmf_sdbrcm_dcmd_resp_wake(struct brcmf_sdio *bus)
1498 if (waitqueue_active(&bus->dcmd_resp_wait))
1499 wake_up_interruptible(&bus->dcmd_resp_wait);
1504 brcmf_sdbrcm_read_control(struct brcmf_sdio *bus, u8 *hdr, uint len, uint doff)
1510 brcmf_dbg(TRACE, "Enter\n");
1512 /* Set rxctl for frame (w/optional alignment) */
1513 bus->rxctl = bus->rxbuf;
1514 bus->rxctl += BRCMF_FIRSTREAD;
1515 pad = ((unsigned long)bus->rxctl % BRCMF_SDALIGN);
1517 bus->rxctl += (BRCMF_SDALIGN - pad);
1518 bus->rxctl -= BRCMF_FIRSTREAD;
1520 /* Copy the already-read portion over */
1521 memcpy(bus->rxctl, hdr, BRCMF_FIRSTREAD);
1522 if (len <= BRCMF_FIRSTREAD)
1525 /* Raise rdlen to next SDIO block to avoid tail command */
1526 rdlen = len - BRCMF_FIRSTREAD;
1527 if (bus->roundup && bus->blocksize && (rdlen > bus->blocksize)) {
1528 pad = bus->blocksize - (rdlen % bus->blocksize);
1529 if ((pad <= bus->roundup) && (pad < bus->blocksize) &&
1530 ((len + pad) < bus->drvr->maxctl))
1532 } else if (rdlen % BRCMF_SDALIGN) {
1533 rdlen += BRCMF_SDALIGN - (rdlen % BRCMF_SDALIGN);
1536 /* Satisfy length-alignment requirements */
1537 if (rdlen & (ALIGNMENT - 1))
1538 rdlen = roundup(rdlen, ALIGNMENT);
1540 /* Drop if the read is too big or it exceeds our maximum */
1541 if ((rdlen + BRCMF_FIRSTREAD) > bus->drvr->maxctl) {
1542 brcmf_dbg(ERROR, "%d-byte control read exceeds %d-byte buffer\n",
1543 rdlen, bus->drvr->maxctl);
1544 bus->drvr->rx_errors++;
1545 brcmf_sdbrcm_rxfail(bus, false, false);
1549 if ((len - doff) > bus->drvr->maxctl) {
1550 brcmf_dbg(ERROR, "%d-byte ctl frame (%d-byte ctl data) exceeds %d-byte limit\n",
1551 len, len - doff, bus->drvr->maxctl);
1552 bus->drvr->rx_errors++;
1554 brcmf_sdbrcm_rxfail(bus, false, false);
1558 /* Read remainder of frame body into the rxctl buffer */
1559 sdret = brcmf_sdcard_recv_buf(bus->sdiodev,
1560 bus->sdiodev->sbwad,
1562 F2SYNC, (bus->rxctl + BRCMF_FIRSTREAD), rdlen);
1565 /* Control frame failures need retransmission */
1567 brcmf_dbg(ERROR, "read %d control bytes failed: %d\n",
1570 brcmf_sdbrcm_rxfail(bus, true, true);
1577 if (BRCMF_BYTES_ON() && BRCMF_CTL_ON()) {
1578 printk(KERN_DEBUG "RxCtrl:\n");
1579 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET, bus->rxctl, len);
1583 /* Point to valid data and indicate its length */
1585 bus->rxlen = len - doff;
1588 /* Awake any waiters */
1589 brcmf_sdbrcm_dcmd_resp_wake(bus);
1592 /* Pad read to blocksize for efficiency */
1593 static void brcmf_pad(struct brcmf_sdio *bus, u16 *pad, u16 *rdlen)
1595 if (bus->roundup && bus->blocksize && *rdlen > bus->blocksize) {
1596 *pad = bus->blocksize - (*rdlen % bus->blocksize);
1597 if (*pad <= bus->roundup && *pad < bus->blocksize &&
1598 *rdlen + *pad + BRCMF_FIRSTREAD < MAX_RX_DATASZ)
1600 } else if (*rdlen % BRCMF_SDALIGN) {
1601 *rdlen += BRCMF_SDALIGN - (*rdlen % BRCMF_SDALIGN);
1606 brcmf_alloc_pkt_and_read(struct brcmf_sdio *bus, u16 rdlen,
1607 struct sk_buff **pkt, u8 **rxbuf)
1609 int sdret; /* Return code from calls */
1611 *pkt = brcmu_pkt_buf_get_skb(rdlen + BRCMF_SDALIGN);
1615 pkt_align(*pkt, rdlen, BRCMF_SDALIGN);
1616 *rxbuf = (u8 *) ((*pkt)->data);
1617 /* Read the entire frame */
1618 sdret = brcmf_sdcard_recv_pkt(bus->sdiodev, bus->sdiodev->sbwad,
1619 SDIO_FUNC_2, F2SYNC, *pkt);
1623 brcmf_dbg(ERROR, "(nextlen): read %d bytes failed: %d\n",
1625 brcmu_pkt_buf_free_skb(*pkt);
1626 bus->drvr->rx_errors++;
1627 /* Force retry w/normal header read.
1628 * Don't attempt NAK for
1631 brcmf_sdbrcm_rxfail(bus, true, true);
1636 /* Checks the header */
1638 brcmf_check_rxbuf(struct brcmf_sdio *bus, struct sk_buff *pkt, u8 *rxbuf,
1639 u8 rxseq, u16 nextlen, u16 *len)
1642 bool len_consistent; /* Result of comparing readahead len and
1645 memcpy(bus->rxhdr, rxbuf, SDPCM_HDRLEN);
1647 /* Extract hardware header fields */
1648 *len = get_unaligned_le16(bus->rxhdr);
1649 check = get_unaligned_le16(bus->rxhdr + sizeof(u16));
1651 /* All zeros means readahead info was bad */
1652 if (!(*len | check)) {
1653 brcmf_dbg(INFO, "(nextlen): read zeros in HW header???\n");
1657 /* Validate check bytes */
1658 if ((u16)~(*len ^ check)) {
1659 brcmf_dbg(ERROR, "(nextlen): HW hdr error: nextlen/len/check 0x%04x/0x%04x/0x%04x\n",
1660 nextlen, *len, check);
1662 brcmf_sdbrcm_rxfail(bus, false, false);
1666 /* Validate frame length */
1667 if (*len < SDPCM_HDRLEN) {
1668 brcmf_dbg(ERROR, "(nextlen): HW hdr length invalid: %d\n",
1673 /* Check for consistency with readahead info */
1674 len_consistent = (nextlen != (roundup(*len, 16) >> 4));
1675 if (len_consistent) {
1676 /* Mismatch, force retry w/normal
1677 header (may be >4K) */
1678 brcmf_dbg(ERROR, "(nextlen): mismatch, nextlen %d len %d rnd %d; expected rxseq %d\n",
1679 nextlen, *len, roundup(*len, 16),
1681 brcmf_sdbrcm_rxfail(bus, true, true);
1688 brcmf_sdbrcm_pktfree2(bus, pkt);
1692 /* Return true if there may be more frames to read */
1694 brcmf_sdbrcm_readframes(struct brcmf_sdio *bus, uint maxframes, bool *finished)
1696 u16 len, check; /* Extracted hardware header fields */
1697 u8 chan, seq, doff; /* Extracted software header fields */
1698 u8 fcbits; /* Extracted fcbits from software header */
1700 struct sk_buff *pkt; /* Packet for event or data frames */
1701 u16 pad; /* Number of pad bytes to read */
1702 u16 rdlen; /* Total number of bytes to read */
1703 u8 rxseq; /* Next sequence number to expect */
1704 uint rxleft = 0; /* Remaining number of frames allowed */
1705 int sdret; /* Return code from calls */
1706 u8 txmax; /* Maximum tx sequence offered */
1709 uint rxcount = 0; /* Total frames read */
1711 brcmf_dbg(TRACE, "Enter\n");
1713 /* Not finished unless we encounter no more frames indication */
1716 for (rxseq = bus->rx_seq, rxleft = maxframes;
1717 !bus->rxskip && rxleft &&
1718 bus->drvr->bus_if->state != BRCMF_BUS_DOWN;
1719 rxseq++, rxleft--) {
1721 /* Handle glomming separately */
1722 if (bus->glomd || !skb_queue_empty(&bus->glom)) {
1724 brcmf_dbg(GLOM, "calling rxglom: glomd %p, glom %p\n",
1725 bus->glomd, skb_peek(&bus->glom));
1726 cnt = brcmf_sdbrcm_rxglom(bus, rxseq);
1727 brcmf_dbg(GLOM, "rxglom returned %d\n", cnt);
1729 rxleft = (rxleft > cnt) ? (rxleft - cnt) : 1;
1733 /* Try doing single read if we can */
1735 u16 nextlen = bus->nextlen;
1738 rdlen = len = nextlen << 4;
1739 brcmf_pad(bus, &pad, &rdlen);
1742 * After the frame is received we have to
1743 * distinguish whether it is data
1744 * or non-data frame.
1746 brcmf_alloc_pkt_and_read(bus, rdlen, &pkt, &rxbuf);
1748 /* Give up on data, request rtx of events */
1749 brcmf_dbg(ERROR, "(nextlen): brcmf_alloc_pkt_and_read failed: len %d rdlen %d expected rxseq %d\n",
1754 if (brcmf_check_rxbuf(bus, pkt, rxbuf, rxseq, nextlen,
1758 /* Extract software header fields */
1759 chan = SDPCM_PACKET_CHANNEL(
1760 &bus->rxhdr[SDPCM_FRAMETAG_LEN]);
1761 seq = SDPCM_PACKET_SEQUENCE(
1762 &bus->rxhdr[SDPCM_FRAMETAG_LEN]);
1763 doff = SDPCM_DOFFSET_VALUE(
1764 &bus->rxhdr[SDPCM_FRAMETAG_LEN]);
1765 txmax = SDPCM_WINDOW_VALUE(
1766 &bus->rxhdr[SDPCM_FRAMETAG_LEN]);
1769 bus->rxhdr[SDPCM_FRAMETAG_LEN +
1770 SDPCM_NEXTLEN_OFFSET];
1771 if ((bus->nextlen << 4) > MAX_RX_DATASZ) {
1772 brcmf_dbg(INFO, "(nextlen): got frame w/nextlen too large (%d), seq %d\n",
1777 bus->drvr->rx_readahead_cnt++;
1779 /* Handle Flow Control */
1780 fcbits = SDPCM_FCMASK_VALUE(
1781 &bus->rxhdr[SDPCM_FRAMETAG_LEN]);
1783 if (bus->flowcontrol != fcbits) {
1784 if (~bus->flowcontrol & fcbits)
1787 if (bus->flowcontrol & ~fcbits)
1791 bus->flowcontrol = fcbits;
1794 /* Check and update sequence number */
1796 brcmf_dbg(INFO, "(nextlen): rx_seq %d, expected %d\n",
1802 /* Check window for sanity */
1803 if ((u8) (txmax - bus->tx_seq) > 0x40) {
1804 brcmf_dbg(ERROR, "got unlikely tx max %d with tx_seq %d\n",
1805 txmax, bus->tx_seq);
1806 txmax = bus->tx_seq + 2;
1808 bus->tx_max = txmax;
1811 if (BRCMF_BYTES_ON() && BRCMF_DATA_ON()) {
1812 printk(KERN_DEBUG "Rx Data:\n");
1813 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
1815 } else if (BRCMF_HDRS_ON()) {
1816 printk(KERN_DEBUG "RxHdr:\n");
1817 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
1818 bus->rxhdr, SDPCM_HDRLEN);
1822 if (chan == SDPCM_CONTROL_CHANNEL) {
1823 brcmf_dbg(ERROR, "(nextlen): readahead on control packet %d?\n",
1825 /* Force retry w/normal header read */
1827 brcmf_sdbrcm_rxfail(bus, false, true);
1828 brcmf_sdbrcm_pktfree2(bus, pkt);
1832 /* Validate data offset */
1833 if ((doff < SDPCM_HDRLEN) || (doff > len)) {
1834 brcmf_dbg(ERROR, "(nextlen): bad data offset %d: HW len %d min %d\n",
1835 doff, len, SDPCM_HDRLEN);
1836 brcmf_sdbrcm_rxfail(bus, false, false);
1837 brcmf_sdbrcm_pktfree2(bus, pkt);
1841 /* All done with this one -- now deliver the packet */
1845 /* Read frame header (hardware and software) */
1846 sdret = brcmf_sdcard_recv_buf(bus->sdiodev, bus->sdiodev->sbwad,
1847 SDIO_FUNC_2, F2SYNC, bus->rxhdr,
1852 brcmf_dbg(ERROR, "RXHEADER FAILED: %d\n", sdret);
1854 brcmf_sdbrcm_rxfail(bus, true, true);
1858 if (BRCMF_BYTES_ON() || BRCMF_HDRS_ON()) {
1859 printk(KERN_DEBUG "RxHdr:\n");
1860 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
1861 bus->rxhdr, SDPCM_HDRLEN);
1865 /* Extract hardware header fields */
1866 len = get_unaligned_le16(bus->rxhdr);
1867 check = get_unaligned_le16(bus->rxhdr + sizeof(u16));
1869 /* All zeros means no more frames */
1870 if (!(len | check)) {
1875 /* Validate check bytes */
1876 if ((u16) ~(len ^ check)) {
1877 brcmf_dbg(ERROR, "HW hdr err: len/check 0x%04x/0x%04x\n",
1880 brcmf_sdbrcm_rxfail(bus, false, false);
1884 /* Validate frame length */
1885 if (len < SDPCM_HDRLEN) {
1886 brcmf_dbg(ERROR, "HW hdr length invalid: %d\n", len);
1890 /* Extract software header fields */
1891 chan = SDPCM_PACKET_CHANNEL(&bus->rxhdr[SDPCM_FRAMETAG_LEN]);
1892 seq = SDPCM_PACKET_SEQUENCE(&bus->rxhdr[SDPCM_FRAMETAG_LEN]);
1893 doff = SDPCM_DOFFSET_VALUE(&bus->rxhdr[SDPCM_FRAMETAG_LEN]);
1894 txmax = SDPCM_WINDOW_VALUE(&bus->rxhdr[SDPCM_FRAMETAG_LEN]);
1896 /* Validate data offset */
1897 if ((doff < SDPCM_HDRLEN) || (doff > len)) {
1898 brcmf_dbg(ERROR, "Bad data offset %d: HW len %d, min %d seq %d\n",
1899 doff, len, SDPCM_HDRLEN, seq);
1901 brcmf_sdbrcm_rxfail(bus, false, false);
1905 /* Save the readahead length if there is one */
1907 bus->rxhdr[SDPCM_FRAMETAG_LEN + SDPCM_NEXTLEN_OFFSET];
1908 if ((bus->nextlen << 4) > MAX_RX_DATASZ) {
1909 brcmf_dbg(INFO, "(nextlen): got frame w/nextlen too large (%d), seq %d\n",
1914 /* Handle Flow Control */
1915 fcbits = SDPCM_FCMASK_VALUE(&bus->rxhdr[SDPCM_FRAMETAG_LEN]);
1917 if (bus->flowcontrol != fcbits) {
1918 if (~bus->flowcontrol & fcbits)
1921 if (bus->flowcontrol & ~fcbits)
1925 bus->flowcontrol = fcbits;
1928 /* Check and update sequence number */
1930 brcmf_dbg(INFO, "rx_seq %d, expected %d\n", seq, rxseq);
1935 /* Check window for sanity */
1936 if ((u8) (txmax - bus->tx_seq) > 0x40) {
1937 brcmf_dbg(ERROR, "unlikely tx max %d with tx_seq %d\n",
1938 txmax, bus->tx_seq);
1939 txmax = bus->tx_seq + 2;
1941 bus->tx_max = txmax;
1943 /* Call a separate function for control frames */
1944 if (chan == SDPCM_CONTROL_CHANNEL) {
1945 brcmf_sdbrcm_read_control(bus, bus->rxhdr, len, doff);
1949 /* precondition: chan is either SDPCM_DATA_CHANNEL,
1950 SDPCM_EVENT_CHANNEL, SDPCM_TEST_CHANNEL or
1951 SDPCM_GLOM_CHANNEL */
1953 /* Length to read */
1954 rdlen = (len > BRCMF_FIRSTREAD) ? (len - BRCMF_FIRSTREAD) : 0;
1956 /* May pad read to blocksize for efficiency */
1957 if (bus->roundup && bus->blocksize &&
1958 (rdlen > bus->blocksize)) {
1959 pad = bus->blocksize - (rdlen % bus->blocksize);
1960 if ((pad <= bus->roundup) && (pad < bus->blocksize) &&
1961 ((rdlen + pad + BRCMF_FIRSTREAD) < MAX_RX_DATASZ))
1963 } else if (rdlen % BRCMF_SDALIGN) {
1964 rdlen += BRCMF_SDALIGN - (rdlen % BRCMF_SDALIGN);
1967 /* Satisfy length-alignment requirements */
1968 if (rdlen & (ALIGNMENT - 1))
1969 rdlen = roundup(rdlen, ALIGNMENT);
1971 if ((rdlen + BRCMF_FIRSTREAD) > MAX_RX_DATASZ) {
1972 /* Too long -- skip this frame */
1973 brcmf_dbg(ERROR, "too long: len %d rdlen %d\n",
1975 bus->drvr->rx_errors++;
1977 brcmf_sdbrcm_rxfail(bus, false, false);
1981 pkt = brcmu_pkt_buf_get_skb(rdlen +
1982 BRCMF_FIRSTREAD + BRCMF_SDALIGN);
1984 /* Give up on data, request rtx of events */
1985 brcmf_dbg(ERROR, "brcmu_pkt_buf_get_skb failed: rdlen %d chan %d\n",
1987 bus->drvr->rx_dropped++;
1988 brcmf_sdbrcm_rxfail(bus, false, RETRYCHAN(chan));
1992 /* Leave room for what we already read, and align remainder */
1993 skb_pull(pkt, BRCMF_FIRSTREAD);
1994 pkt_align(pkt, rdlen, BRCMF_SDALIGN);
1996 /* Read the remaining frame data */
1997 sdret = brcmf_sdcard_recv_pkt(bus->sdiodev, bus->sdiodev->sbwad,
1998 SDIO_FUNC_2, F2SYNC, pkt);
2002 brcmf_dbg(ERROR, "read %d %s bytes failed: %d\n", rdlen,
2003 ((chan == SDPCM_EVENT_CHANNEL) ? "event"
2004 : ((chan == SDPCM_DATA_CHANNEL) ? "data"
2006 brcmu_pkt_buf_free_skb(pkt);
2007 bus->drvr->rx_errors++;
2008 brcmf_sdbrcm_rxfail(bus, true, RETRYCHAN(chan));
2012 /* Copy the already-read portion */
2013 skb_push(pkt, BRCMF_FIRSTREAD);
2014 memcpy(pkt->data, bus->rxhdr, BRCMF_FIRSTREAD);
2017 if (BRCMF_BYTES_ON() && BRCMF_DATA_ON()) {
2018 printk(KERN_DEBUG "Rx Data:\n");
2019 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
2025 /* Save superframe descriptor and allocate packet frame */
2026 if (chan == SDPCM_GLOM_CHANNEL) {
2027 if (SDPCM_GLOMDESC(&bus->rxhdr[SDPCM_FRAMETAG_LEN])) {
2028 brcmf_dbg(GLOM, "glom descriptor, %d bytes:\n",
2031 if (BRCMF_GLOM_ON()) {
2032 printk(KERN_DEBUG "Glom Data:\n");
2033 print_hex_dump_bytes("",
2038 __skb_trim(pkt, len);
2039 skb_pull(pkt, SDPCM_HDRLEN);
2042 brcmf_dbg(ERROR, "%s: glom superframe w/o "
2043 "descriptor!\n", __func__);
2044 brcmf_sdbrcm_rxfail(bus, false, false);
2049 /* Fill in packet len and prio, deliver upward */
2050 __skb_trim(pkt, len);
2051 skb_pull(pkt, doff);
2053 if (pkt->len == 0) {
2054 brcmu_pkt_buf_free_skb(pkt);
2056 } else if (brcmf_proto_hdrpull(bus->drvr, &ifidx, pkt) != 0) {
2057 brcmf_dbg(ERROR, "rx protocol error\n");
2058 brcmu_pkt_buf_free_skb(pkt);
2059 bus->drvr->rx_errors++;
2063 /* Unlock during rx call */
2065 brcmf_rx_packet(bus->drvr, ifidx, pkt);
2068 rxcount = maxframes - rxleft;
2070 /* Message if we hit the limit */
2072 brcmf_dbg(DATA, "hit rx limit of %d frames\n",
2076 brcmf_dbg(DATA, "processed %d frames\n", rxcount);
2077 /* Back off rxseq if awaiting rtx, update rx_seq */
2080 bus->rx_seq = rxseq;
2086 brcmf_sdbrcm_wait_for_event(struct brcmf_sdio *bus, bool *lockvar)
2089 wait_event_interruptible_timeout(bus->ctrl_wait,
2090 (*lockvar == false), HZ * 2);
2096 brcmf_sdbrcm_wait_event_wakeup(struct brcmf_sdio *bus)
2098 if (waitqueue_active(&bus->ctrl_wait))
2099 wake_up_interruptible(&bus->ctrl_wait);
2103 /* Writes a HW/SW header into the packet and sends it. */
2104 /* Assumes: (a) header space already there, (b) caller holds lock */
2105 static int brcmf_sdbrcm_txpkt(struct brcmf_sdio *bus, struct sk_buff *pkt,
2106 uint chan, bool free_pkt)
2112 struct sk_buff *new;
2115 brcmf_dbg(TRACE, "Enter\n");
2117 frame = (u8 *) (pkt->data);
2119 /* Add alignment padding, allocate new packet if needed */
2120 pad = ((unsigned long)frame % BRCMF_SDALIGN);
2122 if (skb_headroom(pkt) < pad) {
2123 brcmf_dbg(INFO, "insufficient headroom %d for %d pad\n",
2124 skb_headroom(pkt), pad);
2125 bus->drvr->tx_realloc++;
2126 new = brcmu_pkt_buf_get_skb(pkt->len + BRCMF_SDALIGN);
2128 brcmf_dbg(ERROR, "couldn't allocate new %d-byte packet\n",
2129 pkt->len + BRCMF_SDALIGN);
2134 pkt_align(new, pkt->len, BRCMF_SDALIGN);
2135 memcpy(new->data, pkt->data, pkt->len);
2137 brcmu_pkt_buf_free_skb(pkt);
2138 /* free the pkt if canned one is not used */
2141 frame = (u8 *) (pkt->data);
2142 /* precondition: (frame % BRCMF_SDALIGN) == 0) */
2146 frame = (u8 *) (pkt->data);
2147 /* precondition: pad + SDPCM_HDRLEN <= pkt->len */
2148 memset(frame, 0, pad + SDPCM_HDRLEN);
2151 /* precondition: pad < BRCMF_SDALIGN */
2153 /* Hardware tag: 2 byte len followed by 2 byte ~len check (all LE) */
2154 len = (u16) (pkt->len);
2155 *(__le16 *) frame = cpu_to_le16(len);
2156 *(((__le16 *) frame) + 1) = cpu_to_le16(~len);
2158 /* Software tag: channel, sequence number, data offset */
2160 ((chan << SDPCM_CHANNEL_SHIFT) & SDPCM_CHANNEL_MASK) | bus->tx_seq |
2162 SDPCM_HDRLEN) << SDPCM_DOFFSET_SHIFT) & SDPCM_DOFFSET_MASK);
2164 put_unaligned_le32(swheader, frame + SDPCM_FRAMETAG_LEN);
2165 put_unaligned_le32(0, frame + SDPCM_FRAMETAG_LEN + sizeof(swheader));
2168 tx_packets[pkt->priority]++;
2169 if (BRCMF_BYTES_ON() &&
2170 (((BRCMF_CTL_ON() && (chan == SDPCM_CONTROL_CHANNEL)) ||
2171 (BRCMF_DATA_ON() && (chan != SDPCM_CONTROL_CHANNEL))))) {
2172 printk(KERN_DEBUG "Tx Frame:\n");
2173 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET, frame, len);
2174 } else if (BRCMF_HDRS_ON()) {
2175 printk(KERN_DEBUG "TxHdr:\n");
2176 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
2177 frame, min_t(u16, len, 16));
2181 /* Raise len to next SDIO block to eliminate tail command */
2182 if (bus->roundup && bus->blocksize && (len > bus->blocksize)) {
2183 u16 pad = bus->blocksize - (len % bus->blocksize);
2184 if ((pad <= bus->roundup) && (pad < bus->blocksize))
2186 } else if (len % BRCMF_SDALIGN) {
2187 len += BRCMF_SDALIGN - (len % BRCMF_SDALIGN);
2190 /* Some controllers have trouble with odd bytes -- round to even */
2191 if (len & (ALIGNMENT - 1))
2192 len = roundup(len, ALIGNMENT);
2194 ret = brcmf_sdcard_send_pkt(bus->sdiodev, bus->sdiodev->sbwad,
2195 SDIO_FUNC_2, F2SYNC, pkt);
2199 /* On failure, abort the command and terminate the frame */
2200 brcmf_dbg(INFO, "sdio error %d, abort command and terminate frame\n",
2204 brcmf_sdcard_abort(bus->sdiodev, SDIO_FUNC_2);
2205 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
2206 SBSDIO_FUNC1_FRAMECTRL, SFC_WF_TERM,
2210 for (i = 0; i < 3; i++) {
2212 hi = brcmf_sdcard_cfg_read(bus->sdiodev,
2214 SBSDIO_FUNC1_WFRAMEBCHI,
2216 lo = brcmf_sdcard_cfg_read(bus->sdiodev,
2218 SBSDIO_FUNC1_WFRAMEBCLO,
2220 bus->f1regdata += 2;
2221 if ((hi == 0) && (lo == 0))
2227 bus->tx_seq = (bus->tx_seq + 1) % SDPCM_SEQUENCE_WRAP;
2230 /* restore pkt buffer pointer before calling tx complete routine */
2231 skb_pull(pkt, SDPCM_HDRLEN + pad);
2233 brcmf_txcomplete(bus->drvr, pkt, ret != 0);
2237 brcmu_pkt_buf_free_skb(pkt);
2242 static uint brcmf_sdbrcm_sendfromq(struct brcmf_sdio *bus, uint maxframes)
2244 struct sk_buff *pkt;
2247 int ret = 0, prec_out;
2252 struct brcmf_pub *drvr = bus->drvr;
2254 brcmf_dbg(TRACE, "Enter\n");
2256 tx_prec_map = ~bus->flowcontrol;
2258 /* Send frames until the limit or some other event */
2259 for (cnt = 0; (cnt < maxframes) && data_ok(bus); cnt++) {
2260 spin_lock_bh(&bus->txqlock);
2261 pkt = brcmu_pktq_mdeq(&bus->txq, tx_prec_map, &prec_out);
2263 spin_unlock_bh(&bus->txqlock);
2266 spin_unlock_bh(&bus->txqlock);
2267 datalen = pkt->len - SDPCM_HDRLEN;
2269 ret = brcmf_sdbrcm_txpkt(bus, pkt, SDPCM_DATA_CHANNEL, true);
2271 bus->drvr->tx_errors++;
2273 bus->drvr->dstats.tx_bytes += datalen;
2275 /* In poll mode, need to check for other events */
2276 if (!bus->intr && cnt) {
2277 /* Check device status, signal pending interrupt */
2278 r_sdreg32(bus, &intstatus,
2279 offsetof(struct sdpcmd_regs, intstatus),
2282 if (brcmf_sdcard_regfail(bus->sdiodev))
2284 if (intstatus & bus->hostintmask)
2289 /* Deflow-control stack if needed */
2290 if (drvr->up && (drvr->bus_if->state == BRCMF_BUS_DATA) &&
2291 drvr->txoff && (pktq_len(&bus->txq) < TXLOW))
2292 brcmf_txflowcontrol(drvr, 0, OFF);
2297 static bool brcmf_sdbrcm_dpc(struct brcmf_sdio *bus)
2299 u32 intstatus, newstatus = 0;
2301 uint rxlimit = bus->rxbound; /* Rx frames to read before resched */
2302 uint txlimit = bus->txbound; /* Tx frames to send before resched */
2303 uint framecnt = 0; /* Temporary counter of tx/rx frames */
2304 bool rxdone = true; /* Flag for no more read data */
2305 bool resched = false; /* Flag indicating resched wanted */
2307 brcmf_dbg(TRACE, "Enter\n");
2309 /* Start with leftover status bits */
2310 intstatus = bus->intstatus;
2314 /* If waiting for HTAVAIL, check status */
2315 if (bus->clkstate == CLK_PENDING) {
2317 u8 clkctl, devctl = 0;
2320 /* Check for inconsistent device control */
2321 devctl = brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1,
2322 SBSDIO_DEVICE_CTL, &err);
2324 brcmf_dbg(ERROR, "error reading DEVCTL: %d\n", err);
2325 bus->drvr->bus_if->state = BRCMF_BUS_DOWN;
2329 /* Read CSR, if clock on switch to AVAIL, else ignore */
2330 clkctl = brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1,
2331 SBSDIO_FUNC1_CHIPCLKCSR, &err);
2333 brcmf_dbg(ERROR, "error reading CSR: %d\n",
2335 bus->drvr->bus_if->state = BRCMF_BUS_DOWN;
2338 brcmf_dbg(INFO, "DPC: PENDING, devctl 0x%02x clkctl 0x%02x\n",
2341 if (SBSDIO_HTAV(clkctl)) {
2342 devctl = brcmf_sdcard_cfg_read(bus->sdiodev,
2344 SBSDIO_DEVICE_CTL, &err);
2346 brcmf_dbg(ERROR, "error reading DEVCTL: %d\n",
2348 bus->drvr->bus_if->state = BRCMF_BUS_DOWN;
2350 devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
2351 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
2352 SBSDIO_DEVICE_CTL, devctl, &err);
2354 brcmf_dbg(ERROR, "error writing DEVCTL: %d\n",
2356 bus->drvr->bus_if->state = BRCMF_BUS_DOWN;
2358 bus->clkstate = CLK_AVAIL;
2366 /* Make sure backplane clock is on */
2367 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, true);
2368 if (bus->clkstate == CLK_PENDING)
2371 /* Pending interrupt indicates new device status */
2374 r_sdreg32(bus, &newstatus,
2375 offsetof(struct sdpcmd_regs, intstatus), &retries);
2377 if (brcmf_sdcard_regfail(bus->sdiodev))
2379 newstatus &= bus->hostintmask;
2380 bus->fcstate = !!(newstatus & I_HMB_FC_STATE);
2382 w_sdreg32(bus, newstatus,
2383 offsetof(struct sdpcmd_regs, intstatus),
2389 /* Merge new bits with previous */
2390 intstatus |= newstatus;
2393 /* Handle flow-control change: read new state in case our ack
2394 * crossed another change interrupt. If change still set, assume
2395 * FC ON for safety, let next loop through do the debounce.
2397 if (intstatus & I_HMB_FC_CHANGE) {
2398 intstatus &= ~I_HMB_FC_CHANGE;
2399 w_sdreg32(bus, I_HMB_FC_CHANGE,
2400 offsetof(struct sdpcmd_regs, intstatus), &retries);
2402 r_sdreg32(bus, &newstatus,
2403 offsetof(struct sdpcmd_regs, intstatus), &retries);
2404 bus->f1regdata += 2;
2406 !!(newstatus & (I_HMB_FC_STATE | I_HMB_FC_CHANGE));
2407 intstatus |= (newstatus & bus->hostintmask);
2410 /* Handle host mailbox indication */
2411 if (intstatus & I_HMB_HOST_INT) {
2412 intstatus &= ~I_HMB_HOST_INT;
2413 intstatus |= brcmf_sdbrcm_hostmail(bus);
2416 /* Generally don't ask for these, can get CRC errors... */
2417 if (intstatus & I_WR_OOSYNC) {
2418 brcmf_dbg(ERROR, "Dongle reports WR_OOSYNC\n");
2419 intstatus &= ~I_WR_OOSYNC;
2422 if (intstatus & I_RD_OOSYNC) {
2423 brcmf_dbg(ERROR, "Dongle reports RD_OOSYNC\n");
2424 intstatus &= ~I_RD_OOSYNC;
2427 if (intstatus & I_SBINT) {
2428 brcmf_dbg(ERROR, "Dongle reports SBINT\n");
2429 intstatus &= ~I_SBINT;
2432 /* Would be active due to wake-wlan in gSPI */
2433 if (intstatus & I_CHIPACTIVE) {
2434 brcmf_dbg(INFO, "Dongle reports CHIPACTIVE\n");
2435 intstatus &= ~I_CHIPACTIVE;
2438 /* Ignore frame indications if rxskip is set */
2440 intstatus &= ~I_HMB_FRAME_IND;
2442 /* On frame indication, read available frames */
2443 if (PKT_AVAILABLE()) {
2444 framecnt = brcmf_sdbrcm_readframes(bus, rxlimit, &rxdone);
2445 if (rxdone || bus->rxskip)
2446 intstatus &= ~I_HMB_FRAME_IND;
2447 rxlimit -= min(framecnt, rxlimit);
2450 /* Keep still-pending events for next scheduling */
2451 bus->intstatus = intstatus;
2454 if (data_ok(bus) && bus->ctrl_frame_stat &&
2455 (bus->clkstate == CLK_AVAIL)) {
2458 ret = brcmf_sdcard_send_buf(bus->sdiodev, bus->sdiodev->sbwad,
2459 SDIO_FUNC_2, F2SYNC, (u8 *) bus->ctrl_frame_buf,
2460 (u32) bus->ctrl_frame_len);
2463 /* On failure, abort the command and
2464 terminate the frame */
2465 brcmf_dbg(INFO, "sdio error %d, abort command and terminate frame\n",
2469 brcmf_sdcard_abort(bus->sdiodev, SDIO_FUNC_2);
2471 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
2472 SBSDIO_FUNC1_FRAMECTRL, SFC_WF_TERM,
2476 for (i = 0; i < 3; i++) {
2478 hi = brcmf_sdcard_cfg_read(bus->sdiodev,
2480 SBSDIO_FUNC1_WFRAMEBCHI,
2482 lo = brcmf_sdcard_cfg_read(bus->sdiodev,
2484 SBSDIO_FUNC1_WFRAMEBCLO,
2486 bus->f1regdata += 2;
2487 if ((hi == 0) && (lo == 0))
2493 bus->tx_seq = (bus->tx_seq + 1) % SDPCM_SEQUENCE_WRAP;
2495 brcmf_dbg(INFO, "Return_dpc value is : %d\n", ret);
2496 bus->ctrl_frame_stat = false;
2497 brcmf_sdbrcm_wait_event_wakeup(bus);
2499 /* Send queued frames (limit 1 if rx may still be pending) */
2500 else if ((bus->clkstate == CLK_AVAIL) && !bus->fcstate &&
2501 brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol) && txlimit
2503 framecnt = rxdone ? txlimit : min(txlimit, bus->txminmax);
2504 framecnt = brcmf_sdbrcm_sendfromq(bus, framecnt);
2505 txlimit -= framecnt;
2508 /* Resched if events or tx frames are pending,
2509 else await next interrupt */
2510 /* On failed register access, all bets are off:
2511 no resched or interrupts */
2512 if ((bus->drvr->bus_if->state == BRCMF_BUS_DOWN) ||
2513 brcmf_sdcard_regfail(bus->sdiodev)) {
2514 brcmf_dbg(ERROR, "failed backplane access over SDIO, halting operation %d\n",
2515 brcmf_sdcard_regfail(bus->sdiodev));
2516 bus->drvr->bus_if->state = BRCMF_BUS_DOWN;
2518 } else if (bus->clkstate == CLK_PENDING) {
2519 brcmf_dbg(INFO, "rescheduled due to CLK_PENDING awaiting I_CHIPACTIVE interrupt\n");
2521 } else if (bus->intstatus || bus->ipend ||
2522 (!bus->fcstate && brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol)
2523 && data_ok(bus)) || PKT_AVAILABLE()) {
2527 bus->dpc_sched = resched;
2529 /* If we're done for now, turn off clock request. */
2530 if ((bus->clkstate != CLK_PENDING)
2531 && bus->idletime == BRCMF_IDLE_IMMEDIATE) {
2532 bus->activity = false;
2533 brcmf_sdbrcm_clkctl(bus, CLK_NONE, false);
2541 static int brcmf_sdbrcm_dpc_thread(void *data)
2543 struct brcmf_sdio *bus = (struct brcmf_sdio *) data;
2545 allow_signal(SIGTERM);
2546 /* Run until signal received */
2548 if (kthread_should_stop())
2550 if (!wait_for_completion_interruptible(&bus->dpc_wait)) {
2551 /* Call bus dpc unless it indicated down
2552 (then clean stop) */
2553 if (bus->drvr->bus_if->state != BRCMF_BUS_DOWN) {
2554 if (brcmf_sdbrcm_dpc(bus))
2555 complete(&bus->dpc_wait);
2557 /* after stopping the bus, exit thread */
2558 brcmf_sdbrcm_bus_stop(bus);
2559 bus->dpc_tsk = NULL;
2568 int brcmf_sdbrcm_bus_txdata(struct brcmf_sdio *bus, struct sk_buff *pkt)
2573 brcmf_dbg(TRACE, "Enter\n");
2577 /* Add space for the header */
2578 skb_push(pkt, SDPCM_HDRLEN);
2579 /* precondition: IS_ALIGNED((unsigned long)(pkt->data), 2) */
2581 prec = prio2prec((pkt->priority & PRIOMASK));
2583 /* Check for existing queue, current flow-control,
2584 pending event, or pending clock */
2585 brcmf_dbg(TRACE, "deferring pktq len %d\n", pktq_len(&bus->txq));
2588 /* Priority based enq */
2589 spin_lock_bh(&bus->txqlock);
2590 if (brcmf_c_prec_enq(bus->drvr, &bus->txq, pkt, prec) == false) {
2591 skb_pull(pkt, SDPCM_HDRLEN);
2592 brcmf_txcomplete(bus->drvr, pkt, false);
2593 brcmu_pkt_buf_free_skb(pkt);
2594 brcmf_dbg(ERROR, "out of bus->txq !!!\n");
2599 spin_unlock_bh(&bus->txqlock);
2601 if (pktq_len(&bus->txq) >= TXHI)
2602 brcmf_txflowcontrol(bus->drvr, 0, ON);
2605 if (pktq_plen(&bus->txq, prec) > qcount[prec])
2606 qcount[prec] = pktq_plen(&bus->txq, prec);
2608 /* Schedule DPC if needed to send queued packet(s) */
2609 if (!bus->dpc_sched) {
2610 bus->dpc_sched = true;
2612 complete(&bus->dpc_wait);
2619 brcmf_sdbrcm_membytes(struct brcmf_sdio *bus, bool write, u32 address, u8 *data,
2626 /* Determine initial transfer parameters */
2627 sdaddr = address & SBSDIO_SB_OFT_ADDR_MASK;
2628 if ((sdaddr + size) & SBSDIO_SBWINDOW_MASK)
2629 dsize = (SBSDIO_SB_OFT_ADDR_LIMIT - sdaddr);
2633 /* Set the backplane window to include the start address */
2634 bcmerror = brcmf_sdcard_set_sbaddr_window(bus->sdiodev, address);
2636 brcmf_dbg(ERROR, "window change failed\n");
2640 /* Do the transfer(s) */
2642 brcmf_dbg(INFO, "%s %d bytes at offset 0x%08x in window 0x%08x\n",
2643 write ? "write" : "read", dsize,
2644 sdaddr, address & SBSDIO_SBWINDOW_MASK);
2645 bcmerror = brcmf_sdcard_rwdata(bus->sdiodev, write,
2646 sdaddr, data, dsize);
2648 brcmf_dbg(ERROR, "membytes transfer failed\n");
2652 /* Adjust for next transfer (if any) */
2657 bcmerror = brcmf_sdcard_set_sbaddr_window(bus->sdiodev,
2660 brcmf_dbg(ERROR, "window change failed\n");
2664 dsize = min_t(uint, SBSDIO_SB_OFT_ADDR_LIMIT, size);
2669 /* Return the window to backplane enumeration space for core access */
2670 if (brcmf_sdcard_set_sbaddr_window(bus->sdiodev, bus->sdiodev->sbwad))
2671 brcmf_dbg(ERROR, "FAILED to set window back to 0x%x\n",
2672 bus->sdiodev->sbwad);
2678 #define CONSOLE_LINE_MAX 192
2680 static int brcmf_sdbrcm_readconsole(struct brcmf_sdio *bus)
2682 struct brcmf_console *c = &bus->console;
2683 u8 line[CONSOLE_LINE_MAX], ch;
2687 /* Don't do anything until FWREADY updates console address */
2688 if (bus->console_addr == 0)
2691 /* Read console log struct */
2692 addr = bus->console_addr + offsetof(struct rte_console, log_le);
2693 rv = brcmf_sdbrcm_membytes(bus, false, addr, (u8 *)&c->log_le,
2698 /* Allocate console buffer (one time only) */
2699 if (c->buf == NULL) {
2700 c->bufsize = le32_to_cpu(c->log_le.buf_size);
2701 c->buf = kmalloc(c->bufsize, GFP_ATOMIC);
2706 idx = le32_to_cpu(c->log_le.idx);
2708 /* Protect against corrupt value */
2709 if (idx > c->bufsize)
2712 /* Skip reading the console buffer if the index pointer
2717 /* Read the console buffer */
2718 addr = le32_to_cpu(c->log_le.buf);
2719 rv = brcmf_sdbrcm_membytes(bus, false, addr, c->buf, c->bufsize);
2723 while (c->last != idx) {
2724 for (n = 0; n < CONSOLE_LINE_MAX - 2; n++) {
2725 if (c->last == idx) {
2726 /* This would output a partial line.
2728 * the buffer pointer and output this
2729 * line next time around.
2734 c->last = c->bufsize - n;
2737 ch = c->buf[c->last];
2738 c->last = (c->last + 1) % c->bufsize;
2745 if (line[n - 1] == '\r')
2748 printk(KERN_DEBUG "CONSOLE: %s\n", line);
2757 static int brcmf_tx_frame(struct brcmf_sdio *bus, u8 *frame, u16 len)
2762 bus->ctrl_frame_stat = false;
2763 ret = brcmf_sdcard_send_buf(bus->sdiodev, bus->sdiodev->sbwad,
2764 SDIO_FUNC_2, F2SYNC, frame, len);
2767 /* On failure, abort the command and terminate the frame */
2768 brcmf_dbg(INFO, "sdio error %d, abort command and terminate frame\n",
2772 brcmf_sdcard_abort(bus->sdiodev, SDIO_FUNC_2);
2774 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
2775 SBSDIO_FUNC1_FRAMECTRL,
2779 for (i = 0; i < 3; i++) {
2781 hi = brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1,
2782 SBSDIO_FUNC1_WFRAMEBCHI,
2784 lo = brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1,
2785 SBSDIO_FUNC1_WFRAMEBCLO,
2787 bus->f1regdata += 2;
2788 if (hi == 0 && lo == 0)
2794 bus->tx_seq = (bus->tx_seq + 1) % SDPCM_SEQUENCE_WRAP;
2800 brcmf_sdbrcm_bus_txctl(struct brcmf_sdio *bus, unsigned char *msg, uint msglen)
2809 brcmf_dbg(TRACE, "Enter\n");
2811 /* Back the pointer to make a room for bus header */
2812 frame = msg - SDPCM_HDRLEN;
2813 len = (msglen += SDPCM_HDRLEN);
2815 /* Add alignment padding (optional for ctl frames) */
2816 doff = ((unsigned long)frame % BRCMF_SDALIGN);
2821 memset(frame, 0, doff + SDPCM_HDRLEN);
2823 /* precondition: doff < BRCMF_SDALIGN */
2824 doff += SDPCM_HDRLEN;
2826 /* Round send length to next SDIO block */
2827 if (bus->roundup && bus->blocksize && (len > bus->blocksize)) {
2828 u16 pad = bus->blocksize - (len % bus->blocksize);
2829 if ((pad <= bus->roundup) && (pad < bus->blocksize))
2831 } else if (len % BRCMF_SDALIGN) {
2832 len += BRCMF_SDALIGN - (len % BRCMF_SDALIGN);
2835 /* Satisfy length-alignment requirements */
2836 if (len & (ALIGNMENT - 1))
2837 len = roundup(len, ALIGNMENT);
2839 /* precondition: IS_ALIGNED((unsigned long)frame, 2) */
2841 /* Need to lock here to protect txseq and SDIO tx calls */
2846 /* Make sure backplane clock is on */
2847 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
2849 /* Hardware tag: 2 byte len followed by 2 byte ~len check (all LE) */
2850 *(__le16 *) frame = cpu_to_le16((u16) msglen);
2851 *(((__le16 *) frame) + 1) = cpu_to_le16(~msglen);
2853 /* Software tag: channel, sequence number, data offset */
2855 ((SDPCM_CONTROL_CHANNEL << SDPCM_CHANNEL_SHIFT) &
2857 | bus->tx_seq | ((doff << SDPCM_DOFFSET_SHIFT) &
2858 SDPCM_DOFFSET_MASK);
2859 put_unaligned_le32(swheader, frame + SDPCM_FRAMETAG_LEN);
2860 put_unaligned_le32(0, frame + SDPCM_FRAMETAG_LEN + sizeof(swheader));
2862 if (!data_ok(bus)) {
2863 brcmf_dbg(INFO, "No bus credit bus->tx_max %d, bus->tx_seq %d\n",
2864 bus->tx_max, bus->tx_seq);
2865 bus->ctrl_frame_stat = true;
2867 bus->ctrl_frame_buf = frame;
2868 bus->ctrl_frame_len = len;
2870 brcmf_sdbrcm_wait_for_event(bus, &bus->ctrl_frame_stat);
2872 if (bus->ctrl_frame_stat == false) {
2873 brcmf_dbg(INFO, "ctrl_frame_stat == false\n");
2876 brcmf_dbg(INFO, "ctrl_frame_stat == true\n");
2883 if (BRCMF_BYTES_ON() && BRCMF_CTL_ON()) {
2884 printk(KERN_DEBUG "Tx Frame:\n");
2885 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
2887 } else if (BRCMF_HDRS_ON()) {
2888 printk(KERN_DEBUG "TxHdr:\n");
2889 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
2890 frame, min_t(u16, len, 16));
2895 ret = brcmf_tx_frame(bus, frame, len);
2896 } while (ret < 0 && retries++ < TXRETRIES);
2899 if ((bus->idletime == BRCMF_IDLE_IMMEDIATE) && !bus->dpc_sched) {
2900 bus->activity = false;
2901 brcmf_sdbrcm_clkctl(bus, CLK_NONE, true);
2907 bus->drvr->tx_ctlerrs++;
2909 bus->drvr->tx_ctlpkts++;
2911 return ret ? -EIO : 0;
2915 brcmf_sdbrcm_bus_rxctl(struct brcmf_sdio *bus, unsigned char *msg, uint msglen)
2921 brcmf_dbg(TRACE, "Enter\n");
2923 /* Wait until control frame is available */
2924 timeleft = brcmf_sdbrcm_dcmd_resp_wait(bus, &bus->rxlen, &pending);
2928 memcpy(msg, bus->rxctl, min(msglen, rxlen));
2933 brcmf_dbg(CTL, "resumed on rxctl frame, got %d expected %d\n",
2935 } else if (timeleft == 0) {
2936 brcmf_dbg(ERROR, "resumed on timeout\n");
2937 } else if (pending == true) {
2938 brcmf_dbg(CTL, "cancelled\n");
2939 return -ERESTARTSYS;
2941 brcmf_dbg(CTL, "resumed for unknown reason?\n");
2945 bus->drvr->rx_ctlpkts++;
2947 bus->drvr->rx_ctlerrs++;
2949 return rxlen ? (int)rxlen : -ETIMEDOUT;
2952 static int brcmf_sdbrcm_downloadvars(struct brcmf_sdio *bus, void *arg, int len)
2956 brcmf_dbg(TRACE, "Enter\n");
2958 /* Basic sanity checks */
2959 if (bus->drvr->up) {
2960 bcmerror = -EISCONN;
2964 bcmerror = -EOVERFLOW;
2968 /* Free the old ones and replace with passed variables */
2971 bus->vars = kmalloc(len, GFP_ATOMIC);
2972 bus->varsz = bus->vars ? len : 0;
2973 if (bus->vars == NULL) {
2978 /* Copy the passed variables, which should include the
2979 terminating double-null */
2980 memcpy(bus->vars, arg, bus->varsz);
2985 static int brcmf_sdbrcm_write_vars(struct brcmf_sdio *bus)
2994 char *nvram_ularray;
2997 /* Even if there are no vars are to be written, we still
2998 need to set the ramsize. */
2999 varsize = bus->varsz ? roundup(bus->varsz, 4) : 0;
3000 varaddr = (bus->ramsize - 4) - varsize;
3003 vbuffer = kzalloc(varsize, GFP_ATOMIC);
3007 memcpy(vbuffer, bus->vars, bus->varsz);
3009 /* Write the vars list */
3011 brcmf_sdbrcm_membytes(bus, true, varaddr, vbuffer, varsize);
3013 /* Verify NVRAM bytes */
3014 brcmf_dbg(INFO, "Compare NVRAM dl & ul; varsize=%d\n", varsize);
3015 nvram_ularray = kmalloc(varsize, GFP_ATOMIC);
3019 /* Upload image to verify downloaded contents. */
3020 memset(nvram_ularray, 0xaa, varsize);
3022 /* Read the vars list to temp buffer for comparison */
3024 brcmf_sdbrcm_membytes(bus, false, varaddr, nvram_ularray,
3027 brcmf_dbg(ERROR, "error %d on reading %d nvram bytes at 0x%08x\n",
3028 bcmerror, varsize, varaddr);
3030 /* Compare the org NVRAM with the one read from RAM */
3031 if (memcmp(vbuffer, nvram_ularray, varsize))
3032 brcmf_dbg(ERROR, "Downloaded NVRAM image is corrupted\n");
3034 brcmf_dbg(ERROR, "Download/Upload/Compare of NVRAM ok\n");
3036 kfree(nvram_ularray);
3042 /* adjust to the user specified RAM */
3043 brcmf_dbg(INFO, "Physical memory size: %d\n", bus->ramsize);
3044 brcmf_dbg(INFO, "Vars are at %d, orig varsize is %d\n",
3046 varsize = ((bus->ramsize - 4) - varaddr);
3049 * Determine the length token:
3050 * Varsize, converted to words, in lower 16-bits, checksum
3055 varsizew_le = cpu_to_le32(0);
3057 varsizew = varsize / 4;
3058 varsizew = (~varsizew << 16) | (varsizew & 0x0000FFFF);
3059 varsizew_le = cpu_to_le32(varsizew);
3062 brcmf_dbg(INFO, "New varsize is %d, length token=0x%08x\n",
3065 /* Write the length token to the last word */
3066 bcmerror = brcmf_sdbrcm_membytes(bus, true, (bus->ramsize - 4),
3067 (u8 *)&varsizew_le, 4);
3072 static int brcmf_sdbrcm_download_state(struct brcmf_sdio *bus, bool enter)
3076 struct chip_info *ci = bus->ci;
3078 /* To enter download state, disable ARM and reset SOCRAM.
3079 * To exit download state, simply reset ARM (default is RAM boot).
3082 bus->alp_only = true;
3084 ci->coredisable(bus->sdiodev, ci, BCMA_CORE_ARM_CM3);
3086 ci->resetcore(bus->sdiodev, ci, BCMA_CORE_INTERNAL_MEM);
3088 /* Clear the top bit of memory */
3091 brcmf_sdbrcm_membytes(bus, true, bus->ramsize - 4,
3095 if (!ci->iscoreup(bus->sdiodev, ci, BCMA_CORE_INTERNAL_MEM)) {
3096 brcmf_dbg(ERROR, "SOCRAM core is down after reset?\n");
3101 bcmerror = brcmf_sdbrcm_write_vars(bus);
3103 brcmf_dbg(ERROR, "no vars written to RAM\n");
3107 w_sdreg32(bus, 0xFFFFFFFF,
3108 offsetof(struct sdpcmd_regs, intstatus), &retries);
3110 ci->resetcore(bus->sdiodev, ci, BCMA_CORE_ARM_CM3);
3112 /* Allow HT Clock now that the ARM is running. */
3113 bus->alp_only = false;
3115 bus->drvr->bus_if->state = BRCMF_BUS_LOAD;
3121 static int brcmf_sdbrcm_get_image(char *buf, int len, struct brcmf_sdio *bus)
3123 if (bus->firmware->size < bus->fw_ptr + len)
3124 len = bus->firmware->size - bus->fw_ptr;
3126 memcpy(buf, &bus->firmware->data[bus->fw_ptr], len);
3131 static int brcmf_sdbrcm_download_code_file(struct brcmf_sdio *bus)
3135 u8 *memblock = NULL, *memptr;
3138 brcmf_dbg(INFO, "Enter\n");
3140 ret = request_firmware(&bus->firmware, BRCMFMAC_FW_NAME,
3141 &bus->sdiodev->func[2]->dev);
3143 brcmf_dbg(ERROR, "Fail to request firmware %d\n", ret);
3148 memptr = memblock = kmalloc(MEMBLOCK + BRCMF_SDALIGN, GFP_ATOMIC);
3149 if (memblock == NULL) {
3153 if ((u32)(unsigned long)memblock % BRCMF_SDALIGN)
3154 memptr += (BRCMF_SDALIGN -
3155 ((u32)(unsigned long)memblock % BRCMF_SDALIGN));
3157 /* Download image */
3159 brcmf_sdbrcm_get_image((char *)memptr, MEMBLOCK, bus))) {
3160 ret = brcmf_sdbrcm_membytes(bus, true, offset, memptr, len);
3162 brcmf_dbg(ERROR, "error %d on writing %d membytes at 0x%08x\n",
3163 ret, MEMBLOCK, offset);
3173 release_firmware(bus->firmware);
3180 * ProcessVars:Takes a buffer of "<var>=<value>\n" lines read from a file
3181 * and ending in a NUL.
3182 * Removes carriage returns, empty lines, comment lines, and converts
3184 * Shortens buffer as needed and pads with NULs. End of buffer is marked
3188 static uint brcmf_process_nvram_vars(char *varbuf, uint len)
3197 findNewline = false;
3200 for (n = 0; n < len; n++) {
3203 if (varbuf[n] == '\r')
3205 if (findNewline && varbuf[n] != '\n')
3207 findNewline = false;
3208 if (varbuf[n] == '#') {
3212 if (varbuf[n] == '\n') {
3222 buf_len = dp - varbuf;
3224 while (dp < varbuf + n)
3230 static int brcmf_sdbrcm_download_nvram(struct brcmf_sdio *bus)
3233 char *memblock = NULL;
3237 ret = request_firmware(&bus->firmware, BRCMFMAC_NV_NAME,
3238 &bus->sdiodev->func[2]->dev);
3240 brcmf_dbg(ERROR, "Fail to request nvram %d\n", ret);
3245 memblock = kmalloc(MEMBLOCK, GFP_ATOMIC);
3246 if (memblock == NULL) {
3251 len = brcmf_sdbrcm_get_image(memblock, MEMBLOCK, bus);
3253 if (len > 0 && len < MEMBLOCK) {
3254 bufp = (char *)memblock;
3256 len = brcmf_process_nvram_vars(bufp, len);
3260 ret = brcmf_sdbrcm_downloadvars(bus, memblock, len + 1);
3262 brcmf_dbg(ERROR, "error downloading vars: %d\n", ret);
3264 brcmf_dbg(ERROR, "error reading nvram file: %d\n", len);
3271 release_firmware(bus->firmware);
3277 static int _brcmf_sdbrcm_download_firmware(struct brcmf_sdio *bus)
3281 /* Keep arm in reset */
3282 if (brcmf_sdbrcm_download_state(bus, true)) {
3283 brcmf_dbg(ERROR, "error placing ARM core in reset\n");
3287 /* External image takes precedence if specified */
3288 if (brcmf_sdbrcm_download_code_file(bus)) {
3289 brcmf_dbg(ERROR, "dongle image file download failed\n");
3293 /* External nvram takes precedence if specified */
3294 if (brcmf_sdbrcm_download_nvram(bus))
3295 brcmf_dbg(ERROR, "dongle nvram file download failed\n");
3297 /* Take arm out of reset */
3298 if (brcmf_sdbrcm_download_state(bus, false)) {
3299 brcmf_dbg(ERROR, "error getting out of ARM core reset\n");
3310 brcmf_sdbrcm_download_firmware(struct brcmf_sdio *bus)
3314 /* Download the firmware */
3315 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
3317 ret = _brcmf_sdbrcm_download_firmware(bus) == 0;
3319 brcmf_sdbrcm_clkctl(bus, CLK_SDONLY, false);
3324 void brcmf_sdbrcm_bus_stop(struct brcmf_sdio *bus)
3326 u32 local_hostintmask;
3331 brcmf_dbg(TRACE, "Enter\n");
3333 if (bus->watchdog_tsk) {
3334 send_sig(SIGTERM, bus->watchdog_tsk, 1);
3335 kthread_stop(bus->watchdog_tsk);
3336 bus->watchdog_tsk = NULL;
3339 if (bus->dpc_tsk && bus->dpc_tsk != current) {
3340 send_sig(SIGTERM, bus->dpc_tsk, 1);
3341 kthread_stop(bus->dpc_tsk);
3342 bus->dpc_tsk = NULL;
3349 /* Enable clock for device interrupts */
3350 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
3352 /* Disable and clear interrupts at the chip level also */
3353 w_sdreg32(bus, 0, offsetof(struct sdpcmd_regs, hostintmask), &retries);
3354 local_hostintmask = bus->hostintmask;
3355 bus->hostintmask = 0;
3357 /* Change our idea of bus state */
3358 bus->drvr->bus_if->state = BRCMF_BUS_DOWN;
3360 /* Force clocks on backplane to be sure F2 interrupt propagates */
3361 saveclk = brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1,
3362 SBSDIO_FUNC1_CHIPCLKCSR, &err);
3364 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
3365 SBSDIO_FUNC1_CHIPCLKCSR,
3366 (saveclk | SBSDIO_FORCE_HT), &err);
3369 brcmf_dbg(ERROR, "Failed to force clock for F2: err %d\n", err);
3371 /* Turn off the bus (F2), free any pending packets */
3372 brcmf_dbg(INTR, "disable SDIO interrupts\n");
3373 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_0, SDIO_CCCR_IOEx,
3374 SDIO_FUNC_ENABLE_1, NULL);
3376 /* Clear any pending interrupts now that F2 is disabled */
3377 w_sdreg32(bus, local_hostintmask,
3378 offsetof(struct sdpcmd_regs, intstatus), &retries);
3380 /* Turn off the backplane clock (only) */
3381 brcmf_sdbrcm_clkctl(bus, CLK_SDONLY, false);
3383 /* Clear the data packet queues */
3384 brcmu_pktq_flush(&bus->txq, true, NULL, NULL);
3386 /* Clear any held glomming stuff */
3388 brcmu_pkt_buf_free_skb(bus->glomd);
3389 brcmf_sdbrcm_free_glom(bus);
3391 /* Clear rx control and wake any waiters */
3393 brcmf_sdbrcm_dcmd_resp_wake(bus);
3395 /* Reset some F2 state stuff */
3396 bus->rxskip = false;
3397 bus->tx_seq = bus->rx_seq = 0;
3402 int brcmf_sdbrcm_bus_init(struct brcmf_pub *drvr)
3404 struct brcmf_sdio *bus = drvr->bus;
3405 unsigned long timeout;
3411 brcmf_dbg(TRACE, "Enter\n");
3413 /* try to download image and nvram to the dongle */
3414 if (drvr->bus_if->state == BRCMF_BUS_DOWN) {
3415 if (!(brcmf_sdbrcm_download_firmware(bus)))
3422 /* Start the watchdog timer */
3423 bus->drvr->tickcnt = 0;
3424 brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS);
3428 /* Make sure backplane clock is on, needed to generate F2 interrupt */
3429 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
3430 if (bus->clkstate != CLK_AVAIL)
3433 /* Force clocks on backplane to be sure F2 interrupt propagates */
3435 brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1,
3436 SBSDIO_FUNC1_CHIPCLKCSR, &err);
3438 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
3439 SBSDIO_FUNC1_CHIPCLKCSR,
3440 (saveclk | SBSDIO_FORCE_HT), &err);
3443 brcmf_dbg(ERROR, "Failed to force clock for F2: err %d\n", err);
3447 /* Enable function 2 (frame transfers) */
3448 w_sdreg32(bus, SDPCM_PROT_VERSION << SMB_DATA_VERSION_SHIFT,
3449 offsetof(struct sdpcmd_regs, tosbmailboxdata), &retries);
3450 enable = (SDIO_FUNC_ENABLE_1 | SDIO_FUNC_ENABLE_2);
3452 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_0, SDIO_CCCR_IOEx,
3455 timeout = jiffies + msecs_to_jiffies(BRCMF_WAIT_F2RDY);
3457 while (enable != ready) {
3458 ready = brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_0,
3459 SDIO_CCCR_IORx, NULL);
3460 if (time_after(jiffies, timeout))
3462 else if (time_after(jiffies, timeout - BRCMF_WAIT_F2RDY + 50))
3463 /* prevent busy waiting if it takes too long */
3464 msleep_interruptible(20);
3467 brcmf_dbg(INFO, "enable 0x%02x, ready 0x%02x\n", enable, ready);
3469 /* If F2 successfully enabled, set core and enable interrupts */
3470 if (ready == enable) {
3471 /* Set up the interrupt mask and enable interrupts */
3472 bus->hostintmask = HOSTINTMASK;
3473 w_sdreg32(bus, bus->hostintmask,
3474 offsetof(struct sdpcmd_regs, hostintmask), &retries);
3476 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
3477 SBSDIO_WATERMARK, 8, &err);
3479 /* Set bus state according to enable result */
3480 drvr->bus_if->state = BRCMF_BUS_DATA;
3484 /* Disable F2 again */
3485 enable = SDIO_FUNC_ENABLE_1;
3486 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_0,
3487 SDIO_CCCR_IOEx, enable, NULL);
3490 /* Restore previous clock setting */
3491 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
3492 SBSDIO_FUNC1_CHIPCLKCSR, saveclk, &err);
3494 /* If we didn't come up, turn off backplane clock */
3495 if (drvr->bus_if->state != BRCMF_BUS_DATA)
3496 brcmf_sdbrcm_clkctl(bus, CLK_NONE, false);
3504 void brcmf_sdbrcm_isr(void *arg)
3506 struct brcmf_sdio *bus = (struct brcmf_sdio *) arg;
3508 brcmf_dbg(TRACE, "Enter\n");
3511 brcmf_dbg(ERROR, "bus is null pointer, exiting\n");
3515 if (bus->drvr->bus_if->state == BRCMF_BUS_DOWN) {
3516 brcmf_dbg(ERROR, "bus is down. we have nothing to do\n");
3519 /* Count the interrupt call */
3523 /* Shouldn't get this interrupt if we're sleeping? */
3524 if (bus->sleeping) {
3525 brcmf_dbg(ERROR, "INTERRUPT WHILE SLEEPING??\n");
3529 /* Disable additional interrupts (is this needed now)? */
3531 brcmf_dbg(ERROR, "isr w/o interrupt configured!\n");
3533 bus->dpc_sched = true;
3535 complete(&bus->dpc_wait);
3538 static bool brcmf_sdbrcm_bus_watchdog(struct brcmf_pub *drvr)
3540 struct brcmf_sdio *bus;
3542 brcmf_dbg(TIMER, "Enter\n");
3546 /* Ignore the timer if simulating bus down */
3552 /* Poll period: check device if appropriate. */
3553 if (bus->poll && (++bus->polltick >= bus->pollrate)) {
3556 /* Reset poll tick */
3559 /* Check device if no interrupts */
3560 if (!bus->intr || (bus->intrcount == bus->lastintrs)) {
3562 if (!bus->dpc_sched) {
3564 devpend = brcmf_sdcard_cfg_read(bus->sdiodev,
3565 SDIO_FUNC_0, SDIO_CCCR_INTx,
3568 devpend & (INTR_STATUS_FUNC1 |
3572 /* If there is something, make like the ISR and
3578 bus->dpc_sched = true;
3580 complete(&bus->dpc_wait);
3584 /* Update interrupt tracking */
3585 bus->lastintrs = bus->intrcount;
3588 /* Poll for console output periodically */
3589 if (drvr->bus_if->state == BRCMF_BUS_DATA &&
3590 bus->console_interval != 0) {
3591 bus->console.count += BRCMF_WD_POLL_MS;
3592 if (bus->console.count >= bus->console_interval) {
3593 bus->console.count -= bus->console_interval;
3594 /* Make sure backplane clock is on */
3595 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
3596 if (brcmf_sdbrcm_readconsole(bus) < 0)
3598 bus->console_interval = 0;
3603 /* On idle timeout clear activity flag and/or turn off clock */
3604 if ((bus->idletime > 0) && (bus->clkstate == CLK_AVAIL)) {
3605 if (++bus->idlecount >= bus->idletime) {
3607 if (bus->activity) {
3608 bus->activity = false;
3609 brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS);
3611 brcmf_sdbrcm_clkctl(bus, CLK_NONE, false);
3621 static bool brcmf_sdbrcm_chipmatch(u16 chipid)
3623 if (chipid == BCM4329_CHIP_ID)
3628 static void brcmf_sdbrcm_release_malloc(struct brcmf_sdio *bus)
3630 brcmf_dbg(TRACE, "Enter\n");
3633 bus->rxctl = bus->rxbuf = NULL;
3636 kfree(bus->databuf);
3637 bus->databuf = NULL;
3640 static bool brcmf_sdbrcm_probe_malloc(struct brcmf_sdio *bus)
3642 brcmf_dbg(TRACE, "Enter\n");
3644 if (bus->drvr->maxctl) {
3646 roundup((bus->drvr->maxctl + SDPCM_HDRLEN),
3647 ALIGNMENT) + BRCMF_SDALIGN;
3648 bus->rxbuf = kmalloc(bus->rxblen, GFP_ATOMIC);
3653 /* Allocate buffer to receive glomed packet */
3654 bus->databuf = kmalloc(MAX_DATA_BUF, GFP_ATOMIC);
3655 if (!(bus->databuf)) {
3656 /* release rxbuf which was already located as above */
3662 /* Align the buffer */
3663 if ((unsigned long)bus->databuf % BRCMF_SDALIGN)
3664 bus->dataptr = bus->databuf + (BRCMF_SDALIGN -
3665 ((unsigned long)bus->databuf % BRCMF_SDALIGN));
3667 bus->dataptr = bus->databuf;
3676 brcmf_sdbrcm_probe_attach(struct brcmf_sdio *bus, u32 regsva)
3684 bus->alp_only = true;
3686 /* Return the window to backplane enumeration space for core access */
3687 if (brcmf_sdcard_set_sbaddr_window(bus->sdiodev, SI_ENUM_BASE))
3688 brcmf_dbg(ERROR, "FAILED to return to SI_ENUM_BASE\n");
3691 printk(KERN_DEBUG "F1 signature read @0x18000000=0x%4x\n",
3692 brcmf_sdcard_reg_read(bus->sdiodev, SI_ENUM_BASE, 4));
3697 * Force PLL off until brcmf_sdio_chip_attach()
3698 * programs PLL control regs
3701 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
3702 SBSDIO_FUNC1_CHIPCLKCSR,
3703 BRCMF_INIT_CLKCTL1, &err);
3706 brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1,
3707 SBSDIO_FUNC1_CHIPCLKCSR, &err);
3709 if (err || ((clkctl & ~SBSDIO_AVBITS) != BRCMF_INIT_CLKCTL1)) {
3710 brcmf_dbg(ERROR, "ChipClkCSR access: err %d wrote 0x%02x read 0x%02x\n",
3711 err, BRCMF_INIT_CLKCTL1, clkctl);
3715 if (brcmf_sdio_chip_attach(bus->sdiodev, &bus->ci, regsva)) {
3716 brcmf_dbg(ERROR, "brcmf_sdio_chip_attach failed!\n");
3720 if (!brcmf_sdbrcm_chipmatch((u16) bus->ci->chip)) {
3721 brcmf_dbg(ERROR, "unsupported chip: 0x%04x\n", bus->ci->chip);
3725 brcmf_sdio_chip_drivestrengthinit(bus->sdiodev, bus->ci,
3726 SDIO_DRIVE_STRENGTH);
3728 /* Get info on the SOCRAM cores... */
3729 bus->ramsize = bus->ci->ramsize;
3730 if (!(bus->ramsize)) {
3731 brcmf_dbg(ERROR, "failed to find SOCRAM memory!\n");
3735 /* Set core control so an SDIO reset does a backplane reset */
3736 idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV);
3737 reg_addr = bus->ci->c_inf[idx].base +
3738 offsetof(struct sdpcmd_regs, corecontrol);
3739 reg_val = brcmf_sdcard_reg_read(bus->sdiodev, reg_addr, sizeof(u32));
3740 brcmf_sdcard_reg_write(bus->sdiodev, reg_addr, sizeof(u32),
3741 reg_val | CC_BPRESEN);
3743 brcmu_pktq_init(&bus->txq, (PRIOMASK + 1), TXQLEN);
3745 /* Locate an appropriately-aligned portion of hdrbuf */
3746 bus->rxhdr = (u8 *) roundup((unsigned long)&bus->hdrbuf[0],
3749 /* Set the poll and/or interrupt flags */
3761 static bool brcmf_sdbrcm_probe_init(struct brcmf_sdio *bus)
3763 brcmf_dbg(TRACE, "Enter\n");
3765 /* Disable F2 to clear any intermediate frame state on the dongle */
3766 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_0, SDIO_CCCR_IOEx,
3767 SDIO_FUNC_ENABLE_1, NULL);
3769 bus->drvr->bus_if->state = BRCMF_BUS_DOWN;
3770 bus->sleeping = false;
3771 bus->rxflow = false;
3773 /* Done with backplane-dependent accesses, can drop clock... */
3774 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
3775 SBSDIO_FUNC1_CHIPCLKCSR, 0, NULL);
3777 /* ...and initialize clock/power states */
3778 bus->clkstate = CLK_SDONLY;
3779 bus->idletime = BRCMF_IDLE_INTERVAL;
3780 bus->idleclock = BRCMF_IDLE_ACTIVE;
3782 /* Query the F2 block size, set roundup accordingly */
3783 bus->blocksize = bus->sdiodev->func[2]->cur_blksize;
3784 bus->roundup = min(max_roundup, bus->blocksize);
3786 /* bus module does not support packet chaining */
3787 bus->use_rxchain = false;
3788 bus->sd_rxchain = false;
3794 brcmf_sdbrcm_watchdog_thread(void *data)
3796 struct brcmf_sdio *bus = (struct brcmf_sdio *)data;
3798 allow_signal(SIGTERM);
3799 /* Run until signal received */
3801 if (kthread_should_stop())
3803 if (!wait_for_completion_interruptible(&bus->watchdog_wait)) {
3804 brcmf_sdbrcm_bus_watchdog(bus->drvr);
3805 /* Count the tick for reference */
3806 bus->drvr->tickcnt++;
3814 brcmf_sdbrcm_watchdog(unsigned long data)
3816 struct brcmf_sdio *bus = (struct brcmf_sdio *)data;
3818 if (bus->watchdog_tsk) {
3819 complete(&bus->watchdog_wait);
3820 /* Reschedule the watchdog */
3821 if (bus->wd_timer_valid)
3822 mod_timer(&bus->timer,
3823 jiffies + BRCMF_WD_POLL_MS * HZ / 1000);
3827 static void brcmf_sdbrcm_release_dongle(struct brcmf_sdio *bus)
3829 brcmf_dbg(TRACE, "Enter\n");
3832 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
3833 brcmf_sdbrcm_clkctl(bus, CLK_NONE, false);
3834 brcmf_sdio_chip_detach(&bus->ci);
3835 if (bus->vars && bus->varsz)
3840 brcmf_dbg(TRACE, "Disconnected\n");
3843 /* Detach and free everything */
3844 static void brcmf_sdbrcm_release(struct brcmf_sdio *bus)
3846 brcmf_dbg(TRACE, "Enter\n");
3849 /* De-register interrupt handler */
3850 brcmf_sdcard_intr_dereg(bus->sdiodev);
3853 brcmf_detach(bus->drvr);
3854 brcmf_sdbrcm_release_dongle(bus);
3858 brcmf_sdbrcm_release_malloc(bus);
3863 brcmf_dbg(TRACE, "Disconnected\n");
3866 void *brcmf_sdbrcm_probe(u32 regsva, struct brcmf_sdio_dev *sdiodev)
3869 struct brcmf_sdio *bus;
3871 brcmf_dbg(TRACE, "Enter\n");
3873 /* We make an assumption about address window mappings:
3874 * regsva == SI_ENUM_BASE*/
3876 /* Allocate private bus interface state */
3877 bus = kzalloc(sizeof(struct brcmf_sdio), GFP_ATOMIC);
3881 bus->sdiodev = sdiodev;
3883 skb_queue_head_init(&bus->glom);
3884 bus->txbound = BRCMF_TXBOUND;
3885 bus->rxbound = BRCMF_RXBOUND;
3886 bus->txminmax = BRCMF_TXMINMAX;
3887 bus->tx_seq = SDPCM_SEQUENCE_WRAP - 1;
3888 bus->usebufpool = false; /* Use bufpool if allocated,
3889 else use locally malloced rxbuf */
3891 /* attempt to attach to the dongle */
3892 if (!(brcmf_sdbrcm_probe_attach(bus, regsva))) {
3893 brcmf_dbg(ERROR, "brcmf_sdbrcm_probe_attach failed\n");
3897 spin_lock_init(&bus->txqlock);
3898 init_waitqueue_head(&bus->ctrl_wait);
3899 init_waitqueue_head(&bus->dcmd_resp_wait);
3901 /* Set up the watchdog timer */
3902 init_timer(&bus->timer);
3903 bus->timer.data = (unsigned long)bus;
3904 bus->timer.function = brcmf_sdbrcm_watchdog;
3906 /* Initialize thread based operation and lock */
3907 sema_init(&bus->sdsem, 1);
3909 /* Initialize watchdog thread */
3910 init_completion(&bus->watchdog_wait);
3911 bus->watchdog_tsk = kthread_run(brcmf_sdbrcm_watchdog_thread,
3912 bus, "brcmf_watchdog");
3913 if (IS_ERR(bus->watchdog_tsk)) {
3915 "brcmf_watchdog thread failed to start\n");
3916 bus->watchdog_tsk = NULL;
3918 /* Initialize DPC thread */
3919 init_completion(&bus->dpc_wait);
3920 bus->dpc_tsk = kthread_run(brcmf_sdbrcm_dpc_thread,
3922 if (IS_ERR(bus->dpc_tsk)) {
3924 "brcmf_dpc thread failed to start\n");
3925 bus->dpc_tsk = NULL;
3928 /* Attach to the brcmf/OS/network interface */
3929 bus->drvr = brcmf_attach(bus, SDPCM_RESERVE, bus->sdiodev->dev);
3931 brcmf_dbg(ERROR, "brcmf_attach failed\n");
3935 /* Allocate buffers */
3936 if (!(brcmf_sdbrcm_probe_malloc(bus))) {
3937 brcmf_dbg(ERROR, "brcmf_sdbrcm_probe_malloc failed\n");
3941 if (!(brcmf_sdbrcm_probe_init(bus))) {
3942 brcmf_dbg(ERROR, "brcmf_sdbrcm_probe_init failed\n");
3946 /* Register interrupt callback, but mask it (not operational yet). */
3947 brcmf_dbg(INTR, "disable SDIO interrupts (not interested yet)\n");
3948 ret = brcmf_sdcard_intr_reg(bus->sdiodev);
3950 brcmf_dbg(ERROR, "FAILED: sdcard_intr_reg returned %d\n", ret);
3953 brcmf_dbg(INTR, "registered SDIO interrupt function ok\n");
3955 brcmf_dbg(INFO, "completed!!\n");
3957 /* if firmware path present try to download and bring up bus */
3958 ret = brcmf_bus_start(bus->drvr);
3960 if (ret == -ENOLINK) {
3961 brcmf_dbg(ERROR, "dongle is not responding\n");
3966 /* add interface and open for business */
3967 if (brcmf_add_if((struct brcmf_info *)bus->drvr, 0, "wlan%d", NULL)) {
3968 brcmf_dbg(ERROR, "Add primary net device interface failed!!\n");
3975 brcmf_sdbrcm_release(bus);
3979 void brcmf_sdbrcm_disconnect(void *ptr)
3981 struct brcmf_sdio *bus = (struct brcmf_sdio *)ptr;
3983 brcmf_dbg(TRACE, "Enter\n");
3986 brcmf_sdbrcm_release(bus);
3988 brcmf_dbg(TRACE, "Disconnected\n");
3991 struct device *brcmf_bus_get_device(struct brcmf_sdio *bus)
3993 return &bus->sdiodev->func[2]->dev;
3997 brcmf_sdbrcm_wd_timer(struct brcmf_sdio *bus, uint wdtick)
3999 /* Totally stop the timer */
4000 if (!wdtick && bus->wd_timer_valid == true) {
4001 del_timer_sync(&bus->timer);
4002 bus->wd_timer_valid = false;
4003 bus->save_ms = wdtick;
4007 /* don't start the wd until fw is loaded */
4008 if (bus->drvr->bus_if->state == BRCMF_BUS_DOWN)
4012 if (bus->save_ms != BRCMF_WD_POLL_MS) {
4013 if (bus->wd_timer_valid == true)
4014 /* Stop timer and restart at new value */
4015 del_timer_sync(&bus->timer);
4017 /* Create timer again when watchdog period is
4018 dynamically changed or in the first instance
4020 bus->timer.expires =
4021 jiffies + BRCMF_WD_POLL_MS * HZ / 1000;
4022 add_timer(&bus->timer);
4025 /* Re arm the timer, at last watchdog period */
4026 mod_timer(&bus->timer,
4027 jiffies + BRCMF_WD_POLL_MS * HZ / 1000);
4030 bus->wd_timer_valid = true;
4031 bus->save_ms = wdtick;
git.openpandora.org / pandora-kernel.git / blob