Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux
[pandora-kernel.git] / drivers / net / wireless / brcm80211 / brcmfmac / dhd_sdio.c
1 /*
2  * Copyright (c) 2010 Broadcom Corporation
3  *
4  * Permission to use, copy, modify, and/or distribute this software for any
5  * purpose with or without fee is hereby granted, provided that the above
6  * copyright notice and this permission notice appear in all copies.
7  *
8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
11  * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
13  * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
14  * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15  */
16
17 #include <linux/types.h>
18 #include <linux/kernel.h>
19 #include <linux/kthread.h>
20 #include <linux/printk.h>
21 #include <linux/pci_ids.h>
22 #include <linux/netdevice.h>
23 #include <linux/interrupt.h>
24 #include <linux/sched.h>
25 #include <linux/mmc/sdio.h>
26 #include <linux/mmc/sdio_func.h>
27 #include <linux/mmc/card.h>
28 #include <linux/semaphore.h>
29 #include <linux/firmware.h>
30 #include <linux/module.h>
31 #include <linux/bcma/bcma.h>
32 #include <asm/unaligned.h>
33 #include <defs.h>
34 #include <brcmu_wifi.h>
35 #include <brcmu_utils.h>
36 #include <brcm_hw_ids.h>
37 #include <soc.h>
38 #include "sdio_host.h"
39 #include "sdio_chip.h"
40
41 #define DCMD_RESP_TIMEOUT  2000 /* In milli second */
42
43 #ifdef BCMDBG
44
45 #define BRCMF_TRAP_INFO_SIZE    80
46
47 #define CBUF_LEN        (128)
48
49 struct rte_log_le {
50         __le32 buf;             /* Can't be pointer on (64-bit) hosts */
51         __le32 buf_size;
52         __le32 idx;
53         char *_buf_compat;      /* Redundant pointer for backward compat. */
54 };
55
56 struct rte_console {
57         /* Virtual UART
58          * When there is no UART (e.g. Quickturn),
59          * the host should write a complete
60          * input line directly into cbuf and then write
61          * the length into vcons_in.
62          * This may also be used when there is a real UART
63          * (at risk of conflicting with
64          * the real UART).  vcons_out is currently unused.
65          */
66         uint vcons_in;
67         uint vcons_out;
68
69         /* Output (logging) buffer
70          * Console output is written to a ring buffer log_buf at index log_idx.
71          * The host may read the output when it sees log_idx advance.
72          * Output will be lost if the output wraps around faster than the host
73          * polls.
74          */
75         struct rte_log_le log_le;
76
77         /* Console input line buffer
78          * Characters are read one at a time into cbuf
79          * until <CR> is received, then
80          * the buffer is processed as a command line.
81          * Also used for virtual UART.
82          */
83         uint cbuf_idx;
84         char cbuf[CBUF_LEN];
85 };
86
87 #endif                          /* BCMDBG */
88 #include <chipcommon.h>
89
90 #include "dhd.h"
91 #include "dhd_bus.h"
92 #include "dhd_proto.h"
93 #include "dhd_dbg.h"
94 #include <bcmchip.h>
95
96 #define TXQLEN          2048    /* bulk tx queue length */
97 #define TXHI            (TXQLEN - 256)  /* turn on flow control above TXHI */
98 #define TXLOW           (TXHI - 256)    /* turn off flow control below TXLOW */
99 #define PRIOMASK        7
100
101 #define TXRETRIES       2       /* # of retries for tx frames */
102
103 #define BRCMF_RXBOUND   50      /* Default for max rx frames in
104                                  one scheduling */
105
106 #define BRCMF_TXBOUND   20      /* Default for max tx frames in
107                                  one scheduling */
108
109 #define BRCMF_TXMINMAX  1       /* Max tx frames if rx still pending */
110
111 #define MEMBLOCK        2048    /* Block size used for downloading
112                                  of dongle image */
113 #define MAX_DATA_BUF    (32 * 1024)     /* Must be large enough to hold
114                                  biggest possible glom */
115
116 #define BRCMF_FIRSTREAD (1 << 6)
117
118
119 /* SBSDIO_DEVICE_CTL */
120
121 /* 1: device will assert busy signal when receiving CMD53 */
122 #define SBSDIO_DEVCTL_SETBUSY           0x01
123 /* 1: assertion of sdio interrupt is synchronous to the sdio clock */
124 #define SBSDIO_DEVCTL_SPI_INTR_SYNC     0x02
125 /* 1: mask all interrupts to host except the chipActive (rev 8) */
126 #define SBSDIO_DEVCTL_CA_INT_ONLY       0x04
127 /* 1: isolate internal sdio signals, put external pads in tri-state; requires
128  * sdio bus power cycle to clear (rev 9) */
129 #define SBSDIO_DEVCTL_PADS_ISO          0x08
130 /* Force SD->SB reset mapping (rev 11) */
131 #define SBSDIO_DEVCTL_SB_RST_CTL        0x30
132 /*   Determined by CoreControl bit */
133 #define SBSDIO_DEVCTL_RST_CORECTL       0x00
134 /*   Force backplane reset */
135 #define SBSDIO_DEVCTL_RST_BPRESET       0x10
136 /*   Force no backplane reset */
137 #define SBSDIO_DEVCTL_RST_NOBPRESET     0x20
138
139 /* direct(mapped) cis space */
140
141 /* MAPPED common CIS address */
142 #define SBSDIO_CIS_BASE_COMMON          0x1000
143 /* maximum bytes in one CIS */
144 #define SBSDIO_CIS_SIZE_LIMIT           0x200
145 /* cis offset addr is < 17 bits */
146 #define SBSDIO_CIS_OFT_ADDR_MASK        0x1FFFF
147
148 /* manfid tuple length, include tuple, link bytes */
149 #define SBSDIO_CIS_MANFID_TUPLE_LEN     6
150
151 /* intstatus */
152 #define I_SMB_SW0       (1 << 0)        /* To SB Mail S/W interrupt 0 */
153 #define I_SMB_SW1       (1 << 1)        /* To SB Mail S/W interrupt 1 */
154 #define I_SMB_SW2       (1 << 2)        /* To SB Mail S/W interrupt 2 */
155 #define I_SMB_SW3       (1 << 3)        /* To SB Mail S/W interrupt 3 */
156 #define I_SMB_SW_MASK   0x0000000f      /* To SB Mail S/W interrupts mask */
157 #define I_SMB_SW_SHIFT  0       /* To SB Mail S/W interrupts shift */
158 #define I_HMB_SW0       (1 << 4)        /* To Host Mail S/W interrupt 0 */
159 #define I_HMB_SW1       (1 << 5)        /* To Host Mail S/W interrupt 1 */
160 #define I_HMB_SW2       (1 << 6)        /* To Host Mail S/W interrupt 2 */
161 #define I_HMB_SW3       (1 << 7)        /* To Host Mail S/W interrupt 3 */
162 #define I_HMB_SW_MASK   0x000000f0      /* To Host Mail S/W interrupts mask */
163 #define I_HMB_SW_SHIFT  4       /* To Host Mail S/W interrupts shift */
164 #define I_WR_OOSYNC     (1 << 8)        /* Write Frame Out Of Sync */
165 #define I_RD_OOSYNC     (1 << 9)        /* Read Frame Out Of Sync */
166 #define I_PC            (1 << 10)       /* descriptor error */
167 #define I_PD            (1 << 11)       /* data error */
168 #define I_DE            (1 << 12)       /* Descriptor protocol Error */
169 #define I_RU            (1 << 13)       /* Receive descriptor Underflow */
170 #define I_RO            (1 << 14)       /* Receive fifo Overflow */
171 #define I_XU            (1 << 15)       /* Transmit fifo Underflow */
172 #define I_RI            (1 << 16)       /* Receive Interrupt */
173 #define I_BUSPWR        (1 << 17)       /* SDIO Bus Power Change (rev 9) */
174 #define I_XMTDATA_AVAIL (1 << 23)       /* bits in fifo */
175 #define I_XI            (1 << 24)       /* Transmit Interrupt */
176 #define I_RF_TERM       (1 << 25)       /* Read Frame Terminate */
177 #define I_WF_TERM       (1 << 26)       /* Write Frame Terminate */
178 #define I_PCMCIA_XU     (1 << 27)       /* PCMCIA Transmit FIFO Underflow */
179 #define I_SBINT         (1 << 28)       /* sbintstatus Interrupt */
180 #define I_CHIPACTIVE    (1 << 29)       /* chip from doze to active state */
181 #define I_SRESET        (1 << 30)       /* CCCR RES interrupt */
182 #define I_IOE2          (1U << 31)      /* CCCR IOE2 Bit Changed */
183 #define I_ERRORS        (I_PC | I_PD | I_DE | I_RU | I_RO | I_XU)
184 #define I_DMA           (I_RI | I_XI | I_ERRORS)
185
186 /* corecontrol */
187 #define CC_CISRDY               (1 << 0)        /* CIS Ready */
188 #define CC_BPRESEN              (1 << 1)        /* CCCR RES signal */
189 #define CC_F2RDY                (1 << 2)        /* set CCCR IOR2 bit */
190 #define CC_CLRPADSISO           (1 << 3)        /* clear SDIO pads isolation */
191 #define CC_XMTDATAAVAIL_MODE    (1 << 4)
192 #define CC_XMTDATAAVAIL_CTRL    (1 << 5)
193
194 /* SDA_FRAMECTRL */
195 #define SFC_RF_TERM     (1 << 0)        /* Read Frame Terminate */
196 #define SFC_WF_TERM     (1 << 1)        /* Write Frame Terminate */
197 #define SFC_CRC4WOOS    (1 << 2)        /* CRC error for write out of sync */
198 #define SFC_ABORTALL    (1 << 3)        /* Abort all in-progress frames */
199
200 /* HW frame tag */
201 #define SDPCM_FRAMETAG_LEN      4       /* 2 bytes len, 2 bytes check val */
202
203 /* Total length of frame header for dongle protocol */
204 #define SDPCM_HDRLEN    (SDPCM_FRAMETAG_LEN + SDPCM_SWHEADER_LEN)
205 #define SDPCM_RESERVE   (SDPCM_HDRLEN + BRCMF_SDALIGN)
206
207 /*
208  * Software allocation of To SB Mailbox resources
209  */
210
211 /* tosbmailbox bits corresponding to intstatus bits */
212 #define SMB_NAK         (1 << 0)        /* Frame NAK */
213 #define SMB_INT_ACK     (1 << 1)        /* Host Interrupt ACK */
214 #define SMB_USE_OOB     (1 << 2)        /* Use OOB Wakeup */
215 #define SMB_DEV_INT     (1 << 3)        /* Miscellaneous Interrupt */
216
217 /* tosbmailboxdata */
218 #define SMB_DATA_VERSION_SHIFT  16      /* host protocol version */
219
220 /*
221  * Software allocation of To Host Mailbox resources
222  */
223
224 /* intstatus bits */
225 #define I_HMB_FC_STATE  I_HMB_SW0       /* Flow Control State */
226 #define I_HMB_FC_CHANGE I_HMB_SW1       /* Flow Control State Changed */
227 #define I_HMB_FRAME_IND I_HMB_SW2       /* Frame Indication */
228 #define I_HMB_HOST_INT  I_HMB_SW3       /* Miscellaneous Interrupt */
229
230 /* tohostmailboxdata */
231 #define HMB_DATA_NAKHANDLED     1       /* retransmit NAK'd frame */
232 #define HMB_DATA_DEVREADY       2       /* talk to host after enable */
233 #define HMB_DATA_FC             4       /* per prio flowcontrol update flag */
234 #define HMB_DATA_FWREADY        8       /* fw ready for protocol activity */
235
236 #define HMB_DATA_FCDATA_MASK    0xff000000
237 #define HMB_DATA_FCDATA_SHIFT   24
238
239 #define HMB_DATA_VERSION_MASK   0x00ff0000
240 #define HMB_DATA_VERSION_SHIFT  16
241
242 /*
243  * Software-defined protocol header
244  */
245
246 /* Current protocol version */
247 #define SDPCM_PROT_VERSION      4
248
249 /* SW frame header */
250 #define SDPCM_PACKET_SEQUENCE(p)        (((u8 *)p)[0] & 0xff)
251
252 #define SDPCM_CHANNEL_MASK              0x00000f00
253 #define SDPCM_CHANNEL_SHIFT             8
254 #define SDPCM_PACKET_CHANNEL(p)         (((u8 *)p)[1] & 0x0f)
255
256 #define SDPCM_NEXTLEN_OFFSET            2
257
258 /* Data Offset from SOF (HW Tag, SW Tag, Pad) */
259 #define SDPCM_DOFFSET_OFFSET            3       /* Data Offset */
260 #define SDPCM_DOFFSET_VALUE(p)          (((u8 *)p)[SDPCM_DOFFSET_OFFSET] & 0xff)
261 #define SDPCM_DOFFSET_MASK              0xff000000
262 #define SDPCM_DOFFSET_SHIFT             24
263 #define SDPCM_FCMASK_OFFSET             4       /* Flow control */
264 #define SDPCM_FCMASK_VALUE(p)           (((u8 *)p)[SDPCM_FCMASK_OFFSET] & 0xff)
265 #define SDPCM_WINDOW_OFFSET             5       /* Credit based fc */
266 #define SDPCM_WINDOW_VALUE(p)           (((u8 *)p)[SDPCM_WINDOW_OFFSET] & 0xff)
267
268 #define SDPCM_SWHEADER_LEN      8       /* SW header is 64 bits */
269
270 /* logical channel numbers */
271 #define SDPCM_CONTROL_CHANNEL   0       /* Control channel Id */
272 #define SDPCM_EVENT_CHANNEL     1       /* Asyc Event Indication Channel Id */
273 #define SDPCM_DATA_CHANNEL      2       /* Data Xmit/Recv Channel Id */
274 #define SDPCM_GLOM_CHANNEL      3       /* For coalesced packets */
275 #define SDPCM_TEST_CHANNEL      15      /* Reserved for test/debug packets */
276
277 #define SDPCM_SEQUENCE_WRAP     256     /* wrap-around val for 8bit frame seq */
278
279 #define SDPCM_GLOMDESC(p)       (((u8 *)p)[1] & 0x80)
280
281 /*
282  * Shared structure between dongle and the host.
283  * The structure contains pointers to trap or assert information.
284  */
285 #define SDPCM_SHARED_VERSION       0x0002
286 #define SDPCM_SHARED_VERSION_MASK  0x00FF
287 #define SDPCM_SHARED_ASSERT_BUILT  0x0100
288 #define SDPCM_SHARED_ASSERT        0x0200
289 #define SDPCM_SHARED_TRAP          0x0400
290
291 /* Space for header read, limit for data packets */
292 #define MAX_HDR_READ    (1 << 6)
293 #define MAX_RX_DATASZ   2048
294
295 /* Maximum milliseconds to wait for F2 to come up */
296 #define BRCMF_WAIT_F2RDY        3000
297
298 /* Bump up limit on waiting for HT to account for first startup;
299  * if the image is doing a CRC calculation before programming the PMU
300  * for HT availability, it could take a couple hundred ms more, so
301  * max out at a 1 second (1000000us).
302  */
303 #undef PMU_MAX_TRANSITION_DLY
304 #define PMU_MAX_TRANSITION_DLY 1000000
305
306 /* Value for ChipClockCSR during initial setup */
307 #define BRCMF_INIT_CLKCTL1      (SBSDIO_FORCE_HW_CLKREQ_OFF |   \
308                                         SBSDIO_ALP_AVAIL_REQ)
309
310 /* Flags for SDH calls */
311 #define F2SYNC  (SDIO_REQ_4BYTE | SDIO_REQ_FIXED)
312
313 /*
314  * Conversion of 802.1D priority to precedence level
315  */
316 static uint prio2prec(u32 prio)
317 {
318         return (prio == PRIO_8021D_NONE || prio == PRIO_8021D_BE) ?
319                (prio^2) : prio;
320 }
321
322 /* core registers */
323 struct sdpcmd_regs {
324         u32 corecontrol;                /* 0x00, rev8 */
325         u32 corestatus;                 /* rev8 */
326         u32 PAD[1];
327         u32 biststatus;                 /* rev8 */
328
329         /* PCMCIA access */
330         u16 pcmciamesportaladdr;        /* 0x010, rev8 */
331         u16 PAD[1];
332         u16 pcmciamesportalmask;        /* rev8 */
333         u16 PAD[1];
334         u16 pcmciawrframebc;            /* rev8 */
335         u16 PAD[1];
336         u16 pcmciaunderflowtimer;       /* rev8 */
337         u16 PAD[1];
338
339         /* interrupt */
340         u32 intstatus;                  /* 0x020, rev8 */
341         u32 hostintmask;                /* rev8 */
342         u32 intmask;                    /* rev8 */
343         u32 sbintstatus;                /* rev8 */
344         u32 sbintmask;                  /* rev8 */
345         u32 funcintmask;                /* rev4 */
346         u32 PAD[2];
347         u32 tosbmailbox;                /* 0x040, rev8 */
348         u32 tohostmailbox;              /* rev8 */
349         u32 tosbmailboxdata;            /* rev8 */
350         u32 tohostmailboxdata;          /* rev8 */
351
352         /* synchronized access to registers in SDIO clock domain */
353         u32 sdioaccess;                 /* 0x050, rev8 */
354         u32 PAD[3];
355
356         /* PCMCIA frame control */
357         u8 pcmciaframectrl;             /* 0x060, rev8 */
358         u8 PAD[3];
359         u8 pcmciawatermark;             /* rev8 */
360         u8 PAD[155];
361
362         /* interrupt batching control */
363         u32 intrcvlazy;                 /* 0x100, rev8 */
364         u32 PAD[3];
365
366         /* counters */
367         u32 cmd52rd;                    /* 0x110, rev8 */
368         u32 cmd52wr;                    /* rev8 */
369         u32 cmd53rd;                    /* rev8 */
370         u32 cmd53wr;                    /* rev8 */
371         u32 abort;                      /* rev8 */
372         u32 datacrcerror;               /* rev8 */
373         u32 rdoutofsync;                /* rev8 */
374         u32 wroutofsync;                /* rev8 */
375         u32 writebusy;                  /* rev8 */
376         u32 readwait;                   /* rev8 */
377         u32 readterm;                   /* rev8 */
378         u32 writeterm;                  /* rev8 */
379         u32 PAD[40];
380         u32 clockctlstatus;             /* rev8 */
381         u32 PAD[7];
382
383         u32 PAD[128];                   /* DMA engines */
384
385         /* SDIO/PCMCIA CIS region */
386         char cis[512];                  /* 0x400-0x5ff, rev6 */
387
388         /* PCMCIA function control registers */
389         char pcmciafcr[256];            /* 0x600-6ff, rev6 */
390         u16 PAD[55];
391
392         /* PCMCIA backplane access */
393         u16 backplanecsr;               /* 0x76E, rev6 */
394         u16 backplaneaddr0;             /* rev6 */
395         u16 backplaneaddr1;             /* rev6 */
396         u16 backplaneaddr2;             /* rev6 */
397         u16 backplaneaddr3;             /* rev6 */
398         u16 backplanedata0;             /* rev6 */
399         u16 backplanedata1;             /* rev6 */
400         u16 backplanedata2;             /* rev6 */
401         u16 backplanedata3;             /* rev6 */
402         u16 PAD[31];
403
404         /* sprom "size" & "blank" info */
405         u16 spromstatus;                /* 0x7BE, rev2 */
406         u32 PAD[464];
407
408         u16 PAD[0x80];
409 };
410
411 #ifdef BCMDBG
412 /* Device console log buffer state */
413 struct brcmf_console {
414         uint count;             /* Poll interval msec counter */
415         uint log_addr;          /* Log struct address (fixed) */
416         struct rte_log_le log_le;       /* Log struct (host copy) */
417         uint bufsize;           /* Size of log buffer */
418         u8 *buf;                /* Log buffer (host copy) */
419         uint last;              /* Last buffer read index */
420 };
421 #endif                          /* BCMDBG */
422
423 struct sdpcm_shared {
424         u32 flags;
425         u32 trap_addr;
426         u32 assert_exp_addr;
427         u32 assert_file_addr;
428         u32 assert_line;
429         u32 console_addr;       /* Address of struct rte_console */
430         u32 msgtrace_addr;
431         u8 tag[32];
432 };
433
434 struct sdpcm_shared_le {
435         __le32 flags;
436         __le32 trap_addr;
437         __le32 assert_exp_addr;
438         __le32 assert_file_addr;
439         __le32 assert_line;
440         __le32 console_addr;    /* Address of struct rte_console */
441         __le32 msgtrace_addr;
442         u8 tag[32];
443 };
444
445
446 /* misc chip info needed by some of the routines */
447 /* Private data for SDIO bus interaction */
448 struct brcmf_bus {
449         struct brcmf_pub *drvr;
450
451         struct brcmf_sdio_dev *sdiodev; /* sdio device handler */
452         struct chip_info *ci;   /* Chip info struct */
453         char *vars;             /* Variables (from CIS and/or other) */
454         uint varsz;             /* Size of variables buffer */
455
456         u32 ramsize;            /* Size of RAM in SOCRAM (bytes) */
457
458         u32 hostintmask;        /* Copy of Host Interrupt Mask */
459         u32 intstatus;  /* Intstatus bits (events) pending */
460         bool dpc_sched;         /* Indicates DPC schedule (intrpt rcvd) */
461         bool fcstate;           /* State of dongle flow-control */
462
463         uint blocksize;         /* Block size of SDIO transfers */
464         uint roundup;           /* Max roundup limit */
465
466         struct pktq txq;        /* Queue length used for flow-control */
467         u8 flowcontrol; /* per prio flow control bitmask */
468         u8 tx_seq;              /* Transmit sequence number (next) */
469         u8 tx_max;              /* Maximum transmit sequence allowed */
470
471         u8 hdrbuf[MAX_HDR_READ + BRCMF_SDALIGN];
472         u8 *rxhdr;              /* Header of current rx frame (in hdrbuf) */
473         u16 nextlen;            /* Next Read Len from last header */
474         u8 rx_seq;              /* Receive sequence number (expected) */
475         bool rxskip;            /* Skip receive (awaiting NAK ACK) */
476
477         uint rxbound;           /* Rx frames to read before resched */
478         uint txbound;           /* Tx frames to send before resched */
479         uint txminmax;
480
481         struct sk_buff *glomd;  /* Packet containing glomming descriptor */
482         struct sk_buff_head glom; /* Packet list for glommed superframe */
483         uint glomerr;           /* Glom packet read errors */
484
485         u8 *rxbuf;              /* Buffer for receiving control packets */
486         uint rxblen;            /* Allocated length of rxbuf */
487         u8 *rxctl;              /* Aligned pointer into rxbuf */
488         u8 *databuf;            /* Buffer for receiving big glom packet */
489         u8 *dataptr;            /* Aligned pointer into databuf */
490         uint rxlen;             /* Length of valid data in buffer */
491
492         u8 sdpcm_ver;   /* Bus protocol reported by dongle */
493
494         bool intr;              /* Use interrupts */
495         bool poll;              /* Use polling */
496         bool ipend;             /* Device interrupt is pending */
497         uint intrcount;         /* Count of device interrupt callbacks */
498         uint lastintrs;         /* Count as of last watchdog timer */
499         uint spurious;          /* Count of spurious interrupts */
500         uint pollrate;          /* Ticks between device polls */
501         uint polltick;          /* Tick counter */
502         uint pollcnt;           /* Count of active polls */
503
504 #ifdef BCMDBG
505         uint console_interval;
506         struct brcmf_console console;   /* Console output polling support */
507         uint console_addr;      /* Console address from shared struct */
508 #endif                          /* BCMDBG */
509
510         uint regfails;          /* Count of R_REG failures */
511
512         uint clkstate;          /* State of sd and backplane clock(s) */
513         bool activity;          /* Activity flag for clock down */
514         s32 idletime;           /* Control for activity timeout */
515         s32 idlecount;  /* Activity timeout counter */
516         s32 idleclock;  /* How to set bus driver when idle */
517         s32 sd_rxchain;
518         bool use_rxchain;       /* If brcmf should use PKT chains */
519         bool sleeping;          /* Is SDIO bus sleeping? */
520         bool rxflow_mode;       /* Rx flow control mode */
521         bool rxflow;            /* Is rx flow control on */
522         bool alp_only;          /* Don't use HT clock (ALP only) */
523 /* Field to decide if rx of control frames happen in rxbuf or lb-pool */
524         bool usebufpool;
525
526         /* Some additional counters */
527         uint tx_sderrs;         /* Count of tx attempts with sd errors */
528         uint fcqueued;          /* Tx packets that got queued */
529         uint rxrtx;             /* Count of rtx requests (NAK to dongle) */
530         uint rx_toolong;        /* Receive frames too long to receive */
531         uint rxc_errors;        /* SDIO errors when reading control frames */
532         uint rx_hdrfail;        /* SDIO errors on header reads */
533         uint rx_badhdr;         /* Bad received headers (roosync?) */
534         uint rx_badseq;         /* Mismatched rx sequence number */
535         uint fc_rcvd;           /* Number of flow-control events received */
536         uint fc_xoff;           /* Number which turned on flow-control */
537         uint fc_xon;            /* Number which turned off flow-control */
538         uint rxglomfail;        /* Failed deglom attempts */
539         uint rxglomframes;      /* Number of glom frames (superframes) */
540         uint rxglompkts;        /* Number of packets from glom frames */
541         uint f2rxhdrs;          /* Number of header reads */
542         uint f2rxdata;          /* Number of frame data reads */
543         uint f2txdata;          /* Number of f2 frame writes */
544         uint f1regdata;         /* Number of f1 register accesses */
545
546         u8 *ctrl_frame_buf;
547         u32 ctrl_frame_len;
548         bool ctrl_frame_stat;
549
550         spinlock_t txqlock;
551         wait_queue_head_t ctrl_wait;
552         wait_queue_head_t dcmd_resp_wait;
553
554         struct timer_list timer;
555         struct completion watchdog_wait;
556         struct task_struct *watchdog_tsk;
557         bool wd_timer_valid;
558         uint save_ms;
559
560         struct task_struct *dpc_tsk;
561         struct completion dpc_wait;
562
563         struct semaphore sdsem;
564
565         const char *fw_name;
566         const struct firmware *firmware;
567         const char *nv_name;
568         u32 fw_ptr;
569 };
570
571 /* clkstate */
572 #define CLK_NONE        0
573 #define CLK_SDONLY      1
574 #define CLK_PENDING     2       /* Not used yet */
575 #define CLK_AVAIL       3
576
577 #ifdef BCMDBG
578 static int qcount[NUMPRIO];
579 static int tx_packets[NUMPRIO];
580 #endif                          /* BCMDBG */
581
582 #define SDIO_DRIVE_STRENGTH     6       /* in milliamps */
583
584 #define RETRYCHAN(chan) ((chan) == SDPCM_EVENT_CHANNEL)
585
586 /* Retry count for register access failures */
587 static const uint retry_limit = 2;
588
589 /* Limit on rounding up frames */
590 static const uint max_roundup = 512;
591
592 #define ALIGNMENT  4
593
594 static void pkt_align(struct sk_buff *p, int len, int align)
595 {
596         uint datalign;
597         datalign = (unsigned long)(p->data);
598         datalign = roundup(datalign, (align)) - datalign;
599         if (datalign)
600                 skb_pull(p, datalign);
601         __skb_trim(p, len);
602 }
603
604 /* To check if there's window offered */
605 static bool data_ok(struct brcmf_bus *bus)
606 {
607         return (u8)(bus->tx_max - bus->tx_seq) != 0 &&
608                ((u8)(bus->tx_max - bus->tx_seq) & 0x80) == 0;
609 }
610
611 /*
612  * Reads a register in the SDIO hardware block. This block occupies a series of
613  * adresses on the 32 bit backplane bus.
614  */
615 static void
616 r_sdreg32(struct brcmf_bus *bus, u32 *regvar, u32 reg_offset, u32 *retryvar)
617 {
618         u8 idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV);
619         *retryvar = 0;
620         do {
621                 *regvar = brcmf_sdcard_reg_read(bus->sdiodev,
622                                 bus->ci->c_inf[idx].base + reg_offset,
623                                 sizeof(u32));
624         } while (brcmf_sdcard_regfail(bus->sdiodev) &&
625                  (++(*retryvar) <= retry_limit));
626         if (*retryvar) {
627                 bus->regfails += (*retryvar-1);
628                 if (*retryvar > retry_limit) {
629                         brcmf_dbg(ERROR, "FAILED READ %Xh\n", reg_offset);
630                         *regvar = 0;
631                 }
632         }
633 }
634
635 static void
636 w_sdreg32(struct brcmf_bus *bus, u32 regval, u32 reg_offset, u32 *retryvar)
637 {
638         u8 idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV);
639         *retryvar = 0;
640         do {
641                 brcmf_sdcard_reg_write(bus->sdiodev,
642                                        bus->ci->c_inf[idx].base + reg_offset,
643                                        sizeof(u32), regval);
644         } while (brcmf_sdcard_regfail(bus->sdiodev) &&
645                  (++(*retryvar) <= retry_limit));
646         if (*retryvar) {
647                 bus->regfails += (*retryvar-1);
648                 if (*retryvar > retry_limit)
649                         brcmf_dbg(ERROR, "FAILED REGISTER WRITE %Xh\n",
650                                   reg_offset);
651         }
652 }
653
654 #define PKT_AVAILABLE()         (intstatus & I_HMB_FRAME_IND)
655
656 #define HOSTINTMASK             (I_HMB_SW_MASK | I_CHIPACTIVE)
657
658 /* Packet free applicable unconditionally for sdio and sdspi.
659  * Conditional if bufpool was present for gspi bus.
660  */
661 static void brcmf_sdbrcm_pktfree2(struct brcmf_bus *bus, struct sk_buff *pkt)
662 {
663         if (bus->usebufpool)
664                 brcmu_pkt_buf_free_skb(pkt);
665 }
666
667 /* Turn backplane clock on or off */
668 static int brcmf_sdbrcm_htclk(struct brcmf_bus *bus, bool on, bool pendok)
669 {
670         int err;
671         u8 clkctl, clkreq, devctl;
672         unsigned long timeout;
673
674         brcmf_dbg(TRACE, "Enter\n");
675
676         clkctl = 0;
677
678         if (on) {
679                 /* Request HT Avail */
680                 clkreq =
681                     bus->alp_only ? SBSDIO_ALP_AVAIL_REQ : SBSDIO_HT_AVAIL_REQ;
682
683                 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
684                                        SBSDIO_FUNC1_CHIPCLKCSR, clkreq, &err);
685                 if (err) {
686                         brcmf_dbg(ERROR, "HT Avail request error: %d\n", err);
687                         return -EBADE;
688                 }
689
690                 /* Check current status */
691                 clkctl = brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1,
692                                                SBSDIO_FUNC1_CHIPCLKCSR, &err);
693                 if (err) {
694                         brcmf_dbg(ERROR, "HT Avail read error: %d\n", err);
695                         return -EBADE;
696                 }
697
698                 /* Go to pending and await interrupt if appropriate */
699                 if (!SBSDIO_CLKAV(clkctl, bus->alp_only) && pendok) {
700                         /* Allow only clock-available interrupt */
701                         devctl = brcmf_sdcard_cfg_read(bus->sdiodev,
702                                         SDIO_FUNC_1,
703                                         SBSDIO_DEVICE_CTL, &err);
704                         if (err) {
705                                 brcmf_dbg(ERROR, "Devctl error setting CA: %d\n",
706                                           err);
707                                 return -EBADE;
708                         }
709
710                         devctl |= SBSDIO_DEVCTL_CA_INT_ONLY;
711                         brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
712                                                SBSDIO_DEVICE_CTL, devctl, &err);
713                         brcmf_dbg(INFO, "CLKCTL: set PENDING\n");
714                         bus->clkstate = CLK_PENDING;
715
716                         return 0;
717                 } else if (bus->clkstate == CLK_PENDING) {
718                         /* Cancel CA-only interrupt filter */
719                         devctl =
720                             brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1,
721                                                   SBSDIO_DEVICE_CTL, &err);
722                         devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
723                         brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
724                                 SBSDIO_DEVICE_CTL, devctl, &err);
725                 }
726
727                 /* Otherwise, wait here (polling) for HT Avail */
728                 timeout = jiffies +
729                           msecs_to_jiffies(PMU_MAX_TRANSITION_DLY/1000);
730                 while (!SBSDIO_CLKAV(clkctl, bus->alp_only)) {
731                         clkctl = brcmf_sdcard_cfg_read(bus->sdiodev,
732                                                        SDIO_FUNC_1,
733                                                        SBSDIO_FUNC1_CHIPCLKCSR,
734                                                        &err);
735                         if (time_after(jiffies, timeout))
736                                 break;
737                         else
738                                 usleep_range(5000, 10000);
739                 }
740                 if (err) {
741                         brcmf_dbg(ERROR, "HT Avail request error: %d\n", err);
742                         return -EBADE;
743                 }
744                 if (!SBSDIO_CLKAV(clkctl, bus->alp_only)) {
745                         brcmf_dbg(ERROR, "HT Avail timeout (%d): clkctl 0x%02x\n",
746                                   PMU_MAX_TRANSITION_DLY, clkctl);
747                         return -EBADE;
748                 }
749
750                 /* Mark clock available */
751                 bus->clkstate = CLK_AVAIL;
752                 brcmf_dbg(INFO, "CLKCTL: turned ON\n");
753
754 #if defined(BCMDBG)
755                 if (bus->alp_only != true) {
756                         if (SBSDIO_ALPONLY(clkctl))
757                                 brcmf_dbg(ERROR, "HT Clock should be on\n");
758                 }
759 #endif                          /* defined (BCMDBG) */
760
761                 bus->activity = true;
762         } else {
763                 clkreq = 0;
764
765                 if (bus->clkstate == CLK_PENDING) {
766                         /* Cancel CA-only interrupt filter */
767                         devctl = brcmf_sdcard_cfg_read(bus->sdiodev,
768                                         SDIO_FUNC_1,
769                                         SBSDIO_DEVICE_CTL, &err);
770                         devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
771                         brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
772                                 SBSDIO_DEVICE_CTL, devctl, &err);
773                 }
774
775                 bus->clkstate = CLK_SDONLY;
776                 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
777                         SBSDIO_FUNC1_CHIPCLKCSR, clkreq, &err);
778                 brcmf_dbg(INFO, "CLKCTL: turned OFF\n");
779                 if (err) {
780                         brcmf_dbg(ERROR, "Failed access turning clock off: %d\n",
781                                   err);
782                         return -EBADE;
783                 }
784         }
785         return 0;
786 }
787
788 /* Change idle/active SD state */
789 static int brcmf_sdbrcm_sdclk(struct brcmf_bus *bus, bool on)
790 {
791         brcmf_dbg(TRACE, "Enter\n");
792
793         if (on)
794                 bus->clkstate = CLK_SDONLY;
795         else
796                 bus->clkstate = CLK_NONE;
797
798         return 0;
799 }
800
801 /* Transition SD and backplane clock readiness */
802 static int brcmf_sdbrcm_clkctl(struct brcmf_bus *bus, uint target, bool pendok)
803 {
804 #ifdef BCMDBG
805         uint oldstate = bus->clkstate;
806 #endif                          /* BCMDBG */
807
808         brcmf_dbg(TRACE, "Enter\n");
809
810         /* Early exit if we're already there */
811         if (bus->clkstate == target) {
812                 if (target == CLK_AVAIL) {
813                         brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS);
814                         bus->activity = true;
815                 }
816                 return 0;
817         }
818
819         switch (target) {
820         case CLK_AVAIL:
821                 /* Make sure SD clock is available */
822                 if (bus->clkstate == CLK_NONE)
823                         brcmf_sdbrcm_sdclk(bus, true);
824                 /* Now request HT Avail on the backplane */
825                 brcmf_sdbrcm_htclk(bus, true, pendok);
826                 brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS);
827                 bus->activity = true;
828                 break;
829
830         case CLK_SDONLY:
831                 /* Remove HT request, or bring up SD clock */
832                 if (bus->clkstate == CLK_NONE)
833                         brcmf_sdbrcm_sdclk(bus, true);
834                 else if (bus->clkstate == CLK_AVAIL)
835                         brcmf_sdbrcm_htclk(bus, false, false);
836                 else
837                         brcmf_dbg(ERROR, "request for %d -> %d\n",
838                                   bus->clkstate, target);
839                 brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS);
840                 break;
841
842         case CLK_NONE:
843                 /* Make sure to remove HT request */
844                 if (bus->clkstate == CLK_AVAIL)
845                         brcmf_sdbrcm_htclk(bus, false, false);
846                 /* Now remove the SD clock */
847                 brcmf_sdbrcm_sdclk(bus, false);
848                 brcmf_sdbrcm_wd_timer(bus, 0);
849                 break;
850         }
851 #ifdef BCMDBG
852         brcmf_dbg(INFO, "%d -> %d\n", oldstate, bus->clkstate);
853 #endif                          /* BCMDBG */
854
855         return 0;
856 }
857
858 static int brcmf_sdbrcm_bussleep(struct brcmf_bus *bus, bool sleep)
859 {
860         uint retries = 0;
861
862         brcmf_dbg(INFO, "request %s (currently %s)\n",
863                   sleep ? "SLEEP" : "WAKE",
864                   bus->sleeping ? "SLEEP" : "WAKE");
865
866         /* Done if we're already in the requested state */
867         if (sleep == bus->sleeping)
868                 return 0;
869
870         /* Going to sleep: set the alarm and turn off the lights... */
871         if (sleep) {
872                 /* Don't sleep if something is pending */
873                 if (bus->dpc_sched || bus->rxskip || pktq_len(&bus->txq))
874                         return -EBUSY;
875
876                 /* Make sure the controller has the bus up */
877                 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
878
879                 /* Tell device to start using OOB wakeup */
880                 w_sdreg32(bus, SMB_USE_OOB,
881                           offsetof(struct sdpcmd_regs, tosbmailbox), &retries);
882                 if (retries > retry_limit)
883                         brcmf_dbg(ERROR, "CANNOT SIGNAL CHIP, WILL NOT WAKE UP!!\n");
884
885                 /* Turn off our contribution to the HT clock request */
886                 brcmf_sdbrcm_clkctl(bus, CLK_SDONLY, false);
887
888                 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
889                         SBSDIO_FUNC1_CHIPCLKCSR,
890                         SBSDIO_FORCE_HW_CLKREQ_OFF, NULL);
891
892                 /* Isolate the bus */
893                 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
894                         SBSDIO_DEVICE_CTL,
895                         SBSDIO_DEVCTL_PADS_ISO, NULL);
896
897                 /* Change state */
898                 bus->sleeping = true;
899
900         } else {
901                 /* Waking up: bus power up is ok, set local state */
902
903                 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
904                         SBSDIO_FUNC1_CHIPCLKCSR, 0, NULL);
905
906                 /* Make sure the controller has the bus up */
907                 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
908
909                 /* Send misc interrupt to indicate OOB not needed */
910                 w_sdreg32(bus, 0, offsetof(struct sdpcmd_regs, tosbmailboxdata),
911                           &retries);
912                 if (retries <= retry_limit)
913                         w_sdreg32(bus, SMB_DEV_INT,
914                                   offsetof(struct sdpcmd_regs, tosbmailbox),
915                                   &retries);
916
917                 if (retries > retry_limit)
918                         brcmf_dbg(ERROR, "CANNOT SIGNAL CHIP TO CLEAR OOB!!\n");
919
920                 /* Make sure we have SD bus access */
921                 brcmf_sdbrcm_clkctl(bus, CLK_SDONLY, false);
922
923                 /* Change state */
924                 bus->sleeping = false;
925         }
926
927         return 0;
928 }
929
930 static void bus_wake(struct brcmf_bus *bus)
931 {
932         if (bus->sleeping)
933                 brcmf_sdbrcm_bussleep(bus, false);
934 }
935
936 static u32 brcmf_sdbrcm_hostmail(struct brcmf_bus *bus)
937 {
938         u32 intstatus = 0;
939         u32 hmb_data;
940         u8 fcbits;
941         uint retries = 0;
942
943         brcmf_dbg(TRACE, "Enter\n");
944
945         /* Read mailbox data and ack that we did so */
946         r_sdreg32(bus, &hmb_data,
947                   offsetof(struct sdpcmd_regs, tohostmailboxdata), &retries);
948
949         if (retries <= retry_limit)
950                 w_sdreg32(bus, SMB_INT_ACK,
951                           offsetof(struct sdpcmd_regs, tosbmailbox), &retries);
952         bus->f1regdata += 2;
953
954         /* Dongle recomposed rx frames, accept them again */
955         if (hmb_data & HMB_DATA_NAKHANDLED) {
956                 brcmf_dbg(INFO, "Dongle reports NAK handled, expect rtx of %d\n",
957                           bus->rx_seq);
958                 if (!bus->rxskip)
959                         brcmf_dbg(ERROR, "unexpected NAKHANDLED!\n");
960
961                 bus->rxskip = false;
962                 intstatus |= I_HMB_FRAME_IND;
963         }
964
965         /*
966          * DEVREADY does not occur with gSPI.
967          */
968         if (hmb_data & (HMB_DATA_DEVREADY | HMB_DATA_FWREADY)) {
969                 bus->sdpcm_ver =
970                     (hmb_data & HMB_DATA_VERSION_MASK) >>
971                     HMB_DATA_VERSION_SHIFT;
972                 if (bus->sdpcm_ver != SDPCM_PROT_VERSION)
973                         brcmf_dbg(ERROR, "Version mismatch, dongle reports %d, "
974                                   "expecting %d\n",
975                                   bus->sdpcm_ver, SDPCM_PROT_VERSION);
976                 else
977                         brcmf_dbg(INFO, "Dongle ready, protocol version %d\n",
978                                   bus->sdpcm_ver);
979         }
980
981         /*
982          * Flow Control has been moved into the RX headers and this out of band
983          * method isn't used any more.
984          * remaining backward compatible with older dongles.
985          */
986         if (hmb_data & HMB_DATA_FC) {
987                 fcbits = (hmb_data & HMB_DATA_FCDATA_MASK) >>
988                                                         HMB_DATA_FCDATA_SHIFT;
989
990                 if (fcbits & ~bus->flowcontrol)
991                         bus->fc_xoff++;
992
993                 if (bus->flowcontrol & ~fcbits)
994                         bus->fc_xon++;
995
996                 bus->fc_rcvd++;
997                 bus->flowcontrol = fcbits;
998         }
999
1000         /* Shouldn't be any others */
1001         if (hmb_data & ~(HMB_DATA_DEVREADY |
1002                          HMB_DATA_NAKHANDLED |
1003                          HMB_DATA_FC |
1004                          HMB_DATA_FWREADY |
1005                          HMB_DATA_FCDATA_MASK | HMB_DATA_VERSION_MASK))
1006                 brcmf_dbg(ERROR, "Unknown mailbox data content: 0x%02x\n",
1007                           hmb_data);
1008
1009         return intstatus;
1010 }
1011
1012 static void brcmf_sdbrcm_rxfail(struct brcmf_bus *bus, bool abort, bool rtx)
1013 {
1014         uint retries = 0;
1015         u16 lastrbc;
1016         u8 hi, lo;
1017         int err;
1018
1019         brcmf_dbg(ERROR, "%sterminate frame%s\n",
1020                   abort ? "abort command, " : "",
1021                   rtx ? ", send NAK" : "");
1022
1023         if (abort)
1024                 brcmf_sdcard_abort(bus->sdiodev, SDIO_FUNC_2);
1025
1026         brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
1027                                SBSDIO_FUNC1_FRAMECTRL,
1028                                SFC_RF_TERM, &err);
1029         bus->f1regdata++;
1030
1031         /* Wait until the packet has been flushed (device/FIFO stable) */
1032         for (lastrbc = retries = 0xffff; retries > 0; retries--) {
1033                 hi = brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1,
1034                                            SBSDIO_FUNC1_RFRAMEBCHI, NULL);
1035                 lo = brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1,
1036                                            SBSDIO_FUNC1_RFRAMEBCLO, NULL);
1037                 bus->f1regdata += 2;
1038
1039                 if ((hi == 0) && (lo == 0))
1040                         break;
1041
1042                 if ((hi > (lastrbc >> 8)) && (lo > (lastrbc & 0x00ff))) {
1043                         brcmf_dbg(ERROR, "count growing: last 0x%04x now 0x%04x\n",
1044                                   lastrbc, (hi << 8) + lo);
1045                 }
1046                 lastrbc = (hi << 8) + lo;
1047         }
1048
1049         if (!retries)
1050                 brcmf_dbg(ERROR, "count never zeroed: last 0x%04x\n", lastrbc);
1051         else
1052                 brcmf_dbg(INFO, "flush took %d iterations\n", 0xffff - retries);
1053
1054         if (rtx) {
1055                 bus->rxrtx++;
1056                 w_sdreg32(bus, SMB_NAK,
1057                           offsetof(struct sdpcmd_regs, tosbmailbox), &retries);
1058
1059                 bus->f1regdata++;
1060                 if (retries <= retry_limit)
1061                         bus->rxskip = true;
1062         }
1063
1064         /* Clear partial in any case */
1065         bus->nextlen = 0;
1066
1067         /* If we can't reach the device, signal failure */
1068         if (err || brcmf_sdcard_regfail(bus->sdiodev))
1069                 bus->drvr->busstate = BRCMF_BUS_DOWN;
1070 }
1071
1072 /* copy a buffer into a pkt buffer chain */
1073 static uint brcmf_sdbrcm_glom_from_buf(struct brcmf_bus *bus, uint len)
1074 {
1075         uint n, ret = 0;
1076         struct sk_buff *p;
1077         u8 *buf;
1078
1079         buf = bus->dataptr;
1080
1081         /* copy the data */
1082         skb_queue_walk(&bus->glom, p) {
1083                 n = min_t(uint, p->len, len);
1084                 memcpy(p->data, buf, n);
1085                 buf += n;
1086                 len -= n;
1087                 ret += n;
1088                 if (!len)
1089                         break;
1090         }
1091
1092         return ret;
1093 }
1094
1095 /* return total length of buffer chain */
1096 static uint brcmf_sdbrcm_glom_len(struct brcmf_bus *bus)
1097 {
1098         struct sk_buff *p;
1099         uint total;
1100
1101         total = 0;
1102         skb_queue_walk(&bus->glom, p)
1103                 total += p->len;
1104         return total;
1105 }
1106
1107 static void brcmf_sdbrcm_free_glom(struct brcmf_bus *bus)
1108 {
1109         struct sk_buff *cur, *next;
1110
1111         skb_queue_walk_safe(&bus->glom, cur, next) {
1112                 skb_unlink(cur, &bus->glom);
1113                 brcmu_pkt_buf_free_skb(cur);
1114         }
1115 }
1116
1117 static u8 brcmf_sdbrcm_rxglom(struct brcmf_bus *bus, u8 rxseq)
1118 {
1119         u16 dlen, totlen;
1120         u8 *dptr, num = 0;
1121
1122         u16 sublen, check;
1123         struct sk_buff *pfirst, *plast, *pnext, *save_pfirst;
1124
1125         int errcode;
1126         u8 chan, seq, doff, sfdoff;
1127         u8 txmax;
1128
1129         int ifidx = 0;
1130         bool usechain = bus->use_rxchain;
1131
1132         /* If packets, issue read(s) and send up packet chain */
1133         /* Return sequence numbers consumed? */
1134
1135         brcmf_dbg(TRACE, "start: glomd %p glom %p\n",
1136                   bus->glomd, skb_peek(&bus->glom));
1137
1138         /* If there's a descriptor, generate the packet chain */
1139         if (bus->glomd) {
1140                 pfirst = plast = pnext = NULL;
1141                 dlen = (u16) (bus->glomd->len);
1142                 dptr = bus->glomd->data;
1143                 if (!dlen || (dlen & 1)) {
1144                         brcmf_dbg(ERROR, "bad glomd len(%d), ignore descriptor\n",
1145                                   dlen);
1146                         dlen = 0;
1147                 }
1148
1149                 for (totlen = num = 0; dlen; num++) {
1150                         /* Get (and move past) next length */
1151                         sublen = get_unaligned_le16(dptr);
1152                         dlen -= sizeof(u16);
1153                         dptr += sizeof(u16);
1154                         if ((sublen < SDPCM_HDRLEN) ||
1155                             ((num == 0) && (sublen < (2 * SDPCM_HDRLEN)))) {
1156                                 brcmf_dbg(ERROR, "descriptor len %d bad: %d\n",
1157                                           num, sublen);
1158                                 pnext = NULL;
1159                                 break;
1160                         }
1161                         if (sublen % BRCMF_SDALIGN) {
1162                                 brcmf_dbg(ERROR, "sublen %d not multiple of %d\n",
1163                                           sublen, BRCMF_SDALIGN);
1164                                 usechain = false;
1165                         }
1166                         totlen += sublen;
1167
1168                         /* For last frame, adjust read len so total
1169                                  is a block multiple */
1170                         if (!dlen) {
1171                                 sublen +=
1172                                     (roundup(totlen, bus->blocksize) - totlen);
1173                                 totlen = roundup(totlen, bus->blocksize);
1174                         }
1175
1176                         /* Allocate/chain packet for next subframe */
1177                         pnext = brcmu_pkt_buf_get_skb(sublen + BRCMF_SDALIGN);
1178                         if (pnext == NULL) {
1179                                 brcmf_dbg(ERROR, "bcm_pkt_buf_get_skb failed, num %d len %d\n",
1180                                           num, sublen);
1181                                 break;
1182                         }
1183                         skb_queue_tail(&bus->glom, pnext);
1184
1185                         /* Adhere to start alignment requirements */
1186                         pkt_align(pnext, sublen, BRCMF_SDALIGN);
1187                 }
1188
1189                 /* If all allocations succeeded, save packet chain
1190                          in bus structure */
1191                 if (pnext) {
1192                         brcmf_dbg(GLOM, "allocated %d-byte packet chain for %d subframes\n",
1193                                   totlen, num);
1194                         if (BRCMF_GLOM_ON() && bus->nextlen &&
1195                             totlen != bus->nextlen) {
1196                                 brcmf_dbg(GLOM, "glomdesc mismatch: nextlen %d glomdesc %d rxseq %d\n",
1197                                           bus->nextlen, totlen, rxseq);
1198                         }
1199                         pfirst = pnext = NULL;
1200                 } else {
1201                         brcmf_sdbrcm_free_glom(bus);
1202                         num = 0;
1203                 }
1204
1205                 /* Done with descriptor packet */
1206                 brcmu_pkt_buf_free_skb(bus->glomd);
1207                 bus->glomd = NULL;
1208                 bus->nextlen = 0;
1209         }
1210
1211         /* Ok -- either we just generated a packet chain,
1212                  or had one from before */
1213         if (!skb_queue_empty(&bus->glom)) {
1214                 if (BRCMF_GLOM_ON()) {
1215                         brcmf_dbg(GLOM, "try superframe read, packet chain:\n");
1216                         skb_queue_walk(&bus->glom, pnext) {
1217                                 brcmf_dbg(GLOM, "    %p: %p len 0x%04x (%d)\n",
1218                                           pnext, (u8 *) (pnext->data),
1219                                           pnext->len, pnext->len);
1220                         }
1221                 }
1222
1223                 pfirst = skb_peek(&bus->glom);
1224                 dlen = (u16) brcmf_sdbrcm_glom_len(bus);
1225
1226                 /* Do an SDIO read for the superframe.  Configurable iovar to
1227                  * read directly into the chained packet, or allocate a large
1228                  * packet and and copy into the chain.
1229                  */
1230                 if (usechain) {
1231                         errcode = brcmf_sdcard_recv_buf(bus->sdiodev,
1232                                         bus->sdiodev->sbwad,
1233                                         SDIO_FUNC_2,
1234                                         F2SYNC, (u8 *) pfirst->data, dlen,
1235                                         pfirst);
1236                 } else if (bus->dataptr) {
1237                         errcode = brcmf_sdcard_recv_buf(bus->sdiodev,
1238                                         bus->sdiodev->sbwad,
1239                                         SDIO_FUNC_2,
1240                                         F2SYNC, bus->dataptr, dlen,
1241                                         NULL);
1242                         sublen = (u16) brcmf_sdbrcm_glom_from_buf(bus, dlen);
1243                         if (sublen != dlen) {
1244                                 brcmf_dbg(ERROR, "FAILED TO COPY, dlen %d sublen %d\n",
1245                                           dlen, sublen);
1246                                 errcode = -1;
1247                         }
1248                         pnext = NULL;
1249                 } else {
1250                         brcmf_dbg(ERROR, "COULDN'T ALLOC %d-BYTE GLOM, FORCE FAILURE\n",
1251                                   dlen);
1252                         errcode = -1;
1253                 }
1254                 bus->f2rxdata++;
1255
1256                 /* On failure, kill the superframe, allow a couple retries */
1257                 if (errcode < 0) {
1258                         brcmf_dbg(ERROR, "glom read of %d bytes failed: %d\n",
1259                                   dlen, errcode);
1260                         bus->drvr->rx_errors++;
1261
1262                         if (bus->glomerr++ < 3) {
1263                                 brcmf_sdbrcm_rxfail(bus, true, true);
1264                         } else {
1265                                 bus->glomerr = 0;
1266                                 brcmf_sdbrcm_rxfail(bus, true, false);
1267                                 bus->rxglomfail++;
1268                                 brcmf_sdbrcm_free_glom(bus);
1269                         }
1270                         return 0;
1271                 }
1272 #ifdef BCMDBG
1273                 if (BRCMF_GLOM_ON()) {
1274                         printk(KERN_DEBUG "SUPERFRAME:\n");
1275                         print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
1276                                 pfirst->data, min_t(int, pfirst->len, 48));
1277                 }
1278 #endif
1279
1280                 /* Validate the superframe header */
1281                 dptr = (u8 *) (pfirst->data);
1282                 sublen = get_unaligned_le16(dptr);
1283                 check = get_unaligned_le16(dptr + sizeof(u16));
1284
1285                 chan = SDPCM_PACKET_CHANNEL(&dptr[SDPCM_FRAMETAG_LEN]);
1286                 seq = SDPCM_PACKET_SEQUENCE(&dptr[SDPCM_FRAMETAG_LEN]);
1287                 bus->nextlen = dptr[SDPCM_FRAMETAG_LEN + SDPCM_NEXTLEN_OFFSET];
1288                 if ((bus->nextlen << 4) > MAX_RX_DATASZ) {
1289                         brcmf_dbg(INFO, "nextlen too large (%d) seq %d\n",
1290                                   bus->nextlen, seq);
1291                         bus->nextlen = 0;
1292                 }
1293                 doff = SDPCM_DOFFSET_VALUE(&dptr[SDPCM_FRAMETAG_LEN]);
1294                 txmax = SDPCM_WINDOW_VALUE(&dptr[SDPCM_FRAMETAG_LEN]);
1295
1296                 errcode = 0;
1297                 if ((u16)~(sublen ^ check)) {
1298                         brcmf_dbg(ERROR, "(superframe): HW hdr error: len/check 0x%04x/0x%04x\n",
1299                                   sublen, check);
1300                         errcode = -1;
1301                 } else if (roundup(sublen, bus->blocksize) != dlen) {
1302                         brcmf_dbg(ERROR, "(superframe): len 0x%04x, rounded 0x%04x, expect 0x%04x\n",
1303                                   sublen, roundup(sublen, bus->blocksize),
1304                                   dlen);
1305                         errcode = -1;
1306                 } else if (SDPCM_PACKET_CHANNEL(&dptr[SDPCM_FRAMETAG_LEN]) !=
1307                            SDPCM_GLOM_CHANNEL) {
1308                         brcmf_dbg(ERROR, "(superframe): bad channel %d\n",
1309                                   SDPCM_PACKET_CHANNEL(
1310                                           &dptr[SDPCM_FRAMETAG_LEN]));
1311                         errcode = -1;
1312                 } else if (SDPCM_GLOMDESC(&dptr[SDPCM_FRAMETAG_LEN])) {
1313                         brcmf_dbg(ERROR, "(superframe): got 2nd descriptor?\n");
1314                         errcode = -1;
1315                 } else if ((doff < SDPCM_HDRLEN) ||
1316                            (doff > (pfirst->len - SDPCM_HDRLEN))) {
1317                         brcmf_dbg(ERROR, "(superframe): Bad data offset %d: HW %d pkt %d min %d\n",
1318                                   doff, sublen, pfirst->len, SDPCM_HDRLEN);
1319                         errcode = -1;
1320                 }
1321
1322                 /* Check sequence number of superframe SW header */
1323                 if (rxseq != seq) {
1324                         brcmf_dbg(INFO, "(superframe) rx_seq %d, expected %d\n",
1325                                   seq, rxseq);
1326                         bus->rx_badseq++;
1327                         rxseq = seq;
1328                 }
1329
1330                 /* Check window for sanity */
1331                 if ((u8) (txmax - bus->tx_seq) > 0x40) {
1332                         brcmf_dbg(ERROR, "unlikely tx max %d with tx_seq %d\n",
1333                                   txmax, bus->tx_seq);
1334                         txmax = bus->tx_seq + 2;
1335                 }
1336                 bus->tx_max = txmax;
1337
1338                 /* Remove superframe header, remember offset */
1339                 skb_pull(pfirst, doff);
1340                 sfdoff = doff;
1341
1342                 /* Validate all the subframe headers */
1343                 for (num = 0, pnext = pfirst; pnext && !errcode;
1344                      num++, pnext = pnext->next) {
1345                         dptr = (u8 *) (pnext->data);
1346                         dlen = (u16) (pnext->len);
1347                         sublen = get_unaligned_le16(dptr);
1348                         check = get_unaligned_le16(dptr + sizeof(u16));
1349                         chan = SDPCM_PACKET_CHANNEL(&dptr[SDPCM_FRAMETAG_LEN]);
1350                         doff = SDPCM_DOFFSET_VALUE(&dptr[SDPCM_FRAMETAG_LEN]);
1351 #ifdef BCMDBG
1352                         if (BRCMF_GLOM_ON()) {
1353                                 printk(KERN_DEBUG "subframe:\n");
1354                                 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
1355                                                      dptr, 32);
1356                         }
1357 #endif
1358
1359                         if ((u16)~(sublen ^ check)) {
1360                                 brcmf_dbg(ERROR, "(subframe %d): HW hdr error: len/check 0x%04x/0x%04x\n",
1361                                           num, sublen, check);
1362                                 errcode = -1;
1363                         } else if ((sublen > dlen) || (sublen < SDPCM_HDRLEN)) {
1364                                 brcmf_dbg(ERROR, "(subframe %d): length mismatch: len 0x%04x, expect 0x%04x\n",
1365                                           num, sublen, dlen);
1366                                 errcode = -1;
1367                         } else if ((chan != SDPCM_DATA_CHANNEL) &&
1368                                    (chan != SDPCM_EVENT_CHANNEL)) {
1369                                 brcmf_dbg(ERROR, "(subframe %d): bad channel %d\n",
1370                                           num, chan);
1371                                 errcode = -1;
1372                         } else if ((doff < SDPCM_HDRLEN) || (doff > sublen)) {
1373                                 brcmf_dbg(ERROR, "(subframe %d): Bad data offset %d: HW %d min %d\n",
1374                                           num, doff, sublen, SDPCM_HDRLEN);
1375                                 errcode = -1;
1376                         }
1377                 }
1378
1379                 if (errcode) {
1380                         /* Terminate frame on error, request
1381                                  a couple retries */
1382                         if (bus->glomerr++ < 3) {
1383                                 /* Restore superframe header space */
1384                                 skb_push(pfirst, sfdoff);
1385                                 brcmf_sdbrcm_rxfail(bus, true, true);
1386                         } else {
1387                                 bus->glomerr = 0;
1388                                 brcmf_sdbrcm_rxfail(bus, true, false);
1389                                 bus->rxglomfail++;
1390                                 brcmf_sdbrcm_free_glom(bus);
1391                         }
1392                         bus->nextlen = 0;
1393                         return 0;
1394                 }
1395
1396                 /* Basic SD framing looks ok - process each packet (header) */
1397                 save_pfirst = pfirst;
1398                 plast = NULL;
1399
1400                 for (num = 0; pfirst; rxseq++, pfirst = pnext) {
1401                         pnext = pfirst->next;
1402                         pfirst->next = NULL;
1403
1404                         dptr = (u8 *) (pfirst->data);
1405                         sublen = get_unaligned_le16(dptr);
1406                         chan = SDPCM_PACKET_CHANNEL(&dptr[SDPCM_FRAMETAG_LEN]);
1407                         seq = SDPCM_PACKET_SEQUENCE(&dptr[SDPCM_FRAMETAG_LEN]);
1408                         doff = SDPCM_DOFFSET_VALUE(&dptr[SDPCM_FRAMETAG_LEN]);
1409
1410                         brcmf_dbg(GLOM, "Get subframe %d, %p(%p/%d), sublen %d chan %d seq %d\n",
1411                                   num, pfirst, pfirst->data,
1412                                   pfirst->len, sublen, chan, seq);
1413
1414                         /* precondition: chan == SDPCM_DATA_CHANNEL ||
1415                                          chan == SDPCM_EVENT_CHANNEL */
1416
1417                         if (rxseq != seq) {
1418                                 brcmf_dbg(GLOM, "rx_seq %d, expected %d\n",
1419                                           seq, rxseq);
1420                                 bus->rx_badseq++;
1421                                 rxseq = seq;
1422                         }
1423 #ifdef BCMDBG
1424                         if (BRCMF_BYTES_ON() && BRCMF_DATA_ON()) {
1425                                 printk(KERN_DEBUG "Rx Subframe Data:\n");
1426                                 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
1427                                                      dptr, dlen);
1428                         }
1429 #endif
1430
1431                         __skb_trim(pfirst, sublen);
1432                         skb_pull(pfirst, doff);
1433
1434                         if (pfirst->len == 0) {
1435                                 brcmu_pkt_buf_free_skb(pfirst);
1436                                 if (plast)
1437                                         plast->next = pnext;
1438                                 else
1439                                         save_pfirst = pnext;
1440
1441                                 continue;
1442                         } else if (brcmf_proto_hdrpull(bus->drvr, &ifidx,
1443                                                        pfirst) != 0) {
1444                                 brcmf_dbg(ERROR, "rx protocol error\n");
1445                                 bus->drvr->rx_errors++;
1446                                 brcmu_pkt_buf_free_skb(pfirst);
1447                                 if (plast)
1448                                         plast->next = pnext;
1449                                 else
1450                                         save_pfirst = pnext;
1451
1452                                 continue;
1453                         }
1454
1455                         /* this packet will go up, link back into
1456                                  chain and count it */
1457                         pfirst->next = pnext;
1458                         plast = pfirst;
1459                         num++;
1460
1461 #ifdef BCMDBG
1462                         if (BRCMF_GLOM_ON()) {
1463                                 brcmf_dbg(GLOM, "subframe %d to stack, %p (%p/%d) nxt/lnk %p/%p\n",
1464                                           num, pfirst, pfirst->data,
1465                                           pfirst->len, pfirst->next,
1466                                           pfirst->prev);
1467                                 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
1468                                                 pfirst->data,
1469                                                 min_t(int, pfirst->len, 32));
1470                         }
1471 #endif                          /* BCMDBG */
1472                 }
1473                 if (num) {
1474                         up(&bus->sdsem);
1475                         brcmf_rx_frame(bus->drvr, ifidx, save_pfirst, num);
1476                         down(&bus->sdsem);
1477                 }
1478
1479                 bus->rxglomframes++;
1480                 bus->rxglompkts += num;
1481         }
1482         return num;
1483 }
1484
1485 static int brcmf_sdbrcm_dcmd_resp_wait(struct brcmf_bus *bus, uint *condition,
1486                                         bool *pending)
1487 {
1488         DECLARE_WAITQUEUE(wait, current);
1489         int timeout = msecs_to_jiffies(DCMD_RESP_TIMEOUT);
1490
1491         /* Wait until control frame is available */
1492         add_wait_queue(&bus->dcmd_resp_wait, &wait);
1493         set_current_state(TASK_INTERRUPTIBLE);
1494
1495         while (!(*condition) && (!signal_pending(current) && timeout))
1496                 timeout = schedule_timeout(timeout);
1497
1498         if (signal_pending(current))
1499                 *pending = true;
1500
1501         set_current_state(TASK_RUNNING);
1502         remove_wait_queue(&bus->dcmd_resp_wait, &wait);
1503
1504         return timeout;
1505 }
1506
1507 static int brcmf_sdbrcm_dcmd_resp_wake(struct brcmf_bus *bus)
1508 {
1509         if (waitqueue_active(&bus->dcmd_resp_wait))
1510                 wake_up_interruptible(&bus->dcmd_resp_wait);
1511
1512         return 0;
1513 }
1514 static void
1515 brcmf_sdbrcm_read_control(struct brcmf_bus *bus, u8 *hdr, uint len, uint doff)
1516 {
1517         uint rdlen, pad;
1518
1519         int sdret;
1520
1521         brcmf_dbg(TRACE, "Enter\n");
1522
1523         /* Set rxctl for frame (w/optional alignment) */
1524         bus->rxctl = bus->rxbuf;
1525         bus->rxctl += BRCMF_FIRSTREAD;
1526         pad = ((unsigned long)bus->rxctl % BRCMF_SDALIGN);
1527         if (pad)
1528                 bus->rxctl += (BRCMF_SDALIGN - pad);
1529         bus->rxctl -= BRCMF_FIRSTREAD;
1530
1531         /* Copy the already-read portion over */
1532         memcpy(bus->rxctl, hdr, BRCMF_FIRSTREAD);
1533         if (len <= BRCMF_FIRSTREAD)
1534                 goto gotpkt;
1535
1536         /* Raise rdlen to next SDIO block to avoid tail command */
1537         rdlen = len - BRCMF_FIRSTREAD;
1538         if (bus->roundup && bus->blocksize && (rdlen > bus->blocksize)) {
1539                 pad = bus->blocksize - (rdlen % bus->blocksize);
1540                 if ((pad <= bus->roundup) && (pad < bus->blocksize) &&
1541                     ((len + pad) < bus->drvr->maxctl))
1542                         rdlen += pad;
1543         } else if (rdlen % BRCMF_SDALIGN) {
1544                 rdlen += BRCMF_SDALIGN - (rdlen % BRCMF_SDALIGN);
1545         }
1546
1547         /* Satisfy length-alignment requirements */
1548         if (rdlen & (ALIGNMENT - 1))
1549                 rdlen = roundup(rdlen, ALIGNMENT);
1550
1551         /* Drop if the read is too big or it exceeds our maximum */
1552         if ((rdlen + BRCMF_FIRSTREAD) > bus->drvr->maxctl) {
1553                 brcmf_dbg(ERROR, "%d-byte control read exceeds %d-byte buffer\n",
1554                           rdlen, bus->drvr->maxctl);
1555                 bus->drvr->rx_errors++;
1556                 brcmf_sdbrcm_rxfail(bus, false, false);
1557                 goto done;
1558         }
1559
1560         if ((len - doff) > bus->drvr->maxctl) {
1561                 brcmf_dbg(ERROR, "%d-byte ctl frame (%d-byte ctl data) exceeds %d-byte limit\n",
1562                           len, len - doff, bus->drvr->maxctl);
1563                 bus->drvr->rx_errors++;
1564                 bus->rx_toolong++;
1565                 brcmf_sdbrcm_rxfail(bus, false, false);
1566                 goto done;
1567         }
1568
1569         /* Read remainder of frame body into the rxctl buffer */
1570         sdret = brcmf_sdcard_recv_buf(bus->sdiodev,
1571                                 bus->sdiodev->sbwad,
1572                                 SDIO_FUNC_2,
1573                                 F2SYNC, (bus->rxctl + BRCMF_FIRSTREAD), rdlen,
1574                                 NULL);
1575         bus->f2rxdata++;
1576
1577         /* Control frame failures need retransmission */
1578         if (sdret < 0) {
1579                 brcmf_dbg(ERROR, "read %d control bytes failed: %d\n",
1580                           rdlen, sdret);
1581                 bus->rxc_errors++;
1582                 brcmf_sdbrcm_rxfail(bus, true, true);
1583                 goto done;
1584         }
1585
1586 gotpkt:
1587
1588 #ifdef BCMDBG
1589         if (BRCMF_BYTES_ON() && BRCMF_CTL_ON()) {
1590                 printk(KERN_DEBUG "RxCtrl:\n");
1591                 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET, bus->rxctl, len);
1592         }
1593 #endif
1594
1595         /* Point to valid data and indicate its length */
1596         bus->rxctl += doff;
1597         bus->rxlen = len - doff;
1598
1599 done:
1600         /* Awake any waiters */
1601         brcmf_sdbrcm_dcmd_resp_wake(bus);
1602 }
1603
1604 /* Pad read to blocksize for efficiency */
1605 static void brcmf_pad(struct brcmf_bus *bus, u16 *pad, u16 *rdlen)
1606 {
1607         if (bus->roundup && bus->blocksize && *rdlen > bus->blocksize) {
1608                 *pad = bus->blocksize - (*rdlen % bus->blocksize);
1609                 if (*pad <= bus->roundup && *pad < bus->blocksize &&
1610                     *rdlen + *pad + BRCMF_FIRSTREAD < MAX_RX_DATASZ)
1611                         *rdlen += *pad;
1612         } else if (*rdlen % BRCMF_SDALIGN) {
1613                 *rdlen += BRCMF_SDALIGN - (*rdlen % BRCMF_SDALIGN);
1614         }
1615 }
1616
1617 static void
1618 brcmf_alloc_pkt_and_read(struct brcmf_bus *bus, u16 rdlen,
1619                          struct sk_buff **pkt, u8 **rxbuf)
1620 {
1621         int sdret;              /* Return code from calls */
1622
1623         *pkt = brcmu_pkt_buf_get_skb(rdlen + BRCMF_SDALIGN);
1624         if (*pkt == NULL)
1625                 return;
1626
1627         pkt_align(*pkt, rdlen, BRCMF_SDALIGN);
1628         *rxbuf = (u8 *) ((*pkt)->data);
1629         /* Read the entire frame */
1630         sdret = brcmf_sdcard_recv_buf(bus->sdiodev, bus->sdiodev->sbwad,
1631                                       SDIO_FUNC_2, F2SYNC,
1632                                       *rxbuf, rdlen, *pkt);
1633         bus->f2rxdata++;
1634
1635         if (sdret < 0) {
1636                 brcmf_dbg(ERROR, "(nextlen): read %d bytes failed: %d\n",
1637                           rdlen, sdret);
1638                 brcmu_pkt_buf_free_skb(*pkt);
1639                 bus->drvr->rx_errors++;
1640                 /* Force retry w/normal header read.
1641                  * Don't attempt NAK for
1642                  * gSPI
1643                  */
1644                 brcmf_sdbrcm_rxfail(bus, true, true);
1645                 *pkt = NULL;
1646         }
1647 }
1648
1649 /* Checks the header */
1650 static int
1651 brcmf_check_rxbuf(struct brcmf_bus *bus, struct sk_buff *pkt, u8 *rxbuf,
1652                   u8 rxseq, u16 nextlen, u16 *len)
1653 {
1654         u16 check;
1655         bool len_consistent;    /* Result of comparing readahead len and
1656                                    len from hw-hdr */
1657
1658         memcpy(bus->rxhdr, rxbuf, SDPCM_HDRLEN);
1659
1660         /* Extract hardware header fields */
1661         *len = get_unaligned_le16(bus->rxhdr);
1662         check = get_unaligned_le16(bus->rxhdr + sizeof(u16));
1663
1664         /* All zeros means readahead info was bad */
1665         if (!(*len | check)) {
1666                 brcmf_dbg(INFO, "(nextlen): read zeros in HW header???\n");
1667                 goto fail;
1668         }
1669
1670         /* Validate check bytes */
1671         if ((u16)~(*len ^ check)) {
1672                 brcmf_dbg(ERROR, "(nextlen): HW hdr error: nextlen/len/check 0x%04x/0x%04x/0x%04x\n",
1673                           nextlen, *len, check);
1674                 bus->rx_badhdr++;
1675                 brcmf_sdbrcm_rxfail(bus, false, false);
1676                 goto fail;
1677         }
1678
1679         /* Validate frame length */
1680         if (*len < SDPCM_HDRLEN) {
1681                 brcmf_dbg(ERROR, "(nextlen): HW hdr length invalid: %d\n",
1682                           *len);
1683                 goto fail;
1684         }
1685
1686         /* Check for consistency with readahead info */
1687         len_consistent = (nextlen != (roundup(*len, 16) >> 4));
1688         if (len_consistent) {
1689                 /* Mismatch, force retry w/normal
1690                         header (may be >4K) */
1691                 brcmf_dbg(ERROR, "(nextlen): mismatch, nextlen %d len %d rnd %d; expected rxseq %d\n",
1692                           nextlen, *len, roundup(*len, 16),
1693                           rxseq);
1694                 brcmf_sdbrcm_rxfail(bus, true, true);
1695                 goto fail;
1696         }
1697
1698         return 0;
1699
1700 fail:
1701         brcmf_sdbrcm_pktfree2(bus, pkt);
1702         return -EINVAL;
1703 }
1704
1705 /* Return true if there may be more frames to read */
1706 static uint
1707 brcmf_sdbrcm_readframes(struct brcmf_bus *bus, uint maxframes, bool *finished)
1708 {
1709         u16 len, check; /* Extracted hardware header fields */
1710         u8 chan, seq, doff;     /* Extracted software header fields */
1711         u8 fcbits;              /* Extracted fcbits from software header */
1712
1713         struct sk_buff *pkt;            /* Packet for event or data frames */
1714         u16 pad;                /* Number of pad bytes to read */
1715         u16 rdlen;              /* Total number of bytes to read */
1716         u8 rxseq;               /* Next sequence number to expect */
1717         uint rxleft = 0;        /* Remaining number of frames allowed */
1718         int sdret;              /* Return code from calls */
1719         u8 txmax;               /* Maximum tx sequence offered */
1720         u8 *rxbuf;
1721         int ifidx = 0;
1722         uint rxcount = 0;       /* Total frames read */
1723
1724         brcmf_dbg(TRACE, "Enter\n");
1725
1726         /* Not finished unless we encounter no more frames indication */
1727         *finished = false;
1728
1729         for (rxseq = bus->rx_seq, rxleft = maxframes;
1730              !bus->rxskip && rxleft && bus->drvr->busstate != BRCMF_BUS_DOWN;
1731              rxseq++, rxleft--) {
1732
1733                 /* Handle glomming separately */
1734                 if (bus->glomd || !skb_queue_empty(&bus->glom)) {
1735                         u8 cnt;
1736                         brcmf_dbg(GLOM, "calling rxglom: glomd %p, glom %p\n",
1737                                   bus->glomd, skb_peek(&bus->glom));
1738                         cnt = brcmf_sdbrcm_rxglom(bus, rxseq);
1739                         brcmf_dbg(GLOM, "rxglom returned %d\n", cnt);
1740                         rxseq += cnt - 1;
1741                         rxleft = (rxleft > cnt) ? (rxleft - cnt) : 1;
1742                         continue;
1743                 }
1744
1745                 /* Try doing single read if we can */
1746                 if (bus->nextlen) {
1747                         u16 nextlen = bus->nextlen;
1748                         bus->nextlen = 0;
1749
1750                         rdlen = len = nextlen << 4;
1751                         brcmf_pad(bus, &pad, &rdlen);
1752
1753                         /*
1754                          * After the frame is received we have to
1755                          * distinguish whether it is data
1756                          * or non-data frame.
1757                          */
1758                         brcmf_alloc_pkt_and_read(bus, rdlen, &pkt, &rxbuf);
1759                         if (pkt == NULL) {
1760                                 /* Give up on data, request rtx of events */
1761                                 brcmf_dbg(ERROR, "(nextlen): brcmf_alloc_pkt_and_read failed: len %d rdlen %d expected rxseq %d\n",
1762                                           len, rdlen, rxseq);
1763                                 continue;
1764                         }
1765
1766                         if (brcmf_check_rxbuf(bus, pkt, rxbuf, rxseq, nextlen,
1767                                               &len) < 0)
1768                                 continue;
1769
1770                         /* Extract software header fields */
1771                         chan = SDPCM_PACKET_CHANNEL(
1772                                         &bus->rxhdr[SDPCM_FRAMETAG_LEN]);
1773                         seq = SDPCM_PACKET_SEQUENCE(
1774                                         &bus->rxhdr[SDPCM_FRAMETAG_LEN]);
1775                         doff = SDPCM_DOFFSET_VALUE(
1776                                         &bus->rxhdr[SDPCM_FRAMETAG_LEN]);
1777                         txmax = SDPCM_WINDOW_VALUE(
1778                                         &bus->rxhdr[SDPCM_FRAMETAG_LEN]);
1779
1780                         bus->nextlen =
1781                             bus->rxhdr[SDPCM_FRAMETAG_LEN +
1782                                        SDPCM_NEXTLEN_OFFSET];
1783                         if ((bus->nextlen << 4) > MAX_RX_DATASZ) {
1784                                 brcmf_dbg(INFO, "(nextlen): got frame w/nextlen too large (%d), seq %d\n",
1785                                           bus->nextlen, seq);
1786                                 bus->nextlen = 0;
1787                         }
1788
1789                         bus->drvr->rx_readahead_cnt++;
1790
1791                         /* Handle Flow Control */
1792                         fcbits = SDPCM_FCMASK_VALUE(
1793                                         &bus->rxhdr[SDPCM_FRAMETAG_LEN]);
1794
1795                         if (bus->flowcontrol != fcbits) {
1796                                 if (~bus->flowcontrol & fcbits)
1797                                         bus->fc_xoff++;
1798
1799                                 if (bus->flowcontrol & ~fcbits)
1800                                         bus->fc_xon++;
1801
1802                                 bus->fc_rcvd++;
1803                                 bus->flowcontrol = fcbits;
1804                         }
1805
1806                         /* Check and update sequence number */
1807                         if (rxseq != seq) {
1808                                 brcmf_dbg(INFO, "(nextlen): rx_seq %d, expected %d\n",
1809                                           seq, rxseq);
1810                                 bus->rx_badseq++;
1811                                 rxseq = seq;
1812                         }
1813
1814                         /* Check window for sanity */
1815                         if ((u8) (txmax - bus->tx_seq) > 0x40) {
1816                                 brcmf_dbg(ERROR, "got unlikely tx max %d with tx_seq %d\n",
1817                                           txmax, bus->tx_seq);
1818                                 txmax = bus->tx_seq + 2;
1819                         }
1820                         bus->tx_max = txmax;
1821
1822 #ifdef BCMDBG
1823                         if (BRCMF_BYTES_ON() && BRCMF_DATA_ON()) {
1824                                 printk(KERN_DEBUG "Rx Data:\n");
1825                                 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
1826                                                      rxbuf, len);
1827                         } else if (BRCMF_HDRS_ON()) {
1828                                 printk(KERN_DEBUG "RxHdr:\n");
1829                                 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
1830                                                      bus->rxhdr, SDPCM_HDRLEN);
1831                         }
1832 #endif
1833
1834                         if (chan == SDPCM_CONTROL_CHANNEL) {
1835                                 brcmf_dbg(ERROR, "(nextlen): readahead on control packet %d?\n",
1836                                           seq);
1837                                 /* Force retry w/normal header read */
1838                                 bus->nextlen = 0;
1839                                 brcmf_sdbrcm_rxfail(bus, false, true);
1840                                 brcmf_sdbrcm_pktfree2(bus, pkt);
1841                                 continue;
1842                         }
1843
1844                         /* Validate data offset */
1845                         if ((doff < SDPCM_HDRLEN) || (doff > len)) {
1846                                 brcmf_dbg(ERROR, "(nextlen): bad data offset %d: HW len %d min %d\n",
1847                                           doff, len, SDPCM_HDRLEN);
1848                                 brcmf_sdbrcm_rxfail(bus, false, false);
1849                                 brcmf_sdbrcm_pktfree2(bus, pkt);
1850                                 continue;
1851                         }
1852
1853                         /* All done with this one -- now deliver the packet */
1854                         goto deliver;
1855                 }
1856
1857                 /* Read frame header (hardware and software) */
1858                 sdret = brcmf_sdcard_recv_buf(bus->sdiodev, bus->sdiodev->sbwad,
1859                                               SDIO_FUNC_2, F2SYNC, bus->rxhdr,
1860                                               BRCMF_FIRSTREAD, NULL);
1861                 bus->f2rxhdrs++;
1862
1863                 if (sdret < 0) {
1864                         brcmf_dbg(ERROR, "RXHEADER FAILED: %d\n", sdret);
1865                         bus->rx_hdrfail++;
1866                         brcmf_sdbrcm_rxfail(bus, true, true);
1867                         continue;
1868                 }
1869 #ifdef BCMDBG
1870                 if (BRCMF_BYTES_ON() || BRCMF_HDRS_ON()) {
1871                         printk(KERN_DEBUG "RxHdr:\n");
1872                         print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
1873                                              bus->rxhdr, SDPCM_HDRLEN);
1874                 }
1875 #endif
1876
1877                 /* Extract hardware header fields */
1878                 len = get_unaligned_le16(bus->rxhdr);
1879                 check = get_unaligned_le16(bus->rxhdr + sizeof(u16));
1880
1881                 /* All zeros means no more frames */
1882                 if (!(len | check)) {
1883                         *finished = true;
1884                         break;
1885                 }
1886
1887                 /* Validate check bytes */
1888                 if ((u16) ~(len ^ check)) {
1889                         brcmf_dbg(ERROR, "HW hdr err: len/check 0x%04x/0x%04x\n",
1890                                   len, check);
1891                         bus->rx_badhdr++;
1892                         brcmf_sdbrcm_rxfail(bus, false, false);
1893                         continue;
1894                 }
1895
1896                 /* Validate frame length */
1897                 if (len < SDPCM_HDRLEN) {
1898                         brcmf_dbg(ERROR, "HW hdr length invalid: %d\n", len);
1899                         continue;
1900                 }
1901
1902                 /* Extract software header fields */
1903                 chan = SDPCM_PACKET_CHANNEL(&bus->rxhdr[SDPCM_FRAMETAG_LEN]);
1904                 seq = SDPCM_PACKET_SEQUENCE(&bus->rxhdr[SDPCM_FRAMETAG_LEN]);
1905                 doff = SDPCM_DOFFSET_VALUE(&bus->rxhdr[SDPCM_FRAMETAG_LEN]);
1906                 txmax = SDPCM_WINDOW_VALUE(&bus->rxhdr[SDPCM_FRAMETAG_LEN]);
1907
1908                 /* Validate data offset */
1909                 if ((doff < SDPCM_HDRLEN) || (doff > len)) {
1910                         brcmf_dbg(ERROR, "Bad data offset %d: HW len %d, min %d seq %d\n",
1911                                   doff, len, SDPCM_HDRLEN, seq);
1912                         bus->rx_badhdr++;
1913                         brcmf_sdbrcm_rxfail(bus, false, false);
1914                         continue;
1915                 }
1916
1917                 /* Save the readahead length if there is one */
1918                 bus->nextlen =
1919                     bus->rxhdr[SDPCM_FRAMETAG_LEN + SDPCM_NEXTLEN_OFFSET];
1920                 if ((bus->nextlen << 4) > MAX_RX_DATASZ) {
1921                         brcmf_dbg(INFO, "(nextlen): got frame w/nextlen too large (%d), seq %d\n",
1922                                   bus->nextlen, seq);
1923                         bus->nextlen = 0;
1924                 }
1925
1926                 /* Handle Flow Control */
1927                 fcbits = SDPCM_FCMASK_VALUE(&bus->rxhdr[SDPCM_FRAMETAG_LEN]);
1928
1929                 if (bus->flowcontrol != fcbits) {
1930                         if (~bus->flowcontrol & fcbits)
1931                                 bus->fc_xoff++;
1932
1933                         if (bus->flowcontrol & ~fcbits)
1934                                 bus->fc_xon++;
1935
1936                         bus->fc_rcvd++;
1937                         bus->flowcontrol = fcbits;
1938                 }
1939
1940                 /* Check and update sequence number */
1941                 if (rxseq != seq) {
1942                         brcmf_dbg(INFO, "rx_seq %d, expected %d\n", seq, rxseq);
1943                         bus->rx_badseq++;
1944                         rxseq = seq;
1945                 }
1946
1947                 /* Check window for sanity */
1948                 if ((u8) (txmax - bus->tx_seq) > 0x40) {
1949                         brcmf_dbg(ERROR, "unlikely tx max %d with tx_seq %d\n",
1950                                   txmax, bus->tx_seq);
1951                         txmax = bus->tx_seq + 2;
1952                 }
1953                 bus->tx_max = txmax;
1954
1955                 /* Call a separate function for control frames */
1956                 if (chan == SDPCM_CONTROL_CHANNEL) {
1957                         brcmf_sdbrcm_read_control(bus, bus->rxhdr, len, doff);
1958                         continue;
1959                 }
1960
1961                 /* precondition: chan is either SDPCM_DATA_CHANNEL,
1962                    SDPCM_EVENT_CHANNEL, SDPCM_TEST_CHANNEL or
1963                    SDPCM_GLOM_CHANNEL */
1964
1965                 /* Length to read */
1966                 rdlen = (len > BRCMF_FIRSTREAD) ? (len - BRCMF_FIRSTREAD) : 0;
1967
1968                 /* May pad read to blocksize for efficiency */
1969                 if (bus->roundup && bus->blocksize &&
1970                         (rdlen > bus->blocksize)) {
1971                         pad = bus->blocksize - (rdlen % bus->blocksize);
1972                         if ((pad <= bus->roundup) && (pad < bus->blocksize) &&
1973                             ((rdlen + pad + BRCMF_FIRSTREAD) < MAX_RX_DATASZ))
1974                                 rdlen += pad;
1975                 } else if (rdlen % BRCMF_SDALIGN) {
1976                         rdlen += BRCMF_SDALIGN - (rdlen % BRCMF_SDALIGN);
1977                 }
1978
1979                 /* Satisfy length-alignment requirements */
1980                 if (rdlen & (ALIGNMENT - 1))
1981                         rdlen = roundup(rdlen, ALIGNMENT);
1982
1983                 if ((rdlen + BRCMF_FIRSTREAD) > MAX_RX_DATASZ) {
1984                         /* Too long -- skip this frame */
1985                         brcmf_dbg(ERROR, "too long: len %d rdlen %d\n",
1986                                   len, rdlen);
1987                         bus->drvr->rx_errors++;
1988                         bus->rx_toolong++;
1989                         brcmf_sdbrcm_rxfail(bus, false, false);
1990                         continue;
1991                 }
1992
1993                 pkt = brcmu_pkt_buf_get_skb(rdlen +
1994                                             BRCMF_FIRSTREAD + BRCMF_SDALIGN);
1995                 if (!pkt) {
1996                         /* Give up on data, request rtx of events */
1997                         brcmf_dbg(ERROR, "brcmu_pkt_buf_get_skb failed: rdlen %d chan %d\n",
1998                                   rdlen, chan);
1999                         bus->drvr->rx_dropped++;
2000                         brcmf_sdbrcm_rxfail(bus, false, RETRYCHAN(chan));
2001                         continue;
2002                 }
2003
2004                 /* Leave room for what we already read, and align remainder */
2005                 skb_pull(pkt, BRCMF_FIRSTREAD);
2006                 pkt_align(pkt, rdlen, BRCMF_SDALIGN);
2007
2008                 /* Read the remaining frame data */
2009                 sdret = brcmf_sdcard_recv_buf(bus->sdiodev, bus->sdiodev->sbwad,
2010                                 SDIO_FUNC_2, F2SYNC, ((u8 *) (pkt->data)),
2011                                 rdlen, pkt);
2012                 bus->f2rxdata++;
2013
2014                 if (sdret < 0) {
2015                         brcmf_dbg(ERROR, "read %d %s bytes failed: %d\n", rdlen,
2016                                   ((chan == SDPCM_EVENT_CHANNEL) ? "event"
2017                                    : ((chan == SDPCM_DATA_CHANNEL) ? "data"
2018                                       : "test")), sdret);
2019                         brcmu_pkt_buf_free_skb(pkt);
2020                         bus->drvr->rx_errors++;
2021                         brcmf_sdbrcm_rxfail(bus, true, RETRYCHAN(chan));
2022                         continue;
2023                 }
2024
2025                 /* Copy the already-read portion */
2026                 skb_push(pkt, BRCMF_FIRSTREAD);
2027                 memcpy(pkt->data, bus->rxhdr, BRCMF_FIRSTREAD);
2028
2029 #ifdef BCMDBG
2030                 if (BRCMF_BYTES_ON() && BRCMF_DATA_ON()) {
2031                         printk(KERN_DEBUG "Rx Data:\n");
2032                         print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
2033                                              pkt->data, len);
2034                 }
2035 #endif
2036
2037 deliver:
2038                 /* Save superframe descriptor and allocate packet frame */
2039                 if (chan == SDPCM_GLOM_CHANNEL) {
2040                         if (SDPCM_GLOMDESC(&bus->rxhdr[SDPCM_FRAMETAG_LEN])) {
2041                                 brcmf_dbg(GLOM, "glom descriptor, %d bytes:\n",
2042                                           len);
2043 #ifdef BCMDBG
2044                                 if (BRCMF_GLOM_ON()) {
2045                                         printk(KERN_DEBUG "Glom Data:\n");
2046                                         print_hex_dump_bytes("",
2047                                                              DUMP_PREFIX_OFFSET,
2048                                                              pkt->data, len);
2049                                 }
2050 #endif
2051                                 __skb_trim(pkt, len);
2052                                 skb_pull(pkt, SDPCM_HDRLEN);
2053                                 bus->glomd = pkt;
2054                         } else {
2055                                 brcmf_dbg(ERROR, "%s: glom superframe w/o "
2056                                           "descriptor!\n", __func__);
2057                                 brcmf_sdbrcm_rxfail(bus, false, false);
2058                         }
2059                         continue;
2060                 }
2061
2062                 /* Fill in packet len and prio, deliver upward */
2063                 __skb_trim(pkt, len);
2064                 skb_pull(pkt, doff);
2065
2066                 if (pkt->len == 0) {
2067                         brcmu_pkt_buf_free_skb(pkt);
2068                         continue;
2069                 } else if (brcmf_proto_hdrpull(bus->drvr, &ifidx, pkt) != 0) {
2070                         brcmf_dbg(ERROR, "rx protocol error\n");
2071                         brcmu_pkt_buf_free_skb(pkt);
2072                         bus->drvr->rx_errors++;
2073                         continue;
2074                 }
2075
2076                 /* Unlock during rx call */
2077                 up(&bus->sdsem);
2078                 brcmf_rx_frame(bus->drvr, ifidx, pkt, 1);
2079                 down(&bus->sdsem);
2080         }
2081         rxcount = maxframes - rxleft;
2082 #ifdef BCMDBG
2083         /* Message if we hit the limit */
2084         if (!rxleft)
2085                 brcmf_dbg(DATA, "hit rx limit of %d frames\n",
2086                           maxframes);
2087         else
2088 #endif                          /* BCMDBG */
2089                 brcmf_dbg(DATA, "processed %d frames\n", rxcount);
2090         /* Back off rxseq if awaiting rtx, update rx_seq */
2091         if (bus->rxskip)
2092                 rxseq--;
2093         bus->rx_seq = rxseq;
2094
2095         return rxcount;
2096 }
2097
2098 static int
2099 brcmf_sdbrcm_send_buf(struct brcmf_bus *bus, u32 addr, uint fn, uint flags,
2100                     u8 *buf, uint nbytes, struct sk_buff *pkt)
2101 {
2102         return brcmf_sdcard_send_buf
2103                 (bus->sdiodev, addr, fn, flags, buf, nbytes, pkt);
2104 }
2105
2106 static void
2107 brcmf_sdbrcm_wait_for_event(struct brcmf_bus *bus, bool *lockvar)
2108 {
2109         up(&bus->sdsem);
2110         wait_event_interruptible_timeout(bus->ctrl_wait,
2111                                          (*lockvar == false), HZ * 2);
2112         down(&bus->sdsem);
2113         return;
2114 }
2115
2116 static void
2117 brcmf_sdbrcm_wait_event_wakeup(struct brcmf_bus *bus)
2118 {
2119         if (waitqueue_active(&bus->ctrl_wait))
2120                 wake_up_interruptible(&bus->ctrl_wait);
2121         return;
2122 }
2123
2124 /* Writes a HW/SW header into the packet and sends it. */
2125 /* Assumes: (a) header space already there, (b) caller holds lock */
2126 static int brcmf_sdbrcm_txpkt(struct brcmf_bus *bus, struct sk_buff *pkt,
2127                               uint chan, bool free_pkt)
2128 {
2129         int ret;
2130         u8 *frame;
2131         u16 len, pad = 0;
2132         u32 swheader;
2133         struct sk_buff *new;
2134         int i;
2135
2136         brcmf_dbg(TRACE, "Enter\n");
2137
2138         frame = (u8 *) (pkt->data);
2139
2140         /* Add alignment padding, allocate new packet if needed */
2141         pad = ((unsigned long)frame % BRCMF_SDALIGN);
2142         if (pad) {
2143                 if (skb_headroom(pkt) < pad) {
2144                         brcmf_dbg(INFO, "insufficient headroom %d for %d pad\n",
2145                                   skb_headroom(pkt), pad);
2146                         bus->drvr->tx_realloc++;
2147                         new = brcmu_pkt_buf_get_skb(pkt->len + BRCMF_SDALIGN);
2148                         if (!new) {
2149                                 brcmf_dbg(ERROR, "couldn't allocate new %d-byte packet\n",
2150                                           pkt->len + BRCMF_SDALIGN);
2151                                 ret = -ENOMEM;
2152                                 goto done;
2153                         }
2154
2155                         pkt_align(new, pkt->len, BRCMF_SDALIGN);
2156                         memcpy(new->data, pkt->data, pkt->len);
2157                         if (free_pkt)
2158                                 brcmu_pkt_buf_free_skb(pkt);
2159                         /* free the pkt if canned one is not used */
2160                         free_pkt = true;
2161                         pkt = new;
2162                         frame = (u8 *) (pkt->data);
2163                         /* precondition: (frame % BRCMF_SDALIGN) == 0) */
2164                         pad = 0;
2165                 } else {
2166                         skb_push(pkt, pad);
2167                         frame = (u8 *) (pkt->data);
2168                         /* precondition: pad + SDPCM_HDRLEN <= pkt->len */
2169                         memset(frame, 0, pad + SDPCM_HDRLEN);
2170                 }
2171         }
2172         /* precondition: pad < BRCMF_SDALIGN */
2173
2174         /* Hardware tag: 2 byte len followed by 2 byte ~len check (all LE) */
2175         len = (u16) (pkt->len);
2176         *(__le16 *) frame = cpu_to_le16(len);
2177         *(((__le16 *) frame) + 1) = cpu_to_le16(~len);
2178
2179         /* Software tag: channel, sequence number, data offset */
2180         swheader =
2181             ((chan << SDPCM_CHANNEL_SHIFT) & SDPCM_CHANNEL_MASK) | bus->tx_seq |
2182             (((pad +
2183                SDPCM_HDRLEN) << SDPCM_DOFFSET_SHIFT) & SDPCM_DOFFSET_MASK);
2184
2185         put_unaligned_le32(swheader, frame + SDPCM_FRAMETAG_LEN);
2186         put_unaligned_le32(0, frame + SDPCM_FRAMETAG_LEN + sizeof(swheader));
2187
2188 #ifdef BCMDBG
2189         tx_packets[pkt->priority]++;
2190         if (BRCMF_BYTES_ON() &&
2191             (((BRCMF_CTL_ON() && (chan == SDPCM_CONTROL_CHANNEL)) ||
2192               (BRCMF_DATA_ON() && (chan != SDPCM_CONTROL_CHANNEL))))) {
2193                 printk(KERN_DEBUG "Tx Frame:\n");
2194                 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET, frame, len);
2195         } else if (BRCMF_HDRS_ON()) {
2196                 printk(KERN_DEBUG "TxHdr:\n");
2197                 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
2198                                      frame, min_t(u16, len, 16));
2199         }
2200 #endif
2201
2202         /* Raise len to next SDIO block to eliminate tail command */
2203         if (bus->roundup && bus->blocksize && (len > bus->blocksize)) {
2204                 u16 pad = bus->blocksize - (len % bus->blocksize);
2205                 if ((pad <= bus->roundup) && (pad < bus->blocksize))
2206                                 len += pad;
2207         } else if (len % BRCMF_SDALIGN) {
2208                 len += BRCMF_SDALIGN - (len % BRCMF_SDALIGN);
2209         }
2210
2211         /* Some controllers have trouble with odd bytes -- round to even */
2212         if (len & (ALIGNMENT - 1))
2213                         len = roundup(len, ALIGNMENT);
2214
2215         ret = brcmf_sdbrcm_send_buf(bus, bus->sdiodev->sbwad,
2216                                     SDIO_FUNC_2, F2SYNC, frame,
2217                                     len, pkt);
2218         bus->f2txdata++;
2219
2220         if (ret < 0) {
2221                 /* On failure, abort the command and terminate the frame */
2222                 brcmf_dbg(INFO, "sdio error %d, abort command and terminate frame\n",
2223                           ret);
2224                 bus->tx_sderrs++;
2225
2226                 brcmf_sdcard_abort(bus->sdiodev, SDIO_FUNC_2);
2227                 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
2228                                  SBSDIO_FUNC1_FRAMECTRL, SFC_WF_TERM,
2229                                  NULL);
2230                 bus->f1regdata++;
2231
2232                 for (i = 0; i < 3; i++) {
2233                         u8 hi, lo;
2234                         hi = brcmf_sdcard_cfg_read(bus->sdiodev,
2235                                              SDIO_FUNC_1,
2236                                              SBSDIO_FUNC1_WFRAMEBCHI,
2237                                              NULL);
2238                         lo = brcmf_sdcard_cfg_read(bus->sdiodev,
2239                                              SDIO_FUNC_1,
2240                                              SBSDIO_FUNC1_WFRAMEBCLO,
2241                                              NULL);
2242                         bus->f1regdata += 2;
2243                         if ((hi == 0) && (lo == 0))
2244                                 break;
2245                 }
2246
2247         }
2248         if (ret == 0)
2249                 bus->tx_seq = (bus->tx_seq + 1) % SDPCM_SEQUENCE_WRAP;
2250
2251 done:
2252         /* restore pkt buffer pointer before calling tx complete routine */
2253         skb_pull(pkt, SDPCM_HDRLEN + pad);
2254         up(&bus->sdsem);
2255         brcmf_txcomplete(bus->drvr, pkt, ret != 0);
2256         down(&bus->sdsem);
2257
2258         if (free_pkt)
2259                 brcmu_pkt_buf_free_skb(pkt);
2260
2261         return ret;
2262 }
2263
2264 static uint brcmf_sdbrcm_sendfromq(struct brcmf_bus *bus, uint maxframes)
2265 {
2266         struct sk_buff *pkt;
2267         u32 intstatus = 0;
2268         uint retries = 0;
2269         int ret = 0, prec_out;
2270         uint cnt = 0;
2271         uint datalen;
2272         u8 tx_prec_map;
2273
2274         struct brcmf_pub *drvr = bus->drvr;
2275
2276         brcmf_dbg(TRACE, "Enter\n");
2277
2278         tx_prec_map = ~bus->flowcontrol;
2279
2280         /* Send frames until the limit or some other event */
2281         for (cnt = 0; (cnt < maxframes) && data_ok(bus); cnt++) {
2282                 spin_lock_bh(&bus->txqlock);
2283                 pkt = brcmu_pktq_mdeq(&bus->txq, tx_prec_map, &prec_out);
2284                 if (pkt == NULL) {
2285                         spin_unlock_bh(&bus->txqlock);
2286                         break;
2287                 }
2288                 spin_unlock_bh(&bus->txqlock);
2289                 datalen = pkt->len - SDPCM_HDRLEN;
2290
2291                 ret = brcmf_sdbrcm_txpkt(bus, pkt, SDPCM_DATA_CHANNEL, true);
2292                 if (ret)
2293                         bus->drvr->tx_errors++;
2294                 else
2295                         bus->drvr->dstats.tx_bytes += datalen;
2296
2297                 /* In poll mode, need to check for other events */
2298                 if (!bus->intr && cnt) {
2299                         /* Check device status, signal pending interrupt */
2300                         r_sdreg32(bus, &intstatus,
2301                                   offsetof(struct sdpcmd_regs, intstatus),
2302                                   &retries);
2303                         bus->f2txdata++;
2304                         if (brcmf_sdcard_regfail(bus->sdiodev))
2305                                 break;
2306                         if (intstatus & bus->hostintmask)
2307                                 bus->ipend = true;
2308                 }
2309         }
2310
2311         /* Deflow-control stack if needed */
2312         if (drvr->up && (drvr->busstate == BRCMF_BUS_DATA) &&
2313             drvr->txoff && (pktq_len(&bus->txq) < TXLOW))
2314                 brcmf_txflowcontrol(drvr, 0, OFF);
2315
2316         return cnt;
2317 }
2318
2319 static bool brcmf_sdbrcm_dpc(struct brcmf_bus *bus)
2320 {
2321         u32 intstatus, newstatus = 0;
2322         uint retries = 0;
2323         uint rxlimit = bus->rxbound;    /* Rx frames to read before resched */
2324         uint txlimit = bus->txbound;    /* Tx frames to send before resched */
2325         uint framecnt = 0;      /* Temporary counter of tx/rx frames */
2326         bool rxdone = true;     /* Flag for no more read data */
2327         bool resched = false;   /* Flag indicating resched wanted */
2328
2329         brcmf_dbg(TRACE, "Enter\n");
2330
2331         /* Start with leftover status bits */
2332         intstatus = bus->intstatus;
2333
2334         down(&bus->sdsem);
2335
2336         /* If waiting for HTAVAIL, check status */
2337         if (bus->clkstate == CLK_PENDING) {
2338                 int err;
2339                 u8 clkctl, devctl = 0;
2340
2341 #ifdef BCMDBG
2342                 /* Check for inconsistent device control */
2343                 devctl = brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1,
2344                                                SBSDIO_DEVICE_CTL, &err);
2345                 if (err) {
2346                         brcmf_dbg(ERROR, "error reading DEVCTL: %d\n", err);
2347                         bus->drvr->busstate = BRCMF_BUS_DOWN;
2348                 }
2349 #endif                          /* BCMDBG */
2350
2351                 /* Read CSR, if clock on switch to AVAIL, else ignore */
2352                 clkctl = brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1,
2353                                                SBSDIO_FUNC1_CHIPCLKCSR, &err);
2354                 if (err) {
2355                         brcmf_dbg(ERROR, "error reading CSR: %d\n",
2356                                   err);
2357                         bus->drvr->busstate = BRCMF_BUS_DOWN;
2358                 }
2359
2360                 brcmf_dbg(INFO, "DPC: PENDING, devctl 0x%02x clkctl 0x%02x\n",
2361                           devctl, clkctl);
2362
2363                 if (SBSDIO_HTAV(clkctl)) {
2364                         devctl = brcmf_sdcard_cfg_read(bus->sdiodev,
2365                                                        SDIO_FUNC_1,
2366                                                        SBSDIO_DEVICE_CTL, &err);
2367                         if (err) {
2368                                 brcmf_dbg(ERROR, "error reading DEVCTL: %d\n",
2369                                           err);
2370                                 bus->drvr->busstate = BRCMF_BUS_DOWN;
2371                         }
2372                         devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
2373                         brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
2374                                 SBSDIO_DEVICE_CTL, devctl, &err);
2375                         if (err) {
2376                                 brcmf_dbg(ERROR, "error writing DEVCTL: %d\n",
2377                                           err);
2378                                 bus->drvr->busstate = BRCMF_BUS_DOWN;
2379                         }
2380                         bus->clkstate = CLK_AVAIL;
2381                 } else {
2382                         goto clkwait;
2383                 }
2384         }
2385
2386         bus_wake(bus);
2387
2388         /* Make sure backplane clock is on */
2389         brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, true);
2390         if (bus->clkstate == CLK_PENDING)
2391                 goto clkwait;
2392
2393         /* Pending interrupt indicates new device status */
2394         if (bus->ipend) {
2395                 bus->ipend = false;
2396                 r_sdreg32(bus, &newstatus,
2397                           offsetof(struct sdpcmd_regs, intstatus), &retries);
2398                 bus->f1regdata++;
2399                 if (brcmf_sdcard_regfail(bus->sdiodev))
2400                         newstatus = 0;
2401                 newstatus &= bus->hostintmask;
2402                 bus->fcstate = !!(newstatus & I_HMB_FC_STATE);
2403                 if (newstatus) {
2404                         w_sdreg32(bus, newstatus,
2405                                   offsetof(struct sdpcmd_regs, intstatus),
2406                                   &retries);
2407                         bus->f1regdata++;
2408                 }
2409         }
2410
2411         /* Merge new bits with previous */
2412         intstatus |= newstatus;
2413         bus->intstatus = 0;
2414
2415         /* Handle flow-control change: read new state in case our ack
2416          * crossed another change interrupt.  If change still set, assume
2417          * FC ON for safety, let next loop through do the debounce.
2418          */
2419         if (intstatus & I_HMB_FC_CHANGE) {
2420                 intstatus &= ~I_HMB_FC_CHANGE;
2421                 w_sdreg32(bus, I_HMB_FC_CHANGE,
2422                           offsetof(struct sdpcmd_regs, intstatus), &retries);
2423
2424                 r_sdreg32(bus, &newstatus,
2425                           offsetof(struct sdpcmd_regs, intstatus), &retries);
2426                 bus->f1regdata += 2;
2427                 bus->fcstate =
2428                     !!(newstatus & (I_HMB_FC_STATE | I_HMB_FC_CHANGE));
2429                 intstatus |= (newstatus & bus->hostintmask);
2430         }
2431
2432         /* Handle host mailbox indication */
2433         if (intstatus & I_HMB_HOST_INT) {
2434                 intstatus &= ~I_HMB_HOST_INT;
2435                 intstatus |= brcmf_sdbrcm_hostmail(bus);
2436         }
2437
2438         /* Generally don't ask for these, can get CRC errors... */
2439         if (intstatus & I_WR_OOSYNC) {
2440                 brcmf_dbg(ERROR, "Dongle reports WR_OOSYNC\n");
2441                 intstatus &= ~I_WR_OOSYNC;
2442         }
2443
2444         if (intstatus & I_RD_OOSYNC) {
2445                 brcmf_dbg(ERROR, "Dongle reports RD_OOSYNC\n");
2446                 intstatus &= ~I_RD_OOSYNC;
2447         }
2448
2449         if (intstatus & I_SBINT) {
2450                 brcmf_dbg(ERROR, "Dongle reports SBINT\n");
2451                 intstatus &= ~I_SBINT;
2452         }
2453
2454         /* Would be active due to wake-wlan in gSPI */
2455         if (intstatus & I_CHIPACTIVE) {
2456                 brcmf_dbg(INFO, "Dongle reports CHIPACTIVE\n");
2457                 intstatus &= ~I_CHIPACTIVE;
2458         }
2459
2460         /* Ignore frame indications if rxskip is set */
2461         if (bus->rxskip)
2462                 intstatus &= ~I_HMB_FRAME_IND;
2463
2464         /* On frame indication, read available frames */
2465         if (PKT_AVAILABLE()) {
2466                 framecnt = brcmf_sdbrcm_readframes(bus, rxlimit, &rxdone);
2467                 if (rxdone || bus->rxskip)
2468                         intstatus &= ~I_HMB_FRAME_IND;
2469                 rxlimit -= min(framecnt, rxlimit);
2470         }
2471
2472         /* Keep still-pending events for next scheduling */
2473         bus->intstatus = intstatus;
2474
2475 clkwait:
2476         if (data_ok(bus) && bus->ctrl_frame_stat &&
2477                 (bus->clkstate == CLK_AVAIL)) {
2478                 int ret, i;
2479
2480                 ret = brcmf_sdbrcm_send_buf(bus, bus->sdiodev->sbwad,
2481                         SDIO_FUNC_2, F2SYNC, (u8 *) bus->ctrl_frame_buf,
2482                         (u32) bus->ctrl_frame_len, NULL);
2483
2484                 if (ret < 0) {
2485                         /* On failure, abort the command and
2486                                 terminate the frame */
2487                         brcmf_dbg(INFO, "sdio error %d, abort command and terminate frame\n",
2488                                   ret);
2489                         bus->tx_sderrs++;
2490
2491                         brcmf_sdcard_abort(bus->sdiodev, SDIO_FUNC_2);
2492
2493                         brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
2494                                          SBSDIO_FUNC1_FRAMECTRL, SFC_WF_TERM,
2495                                          NULL);
2496                         bus->f1regdata++;
2497
2498                         for (i = 0; i < 3; i++) {
2499                                 u8 hi, lo;
2500                                 hi = brcmf_sdcard_cfg_read(bus->sdiodev,
2501                                                      SDIO_FUNC_1,
2502                                                      SBSDIO_FUNC1_WFRAMEBCHI,
2503                                                      NULL);
2504                                 lo = brcmf_sdcard_cfg_read(bus->sdiodev,
2505                                                      SDIO_FUNC_1,
2506                                                      SBSDIO_FUNC1_WFRAMEBCLO,
2507                                                      NULL);
2508                                 bus->f1regdata += 2;
2509                                 if ((hi == 0) && (lo == 0))
2510                                         break;
2511                         }
2512
2513                 }
2514                 if (ret == 0)
2515                         bus->tx_seq = (bus->tx_seq + 1) % SDPCM_SEQUENCE_WRAP;
2516
2517                 brcmf_dbg(INFO, "Return_dpc value is : %d\n", ret);
2518                 bus->ctrl_frame_stat = false;
2519                 brcmf_sdbrcm_wait_event_wakeup(bus);
2520         }
2521         /* Send queued frames (limit 1 if rx may still be pending) */
2522         else if ((bus->clkstate == CLK_AVAIL) && !bus->fcstate &&
2523                  brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol) && txlimit
2524                  && data_ok(bus)) {
2525                 framecnt = rxdone ? txlimit : min(txlimit, bus->txminmax);
2526                 framecnt = brcmf_sdbrcm_sendfromq(bus, framecnt);
2527                 txlimit -= framecnt;
2528         }
2529
2530         /* Resched if events or tx frames are pending,
2531                  else await next interrupt */
2532         /* On failed register access, all bets are off:
2533                  no resched or interrupts */
2534         if ((bus->drvr->busstate == BRCMF_BUS_DOWN) ||
2535             brcmf_sdcard_regfail(bus->sdiodev)) {
2536                 brcmf_dbg(ERROR, "failed backplane access over SDIO, halting operation %d\n",
2537                           brcmf_sdcard_regfail(bus->sdiodev));
2538                 bus->drvr->busstate = BRCMF_BUS_DOWN;
2539                 bus->intstatus = 0;
2540         } else if (bus->clkstate == CLK_PENDING) {
2541                 brcmf_dbg(INFO, "rescheduled due to CLK_PENDING awaiting I_CHIPACTIVE interrupt\n");
2542                 resched = true;
2543         } else if (bus->intstatus || bus->ipend ||
2544                 (!bus->fcstate && brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol)
2545                  && data_ok(bus)) || PKT_AVAILABLE()) {
2546                 resched = true;
2547         }
2548
2549         bus->dpc_sched = resched;
2550
2551         /* If we're done for now, turn off clock request. */
2552         if ((bus->clkstate != CLK_PENDING)
2553             && bus->idletime == BRCMF_IDLE_IMMEDIATE) {
2554                 bus->activity = false;
2555                 brcmf_sdbrcm_clkctl(bus, CLK_NONE, false);
2556         }
2557
2558         up(&bus->sdsem);
2559
2560         return resched;
2561 }
2562
2563 static int brcmf_sdbrcm_dpc_thread(void *data)
2564 {
2565         struct brcmf_bus *bus = (struct brcmf_bus *) data;
2566
2567         allow_signal(SIGTERM);
2568         /* Run until signal received */
2569         while (1) {
2570                 if (kthread_should_stop())
2571                         break;
2572                 if (!wait_for_completion_interruptible(&bus->dpc_wait)) {
2573                         /* Call bus dpc unless it indicated down
2574                         (then clean stop) */
2575                         if (bus->drvr->busstate != BRCMF_BUS_DOWN) {
2576                                 if (brcmf_sdbrcm_dpc(bus))
2577                                         complete(&bus->dpc_wait);
2578                         } else {
2579                                 /* after stopping the bus, exit thread */
2580                                 brcmf_sdbrcm_bus_stop(bus);
2581                                 bus->dpc_tsk = NULL;
2582                                 break;
2583                         }
2584                 } else
2585                         break;
2586         }
2587         return 0;
2588 }
2589
2590 int brcmf_sdbrcm_bus_txdata(struct brcmf_bus *bus, struct sk_buff *pkt)
2591 {
2592         int ret = -EBADE;
2593         uint datalen, prec;
2594
2595         brcmf_dbg(TRACE, "Enter\n");
2596
2597         datalen = pkt->len;
2598
2599         /* Add space for the header */
2600         skb_push(pkt, SDPCM_HDRLEN);
2601         /* precondition: IS_ALIGNED((unsigned long)(pkt->data), 2) */
2602
2603         prec = prio2prec((pkt->priority & PRIOMASK));
2604
2605         /* Check for existing queue, current flow-control,
2606                          pending event, or pending clock */
2607         brcmf_dbg(TRACE, "deferring pktq len %d\n", pktq_len(&bus->txq));
2608         bus->fcqueued++;
2609
2610         /* Priority based enq */
2611         spin_lock_bh(&bus->txqlock);
2612         if (brcmf_c_prec_enq(bus->drvr, &bus->txq, pkt, prec) == false) {
2613                 skb_pull(pkt, SDPCM_HDRLEN);
2614                 brcmf_txcomplete(bus->drvr, pkt, false);
2615                 brcmu_pkt_buf_free_skb(pkt);
2616                 brcmf_dbg(ERROR, "out of bus->txq !!!\n");
2617                 ret = -ENOSR;
2618         } else {
2619                 ret = 0;
2620         }
2621         spin_unlock_bh(&bus->txqlock);
2622
2623         if (pktq_len(&bus->txq) >= TXHI)
2624                 brcmf_txflowcontrol(bus->drvr, 0, ON);
2625
2626 #ifdef BCMDBG
2627         if (pktq_plen(&bus->txq, prec) > qcount[prec])
2628                 qcount[prec] = pktq_plen(&bus->txq, prec);
2629 #endif
2630         /* Schedule DPC if needed to send queued packet(s) */
2631         if (!bus->dpc_sched) {
2632                 bus->dpc_sched = true;
2633                 if (bus->dpc_tsk)
2634                         complete(&bus->dpc_wait);
2635         }
2636
2637         return ret;
2638 }
2639
2640 static int
2641 brcmf_sdbrcm_membytes(struct brcmf_bus *bus, bool write, u32 address, u8 *data,
2642                  uint size)
2643 {
2644         int bcmerror = 0;
2645         u32 sdaddr;
2646         uint dsize;
2647
2648         /* Determine initial transfer parameters */
2649         sdaddr = address & SBSDIO_SB_OFT_ADDR_MASK;
2650         if ((sdaddr + size) & SBSDIO_SBWINDOW_MASK)
2651                 dsize = (SBSDIO_SB_OFT_ADDR_LIMIT - sdaddr);
2652         else
2653                 dsize = size;
2654
2655         /* Set the backplane window to include the start address */
2656         bcmerror = brcmf_sdcard_set_sbaddr_window(bus->sdiodev, address);
2657         if (bcmerror) {
2658                 brcmf_dbg(ERROR, "window change failed\n");
2659                 goto xfer_done;
2660         }
2661
2662         /* Do the transfer(s) */
2663         while (size) {
2664                 brcmf_dbg(INFO, "%s %d bytes at offset 0x%08x in window 0x%08x\n",
2665                           write ? "write" : "read", dsize,
2666                           sdaddr, address & SBSDIO_SBWINDOW_MASK);
2667                 bcmerror = brcmf_sdcard_rwdata(bus->sdiodev, write,
2668                                                sdaddr, data, dsize);
2669                 if (bcmerror) {
2670                         brcmf_dbg(ERROR, "membytes transfer failed\n");
2671                         break;
2672                 }
2673
2674                 /* Adjust for next transfer (if any) */
2675                 size -= dsize;
2676                 if (size) {
2677                         data += dsize;
2678                         address += dsize;
2679                         bcmerror = brcmf_sdcard_set_sbaddr_window(bus->sdiodev,
2680                                                                   address);
2681                         if (bcmerror) {
2682                                 brcmf_dbg(ERROR, "window change failed\n");
2683                                 break;
2684                         }
2685                         sdaddr = 0;
2686                         dsize = min_t(uint, SBSDIO_SB_OFT_ADDR_LIMIT, size);
2687                 }
2688         }
2689
2690 xfer_done:
2691         /* Return the window to backplane enumeration space for core access */
2692         if (brcmf_sdcard_set_sbaddr_window(bus->sdiodev, bus->sdiodev->sbwad))
2693                 brcmf_dbg(ERROR, "FAILED to set window back to 0x%x\n",
2694                           bus->sdiodev->sbwad);
2695
2696         return bcmerror;
2697 }
2698
2699 #ifdef BCMDBG
2700 #define CONSOLE_LINE_MAX        192
2701
2702 static int brcmf_sdbrcm_readconsole(struct brcmf_bus *bus)
2703 {
2704         struct brcmf_console *c = &bus->console;
2705         u8 line[CONSOLE_LINE_MAX], ch;
2706         u32 n, idx, addr;
2707         int rv;
2708
2709         /* Don't do anything until FWREADY updates console address */
2710         if (bus->console_addr == 0)
2711                 return 0;
2712
2713         /* Read console log struct */
2714         addr = bus->console_addr + offsetof(struct rte_console, log_le);
2715         rv = brcmf_sdbrcm_membytes(bus, false, addr, (u8 *)&c->log_le,
2716                                    sizeof(c->log_le));
2717         if (rv < 0)
2718                 return rv;
2719
2720         /* Allocate console buffer (one time only) */
2721         if (c->buf == NULL) {
2722                 c->bufsize = le32_to_cpu(c->log_le.buf_size);
2723                 c->buf = kmalloc(c->bufsize, GFP_ATOMIC);
2724                 if (c->buf == NULL)
2725                         return -ENOMEM;
2726         }
2727
2728         idx = le32_to_cpu(c->log_le.idx);
2729
2730         /* Protect against corrupt value */
2731         if (idx > c->bufsize)
2732                 return -EBADE;
2733
2734         /* Skip reading the console buffer if the index pointer
2735          has not moved */
2736         if (idx == c->last)
2737                 return 0;
2738
2739         /* Read the console buffer */
2740         addr = le32_to_cpu(c->log_le.buf);
2741         rv = brcmf_sdbrcm_membytes(bus, false, addr, c->buf, c->bufsize);
2742         if (rv < 0)
2743                 return rv;
2744
2745         while (c->last != idx) {
2746                 for (n = 0; n < CONSOLE_LINE_MAX - 2; n++) {
2747                         if (c->last == idx) {
2748                                 /* This would output a partial line.
2749                                  * Instead, back up
2750                                  * the buffer pointer and output this
2751                                  * line next time around.
2752                                  */
2753                                 if (c->last >= n)
2754                                         c->last -= n;
2755                                 else
2756                                         c->last = c->bufsize - n;
2757                                 goto break2;
2758                         }
2759                         ch = c->buf[c->last];
2760                         c->last = (c->last + 1) % c->bufsize;
2761                         if (ch == '\n')
2762                                 break;
2763                         line[n] = ch;
2764                 }
2765
2766                 if (n > 0) {
2767                         if (line[n - 1] == '\r')
2768                                 n--;
2769                         line[n] = 0;
2770                         printk(KERN_DEBUG "CONSOLE: %s\n", line);
2771                 }
2772         }
2773 break2:
2774
2775         return 0;
2776 }
2777 #endif                          /* BCMDBG */
2778
2779 static int brcmf_tx_frame(struct brcmf_bus *bus, u8 *frame, u16 len)
2780 {
2781         int i;
2782         int ret;
2783
2784         bus->ctrl_frame_stat = false;
2785         ret = brcmf_sdbrcm_send_buf(bus, bus->sdiodev->sbwad,
2786                                     SDIO_FUNC_2, F2SYNC, frame, len, NULL);
2787
2788         if (ret < 0) {
2789                 /* On failure, abort the command and terminate the frame */
2790                 brcmf_dbg(INFO, "sdio error %d, abort command and terminate frame\n",
2791                           ret);
2792                 bus->tx_sderrs++;
2793
2794                 brcmf_sdcard_abort(bus->sdiodev, SDIO_FUNC_2);
2795
2796                 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
2797                                        SBSDIO_FUNC1_FRAMECTRL,
2798                                        SFC_WF_TERM, NULL);
2799                 bus->f1regdata++;
2800
2801                 for (i = 0; i < 3; i++) {
2802                         u8 hi, lo;
2803                         hi = brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1,
2804                                                    SBSDIO_FUNC1_WFRAMEBCHI,
2805                                                    NULL);
2806                         lo = brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1,
2807                                                    SBSDIO_FUNC1_WFRAMEBCLO,
2808                                                    NULL);
2809                         bus->f1regdata += 2;
2810                         if (hi == 0 && lo == 0)
2811                                 break;
2812                 }
2813                 return ret;
2814         }
2815
2816         bus->tx_seq = (bus->tx_seq + 1) % SDPCM_SEQUENCE_WRAP;
2817
2818         return ret;
2819 }
2820
2821 int
2822 brcmf_sdbrcm_bus_txctl(struct brcmf_bus *bus, unsigned char *msg, uint msglen)
2823 {
2824         u8 *frame;
2825         u16 len;
2826         u32 swheader;
2827         uint retries = 0;
2828         u8 doff = 0;
2829         int ret = -1;
2830
2831         brcmf_dbg(TRACE, "Enter\n");
2832
2833         /* Back the pointer to make a room for bus header */
2834         frame = msg - SDPCM_HDRLEN;
2835         len = (msglen += SDPCM_HDRLEN);
2836
2837         /* Add alignment padding (optional for ctl frames) */
2838         doff = ((unsigned long)frame % BRCMF_SDALIGN);
2839         if (doff) {
2840                 frame -= doff;
2841                 len += doff;
2842                 msglen += doff;
2843                 memset(frame, 0, doff + SDPCM_HDRLEN);
2844         }
2845         /* precondition: doff < BRCMF_SDALIGN */
2846         doff += SDPCM_HDRLEN;
2847
2848         /* Round send length to next SDIO block */
2849         if (bus->roundup && bus->blocksize && (len > bus->blocksize)) {
2850                 u16 pad = bus->blocksize - (len % bus->blocksize);
2851                 if ((pad <= bus->roundup) && (pad < bus->blocksize))
2852                         len += pad;
2853         } else if (len % BRCMF_SDALIGN) {
2854                 len += BRCMF_SDALIGN - (len % BRCMF_SDALIGN);
2855         }
2856
2857         /* Satisfy length-alignment requirements */
2858         if (len & (ALIGNMENT - 1))
2859                 len = roundup(len, ALIGNMENT);
2860
2861         /* precondition: IS_ALIGNED((unsigned long)frame, 2) */
2862
2863         /* Need to lock here to protect txseq and SDIO tx calls */
2864         down(&bus->sdsem);
2865
2866         bus_wake(bus);
2867
2868         /* Make sure backplane clock is on */
2869         brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
2870
2871         /* Hardware tag: 2 byte len followed by 2 byte ~len check (all LE) */
2872         *(__le16 *) frame = cpu_to_le16((u16) msglen);
2873         *(((__le16 *) frame) + 1) = cpu_to_le16(~msglen);
2874
2875         /* Software tag: channel, sequence number, data offset */
2876         swheader =
2877             ((SDPCM_CONTROL_CHANNEL << SDPCM_CHANNEL_SHIFT) &
2878              SDPCM_CHANNEL_MASK)
2879             | bus->tx_seq | ((doff << SDPCM_DOFFSET_SHIFT) &
2880                              SDPCM_DOFFSET_MASK);
2881         put_unaligned_le32(swheader, frame + SDPCM_FRAMETAG_LEN);
2882         put_unaligned_le32(0, frame + SDPCM_FRAMETAG_LEN + sizeof(swheader));
2883
2884         if (!data_ok(bus)) {
2885                 brcmf_dbg(INFO, "No bus credit bus->tx_max %d, bus->tx_seq %d\n",
2886                           bus->tx_max, bus->tx_seq);
2887                 bus->ctrl_frame_stat = true;
2888                 /* Send from dpc */
2889                 bus->ctrl_frame_buf = frame;
2890                 bus->ctrl_frame_len = len;
2891
2892                 brcmf_sdbrcm_wait_for_event(bus, &bus->ctrl_frame_stat);
2893
2894                 if (bus->ctrl_frame_stat == false) {
2895                         brcmf_dbg(INFO, "ctrl_frame_stat == false\n");
2896                         ret = 0;
2897                 } else {
2898                         brcmf_dbg(INFO, "ctrl_frame_stat == true\n");
2899                         ret = -1;
2900                 }
2901         }
2902
2903         if (ret == -1) {
2904 #ifdef BCMDBG
2905                 if (BRCMF_BYTES_ON() && BRCMF_CTL_ON()) {
2906                         printk(KERN_DEBUG "Tx Frame:\n");
2907                         print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
2908                                              frame, len);
2909                 } else if (BRCMF_HDRS_ON()) {
2910                         printk(KERN_DEBUG "TxHdr:\n");
2911                         print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
2912                                              frame, min_t(u16, len, 16));
2913                 }
2914 #endif
2915
2916                 do {
2917                         ret = brcmf_tx_frame(bus, frame, len);
2918                 } while (ret < 0 && retries++ < TXRETRIES);
2919         }
2920
2921         if ((bus->idletime == BRCMF_IDLE_IMMEDIATE) && !bus->dpc_sched) {
2922                 bus->activity = false;
2923                 brcmf_sdbrcm_clkctl(bus, CLK_NONE, true);
2924         }
2925
2926         up(&bus->sdsem);
2927
2928         if (ret)
2929                 bus->drvr->tx_ctlerrs++;
2930         else
2931                 bus->drvr->tx_ctlpkts++;
2932
2933         return ret ? -EIO : 0;
2934 }
2935
2936 int
2937 brcmf_sdbrcm_bus_rxctl(struct brcmf_bus *bus, unsigned char *msg, uint msglen)
2938 {
2939         int timeleft;
2940         uint rxlen = 0;
2941         bool pending;
2942
2943         brcmf_dbg(TRACE, "Enter\n");
2944
2945         /* Wait until control frame is available */
2946         timeleft = brcmf_sdbrcm_dcmd_resp_wait(bus, &bus->rxlen, &pending);
2947
2948         down(&bus->sdsem);
2949         rxlen = bus->rxlen;
2950         memcpy(msg, bus->rxctl, min(msglen, rxlen));
2951         bus->rxlen = 0;
2952         up(&bus->sdsem);
2953
2954         if (rxlen) {
2955                 brcmf_dbg(CTL, "resumed on rxctl frame, got %d expected %d\n",
2956                           rxlen, msglen);
2957         } else if (timeleft == 0) {
2958                 brcmf_dbg(ERROR, "resumed on timeout\n");
2959         } else if (pending == true) {
2960                 brcmf_dbg(CTL, "cancelled\n");
2961                 return -ERESTARTSYS;
2962         } else {
2963                 brcmf_dbg(CTL, "resumed for unknown reason?\n");
2964         }
2965
2966         if (rxlen)
2967                 bus->drvr->rx_ctlpkts++;
2968         else
2969                 bus->drvr->rx_ctlerrs++;
2970
2971         return rxlen ? (int)rxlen : -ETIMEDOUT;
2972 }
2973
2974 static int brcmf_sdbrcm_downloadvars(struct brcmf_bus *bus, void *arg, int len)
2975 {
2976         int bcmerror = 0;
2977
2978         brcmf_dbg(TRACE, "Enter\n");
2979
2980         /* Basic sanity checks */
2981         if (bus->drvr->up) {
2982                 bcmerror = -EISCONN;
2983                 goto err;
2984         }
2985         if (!len) {
2986                 bcmerror = -EOVERFLOW;
2987                 goto err;
2988         }
2989
2990         /* Free the old ones and replace with passed variables */
2991         kfree(bus->vars);
2992
2993         bus->vars = kmalloc(len, GFP_ATOMIC);
2994         bus->varsz = bus->vars ? len : 0;
2995         if (bus->vars == NULL) {
2996                 bcmerror = -ENOMEM;
2997                 goto err;
2998         }
2999
3000         /* Copy the passed variables, which should include the
3001                  terminating double-null */
3002         memcpy(bus->vars, arg, bus->varsz);
3003 err:
3004         return bcmerror;
3005 }
3006
3007 static int brcmf_sdbrcm_write_vars(struct brcmf_bus *bus)
3008 {
3009         int bcmerror = 0;
3010         u32 varsize;
3011         u32 varaddr;
3012         u8 *vbuffer;
3013         u32 varsizew;
3014         __le32 varsizew_le;
3015 #ifdef BCMDBG
3016         char *nvram_ularray;
3017 #endif                          /* BCMDBG */
3018
3019         /* Even if there are no vars are to be written, we still
3020                  need to set the ramsize. */
3021         varsize = bus->varsz ? roundup(bus->varsz, 4) : 0;
3022         varaddr = (bus->ramsize - 4) - varsize;
3023
3024         if (bus->vars) {
3025                 vbuffer = kzalloc(varsize, GFP_ATOMIC);
3026                 if (!vbuffer)
3027                         return -ENOMEM;
3028
3029                 memcpy(vbuffer, bus->vars, bus->varsz);
3030
3031                 /* Write the vars list */
3032                 bcmerror =
3033                     brcmf_sdbrcm_membytes(bus, true, varaddr, vbuffer, varsize);
3034 #ifdef BCMDBG
3035                 /* Verify NVRAM bytes */
3036                 brcmf_dbg(INFO, "Compare NVRAM dl & ul; varsize=%d\n", varsize);
3037                 nvram_ularray = kmalloc(varsize, GFP_ATOMIC);
3038                 if (!nvram_ularray)
3039                         return -ENOMEM;
3040
3041                 /* Upload image to verify downloaded contents. */
3042                 memset(nvram_ularray, 0xaa, varsize);
3043
3044                 /* Read the vars list to temp buffer for comparison */
3045                 bcmerror =
3046                     brcmf_sdbrcm_membytes(bus, false, varaddr, nvram_ularray,
3047                                      varsize);
3048                 if (bcmerror) {
3049                         brcmf_dbg(ERROR, "error %d on reading %d nvram bytes at 0x%08x\n",
3050                                   bcmerror, varsize, varaddr);
3051                 }
3052                 /* Compare the org NVRAM with the one read from RAM */
3053                 if (memcmp(vbuffer, nvram_ularray, varsize))
3054                         brcmf_dbg(ERROR, "Downloaded NVRAM image is corrupted\n");
3055                 else
3056                         brcmf_dbg(ERROR, "Download/Upload/Compare of NVRAM ok\n");
3057
3058                 kfree(nvram_ularray);
3059 #endif                          /* BCMDBG */
3060
3061                 kfree(vbuffer);
3062         }
3063
3064         /* adjust to the user specified RAM */
3065         brcmf_dbg(INFO, "Physical memory size: %d\n", bus->ramsize);
3066         brcmf_dbg(INFO, "Vars are at %d, orig varsize is %d\n",
3067                   varaddr, varsize);
3068         varsize = ((bus->ramsize - 4) - varaddr);
3069
3070         /*
3071          * Determine the length token:
3072          * Varsize, converted to words, in lower 16-bits, checksum
3073          * in upper 16-bits.
3074          */
3075         if (bcmerror) {
3076                 varsizew = 0;
3077                 varsizew_le = cpu_to_le32(0);
3078         } else {
3079                 varsizew = varsize / 4;
3080                 varsizew = (~varsizew << 16) | (varsizew & 0x0000FFFF);
3081                 varsizew_le = cpu_to_le32(varsizew);
3082         }
3083
3084         brcmf_dbg(INFO, "New varsize is %d, length token=0x%08x\n",
3085                   varsize, varsizew);
3086
3087         /* Write the length token to the last word */
3088         bcmerror = brcmf_sdbrcm_membytes(bus, true, (bus->ramsize - 4),
3089                                          (u8 *)&varsizew_le, 4);
3090
3091         return bcmerror;
3092 }
3093
3094 static int brcmf_sdbrcm_download_state(struct brcmf_bus *bus, bool enter)
3095 {
3096         uint retries;
3097         int bcmerror = 0;
3098         struct chip_info *ci = bus->ci;
3099
3100         /* To enter download state, disable ARM and reset SOCRAM.
3101          * To exit download state, simply reset ARM (default is RAM boot).
3102          */
3103         if (enter) {
3104                 bus->alp_only = true;
3105
3106                 ci->coredisable(bus->sdiodev, ci, BCMA_CORE_ARM_CM3);
3107
3108                 ci->resetcore(bus->sdiodev, ci, BCMA_CORE_INTERNAL_MEM);
3109
3110                 /* Clear the top bit of memory */
3111                 if (bus->ramsize) {
3112                         u32 zeros = 0;
3113                         brcmf_sdbrcm_membytes(bus, true, bus->ramsize - 4,
3114                                          (u8 *)&zeros, 4);
3115                 }
3116         } else {
3117                 if (!ci->iscoreup(bus->sdiodev, ci, BCMA_CORE_INTERNAL_MEM)) {
3118                         brcmf_dbg(ERROR, "SOCRAM core is down after reset?\n");
3119                         bcmerror = -EBADE;
3120                         goto fail;
3121                 }
3122
3123                 bcmerror = brcmf_sdbrcm_write_vars(bus);
3124                 if (bcmerror) {
3125                         brcmf_dbg(ERROR, "no vars written to RAM\n");
3126                         bcmerror = 0;
3127                 }
3128
3129                 w_sdreg32(bus, 0xFFFFFFFF,
3130                           offsetof(struct sdpcmd_regs, intstatus), &retries);
3131
3132                 ci->resetcore(bus->sdiodev, ci, BCMA_CORE_ARM_CM3);
3133
3134                 /* Allow HT Clock now that the ARM is running. */
3135                 bus->alp_only = false;
3136
3137                 bus->drvr->busstate = BRCMF_BUS_LOAD;
3138         }
3139 fail:
3140         return bcmerror;
3141 }
3142
3143 static int brcmf_sdbrcm_get_image(char *buf, int len, struct brcmf_bus *bus)
3144 {
3145         if (bus->firmware->size < bus->fw_ptr + len)
3146                 len = bus->firmware->size - bus->fw_ptr;
3147
3148         memcpy(buf, &bus->firmware->data[bus->fw_ptr], len);
3149         bus->fw_ptr += len;
3150         return len;
3151 }
3152
3153 MODULE_FIRMWARE(BCM4329_FW_NAME);
3154 MODULE_FIRMWARE(BCM4329_NV_NAME);
3155
3156 static int brcmf_sdbrcm_download_code_file(struct brcmf_bus *bus)
3157 {
3158         int offset = 0;
3159         uint len;
3160         u8 *memblock = NULL, *memptr;
3161         int ret;
3162
3163         brcmf_dbg(INFO, "Enter\n");
3164
3165         bus->fw_name = BCM4329_FW_NAME;
3166         ret = request_firmware(&bus->firmware, bus->fw_name,
3167                                &bus->sdiodev->func[2]->dev);
3168         if (ret) {
3169                 brcmf_dbg(ERROR, "Fail to request firmware %d\n", ret);
3170                 return ret;
3171         }
3172         bus->fw_ptr = 0;
3173
3174         memptr = memblock = kmalloc(MEMBLOCK + BRCMF_SDALIGN, GFP_ATOMIC);
3175         if (memblock == NULL) {
3176                 ret = -ENOMEM;
3177                 goto err;
3178         }
3179         if ((u32)(unsigned long)memblock % BRCMF_SDALIGN)
3180                 memptr += (BRCMF_SDALIGN -
3181                            ((u32)(unsigned long)memblock % BRCMF_SDALIGN));
3182
3183         /* Download image */
3184         while ((len =
3185                 brcmf_sdbrcm_get_image((char *)memptr, MEMBLOCK, bus))) {
3186                 ret = brcmf_sdbrcm_membytes(bus, true, offset, memptr, len);
3187                 if (ret) {
3188                         brcmf_dbg(ERROR, "error %d on writing %d membytes at 0x%08x\n",
3189                                   ret, MEMBLOCK, offset);
3190                         goto err;
3191                 }
3192
3193                 offset += MEMBLOCK;
3194         }
3195
3196 err:
3197         kfree(memblock);
3198
3199         release_firmware(bus->firmware);
3200         bus->fw_ptr = 0;
3201
3202         return ret;
3203 }
3204
3205 /*
3206  * ProcessVars:Takes a buffer of "<var>=<value>\n" lines read from a file
3207  * and ending in a NUL.
3208  * Removes carriage returns, empty lines, comment lines, and converts
3209  * newlines to NULs.
3210  * Shortens buffer as needed and pads with NULs.  End of buffer is marked
3211  * by two NULs.
3212 */
3213
3214 static uint brcmf_process_nvram_vars(char *varbuf, uint len)
3215 {
3216         char *dp;
3217         bool findNewline;
3218         int column;
3219         uint buf_len, n;
3220
3221         dp = varbuf;
3222
3223         findNewline = false;
3224         column = 0;
3225
3226         for (n = 0; n < len; n++) {
3227                 if (varbuf[n] == 0)
3228                         break;
3229                 if (varbuf[n] == '\r')
3230                         continue;
3231                 if (findNewline && varbuf[n] != '\n')
3232                         continue;
3233                 findNewline = false;
3234                 if (varbuf[n] == '#') {
3235                         findNewline = true;
3236                         continue;
3237                 }
3238                 if (varbuf[n] == '\n') {
3239                         if (column == 0)
3240                                 continue;
3241                         *dp++ = 0;
3242                         column = 0;
3243                         continue;
3244                 }
3245                 *dp++ = varbuf[n];
3246                 column++;
3247         }
3248         buf_len = dp - varbuf;
3249
3250         while (dp < varbuf + n)
3251                 *dp++ = 0;
3252
3253         return buf_len;
3254 }
3255
3256 static int brcmf_sdbrcm_download_nvram(struct brcmf_bus *bus)
3257 {
3258         uint len;
3259         char *memblock = NULL;
3260         char *bufp;
3261         int ret;
3262
3263         bus->nv_name = BCM4329_NV_NAME;
3264         ret = request_firmware(&bus->firmware, bus->nv_name,
3265                                &bus->sdiodev->func[2]->dev);
3266         if (ret) {
3267                 brcmf_dbg(ERROR, "Fail to request nvram %d\n", ret);
3268                 return ret;
3269         }
3270         bus->fw_ptr = 0;
3271
3272         memblock = kmalloc(MEMBLOCK, GFP_ATOMIC);
3273         if (memblock == NULL) {
3274                 ret = -ENOMEM;
3275                 goto err;
3276         }
3277
3278         len = brcmf_sdbrcm_get_image(memblock, MEMBLOCK, bus);
3279
3280         if (len > 0 && len < MEMBLOCK) {
3281                 bufp = (char *)memblock;
3282                 bufp[len] = 0;
3283                 len = brcmf_process_nvram_vars(bufp, len);
3284                 bufp += len;
3285                 *bufp++ = 0;
3286                 if (len)
3287                         ret = brcmf_sdbrcm_downloadvars(bus, memblock, len + 1);
3288                 if (ret)
3289                         brcmf_dbg(ERROR, "error downloading vars: %d\n", ret);
3290         } else {
3291                 brcmf_dbg(ERROR, "error reading nvram file: %d\n", len);
3292                 ret = -EIO;
3293         }
3294
3295 err:
3296         kfree(memblock);
3297
3298         release_firmware(bus->firmware);
3299         bus->fw_ptr = 0;
3300
3301         return ret;
3302 }
3303
3304 static int _brcmf_sdbrcm_download_firmware(struct brcmf_bus *bus)
3305 {
3306         int bcmerror = -1;
3307
3308         /* Keep arm in reset */
3309         if (brcmf_sdbrcm_download_state(bus, true)) {
3310                 brcmf_dbg(ERROR, "error placing ARM core in reset\n");
3311                 goto err;
3312         }
3313
3314         /* External image takes precedence if specified */
3315         if (brcmf_sdbrcm_download_code_file(bus)) {
3316                 brcmf_dbg(ERROR, "dongle image file download failed\n");
3317                 goto err;
3318         }
3319
3320         /* External nvram takes precedence if specified */
3321         if (brcmf_sdbrcm_download_nvram(bus))
3322                 brcmf_dbg(ERROR, "dongle nvram file download failed\n");
3323
3324         /* Take arm out of reset */
3325         if (brcmf_sdbrcm_download_state(bus, false)) {
3326                 brcmf_dbg(ERROR, "error getting out of ARM core reset\n");
3327                 goto err;
3328         }
3329
3330         bcmerror = 0;
3331
3332 err:
3333         return bcmerror;
3334 }
3335
3336 static bool
3337 brcmf_sdbrcm_download_firmware(struct brcmf_bus *bus)
3338 {
3339         bool ret;
3340
3341         /* Download the firmware */
3342         brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
3343
3344         ret = _brcmf_sdbrcm_download_firmware(bus) == 0;
3345
3346         brcmf_sdbrcm_clkctl(bus, CLK_SDONLY, false);
3347
3348         return ret;
3349 }
3350
3351 void brcmf_sdbrcm_bus_stop(struct brcmf_bus *bus)
3352 {
3353         u32 local_hostintmask;
3354         u8 saveclk;
3355         uint retries;
3356         int err;
3357
3358         brcmf_dbg(TRACE, "Enter\n");
3359
3360         if (bus->watchdog_tsk) {
3361                 send_sig(SIGTERM, bus->watchdog_tsk, 1);
3362                 kthread_stop(bus->watchdog_tsk);
3363                 bus->watchdog_tsk = NULL;
3364         }
3365
3366         if (bus->dpc_tsk && bus->dpc_tsk != current) {
3367                 send_sig(SIGTERM, bus->dpc_tsk, 1);
3368                 kthread_stop(bus->dpc_tsk);
3369                 bus->dpc_tsk = NULL;
3370         }
3371
3372         down(&bus->sdsem);
3373
3374         bus_wake(bus);
3375
3376         /* Enable clock for device interrupts */
3377         brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
3378
3379         /* Disable and clear interrupts at the chip level also */
3380         w_sdreg32(bus, 0, offsetof(struct sdpcmd_regs, hostintmask), &retries);
3381         local_hostintmask = bus->hostintmask;
3382         bus->hostintmask = 0;
3383
3384         /* Change our idea of bus state */
3385         bus->drvr->busstate = BRCMF_BUS_DOWN;
3386
3387         /* Force clocks on backplane to be sure F2 interrupt propagates */
3388         saveclk = brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1,
3389                                         SBSDIO_FUNC1_CHIPCLKCSR, &err);
3390         if (!err) {
3391                 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
3392                                        SBSDIO_FUNC1_CHIPCLKCSR,
3393                                        (saveclk | SBSDIO_FORCE_HT), &err);
3394         }
3395         if (err)
3396                 brcmf_dbg(ERROR, "Failed to force clock for F2: err %d\n", err);
3397
3398         /* Turn off the bus (F2), free any pending packets */
3399         brcmf_dbg(INTR, "disable SDIO interrupts\n");
3400         brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_0, SDIO_CCCR_IOEx,
3401                          SDIO_FUNC_ENABLE_1, NULL);
3402
3403         /* Clear any pending interrupts now that F2 is disabled */
3404         w_sdreg32(bus, local_hostintmask,
3405                   offsetof(struct sdpcmd_regs, intstatus), &retries);
3406
3407         /* Turn off the backplane clock (only) */
3408         brcmf_sdbrcm_clkctl(bus, CLK_SDONLY, false);
3409
3410         /* Clear the data packet queues */
3411         brcmu_pktq_flush(&bus->txq, true, NULL, NULL);
3412
3413         /* Clear any held glomming stuff */
3414         if (bus->glomd)
3415                 brcmu_pkt_buf_free_skb(bus->glomd);
3416         brcmf_sdbrcm_free_glom(bus);
3417
3418         /* Clear rx control and wake any waiters */
3419         bus->rxlen = 0;
3420         brcmf_sdbrcm_dcmd_resp_wake(bus);
3421
3422         /* Reset some F2 state stuff */
3423         bus->rxskip = false;
3424         bus->tx_seq = bus->rx_seq = 0;
3425
3426         up(&bus->sdsem);
3427 }
3428
3429 int brcmf_sdbrcm_bus_init(struct brcmf_pub *drvr)
3430 {
3431         struct brcmf_bus *bus = drvr->bus;
3432         unsigned long timeout;
3433         uint retries = 0;
3434         u8 ready, enable;
3435         int err, ret = 0;
3436         u8 saveclk;
3437
3438         brcmf_dbg(TRACE, "Enter\n");
3439
3440         /* try to download image and nvram to the dongle */
3441         if (drvr->busstate == BRCMF_BUS_DOWN) {
3442                 if (!(brcmf_sdbrcm_download_firmware(bus)))
3443                         return -1;
3444         }
3445
3446         if (!bus->drvr)
3447                 return 0;
3448
3449         /* Start the watchdog timer */
3450         bus->drvr->tickcnt = 0;
3451         brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS);
3452
3453         down(&bus->sdsem);
3454
3455         /* Make sure backplane clock is on, needed to generate F2 interrupt */
3456         brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
3457         if (bus->clkstate != CLK_AVAIL)
3458                 goto exit;
3459
3460         /* Force clocks on backplane to be sure F2 interrupt propagates */
3461         saveclk =
3462             brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1,
3463                                   SBSDIO_FUNC1_CHIPCLKCSR, &err);
3464         if (!err) {
3465                 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
3466                                        SBSDIO_FUNC1_CHIPCLKCSR,
3467                                        (saveclk | SBSDIO_FORCE_HT), &err);
3468         }
3469         if (err) {
3470                 brcmf_dbg(ERROR, "Failed to force clock for F2: err %d\n", err);
3471                 goto exit;
3472         }
3473
3474         /* Enable function 2 (frame transfers) */
3475         w_sdreg32(bus, SDPCM_PROT_VERSION << SMB_DATA_VERSION_SHIFT,
3476                   offsetof(struct sdpcmd_regs, tosbmailboxdata), &retries);
3477         enable = (SDIO_FUNC_ENABLE_1 | SDIO_FUNC_ENABLE_2);
3478
3479         brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_0, SDIO_CCCR_IOEx,
3480                                enable, NULL);
3481
3482         timeout = jiffies + msecs_to_jiffies(BRCMF_WAIT_F2RDY);
3483         ready = 0;
3484         while (enable != ready) {
3485                 ready = brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_0,
3486                                               SDIO_CCCR_IORx, NULL);
3487                 if (time_after(jiffies, timeout))
3488                         break;
3489                 else if (time_after(jiffies, timeout - BRCMF_WAIT_F2RDY + 50))
3490                         /* prevent busy waiting if it takes too long */
3491                         msleep_interruptible(20);
3492         }
3493
3494         brcmf_dbg(INFO, "enable 0x%02x, ready 0x%02x\n", enable, ready);
3495
3496         /* If F2 successfully enabled, set core and enable interrupts */
3497         if (ready == enable) {
3498                 /* Set up the interrupt mask and enable interrupts */
3499                 bus->hostintmask = HOSTINTMASK;
3500                 w_sdreg32(bus, bus->hostintmask,
3501                           offsetof(struct sdpcmd_regs, hostintmask), &retries);
3502
3503                 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
3504                                        SBSDIO_WATERMARK, 8, &err);
3505
3506                 /* Set bus state according to enable result */
3507                 drvr->busstate = BRCMF_BUS_DATA;
3508         }
3509
3510         else {
3511                 /* Disable F2 again */
3512                 enable = SDIO_FUNC_ENABLE_1;
3513                 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_0,
3514                                        SDIO_CCCR_IOEx, enable, NULL);
3515         }
3516
3517         /* Restore previous clock setting */
3518         brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
3519                                SBSDIO_FUNC1_CHIPCLKCSR, saveclk, &err);
3520
3521         /* If we didn't come up, turn off backplane clock */
3522         if (drvr->busstate != BRCMF_BUS_DATA)
3523                 brcmf_sdbrcm_clkctl(bus, CLK_NONE, false);
3524
3525 exit:
3526         up(&bus->sdsem);
3527
3528         return ret;
3529 }
3530
3531 void brcmf_sdbrcm_isr(void *arg)
3532 {
3533         struct brcmf_bus *bus = (struct brcmf_bus *) arg;
3534
3535         brcmf_dbg(TRACE, "Enter\n");
3536
3537         if (!bus) {
3538                 brcmf_dbg(ERROR, "bus is null pointer, exiting\n");
3539                 return;
3540         }
3541
3542         if (bus->drvr->busstate == BRCMF_BUS_DOWN) {
3543                 brcmf_dbg(ERROR, "bus is down. we have nothing to do\n");
3544                 return;
3545         }
3546         /* Count the interrupt call */
3547         bus->intrcount++;
3548         bus->ipend = true;
3549
3550         /* Shouldn't get this interrupt if we're sleeping? */
3551         if (bus->sleeping) {
3552                 brcmf_dbg(ERROR, "INTERRUPT WHILE SLEEPING??\n");
3553                 return;
3554         }
3555
3556         /* Disable additional interrupts (is this needed now)? */
3557         if (!bus->intr)
3558                 brcmf_dbg(ERROR, "isr w/o interrupt configured!\n");
3559
3560         bus->dpc_sched = true;
3561         if (bus->dpc_tsk)
3562                 complete(&bus->dpc_wait);
3563 }
3564
3565 static bool brcmf_sdbrcm_bus_watchdog(struct brcmf_pub *drvr)
3566 {
3567         struct brcmf_bus *bus;
3568
3569         brcmf_dbg(TIMER, "Enter\n");
3570
3571         bus = drvr->bus;
3572
3573         /* Ignore the timer if simulating bus down */
3574         if (bus->sleeping)
3575                 return false;
3576
3577         down(&bus->sdsem);
3578
3579         /* Poll period: check device if appropriate. */
3580         if (bus->poll && (++bus->polltick >= bus->pollrate)) {
3581                 u32 intstatus = 0;
3582
3583                 /* Reset poll tick */
3584                 bus->polltick = 0;
3585
3586                 /* Check device if no interrupts */
3587                 if (!bus->intr || (bus->intrcount == bus->lastintrs)) {
3588
3589                         if (!bus->dpc_sched) {
3590                                 u8 devpend;
3591                                 devpend = brcmf_sdcard_cfg_read(bus->sdiodev,
3592                                                 SDIO_FUNC_0, SDIO_CCCR_INTx,
3593                                                 NULL);
3594                                 intstatus =
3595                                     devpend & (INTR_STATUS_FUNC1 |
3596                                                INTR_STATUS_FUNC2);
3597                         }
3598
3599                         /* If there is something, make like the ISR and
3600                                  schedule the DPC */
3601                         if (intstatus) {
3602                                 bus->pollcnt++;
3603                                 bus->ipend = true;
3604
3605                                 bus->dpc_sched = true;
3606                                 if (bus->dpc_tsk)
3607                                         complete(&bus->dpc_wait);
3608                         }
3609                 }
3610
3611                 /* Update interrupt tracking */
3612                 bus->lastintrs = bus->intrcount;
3613         }
3614 #ifdef BCMDBG
3615         /* Poll for console output periodically */
3616         if (drvr->busstate == BRCMF_BUS_DATA && bus->console_interval != 0) {
3617                 bus->console.count += BRCMF_WD_POLL_MS;
3618                 if (bus->console.count >= bus->console_interval) {
3619                         bus->console.count -= bus->console_interval;
3620                         /* Make sure backplane clock is on */
3621                         brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
3622                         if (brcmf_sdbrcm_readconsole(bus) < 0)
3623                                 /* stop on error */
3624                                 bus->console_interval = 0;
3625                 }
3626         }
3627 #endif                          /* BCMDBG */
3628
3629         /* On idle timeout clear activity flag and/or turn off clock */
3630         if ((bus->idletime > 0) && (bus->clkstate == CLK_AVAIL)) {
3631                 if (++bus->idlecount >= bus->idletime) {
3632                         bus->idlecount = 0;
3633                         if (bus->activity) {
3634                                 bus->activity = false;
3635                                 brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS);
3636                         } else {
3637                                 brcmf_sdbrcm_clkctl(bus, CLK_NONE, false);
3638                         }
3639                 }
3640         }
3641
3642         up(&bus->sdsem);
3643
3644         return bus->ipend;
3645 }
3646
3647 static bool brcmf_sdbrcm_chipmatch(u16 chipid)
3648 {
3649         if (chipid == BCM4329_CHIP_ID)
3650                 return true;
3651         return false;
3652 }
3653
3654 static void brcmf_sdbrcm_release_malloc(struct brcmf_bus *bus)
3655 {
3656         brcmf_dbg(TRACE, "Enter\n");
3657
3658         kfree(bus->rxbuf);
3659         bus->rxctl = bus->rxbuf = NULL;
3660         bus->rxlen = 0;
3661
3662         kfree(bus->databuf);
3663         bus->databuf = NULL;
3664 }
3665
3666 static bool brcmf_sdbrcm_probe_malloc(struct brcmf_bus *bus)
3667 {
3668         brcmf_dbg(TRACE, "Enter\n");
3669
3670         if (bus->drvr->maxctl) {
3671                 bus->rxblen =
3672                     roundup((bus->drvr->maxctl + SDPCM_HDRLEN),
3673                             ALIGNMENT) + BRCMF_SDALIGN;
3674                 bus->rxbuf = kmalloc(bus->rxblen, GFP_ATOMIC);
3675                 if (!(bus->rxbuf))
3676                         goto fail;
3677         }
3678
3679         /* Allocate buffer to receive glomed packet */
3680         bus->databuf = kmalloc(MAX_DATA_BUF, GFP_ATOMIC);
3681         if (!(bus->databuf)) {
3682                 /* release rxbuf which was already located as above */
3683                 if (!bus->rxblen)
3684                         kfree(bus->rxbuf);
3685                 goto fail;
3686         }
3687
3688         /* Align the buffer */
3689         if ((unsigned long)bus->databuf % BRCMF_SDALIGN)
3690                 bus->dataptr = bus->databuf + (BRCMF_SDALIGN -
3691                                ((unsigned long)bus->databuf % BRCMF_SDALIGN));
3692         else
3693                 bus->dataptr = bus->databuf;
3694
3695         return true;
3696
3697 fail:
3698         return false;
3699 }
3700
3701 static bool
3702 brcmf_sdbrcm_probe_attach(struct brcmf_bus *bus, u32 regsva)
3703 {
3704         u8 clkctl = 0;
3705         int err = 0;
3706         int reg_addr;
3707         u32 reg_val;
3708         u8 idx;
3709
3710         bus->alp_only = true;
3711
3712         /* Return the window to backplane enumeration space for core access */
3713         if (brcmf_sdcard_set_sbaddr_window(bus->sdiodev, SI_ENUM_BASE))
3714                 brcmf_dbg(ERROR, "FAILED to return to SI_ENUM_BASE\n");
3715
3716 #ifdef BCMDBG
3717         printk(KERN_DEBUG "F1 signature read @0x18000000=0x%4x\n",
3718                brcmf_sdcard_reg_read(bus->sdiodev, SI_ENUM_BASE, 4));
3719
3720 #endif                          /* BCMDBG */
3721
3722         /*
3723          * Force PLL off until brcmf_sdio_chip_attach()
3724          * programs PLL control regs
3725          */
3726
3727         brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
3728                                SBSDIO_FUNC1_CHIPCLKCSR,
3729                                BRCMF_INIT_CLKCTL1, &err);
3730         if (!err)
3731                 clkctl =
3732                     brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1,
3733                                           SBSDIO_FUNC1_CHIPCLKCSR, &err);
3734
3735         if (err || ((clkctl & ~SBSDIO_AVBITS) != BRCMF_INIT_CLKCTL1)) {
3736                 brcmf_dbg(ERROR, "ChipClkCSR access: err %d wrote 0x%02x read 0x%02x\n",
3737                           err, BRCMF_INIT_CLKCTL1, clkctl);
3738                 goto fail;
3739         }
3740
3741         if (brcmf_sdio_chip_attach(bus->sdiodev, &bus->ci, regsva)) {
3742                 brcmf_dbg(ERROR, "brcmf_sdio_chip_attach failed!\n");
3743                 goto fail;
3744         }
3745
3746         if (!brcmf_sdbrcm_chipmatch((u16) bus->ci->chip)) {
3747                 brcmf_dbg(ERROR, "unsupported chip: 0x%04x\n", bus->ci->chip);
3748                 goto fail;
3749         }
3750
3751         brcmf_sdio_chip_drivestrengthinit(bus->sdiodev, bus->ci,
3752                                           SDIO_DRIVE_STRENGTH);
3753
3754         /* Get info on the SOCRAM cores... */
3755         bus->ramsize = bus->ci->ramsize;
3756         if (!(bus->ramsize)) {
3757                 brcmf_dbg(ERROR, "failed to find SOCRAM memory!\n");
3758                 goto fail;
3759         }
3760
3761         /* Set core control so an SDIO reset does a backplane reset */
3762         idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV);
3763         reg_addr = bus->ci->c_inf[idx].base +
3764                    offsetof(struct sdpcmd_regs, corecontrol);
3765         reg_val = brcmf_sdcard_reg_read(bus->sdiodev, reg_addr, sizeof(u32));
3766         brcmf_sdcard_reg_write(bus->sdiodev, reg_addr, sizeof(u32),
3767                                reg_val | CC_BPRESEN);
3768
3769         brcmu_pktq_init(&bus->txq, (PRIOMASK + 1), TXQLEN);
3770
3771         /* Locate an appropriately-aligned portion of hdrbuf */
3772         bus->rxhdr = (u8 *) roundup((unsigned long)&bus->hdrbuf[0],
3773                                     BRCMF_SDALIGN);
3774
3775         /* Set the poll and/or interrupt flags */
3776         bus->intr = true;
3777         bus->poll = false;
3778         if (bus->poll)
3779                 bus->pollrate = 1;
3780
3781         return true;
3782
3783 fail:
3784         return false;
3785 }
3786
3787 static bool brcmf_sdbrcm_probe_init(struct brcmf_bus *bus)
3788 {
3789         brcmf_dbg(TRACE, "Enter\n");
3790
3791         /* Disable F2 to clear any intermediate frame state on the dongle */
3792         brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_0, SDIO_CCCR_IOEx,
3793                                SDIO_FUNC_ENABLE_1, NULL);
3794
3795         bus->drvr->busstate = BRCMF_BUS_DOWN;
3796         bus->sleeping = false;
3797         bus->rxflow = false;
3798
3799         /* Done with backplane-dependent accesses, can drop clock... */
3800         brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
3801                                SBSDIO_FUNC1_CHIPCLKCSR, 0, NULL);
3802
3803         /* ...and initialize clock/power states */
3804         bus->clkstate = CLK_SDONLY;
3805         bus->idletime = BRCMF_IDLE_INTERVAL;
3806         bus->idleclock = BRCMF_IDLE_ACTIVE;
3807
3808         /* Query the F2 block size, set roundup accordingly */
3809         bus->blocksize = bus->sdiodev->func[2]->cur_blksize;
3810         bus->roundup = min(max_roundup, bus->blocksize);
3811
3812         /* bus module does not support packet chaining */
3813         bus->use_rxchain = false;
3814         bus->sd_rxchain = false;
3815
3816         return true;
3817 }
3818
3819 static int
3820 brcmf_sdbrcm_watchdog_thread(void *data)
3821 {
3822         struct brcmf_bus *bus = (struct brcmf_bus *)data;
3823
3824         allow_signal(SIGTERM);
3825         /* Run until signal received */
3826         while (1) {
3827                 if (kthread_should_stop())
3828                         break;
3829                 if (!wait_for_completion_interruptible(&bus->watchdog_wait)) {
3830                         brcmf_sdbrcm_bus_watchdog(bus->drvr);
3831                         /* Count the tick for reference */
3832                         bus->drvr->tickcnt++;
3833                 } else
3834                         break;
3835         }
3836         return 0;
3837 }
3838
3839 static void
3840 brcmf_sdbrcm_watchdog(unsigned long data)
3841 {
3842         struct brcmf_bus *bus = (struct brcmf_bus *)data;
3843
3844         if (bus->watchdog_tsk) {
3845                 complete(&bus->watchdog_wait);
3846                 /* Reschedule the watchdog */
3847                 if (bus->wd_timer_valid)
3848                         mod_timer(&bus->timer,
3849                                   jiffies + BRCMF_WD_POLL_MS * HZ / 1000);
3850         }
3851 }
3852
3853 static void brcmf_sdbrcm_release_dongle(struct brcmf_bus *bus)
3854 {
3855         brcmf_dbg(TRACE, "Enter\n");
3856
3857         if (bus->ci) {
3858                 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
3859                 brcmf_sdbrcm_clkctl(bus, CLK_NONE, false);
3860                 brcmf_sdio_chip_detach(&bus->ci);
3861                 if (bus->vars && bus->varsz)
3862                         kfree(bus->vars);
3863                 bus->vars = NULL;
3864         }
3865
3866         brcmf_dbg(TRACE, "Disconnected\n");
3867 }
3868
3869 /* Detach and free everything */
3870 static void brcmf_sdbrcm_release(struct brcmf_bus *bus)
3871 {
3872         brcmf_dbg(TRACE, "Enter\n");
3873
3874         if (bus) {
3875                 /* De-register interrupt handler */
3876                 brcmf_sdcard_intr_dereg(bus->sdiodev);
3877
3878                 if (bus->drvr) {
3879                         brcmf_detach(bus->drvr);
3880                         brcmf_sdbrcm_release_dongle(bus);
3881                         bus->drvr = NULL;
3882                 }
3883
3884                 brcmf_sdbrcm_release_malloc(bus);
3885
3886                 kfree(bus);
3887         }
3888
3889         brcmf_dbg(TRACE, "Disconnected\n");
3890 }
3891
3892 void *brcmf_sdbrcm_probe(u16 bus_no, u16 slot, u16 func, uint bustype,
3893                          u32 regsva, struct brcmf_sdio_dev *sdiodev)
3894 {
3895         int ret;
3896         struct brcmf_bus *bus;
3897
3898         /* Init global variables at run-time, not as part of the declaration.
3899          * This is required to support init/de-init of the driver.
3900          * Initialization
3901          * of globals as part of the declaration results in non-deterministic
3902          * behavior since the value of the globals may be different on the
3903          * first time that the driver is initialized vs subsequent
3904          * initializations.
3905          */
3906         brcmf_c_init();
3907
3908         brcmf_dbg(TRACE, "Enter\n");
3909
3910         /* We make an assumption about address window mappings:
3911          * regsva == SI_ENUM_BASE*/
3912
3913         /* Allocate private bus interface state */
3914         bus = kzalloc(sizeof(struct brcmf_bus), GFP_ATOMIC);
3915         if (!bus)
3916                 goto fail;
3917
3918         bus->sdiodev = sdiodev;
3919         sdiodev->bus = bus;
3920         skb_queue_head_init(&bus->glom);
3921         bus->txbound = BRCMF_TXBOUND;
3922         bus->rxbound = BRCMF_RXBOUND;
3923         bus->txminmax = BRCMF_TXMINMAX;
3924         bus->tx_seq = SDPCM_SEQUENCE_WRAP - 1;
3925         bus->usebufpool = false;        /* Use bufpool if allocated,
3926                                          else use locally malloced rxbuf */
3927
3928         /* attempt to attach to the dongle */
3929         if (!(brcmf_sdbrcm_probe_attach(bus, regsva))) {
3930                 brcmf_dbg(ERROR, "brcmf_sdbrcm_probe_attach failed\n");
3931                 goto fail;
3932         }
3933
3934         spin_lock_init(&bus->txqlock);
3935         init_waitqueue_head(&bus->ctrl_wait);
3936         init_waitqueue_head(&bus->dcmd_resp_wait);
3937
3938         /* Set up the watchdog timer */
3939         init_timer(&bus->timer);
3940         bus->timer.data = (unsigned long)bus;
3941         bus->timer.function = brcmf_sdbrcm_watchdog;
3942
3943         /* Initialize thread based operation and lock */
3944         sema_init(&bus->sdsem, 1);
3945
3946         /* Initialize watchdog thread */
3947         init_completion(&bus->watchdog_wait);
3948         bus->watchdog_tsk = kthread_run(brcmf_sdbrcm_watchdog_thread,
3949                                         bus, "brcmf_watchdog");
3950         if (IS_ERR(bus->watchdog_tsk)) {
3951                 printk(KERN_WARNING
3952                        "brcmf_watchdog thread failed to start\n");
3953                 bus->watchdog_tsk = NULL;
3954         }
3955         /* Initialize DPC thread */
3956         init_completion(&bus->dpc_wait);
3957         bus->dpc_tsk = kthread_run(brcmf_sdbrcm_dpc_thread,
3958                                    bus, "brcmf_dpc");
3959         if (IS_ERR(bus->dpc_tsk)) {
3960                 printk(KERN_WARNING
3961                        "brcmf_dpc thread failed to start\n");
3962                 bus->dpc_tsk = NULL;
3963         }
3964
3965         /* Attach to the brcmf/OS/network interface */
3966         bus->drvr = brcmf_attach(bus, SDPCM_RESERVE);
3967         if (!bus->drvr) {
3968                 brcmf_dbg(ERROR, "brcmf_attach failed\n");
3969                 goto fail;
3970         }
3971
3972         /* Allocate buffers */
3973         if (!(brcmf_sdbrcm_probe_malloc(bus))) {
3974                 brcmf_dbg(ERROR, "brcmf_sdbrcm_probe_malloc failed\n");
3975                 goto fail;
3976         }
3977
3978         if (!(brcmf_sdbrcm_probe_init(bus))) {
3979                 brcmf_dbg(ERROR, "brcmf_sdbrcm_probe_init failed\n");
3980                 goto fail;
3981         }
3982
3983         /* Register interrupt callback, but mask it (not operational yet). */
3984         brcmf_dbg(INTR, "disable SDIO interrupts (not interested yet)\n");
3985         ret = brcmf_sdcard_intr_reg(bus->sdiodev);
3986         if (ret != 0) {
3987                 brcmf_dbg(ERROR, "FAILED: sdcard_intr_reg returned %d\n", ret);
3988                 goto fail;
3989         }
3990         brcmf_dbg(INTR, "registered SDIO interrupt function ok\n");
3991
3992         brcmf_dbg(INFO, "completed!!\n");
3993
3994         /* if firmware path present try to download and bring up bus */
3995         ret = brcmf_bus_start(bus->drvr);
3996         if (ret != 0) {
3997                 if (ret == -ENOLINK) {
3998                         brcmf_dbg(ERROR, "dongle is not responding\n");
3999                         goto fail;
4000                 }
4001         }
4002
4003         /* add interface and open for business */
4004         if (brcmf_add_if((struct brcmf_info *)bus->drvr, 0, "wlan%d", NULL)) {
4005                 brcmf_dbg(ERROR, "Add primary net device interface failed!!\n");
4006                 goto fail;
4007         }
4008
4009         return bus;
4010
4011 fail:
4012         brcmf_sdbrcm_release(bus);
4013         return NULL;
4014 }
4015
4016 void brcmf_sdbrcm_disconnect(void *ptr)
4017 {
4018         struct brcmf_bus *bus = (struct brcmf_bus *)ptr;
4019
4020         brcmf_dbg(TRACE, "Enter\n");
4021
4022         if (bus)
4023                 brcmf_sdbrcm_release(bus);
4024
4025         brcmf_dbg(TRACE, "Disconnected\n");
4026 }
4027
4028 struct device *brcmf_bus_get_device(struct brcmf_bus *bus)
4029 {
4030         return &bus->sdiodev->func[2]->dev;
4031 }
4032
4033 void
4034 brcmf_sdbrcm_wd_timer(struct brcmf_bus *bus, uint wdtick)
4035 {
4036         /* Totally stop the timer */
4037         if (!wdtick && bus->wd_timer_valid == true) {
4038                 del_timer_sync(&bus->timer);
4039                 bus->wd_timer_valid = false;
4040                 bus->save_ms = wdtick;
4041                 return;
4042         }
4043
4044         /* don't start the wd until fw is loaded */
4045         if (bus->drvr->busstate == BRCMF_BUS_DOWN)
4046                 return;
4047
4048         if (wdtick) {
4049                 if (bus->save_ms != BRCMF_WD_POLL_MS) {
4050                         if (bus->wd_timer_valid == true)
4051                                 /* Stop timer and restart at new value */
4052                                 del_timer_sync(&bus->timer);
4053
4054                         /* Create timer again when watchdog period is
4055                            dynamically changed or in the first instance
4056                          */
4057                         bus->timer.expires =
4058                                 jiffies + BRCMF_WD_POLL_MS * HZ / 1000;
4059                         add_timer(&bus->timer);
4060
4061                 } else {
4062                         /* Re arm the timer, at last watchdog period */
4063                         mod_timer(&bus->timer,
4064                                 jiffies + BRCMF_WD_POLL_MS * HZ / 1000);
4065                 }
4066
4067                 bus->wd_timer_valid = true;
4068                 bus->save_ms = wdtick;
4069         }
4070 }