2 * Copyright (c) 2008 Atheros Communications Inc.
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 /* mac80211 and PCI callbacks */
19 #include <linux/nl80211.h>
23 #define ATH_PCI_VERSION "0.1"
25 static char *dev_info = "ath9k";
27 MODULE_AUTHOR("Atheros Communications");
28 MODULE_DESCRIPTION("Support for Atheros 802.11n wireless LAN cards.");
29 MODULE_SUPPORTED_DEVICE("Atheros 802.11n WLAN cards");
30 MODULE_LICENSE("Dual BSD/GPL");
32 static struct pci_device_id ath_pci_id_table[] __devinitdata = {
33 { PCI_VDEVICE(ATHEROS, 0x0023) }, /* PCI */
34 { PCI_VDEVICE(ATHEROS, 0x0024) }, /* PCI-E */
35 { PCI_VDEVICE(ATHEROS, 0x0027) }, /* PCI */
36 { PCI_VDEVICE(ATHEROS, 0x0029) }, /* PCI */
37 { PCI_VDEVICE(ATHEROS, 0x002A) }, /* PCI-E */
41 static void ath_detach(struct ath_softc *sc);
43 static int ath_get_channel(struct ath_softc *sc,
44 struct ieee80211_channel *chan)
48 for (i = 0; i < sc->sc_ah->ah_nchan; i++) {
49 if (sc->sc_ah->ah_channels[i].channel == chan->center_freq)
56 static u32 ath_get_extchanmode(struct ath_softc *sc,
57 struct ieee80211_channel *chan)
60 u8 ext_chan_offset = sc->sc_ht_info.ext_chan_offset;
61 enum ath9k_ht_macmode tx_chan_width = sc->sc_ht_info.tx_chan_width;
64 case IEEE80211_BAND_2GHZ:
65 if ((ext_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_NONE) &&
66 (tx_chan_width == ATH9K_HT_MACMODE_20))
67 chanmode = CHANNEL_G_HT20;
68 if ((ext_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE) &&
69 (tx_chan_width == ATH9K_HT_MACMODE_2040))
70 chanmode = CHANNEL_G_HT40PLUS;
71 if ((ext_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW) &&
72 (tx_chan_width == ATH9K_HT_MACMODE_2040))
73 chanmode = CHANNEL_G_HT40MINUS;
75 case IEEE80211_BAND_5GHZ:
76 if ((ext_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_NONE) &&
77 (tx_chan_width == ATH9K_HT_MACMODE_20))
78 chanmode = CHANNEL_A_HT20;
79 if ((ext_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE) &&
80 (tx_chan_width == ATH9K_HT_MACMODE_2040))
81 chanmode = CHANNEL_A_HT40PLUS;
82 if ((ext_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW) &&
83 (tx_chan_width == ATH9K_HT_MACMODE_2040))
84 chanmode = CHANNEL_A_HT40MINUS;
94 static int ath_setkey_tkip(struct ath_softc *sc,
95 struct ieee80211_key_conf *key,
96 struct ath9k_keyval *hk,
100 u8 *key_txmic = NULL;
102 key_txmic = key->key + NL80211_TKIP_DATA_OFFSET_TX_MIC_KEY;
103 key_rxmic = key->key + NL80211_TKIP_DATA_OFFSET_RX_MIC_KEY;
106 /* Group key installation */
107 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
108 return ath_keyset(sc, key->keyidx, hk, addr);
110 if (!sc->sc_splitmic) {
112 * data key goes at first index,
113 * the hal handles the MIC keys at index+64.
115 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
116 memcpy(hk->kv_txmic, key_txmic, sizeof(hk->kv_txmic));
117 return ath_keyset(sc, key->keyidx, hk, addr);
120 * TX key goes at first index, RX key at +32.
121 * The hal handles the MIC keys at index+64.
123 memcpy(hk->kv_mic, key_txmic, sizeof(hk->kv_mic));
124 if (!ath_keyset(sc, key->keyidx, hk, NULL)) {
125 /* Txmic entry failed. No need to proceed further */
126 DPRINTF(sc, ATH_DBG_KEYCACHE,
127 "%s Setting TX MIC Key Failed\n", __func__);
131 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
132 /* XXX delete tx key on failure? */
133 return ath_keyset(sc, key->keyidx+32, hk, addr);
136 static int ath_key_config(struct ath_softc *sc,
138 struct ieee80211_key_conf *key)
140 struct ieee80211_vif *vif;
141 struct ath9k_keyval hk;
142 const u8 *mac = NULL;
144 enum nl80211_iftype opmode;
146 memset(&hk, 0, sizeof(hk));
150 hk.kv_type = ATH9K_CIPHER_WEP;
153 hk.kv_type = ATH9K_CIPHER_TKIP;
156 hk.kv_type = ATH9K_CIPHER_AES_CCM;
162 hk.kv_len = key->keylen;
163 memcpy(hk.kv_val, key->key, key->keylen);
168 vif = sc->sc_vaps[0];
173 * For _M_STA mc tx, we will not setup a key at all since we never
175 * _M_STA mc rx, we will use the keyID.
176 * for _M_IBSS mc tx, we will use the keyID, and no macaddr.
177 * for _M_IBSS mc rx, we will alloc a slot and plumb the mac of the
178 * peer node. BUT we will plumb a cleartext key so that we can do
179 * perSta default key table lookup in software.
181 if (is_broadcast_ether_addr(addr)) {
183 case NL80211_IFTYPE_STATION:
184 /* default key: could be group WPA key
185 * or could be static WEP key */
188 case NL80211_IFTYPE_ADHOC:
190 case NL80211_IFTYPE_AP:
200 if (key->alg == ALG_TKIP)
201 ret = ath_setkey_tkip(sc, key, &hk, mac);
203 ret = ath_keyset(sc, key->keyidx, &hk, mac);
211 static void ath_key_delete(struct ath_softc *sc, struct ieee80211_key_conf *key)
215 freeslot = (key->keyidx >= 4) ? 1 : 0;
216 ath_key_reset(sc, key->keyidx, freeslot);
219 static void setup_ht_cap(struct ieee80211_sta_ht_cap *ht_info)
221 #define ATH9K_HT_CAP_MAXRXAMPDU_65536 0x3 /* 2 ^ 16 */
222 #define ATH9K_HT_CAP_MPDUDENSITY_8 0x6 /* 8 usec */
224 ht_info->ht_supported = true;
225 ht_info->cap = IEEE80211_HT_CAP_SUP_WIDTH_20_40 |
226 IEEE80211_HT_CAP_SM_PS |
227 IEEE80211_HT_CAP_SGI_40 |
228 IEEE80211_HT_CAP_DSSSCCK40;
230 ht_info->ampdu_factor = ATH9K_HT_CAP_MAXRXAMPDU_65536;
231 ht_info->ampdu_density = ATH9K_HT_CAP_MPDUDENSITY_8;
232 /* set up supported mcs set */
233 memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
234 ht_info->mcs.rx_mask[0] = 0xff;
235 ht_info->mcs.rx_mask[1] = 0xff;
236 ht_info->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
239 static void ath9k_ht_conf(struct ath_softc *sc,
240 struct ieee80211_bss_conf *bss_conf)
242 struct ath_ht_info *ht_info = &sc->sc_ht_info;
244 if (sc->hw->conf.ht.enabled) {
245 ht_info->ext_chan_offset = bss_conf->ht.secondary_channel_offset;
247 if (bss_conf->ht.width_40_ok)
248 ht_info->tx_chan_width = ATH9K_HT_MACMODE_2040;
250 ht_info->tx_chan_width = ATH9K_HT_MACMODE_20;
252 ath9k_hw_set11nmac2040(sc->sc_ah, ht_info->tx_chan_width);
256 static void ath9k_bss_assoc_info(struct ath_softc *sc,
257 struct ieee80211_vif *vif,
258 struct ieee80211_bss_conf *bss_conf)
260 struct ieee80211_hw *hw = sc->hw;
261 struct ieee80211_channel *curchan = hw->conf.channel;
262 struct ath_vap *avp = (void *)vif->drv_priv;
265 if (bss_conf->assoc) {
266 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Bss Info ASSOC %d\n",
270 /* New association, store aid */
271 if (avp->av_opmode == ATH9K_M_STA) {
272 sc->sc_curaid = bss_conf->aid;
273 ath9k_hw_write_associd(sc->sc_ah, sc->sc_curbssid,
277 /* Configure the beacon */
278 ath_beacon_config(sc, 0);
279 sc->sc_flags |= SC_OP_BEACONS;
281 /* Reset rssi stats */
282 sc->sc_halstats.ns_avgbrssi = ATH_RSSI_DUMMY_MARKER;
283 sc->sc_halstats.ns_avgrssi = ATH_RSSI_DUMMY_MARKER;
284 sc->sc_halstats.ns_avgtxrssi = ATH_RSSI_DUMMY_MARKER;
285 sc->sc_halstats.ns_avgtxrate = ATH_RATE_DUMMY_MARKER;
287 /* Update chainmask */
288 ath_update_chainmask(sc, hw->conf.ht.enabled);
290 DPRINTF(sc, ATH_DBG_CONFIG,
291 "%s: bssid %pM aid 0x%x\n",
293 sc->sc_curbssid, sc->sc_curaid);
295 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Set channel: %d MHz\n",
297 curchan->center_freq);
299 pos = ath_get_channel(sc, curchan);
301 DPRINTF(sc, ATH_DBG_FATAL,
302 "%s: Invalid channel\n", __func__);
306 if (hw->conf.ht.enabled)
307 sc->sc_ah->ah_channels[pos].chanmode =
308 ath_get_extchanmode(sc, curchan);
310 sc->sc_ah->ah_channels[pos].chanmode =
311 (curchan->band == IEEE80211_BAND_2GHZ) ?
312 CHANNEL_G : CHANNEL_A;
314 /* set h/w channel */
315 if (ath_set_channel(sc, &sc->sc_ah->ah_channels[pos]) < 0)
316 DPRINTF(sc, ATH_DBG_FATAL,
317 "%s: Unable to set channel\n",
320 mod_timer(&sc->sc_ani.timer,
321 jiffies + msecs_to_jiffies(ATH_ANI_POLLINTERVAL));
324 DPRINTF(sc, ATH_DBG_CONFIG,
325 "%s: Bss Info DISSOC\n", __func__);
330 void ath_get_beaconconfig(struct ath_softc *sc,
332 struct ath_beacon_config *conf)
334 struct ieee80211_hw *hw = sc->hw;
336 /* fill in beacon config data */
338 conf->beacon_interval = hw->conf.beacon_int;
339 conf->listen_interval = 100;
340 conf->dtim_count = 1;
341 conf->bmiss_timeout = ATH_DEFAULT_BMISS_LIMIT * conf->listen_interval;
344 void ath_tx_complete(struct ath_softc *sc, struct sk_buff *skb,
345 struct ath_xmit_status *tx_status)
347 struct ieee80211_hw *hw = sc->hw;
348 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
350 DPRINTF(sc, ATH_DBG_XMIT,
351 "%s: TX complete: skb: %p\n", __func__, skb);
353 ieee80211_tx_info_clear_status(tx_info);
354 if (tx_info->flags & IEEE80211_TX_CTL_NO_ACK ||
355 tx_info->flags & IEEE80211_TX_STAT_TX_FILTERED) {
356 /* free driver's private data area of tx_info, XXX: HACK! */
357 if (tx_info->control.vif != NULL)
358 kfree(tx_info->control.vif);
359 tx_info->control.vif = NULL;
362 if (tx_status->flags & ATH_TX_BAR) {
363 tx_info->flags |= IEEE80211_TX_STAT_AMPDU_NO_BACK;
364 tx_status->flags &= ~ATH_TX_BAR;
367 if (!(tx_status->flags & (ATH_TX_ERROR | ATH_TX_XRETRY))) {
368 /* Frame was ACKed */
369 tx_info->flags |= IEEE80211_TX_STAT_ACK;
372 tx_info->status.rates[0].count = tx_status->retries + 1;
374 ieee80211_tx_status(hw, skb);
377 /********************************/
379 /********************************/
381 static void ath_led_brightness(struct led_classdev *led_cdev,
382 enum led_brightness brightness)
384 struct ath_led *led = container_of(led_cdev, struct ath_led, led_cdev);
385 struct ath_softc *sc = led->sc;
387 switch (brightness) {
389 if (led->led_type == ATH_LED_ASSOC ||
390 led->led_type == ATH_LED_RADIO)
391 sc->sc_flags &= ~SC_OP_LED_ASSOCIATED;
392 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN,
393 (led->led_type == ATH_LED_RADIO) ? 1 :
394 !!(sc->sc_flags & SC_OP_LED_ASSOCIATED));
397 if (led->led_type == ATH_LED_ASSOC)
398 sc->sc_flags |= SC_OP_LED_ASSOCIATED;
399 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 0);
406 static int ath_register_led(struct ath_softc *sc, struct ath_led *led,
412 led->led_cdev.name = led->name;
413 led->led_cdev.default_trigger = trigger;
414 led->led_cdev.brightness_set = ath_led_brightness;
416 ret = led_classdev_register(wiphy_dev(sc->hw->wiphy), &led->led_cdev);
418 DPRINTF(sc, ATH_DBG_FATAL,
419 "Failed to register led:%s", led->name);
425 static void ath_unregister_led(struct ath_led *led)
427 if (led->registered) {
428 led_classdev_unregister(&led->led_cdev);
433 static void ath_deinit_leds(struct ath_softc *sc)
435 ath_unregister_led(&sc->assoc_led);
436 sc->sc_flags &= ~SC_OP_LED_ASSOCIATED;
437 ath_unregister_led(&sc->tx_led);
438 ath_unregister_led(&sc->rx_led);
439 ath_unregister_led(&sc->radio_led);
440 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 1);
443 static void ath_init_leds(struct ath_softc *sc)
448 /* Configure gpio 1 for output */
449 ath9k_hw_cfg_output(sc->sc_ah, ATH_LED_PIN,
450 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
451 /* LED off, active low */
452 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 1);
454 trigger = ieee80211_get_radio_led_name(sc->hw);
455 snprintf(sc->radio_led.name, sizeof(sc->radio_led.name),
456 "ath9k-%s:radio", wiphy_name(sc->hw->wiphy));
457 ret = ath_register_led(sc, &sc->radio_led, trigger);
458 sc->radio_led.led_type = ATH_LED_RADIO;
462 trigger = ieee80211_get_assoc_led_name(sc->hw);
463 snprintf(sc->assoc_led.name, sizeof(sc->assoc_led.name),
464 "ath9k-%s:assoc", wiphy_name(sc->hw->wiphy));
465 ret = ath_register_led(sc, &sc->assoc_led, trigger);
466 sc->assoc_led.led_type = ATH_LED_ASSOC;
470 trigger = ieee80211_get_tx_led_name(sc->hw);
471 snprintf(sc->tx_led.name, sizeof(sc->tx_led.name),
472 "ath9k-%s:tx", wiphy_name(sc->hw->wiphy));
473 ret = ath_register_led(sc, &sc->tx_led, trigger);
474 sc->tx_led.led_type = ATH_LED_TX;
478 trigger = ieee80211_get_rx_led_name(sc->hw);
479 snprintf(sc->rx_led.name, sizeof(sc->rx_led.name),
480 "ath9k-%s:rx", wiphy_name(sc->hw->wiphy));
481 ret = ath_register_led(sc, &sc->rx_led, trigger);
482 sc->rx_led.led_type = ATH_LED_RX;
492 #if defined(CONFIG_RFKILL) || defined(CONFIG_RFKILL_MODULE)
494 /*******************/
496 /*******************/
498 static void ath_radio_enable(struct ath_softc *sc)
500 struct ath_hal *ah = sc->sc_ah;
503 spin_lock_bh(&sc->sc_resetlock);
504 if (!ath9k_hw_reset(ah, ah->ah_curchan,
505 sc->sc_ht_info.tx_chan_width,
508 sc->sc_ht_extprotspacing,
510 DPRINTF(sc, ATH_DBG_FATAL,
511 "%s: unable to reset channel %u (%uMhz) "
512 "flags 0x%x hal status %u\n", __func__,
513 ath9k_hw_mhz2ieee(ah,
514 ah->ah_curchan->channel,
515 ah->ah_curchan->channelFlags),
516 ah->ah_curchan->channel,
517 ah->ah_curchan->channelFlags, status);
519 spin_unlock_bh(&sc->sc_resetlock);
521 ath_update_txpow(sc);
522 if (ath_startrecv(sc) != 0) {
523 DPRINTF(sc, ATH_DBG_FATAL,
524 "%s: unable to restart recv logic\n", __func__);
528 if (sc->sc_flags & SC_OP_BEACONS)
529 ath_beacon_config(sc, ATH_IF_ID_ANY); /* restart beacons */
531 /* Re-Enable interrupts */
532 ath9k_hw_set_interrupts(ah, sc->sc_imask);
535 ath9k_hw_cfg_output(ah, ATH_LED_PIN,
536 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
537 ath9k_hw_set_gpio(ah, ATH_LED_PIN, 0);
539 ieee80211_wake_queues(sc->hw);
542 static void ath_radio_disable(struct ath_softc *sc)
544 struct ath_hal *ah = sc->sc_ah;
548 ieee80211_stop_queues(sc->hw);
551 ath9k_hw_set_gpio(ah, ATH_LED_PIN, 1);
552 ath9k_hw_cfg_gpio_input(ah, ATH_LED_PIN);
554 /* Disable interrupts */
555 ath9k_hw_set_interrupts(ah, 0);
557 ath_draintxq(sc, false); /* clear pending tx frames */
558 ath_stoprecv(sc); /* turn off frame recv */
559 ath_flushrecv(sc); /* flush recv queue */
561 spin_lock_bh(&sc->sc_resetlock);
562 if (!ath9k_hw_reset(ah, ah->ah_curchan,
563 sc->sc_ht_info.tx_chan_width,
566 sc->sc_ht_extprotspacing,
568 DPRINTF(sc, ATH_DBG_FATAL,
569 "%s: unable to reset channel %u (%uMhz) "
570 "flags 0x%x hal status %u\n", __func__,
571 ath9k_hw_mhz2ieee(ah,
572 ah->ah_curchan->channel,
573 ah->ah_curchan->channelFlags),
574 ah->ah_curchan->channel,
575 ah->ah_curchan->channelFlags, status);
577 spin_unlock_bh(&sc->sc_resetlock);
579 ath9k_hw_phy_disable(ah);
580 ath9k_hw_setpower(ah, ATH9K_PM_FULL_SLEEP);
583 static bool ath_is_rfkill_set(struct ath_softc *sc)
585 struct ath_hal *ah = sc->sc_ah;
587 return ath9k_hw_gpio_get(ah, ah->ah_rfkill_gpio) ==
588 ah->ah_rfkill_polarity;
591 /* h/w rfkill poll function */
592 static void ath_rfkill_poll(struct work_struct *work)
594 struct ath_softc *sc = container_of(work, struct ath_softc,
595 rf_kill.rfkill_poll.work);
598 if (sc->sc_flags & SC_OP_INVALID)
601 radio_on = !ath_is_rfkill_set(sc);
604 * enable/disable radio only when there is a
605 * state change in RF switch
607 if (radio_on == !!(sc->sc_flags & SC_OP_RFKILL_HW_BLOCKED)) {
608 enum rfkill_state state;
610 if (sc->sc_flags & SC_OP_RFKILL_SW_BLOCKED) {
611 state = radio_on ? RFKILL_STATE_SOFT_BLOCKED
612 : RFKILL_STATE_HARD_BLOCKED;
613 } else if (radio_on) {
614 ath_radio_enable(sc);
615 state = RFKILL_STATE_UNBLOCKED;
617 ath_radio_disable(sc);
618 state = RFKILL_STATE_HARD_BLOCKED;
621 if (state == RFKILL_STATE_HARD_BLOCKED)
622 sc->sc_flags |= SC_OP_RFKILL_HW_BLOCKED;
624 sc->sc_flags &= ~SC_OP_RFKILL_HW_BLOCKED;
626 rfkill_force_state(sc->rf_kill.rfkill, state);
629 queue_delayed_work(sc->hw->workqueue, &sc->rf_kill.rfkill_poll,
630 msecs_to_jiffies(ATH_RFKILL_POLL_INTERVAL));
633 /* s/w rfkill handler */
634 static int ath_sw_toggle_radio(void *data, enum rfkill_state state)
636 struct ath_softc *sc = data;
639 case RFKILL_STATE_SOFT_BLOCKED:
640 if (!(sc->sc_flags & (SC_OP_RFKILL_HW_BLOCKED |
641 SC_OP_RFKILL_SW_BLOCKED)))
642 ath_radio_disable(sc);
643 sc->sc_flags |= SC_OP_RFKILL_SW_BLOCKED;
645 case RFKILL_STATE_UNBLOCKED:
646 if ((sc->sc_flags & SC_OP_RFKILL_SW_BLOCKED)) {
647 sc->sc_flags &= ~SC_OP_RFKILL_SW_BLOCKED;
648 if (sc->sc_flags & SC_OP_RFKILL_HW_BLOCKED) {
649 DPRINTF(sc, ATH_DBG_FATAL, "Can't turn on the"
650 "radio as it is disabled by h/w \n");
653 ath_radio_enable(sc);
661 /* Init s/w rfkill */
662 static int ath_init_sw_rfkill(struct ath_softc *sc)
664 sc->rf_kill.rfkill = rfkill_allocate(wiphy_dev(sc->hw->wiphy),
666 if (!sc->rf_kill.rfkill) {
667 DPRINTF(sc, ATH_DBG_FATAL, "Failed to allocate rfkill\n");
671 snprintf(sc->rf_kill.rfkill_name, sizeof(sc->rf_kill.rfkill_name),
672 "ath9k-%s:rfkill", wiphy_name(sc->hw->wiphy));
673 sc->rf_kill.rfkill->name = sc->rf_kill.rfkill_name;
674 sc->rf_kill.rfkill->data = sc;
675 sc->rf_kill.rfkill->toggle_radio = ath_sw_toggle_radio;
676 sc->rf_kill.rfkill->state = RFKILL_STATE_UNBLOCKED;
677 sc->rf_kill.rfkill->user_claim_unsupported = 1;
682 /* Deinitialize rfkill */
683 static void ath_deinit_rfkill(struct ath_softc *sc)
685 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
686 cancel_delayed_work_sync(&sc->rf_kill.rfkill_poll);
688 if (sc->sc_flags & SC_OP_RFKILL_REGISTERED) {
689 rfkill_unregister(sc->rf_kill.rfkill);
690 sc->sc_flags &= ~SC_OP_RFKILL_REGISTERED;
691 sc->rf_kill.rfkill = NULL;
695 static int ath_start_rfkill_poll(struct ath_softc *sc)
697 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
698 queue_delayed_work(sc->hw->workqueue,
699 &sc->rf_kill.rfkill_poll, 0);
701 if (!(sc->sc_flags & SC_OP_RFKILL_REGISTERED)) {
702 if (rfkill_register(sc->rf_kill.rfkill)) {
703 DPRINTF(sc, ATH_DBG_FATAL,
704 "Unable to register rfkill\n");
705 rfkill_free(sc->rf_kill.rfkill);
707 /* Deinitialize the device */
710 free_irq(sc->pdev->irq, sc);
711 pci_iounmap(sc->pdev, sc->mem);
712 pci_release_region(sc->pdev, 0);
713 pci_disable_device(sc->pdev);
714 ieee80211_free_hw(sc->hw);
717 sc->sc_flags |= SC_OP_RFKILL_REGISTERED;
723 #endif /* CONFIG_RFKILL */
725 static void ath_detach(struct ath_softc *sc)
727 struct ieee80211_hw *hw = sc->hw;
730 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Detach ATH hw\n", __func__);
732 #if defined(CONFIG_RFKILL) || defined(CONFIG_RFKILL_MODULE)
733 ath_deinit_rfkill(sc);
737 ieee80211_unregister_hw(hw);
739 ath_rate_control_unregister();
740 ath_rate_detach(sc->sc_rc);
745 tasklet_kill(&sc->intr_tq);
746 tasklet_kill(&sc->bcon_tasklet);
748 if (!(sc->sc_flags & SC_OP_INVALID))
749 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
751 /* cleanup tx queues */
752 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++)
753 if (ATH_TXQ_SETUP(sc, i))
754 ath_tx_cleanupq(sc, &sc->sc_txq[i]);
756 ath9k_hw_detach(sc->sc_ah);
759 static int ath_attach(u16 devid, struct ath_softc *sc)
761 struct ieee80211_hw *hw = sc->hw;
764 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Attach ATH hw\n", __func__);
766 error = ath_init(devid, sc);
770 /* get mac address from hardware and set in mac80211 */
772 SET_IEEE80211_PERM_ADDR(hw, sc->sc_myaddr);
774 hw->flags = IEEE80211_HW_RX_INCLUDES_FCS |
775 IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
776 IEEE80211_HW_SIGNAL_DBM |
777 IEEE80211_HW_AMPDU_AGGREGATION;
779 hw->wiphy->interface_modes =
780 BIT(NL80211_IFTYPE_AP) |
781 BIT(NL80211_IFTYPE_STATION) |
782 BIT(NL80211_IFTYPE_ADHOC);
785 hw->sta_data_size = sizeof(struct ath_node);
786 hw->vif_data_size = sizeof(struct ath_vap);
788 /* Register rate control */
789 hw->rate_control_algorithm = "ath9k_rate_control";
790 error = ath_rate_control_register();
792 DPRINTF(sc, ATH_DBG_FATAL,
793 "%s: Unable to register rate control "
794 "algorithm:%d\n", __func__, error);
795 ath_rate_control_unregister();
799 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_HT) {
800 setup_ht_cap(&sc->sbands[IEEE80211_BAND_2GHZ].ht_cap);
801 if (test_bit(ATH9K_MODE_11A, sc->sc_ah->ah_caps.wireless_modes))
802 setup_ht_cap(&sc->sbands[IEEE80211_BAND_5GHZ].ht_cap);
805 hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &sc->sbands[IEEE80211_BAND_2GHZ];
806 if (test_bit(ATH9K_MODE_11A, sc->sc_ah->ah_caps.wireless_modes))
807 hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
808 &sc->sbands[IEEE80211_BAND_5GHZ];
810 /* initialize tx/rx engine */
811 error = ath_tx_init(sc, ATH_TXBUF);
815 error = ath_rx_init(sc, ATH_RXBUF);
819 #if defined(CONFIG_RFKILL) || defined(CONFIG_RFKILL_MODULE)
820 /* Initialze h/w Rfkill */
821 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
822 INIT_DELAYED_WORK(&sc->rf_kill.rfkill_poll, ath_rfkill_poll);
824 /* Initialize s/w rfkill */
825 if (ath_init_sw_rfkill(sc))
829 error = ieee80211_register_hw(hw);
831 ath_rate_control_unregister();
835 /* Initialize LED control */
845 static int ath9k_start(struct ieee80211_hw *hw)
847 struct ath_softc *sc = hw->priv;
848 struct ieee80211_channel *curchan = hw->conf.channel;
851 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Starting driver with "
852 "initial channel: %d MHz\n", __func__, curchan->center_freq);
854 memset(&sc->sc_ht_info, 0, sizeof(struct ath_ht_info));
856 /* setup initial channel */
858 pos = ath_get_channel(sc, curchan);
860 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid channel\n", __func__);
865 sc->sc_ah->ah_channels[pos].chanmode =
866 (curchan->band == IEEE80211_BAND_2GHZ) ? CHANNEL_G : CHANNEL_A;
868 error = ath_open(sc, &sc->sc_ah->ah_channels[pos]);
870 DPRINTF(sc, ATH_DBG_FATAL,
871 "%s: Unable to complete ath_open\n", __func__);
875 #if defined(CONFIG_RFKILL) || defined(CONFIG_RFKILL_MODULE)
876 error = ath_start_rfkill_poll(sc);
883 static int ath9k_tx(struct ieee80211_hw *hw,
886 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
887 struct ath_softc *sc = hw->priv;
888 struct ath_tx_control txctl;
891 memset(&txctl, 0, sizeof(struct ath_tx_control));
894 * As a temporary workaround, assign seq# here; this will likely need
895 * to be cleaned up to work better with Beacon transmission and virtual
898 if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
899 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
900 if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
902 hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
903 hdr->seq_ctrl |= cpu_to_le16(sc->seq_no);
906 /* Add the padding after the header if this is not already done */
907 hdrlen = ieee80211_get_hdrlen_from_skb(skb);
909 padsize = hdrlen % 4;
910 if (skb_headroom(skb) < padsize)
912 skb_push(skb, padsize);
913 memmove(skb->data, skb->data + padsize, hdrlen);
916 /* Check if a tx queue is available */
918 txctl.txq = ath_test_get_txq(sc, skb);
922 DPRINTF(sc, ATH_DBG_XMIT, "%s: transmitting packet, skb: %p\n",
926 if (ath_tx_start(sc, skb, &txctl) != 0) {
927 DPRINTF(sc, ATH_DBG_XMIT, "%s: TX failed\n", __func__);
933 dev_kfree_skb_any(skb);
937 static void ath9k_stop(struct ieee80211_hw *hw)
939 struct ath_softc *sc = hw->priv;
941 if (sc->sc_flags & SC_OP_INVALID) {
942 DPRINTF(sc, ATH_DBG_ANY, "%s: Device not present\n", __func__);
948 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Driver halt\n", __func__);
951 static int ath9k_add_interface(struct ieee80211_hw *hw,
952 struct ieee80211_if_init_conf *conf)
954 struct ath_softc *sc = hw->priv;
955 struct ath_vap *avp = (void *)conf->vif->drv_priv;
958 /* Support only vap for now */
963 switch (conf->type) {
964 case NL80211_IFTYPE_STATION:
965 ic_opmode = ATH9K_M_STA;
967 case NL80211_IFTYPE_ADHOC:
968 ic_opmode = ATH9K_M_IBSS;
970 case NL80211_IFTYPE_AP:
971 ic_opmode = ATH9K_M_HOSTAP;
974 DPRINTF(sc, ATH_DBG_FATAL,
975 "%s: Interface type %d not yet supported\n",
976 __func__, conf->type);
980 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Attach a VAP of type: %d\n",
984 /* Set the VAP opmode */
985 avp->av_opmode = ic_opmode;
988 if (ic_opmode == ATH9K_M_HOSTAP)
989 ath9k_hw_set_tsfadjust(sc->sc_ah, 1);
991 sc->sc_vaps[0] = conf->vif;
994 /* Set the device opmode */
995 sc->sc_ah->ah_opmode = ic_opmode;
997 if (conf->type == NL80211_IFTYPE_AP) {
998 /* TODO: is this a suitable place to start ANI for AP mode? */
1000 mod_timer(&sc->sc_ani.timer,
1001 jiffies + msecs_to_jiffies(ATH_ANI_POLLINTERVAL));
1007 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1008 struct ieee80211_if_init_conf *conf)
1010 struct ath_softc *sc = hw->priv;
1011 struct ath_vap *avp = (void *)conf->vif->drv_priv;
1013 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Detach VAP\n", __func__);
1015 #ifdef CONFIG_SLOW_ANT_DIV
1016 ath_slow_ant_div_stop(&sc->sc_antdiv);
1019 del_timer_sync(&sc->sc_ani.timer);
1021 /* Reclaim beacon resources */
1022 if (sc->sc_ah->ah_opmode == ATH9K_M_HOSTAP ||
1023 sc->sc_ah->ah_opmode == ATH9K_M_IBSS) {
1024 ath9k_hw_stoptxdma(sc->sc_ah, sc->sc_bhalq);
1025 ath_beacon_return(sc, avp);
1028 sc->sc_flags &= ~SC_OP_BEACONS;
1030 sc->sc_vaps[0] = NULL;
1034 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1036 struct ath_softc *sc = hw->priv;
1037 struct ieee80211_channel *curchan = hw->conf.channel;
1038 struct ieee80211_conf *conf = &hw->conf;
1041 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Set channel: %d MHz\n",
1043 curchan->center_freq);
1045 /* Update chainmask */
1046 ath_update_chainmask(sc, conf->ht.enabled);
1048 pos = ath_get_channel(sc, curchan);
1050 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid channel\n", __func__);
1054 sc->sc_ah->ah_channels[pos].chanmode =
1055 (curchan->band == IEEE80211_BAND_2GHZ) ?
1056 CHANNEL_G : CHANNEL_A;
1058 if (sc->sc_curaid && hw->conf.ht.enabled)
1059 sc->sc_ah->ah_channels[pos].chanmode =
1060 ath_get_extchanmode(sc, curchan);
1062 if (changed & IEEE80211_CONF_CHANGE_POWER)
1063 sc->sc_config.txpowlimit = 2 * conf->power_level;
1065 /* set h/w channel */
1066 if (ath_set_channel(sc, &sc->sc_ah->ah_channels[pos]) < 0)
1067 DPRINTF(sc, ATH_DBG_FATAL, "%s: Unable to set channel\n",
1073 static int ath9k_config_interface(struct ieee80211_hw *hw,
1074 struct ieee80211_vif *vif,
1075 struct ieee80211_if_conf *conf)
1077 struct ath_softc *sc = hw->priv;
1078 struct ath_hal *ah = sc->sc_ah;
1079 struct ath_vap *avp = (void *)vif->drv_priv;
1083 /* TODO: Need to decide which hw opmode to use for multi-interface
1085 if (vif->type == NL80211_IFTYPE_AP &&
1086 ah->ah_opmode != ATH9K_M_HOSTAP) {
1087 ah->ah_opmode = ATH9K_M_HOSTAP;
1088 ath9k_hw_setopmode(ah);
1089 ath9k_hw_write_associd(ah, sc->sc_myaddr, 0);
1090 /* Request full reset to get hw opmode changed properly */
1091 sc->sc_flags |= SC_OP_FULL_RESET;
1094 if ((conf->changed & IEEE80211_IFCC_BSSID) &&
1095 !is_zero_ether_addr(conf->bssid)) {
1096 switch (vif->type) {
1097 case NL80211_IFTYPE_STATION:
1098 case NL80211_IFTYPE_ADHOC:
1100 memcpy(sc->sc_curbssid, conf->bssid, ETH_ALEN);
1102 ath9k_hw_write_associd(sc->sc_ah, sc->sc_curbssid,
1105 /* Set aggregation protection mode parameters */
1106 sc->sc_config.ath_aggr_prot = 0;
1108 DPRINTF(sc, ATH_DBG_CONFIG,
1109 "%s: RX filter 0x%x bssid %pM aid 0x%x\n",
1111 sc->sc_curbssid, sc->sc_curaid);
1113 /* need to reconfigure the beacon */
1114 sc->sc_flags &= ~SC_OP_BEACONS ;
1122 if ((conf->changed & IEEE80211_IFCC_BEACON) &&
1123 ((vif->type == NL80211_IFTYPE_ADHOC) ||
1124 (vif->type == NL80211_IFTYPE_AP))) {
1126 * Allocate and setup the beacon frame.
1128 * Stop any previous beacon DMA. This may be
1129 * necessary, for example, when an ibss merge
1130 * causes reconfiguration; we may be called
1131 * with beacon transmission active.
1133 ath9k_hw_stoptxdma(sc->sc_ah, sc->sc_bhalq);
1135 error = ath_beacon_alloc(sc, 0);
1139 ath_beacon_sync(sc, 0);
1142 /* Check for WLAN_CAPABILITY_PRIVACY ? */
1143 if ((avp->av_opmode != ATH9K_M_STA)) {
1144 for (i = 0; i < IEEE80211_WEP_NKID; i++)
1145 if (ath9k_hw_keyisvalid(sc->sc_ah, (u16)i))
1146 ath9k_hw_keysetmac(sc->sc_ah,
1151 /* Only legacy IBSS for now */
1152 if (vif->type == NL80211_IFTYPE_ADHOC)
1153 ath_update_chainmask(sc, 0);
1158 #define SUPPORTED_FILTERS \
1159 (FIF_PROMISC_IN_BSS | \
1163 FIF_BCN_PRBRESP_PROMISC | \
1166 /* FIXME: sc->sc_full_reset ? */
1167 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1168 unsigned int changed_flags,
1169 unsigned int *total_flags,
1171 struct dev_mc_list *mclist)
1173 struct ath_softc *sc = hw->priv;
1176 changed_flags &= SUPPORTED_FILTERS;
1177 *total_flags &= SUPPORTED_FILTERS;
1179 sc->rx_filter = *total_flags;
1180 rfilt = ath_calcrxfilter(sc);
1181 ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1183 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
1184 if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
1185 ath9k_hw_write_associd(sc->sc_ah, ath_bcast_mac, 0);
1188 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Set HW RX filter: 0x%x\n",
1189 __func__, sc->rx_filter);
1192 static void ath9k_sta_notify(struct ieee80211_hw *hw,
1193 struct ieee80211_vif *vif,
1194 enum sta_notify_cmd cmd,
1195 struct ieee80211_sta *sta)
1197 struct ath_softc *sc = hw->priv;
1200 case STA_NOTIFY_ADD:
1201 ath_node_attach(sc, sta);
1203 case STA_NOTIFY_REMOVE:
1204 ath_node_detach(sc, sta);
1211 static int ath9k_conf_tx(struct ieee80211_hw *hw,
1213 const struct ieee80211_tx_queue_params *params)
1215 struct ath_softc *sc = hw->priv;
1216 struct ath9k_tx_queue_info qi;
1219 if (queue >= WME_NUM_AC)
1222 qi.tqi_aifs = params->aifs;
1223 qi.tqi_cwmin = params->cw_min;
1224 qi.tqi_cwmax = params->cw_max;
1225 qi.tqi_burstTime = params->txop;
1226 qnum = ath_get_hal_qnum(queue, sc);
1228 DPRINTF(sc, ATH_DBG_CONFIG,
1229 "%s: Configure tx [queue/halq] [%d/%d], "
1230 "aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1239 ret = ath_txq_update(sc, qnum, &qi);
1241 DPRINTF(sc, ATH_DBG_FATAL,
1242 "%s: TXQ Update failed\n", __func__);
1247 static int ath9k_set_key(struct ieee80211_hw *hw,
1248 enum set_key_cmd cmd,
1249 const u8 *local_addr,
1251 struct ieee80211_key_conf *key)
1253 struct ath_softc *sc = hw->priv;
1256 DPRINTF(sc, ATH_DBG_KEYCACHE, " %s: Set HW Key\n", __func__);
1260 ret = ath_key_config(sc, addr, key);
1262 set_bit(key->keyidx, sc->sc_keymap);
1263 key->hw_key_idx = key->keyidx;
1264 /* push IV and Michael MIC generation to stack */
1265 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1266 if (key->alg == ALG_TKIP)
1267 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1271 ath_key_delete(sc, key);
1272 clear_bit(key->keyidx, sc->sc_keymap);
1281 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1282 struct ieee80211_vif *vif,
1283 struct ieee80211_bss_conf *bss_conf,
1286 struct ath_softc *sc = hw->priv;
1288 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
1289 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed PREAMBLE %d\n",
1291 bss_conf->use_short_preamble);
1292 if (bss_conf->use_short_preamble)
1293 sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
1295 sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
1298 if (changed & BSS_CHANGED_ERP_CTS_PROT) {
1299 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed CTS PROT %d\n",
1301 bss_conf->use_cts_prot);
1302 if (bss_conf->use_cts_prot &&
1303 hw->conf.channel->band != IEEE80211_BAND_5GHZ)
1304 sc->sc_flags |= SC_OP_PROTECT_ENABLE;
1306 sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
1309 if (changed & BSS_CHANGED_HT) {
1310 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed HT\n",
1312 ath9k_ht_conf(sc, bss_conf);
1315 if (changed & BSS_CHANGED_ASSOC) {
1316 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed ASSOC %d\n",
1319 ath9k_bss_assoc_info(sc, vif, bss_conf);
1323 static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
1326 struct ath_softc *sc = hw->priv;
1327 struct ath_hal *ah = sc->sc_ah;
1329 tsf = ath9k_hw_gettsf64(ah);
1334 static void ath9k_reset_tsf(struct ieee80211_hw *hw)
1336 struct ath_softc *sc = hw->priv;
1337 struct ath_hal *ah = sc->sc_ah;
1339 ath9k_hw_reset_tsf(ah);
1342 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
1343 enum ieee80211_ampdu_mlme_action action,
1344 struct ieee80211_sta *sta,
1347 struct ath_softc *sc = hw->priv;
1351 case IEEE80211_AMPDU_RX_START:
1352 if (!(sc->sc_flags & SC_OP_RXAGGR))
1355 case IEEE80211_AMPDU_RX_STOP:
1357 case IEEE80211_AMPDU_TX_START:
1358 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
1360 DPRINTF(sc, ATH_DBG_FATAL,
1361 "%s: Unable to start TX aggregation\n",
1364 ieee80211_start_tx_ba_cb_irqsafe(hw, sta->addr, tid);
1366 case IEEE80211_AMPDU_TX_STOP:
1367 ret = ath_tx_aggr_stop(sc, sta, tid);
1369 DPRINTF(sc, ATH_DBG_FATAL,
1370 "%s: Unable to stop TX aggregation\n",
1373 ieee80211_stop_tx_ba_cb_irqsafe(hw, sta->addr, tid);
1375 case IEEE80211_AMPDU_TX_RESUME:
1376 ath_tx_aggr_resume(sc, sta, tid);
1379 DPRINTF(sc, ATH_DBG_FATAL,
1380 "%s: Unknown AMPDU action\n", __func__);
1386 static int ath9k_no_fragmentation(struct ieee80211_hw *hw, u32 value)
1391 static struct ieee80211_ops ath9k_ops = {
1393 .start = ath9k_start,
1395 .add_interface = ath9k_add_interface,
1396 .remove_interface = ath9k_remove_interface,
1397 .config = ath9k_config,
1398 .config_interface = ath9k_config_interface,
1399 .configure_filter = ath9k_configure_filter,
1400 .sta_notify = ath9k_sta_notify,
1401 .conf_tx = ath9k_conf_tx,
1402 .bss_info_changed = ath9k_bss_info_changed,
1403 .set_key = ath9k_set_key,
1404 .get_tsf = ath9k_get_tsf,
1405 .reset_tsf = ath9k_reset_tsf,
1406 .ampdu_action = ath9k_ampdu_action,
1407 .set_frag_threshold = ath9k_no_fragmentation,
1413 } ath_mac_bb_names[] = {
1414 { AR_SREV_VERSION_5416_PCI, "5416" },
1415 { AR_SREV_VERSION_5416_PCIE, "5418" },
1416 { AR_SREV_VERSION_9100, "9100" },
1417 { AR_SREV_VERSION_9160, "9160" },
1418 { AR_SREV_VERSION_9280, "9280" },
1419 { AR_SREV_VERSION_9285, "9285" }
1425 } ath_rf_names[] = {
1427 { AR_RAD5133_SREV_MAJOR, "5133" },
1428 { AR_RAD5122_SREV_MAJOR, "5122" },
1429 { AR_RAD2133_SREV_MAJOR, "2133" },
1430 { AR_RAD2122_SREV_MAJOR, "2122" }
1434 * Return the MAC/BB name. "????" is returned if the MAC/BB is unknown.
1438 ath_mac_bb_name(u32 mac_bb_version)
1442 for (i=0; i<ARRAY_SIZE(ath_mac_bb_names); i++) {
1443 if (ath_mac_bb_names[i].version == mac_bb_version) {
1444 return ath_mac_bb_names[i].name;
1452 * Return the RF name. "????" is returned if the RF is unknown.
1456 ath_rf_name(u16 rf_version)
1460 for (i=0; i<ARRAY_SIZE(ath_rf_names); i++) {
1461 if (ath_rf_names[i].version == rf_version) {
1462 return ath_rf_names[i].name;
1469 static int ath_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
1472 struct ath_softc *sc;
1473 struct ieee80211_hw *hw;
1479 if (pci_enable_device(pdev))
1482 ret = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
1485 printk(KERN_ERR "ath9k: 32-bit DMA not available\n");
1489 ret = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
1492 printk(KERN_ERR "ath9k: 32-bit DMA consistent "
1493 "DMA enable faled\n");
1498 * Cache line size is used to size and align various
1499 * structures used to communicate with the hardware.
1501 pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &csz);
1504 * Linux 2.4.18 (at least) writes the cache line size
1505 * register as a 16-bit wide register which is wrong.
1506 * We must have this setup properly for rx buffer
1507 * DMA to work so force a reasonable value here if it
1510 csz = L1_CACHE_BYTES / sizeof(u32);
1511 pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE, csz);
1514 * The default setting of latency timer yields poor results,
1515 * set it to the value used by other systems. It may be worth
1516 * tweaking this setting more.
1518 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0xa8);
1520 pci_set_master(pdev);
1523 * Disable the RETRY_TIMEOUT register (0x41) to keep
1524 * PCI Tx retries from interfering with C3 CPU state.
1526 pci_read_config_dword(pdev, 0x40, &val);
1527 if ((val & 0x0000ff00) != 0)
1528 pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
1530 ret = pci_request_region(pdev, 0, "ath9k");
1532 dev_err(&pdev->dev, "PCI memory region reserve error\n");
1537 mem = pci_iomap(pdev, 0, 0);
1539 printk(KERN_ERR "PCI memory map error\n") ;
1544 hw = ieee80211_alloc_hw(sizeof(struct ath_softc), &ath9k_ops);
1546 printk(KERN_ERR "ath_pci: no memory for ieee80211_hw\n");
1550 SET_IEEE80211_DEV(hw, &pdev->dev);
1551 pci_set_drvdata(pdev, hw);
1558 if (ath_attach(id->device, sc) != 0) {
1563 /* setup interrupt service routine */
1565 if (request_irq(pdev->irq, ath_isr, IRQF_SHARED, "ath", sc)) {
1566 printk(KERN_ERR "%s: request_irq failed\n",
1567 wiphy_name(hw->wiphy));
1574 "%s: Atheros AR%s MAC/BB Rev:%x "
1575 "AR%s RF Rev:%x: mem=0x%lx, irq=%d\n",
1576 wiphy_name(hw->wiphy),
1577 ath_mac_bb_name(ah->ah_macVersion),
1579 ath_rf_name((ah->ah_analog5GhzRev & AR_RADIO_SREV_MAJOR)),
1581 (unsigned long)mem, pdev->irq);
1587 ieee80211_free_hw(hw);
1589 pci_iounmap(pdev, mem);
1591 pci_release_region(pdev, 0);
1593 pci_disable_device(pdev);
1597 static void ath_pci_remove(struct pci_dev *pdev)
1599 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
1600 struct ath_softc *sc = hw->priv;
1604 free_irq(pdev->irq, sc);
1605 pci_iounmap(pdev, sc->mem);
1606 pci_release_region(pdev, 0);
1607 pci_disable_device(pdev);
1608 ieee80211_free_hw(hw);
1613 static int ath_pci_suspend(struct pci_dev *pdev, pm_message_t state)
1615 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
1616 struct ath_softc *sc = hw->priv;
1618 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 1);
1620 #if defined(CONFIG_RFKILL) || defined(CONFIG_RFKILL_MODULE)
1621 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
1622 cancel_delayed_work_sync(&sc->rf_kill.rfkill_poll);
1625 pci_save_state(pdev);
1626 pci_disable_device(pdev);
1627 pci_set_power_state(pdev, 3);
1632 static int ath_pci_resume(struct pci_dev *pdev)
1634 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
1635 struct ath_softc *sc = hw->priv;
1639 err = pci_enable_device(pdev);
1642 pci_restore_state(pdev);
1644 * Suspend/Resume resets the PCI configuration space, so we have to
1645 * re-disable the RETRY_TIMEOUT register (0x41) to keep
1646 * PCI Tx retries from interfering with C3 CPU state
1648 pci_read_config_dword(pdev, 0x40, &val);
1649 if ((val & 0x0000ff00) != 0)
1650 pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
1653 ath9k_hw_cfg_output(sc->sc_ah, ATH_LED_PIN,
1654 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
1655 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 1);
1657 #if defined(CONFIG_RFKILL) || defined(CONFIG_RFKILL_MODULE)
1659 * check the h/w rfkill state on resume
1660 * and start the rfkill poll timer
1662 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
1663 queue_delayed_work(sc->hw->workqueue,
1664 &sc->rf_kill.rfkill_poll, 0);
1670 #endif /* CONFIG_PM */
1672 MODULE_DEVICE_TABLE(pci, ath_pci_id_table);
1674 static struct pci_driver ath_pci_driver = {
1676 .id_table = ath_pci_id_table,
1677 .probe = ath_pci_probe,
1678 .remove = ath_pci_remove,
1680 .suspend = ath_pci_suspend,
1681 .resume = ath_pci_resume,
1682 #endif /* CONFIG_PM */
1685 static int __init init_ath_pci(void)
1687 printk(KERN_INFO "%s: %s\n", dev_info, ATH_PCI_VERSION);
1689 if (pci_register_driver(&ath_pci_driver) < 0) {
1691 "ath_pci: No devices found, driver not installed.\n");
1692 pci_unregister_driver(&ath_pci_driver);
1698 module_init(init_ath_pci);
1700 static void __exit exit_ath_pci(void)
1702 pci_unregister_driver(&ath_pci_driver);
1703 printk(KERN_INFO "%s: driver unloaded\n", dev_info);
1705 module_exit(exit_ath_pci);