2 * Copyright (c) 2008-2009 Atheros Communications Inc.
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 #include <linux/nl80211.h>
21 static void ath_cache_conf_rate(struct ath_softc *sc,
22 struct ieee80211_conf *conf)
24 switch (conf->channel->band) {
25 case IEEE80211_BAND_2GHZ:
26 if (conf_is_ht20(conf))
27 sc->cur_rate_mode = ATH9K_MODE_11NG_HT20;
28 else if (conf_is_ht40_minus(conf))
29 sc->cur_rate_mode = ATH9K_MODE_11NG_HT40MINUS;
30 else if (conf_is_ht40_plus(conf))
31 sc->cur_rate_mode = ATH9K_MODE_11NG_HT40PLUS;
33 sc->cur_rate_mode = ATH9K_MODE_11G;
35 case IEEE80211_BAND_5GHZ:
36 if (conf_is_ht20(conf))
37 sc->cur_rate_mode = ATH9K_MODE_11NA_HT20;
38 else if (conf_is_ht40_minus(conf))
39 sc->cur_rate_mode = ATH9K_MODE_11NA_HT40MINUS;
40 else if (conf_is_ht40_plus(conf))
41 sc->cur_rate_mode = ATH9K_MODE_11NA_HT40PLUS;
43 sc->cur_rate_mode = ATH9K_MODE_11A;
51 static void ath_update_txpow(struct ath_softc *sc)
53 struct ath_hw *ah = sc->sc_ah;
55 if (sc->curtxpow != sc->config.txpowlimit) {
56 ath9k_hw_set_txpowerlimit(ah, sc->config.txpowlimit);
57 /* read back in case value is clamped */
58 sc->curtxpow = ath9k_hw_regulatory(ah)->power_limit;
62 static u8 parse_mpdudensity(u8 mpdudensity)
65 * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
66 * 0 for no restriction
75 switch (mpdudensity) {
81 /* Our lower layer calculations limit our precision to
97 static struct ath9k_channel *ath_get_curchannel(struct ath_softc *sc,
98 struct ieee80211_hw *hw)
100 struct ieee80211_channel *curchan = hw->conf.channel;
101 struct ath9k_channel *channel;
104 chan_idx = curchan->hw_value;
105 channel = &sc->sc_ah->channels[chan_idx];
106 ath9k_update_ichannel(sc, hw, channel);
110 bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
115 spin_lock_irqsave(&sc->sc_pm_lock, flags);
116 ret = ath9k_hw_setpower(sc->sc_ah, mode);
117 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
122 void ath9k_ps_wakeup(struct ath_softc *sc)
126 spin_lock_irqsave(&sc->sc_pm_lock, flags);
127 if (++sc->ps_usecount != 1)
130 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
133 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
136 void ath9k_ps_restore(struct ath_softc *sc)
140 spin_lock_irqsave(&sc->sc_pm_lock, flags);
141 if (--sc->ps_usecount != 0)
145 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
146 else if (sc->ps_enabled &&
147 !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
149 PS_WAIT_FOR_PSPOLL_DATA |
150 PS_WAIT_FOR_TX_ACK)))
151 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
154 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
158 * Set/change channels. If the channel is really being changed, it's done
159 * by reseting the chip. To accomplish this we must first cleanup any pending
160 * DMA, then restart stuff.
162 int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
163 struct ath9k_channel *hchan)
165 struct ath_hw *ah = sc->sc_ah;
166 struct ath_common *common = ath9k_hw_common(ah);
167 struct ieee80211_conf *conf = &common->hw->conf;
168 bool fastcc = true, stopped;
169 struct ieee80211_channel *channel = hw->conf.channel;
172 if (sc->sc_flags & SC_OP_INVALID)
178 * This is only performed if the channel settings have
181 * To switch channels clear any pending DMA operations;
182 * wait long enough for the RX fifo to drain, reset the
183 * hardware at the new frequency, and then re-enable
184 * the relevant bits of the h/w.
186 ath9k_hw_set_interrupts(ah, 0);
187 ath_drain_all_txq(sc, false);
188 stopped = ath_stoprecv(sc);
190 /* XXX: do not flush receive queue here. We don't want
191 * to flush data frames already in queue because of
192 * changing channel. */
194 if (!stopped || (sc->sc_flags & SC_OP_FULL_RESET))
197 ath_print(common, ATH_DBG_CONFIG,
198 "(%u MHz) -> (%u MHz), conf_is_ht40: %d\n",
199 sc->sc_ah->curchan->channel,
200 channel->center_freq, conf_is_ht40(conf));
202 spin_lock_bh(&sc->sc_resetlock);
204 r = ath9k_hw_reset(ah, hchan, fastcc);
206 ath_print(common, ATH_DBG_FATAL,
207 "Unable to reset channel (%u MHz), "
209 channel->center_freq, r);
210 spin_unlock_bh(&sc->sc_resetlock);
213 spin_unlock_bh(&sc->sc_resetlock);
215 sc->sc_flags &= ~SC_OP_FULL_RESET;
217 if (ath_startrecv(sc) != 0) {
218 ath_print(common, ATH_DBG_FATAL,
219 "Unable to restart recv logic\n");
224 ath_cache_conf_rate(sc, &hw->conf);
225 ath_update_txpow(sc);
226 ath9k_hw_set_interrupts(ah, ah->imask);
229 ath9k_ps_restore(sc);
233 static void ath_paprd_activate(struct ath_softc *sc)
235 struct ath_hw *ah = sc->sc_ah;
238 if (!ah->curchan->paprd_done)
242 for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
243 if (!(ah->caps.tx_chainmask & BIT(chain)))
246 ar9003_paprd_populate_single_table(ah, ah->curchan, chain);
249 ar9003_paprd_enable(ah, true);
250 ath9k_ps_restore(sc);
253 void ath_paprd_calibrate(struct work_struct *work)
255 struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
256 struct ieee80211_hw *hw = sc->hw;
257 struct ath_hw *ah = sc->sc_ah;
258 struct ieee80211_hdr *hdr;
259 struct sk_buff *skb = NULL;
260 struct ieee80211_tx_info *tx_info;
261 int band = hw->conf.channel->band;
262 struct ieee80211_supported_band *sband = &sc->sbands[band];
263 struct ath_tx_control txctl;
271 skb = alloc_skb(len, GFP_KERNEL);
275 tx_info = IEEE80211_SKB_CB(skb);
278 memset(skb->data, 0, len);
279 hdr = (struct ieee80211_hdr *)skb->data;
280 ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
281 hdr->frame_control = cpu_to_le16(ftype);
282 hdr->duration_id = 10;
283 memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
284 memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
285 memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
287 memset(&txctl, 0, sizeof(txctl));
288 qnum = sc->tx.hwq_map[WME_AC_BE];
289 txctl.txq = &sc->tx.txq[qnum];
292 ar9003_paprd_init_table(ah);
293 for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
294 if (!(ah->caps.tx_chainmask & BIT(chain)))
298 memset(tx_info, 0, sizeof(*tx_info));
299 tx_info->band = band;
301 for (i = 0; i < 4; i++) {
302 tx_info->control.rates[i].idx = sband->n_bitrates - 1;
303 tx_info->control.rates[i].count = 6;
306 init_completion(&sc->paprd_complete);
307 ar9003_paprd_setup_gain_table(ah, chain);
308 txctl.paprd = BIT(chain);
309 if (ath_tx_start(hw, skb, &txctl) != 0)
312 time_left = wait_for_completion_timeout(&sc->paprd_complete,
313 msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
315 ath_print(ath9k_hw_common(ah), ATH_DBG_CALIBRATE,
316 "Timeout waiting for paprd training on "
322 if (!ar9003_paprd_is_done(ah))
325 if (ar9003_paprd_create_curve(ah, ah->curchan, chain) != 0)
333 ah->curchan->paprd_done = true;
334 ath_paprd_activate(sc);
338 ath9k_ps_restore(sc);
342 * This routine performs the periodic noise floor calibration function
343 * that is used to adjust and optimize the chip performance. This
344 * takes environmental changes (location, temperature) into account.
345 * When the task is complete, it reschedules itself depending on the
346 * appropriate interval that was calculated.
348 void ath_ani_calibrate(unsigned long data)
350 struct ath_softc *sc = (struct ath_softc *)data;
351 struct ath_hw *ah = sc->sc_ah;
352 struct ath_common *common = ath9k_hw_common(ah);
353 bool longcal = false;
354 bool shortcal = false;
355 bool aniflag = false;
356 unsigned int timestamp = jiffies_to_msecs(jiffies);
357 u32 cal_interval, short_cal_interval;
359 short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
360 ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
362 /* Only calibrate if awake */
363 if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
368 /* Long calibration runs independently of short calibration. */
369 if ((timestamp - common->ani.longcal_timer) >= ATH_LONG_CALINTERVAL) {
371 ath_print(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
372 common->ani.longcal_timer = timestamp;
375 /* Short calibration applies only while caldone is false */
376 if (!common->ani.caldone) {
377 if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
379 ath_print(common, ATH_DBG_ANI,
380 "shortcal @%lu\n", jiffies);
381 common->ani.shortcal_timer = timestamp;
382 common->ani.resetcal_timer = timestamp;
385 if ((timestamp - common->ani.resetcal_timer) >=
386 ATH_RESTART_CALINTERVAL) {
387 common->ani.caldone = ath9k_hw_reset_calvalid(ah);
388 if (common->ani.caldone)
389 common->ani.resetcal_timer = timestamp;
393 /* Verify whether we must check ANI */
394 if ((timestamp - common->ani.checkani_timer) >=
395 ah->config.ani_poll_interval) {
397 common->ani.checkani_timer = timestamp;
400 /* Skip all processing if there's nothing to do. */
401 if (longcal || shortcal || aniflag) {
402 /* Call ANI routine if necessary */
404 ath9k_hw_ani_monitor(ah, ah->curchan);
406 /* Perform calibration if necessary */
407 if (longcal || shortcal) {
408 common->ani.caldone =
409 ath9k_hw_calibrate(ah,
411 common->rx_chainmask,
415 common->ani.noise_floor = ath9k_hw_getchan_noise(ah,
418 ath_print(common, ATH_DBG_ANI,
419 " calibrate chan %u/%x nf: %d\n",
420 ah->curchan->channel,
421 ah->curchan->channelFlags,
422 common->ani.noise_floor);
426 ath9k_ps_restore(sc);
430 * Set timer interval based on previous results.
431 * The interval must be the shortest necessary to satisfy ANI,
432 * short calibration and long calibration.
434 cal_interval = ATH_LONG_CALINTERVAL;
435 if (sc->sc_ah->config.enable_ani)
436 cal_interval = min(cal_interval,
437 (u32)ah->config.ani_poll_interval);
438 if (!common->ani.caldone)
439 cal_interval = min(cal_interval, (u32)short_cal_interval);
441 mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
442 if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) &&
443 !(sc->sc_flags & SC_OP_SCANNING)) {
444 if (!sc->sc_ah->curchan->paprd_done)
445 ieee80211_queue_work(sc->hw, &sc->paprd_work);
447 ath_paprd_activate(sc);
451 static void ath_start_ani(struct ath_common *common)
453 struct ath_hw *ah = common->ah;
454 unsigned long timestamp = jiffies_to_msecs(jiffies);
455 struct ath_softc *sc = (struct ath_softc *) common->priv;
457 if (!(sc->sc_flags & SC_OP_ANI_RUN))
460 common->ani.longcal_timer = timestamp;
461 common->ani.shortcal_timer = timestamp;
462 common->ani.checkani_timer = timestamp;
464 mod_timer(&common->ani.timer,
466 msecs_to_jiffies((u32)ah->config.ani_poll_interval));
470 * Update tx/rx chainmask. For legacy association,
471 * hard code chainmask to 1x1, for 11n association, use
472 * the chainmask configuration, for bt coexistence, use
473 * the chainmask configuration even in legacy mode.
475 void ath_update_chainmask(struct ath_softc *sc, int is_ht)
477 struct ath_hw *ah = sc->sc_ah;
478 struct ath_common *common = ath9k_hw_common(ah);
480 if ((sc->sc_flags & SC_OP_SCANNING) || is_ht ||
481 (ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE)) {
482 common->tx_chainmask = ah->caps.tx_chainmask;
483 common->rx_chainmask = ah->caps.rx_chainmask;
485 common->tx_chainmask = 1;
486 common->rx_chainmask = 1;
489 ath_print(common, ATH_DBG_CONFIG,
490 "tx chmask: %d, rx chmask: %d\n",
491 common->tx_chainmask,
492 common->rx_chainmask);
495 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
499 an = (struct ath_node *)sta->drv_priv;
501 if (sc->sc_flags & SC_OP_TXAGGR) {
502 ath_tx_node_init(sc, an);
503 an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
504 sta->ht_cap.ampdu_factor);
505 an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
506 an->last_rssi = ATH_RSSI_DUMMY_MARKER;
510 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
512 struct ath_node *an = (struct ath_node *)sta->drv_priv;
514 if (sc->sc_flags & SC_OP_TXAGGR)
515 ath_tx_node_cleanup(sc, an);
518 void ath9k_tasklet(unsigned long data)
520 struct ath_softc *sc = (struct ath_softc *)data;
521 struct ath_hw *ah = sc->sc_ah;
522 struct ath_common *common = ath9k_hw_common(ah);
524 u32 status = sc->intrstatus;
529 if ((status & ATH9K_INT_FATAL) ||
530 !ath9k_hw_check_alive(ah)) {
531 ath_reset(sc, false);
532 ath9k_ps_restore(sc);
536 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
537 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
540 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
542 if (status & rxmask) {
543 spin_lock_bh(&sc->rx.rxflushlock);
545 /* Check for high priority Rx first */
546 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
547 (status & ATH9K_INT_RXHP))
548 ath_rx_tasklet(sc, 0, true);
550 ath_rx_tasklet(sc, 0, false);
551 spin_unlock_bh(&sc->rx.rxflushlock);
554 if (status & ATH9K_INT_TX) {
555 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
556 ath_tx_edma_tasklet(sc);
561 if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
563 * TSF sync does not look correct; remain awake to sync with
566 ath_print(common, ATH_DBG_PS,
567 "TSFOOR - Sync with next Beacon\n");
568 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
571 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
572 if (status & ATH9K_INT_GENTIMER)
573 ath_gen_timer_isr(sc->sc_ah);
575 /* re-enable hardware interrupt */
576 ath9k_hw_set_interrupts(ah, ah->imask);
577 ath9k_ps_restore(sc);
580 irqreturn_t ath_isr(int irq, void *dev)
582 #define SCHED_INTR ( \
595 struct ath_softc *sc = dev;
596 struct ath_hw *ah = sc->sc_ah;
597 enum ath9k_int status;
601 * The hardware is not ready/present, don't
602 * touch anything. Note this can happen early
603 * on if the IRQ is shared.
605 if (sc->sc_flags & SC_OP_INVALID)
609 /* shared irq, not for us */
611 if (!ath9k_hw_intrpend(ah))
615 * Figure out the reason(s) for the interrupt. Note
616 * that the hal returns a pseudo-ISR that may include
617 * bits we haven't explicitly enabled so we mask the
618 * value to insure we only process bits we requested.
620 ath9k_hw_getisr(ah, &status); /* NB: clears ISR too */
621 status &= ah->imask; /* discard unasked-for bits */
624 * If there are no status bits set, then this interrupt was not
625 * for me (should have been caught above).
630 /* Cache the status */
631 sc->intrstatus = status;
633 if (status & SCHED_INTR)
637 * If a FATAL or RXORN interrupt is received, we have to reset the
640 if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
641 !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
644 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
645 (status & ATH9K_INT_BB_WATCHDOG)) {
646 ar9003_hw_bb_watchdog_dbg_info(ah);
650 if (status & ATH9K_INT_SWBA)
651 tasklet_schedule(&sc->bcon_tasklet);
653 if (status & ATH9K_INT_TXURN)
654 ath9k_hw_updatetxtriglevel(ah, true);
656 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
657 if (status & ATH9K_INT_RXEOL) {
658 ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
659 ath9k_hw_set_interrupts(ah, ah->imask);
663 if (status & ATH9K_INT_MIB) {
665 * Disable interrupts until we service the MIB
666 * interrupt; otherwise it will continue to
669 ath9k_hw_set_interrupts(ah, 0);
671 * Let the hal handle the event. We assume
672 * it will clear whatever condition caused
675 ath9k_hw_procmibevent(ah);
676 ath9k_hw_set_interrupts(ah, ah->imask);
679 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
680 if (status & ATH9K_INT_TIM_TIMER) {
681 /* Clear RxAbort bit so that we can
683 ath9k_setpower(sc, ATH9K_PM_AWAKE);
684 ath9k_hw_setrxabort(sc->sc_ah, 0);
685 sc->ps_flags |= PS_WAIT_FOR_BEACON;
690 ath_debug_stat_interrupt(sc, status);
693 /* turn off every interrupt except SWBA */
694 ath9k_hw_set_interrupts(ah, (ah->imask & ATH9K_INT_SWBA));
695 tasklet_schedule(&sc->intr_tq);
703 static u32 ath_get_extchanmode(struct ath_softc *sc,
704 struct ieee80211_channel *chan,
705 enum nl80211_channel_type channel_type)
709 switch (chan->band) {
710 case IEEE80211_BAND_2GHZ:
711 switch(channel_type) {
712 case NL80211_CHAN_NO_HT:
713 case NL80211_CHAN_HT20:
714 chanmode = CHANNEL_G_HT20;
716 case NL80211_CHAN_HT40PLUS:
717 chanmode = CHANNEL_G_HT40PLUS;
719 case NL80211_CHAN_HT40MINUS:
720 chanmode = CHANNEL_G_HT40MINUS;
724 case IEEE80211_BAND_5GHZ:
725 switch(channel_type) {
726 case NL80211_CHAN_NO_HT:
727 case NL80211_CHAN_HT20:
728 chanmode = CHANNEL_A_HT20;
730 case NL80211_CHAN_HT40PLUS:
731 chanmode = CHANNEL_A_HT40PLUS;
733 case NL80211_CHAN_HT40MINUS:
734 chanmode = CHANNEL_A_HT40MINUS;
745 static void ath9k_bss_assoc_info(struct ath_softc *sc,
746 struct ieee80211_vif *vif,
747 struct ieee80211_bss_conf *bss_conf)
749 struct ath_hw *ah = sc->sc_ah;
750 struct ath_common *common = ath9k_hw_common(ah);
752 if (bss_conf->assoc) {
753 ath_print(common, ATH_DBG_CONFIG,
754 "Bss Info ASSOC %d, bssid: %pM\n",
755 bss_conf->aid, common->curbssid);
757 /* New association, store aid */
758 common->curaid = bss_conf->aid;
759 ath9k_hw_write_associd(ah);
762 * Request a re-configuration of Beacon related timers
763 * on the receipt of the first Beacon frame (i.e.,
764 * after time sync with the AP).
766 sc->ps_flags |= PS_BEACON_SYNC;
768 /* Configure the beacon */
769 ath_beacon_config(sc, vif);
771 /* Reset rssi stats */
772 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
774 sc->sc_flags |= SC_OP_ANI_RUN;
775 ath_start_ani(common);
777 ath_print(common, ATH_DBG_CONFIG, "Bss Info DISASSOC\n");
780 sc->sc_flags &= ~SC_OP_ANI_RUN;
781 del_timer_sync(&common->ani.timer);
785 void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
787 struct ath_hw *ah = sc->sc_ah;
788 struct ath_common *common = ath9k_hw_common(ah);
789 struct ieee80211_channel *channel = hw->conf.channel;
793 ath9k_hw_configpcipowersave(ah, 0, 0);
796 ah->curchan = ath_get_curchannel(sc, sc->hw);
798 spin_lock_bh(&sc->sc_resetlock);
799 r = ath9k_hw_reset(ah, ah->curchan, false);
801 ath_print(common, ATH_DBG_FATAL,
802 "Unable to reset channel (%u MHz), "
804 channel->center_freq, r);
806 spin_unlock_bh(&sc->sc_resetlock);
808 ath_update_txpow(sc);
809 if (ath_startrecv(sc) != 0) {
810 ath_print(common, ATH_DBG_FATAL,
811 "Unable to restart recv logic\n");
815 if (sc->sc_flags & SC_OP_BEACONS)
816 ath_beacon_config(sc, NULL); /* restart beacons */
818 /* Re-Enable interrupts */
819 ath9k_hw_set_interrupts(ah, ah->imask);
822 ath9k_hw_cfg_output(ah, ah->led_pin,
823 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
824 ath9k_hw_set_gpio(ah, ah->led_pin, 0);
826 ieee80211_wake_queues(hw);
827 ath9k_ps_restore(sc);
830 void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
832 struct ath_hw *ah = sc->sc_ah;
833 struct ieee80211_channel *channel = hw->conf.channel;
837 ieee80211_stop_queues(hw);
840 ath9k_hw_set_gpio(ah, ah->led_pin, 1);
841 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
843 /* Disable interrupts */
844 ath9k_hw_set_interrupts(ah, 0);
846 ath_drain_all_txq(sc, false); /* clear pending tx frames */
847 ath_stoprecv(sc); /* turn off frame recv */
848 ath_flushrecv(sc); /* flush recv queue */
851 ah->curchan = ath_get_curchannel(sc, hw);
853 spin_lock_bh(&sc->sc_resetlock);
854 r = ath9k_hw_reset(ah, ah->curchan, false);
856 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
857 "Unable to reset channel (%u MHz), "
859 channel->center_freq, r);
861 spin_unlock_bh(&sc->sc_resetlock);
863 ath9k_hw_phy_disable(ah);
864 ath9k_hw_configpcipowersave(ah, 1, 1);
865 ath9k_ps_restore(sc);
866 ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
869 int ath_reset(struct ath_softc *sc, bool retry_tx)
871 struct ath_hw *ah = sc->sc_ah;
872 struct ath_common *common = ath9k_hw_common(ah);
873 struct ieee80211_hw *hw = sc->hw;
877 del_timer_sync(&common->ani.timer);
879 ieee80211_stop_queues(hw);
881 ath9k_hw_set_interrupts(ah, 0);
882 ath_drain_all_txq(sc, retry_tx);
886 spin_lock_bh(&sc->sc_resetlock);
887 r = ath9k_hw_reset(ah, sc->sc_ah->curchan, false);
889 ath_print(common, ATH_DBG_FATAL,
890 "Unable to reset hardware; reset status %d\n", r);
891 spin_unlock_bh(&sc->sc_resetlock);
893 if (ath_startrecv(sc) != 0)
894 ath_print(common, ATH_DBG_FATAL,
895 "Unable to start recv logic\n");
898 * We may be doing a reset in response to a request
899 * that changes the channel so update any state that
900 * might change as a result.
902 ath_cache_conf_rate(sc, &hw->conf);
904 ath_update_txpow(sc);
906 if (sc->sc_flags & SC_OP_BEACONS)
907 ath_beacon_config(sc, NULL); /* restart beacons */
909 ath9k_hw_set_interrupts(ah, ah->imask);
913 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
914 if (ATH_TXQ_SETUP(sc, i)) {
915 spin_lock_bh(&sc->tx.txq[i].axq_lock);
916 ath_txq_schedule(sc, &sc->tx.txq[i]);
917 spin_unlock_bh(&sc->tx.txq[i].axq_lock);
922 ieee80211_wake_queues(hw);
925 ath_start_ani(common);
930 static int ath_get_hal_qnum(u16 queue, struct ath_softc *sc)
936 qnum = sc->tx.hwq_map[WME_AC_VO];
939 qnum = sc->tx.hwq_map[WME_AC_VI];
942 qnum = sc->tx.hwq_map[WME_AC_BE];
945 qnum = sc->tx.hwq_map[WME_AC_BK];
948 qnum = sc->tx.hwq_map[WME_AC_BE];
955 int ath_get_mac80211_qnum(u32 queue, struct ath_softc *sc)
980 /* XXX: Remove me once we don't depend on ath9k_channel for all
981 * this redundant data */
982 void ath9k_update_ichannel(struct ath_softc *sc, struct ieee80211_hw *hw,
983 struct ath9k_channel *ichan)
985 struct ieee80211_channel *chan = hw->conf.channel;
986 struct ieee80211_conf *conf = &hw->conf;
988 ichan->channel = chan->center_freq;
991 if (chan->band == IEEE80211_BAND_2GHZ) {
992 ichan->chanmode = CHANNEL_G;
993 ichan->channelFlags = CHANNEL_2GHZ | CHANNEL_OFDM | CHANNEL_G;
995 ichan->chanmode = CHANNEL_A;
996 ichan->channelFlags = CHANNEL_5GHZ | CHANNEL_OFDM;
999 if (conf_is_ht(conf))
1000 ichan->chanmode = ath_get_extchanmode(sc, chan,
1001 conf->channel_type);
1004 /**********************/
1005 /* mac80211 callbacks */
1006 /**********************/
1008 static int ath9k_start(struct ieee80211_hw *hw)
1010 struct ath_wiphy *aphy = hw->priv;
1011 struct ath_softc *sc = aphy->sc;
1012 struct ath_hw *ah = sc->sc_ah;
1013 struct ath_common *common = ath9k_hw_common(ah);
1014 struct ieee80211_channel *curchan = hw->conf.channel;
1015 struct ath9k_channel *init_channel;
1018 ath_print(common, ATH_DBG_CONFIG,
1019 "Starting driver with initial channel: %d MHz\n",
1020 curchan->center_freq);
1022 mutex_lock(&sc->mutex);
1024 if (ath9k_wiphy_started(sc)) {
1025 if (sc->chan_idx == curchan->hw_value) {
1027 * Already on the operational channel, the new wiphy
1028 * can be marked active.
1030 aphy->state = ATH_WIPHY_ACTIVE;
1031 ieee80211_wake_queues(hw);
1034 * Another wiphy is on another channel, start the new
1035 * wiphy in paused state.
1037 aphy->state = ATH_WIPHY_PAUSED;
1038 ieee80211_stop_queues(hw);
1040 mutex_unlock(&sc->mutex);
1043 aphy->state = ATH_WIPHY_ACTIVE;
1045 /* setup initial channel */
1047 sc->chan_idx = curchan->hw_value;
1049 init_channel = ath_get_curchannel(sc, hw);
1051 /* Reset SERDES registers */
1052 ath9k_hw_configpcipowersave(ah, 0, 0);
1055 * The basic interface to setting the hardware in a good
1056 * state is ``reset''. On return the hardware is known to
1057 * be powered up and with interrupts disabled. This must
1058 * be followed by initialization of the appropriate bits
1059 * and then setup of the interrupt mask.
1061 spin_lock_bh(&sc->sc_resetlock);
1062 r = ath9k_hw_reset(ah, init_channel, false);
1064 ath_print(common, ATH_DBG_FATAL,
1065 "Unable to reset hardware; reset status %d "
1066 "(freq %u MHz)\n", r,
1067 curchan->center_freq);
1068 spin_unlock_bh(&sc->sc_resetlock);
1071 spin_unlock_bh(&sc->sc_resetlock);
1074 * This is needed only to setup initial state
1075 * but it's best done after a reset.
1077 ath_update_txpow(sc);
1080 * Setup the hardware after reset:
1081 * The receive engine is set going.
1082 * Frame transmit is handled entirely
1083 * in the frame output path; there's nothing to do
1084 * here except setup the interrupt mask.
1086 if (ath_startrecv(sc) != 0) {
1087 ath_print(common, ATH_DBG_FATAL,
1088 "Unable to start recv logic\n");
1093 /* Setup our intr mask. */
1094 ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
1095 ATH9K_INT_RXORN | ATH9K_INT_FATAL |
1098 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
1099 ah->imask |= ATH9K_INT_RXHP |
1101 ATH9K_INT_BB_WATCHDOG;
1103 ah->imask |= ATH9K_INT_RX;
1105 if (ah->caps.hw_caps & ATH9K_HW_CAP_GTT)
1106 ah->imask |= ATH9K_INT_GTT;
1108 if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
1109 ah->imask |= ATH9K_INT_CST;
1111 ath_cache_conf_rate(sc, &hw->conf);
1113 sc->sc_flags &= ~SC_OP_INVALID;
1115 /* Disable BMISS interrupt when we're not associated */
1116 ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
1117 ath9k_hw_set_interrupts(ah, ah->imask);
1119 ieee80211_wake_queues(hw);
1121 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
1123 if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
1124 !ah->btcoex_hw.enabled) {
1125 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
1126 AR_STOMP_LOW_WLAN_WGHT);
1127 ath9k_hw_btcoex_enable(ah);
1129 if (common->bus_ops->bt_coex_prep)
1130 common->bus_ops->bt_coex_prep(common);
1131 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1132 ath9k_btcoex_timer_resume(sc);
1136 mutex_unlock(&sc->mutex);
1141 static int ath9k_tx(struct ieee80211_hw *hw,
1142 struct sk_buff *skb)
1144 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
1145 struct ath_wiphy *aphy = hw->priv;
1146 struct ath_softc *sc = aphy->sc;
1147 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1148 struct ath_tx_control txctl;
1149 int padpos, padsize;
1150 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1153 if (aphy->state != ATH_WIPHY_ACTIVE && aphy->state != ATH_WIPHY_SCAN) {
1154 ath_print(common, ATH_DBG_XMIT,
1155 "ath9k: %s: TX in unexpected wiphy state "
1156 "%d\n", wiphy_name(hw->wiphy), aphy->state);
1160 if (sc->ps_enabled) {
1162 * mac80211 does not set PM field for normal data frames, so we
1163 * need to update that based on the current PS mode.
1165 if (ieee80211_is_data(hdr->frame_control) &&
1166 !ieee80211_is_nullfunc(hdr->frame_control) &&
1167 !ieee80211_has_pm(hdr->frame_control)) {
1168 ath_print(common, ATH_DBG_PS, "Add PM=1 for a TX frame "
1169 "while in PS mode\n");
1170 hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1174 if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
1176 * We are using PS-Poll and mac80211 can request TX while in
1177 * power save mode. Need to wake up hardware for the TX to be
1178 * completed and if needed, also for RX of buffered frames.
1180 ath9k_ps_wakeup(sc);
1181 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
1182 ath9k_hw_setrxabort(sc->sc_ah, 0);
1183 if (ieee80211_is_pspoll(hdr->frame_control)) {
1184 ath_print(common, ATH_DBG_PS,
1185 "Sending PS-Poll to pick a buffered frame\n");
1186 sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
1188 ath_print(common, ATH_DBG_PS,
1189 "Wake up to complete TX\n");
1190 sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
1193 * The actual restore operation will happen only after
1194 * the sc_flags bit is cleared. We are just dropping
1195 * the ps_usecount here.
1197 ath9k_ps_restore(sc);
1200 memset(&txctl, 0, sizeof(struct ath_tx_control));
1203 * As a temporary workaround, assign seq# here; this will likely need
1204 * to be cleaned up to work better with Beacon transmission and virtual
1207 if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
1208 if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
1209 sc->tx.seq_no += 0x10;
1210 hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
1211 hdr->seq_ctrl |= cpu_to_le16(sc->tx.seq_no);
1214 /* Add the padding after the header if this is not already done */
1215 padpos = ath9k_cmn_padpos(hdr->frame_control);
1216 padsize = padpos & 3;
1217 if (padsize && skb->len>padpos) {
1218 if (skb_headroom(skb) < padsize)
1220 skb_push(skb, padsize);
1221 memmove(skb->data, skb->data + padsize, padpos);
1224 qnum = ath_get_hal_qnum(skb_get_queue_mapping(skb), sc);
1225 txctl.txq = &sc->tx.txq[qnum];
1227 ath_print(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
1229 if (ath_tx_start(hw, skb, &txctl) != 0) {
1230 ath_print(common, ATH_DBG_XMIT, "TX failed\n");
1236 dev_kfree_skb_any(skb);
1240 static void ath9k_stop(struct ieee80211_hw *hw)
1242 struct ath_wiphy *aphy = hw->priv;
1243 struct ath_softc *sc = aphy->sc;
1244 struct ath_hw *ah = sc->sc_ah;
1245 struct ath_common *common = ath9k_hw_common(ah);
1247 mutex_lock(&sc->mutex);
1249 aphy->state = ATH_WIPHY_INACTIVE;
1252 cancel_delayed_work_sync(&sc->ath_led_blink_work);
1254 cancel_delayed_work_sync(&sc->tx_complete_work);
1255 cancel_work_sync(&sc->paprd_work);
1257 if (!sc->num_sec_wiphy) {
1258 cancel_delayed_work_sync(&sc->wiphy_work);
1259 cancel_work_sync(&sc->chan_work);
1262 if (sc->sc_flags & SC_OP_INVALID) {
1263 ath_print(common, ATH_DBG_ANY, "Device not present\n");
1264 mutex_unlock(&sc->mutex);
1268 if (ath9k_wiphy_started(sc)) {
1269 mutex_unlock(&sc->mutex);
1270 return; /* another wiphy still in use */
1273 /* Ensure HW is awake when we try to shut it down. */
1274 ath9k_ps_wakeup(sc);
1276 if (ah->btcoex_hw.enabled) {
1277 ath9k_hw_btcoex_disable(ah);
1278 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1279 ath9k_btcoex_timer_pause(sc);
1282 /* make sure h/w will not generate any interrupt
1283 * before setting the invalid flag. */
1284 ath9k_hw_set_interrupts(ah, 0);
1286 if (!(sc->sc_flags & SC_OP_INVALID)) {
1287 ath_drain_all_txq(sc, false);
1289 ath9k_hw_phy_disable(ah);
1291 sc->rx.rxlink = NULL;
1293 /* disable HAL and put h/w to sleep */
1294 ath9k_hw_disable(ah);
1295 ath9k_hw_configpcipowersave(ah, 1, 1);
1296 ath9k_ps_restore(sc);
1298 /* Finally, put the chip in FULL SLEEP mode */
1299 ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
1301 sc->sc_flags |= SC_OP_INVALID;
1303 mutex_unlock(&sc->mutex);
1305 ath_print(common, ATH_DBG_CONFIG, "Driver halt\n");
1308 static int ath9k_add_interface(struct ieee80211_hw *hw,
1309 struct ieee80211_vif *vif)
1311 struct ath_wiphy *aphy = hw->priv;
1312 struct ath_softc *sc = aphy->sc;
1313 struct ath_hw *ah = sc->sc_ah;
1314 struct ath_common *common = ath9k_hw_common(ah);
1315 struct ath_vif *avp = (void *)vif->drv_priv;
1316 enum nl80211_iftype ic_opmode = NL80211_IFTYPE_UNSPECIFIED;
1319 mutex_lock(&sc->mutex);
1321 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_BSSIDMASK) &&
1327 switch (vif->type) {
1328 case NL80211_IFTYPE_STATION:
1329 ic_opmode = NL80211_IFTYPE_STATION;
1331 case NL80211_IFTYPE_ADHOC:
1332 case NL80211_IFTYPE_AP:
1333 case NL80211_IFTYPE_MESH_POINT:
1334 if (sc->nbcnvifs >= ATH_BCBUF) {
1338 ic_opmode = vif->type;
1341 ath_print(common, ATH_DBG_FATAL,
1342 "Interface type %d not yet supported\n", vif->type);
1347 ath_print(common, ATH_DBG_CONFIG,
1348 "Attach a VIF of type: %d\n", ic_opmode);
1350 /* Set the VIF opmode */
1351 avp->av_opmode = ic_opmode;
1356 if (ah->caps.hw_caps & ATH9K_HW_CAP_BSSIDMASK)
1357 ath9k_set_bssid_mask(hw);
1360 goto out; /* skip global settings for secondary vif */
1362 if (ic_opmode == NL80211_IFTYPE_AP) {
1363 ath9k_hw_set_tsfadjust(ah, 1);
1364 sc->sc_flags |= SC_OP_TSF_RESET;
1367 /* Set the device opmode */
1368 ah->opmode = ic_opmode;
1371 * Enable MIB interrupts when there are hardware phy counters.
1372 * Note we only do this (at the moment) for station mode.
1374 if ((vif->type == NL80211_IFTYPE_STATION) ||
1375 (vif->type == NL80211_IFTYPE_ADHOC) ||
1376 (vif->type == NL80211_IFTYPE_MESH_POINT)) {
1377 if (ah->config.enable_ani)
1378 ah->imask |= ATH9K_INT_MIB;
1379 ah->imask |= ATH9K_INT_TSFOOR;
1382 ath9k_hw_set_interrupts(ah, ah->imask);
1384 if (vif->type == NL80211_IFTYPE_AP ||
1385 vif->type == NL80211_IFTYPE_ADHOC ||
1386 vif->type == NL80211_IFTYPE_MONITOR) {
1387 sc->sc_flags |= SC_OP_ANI_RUN;
1388 ath_start_ani(common);
1392 mutex_unlock(&sc->mutex);
1396 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1397 struct ieee80211_vif *vif)
1399 struct ath_wiphy *aphy = hw->priv;
1400 struct ath_softc *sc = aphy->sc;
1401 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1402 struct ath_vif *avp = (void *)vif->drv_priv;
1405 ath_print(common, ATH_DBG_CONFIG, "Detach Interface\n");
1407 mutex_lock(&sc->mutex);
1410 sc->sc_flags &= ~SC_OP_ANI_RUN;
1411 del_timer_sync(&common->ani.timer);
1413 /* Reclaim beacon resources */
1414 if ((sc->sc_ah->opmode == NL80211_IFTYPE_AP) ||
1415 (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC) ||
1416 (sc->sc_ah->opmode == NL80211_IFTYPE_MESH_POINT)) {
1417 ath9k_ps_wakeup(sc);
1418 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1419 ath9k_ps_restore(sc);
1422 ath_beacon_return(sc, avp);
1423 sc->sc_flags &= ~SC_OP_BEACONS;
1425 for (i = 0; i < ARRAY_SIZE(sc->beacon.bslot); i++) {
1426 if (sc->beacon.bslot[i] == vif) {
1427 printk(KERN_DEBUG "%s: vif had allocated beacon "
1428 "slot\n", __func__);
1429 sc->beacon.bslot[i] = NULL;
1430 sc->beacon.bslot_aphy[i] = NULL;
1436 mutex_unlock(&sc->mutex);
1439 void ath9k_enable_ps(struct ath_softc *sc)
1441 struct ath_hw *ah = sc->sc_ah;
1443 sc->ps_enabled = true;
1444 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1445 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1446 ah->imask |= ATH9K_INT_TIM_TIMER;
1447 ath9k_hw_set_interrupts(ah, ah->imask);
1449 ath9k_hw_setrxabort(ah, 1);
1453 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1455 struct ath_wiphy *aphy = hw->priv;
1456 struct ath_softc *sc = aphy->sc;
1457 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1458 struct ieee80211_conf *conf = &hw->conf;
1459 struct ath_hw *ah = sc->sc_ah;
1462 mutex_lock(&sc->mutex);
1465 * Leave this as the first check because we need to turn on the
1466 * radio if it was disabled before prior to processing the rest
1467 * of the changes. Likewise we must only disable the radio towards
1470 if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1472 bool all_wiphys_idle;
1473 bool idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1475 spin_lock_bh(&sc->wiphy_lock);
1476 all_wiphys_idle = ath9k_all_wiphys_idle(sc);
1477 ath9k_set_wiphy_idle(aphy, idle);
1479 enable_radio = (!idle && all_wiphys_idle);
1482 * After we unlock here its possible another wiphy
1483 * can be re-renabled so to account for that we will
1484 * only disable the radio toward the end of this routine
1485 * if by then all wiphys are still idle.
1487 spin_unlock_bh(&sc->wiphy_lock);
1490 sc->ps_idle = false;
1491 ath_radio_enable(sc, hw);
1492 ath_print(common, ATH_DBG_CONFIG,
1493 "not-idle: enabling radio\n");
1498 * We just prepare to enable PS. We have to wait until our AP has
1499 * ACK'd our null data frame to disable RX otherwise we'll ignore
1500 * those ACKs and end up retransmitting the same null data frames.
1501 * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1503 if (changed & IEEE80211_CONF_CHANGE_PS) {
1504 if (conf->flags & IEEE80211_CONF_PS) {
1505 sc->ps_flags |= PS_ENABLED;
1507 * At this point we know hardware has received an ACK
1508 * of a previously sent null data frame.
1510 if ((sc->ps_flags & PS_NULLFUNC_COMPLETED)) {
1511 sc->ps_flags &= ~PS_NULLFUNC_COMPLETED;
1512 ath9k_enable_ps(sc);
1515 sc->ps_enabled = false;
1516 sc->ps_flags &= ~(PS_ENABLED |
1517 PS_NULLFUNC_COMPLETED);
1518 ath9k_setpower(sc, ATH9K_PM_AWAKE);
1519 if (!(ah->caps.hw_caps &
1520 ATH9K_HW_CAP_AUTOSLEEP)) {
1521 ath9k_hw_setrxabort(sc->sc_ah, 0);
1522 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1524 PS_WAIT_FOR_PSPOLL_DATA |
1525 PS_WAIT_FOR_TX_ACK);
1526 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1527 ah->imask &= ~ATH9K_INT_TIM_TIMER;
1528 ath9k_hw_set_interrupts(sc->sc_ah,
1535 if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1536 if (conf->flags & IEEE80211_CONF_MONITOR) {
1537 ath_print(common, ATH_DBG_CONFIG,
1538 "HW opmode set to Monitor mode\n");
1539 sc->sc_ah->opmode = NL80211_IFTYPE_MONITOR;
1543 if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
1544 struct ieee80211_channel *curchan = hw->conf.channel;
1545 int pos = curchan->hw_value;
1547 aphy->chan_idx = pos;
1548 aphy->chan_is_ht = conf_is_ht(conf);
1550 if (aphy->state == ATH_WIPHY_SCAN ||
1551 aphy->state == ATH_WIPHY_ACTIVE)
1552 ath9k_wiphy_pause_all_forced(sc, aphy);
1555 * Do not change operational channel based on a paused
1558 goto skip_chan_change;
1561 ath_print(common, ATH_DBG_CONFIG, "Set channel: %d MHz\n",
1562 curchan->center_freq);
1564 /* XXX: remove me eventualy */
1565 ath9k_update_ichannel(sc, hw, &sc->sc_ah->channels[pos]);
1567 ath_update_chainmask(sc, conf_is_ht(conf));
1569 if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
1570 ath_print(common, ATH_DBG_FATAL,
1571 "Unable to set channel\n");
1572 mutex_unlock(&sc->mutex);
1578 if (changed & IEEE80211_CONF_CHANGE_POWER) {
1579 sc->config.txpowlimit = 2 * conf->power_level;
1580 ath_update_txpow(sc);
1583 spin_lock_bh(&sc->wiphy_lock);
1584 disable_radio = ath9k_all_wiphys_idle(sc);
1585 spin_unlock_bh(&sc->wiphy_lock);
1587 if (disable_radio) {
1588 ath_print(common, ATH_DBG_CONFIG, "idle: disabling radio\n");
1590 ath_radio_disable(sc, hw);
1593 mutex_unlock(&sc->mutex);
1598 #define SUPPORTED_FILTERS \
1599 (FIF_PROMISC_IN_BSS | \
1604 FIF_BCN_PRBRESP_PROMISC | \
1607 /* FIXME: sc->sc_full_reset ? */
1608 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1609 unsigned int changed_flags,
1610 unsigned int *total_flags,
1613 struct ath_wiphy *aphy = hw->priv;
1614 struct ath_softc *sc = aphy->sc;
1617 changed_flags &= SUPPORTED_FILTERS;
1618 *total_flags &= SUPPORTED_FILTERS;
1620 sc->rx.rxfilter = *total_flags;
1621 ath9k_ps_wakeup(sc);
1622 rfilt = ath_calcrxfilter(sc);
1623 ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1624 ath9k_ps_restore(sc);
1626 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
1627 "Set HW RX filter: 0x%x\n", rfilt);
1630 static int ath9k_sta_add(struct ieee80211_hw *hw,
1631 struct ieee80211_vif *vif,
1632 struct ieee80211_sta *sta)
1634 struct ath_wiphy *aphy = hw->priv;
1635 struct ath_softc *sc = aphy->sc;
1637 ath_node_attach(sc, sta);
1642 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1643 struct ieee80211_vif *vif,
1644 struct ieee80211_sta *sta)
1646 struct ath_wiphy *aphy = hw->priv;
1647 struct ath_softc *sc = aphy->sc;
1649 ath_node_detach(sc, sta);
1654 static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
1655 const struct ieee80211_tx_queue_params *params)
1657 struct ath_wiphy *aphy = hw->priv;
1658 struct ath_softc *sc = aphy->sc;
1659 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1660 struct ath9k_tx_queue_info qi;
1663 if (queue >= WME_NUM_AC)
1666 mutex_lock(&sc->mutex);
1668 memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1670 qi.tqi_aifs = params->aifs;
1671 qi.tqi_cwmin = params->cw_min;
1672 qi.tqi_cwmax = params->cw_max;
1673 qi.tqi_burstTime = params->txop;
1674 qnum = ath_get_hal_qnum(queue, sc);
1676 ath_print(common, ATH_DBG_CONFIG,
1677 "Configure tx [queue/halq] [%d/%d], "
1678 "aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1679 queue, qnum, params->aifs, params->cw_min,
1680 params->cw_max, params->txop);
1682 ret = ath_txq_update(sc, qnum, &qi);
1684 ath_print(common, ATH_DBG_FATAL, "TXQ Update failed\n");
1686 if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
1687 if ((qnum == sc->tx.hwq_map[WME_AC_BE]) && !ret)
1688 ath_beaconq_config(sc);
1690 mutex_unlock(&sc->mutex);
1695 static int ath9k_set_key(struct ieee80211_hw *hw,
1696 enum set_key_cmd cmd,
1697 struct ieee80211_vif *vif,
1698 struct ieee80211_sta *sta,
1699 struct ieee80211_key_conf *key)
1701 struct ath_wiphy *aphy = hw->priv;
1702 struct ath_softc *sc = aphy->sc;
1703 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1706 if (modparam_nohwcrypt)
1709 mutex_lock(&sc->mutex);
1710 ath9k_ps_wakeup(sc);
1711 ath_print(common, ATH_DBG_CONFIG, "Set HW Key\n");
1715 ret = ath9k_cmn_key_config(common, vif, sta, key);
1717 key->hw_key_idx = ret;
1718 /* push IV and Michael MIC generation to stack */
1719 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1720 if (key->alg == ALG_TKIP)
1721 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1722 if (sc->sc_ah->sw_mgmt_crypto && key->alg == ALG_CCMP)
1723 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
1728 ath9k_cmn_key_delete(common, key);
1734 ath9k_ps_restore(sc);
1735 mutex_unlock(&sc->mutex);
1740 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1741 struct ieee80211_vif *vif,
1742 struct ieee80211_bss_conf *bss_conf,
1745 struct ath_wiphy *aphy = hw->priv;
1746 struct ath_softc *sc = aphy->sc;
1747 struct ath_hw *ah = sc->sc_ah;
1748 struct ath_common *common = ath9k_hw_common(ah);
1749 struct ath_vif *avp = (void *)vif->drv_priv;
1753 mutex_lock(&sc->mutex);
1755 if (changed & BSS_CHANGED_BSSID) {
1757 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1758 memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
1760 ath9k_hw_write_associd(ah);
1762 /* Set aggregation protection mode parameters */
1763 sc->config.ath_aggr_prot = 0;
1765 /* Only legacy IBSS for now */
1766 if (vif->type == NL80211_IFTYPE_ADHOC)
1767 ath_update_chainmask(sc, 0);
1769 ath_print(common, ATH_DBG_CONFIG,
1770 "BSSID: %pM aid: 0x%x\n",
1771 common->curbssid, common->curaid);
1773 /* need to reconfigure the beacon */
1774 sc->sc_flags &= ~SC_OP_BEACONS ;
1777 /* Enable transmission of beacons (AP, IBSS, MESH) */
1778 if ((changed & BSS_CHANGED_BEACON) ||
1779 ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
1780 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1781 error = ath_beacon_alloc(aphy, vif);
1783 ath_beacon_config(sc, vif);
1786 if (changed & BSS_CHANGED_ERP_SLOT) {
1787 if (bss_conf->use_short_slot)
1791 if (vif->type == NL80211_IFTYPE_AP) {
1793 * Defer update, so that connected stations can adjust
1794 * their settings at the same time.
1795 * See beacon.c for more details
1797 sc->beacon.slottime = slottime;
1798 sc->beacon.updateslot = UPDATE;
1800 ah->slottime = slottime;
1801 ath9k_hw_init_global_settings(ah);
1805 /* Disable transmission of beacons */
1806 if ((changed & BSS_CHANGED_BEACON_ENABLED) && !bss_conf->enable_beacon)
1807 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1809 if (changed & BSS_CHANGED_BEACON_INT) {
1810 sc->beacon_interval = bss_conf->beacon_int;
1812 * In case of AP mode, the HW TSF has to be reset
1813 * when the beacon interval changes.
1815 if (vif->type == NL80211_IFTYPE_AP) {
1816 sc->sc_flags |= SC_OP_TSF_RESET;
1817 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1818 error = ath_beacon_alloc(aphy, vif);
1820 ath_beacon_config(sc, vif);
1822 ath_beacon_config(sc, vif);
1826 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
1827 ath_print(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
1828 bss_conf->use_short_preamble);
1829 if (bss_conf->use_short_preamble)
1830 sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
1832 sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
1835 if (changed & BSS_CHANGED_ERP_CTS_PROT) {
1836 ath_print(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
1837 bss_conf->use_cts_prot);
1838 if (bss_conf->use_cts_prot &&
1839 hw->conf.channel->band != IEEE80211_BAND_5GHZ)
1840 sc->sc_flags |= SC_OP_PROTECT_ENABLE;
1842 sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
1845 if (changed & BSS_CHANGED_ASSOC) {
1846 ath_print(common, ATH_DBG_CONFIG, "BSS Changed ASSOC %d\n",
1848 ath9k_bss_assoc_info(sc, vif, bss_conf);
1851 mutex_unlock(&sc->mutex);
1854 static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
1857 struct ath_wiphy *aphy = hw->priv;
1858 struct ath_softc *sc = aphy->sc;
1860 mutex_lock(&sc->mutex);
1861 tsf = ath9k_hw_gettsf64(sc->sc_ah);
1862 mutex_unlock(&sc->mutex);
1867 static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
1869 struct ath_wiphy *aphy = hw->priv;
1870 struct ath_softc *sc = aphy->sc;
1872 mutex_lock(&sc->mutex);
1873 ath9k_hw_settsf64(sc->sc_ah, tsf);
1874 mutex_unlock(&sc->mutex);
1877 static void ath9k_reset_tsf(struct ieee80211_hw *hw)
1879 struct ath_wiphy *aphy = hw->priv;
1880 struct ath_softc *sc = aphy->sc;
1882 mutex_lock(&sc->mutex);
1884 ath9k_ps_wakeup(sc);
1885 ath9k_hw_reset_tsf(sc->sc_ah);
1886 ath9k_ps_restore(sc);
1888 mutex_unlock(&sc->mutex);
1891 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
1892 struct ieee80211_vif *vif,
1893 enum ieee80211_ampdu_mlme_action action,
1894 struct ieee80211_sta *sta,
1897 struct ath_wiphy *aphy = hw->priv;
1898 struct ath_softc *sc = aphy->sc;
1904 case IEEE80211_AMPDU_RX_START:
1905 if (!(sc->sc_flags & SC_OP_RXAGGR))
1908 case IEEE80211_AMPDU_RX_STOP:
1910 case IEEE80211_AMPDU_TX_START:
1911 ath9k_ps_wakeup(sc);
1912 ath_tx_aggr_start(sc, sta, tid, ssn);
1913 ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
1914 ath9k_ps_restore(sc);
1916 case IEEE80211_AMPDU_TX_STOP:
1917 ath9k_ps_wakeup(sc);
1918 ath_tx_aggr_stop(sc, sta, tid);
1919 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
1920 ath9k_ps_restore(sc);
1922 case IEEE80211_AMPDU_TX_OPERATIONAL:
1923 ath9k_ps_wakeup(sc);
1924 ath_tx_aggr_resume(sc, sta, tid);
1925 ath9k_ps_restore(sc);
1928 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
1929 "Unknown AMPDU action\n");
1937 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
1938 struct survey_info *survey)
1940 struct ath_wiphy *aphy = hw->priv;
1941 struct ath_softc *sc = aphy->sc;
1942 struct ath_hw *ah = sc->sc_ah;
1943 struct ath_common *common = ath9k_hw_common(ah);
1944 struct ieee80211_conf *conf = &hw->conf;
1949 survey->channel = conf->channel;
1950 survey->filled = SURVEY_INFO_NOISE_DBM;
1951 survey->noise = common->ani.noise_floor;
1956 static void ath9k_sw_scan_start(struct ieee80211_hw *hw)
1958 struct ath_wiphy *aphy = hw->priv;
1959 struct ath_softc *sc = aphy->sc;
1960 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1962 mutex_lock(&sc->mutex);
1963 if (ath9k_wiphy_scanning(sc)) {
1964 printk(KERN_DEBUG "ath9k: Two wiphys trying to scan at the "
1967 * Do not allow the concurrent scanning state for now. This
1968 * could be improved with scanning control moved into ath9k.
1970 mutex_unlock(&sc->mutex);
1974 aphy->state = ATH_WIPHY_SCAN;
1975 ath9k_wiphy_pause_all_forced(sc, aphy);
1976 sc->sc_flags |= SC_OP_SCANNING;
1977 del_timer_sync(&common->ani.timer);
1978 cancel_work_sync(&sc->paprd_work);
1979 cancel_delayed_work_sync(&sc->tx_complete_work);
1980 mutex_unlock(&sc->mutex);
1983 static void ath9k_sw_scan_complete(struct ieee80211_hw *hw)
1985 struct ath_wiphy *aphy = hw->priv;
1986 struct ath_softc *sc = aphy->sc;
1987 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1989 mutex_lock(&sc->mutex);
1990 aphy->state = ATH_WIPHY_ACTIVE;
1991 sc->sc_flags &= ~SC_OP_SCANNING;
1992 sc->sc_flags |= SC_OP_FULL_RESET;
1993 ath_start_ani(common);
1994 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
1995 ath_beacon_config(sc, NULL);
1996 mutex_unlock(&sc->mutex);
1999 static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
2001 struct ath_wiphy *aphy = hw->priv;
2002 struct ath_softc *sc = aphy->sc;
2003 struct ath_hw *ah = sc->sc_ah;
2005 mutex_lock(&sc->mutex);
2006 ah->coverage_class = coverage_class;
2007 ath9k_hw_init_global_settings(ah);
2008 mutex_unlock(&sc->mutex);
2011 struct ieee80211_ops ath9k_ops = {
2013 .start = ath9k_start,
2015 .add_interface = ath9k_add_interface,
2016 .remove_interface = ath9k_remove_interface,
2017 .config = ath9k_config,
2018 .configure_filter = ath9k_configure_filter,
2019 .sta_add = ath9k_sta_add,
2020 .sta_remove = ath9k_sta_remove,
2021 .conf_tx = ath9k_conf_tx,
2022 .bss_info_changed = ath9k_bss_info_changed,
2023 .set_key = ath9k_set_key,
2024 .get_tsf = ath9k_get_tsf,
2025 .set_tsf = ath9k_set_tsf,
2026 .reset_tsf = ath9k_reset_tsf,
2027 .ampdu_action = ath9k_ampdu_action,
2028 .get_survey = ath9k_get_survey,
2029 .sw_scan_start = ath9k_sw_scan_start,
2030 .sw_scan_complete = ath9k_sw_scan_complete,
2031 .rfkill_poll = ath9k_rfkill_poll_state,
2032 .set_coverage_class = ath9k_set_coverage_class,