drivers/net/wireless/ath/ath9k/main.c

   1 /*
   2  * Copyright (c) 2008-2011 Atheros Communications Inc.
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #include <linux/nl80211.h>
  18 #include <linux/delay.h>
  19 #include "ath9k.h"
  20 #include "btcoex.h"
  21
  22 static u8 parse_mpdudensity(u8 mpdudensity)
  23 {
  24         /*
  25          * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
  26          *   0 for no restriction
  27          *   1 for 1/4 us
  28          *   2 for 1/2 us
  29          *   3 for 1 us
  30          *   4 for 2 us
  31          *   5 for 4 us
  32          *   6 for 8 us
  33          *   7 for 16 us
  34          */
  35         switch (mpdudensity) {
  36         case 0:
  37                 return 0;
  38         case 1:
  39         case 2:
  40         case 3:
  41                 /* Our lower layer calculations limit our precision to
  42                    1 microsecond */
  43                 return 1;
  44         case 4:
  45                 return 2;
  46         case 5:
  47                 return 4;
  48         case 6:
  49                 return 8;
  50         case 7:
  51                 return 16;
  52         default:
  53                 return 0;
  54         }
  55 }
  56
  57 static bool ath9k_has_pending_frames(struct ath_softc *sc, struct ath_txq *txq)
  58 {
  59         bool pending = false;
  60
  61         spin_lock_bh(&txq->axq_lock);
  62
  63         if (txq->axq_depth || !list_empty(&txq->axq_acq))
  64                 pending = true;
  65
  66         spin_unlock_bh(&txq->axq_lock);
  67         return pending;
  68 }
  69
  70 static bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
  71 {
  72         unsigned long flags;
  73         bool ret;
  74
  75         spin_lock_irqsave(&sc->sc_pm_lock, flags);
  76         ret = ath9k_hw_setpower(sc->sc_ah, mode);
  77         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  78
  79         return ret;
  80 }
  81
  82 void ath9k_ps_wakeup(struct ath_softc *sc)
  83 {
  84         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  85         unsigned long flags;
  86         enum ath9k_power_mode power_mode;
  87
  88         spin_lock_irqsave(&sc->sc_pm_lock, flags);
  89         if (++sc->ps_usecount != 1)
  90                 goto unlock;
  91
  92         power_mode = sc->sc_ah->power_mode;
  93         ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
  94
  95         /*
  96          * While the hardware is asleep, the cycle counters contain no
  97          * useful data. Better clear them now so that they don't mess up
  98          * survey data results.
  99          */
 100         if (power_mode != ATH9K_PM_AWAKE) {
 101                 spin_lock(&common->cc_lock);
 102                 ath_hw_cycle_counters_update(common);
 103                 memset(&common->cc_survey, 0, sizeof(common->cc_survey));
 104                 spin_unlock(&common->cc_lock);
 105         }
 106
 107  unlock:
 108         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 109 }
 110
 111 void ath9k_ps_restore(struct ath_softc *sc)
 112 {
 113         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 114         unsigned long flags;
 115
 116         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 117         if (--sc->ps_usecount != 0)
 118                 goto unlock;
 119
 120         spin_lock(&common->cc_lock);
 121         ath_hw_cycle_counters_update(common);
 122         spin_unlock(&common->cc_lock);
 123
 124         if (sc->ps_idle)
 125                 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
 126         else if (sc->ps_enabled &&
 127                  !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
 128                               PS_WAIT_FOR_CAB |
 129                               PS_WAIT_FOR_PSPOLL_DATA |
 130                               PS_WAIT_FOR_TX_ACK)))
 131                 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
 132
 133  unlock:
 134         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 135 }
 136
 137 void ath_start_ani(struct ath_common *common)
 138 {
 139         struct ath_hw *ah = common->ah;
 140         unsigned long timestamp = jiffies_to_msecs(jiffies);
 141         struct ath_softc *sc = (struct ath_softc *) common->priv;
 142
 143         if (!(sc->sc_flags & SC_OP_ANI_RUN))
 144                 return;
 145
 146         if (sc->sc_flags & SC_OP_OFFCHANNEL)
 147                 return;
 148
 149         common->ani.longcal_timer = timestamp;
 150         common->ani.shortcal_timer = timestamp;
 151         common->ani.checkani_timer = timestamp;
 152
 153         mod_timer(&common->ani.timer,
 154                   jiffies +
 155                         msecs_to_jiffies((u32)ah->config.ani_poll_interval));
 156 }
 157
 158 static void ath_update_survey_nf(struct ath_softc *sc, int channel)
 159 {
 160         struct ath_hw *ah = sc->sc_ah;
 161         struct ath9k_channel *chan = &ah->channels[channel];
 162         struct survey_info *survey = &sc->survey[channel];
 163
 164         if (chan->noisefloor) {
 165                 survey->filled |= SURVEY_INFO_NOISE_DBM;
 166                 survey->noise = ath9k_hw_getchan_noise(ah, chan);
 167         }
 168 }
 169
 170 /*
 171  * Updates the survey statistics and returns the busy time since last
 172  * update in %, if the measurement duration was long enough for the
 173  * result to be useful, -1 otherwise.
 174  */
 175 static int ath_update_survey_stats(struct ath_softc *sc)
 176 {
 177         struct ath_hw *ah = sc->sc_ah;
 178         struct ath_common *common = ath9k_hw_common(ah);
 179         int pos = ah->curchan - &ah->channels[0];
 180         struct survey_info *survey = &sc->survey[pos];
 181         struct ath_cycle_counters *cc = &common->cc_survey;
 182         unsigned int div = common->clockrate * 1000;
 183         int ret = 0;
 184
 185         if (!ah->curchan)
 186                 return -1;
 187
 188         if (ah->power_mode == ATH9K_PM_AWAKE)
 189                 ath_hw_cycle_counters_update(common);
 190
 191         if (cc->cycles > 0) {
 192                 survey->filled |= SURVEY_INFO_CHANNEL_TIME |
 193                         SURVEY_INFO_CHANNEL_TIME_BUSY |
 194                         SURVEY_INFO_CHANNEL_TIME_RX |
 195                         SURVEY_INFO_CHANNEL_TIME_TX;
 196                 survey->channel_time += cc->cycles / div;
 197                 survey->channel_time_busy += cc->rx_busy / div;
 198                 survey->channel_time_rx += cc->rx_frame / div;
 199                 survey->channel_time_tx += cc->tx_frame / div;
 200         }
 201
 202         if (cc->cycles < div)
 203                 return -1;
 204
 205         if (cc->cycles > 0)
 206                 ret = cc->rx_busy * 100 / cc->cycles;
 207
 208         memset(cc, 0, sizeof(*cc));
 209
 210         ath_update_survey_nf(sc, pos);
 211
 212         return ret;
 213 }
 214
 215 /*
 216  * Set/change channels.  If the channel is really being changed, it's done
 217  * by reseting the chip.  To accomplish this we must first cleanup any pending
 218  * DMA, then restart stuff.
 219 */
 220 static int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
 221                     struct ath9k_channel *hchan)
 222 {
 223         struct ath_hw *ah = sc->sc_ah;
 224         struct ath_common *common = ath9k_hw_common(ah);
 225         struct ieee80211_conf *conf = &common->hw->conf;
 226         bool fastcc = true, stopped;
 227         struct ieee80211_channel *channel = hw->conf.channel;
 228         struct ath9k_hw_cal_data *caldata = NULL;
 229         int r;
 230
 231         if (sc->sc_flags & SC_OP_INVALID)
 232                 return -EIO;
 233
 234         sc->hw_busy_count = 0;
 235
 236         del_timer_sync(&common->ani.timer);
 237         cancel_work_sync(&sc->paprd_work);
 238         cancel_work_sync(&sc->hw_check_work);
 239         cancel_work_sync(&sc->hw_reset_work);
 240         cancel_delayed_work_sync(&sc->tx_complete_work);
 241         cancel_delayed_work_sync(&sc->hw_pll_work);
 242
 243         ath9k_ps_wakeup(sc);
 244
 245         spin_lock_bh(&sc->sc_pcu_lock);
 246
 247         /*
 248          * This is only performed if the channel settings have
 249          * actually changed.
 250          *
 251          * To switch channels clear any pending DMA operations;
 252          * wait long enough for the RX fifo to drain, reset the
 253          * hardware at the new frequency, and then re-enable
 254          * the relevant bits of the h/w.
 255          */
 256         ath9k_hw_disable_interrupts(ah);
 257         stopped = ath_drain_all_txq(sc, false);
 258
 259         if (!ath_stoprecv(sc))
 260                 stopped = false;
 261
 262         if (!ath9k_hw_check_alive(ah))
 263                 stopped = false;
 264
 265         /* XXX: do not flush receive queue here. We don't want
 266          * to flush data frames already in queue because of
 267          * changing channel. */
 268
 269         if (!stopped || !(sc->sc_flags & SC_OP_OFFCHANNEL))
 270                 fastcc = false;
 271
 272         if (!(sc->sc_flags & SC_OP_OFFCHANNEL))
 273                 caldata = &sc->caldata;
 274
 275         ath_dbg(common, ATH_DBG_CONFIG,
 276                 "(%u MHz) -> (%u MHz), conf_is_ht40: %d fastcc: %d\n",
 277                 sc->sc_ah->curchan->channel,
 278                 channel->center_freq, conf_is_ht40(conf),
 279                 fastcc);
 280
 281         r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
 282         if (r) {
 283                 ath_err(common,
 284                         "Unable to reset channel (%u MHz), reset status %d\n",
 285                         channel->center_freq, r);
 286                 goto ps_restore;
 287         }
 288
 289         if (ath_startrecv(sc) != 0) {
 290                 ath_err(common, "Unable to restart recv logic\n");
 291                 r = -EIO;
 292                 goto ps_restore;
 293         }
 294
 295         ath9k_cmn_update_txpow(ah, sc->curtxpow,
 296                                sc->config.txpowlimit, &sc->curtxpow);
 297         ath9k_hw_set_interrupts(ah, ah->imask);
 298         ath9k_hw_enable_interrupts(ah);
 299
 300         if (!(sc->sc_flags & (SC_OP_OFFCHANNEL))) {
 301                 if (sc->sc_flags & SC_OP_BEACONS)
 302                         ath_set_beacon(sc);
 303                 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
 304                 ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work, HZ/2);
 305                 if (!common->disable_ani)
 306                         ath_start_ani(common);
 307         }
 308
 309  ps_restore:
 310         ieee80211_wake_queues(hw);
 311
 312         spin_unlock_bh(&sc->sc_pcu_lock);
 313
 314         ath9k_ps_restore(sc);
 315         return r;
 316 }
 317
 318 static void ath_paprd_activate(struct ath_softc *sc)
 319 {
 320         struct ath_hw *ah = sc->sc_ah;
 321         struct ath9k_hw_cal_data *caldata = ah->caldata;
 322         int chain;
 323
 324         if (!caldata || !caldata->paprd_done)
 325                 return;
 326
 327         ath9k_ps_wakeup(sc);
 328         ar9003_paprd_enable(ah, false);
 329         for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
 330                 if (!(ah->txchainmask & BIT(chain)))
 331                         continue;
 332
 333                 ar9003_paprd_populate_single_table(ah, caldata, chain);
 334         }
 335
 336         ar9003_paprd_enable(ah, true);
 337         ath9k_ps_restore(sc);
 338 }
 339
 340 static bool ath_paprd_send_frame(struct ath_softc *sc, struct sk_buff *skb, int chain)
 341 {
 342         struct ieee80211_hw *hw = sc->hw;
 343         struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
 344         struct ath_hw *ah = sc->sc_ah;
 345         struct ath_common *common = ath9k_hw_common(ah);
 346         struct ath_tx_control txctl;
 347         int time_left;
 348
 349         memset(&txctl, 0, sizeof(txctl));
 350         txctl.txq = sc->tx.txq_map[WME_AC_BE];
 351
 352         memset(tx_info, 0, sizeof(*tx_info));
 353         tx_info->band = hw->conf.channel->band;
 354         tx_info->flags |= IEEE80211_TX_CTL_NO_ACK;
 355         tx_info->control.rates[0].idx = 0;
 356         tx_info->control.rates[0].count = 1;
 357         tx_info->control.rates[0].flags = IEEE80211_TX_RC_MCS;
 358         tx_info->control.rates[1].idx = -1;
 359
 360         init_completion(&sc->paprd_complete);
 361         txctl.paprd = BIT(chain);
 362
 363         if (ath_tx_start(hw, skb, &txctl) != 0) {
 364                 ath_dbg(common, ATH_DBG_CALIBRATE, "PAPRD TX failed\n");
 365                 dev_kfree_skb_any(skb);
 366                 return false;
 367         }
 368
 369         time_left = wait_for_completion_timeout(&sc->paprd_complete,
 370                         msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
 371
 372         if (!time_left)
 373                 ath_dbg(common, ATH_DBG_CALIBRATE,
 374                         "Timeout waiting for paprd training on TX chain %d\n",
 375                         chain);
 376
 377         return !!time_left;
 378 }
 379
 380 void ath_paprd_calibrate(struct work_struct *work)
 381 {
 382         struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
 383         struct ieee80211_hw *hw = sc->hw;
 384         struct ath_hw *ah = sc->sc_ah;
 385         struct ieee80211_hdr *hdr;
 386         struct sk_buff *skb = NULL;
 387         struct ath9k_hw_cal_data *caldata = ah->caldata;
 388         struct ath_common *common = ath9k_hw_common(ah);
 389         int ftype;
 390         int chain_ok = 0;
 391         int chain;
 392         int len = 1800;
 393
 394         if (!caldata)
 395                 return;
 396
 397         ath9k_ps_wakeup(sc);
 398
 399         if (ar9003_paprd_init_table(ah) < 0)
 400                 goto fail_paprd;
 401
 402         skb = alloc_skb(len, GFP_KERNEL);
 403         if (!skb)
 404                 goto fail_paprd;
 405
 406         skb_put(skb, len);
 407         memset(skb->data, 0, len);
 408         hdr = (struct ieee80211_hdr *)skb->data;
 409         ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
 410         hdr->frame_control = cpu_to_le16(ftype);
 411         hdr->duration_id = cpu_to_le16(10);
 412         memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
 413         memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
 414         memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
 415
 416         for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
 417                 if (!(ah->txchainmask & BIT(chain)))
 418                         continue;
 419
 420                 chain_ok = 0;
 421
 422                 ath_dbg(common, ATH_DBG_CALIBRATE,
 423                         "Sending PAPRD frame for thermal measurement "
 424                         "on chain %d\n", chain);
 425                 if (!ath_paprd_send_frame(sc, skb, chain))
 426                         goto fail_paprd;
 427
 428                 ar9003_paprd_setup_gain_table(ah, chain);
 429
 430                 ath_dbg(common, ATH_DBG_CALIBRATE,
 431                         "Sending PAPRD training frame on chain %d\n", chain);
 432                 if (!ath_paprd_send_frame(sc, skb, chain))
 433                         goto fail_paprd;
 434
 435                 if (!ar9003_paprd_is_done(ah)) {
 436                         ath_dbg(common, ATH_DBG_CALIBRATE,
 437                                 "PAPRD not yet done on chain %d\n", chain);
 438                         break;
 439                 }
 440
 441                 if (ar9003_paprd_create_curve(ah, caldata, chain)) {
 442                         ath_dbg(common, ATH_DBG_CALIBRATE,
 443                                 "PAPRD create curve failed on chain %d\n",
 444                                                                    chain);
 445                         break;
 446                 }
 447
 448                 chain_ok = 1;
 449         }
 450         kfree_skb(skb);
 451
 452         if (chain_ok) {
 453                 caldata->paprd_done = true;
 454                 ath_paprd_activate(sc);
 455         }
 456
 457 fail_paprd:
 458         ath9k_ps_restore(sc);
 459 }
 460
 461 /*
 462  *  This routine performs the periodic noise floor calibration function
 463  *  that is used to adjust and optimize the chip performance.  This
 464  *  takes environmental changes (location, temperature) into account.
 465  *  When the task is complete, it reschedules itself depending on the
 466  *  appropriate interval that was calculated.
 467  */
 468 void ath_ani_calibrate(unsigned long data)
 469 {
 470         struct ath_softc *sc = (struct ath_softc *)data;
 471         struct ath_hw *ah = sc->sc_ah;
 472         struct ath_common *common = ath9k_hw_common(ah);
 473         bool longcal = false;
 474         bool shortcal = false;
 475         bool aniflag = false;
 476         unsigned int timestamp = jiffies_to_msecs(jiffies);
 477         u32 cal_interval, short_cal_interval, long_cal_interval;
 478         unsigned long flags;
 479
 480         if (ah->caldata && ah->caldata->nfcal_interference)
 481                 long_cal_interval = ATH_LONG_CALINTERVAL_INT;
 482         else
 483                 long_cal_interval = ATH_LONG_CALINTERVAL;
 484
 485         short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
 486                 ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
 487
 488         /* Only calibrate if awake */
 489         if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
 490                 goto set_timer;
 491
 492         ath9k_ps_wakeup(sc);
 493
 494         /* Long calibration runs independently of short calibration. */
 495         if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) {
 496                 longcal = true;
 497                 ath_dbg(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
 498                 common->ani.longcal_timer = timestamp;
 499         }
 500
 501         /* Short calibration applies only while caldone is false */
 502         if (!common->ani.caldone) {
 503                 if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
 504                         shortcal = true;
 505                         ath_dbg(common, ATH_DBG_ANI,
 506                                 "shortcal @%lu\n", jiffies);
 507                         common->ani.shortcal_timer = timestamp;
 508                         common->ani.resetcal_timer = timestamp;
 509                 }
 510         } else {
 511                 if ((timestamp - common->ani.resetcal_timer) >=
 512                     ATH_RESTART_CALINTERVAL) {
 513                         common->ani.caldone = ath9k_hw_reset_calvalid(ah);
 514                         if (common->ani.caldone)
 515                                 common->ani.resetcal_timer = timestamp;
 516                 }
 517         }
 518
 519         /* Verify whether we must check ANI */
 520         if ((timestamp - common->ani.checkani_timer) >=
 521              ah->config.ani_poll_interval) {
 522                 aniflag = true;
 523                 common->ani.checkani_timer = timestamp;
 524         }
 525
 526         /* Call ANI routine if necessary */
 527         if (aniflag) {
 528                 spin_lock_irqsave(&common->cc_lock, flags);
 529                 ath9k_hw_ani_monitor(ah, ah->curchan);
 530                 ath_update_survey_stats(sc);
 531                 spin_unlock_irqrestore(&common->cc_lock, flags);
 532         }
 533
 534         /* Perform calibration if necessary */
 535         if (longcal || shortcal) {
 536                 common->ani.caldone =
 537                         ath9k_hw_calibrate(ah, ah->curchan,
 538                                                 ah->rxchainmask, longcal);
 539         }
 540
 541         ath9k_ps_restore(sc);
 542
 543 set_timer:
 544         /*
 545         * Set timer interval based on previous results.
 546         * The interval must be the shortest necessary to satisfy ANI,
 547         * short calibration and long calibration.
 548         */
 549         ath9k_debug_samp_bb_mac(sc);
 550         cal_interval = ATH_LONG_CALINTERVAL;
 551         if (sc->sc_ah->config.enable_ani)
 552                 cal_interval = min(cal_interval,
 553                                    (u32)ah->config.ani_poll_interval);
 554         if (!common->ani.caldone)
 555                 cal_interval = min(cal_interval, (u32)short_cal_interval);
 556
 557         mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
 558         if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->caldata) {
 559                 if (!ah->caldata->paprd_done)
 560                         ieee80211_queue_work(sc->hw, &sc->paprd_work);
 561                 else if (!ah->paprd_table_write_done)
 562                         ath_paprd_activate(sc);
 563         }
 564 }
 565
 566 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
 567 {
 568         struct ath_node *an;
 569         an = (struct ath_node *)sta->drv_priv;
 570
 571 #ifdef CONFIG_ATH9K_DEBUGFS
 572         spin_lock(&sc->nodes_lock);
 573         list_add(&an->list, &sc->nodes);
 574         spin_unlock(&sc->nodes_lock);
 575         an->sta = sta;
 576 #endif
 577         if (sc->sc_flags & SC_OP_TXAGGR) {
 578                 ath_tx_node_init(sc, an);
 579                 an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
 580                                      sta->ht_cap.ampdu_factor);
 581                 an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
 582         }
 583 }
 584
 585 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
 586 {
 587         struct ath_node *an = (struct ath_node *)sta->drv_priv;
 588
 589 #ifdef CONFIG_ATH9K_DEBUGFS
 590         spin_lock(&sc->nodes_lock);
 591         list_del(&an->list);
 592         spin_unlock(&sc->nodes_lock);
 593         an->sta = NULL;
 594 #endif
 595
 596         if (sc->sc_flags & SC_OP_TXAGGR)
 597                 ath_tx_node_cleanup(sc, an);
 598 }
 599
 600
 601 void ath9k_tasklet(unsigned long data)
 602 {
 603         struct ath_softc *sc = (struct ath_softc *)data;
 604         struct ath_hw *ah = sc->sc_ah;
 605         struct ath_common *common = ath9k_hw_common(ah);
 606
 607         u32 status = sc->intrstatus;
 608         u32 rxmask;
 609
 610         if ((status & ATH9K_INT_FATAL) ||
 611             (status & ATH9K_INT_BB_WATCHDOG)) {
 612                 ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
 613                 return;
 614         }
 615
 616         ath9k_ps_wakeup(sc);
 617         spin_lock(&sc->sc_pcu_lock);
 618
 619         /*
 620          * Only run the baseband hang check if beacons stop working in AP or
 621          * IBSS mode, because it has a high false positive rate. For station
 622          * mode it should not be necessary, since the upper layers will detect
 623          * this through a beacon miss automatically and the following channel
 624          * change will trigger a hardware reset anyway
 625          */
 626         if (ath9k_hw_numtxpending(ah, sc->beacon.beaconq) != 0 &&
 627             !ath9k_hw_check_alive(ah))
 628                 ieee80211_queue_work(sc->hw, &sc->hw_check_work);
 629
 630         if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
 631                 /*
 632                  * TSF sync does not look correct; remain awake to sync with
 633                  * the next Beacon.
 634                  */
 635                 ath_dbg(common, ATH_DBG_PS,
 636                         "TSFOOR - Sync with next Beacon\n");
 637                 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
 638         }
 639
 640         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 641                 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
 642                           ATH9K_INT_RXORN);
 643         else
 644                 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 645
 646         if (status & rxmask) {
 647                 /* Check for high priority Rx first */
 648                 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
 649                     (status & ATH9K_INT_RXHP))
 650                         ath_rx_tasklet(sc, 0, true);
 651
 652                 ath_rx_tasklet(sc, 0, false);
 653         }
 654
 655         if (status & ATH9K_INT_TX) {
 656                 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 657                         ath_tx_edma_tasklet(sc);
 658                 else
 659                         ath_tx_tasklet(sc);
 660         }
 661
 662         if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
 663                 if (status & ATH9K_INT_GENTIMER)
 664                         ath_gen_timer_isr(sc->sc_ah);
 665
 666         /* re-enable hardware interrupt */
 667         ath9k_hw_enable_interrupts(ah);
 668
 669         spin_unlock(&sc->sc_pcu_lock);
 670         ath9k_ps_restore(sc);
 671 }
 672
 673 irqreturn_t ath_isr(int irq, void *dev)
 674 {
 675 #define SCHED_INTR (                            \
 676                 ATH9K_INT_FATAL |               \
 677                 ATH9K_INT_BB_WATCHDOG |         \
 678                 ATH9K_INT_RXORN |               \
 679                 ATH9K_INT_RXEOL |               \
 680                 ATH9K_INT_RX |                  \
 681                 ATH9K_INT_RXLP |                \
 682                 ATH9K_INT_RXHP |                \
 683                 ATH9K_INT_TX |                  \
 684                 ATH9K_INT_BMISS |               \
 685                 ATH9K_INT_CST |                 \
 686                 ATH9K_INT_TSFOOR |              \
 687                 ATH9K_INT_GENTIMER)
 688
 689         struct ath_softc *sc = dev;
 690         struct ath_hw *ah = sc->sc_ah;
 691         struct ath_common *common = ath9k_hw_common(ah);
 692         enum ath9k_int status;
 693         bool sched = false;
 694
 695         /*
 696          * The hardware is not ready/present, don't
 697          * touch anything. Note this can happen early
 698          * on if the IRQ is shared.
 699          */
 700         if (sc->sc_flags & SC_OP_INVALID)
 701                 return IRQ_NONE;
 702
 703
 704         /* shared irq, not for us */
 705
 706         if (!ath9k_hw_intrpend(ah))
 707                 return IRQ_NONE;
 708
 709         /*
 710          * Figure out the reason(s) for the interrupt.  Note
 711          * that the hal returns a pseudo-ISR that may include
 712          * bits we haven't explicitly enabled so we mask the
 713          * value to insure we only process bits we requested.
 714          */
 715         ath9k_hw_getisr(ah, &status);   /* NB: clears ISR too */
 716         status &= ah->imask;    /* discard unasked-for bits */
 717
 718         /*
 719          * If there are no status bits set, then this interrupt was not
 720          * for me (should have been caught above).
 721          */
 722         if (!status)
 723                 return IRQ_NONE;
 724
 725         /* Cache the status */
 726         sc->intrstatus = status;
 727
 728         if (status & SCHED_INTR)
 729                 sched = true;
 730
 731         /*
 732          * If a FATAL or RXORN interrupt is received, we have to reset the
 733          * chip immediately.
 734          */
 735         if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
 736             !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
 737                 goto chip_reset;
 738
 739         if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
 740             (status & ATH9K_INT_BB_WATCHDOG)) {
 741
 742                 spin_lock(&common->cc_lock);
 743                 ath_hw_cycle_counters_update(common);
 744                 ar9003_hw_bb_watchdog_dbg_info(ah);
 745                 spin_unlock(&common->cc_lock);
 746
 747                 goto chip_reset;
 748         }
 749
 750         if (status & ATH9K_INT_SWBA)
 751                 tasklet_schedule(&sc->bcon_tasklet);
 752
 753         if (status & ATH9K_INT_TXURN)
 754                 ath9k_hw_updatetxtriglevel(ah, true);
 755
 756         if (status & ATH9K_INT_RXEOL) {
 757                 ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 758                 ath9k_hw_set_interrupts(ah, ah->imask);
 759         }
 760
 761         if (status & ATH9K_INT_MIB) {
 762                 /*
 763                  * Disable interrupts until we service the MIB
 764                  * interrupt; otherwise it will continue to
 765                  * fire.
 766                  */
 767                 ath9k_hw_disable_interrupts(ah);
 768                 /*
 769                  * Let the hal handle the event. We assume
 770                  * it will clear whatever condition caused
 771                  * the interrupt.
 772                  */
 773                 spin_lock(&common->cc_lock);
 774                 ath9k_hw_proc_mib_event(ah);
 775                 spin_unlock(&common->cc_lock);
 776                 ath9k_hw_enable_interrupts(ah);
 777         }
 778
 779         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
 780                 if (status & ATH9K_INT_TIM_TIMER) {
 781                         if (ATH_DBG_WARN_ON_ONCE(sc->ps_idle))
 782                                 goto chip_reset;
 783                         /* Clear RxAbort bit so that we can
 784                          * receive frames */
 785                         ath9k_setpower(sc, ATH9K_PM_AWAKE);
 786                         ath9k_hw_setrxabort(sc->sc_ah, 0);
 787                         sc->ps_flags |= PS_WAIT_FOR_BEACON;
 788                 }
 789
 790 chip_reset:
 791
 792         ath_debug_stat_interrupt(sc, status);
 793
 794         if (sched) {
 795                 /* turn off every interrupt */
 796                 ath9k_hw_disable_interrupts(ah);
 797                 tasklet_schedule(&sc->intr_tq);
 798         }
 799
 800         return IRQ_HANDLED;
 801
 802 #undef SCHED_INTR
 803 }
 804
 805 static void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
 806 {
 807         struct ath_hw *ah = sc->sc_ah;
 808         struct ath_common *common = ath9k_hw_common(ah);
 809         struct ieee80211_channel *channel = hw->conf.channel;
 810         int r;
 811
 812         ath9k_ps_wakeup(sc);
 813         spin_lock_bh(&sc->sc_pcu_lock);
 814         atomic_set(&ah->intr_ref_cnt, -1);
 815
 816         ath9k_hw_configpcipowersave(ah, false);
 817
 818         if (!ah->curchan)
 819                 ah->curchan = ath9k_cmn_get_curchannel(sc->hw, ah);
 820
 821         r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
 822         if (r) {
 823                 ath_err(common,
 824                         "Unable to reset channel (%u MHz), reset status %d\n",
 825                         channel->center_freq, r);
 826         }
 827
 828         ath9k_cmn_update_txpow(ah, sc->curtxpow,
 829                                sc->config.txpowlimit, &sc->curtxpow);
 830         if (ath_startrecv(sc) != 0) {
 831                 ath_err(common, "Unable to restart recv logic\n");
 832                 goto out;
 833         }
 834         if (sc->sc_flags & SC_OP_BEACONS)
 835                 ath_set_beacon(sc);     /* restart beacons */
 836
 837         /* Re-Enable  interrupts */
 838         ath9k_hw_set_interrupts(ah, ah->imask);
 839         ath9k_hw_enable_interrupts(ah);
 840
 841         /* Enable LED */
 842         ath9k_hw_cfg_output(ah, ah->led_pin,
 843                             AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
 844         ath9k_hw_set_gpio(ah, ah->led_pin, 0);
 845
 846         ieee80211_wake_queues(hw);
 847         ieee80211_queue_delayed_work(hw, &sc->hw_pll_work, HZ/2);
 848
 849 out:
 850         spin_unlock_bh(&sc->sc_pcu_lock);
 851
 852         ath9k_ps_restore(sc);
 853 }
 854
 855 void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
 856 {
 857         struct ath_hw *ah = sc->sc_ah;
 858         struct ieee80211_channel *channel = hw->conf.channel;
 859         int r;
 860
 861         ath9k_ps_wakeup(sc);
 862         cancel_delayed_work_sync(&sc->hw_pll_work);
 863
 864         spin_lock_bh(&sc->sc_pcu_lock);
 865
 866         ieee80211_stop_queues(hw);
 867
 868         /*
 869          * Keep the LED on when the radio is disabled
 870          * during idle unassociated state.
 871          */
 872         if (!sc->ps_idle) {
 873                 ath9k_hw_set_gpio(ah, ah->led_pin, 1);
 874                 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
 875         }
 876
 877         /* Disable interrupts */
 878         ath9k_hw_disable_interrupts(ah);
 879
 880         ath_drain_all_txq(sc, false);   /* clear pending tx frames */
 881
 882         ath_stoprecv(sc);               /* turn off frame recv */
 883         ath_flushrecv(sc);              /* flush recv queue */
 884
 885         if (!ah->curchan)
 886                 ah->curchan = ath9k_cmn_get_curchannel(hw, ah);
 887
 888         r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
 889         if (r) {
 890                 ath_err(ath9k_hw_common(sc->sc_ah),
 891                         "Unable to reset channel (%u MHz), reset status %d\n",
 892                         channel->center_freq, r);
 893         }
 894
 895         ath9k_hw_phy_disable(ah);
 896
 897         ath9k_hw_configpcipowersave(ah, true);
 898
 899         spin_unlock_bh(&sc->sc_pcu_lock);
 900         ath9k_ps_restore(sc);
 901 }
 902
 903 static int ath_reset(struct ath_softc *sc, bool retry_tx)
 904 {
 905         struct ath_hw *ah = sc->sc_ah;
 906         struct ath_common *common = ath9k_hw_common(ah);
 907         struct ieee80211_hw *hw = sc->hw;
 908         int r;
 909
 910         sc->hw_busy_count = 0;
 911
 912         ath9k_debug_samp_bb_mac(sc);
 913         /* Stop ANI */
 914
 915         del_timer_sync(&common->ani.timer);
 916
 917         ath9k_ps_wakeup(sc);
 918
 919         ieee80211_stop_queues(hw);
 920
 921         ath9k_hw_disable_interrupts(ah);
 922         ath_drain_all_txq(sc, retry_tx);
 923
 924         ath_stoprecv(sc);
 925         ath_flushrecv(sc);
 926
 927         r = ath9k_hw_reset(ah, sc->sc_ah->curchan, ah->caldata, false);
 928         if (r)
 929                 ath_err(common,
 930                         "Unable to reset hardware; reset status %d\n", r);
 931
 932         if (ath_startrecv(sc) != 0)
 933                 ath_err(common, "Unable to start recv logic\n");
 934
 935         /*
 936          * We may be doing a reset in response to a request
 937          * that changes the channel so update any state that
 938          * might change as a result.
 939          */
 940         ath9k_cmn_update_txpow(ah, sc->curtxpow,
 941                                sc->config.txpowlimit, &sc->curtxpow);
 942
 943         if ((sc->sc_flags & SC_OP_BEACONS) || !(sc->sc_flags & (SC_OP_OFFCHANNEL)))
 944                 ath_set_beacon(sc);     /* restart beacons */
 945
 946         ath9k_hw_set_interrupts(ah, ah->imask);
 947         ath9k_hw_enable_interrupts(ah);
 948
 949         if (retry_tx) {
 950                 int i;
 951                 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
 952                         if (ATH_TXQ_SETUP(sc, i)) {
 953                                 spin_lock_bh(&sc->tx.txq[i].axq_lock);
 954                                 ath_txq_schedule(sc, &sc->tx.txq[i]);
 955                                 spin_unlock_bh(&sc->tx.txq[i].axq_lock);
 956                         }
 957                 }
 958         }
 959
 960         ieee80211_wake_queues(hw);
 961
 962         /* Start ANI */
 963         if (!common->disable_ani)
 964                 ath_start_ani(common);
 965
 966         ath9k_ps_restore(sc);
 967
 968         return r;
 969 }
 970
 971 void ath_reset_work(struct work_struct *work)
 972 {
 973         struct ath_softc *sc = container_of(work, struct ath_softc, hw_reset_work);
 974
 975         spin_lock_bh(&sc->sc_pcu_lock);
 976         ath_reset(sc, true);
 977         spin_unlock_bh(&sc->sc_pcu_lock);
 978 }
 979
 980 void ath_hw_check(struct work_struct *work)
 981 {
 982         struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
 983         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 984         unsigned long flags;
 985         int busy;
 986
 987         ath9k_ps_wakeup(sc);
 988         if (ath9k_hw_check_alive(sc->sc_ah))
 989                 goto out;
 990
 991         spin_lock_irqsave(&common->cc_lock, flags);
 992         busy = ath_update_survey_stats(sc);
 993         spin_unlock_irqrestore(&common->cc_lock, flags);
 994
 995         ath_dbg(common, ATH_DBG_RESET, "Possible baseband hang, "
 996                 "busy=%d (try %d)\n", busy, sc->hw_busy_count + 1);
 997         if (busy >= 99) {
 998                 if (++sc->hw_busy_count >= 3) {
 999                         spin_lock_bh(&sc->sc_pcu_lock);
1000                         ath_reset(sc, true);
1001                         spin_unlock_bh(&sc->sc_pcu_lock);
1002                 }
1003
1004         } else if (busy >= 0)
1005                 sc->hw_busy_count = 0;
1006
1007 out:
1008         ath9k_ps_restore(sc);
1009 }
1010
1011 static void ath_hw_pll_rx_hang_check(struct ath_softc *sc, u32 pll_sqsum)
1012 {
1013         static int count;
1014         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1015
1016         if (pll_sqsum >= 0x40000) {
1017                 count++;
1018                 if (count == 3) {
1019                         /* Rx is hung for more than 500ms. Reset it */
1020                         ath_dbg(common, ATH_DBG_RESET,
1021                                 "Possible RX hang, resetting");
1022                         spin_lock_bh(&sc->sc_pcu_lock);
1023                         ath_reset(sc, true);
1024                         spin_unlock_bh(&sc->sc_pcu_lock);
1025                         count = 0;
1026                 }
1027         } else
1028                 count = 0;
1029 }
1030
1031 void ath_hw_pll_work(struct work_struct *work)
1032 {
1033         struct ath_softc *sc = container_of(work, struct ath_softc,
1034                                             hw_pll_work.work);
1035         u32 pll_sqsum;
1036
1037         if (AR_SREV_9485(sc->sc_ah)) {
1038
1039                 ath9k_ps_wakeup(sc);
1040                 pll_sqsum = ar9003_get_pll_sqsum_dvc(sc->sc_ah);
1041                 ath9k_ps_restore(sc);
1042
1043                 ath_hw_pll_rx_hang_check(sc, pll_sqsum);
1044
1045                 ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work, HZ/5);
1046         }
1047 }
1048
1049 /**********************/
1050 /* mac80211 callbacks */
1051 /**********************/
1052
1053 static int ath9k_start(struct ieee80211_hw *hw)
1054 {
1055         struct ath_softc *sc = hw->priv;
1056         struct ath_hw *ah = sc->sc_ah;
1057         struct ath_common *common = ath9k_hw_common(ah);
1058         struct ieee80211_channel *curchan = hw->conf.channel;
1059         struct ath9k_channel *init_channel;
1060         int r;
1061
1062         ath_dbg(common, ATH_DBG_CONFIG,
1063                 "Starting driver with initial channel: %d MHz\n",
1064                 curchan->center_freq);
1065
1066         ath9k_ps_wakeup(sc);
1067
1068         mutex_lock(&sc->mutex);
1069
1070         /* setup initial channel */
1071         sc->chan_idx = curchan->hw_value;
1072
1073         init_channel = ath9k_cmn_get_curchannel(hw, ah);
1074
1075         /* Reset SERDES registers */
1076         ath9k_hw_configpcipowersave(ah, false);
1077
1078         /*
1079          * The basic interface to setting the hardware in a good
1080          * state is ``reset''.  On return the hardware is known to
1081          * be powered up and with interrupts disabled.  This must
1082          * be followed by initialization of the appropriate bits
1083          * and then setup of the interrupt mask.
1084          */
1085         spin_lock_bh(&sc->sc_pcu_lock);
1086         r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
1087         if (r) {
1088                 ath_err(common,
1089                         "Unable to reset hardware; reset status %d (freq %u MHz)\n",
1090                         r, curchan->center_freq);
1091                 spin_unlock_bh(&sc->sc_pcu_lock);
1092                 goto mutex_unlock;
1093         }
1094
1095         /*
1096          * This is needed only to setup initial state
1097          * but it's best done after a reset.
1098          */
1099         ath9k_cmn_update_txpow(ah, sc->curtxpow,
1100                         sc->config.txpowlimit, &sc->curtxpow);
1101
1102         /*
1103          * Setup the hardware after reset:
1104          * The receive engine is set going.
1105          * Frame transmit is handled entirely
1106          * in the frame output path; there's nothing to do
1107          * here except setup the interrupt mask.
1108          */
1109         if (ath_startrecv(sc) != 0) {
1110                 ath_err(common, "Unable to start recv logic\n");
1111                 r = -EIO;
1112                 spin_unlock_bh(&sc->sc_pcu_lock);
1113                 goto mutex_unlock;
1114         }
1115         spin_unlock_bh(&sc->sc_pcu_lock);
1116
1117         /* Setup our intr mask. */
1118         ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
1119                     ATH9K_INT_RXORN | ATH9K_INT_FATAL |
1120                     ATH9K_INT_GLOBAL;
1121
1122         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
1123                 ah->imask |= ATH9K_INT_RXHP |
1124                              ATH9K_INT_RXLP |
1125                              ATH9K_INT_BB_WATCHDOG;
1126         else
1127                 ah->imask |= ATH9K_INT_RX;
1128
1129         ah->imask |= ATH9K_INT_GTT;
1130
1131         if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
1132                 ah->imask |= ATH9K_INT_CST;
1133
1134         sc->sc_flags &= ~SC_OP_INVALID;
1135         sc->sc_ah->is_monitoring = false;
1136
1137         /* Disable BMISS interrupt when we're not associated */
1138         ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
1139         ath9k_hw_set_interrupts(ah, ah->imask);
1140         ath9k_hw_enable_interrupts(ah);
1141
1142         ieee80211_wake_queues(hw);
1143
1144         ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
1145
1146         if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
1147             !ah->btcoex_hw.enabled) {
1148                 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
1149                                            AR_STOMP_LOW_WLAN_WGHT);
1150                 ath9k_hw_btcoex_enable(ah);
1151
1152                 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1153                         ath9k_btcoex_timer_resume(sc);
1154         }
1155
1156         if (ah->caps.pcie_lcr_extsync_en && common->bus_ops->extn_synch_en)
1157                 common->bus_ops->extn_synch_en(common);
1158
1159 mutex_unlock:
1160         mutex_unlock(&sc->mutex);
1161
1162         ath9k_ps_restore(sc);
1163
1164         return r;
1165 }
1166
1167 static void ath9k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
1168 {
1169         struct ath_softc *sc = hw->priv;
1170         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1171         struct ath_tx_control txctl;
1172         struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1173
1174         if (sc->ps_enabled) {
1175                 /*
1176                  * mac80211 does not set PM field for normal data frames, so we
1177                  * need to update that based on the current PS mode.
1178                  */
1179                 if (ieee80211_is_data(hdr->frame_control) &&
1180                     !ieee80211_is_nullfunc(hdr->frame_control) &&
1181                     !ieee80211_has_pm(hdr->frame_control)) {
1182                         ath_dbg(common, ATH_DBG_PS,
1183                                 "Add PM=1 for a TX frame while in PS mode\n");
1184                         hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1185                 }
1186         }
1187
1188         if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
1189                 /*
1190                  * We are using PS-Poll and mac80211 can request TX while in
1191                  * power save mode. Need to wake up hardware for the TX to be
1192                  * completed and if needed, also for RX of buffered frames.
1193                  */
1194                 ath9k_ps_wakeup(sc);
1195                 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
1196                         ath9k_hw_setrxabort(sc->sc_ah, 0);
1197                 if (ieee80211_is_pspoll(hdr->frame_control)) {
1198                         ath_dbg(common, ATH_DBG_PS,
1199                                 "Sending PS-Poll to pick a buffered frame\n");
1200                         sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
1201                 } else {
1202                         ath_dbg(common, ATH_DBG_PS,
1203                                 "Wake up to complete TX\n");
1204                         sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
1205                 }
1206                 /*
1207                  * The actual restore operation will happen only after
1208                  * the sc_flags bit is cleared. We are just dropping
1209                  * the ps_usecount here.
1210                  */
1211                 ath9k_ps_restore(sc);
1212         }
1213
1214         memset(&txctl, 0, sizeof(struct ath_tx_control));
1215         txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
1216
1217         ath_dbg(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
1218
1219         if (ath_tx_start(hw, skb, &txctl) != 0) {
1220                 ath_dbg(common, ATH_DBG_XMIT, "TX failed\n");
1221                 goto exit;
1222         }
1223
1224         return;
1225 exit:
1226         dev_kfree_skb_any(skb);
1227 }
1228
1229 static void ath9k_stop(struct ieee80211_hw *hw)
1230 {
1231         struct ath_softc *sc = hw->priv;
1232         struct ath_hw *ah = sc->sc_ah;
1233         struct ath_common *common = ath9k_hw_common(ah);
1234
1235         mutex_lock(&sc->mutex);
1236
1237         cancel_delayed_work_sync(&sc->tx_complete_work);
1238         cancel_delayed_work_sync(&sc->hw_pll_work);
1239         cancel_work_sync(&sc->paprd_work);
1240         cancel_work_sync(&sc->hw_check_work);
1241         cancel_work_sync(&sc->hw_reset_work);
1242
1243         if (sc->sc_flags & SC_OP_INVALID) {
1244                 ath_dbg(common, ATH_DBG_ANY, "Device not present\n");
1245                 mutex_unlock(&sc->mutex);
1246                 return;
1247         }
1248
1249         /* Ensure HW is awake when we try to shut it down. */
1250         ath9k_ps_wakeup(sc);
1251
1252         if (ah->btcoex_hw.enabled) {
1253                 ath9k_hw_btcoex_disable(ah);
1254                 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1255                         ath9k_btcoex_timer_pause(sc);
1256         }
1257
1258         spin_lock_bh(&sc->sc_pcu_lock);
1259
1260         /* prevent tasklets to enable interrupts once we disable them */
1261         ah->imask &= ~ATH9K_INT_GLOBAL;
1262
1263         /* make sure h/w will not generate any interrupt
1264          * before setting the invalid flag. */
1265         ath9k_hw_disable_interrupts(ah);
1266
1267         if (!(sc->sc_flags & SC_OP_INVALID)) {
1268                 ath_drain_all_txq(sc, false);
1269                 ath_stoprecv(sc);
1270                 ath9k_hw_phy_disable(ah);
1271         } else
1272                 sc->rx.rxlink = NULL;
1273
1274         if (sc->rx.frag) {
1275                 dev_kfree_skb_any(sc->rx.frag);
1276                 sc->rx.frag = NULL;
1277         }
1278
1279         /* disable HAL and put h/w to sleep */
1280         ath9k_hw_disable(ah);
1281
1282         spin_unlock_bh(&sc->sc_pcu_lock);
1283
1284         /* we can now sync irq and kill any running tasklets, since we already
1285          * disabled interrupts and not holding a spin lock */
1286         synchronize_irq(sc->irq);
1287         tasklet_kill(&sc->intr_tq);
1288         tasklet_kill(&sc->bcon_tasklet);
1289
1290         ath9k_ps_restore(sc);
1291
1292         sc->ps_idle = true;
1293         ath_radio_disable(sc, hw);
1294
1295         sc->sc_flags |= SC_OP_INVALID;
1296
1297         mutex_unlock(&sc->mutex);
1298
1299         ath_dbg(common, ATH_DBG_CONFIG, "Driver halt\n");
1300 }
1301
1302 bool ath9k_uses_beacons(int type)
1303 {
1304         switch (type) {
1305         case NL80211_IFTYPE_AP:
1306         case NL80211_IFTYPE_ADHOC:
1307         case NL80211_IFTYPE_MESH_POINT:
1308                 return true;
1309         default:
1310                 return false;
1311         }
1312 }
1313
1314 static void ath9k_reclaim_beacon(struct ath_softc *sc,
1315                                  struct ieee80211_vif *vif)
1316 {
1317         struct ath_vif *avp = (void *)vif->drv_priv;
1318
1319         ath9k_set_beaconing_status(sc, false);
1320         ath_beacon_return(sc, avp);
1321         ath9k_set_beaconing_status(sc, true);
1322         sc->sc_flags &= ~SC_OP_BEACONS;
1323 }
1324
1325 static void ath9k_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
1326 {
1327         struct ath9k_vif_iter_data *iter_data = data;
1328         int i;
1329
1330         if (iter_data->hw_macaddr)
1331                 for (i = 0; i < ETH_ALEN; i++)
1332                         iter_data->mask[i] &=
1333                                 ~(iter_data->hw_macaddr[i] ^ mac[i]);
1334
1335         switch (vif->type) {
1336         case NL80211_IFTYPE_AP:
1337                 iter_data->naps++;
1338                 break;
1339         case NL80211_IFTYPE_STATION:
1340                 iter_data->nstations++;
1341                 break;
1342         case NL80211_IFTYPE_ADHOC:
1343                 iter_data->nadhocs++;
1344                 break;
1345         case NL80211_IFTYPE_MESH_POINT:
1346                 iter_data->nmeshes++;
1347                 break;
1348         case NL80211_IFTYPE_WDS:
1349                 iter_data->nwds++;
1350                 break;
1351         default:
1352                 iter_data->nothers++;
1353                 break;
1354         }
1355 }
1356
1357 /* Called with sc->mutex held. */
1358 void ath9k_calculate_iter_data(struct ieee80211_hw *hw,
1359                                struct ieee80211_vif *vif,
1360                                struct ath9k_vif_iter_data *iter_data)
1361 {
1362         struct ath_softc *sc = hw->priv;
1363         struct ath_hw *ah = sc->sc_ah;
1364         struct ath_common *common = ath9k_hw_common(ah);
1365
1366         /*
1367          * Use the hardware MAC address as reference, the hardware uses it
1368          * together with the BSSID mask when matching addresses.
1369          */
1370         memset(iter_data, 0, sizeof(*iter_data));
1371         iter_data->hw_macaddr = common->macaddr;
1372         memset(&iter_data->mask, 0xff, ETH_ALEN);
1373
1374         if (vif)
1375                 ath9k_vif_iter(iter_data, vif->addr, vif);
1376
1377         /* Get list of all active MAC addresses */
1378         ieee80211_iterate_active_interfaces_atomic(sc->hw, ath9k_vif_iter,
1379                                                    iter_data);
1380 }
1381
1382 /* Called with sc->mutex held. */
1383 static void ath9k_calculate_summary_state(struct ieee80211_hw *hw,
1384                                           struct ieee80211_vif *vif)
1385 {
1386         struct ath_softc *sc = hw->priv;
1387         struct ath_hw *ah = sc->sc_ah;
1388         struct ath_common *common = ath9k_hw_common(ah);
1389         struct ath9k_vif_iter_data iter_data;
1390
1391         ath9k_calculate_iter_data(hw, vif, &iter_data);
1392
1393         /* Set BSSID mask. */
1394         memcpy(common->bssidmask, iter_data.mask, ETH_ALEN);
1395         ath_hw_setbssidmask(common);
1396
1397         /* Set op-mode & TSF */
1398         if (iter_data.naps > 0) {
1399                 ath9k_hw_set_tsfadjust(ah, 1);
1400                 sc->sc_flags |= SC_OP_TSF_RESET;
1401                 ah->opmode = NL80211_IFTYPE_AP;
1402         } else {
1403                 ath9k_hw_set_tsfadjust(ah, 0);
1404                 sc->sc_flags &= ~SC_OP_TSF_RESET;
1405
1406                 if (iter_data.nmeshes)
1407                         ah->opmode = NL80211_IFTYPE_MESH_POINT;
1408                 else if (iter_data.nwds)
1409                         ah->opmode = NL80211_IFTYPE_AP;
1410                 else if (iter_data.nadhocs)
1411                         ah->opmode = NL80211_IFTYPE_ADHOC;
1412                 else
1413                         ah->opmode = NL80211_IFTYPE_STATION;
1414         }
1415
1416         /*
1417          * Enable MIB interrupts when there are hardware phy counters.
1418          */
1419         if ((iter_data.nstations + iter_data.nadhocs + iter_data.nmeshes) > 0) {
1420                 if (ah->config.enable_ani)
1421                         ah->imask |= ATH9K_INT_MIB;
1422                 ah->imask |= ATH9K_INT_TSFOOR;
1423         } else {
1424                 ah->imask &= ~ATH9K_INT_MIB;
1425                 ah->imask &= ~ATH9K_INT_TSFOOR;
1426         }
1427
1428         ath9k_hw_set_interrupts(ah, ah->imask);
1429
1430         /* Set up ANI */
1431         if (iter_data.naps > 0) {
1432                 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
1433
1434                 if (!common->disable_ani) {
1435                         sc->sc_flags |= SC_OP_ANI_RUN;
1436                         ath_start_ani(common);
1437                 }
1438
1439         } else {
1440                 sc->sc_flags &= ~SC_OP_ANI_RUN;
1441                 del_timer_sync(&common->ani.timer);
1442         }
1443 }
1444
1445 /* Called with sc->mutex held, vif counts set up properly. */
1446 static void ath9k_do_vif_add_setup(struct ieee80211_hw *hw,
1447                                    struct ieee80211_vif *vif)
1448 {
1449         struct ath_softc *sc = hw->priv;
1450
1451         ath9k_calculate_summary_state(hw, vif);
1452
1453         if (ath9k_uses_beacons(vif->type)) {
1454                 int error;
1455                 /* This may fail because upper levels do not have beacons
1456                  * properly configured yet.  That's OK, we assume it
1457                  * will be properly configured and then we will be notified
1458                  * in the info_changed method and set up beacons properly
1459                  * there.
1460                  */
1461                 ath9k_set_beaconing_status(sc, false);
1462                 error = ath_beacon_alloc(sc, vif);
1463                 if (!error)
1464                         ath_beacon_config(sc, vif);
1465                 ath9k_set_beaconing_status(sc, true);
1466         }
1467 }
1468
1469
1470 static int ath9k_add_interface(struct ieee80211_hw *hw,
1471                                struct ieee80211_vif *vif)
1472 {
1473         struct ath_softc *sc = hw->priv;
1474         struct ath_hw *ah = sc->sc_ah;
1475         struct ath_common *common = ath9k_hw_common(ah);
1476         int ret = 0;
1477
1478         ath9k_ps_wakeup(sc);
1479         mutex_lock(&sc->mutex);
1480
1481         switch (vif->type) {
1482         case NL80211_IFTYPE_STATION:
1483         case NL80211_IFTYPE_WDS:
1484         case NL80211_IFTYPE_ADHOC:
1485         case NL80211_IFTYPE_AP:
1486         case NL80211_IFTYPE_MESH_POINT:
1487                 break;
1488         default:
1489                 ath_err(common, "Interface type %d not yet supported\n",
1490                         vif->type);
1491                 ret = -EOPNOTSUPP;
1492                 goto out;
1493         }
1494
1495         if (ath9k_uses_beacons(vif->type)) {
1496                 if (sc->nbcnvifs >= ATH_BCBUF) {
1497                         ath_err(common, "Not enough beacon buffers when adding"
1498                                 " new interface of type: %i\n",
1499                                 vif->type);
1500                         ret = -ENOBUFS;
1501                         goto out;
1502                 }
1503         }
1504
1505         if ((ah->opmode == NL80211_IFTYPE_ADHOC) ||
1506             ((vif->type == NL80211_IFTYPE_ADHOC) &&
1507              sc->nvifs > 0)) {
1508                 ath_err(common, "Cannot create ADHOC interface when other"
1509                         " interfaces already exist.\n");
1510                 ret = -EINVAL;
1511                 goto out;
1512         }
1513
1514         ath_dbg(common, ATH_DBG_CONFIG,
1515                 "Attach a VIF of type: %d\n", vif->type);
1516
1517         sc->nvifs++;
1518
1519         ath9k_do_vif_add_setup(hw, vif);
1520 out:
1521         mutex_unlock(&sc->mutex);
1522         ath9k_ps_restore(sc);
1523         return ret;
1524 }
1525
1526 static int ath9k_change_interface(struct ieee80211_hw *hw,
1527                                   struct ieee80211_vif *vif,
1528                                   enum nl80211_iftype new_type,
1529                                   bool p2p)
1530 {
1531         struct ath_softc *sc = hw->priv;
1532         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1533         int ret = 0;
1534
1535         ath_dbg(common, ATH_DBG_CONFIG, "Change Interface\n");
1536         mutex_lock(&sc->mutex);
1537         ath9k_ps_wakeup(sc);
1538
1539         /* See if new interface type is valid. */
1540         if ((new_type == NL80211_IFTYPE_ADHOC) &&
1541             (sc->nvifs > 1)) {
1542                 ath_err(common, "When using ADHOC, it must be the only"
1543                         " interface.\n");
1544                 ret = -EINVAL;
1545                 goto out;
1546         }
1547
1548         if (ath9k_uses_beacons(new_type) &&
1549             !ath9k_uses_beacons(vif->type)) {
1550                 if (sc->nbcnvifs >= ATH_BCBUF) {
1551                         ath_err(common, "No beacon slot available\n");
1552                         ret = -ENOBUFS;
1553                         goto out;
1554                 }
1555         }
1556
1557         /* Clean up old vif stuff */
1558         if (ath9k_uses_beacons(vif->type))
1559                 ath9k_reclaim_beacon(sc, vif);
1560
1561         /* Add new settings */
1562         vif->type = new_type;
1563         vif->p2p = p2p;
1564
1565         ath9k_do_vif_add_setup(hw, vif);
1566 out:
1567         ath9k_ps_restore(sc);
1568         mutex_unlock(&sc->mutex);
1569         return ret;
1570 }
1571
1572 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1573                                    struct ieee80211_vif *vif)
1574 {
1575         struct ath_softc *sc = hw->priv;
1576         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1577
1578         ath_dbg(common, ATH_DBG_CONFIG, "Detach Interface\n");
1579
1580         ath9k_ps_wakeup(sc);
1581         mutex_lock(&sc->mutex);
1582
1583         sc->nvifs--;
1584
1585         /* Reclaim beacon resources */
1586         if (ath9k_uses_beacons(vif->type))
1587                 ath9k_reclaim_beacon(sc, vif);
1588
1589         ath9k_calculate_summary_state(hw, NULL);
1590
1591         mutex_unlock(&sc->mutex);
1592         ath9k_ps_restore(sc);
1593 }
1594
1595 static void ath9k_enable_ps(struct ath_softc *sc)
1596 {
1597         struct ath_hw *ah = sc->sc_ah;
1598
1599         sc->ps_enabled = true;
1600         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1601                 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1602                         ah->imask |= ATH9K_INT_TIM_TIMER;
1603                         ath9k_hw_set_interrupts(ah, ah->imask);
1604                 }
1605                 ath9k_hw_setrxabort(ah, 1);
1606         }
1607 }
1608
1609 static void ath9k_disable_ps(struct ath_softc *sc)
1610 {
1611         struct ath_hw *ah = sc->sc_ah;
1612
1613         sc->ps_enabled = false;
1614         ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
1615         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1616                 ath9k_hw_setrxabort(ah, 0);
1617                 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1618                                   PS_WAIT_FOR_CAB |
1619                                   PS_WAIT_FOR_PSPOLL_DATA |
1620                                   PS_WAIT_FOR_TX_ACK);
1621                 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1622                         ah->imask &= ~ATH9K_INT_TIM_TIMER;
1623                         ath9k_hw_set_interrupts(ah, ah->imask);
1624                 }
1625         }
1626
1627 }
1628
1629 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1630 {
1631         struct ath_softc *sc = hw->priv;
1632         struct ath_hw *ah = sc->sc_ah;
1633         struct ath_common *common = ath9k_hw_common(ah);
1634         struct ieee80211_conf *conf = &hw->conf;
1635         bool disable_radio = false;
1636
1637         mutex_lock(&sc->mutex);
1638
1639         /*
1640          * Leave this as the first check because we need to turn on the
1641          * radio if it was disabled before prior to processing the rest
1642          * of the changes. Likewise we must only disable the radio towards
1643          * the end.
1644          */
1645         if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1646                 sc->ps_idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1647                 if (!sc->ps_idle) {
1648                         ath_radio_enable(sc, hw);
1649                         ath_dbg(common, ATH_DBG_CONFIG,
1650                                 "not-idle: enabling radio\n");
1651                 } else {
1652                         disable_radio = true;
1653                 }
1654         }
1655
1656         /*
1657          * We just prepare to enable PS. We have to wait until our AP has
1658          * ACK'd our null data frame to disable RX otherwise we'll ignore
1659          * those ACKs and end up retransmitting the same null data frames.
1660          * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1661          */
1662         if (changed & IEEE80211_CONF_CHANGE_PS) {
1663                 unsigned long flags;
1664                 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1665                 if (conf->flags & IEEE80211_CONF_PS)
1666                         ath9k_enable_ps(sc);
1667                 else
1668                         ath9k_disable_ps(sc);
1669                 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1670         }
1671
1672         if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1673                 if (conf->flags & IEEE80211_CONF_MONITOR) {
1674                         ath_dbg(common, ATH_DBG_CONFIG,
1675                                 "Monitor mode is enabled\n");
1676                         sc->sc_ah->is_monitoring = true;
1677                 } else {
1678                         ath_dbg(common, ATH_DBG_CONFIG,
1679                                 "Monitor mode is disabled\n");
1680                         sc->sc_ah->is_monitoring = false;
1681                 }
1682         }
1683
1684         if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
1685                 struct ieee80211_channel *curchan = hw->conf.channel;
1686                 struct ath9k_channel old_chan;
1687                 int pos = curchan->hw_value;
1688                 int old_pos = -1;
1689                 unsigned long flags;
1690
1691                 if (ah->curchan)
1692                         old_pos = ah->curchan - &ah->channels[0];
1693
1694                 if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
1695                         sc->sc_flags |= SC_OP_OFFCHANNEL;
1696                 else
1697                         sc->sc_flags &= ~SC_OP_OFFCHANNEL;
1698
1699                 ath_dbg(common, ATH_DBG_CONFIG,
1700                         "Set channel: %d MHz type: %d\n",
1701                         curchan->center_freq, conf->channel_type);
1702
1703                 /* update survey stats for the old channel before switching */
1704                 spin_lock_irqsave(&common->cc_lock, flags);
1705                 ath_update_survey_stats(sc);
1706                 spin_unlock_irqrestore(&common->cc_lock, flags);
1707
1708                 /*
1709                  * Preserve the current channel values, before updating
1710                  * the same channel
1711                  */
1712                 if (old_pos == pos) {
1713                         memcpy(&old_chan, &sc->sc_ah->channels[pos],
1714                                 sizeof(struct ath9k_channel));
1715                         ah->curchan = &old_chan;
1716                 }
1717
1718                 ath9k_cmn_update_ichannel(&sc->sc_ah->channels[pos],
1719                                           curchan, conf->channel_type);
1720
1721                 /*
1722                  * If the operating channel changes, change the survey in-use flags
1723                  * along with it.
1724                  * Reset the survey data for the new channel, unless we're switching
1725                  * back to the operating channel from an off-channel operation.
1726                  */
1727                 if (!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) &&
1728                     sc->cur_survey != &sc->survey[pos]) {
1729
1730                         if (sc->cur_survey)
1731                                 sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE;
1732
1733                         sc->cur_survey = &sc->survey[pos];
1734
1735                         memset(sc->cur_survey, 0, sizeof(struct survey_info));
1736                         sc->cur_survey->filled |= SURVEY_INFO_IN_USE;
1737                 } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) {
1738                         memset(&sc->survey[pos], 0, sizeof(struct survey_info));
1739                 }
1740
1741                 if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
1742                         ath_err(common, "Unable to set channel\n");
1743                         mutex_unlock(&sc->mutex);
1744                         return -EINVAL;
1745                 }
1746
1747                 /*
1748                  * The most recent snapshot of channel->noisefloor for the old
1749                  * channel is only available after the hardware reset. Copy it to
1750                  * the survey stats now.
1751                  */
1752                 if (old_pos >= 0)
1753                         ath_update_survey_nf(sc, old_pos);
1754         }
1755
1756         if (changed & IEEE80211_CONF_CHANGE_POWER) {
1757                 ath_dbg(common, ATH_DBG_CONFIG,
1758                         "Set power: %d\n", conf->power_level);
1759                 sc->config.txpowlimit = 2 * conf->power_level;
1760                 ath9k_ps_wakeup(sc);
1761                 ath9k_cmn_update_txpow(ah, sc->curtxpow,
1762                                        sc->config.txpowlimit, &sc->curtxpow);
1763                 ath9k_ps_restore(sc);
1764         }
1765
1766         if (disable_radio) {
1767                 ath_dbg(common, ATH_DBG_CONFIG, "idle: disabling radio\n");
1768                 ath_radio_disable(sc, hw);
1769         }
1770
1771         mutex_unlock(&sc->mutex);
1772
1773         return 0;
1774 }
1775
1776 #define SUPPORTED_FILTERS                       \
1777         (FIF_PROMISC_IN_BSS |                   \
1778         FIF_ALLMULTI |                          \
1779         FIF_CONTROL |                           \
1780         FIF_PSPOLL |                            \
1781         FIF_OTHER_BSS |                         \
1782         FIF_BCN_PRBRESP_PROMISC |               \
1783         FIF_PROBE_REQ |                         \
1784         FIF_FCSFAIL)
1785
1786 /* FIXME: sc->sc_full_reset ? */
1787 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1788                                    unsigned int changed_flags,
1789                                    unsigned int *total_flags,
1790                                    u64 multicast)
1791 {
1792         struct ath_softc *sc = hw->priv;
1793         u32 rfilt;
1794
1795         changed_flags &= SUPPORTED_FILTERS;
1796         *total_flags &= SUPPORTED_FILTERS;
1797
1798         sc->rx.rxfilter = *total_flags;
1799         ath9k_ps_wakeup(sc);
1800         rfilt = ath_calcrxfilter(sc);
1801         ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1802         ath9k_ps_restore(sc);
1803
1804         ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
1805                 "Set HW RX filter: 0x%x\n", rfilt);
1806 }
1807
1808 static int ath9k_sta_add(struct ieee80211_hw *hw,
1809                          struct ieee80211_vif *vif,
1810                          struct ieee80211_sta *sta)
1811 {
1812         struct ath_softc *sc = hw->priv;
1813         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1814         struct ath_node *an = (struct ath_node *) sta->drv_priv;
1815         struct ieee80211_key_conf ps_key = { };
1816
1817         ath_node_attach(sc, sta);
1818
1819         if (vif->type != NL80211_IFTYPE_AP &&
1820             vif->type != NL80211_IFTYPE_AP_VLAN)
1821                 return 0;
1822
1823         an->ps_key = ath_key_config(common, vif, sta, &ps_key);
1824
1825         return 0;
1826 }
1827
1828 static void ath9k_del_ps_key(struct ath_softc *sc,
1829                              struct ieee80211_vif *vif,
1830                              struct ieee80211_sta *sta)
1831 {
1832         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1833         struct ath_node *an = (struct ath_node *) sta->drv_priv;
1834         struct ieee80211_key_conf ps_key = { .hw_key_idx = an->ps_key };
1835
1836         if (!an->ps_key)
1837             return;
1838
1839         ath_key_delete(common, &ps_key);
1840 }
1841
1842 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1843                             struct ieee80211_vif *vif,
1844                             struct ieee80211_sta *sta)
1845 {
1846         struct ath_softc *sc = hw->priv;
1847
1848         ath9k_del_ps_key(sc, vif, sta);
1849         ath_node_detach(sc, sta);
1850
1851         return 0;
1852 }
1853
1854 static void ath9k_sta_notify(struct ieee80211_hw *hw,
1855                          struct ieee80211_vif *vif,
1856                          enum sta_notify_cmd cmd,
1857                          struct ieee80211_sta *sta)
1858 {
1859         struct ath_softc *sc = hw->priv;
1860         struct ath_node *an = (struct ath_node *) sta->drv_priv;
1861
1862         switch (cmd) {
1863         case STA_NOTIFY_SLEEP:
1864                 an->sleeping = true;
1865                 if (ath_tx_aggr_sleep(sc, an))
1866                         ieee80211_sta_set_tim(sta);
1867                 break;
1868         case STA_NOTIFY_AWAKE:
1869                 an->sleeping = false;
1870                 ath_tx_aggr_wakeup(sc, an);
1871                 break;
1872         }
1873 }
1874
1875 static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
1876                          const struct ieee80211_tx_queue_params *params)
1877 {
1878         struct ath_softc *sc = hw->priv;
1879         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1880         struct ath_txq *txq;
1881         struct ath9k_tx_queue_info qi;
1882         int ret = 0;
1883
1884         if (queue >= WME_NUM_AC)
1885                 return 0;
1886
1887         txq = sc->tx.txq_map[queue];
1888
1889         ath9k_ps_wakeup(sc);
1890         mutex_lock(&sc->mutex);
1891
1892         memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1893
1894         qi.tqi_aifs = params->aifs;
1895         qi.tqi_cwmin = params->cw_min;
1896         qi.tqi_cwmax = params->cw_max;
1897         qi.tqi_burstTime = params->txop;
1898
1899         ath_dbg(common, ATH_DBG_CONFIG,
1900                 "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1901                 queue, txq->axq_qnum, params->aifs, params->cw_min,
1902                 params->cw_max, params->txop);
1903
1904         ret = ath_txq_update(sc, txq->axq_qnum, &qi);
1905         if (ret)
1906                 ath_err(common, "TXQ Update failed\n");
1907
1908         if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
1909                 if (queue == WME_AC_BE && !ret)
1910                         ath_beaconq_config(sc);
1911
1912         mutex_unlock(&sc->mutex);
1913         ath9k_ps_restore(sc);
1914
1915         return ret;
1916 }
1917
1918 static int ath9k_set_key(struct ieee80211_hw *hw,
1919                          enum set_key_cmd cmd,
1920                          struct ieee80211_vif *vif,
1921                          struct ieee80211_sta *sta,
1922                          struct ieee80211_key_conf *key)
1923 {
1924         struct ath_softc *sc = hw->priv;
1925         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1926         int ret = 0;
1927
1928         if (ath9k_modparam_nohwcrypt)
1929                 return -ENOSPC;
1930
1931         if (vif->type == NL80211_IFTYPE_ADHOC &&
1932             (key->cipher == WLAN_CIPHER_SUITE_TKIP ||
1933              key->cipher == WLAN_CIPHER_SUITE_CCMP) &&
1934             !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) {
1935                 /*
1936                  * For now, disable hw crypto for the RSN IBSS group keys. This
1937                  * could be optimized in the future to use a modified key cache
1938                  * design to support per-STA RX GTK, but until that gets
1939                  * implemented, use of software crypto for group addressed
1940                  * frames is a acceptable to allow RSN IBSS to be used.
1941                  */
1942                 return -EOPNOTSUPP;
1943         }
1944
1945         mutex_lock(&sc->mutex);
1946         ath9k_ps_wakeup(sc);
1947         ath_dbg(common, ATH_DBG_CONFIG, "Set HW Key\n");
1948
1949         switch (cmd) {
1950         case SET_KEY:
1951                 if (sta)
1952                         ath9k_del_ps_key(sc, vif, sta);
1953
1954                 ret = ath_key_config(common, vif, sta, key);
1955                 if (ret >= 0) {
1956                         key->hw_key_idx = ret;
1957                         /* push IV and Michael MIC generation to stack */
1958                         key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1959                         if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
1960                                 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1961                         if (sc->sc_ah->sw_mgmt_crypto &&
1962                             key->cipher == WLAN_CIPHER_SUITE_CCMP)
1963                                 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
1964                         ret = 0;
1965                 }
1966                 break;
1967         case DISABLE_KEY:
1968                 ath_key_delete(common, key);
1969                 break;
1970         default:
1971                 ret = -EINVAL;
1972         }
1973
1974         ath9k_ps_restore(sc);
1975         mutex_unlock(&sc->mutex);
1976
1977         return ret;
1978 }
1979 static void ath9k_bss_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
1980 {
1981         struct ath_softc *sc = data;
1982         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1983         struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
1984         struct ath_vif *avp = (void *)vif->drv_priv;
1985
1986         /*
1987          * Skip iteration if primary station vif's bss info
1988          * was not changed
1989          */
1990         if (sc->sc_flags & SC_OP_PRIM_STA_VIF)
1991                 return;
1992
1993         if (bss_conf->assoc) {
1994                 sc->sc_flags |= SC_OP_PRIM_STA_VIF;
1995                 avp->primary_sta_vif = true;
1996                 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1997                 common->curaid = bss_conf->aid;
1998                 ath9k_hw_write_associd(sc->sc_ah);
1999                 ath_dbg(common, ATH_DBG_CONFIG,
2000                                 "Bss Info ASSOC %d, bssid: %pM\n",
2001                                 bss_conf->aid, common->curbssid);
2002                 ath_beacon_config(sc, vif);
2003                 /*
2004                  * Request a re-configuration of Beacon related timers
2005                  * on the receipt of the first Beacon frame (i.e.,
2006                  * after time sync with the AP).
2007                  */
2008                 sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON;
2009                 /* Reset rssi stats */
2010                 sc->last_rssi = ATH_RSSI_DUMMY_MARKER;
2011                 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
2012
2013                 if (!common->disable_ani) {
2014                         sc->sc_flags |= SC_OP_ANI_RUN;
2015                         ath_start_ani(common);
2016                 }
2017
2018         }
2019 }
2020
2021 static void ath9k_config_bss(struct ath_softc *sc, struct ieee80211_vif *vif)
2022 {
2023         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2024         struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
2025         struct ath_vif *avp = (void *)vif->drv_priv;
2026
2027         if (sc->sc_ah->opmode != NL80211_IFTYPE_STATION)
2028                 return;
2029
2030         /* Reconfigure bss info */
2031         if (avp->primary_sta_vif && !bss_conf->assoc) {
2032                 ath_dbg(common, ATH_DBG_CONFIG,
2033                         "Bss Info DISASSOC %d, bssid %pM\n",
2034                         common->curaid, common->curbssid);
2035                 sc->sc_flags &= ~(SC_OP_PRIM_STA_VIF | SC_OP_BEACONS);
2036                 avp->primary_sta_vif = false;
2037                 memset(common->curbssid, 0, ETH_ALEN);
2038                 common->curaid = 0;
2039         }
2040
2041         ieee80211_iterate_active_interfaces_atomic(
2042                         sc->hw, ath9k_bss_iter, sc);
2043
2044         /*
2045          * None of station vifs are associated.
2046          * Clear bssid & aid
2047          */
2048         if (!(sc->sc_flags & SC_OP_PRIM_STA_VIF)) {
2049                 ath9k_hw_write_associd(sc->sc_ah);
2050                 /* Stop ANI */
2051                 sc->sc_flags &= ~SC_OP_ANI_RUN;
2052                 del_timer_sync(&common->ani.timer);
2053         }
2054 }
2055
2056 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
2057                                    struct ieee80211_vif *vif,
2058                                    struct ieee80211_bss_conf *bss_conf,
2059                                    u32 changed)
2060 {
2061         struct ath_softc *sc = hw->priv;
2062         struct ath_hw *ah = sc->sc_ah;
2063         struct ath_common *common = ath9k_hw_common(ah);
2064         struct ath_vif *avp = (void *)vif->drv_priv;
2065         int slottime;
2066         int error;
2067
2068         ath9k_ps_wakeup(sc);
2069         mutex_lock(&sc->mutex);
2070
2071         if (changed & BSS_CHANGED_BSSID) {
2072                 ath9k_config_bss(sc, vif);
2073
2074                 ath_dbg(common, ATH_DBG_CONFIG, "BSSID: %pM aid: 0x%x\n",
2075                         common->curbssid, common->curaid);
2076         }
2077
2078         if (changed & BSS_CHANGED_IBSS) {
2079                 /* There can be only one vif available */
2080                 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
2081                 common->curaid = bss_conf->aid;
2082                 ath9k_hw_write_associd(sc->sc_ah);
2083
2084                 if (bss_conf->ibss_joined) {
2085                         sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
2086
2087                         if (!common->disable_ani) {
2088                                 sc->sc_flags |= SC_OP_ANI_RUN;
2089                                 ath_start_ani(common);
2090                         }
2091
2092                 } else {
2093                         sc->sc_flags &= ~SC_OP_ANI_RUN;
2094                         del_timer_sync(&common->ani.timer);
2095                 }
2096         }
2097
2098         /* Enable transmission of beacons (AP, IBSS, MESH) */
2099         if ((changed & BSS_CHANGED_BEACON) ||
2100             ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
2101                 ath9k_set_beaconing_status(sc, false);
2102                 error = ath_beacon_alloc(sc, vif);
2103                 if (!error)
2104                         ath_beacon_config(sc, vif);
2105                 ath9k_set_beaconing_status(sc, true);
2106         }
2107
2108         if (changed & BSS_CHANGED_ERP_SLOT) {
2109                 if (bss_conf->use_short_slot)
2110                         slottime = 9;
2111                 else
2112                         slottime = 20;
2113                 if (vif->type == NL80211_IFTYPE_AP) {
2114                         /*
2115                          * Defer update, so that connected stations can adjust
2116                          * their settings at the same time.
2117                          * See beacon.c for more details
2118                          */
2119                         sc->beacon.slottime = slottime;
2120                         sc->beacon.updateslot = UPDATE;
2121                 } else {
2122                         ah->slottime = slottime;
2123                         ath9k_hw_init_global_settings(ah);
2124                 }
2125         }
2126
2127         /* Disable transmission of beacons */
2128         if ((changed & BSS_CHANGED_BEACON_ENABLED) &&
2129             !bss_conf->enable_beacon) {
2130                 ath9k_set_beaconing_status(sc, false);
2131                 avp->is_bslot_active = false;
2132                 ath9k_set_beaconing_status(sc, true);
2133         }
2134
2135         if (changed & BSS_CHANGED_BEACON_INT) {
2136                 /*
2137                  * In case of AP mode, the HW TSF has to be reset
2138                  * when the beacon interval changes.
2139                  */
2140                 if (vif->type == NL80211_IFTYPE_AP) {
2141                         sc->sc_flags |= SC_OP_TSF_RESET;
2142                         ath9k_set_beaconing_status(sc, false);
2143                         error = ath_beacon_alloc(sc, vif);
2144                         if (!error)
2145                                 ath_beacon_config(sc, vif);
2146                         ath9k_set_beaconing_status(sc, true);
2147                 } else
2148                         ath_beacon_config(sc, vif);
2149         }
2150
2151         if (changed & BSS_CHANGED_ERP_PREAMBLE) {
2152                 ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
2153                         bss_conf->use_short_preamble);
2154                 if (bss_conf->use_short_preamble)
2155                         sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
2156                 else
2157                         sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
2158         }
2159
2160         if (changed & BSS_CHANGED_ERP_CTS_PROT) {
2161                 ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
2162                         bss_conf->use_cts_prot);
2163                 if (bss_conf->use_cts_prot &&
2164                     hw->conf.channel->band != IEEE80211_BAND_5GHZ)
2165                         sc->sc_flags |= SC_OP_PROTECT_ENABLE;
2166                 else
2167                         sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
2168         }
2169
2170         mutex_unlock(&sc->mutex);
2171         ath9k_ps_restore(sc);
2172 }
2173
2174 static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
2175 {
2176         struct ath_softc *sc = hw->priv;
2177         u64 tsf;
2178
2179         mutex_lock(&sc->mutex);
2180         ath9k_ps_wakeup(sc);
2181         tsf = ath9k_hw_gettsf64(sc->sc_ah);
2182         ath9k_ps_restore(sc);
2183         mutex_unlock(&sc->mutex);
2184
2185         return tsf;
2186 }
2187
2188 static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
2189 {
2190         struct ath_softc *sc = hw->priv;
2191
2192         mutex_lock(&sc->mutex);
2193         ath9k_ps_wakeup(sc);
2194         ath9k_hw_settsf64(sc->sc_ah, tsf);
2195         ath9k_ps_restore(sc);
2196         mutex_unlock(&sc->mutex);
2197 }
2198
2199 static void ath9k_reset_tsf(struct ieee80211_hw *hw)
2200 {
2201         struct ath_softc *sc = hw->priv;
2202
2203         mutex_lock(&sc->mutex);
2204
2205         ath9k_ps_wakeup(sc);
2206         ath9k_hw_reset_tsf(sc->sc_ah);
2207         ath9k_ps_restore(sc);
2208
2209         mutex_unlock(&sc->mutex);
2210 }
2211
2212 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
2213                               struct ieee80211_vif *vif,
2214                               enum ieee80211_ampdu_mlme_action action,
2215                               struct ieee80211_sta *sta,
2216                               u16 tid, u16 *ssn, u8 buf_size)
2217 {
2218         struct ath_softc *sc = hw->priv;
2219         int ret = 0;
2220
2221         local_bh_disable();
2222
2223         switch (action) {
2224         case IEEE80211_AMPDU_RX_START:
2225                 if (!(sc->sc_flags & SC_OP_RXAGGR))
2226                         ret = -ENOTSUPP;
2227                 break;
2228         case IEEE80211_AMPDU_RX_STOP:
2229                 break;
2230         case IEEE80211_AMPDU_TX_START:
2231                 if (!(sc->sc_flags & SC_OP_TXAGGR))
2232                         return -EOPNOTSUPP;
2233
2234                 ath9k_ps_wakeup(sc);
2235                 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
2236                 if (!ret)
2237                         ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2238                 ath9k_ps_restore(sc);
2239                 break;
2240         case IEEE80211_AMPDU_TX_STOP:
2241                 ath9k_ps_wakeup(sc);
2242                 ath_tx_aggr_stop(sc, sta, tid);
2243                 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2244                 ath9k_ps_restore(sc);
2245                 break;
2246         case IEEE80211_AMPDU_TX_OPERATIONAL:
2247                 ath9k_ps_wakeup(sc);
2248                 ath_tx_aggr_resume(sc, sta, tid);
2249                 ath9k_ps_restore(sc);
2250                 break;
2251         default:
2252                 ath_err(ath9k_hw_common(sc->sc_ah), "Unknown AMPDU action\n");
2253         }
2254
2255         local_bh_enable();
2256
2257         return ret;
2258 }
2259
2260 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
2261                              struct survey_info *survey)
2262 {
2263         struct ath_softc *sc = hw->priv;
2264         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2265         struct ieee80211_supported_band *sband;
2266         struct ieee80211_channel *chan;
2267         unsigned long flags;
2268         int pos;
2269
2270         spin_lock_irqsave(&common->cc_lock, flags);
2271         if (idx == 0)
2272                 ath_update_survey_stats(sc);
2273
2274         sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
2275         if (sband && idx >= sband->n_channels) {
2276                 idx -= sband->n_channels;
2277                 sband = NULL;
2278         }
2279
2280         if (!sband)
2281                 sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
2282
2283         if (!sband || idx >= sband->n_channels) {
2284                 spin_unlock_irqrestore(&common->cc_lock, flags);
2285                 return -ENOENT;
2286         }
2287
2288         chan = &sband->channels[idx];
2289         pos = chan->hw_value;
2290         memcpy(survey, &sc->survey[pos], sizeof(*survey));
2291         survey->channel = chan;
2292         spin_unlock_irqrestore(&common->cc_lock, flags);
2293
2294         return 0;
2295 }
2296
2297 static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
2298 {
2299         struct ath_softc *sc = hw->priv;
2300         struct ath_hw *ah = sc->sc_ah;
2301
2302         mutex_lock(&sc->mutex);
2303         ah->coverage_class = coverage_class;
2304         ath9k_hw_init_global_settings(ah);
2305         mutex_unlock(&sc->mutex);
2306 }
2307
2308 static void ath9k_flush(struct ieee80211_hw *hw, bool drop)
2309 {
2310         struct ath_softc *sc = hw->priv;
2311         struct ath_hw *ah = sc->sc_ah;
2312         struct ath_common *common = ath9k_hw_common(ah);
2313         int timeout = 200; /* ms */
2314         int i, j;
2315         bool drain_txq;
2316
2317         mutex_lock(&sc->mutex);
2318         cancel_delayed_work_sync(&sc->tx_complete_work);
2319
2320         if (sc->sc_flags & SC_OP_INVALID) {
2321                 ath_dbg(common, ATH_DBG_ANY, "Device not present\n");
2322                 mutex_unlock(&sc->mutex);
2323                 return;
2324         }
2325
2326         if (drop)
2327                 timeout = 1;
2328
2329         for (j = 0; j < timeout; j++) {
2330                 bool npend = false;
2331
2332                 if (j)
2333                         usleep_range(1000, 2000);
2334
2335                 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
2336                         if (!ATH_TXQ_SETUP(sc, i))
2337                                 continue;
2338
2339                         npend = ath9k_has_pending_frames(sc, &sc->tx.txq[i]);
2340
2341                         if (npend)
2342                                 break;
2343                 }
2344
2345                 if (!npend)
2346                     goto out;
2347         }
2348
2349         ath9k_ps_wakeup(sc);
2350         spin_lock_bh(&sc->sc_pcu_lock);
2351         drain_txq = ath_drain_all_txq(sc, false);
2352         if (!drain_txq)
2353                 ath_reset(sc, false);
2354         spin_unlock_bh(&sc->sc_pcu_lock);
2355         ath9k_ps_restore(sc);
2356         ieee80211_wake_queues(hw);
2357
2358 out:
2359         ieee80211_queue_delayed_work(hw, &sc->tx_complete_work, 0);
2360         mutex_unlock(&sc->mutex);
2361 }
2362
2363 static bool ath9k_tx_frames_pending(struct ieee80211_hw *hw)
2364 {
2365         struct ath_softc *sc = hw->priv;
2366         int i;
2367
2368         for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
2369                 if (!ATH_TXQ_SETUP(sc, i))
2370                         continue;
2371
2372                 if (ath9k_has_pending_frames(sc, &sc->tx.txq[i]))
2373                         return true;
2374         }
2375         return false;
2376 }
2377
2378 static int ath9k_tx_last_beacon(struct ieee80211_hw *hw)
2379 {
2380         struct ath_softc *sc = hw->priv;
2381         struct ath_hw *ah = sc->sc_ah;
2382         struct ieee80211_vif *vif;
2383         struct ath_vif *avp;
2384         struct ath_buf *bf;
2385         struct ath_tx_status ts;
2386         int status;
2387
2388         vif = sc->beacon.bslot[0];
2389         if (!vif)
2390                 return 0;
2391
2392         avp = (void *)vif->drv_priv;
2393         if (!avp->is_bslot_active)
2394                 return 0;
2395
2396         if (!sc->beacon.tx_processed) {
2397                 tasklet_disable(&sc->bcon_tasklet);
2398
2399                 bf = avp->av_bcbuf;
2400                 if (!bf || !bf->bf_mpdu)
2401                         goto skip;
2402
2403                 status = ath9k_hw_txprocdesc(ah, bf->bf_desc, &ts);
2404                 if (status == -EINPROGRESS)
2405                         goto skip;
2406
2407                 sc->beacon.tx_processed = true;
2408                 sc->beacon.tx_last = !(ts.ts_status & ATH9K_TXERR_MASK);
2409
2410 skip:
2411                 tasklet_enable(&sc->bcon_tasklet);
2412         }
2413
2414         return sc->beacon.tx_last;
2415 }
2416
2417 static int ath9k_get_stats(struct ieee80211_hw *hw,
2418                            struct ieee80211_low_level_stats *stats)
2419 {
2420         struct ath_softc *sc = hw->priv;
2421         struct ath_hw *ah = sc->sc_ah;
2422         struct ath9k_mib_stats *mib_stats = &ah->ah_mibStats;
2423
2424         stats->dot11ACKFailureCount = mib_stats->ackrcv_bad;
2425         stats->dot11RTSFailureCount = mib_stats->rts_bad;
2426         stats->dot11FCSErrorCount = mib_stats->fcs_bad;
2427         stats->dot11RTSSuccessCount = mib_stats->rts_good;
2428         return 0;
2429 }
2430
2431 struct ieee80211_ops ath9k_ops = {
2432         .tx                 = ath9k_tx,
2433         .start              = ath9k_start,
2434         .stop               = ath9k_stop,
2435         .add_interface      = ath9k_add_interface,
2436         .change_interface   = ath9k_change_interface,
2437         .remove_interface   = ath9k_remove_interface,
2438         .config             = ath9k_config,
2439         .configure_filter   = ath9k_configure_filter,
2440         .sta_add            = ath9k_sta_add,
2441         .sta_remove         = ath9k_sta_remove,
2442         .sta_notify         = ath9k_sta_notify,
2443         .conf_tx            = ath9k_conf_tx,
2444         .bss_info_changed   = ath9k_bss_info_changed,
2445         .set_key            = ath9k_set_key,
2446         .get_tsf            = ath9k_get_tsf,
2447         .set_tsf            = ath9k_set_tsf,
2448         .reset_tsf          = ath9k_reset_tsf,
2449         .ampdu_action       = ath9k_ampdu_action,
2450         .get_survey         = ath9k_get_survey,
2451         .rfkill_poll        = ath9k_rfkill_poll_state,
2452         .set_coverage_class = ath9k_set_coverage_class,
2453         .flush              = ath9k_flush,
2454         .tx_frames_pending  = ath9k_tx_frames_pending,
2455         .tx_last_beacon     = ath9k_tx_last_beacon,
2456         .get_stats          = ath9k_get_stats,
2457 };