2 * Copyright (c) 2008-2009 Atheros Communications Inc.
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 #include <linux/nl80211.h>
21 static void ath_update_txpow(struct ath_softc *sc)
23 struct ath_hw *ah = sc->sc_ah;
25 if (sc->curtxpow != sc->config.txpowlimit) {
26 ath9k_hw_set_txpowerlimit(ah, sc->config.txpowlimit, false);
27 /* read back in case value is clamped */
28 sc->curtxpow = ath9k_hw_regulatory(ah)->power_limit;
32 static u8 parse_mpdudensity(u8 mpdudensity)
35 * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
36 * 0 for no restriction
45 switch (mpdudensity) {
51 /* Our lower layer calculations limit our precision to
67 static struct ath9k_channel *ath_get_curchannel(struct ath_softc *sc,
68 struct ieee80211_hw *hw)
70 struct ieee80211_channel *curchan = hw->conf.channel;
71 struct ath9k_channel *channel;
74 chan_idx = curchan->hw_value;
75 channel = &sc->sc_ah->channels[chan_idx];
76 ath9k_update_ichannel(sc, hw, channel);
80 bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
85 spin_lock_irqsave(&sc->sc_pm_lock, flags);
86 ret = ath9k_hw_setpower(sc->sc_ah, mode);
87 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
92 void ath9k_ps_wakeup(struct ath_softc *sc)
94 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
96 enum ath9k_power_mode power_mode;
98 spin_lock_irqsave(&sc->sc_pm_lock, flags);
99 if (++sc->ps_usecount != 1)
102 power_mode = sc->sc_ah->power_mode;
103 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
106 * While the hardware is asleep, the cycle counters contain no
107 * useful data. Better clear them now so that they don't mess up
108 * survey data results.
110 if (power_mode != ATH9K_PM_AWAKE) {
111 spin_lock(&common->cc_lock);
112 ath_hw_cycle_counters_update(common);
113 memset(&common->cc_survey, 0, sizeof(common->cc_survey));
114 spin_unlock(&common->cc_lock);
118 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
121 void ath9k_ps_restore(struct ath_softc *sc)
123 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
126 spin_lock_irqsave(&sc->sc_pm_lock, flags);
127 if (--sc->ps_usecount != 0)
130 spin_lock(&common->cc_lock);
131 ath_hw_cycle_counters_update(common);
132 spin_unlock(&common->cc_lock);
135 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
136 else if (sc->ps_enabled &&
137 !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
139 PS_WAIT_FOR_PSPOLL_DATA |
140 PS_WAIT_FOR_TX_ACK)))
141 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
144 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
147 static void ath_start_ani(struct ath_common *common)
149 struct ath_hw *ah = common->ah;
150 unsigned long timestamp = jiffies_to_msecs(jiffies);
151 struct ath_softc *sc = (struct ath_softc *) common->priv;
153 if (!(sc->sc_flags & SC_OP_ANI_RUN))
156 if (sc->sc_flags & SC_OP_OFFCHANNEL)
159 common->ani.longcal_timer = timestamp;
160 common->ani.shortcal_timer = timestamp;
161 common->ani.checkani_timer = timestamp;
163 mod_timer(&common->ani.timer,
165 msecs_to_jiffies((u32)ah->config.ani_poll_interval));
168 static void ath_update_survey_nf(struct ath_softc *sc, int channel)
170 struct ath_hw *ah = sc->sc_ah;
171 struct ath9k_channel *chan = &ah->channels[channel];
172 struct survey_info *survey = &sc->survey[channel];
174 if (chan->noisefloor) {
175 survey->filled |= SURVEY_INFO_NOISE_DBM;
176 survey->noise = chan->noisefloor;
180 static void ath_update_survey_stats(struct ath_softc *sc)
182 struct ath_hw *ah = sc->sc_ah;
183 struct ath_common *common = ath9k_hw_common(ah);
184 int pos = ah->curchan - &ah->channels[0];
185 struct survey_info *survey = &sc->survey[pos];
186 struct ath_cycle_counters *cc = &common->cc_survey;
187 unsigned int div = common->clockrate * 1000;
192 if (ah->power_mode == ATH9K_PM_AWAKE)
193 ath_hw_cycle_counters_update(common);
195 if (cc->cycles > 0) {
196 survey->filled |= SURVEY_INFO_CHANNEL_TIME |
197 SURVEY_INFO_CHANNEL_TIME_BUSY |
198 SURVEY_INFO_CHANNEL_TIME_RX |
199 SURVEY_INFO_CHANNEL_TIME_TX;
200 survey->channel_time += cc->cycles / div;
201 survey->channel_time_busy += cc->rx_busy / div;
202 survey->channel_time_rx += cc->rx_frame / div;
203 survey->channel_time_tx += cc->tx_frame / div;
205 memset(cc, 0, sizeof(*cc));
207 ath_update_survey_nf(sc, pos);
211 * Set/change channels. If the channel is really being changed, it's done
212 * by reseting the chip. To accomplish this we must first cleanup any pending
213 * DMA, then restart stuff.
215 int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
216 struct ath9k_channel *hchan)
218 struct ath_wiphy *aphy = hw->priv;
219 struct ath_hw *ah = sc->sc_ah;
220 struct ath_common *common = ath9k_hw_common(ah);
221 struct ieee80211_conf *conf = &common->hw->conf;
222 bool fastcc = true, stopped;
223 struct ieee80211_channel *channel = hw->conf.channel;
224 struct ath9k_hw_cal_data *caldata = NULL;
227 if (sc->sc_flags & SC_OP_INVALID)
230 del_timer_sync(&common->ani.timer);
231 cancel_work_sync(&sc->paprd_work);
232 cancel_work_sync(&sc->hw_check_work);
233 cancel_delayed_work_sync(&sc->tx_complete_work);
237 spin_lock_bh(&sc->sc_pcu_lock);
240 * This is only performed if the channel settings have
243 * To switch channels clear any pending DMA operations;
244 * wait long enough for the RX fifo to drain, reset the
245 * hardware at the new frequency, and then re-enable
246 * the relevant bits of the h/w.
248 ath9k_hw_disable_interrupts(ah);
249 ath_drain_all_txq(sc, false);
251 stopped = ath_stoprecv(sc);
253 /* XXX: do not flush receive queue here. We don't want
254 * to flush data frames already in queue because of
255 * changing channel. */
257 if (!stopped || !(sc->sc_flags & SC_OP_OFFCHANNEL))
260 if (!(sc->sc_flags & SC_OP_OFFCHANNEL))
261 caldata = &aphy->caldata;
263 ath_print(common, ATH_DBG_CONFIG,
264 "(%u MHz) -> (%u MHz), conf_is_ht40: %d fastcc: %d\n",
265 sc->sc_ah->curchan->channel,
266 channel->center_freq, conf_is_ht40(conf),
269 r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
271 ath_print(common, ATH_DBG_FATAL,
272 "Unable to reset channel (%u MHz), "
274 channel->center_freq, r);
278 if (ath_startrecv(sc) != 0) {
279 ath_print(common, ATH_DBG_FATAL,
280 "Unable to restart recv logic\n");
285 ath_update_txpow(sc);
286 ath9k_hw_set_interrupts(ah, ah->imask);
288 if (!(sc->sc_flags & (SC_OP_OFFCHANNEL))) {
289 ath_beacon_config(sc, NULL);
290 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
291 ath_start_ani(common);
295 spin_unlock_bh(&sc->sc_pcu_lock);
297 ath9k_ps_restore(sc);
301 static void ath_paprd_activate(struct ath_softc *sc)
303 struct ath_hw *ah = sc->sc_ah;
304 struct ath9k_hw_cal_data *caldata = ah->caldata;
305 struct ath_common *common = ath9k_hw_common(ah);
308 if (!caldata || !caldata->paprd_done)
312 ar9003_paprd_enable(ah, false);
313 for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
314 if (!(common->tx_chainmask & BIT(chain)))
317 ar9003_paprd_populate_single_table(ah, caldata, chain);
320 ar9003_paprd_enable(ah, true);
321 ath9k_ps_restore(sc);
324 void ath_paprd_calibrate(struct work_struct *work)
326 struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
327 struct ieee80211_hw *hw = sc->hw;
328 struct ath_hw *ah = sc->sc_ah;
329 struct ieee80211_hdr *hdr;
330 struct sk_buff *skb = NULL;
331 struct ieee80211_tx_info *tx_info;
332 int band = hw->conf.channel->band;
333 struct ieee80211_supported_band *sband = &sc->sbands[band];
334 struct ath_tx_control txctl;
335 struct ath9k_hw_cal_data *caldata = ah->caldata;
336 struct ath_common *common = ath9k_hw_common(ah);
347 skb = alloc_skb(len, GFP_KERNEL);
351 tx_info = IEEE80211_SKB_CB(skb);
354 memset(skb->data, 0, len);
355 hdr = (struct ieee80211_hdr *)skb->data;
356 ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
357 hdr->frame_control = cpu_to_le16(ftype);
358 hdr->duration_id = cpu_to_le16(10);
359 memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
360 memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
361 memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
363 memset(&txctl, 0, sizeof(txctl));
364 txctl.txq = sc->tx.txq_map[WME_AC_BE];
367 ar9003_paprd_init_table(ah);
368 for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
369 if (!(common->tx_chainmask & BIT(chain)))
373 memset(tx_info, 0, sizeof(*tx_info));
374 tx_info->band = band;
376 for (i = 0; i < 4; i++) {
377 tx_info->control.rates[i].idx = sband->n_bitrates - 1;
378 tx_info->control.rates[i].count = 6;
381 init_completion(&sc->paprd_complete);
382 sc->paprd_pending = true;
383 ar9003_paprd_setup_gain_table(ah, chain);
384 txctl.paprd = BIT(chain);
385 if (ath_tx_start(hw, skb, &txctl) != 0)
388 time_left = wait_for_completion_timeout(&sc->paprd_complete,
389 msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
390 sc->paprd_pending = false;
392 ath_print(ath9k_hw_common(ah), ATH_DBG_CALIBRATE,
393 "Timeout waiting for paprd training on "
399 if (!ar9003_paprd_is_done(ah))
402 if (ar9003_paprd_create_curve(ah, caldata, chain) != 0)
410 caldata->paprd_done = true;
411 ath_paprd_activate(sc);
415 ath9k_ps_restore(sc);
419 * This routine performs the periodic noise floor calibration function
420 * that is used to adjust and optimize the chip performance. This
421 * takes environmental changes (location, temperature) into account.
422 * When the task is complete, it reschedules itself depending on the
423 * appropriate interval that was calculated.
425 void ath_ani_calibrate(unsigned long data)
427 struct ath_softc *sc = (struct ath_softc *)data;
428 struct ath_hw *ah = sc->sc_ah;
429 struct ath_common *common = ath9k_hw_common(ah);
430 bool longcal = false;
431 bool shortcal = false;
432 bool aniflag = false;
433 unsigned int timestamp = jiffies_to_msecs(jiffies);
434 u32 cal_interval, short_cal_interval, long_cal_interval;
437 if (ah->caldata && ah->caldata->nfcal_interference)
438 long_cal_interval = ATH_LONG_CALINTERVAL_INT;
440 long_cal_interval = ATH_LONG_CALINTERVAL;
442 short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
443 ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
445 /* Only calibrate if awake */
446 if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
451 /* Long calibration runs independently of short calibration. */
452 if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) {
454 ath_print(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
455 common->ani.longcal_timer = timestamp;
458 /* Short calibration applies only while caldone is false */
459 if (!common->ani.caldone) {
460 if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
462 ath_print(common, ATH_DBG_ANI,
463 "shortcal @%lu\n", jiffies);
464 common->ani.shortcal_timer = timestamp;
465 common->ani.resetcal_timer = timestamp;
468 if ((timestamp - common->ani.resetcal_timer) >=
469 ATH_RESTART_CALINTERVAL) {
470 common->ani.caldone = ath9k_hw_reset_calvalid(ah);
471 if (common->ani.caldone)
472 common->ani.resetcal_timer = timestamp;
476 /* Verify whether we must check ANI */
477 if ((timestamp - common->ani.checkani_timer) >=
478 ah->config.ani_poll_interval) {
480 common->ani.checkani_timer = timestamp;
483 /* Skip all processing if there's nothing to do. */
484 if (longcal || shortcal || aniflag) {
485 /* Call ANI routine if necessary */
487 spin_lock_irqsave(&common->cc_lock, flags);
488 ath9k_hw_ani_monitor(ah, ah->curchan);
489 ath_update_survey_stats(sc);
490 spin_unlock_irqrestore(&common->cc_lock, flags);
493 /* Perform calibration if necessary */
494 if (longcal || shortcal) {
495 common->ani.caldone =
496 ath9k_hw_calibrate(ah,
498 common->rx_chainmask,
503 ath9k_ps_restore(sc);
507 * Set timer interval based on previous results.
508 * The interval must be the shortest necessary to satisfy ANI,
509 * short calibration and long calibration.
511 cal_interval = ATH_LONG_CALINTERVAL;
512 if (sc->sc_ah->config.enable_ani)
513 cal_interval = min(cal_interval,
514 (u32)ah->config.ani_poll_interval);
515 if (!common->ani.caldone)
516 cal_interval = min(cal_interval, (u32)short_cal_interval);
518 mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
519 if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->caldata) {
520 if (!ah->caldata->paprd_done)
521 ieee80211_queue_work(sc->hw, &sc->paprd_work);
523 ath_paprd_activate(sc);
528 * Update tx/rx chainmask. For legacy association,
529 * hard code chainmask to 1x1, for 11n association, use
530 * the chainmask configuration, for bt coexistence, use
531 * the chainmask configuration even in legacy mode.
533 void ath_update_chainmask(struct ath_softc *sc, int is_ht)
535 struct ath_hw *ah = sc->sc_ah;
536 struct ath_common *common = ath9k_hw_common(ah);
538 if ((sc->sc_flags & SC_OP_OFFCHANNEL) || is_ht ||
539 (ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE)) {
540 common->tx_chainmask = ah->caps.tx_chainmask;
541 common->rx_chainmask = ah->caps.rx_chainmask;
543 common->tx_chainmask = 1;
544 common->rx_chainmask = 1;
547 ath_print(common, ATH_DBG_CONFIG,
548 "tx chmask: %d, rx chmask: %d\n",
549 common->tx_chainmask,
550 common->rx_chainmask);
553 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
557 an = (struct ath_node *)sta->drv_priv;
559 if (sc->sc_flags & SC_OP_TXAGGR) {
560 ath_tx_node_init(sc, an);
561 an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
562 sta->ht_cap.ampdu_factor);
563 an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
567 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
569 struct ath_node *an = (struct ath_node *)sta->drv_priv;
571 if (sc->sc_flags & SC_OP_TXAGGR)
572 ath_tx_node_cleanup(sc, an);
575 void ath_hw_check(struct work_struct *work)
577 struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
582 for (i = 0; i < 3; i++) {
583 if (ath9k_hw_check_alive(sc->sc_ah))
591 ath9k_ps_restore(sc);
594 void ath9k_tasklet(unsigned long data)
596 struct ath_softc *sc = (struct ath_softc *)data;
597 struct ath_hw *ah = sc->sc_ah;
598 struct ath_common *common = ath9k_hw_common(ah);
600 u32 status = sc->intrstatus;
605 if (status & ATH9K_INT_FATAL) {
607 ath9k_ps_restore(sc);
611 spin_lock_bh(&sc->sc_pcu_lock);
613 if (!ath9k_hw_check_alive(ah))
614 ieee80211_queue_work(sc->hw, &sc->hw_check_work);
616 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
617 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
620 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
622 if (status & rxmask) {
623 /* Check for high priority Rx first */
624 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
625 (status & ATH9K_INT_RXHP))
626 ath_rx_tasklet(sc, 0, true);
628 ath_rx_tasklet(sc, 0, false);
631 if (status & ATH9K_INT_TX) {
632 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
633 ath_tx_edma_tasklet(sc);
638 if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
640 * TSF sync does not look correct; remain awake to sync with
643 ath_print(common, ATH_DBG_PS,
644 "TSFOOR - Sync with next Beacon\n");
645 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
648 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
649 if (status & ATH9K_INT_GENTIMER)
650 ath_gen_timer_isr(sc->sc_ah);
652 /* re-enable hardware interrupt */
653 ath9k_hw_enable_interrupts(ah);
655 spin_unlock_bh(&sc->sc_pcu_lock);
656 ath9k_ps_restore(sc);
659 irqreturn_t ath_isr(int irq, void *dev)
661 #define SCHED_INTR ( \
674 struct ath_softc *sc = dev;
675 struct ath_hw *ah = sc->sc_ah;
676 struct ath_common *common = ath9k_hw_common(ah);
677 enum ath9k_int status;
681 * The hardware is not ready/present, don't
682 * touch anything. Note this can happen early
683 * on if the IRQ is shared.
685 if (sc->sc_flags & SC_OP_INVALID)
689 /* shared irq, not for us */
691 if (!ath9k_hw_intrpend(ah))
695 * Figure out the reason(s) for the interrupt. Note
696 * that the hal returns a pseudo-ISR that may include
697 * bits we haven't explicitly enabled so we mask the
698 * value to insure we only process bits we requested.
700 ath9k_hw_getisr(ah, &status); /* NB: clears ISR too */
701 status &= ah->imask; /* discard unasked-for bits */
704 * If there are no status bits set, then this interrupt was not
705 * for me (should have been caught above).
710 /* Cache the status */
711 sc->intrstatus = status;
713 if (status & SCHED_INTR)
717 * If a FATAL or RXORN interrupt is received, we have to reset the
720 if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
721 !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
724 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
725 (status & ATH9K_INT_BB_WATCHDOG)) {
727 spin_lock(&common->cc_lock);
728 ath_hw_cycle_counters_update(common);
729 ar9003_hw_bb_watchdog_dbg_info(ah);
730 spin_unlock(&common->cc_lock);
735 if (status & ATH9K_INT_SWBA)
736 tasklet_schedule(&sc->bcon_tasklet);
738 if (status & ATH9K_INT_TXURN)
739 ath9k_hw_updatetxtriglevel(ah, true);
741 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
742 if (status & ATH9K_INT_RXEOL) {
743 ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
744 ath9k_hw_set_interrupts(ah, ah->imask);
748 if (status & ATH9K_INT_MIB) {
750 * Disable interrupts until we service the MIB
751 * interrupt; otherwise it will continue to
754 ath9k_hw_disable_interrupts(ah);
756 * Let the hal handle the event. We assume
757 * it will clear whatever condition caused
760 spin_lock(&common->cc_lock);
761 ath9k_hw_proc_mib_event(ah);
762 spin_unlock(&common->cc_lock);
763 ath9k_hw_enable_interrupts(ah);
766 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
767 if (status & ATH9K_INT_TIM_TIMER) {
768 /* Clear RxAbort bit so that we can
770 ath9k_setpower(sc, ATH9K_PM_AWAKE);
771 ath9k_hw_setrxabort(sc->sc_ah, 0);
772 sc->ps_flags |= PS_WAIT_FOR_BEACON;
777 ath_debug_stat_interrupt(sc, status);
780 /* turn off every interrupt */
781 ath9k_hw_disable_interrupts(ah);
782 tasklet_schedule(&sc->intr_tq);
790 static u32 ath_get_extchanmode(struct ath_softc *sc,
791 struct ieee80211_channel *chan,
792 enum nl80211_channel_type channel_type)
796 switch (chan->band) {
797 case IEEE80211_BAND_2GHZ:
798 switch(channel_type) {
799 case NL80211_CHAN_NO_HT:
800 case NL80211_CHAN_HT20:
801 chanmode = CHANNEL_G_HT20;
803 case NL80211_CHAN_HT40PLUS:
804 chanmode = CHANNEL_G_HT40PLUS;
806 case NL80211_CHAN_HT40MINUS:
807 chanmode = CHANNEL_G_HT40MINUS;
811 case IEEE80211_BAND_5GHZ:
812 switch(channel_type) {
813 case NL80211_CHAN_NO_HT:
814 case NL80211_CHAN_HT20:
815 chanmode = CHANNEL_A_HT20;
817 case NL80211_CHAN_HT40PLUS:
818 chanmode = CHANNEL_A_HT40PLUS;
820 case NL80211_CHAN_HT40MINUS:
821 chanmode = CHANNEL_A_HT40MINUS;
832 static void ath9k_bss_assoc_info(struct ath_softc *sc,
833 struct ieee80211_hw *hw,
834 struct ieee80211_vif *vif,
835 struct ieee80211_bss_conf *bss_conf)
837 struct ath_wiphy *aphy = hw->priv;
838 struct ath_hw *ah = sc->sc_ah;
839 struct ath_common *common = ath9k_hw_common(ah);
841 if (bss_conf->assoc) {
842 ath_print(common, ATH_DBG_CONFIG,
843 "Bss Info ASSOC %d, bssid: %pM\n",
844 bss_conf->aid, common->curbssid);
846 /* New association, store aid */
847 common->curaid = bss_conf->aid;
848 ath9k_hw_write_associd(ah);
851 * Request a re-configuration of Beacon related timers
852 * on the receipt of the first Beacon frame (i.e.,
853 * after time sync with the AP).
855 sc->ps_flags |= PS_BEACON_SYNC;
857 /* Configure the beacon */
858 ath_beacon_config(sc, vif);
860 /* Reset rssi stats */
861 aphy->last_rssi = ATH_RSSI_DUMMY_MARKER;
862 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
864 sc->sc_flags |= SC_OP_ANI_RUN;
865 ath_start_ani(common);
867 ath_print(common, ATH_DBG_CONFIG, "Bss Info DISASSOC\n");
870 sc->sc_flags &= ~SC_OP_ANI_RUN;
871 del_timer_sync(&common->ani.timer);
875 void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
877 struct ath_hw *ah = sc->sc_ah;
878 struct ath_common *common = ath9k_hw_common(ah);
879 struct ieee80211_channel *channel = hw->conf.channel;
883 spin_lock_bh(&sc->sc_pcu_lock);
885 ath9k_hw_configpcipowersave(ah, 0, 0);
888 ah->curchan = ath_get_curchannel(sc, sc->hw);
890 r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
892 ath_print(common, ATH_DBG_FATAL,
893 "Unable to reset channel (%u MHz), "
895 channel->center_freq, r);
898 ath_update_txpow(sc);
899 if (ath_startrecv(sc) != 0) {
900 ath_print(common, ATH_DBG_FATAL,
901 "Unable to restart recv logic\n");
902 spin_unlock_bh(&sc->sc_pcu_lock);
905 if (sc->sc_flags & SC_OP_BEACONS)
906 ath_beacon_config(sc, NULL); /* restart beacons */
908 /* Re-Enable interrupts */
909 ath9k_hw_set_interrupts(ah, ah->imask);
912 ath9k_hw_cfg_output(ah, ah->led_pin,
913 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
914 ath9k_hw_set_gpio(ah, ah->led_pin, 0);
916 ieee80211_wake_queues(hw);
917 spin_unlock_bh(&sc->sc_pcu_lock);
919 ath9k_ps_restore(sc);
922 void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
924 struct ath_hw *ah = sc->sc_ah;
925 struct ieee80211_channel *channel = hw->conf.channel;
929 spin_lock_bh(&sc->sc_pcu_lock);
931 ieee80211_stop_queues(hw);
934 * Keep the LED on when the radio is disabled
935 * during idle unassociated state.
938 ath9k_hw_set_gpio(ah, ah->led_pin, 1);
939 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
942 /* Disable interrupts */
943 ath9k_hw_disable_interrupts(ah);
945 ath_drain_all_txq(sc, false); /* clear pending tx frames */
947 ath_stoprecv(sc); /* turn off frame recv */
948 ath_flushrecv(sc); /* flush recv queue */
951 ah->curchan = ath_get_curchannel(sc, hw);
953 r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
955 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
956 "Unable to reset channel (%u MHz), "
958 channel->center_freq, r);
961 ath9k_hw_phy_disable(ah);
963 ath9k_hw_configpcipowersave(ah, 1, 1);
965 spin_unlock_bh(&sc->sc_pcu_lock);
966 ath9k_ps_restore(sc);
968 ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
971 int ath_reset(struct ath_softc *sc, bool retry_tx)
973 struct ath_hw *ah = sc->sc_ah;
974 struct ath_common *common = ath9k_hw_common(ah);
975 struct ieee80211_hw *hw = sc->hw;
979 del_timer_sync(&common->ani.timer);
981 spin_lock_bh(&sc->sc_pcu_lock);
983 ieee80211_stop_queues(hw);
985 ath9k_hw_disable_interrupts(ah);
986 ath_drain_all_txq(sc, retry_tx);
991 r = ath9k_hw_reset(ah, sc->sc_ah->curchan, ah->caldata, false);
993 ath_print(common, ATH_DBG_FATAL,
994 "Unable to reset hardware; reset status %d\n", r);
996 if (ath_startrecv(sc) != 0)
997 ath_print(common, ATH_DBG_FATAL,
998 "Unable to start recv logic\n");
1001 * We may be doing a reset in response to a request
1002 * that changes the channel so update any state that
1003 * might change as a result.
1005 ath_update_txpow(sc);
1007 if ((sc->sc_flags & SC_OP_BEACONS) || !(sc->sc_flags & (SC_OP_OFFCHANNEL)))
1008 ath_beacon_config(sc, NULL); /* restart beacons */
1010 ath9k_hw_set_interrupts(ah, ah->imask);
1014 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
1015 if (ATH_TXQ_SETUP(sc, i)) {
1016 spin_lock_bh(&sc->tx.txq[i].axq_lock);
1017 ath_txq_schedule(sc, &sc->tx.txq[i]);
1018 spin_unlock_bh(&sc->tx.txq[i].axq_lock);
1023 ieee80211_wake_queues(hw);
1024 spin_unlock_bh(&sc->sc_pcu_lock);
1027 ath_start_ani(common);
1032 /* XXX: Remove me once we don't depend on ath9k_channel for all
1033 * this redundant data */
1034 void ath9k_update_ichannel(struct ath_softc *sc, struct ieee80211_hw *hw,
1035 struct ath9k_channel *ichan)
1037 struct ieee80211_channel *chan = hw->conf.channel;
1038 struct ieee80211_conf *conf = &hw->conf;
1040 ichan->channel = chan->center_freq;
1043 if (chan->band == IEEE80211_BAND_2GHZ) {
1044 ichan->chanmode = CHANNEL_G;
1045 ichan->channelFlags = CHANNEL_2GHZ | CHANNEL_OFDM | CHANNEL_G;
1047 ichan->chanmode = CHANNEL_A;
1048 ichan->channelFlags = CHANNEL_5GHZ | CHANNEL_OFDM;
1051 if (conf_is_ht(conf))
1052 ichan->chanmode = ath_get_extchanmode(sc, chan,
1053 conf->channel_type);
1056 /**********************/
1057 /* mac80211 callbacks */
1058 /**********************/
1060 static int ath9k_start(struct ieee80211_hw *hw)
1062 struct ath_wiphy *aphy = hw->priv;
1063 struct ath_softc *sc = aphy->sc;
1064 struct ath_hw *ah = sc->sc_ah;
1065 struct ath_common *common = ath9k_hw_common(ah);
1066 struct ieee80211_channel *curchan = hw->conf.channel;
1067 struct ath9k_channel *init_channel;
1070 ath_print(common, ATH_DBG_CONFIG,
1071 "Starting driver with initial channel: %d MHz\n",
1072 curchan->center_freq);
1074 mutex_lock(&sc->mutex);
1076 if (ath9k_wiphy_started(sc)) {
1077 if (sc->chan_idx == curchan->hw_value) {
1079 * Already on the operational channel, the new wiphy
1080 * can be marked active.
1082 aphy->state = ATH_WIPHY_ACTIVE;
1083 ieee80211_wake_queues(hw);
1086 * Another wiphy is on another channel, start the new
1087 * wiphy in paused state.
1089 aphy->state = ATH_WIPHY_PAUSED;
1090 ieee80211_stop_queues(hw);
1092 mutex_unlock(&sc->mutex);
1095 aphy->state = ATH_WIPHY_ACTIVE;
1097 /* setup initial channel */
1099 sc->chan_idx = curchan->hw_value;
1101 init_channel = ath_get_curchannel(sc, hw);
1103 /* Reset SERDES registers */
1104 ath9k_hw_configpcipowersave(ah, 0, 0);
1107 * The basic interface to setting the hardware in a good
1108 * state is ``reset''. On return the hardware is known to
1109 * be powered up and with interrupts disabled. This must
1110 * be followed by initialization of the appropriate bits
1111 * and then setup of the interrupt mask.
1113 spin_lock_bh(&sc->sc_pcu_lock);
1114 r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
1116 ath_print(common, ATH_DBG_FATAL,
1117 "Unable to reset hardware; reset status %d "
1118 "(freq %u MHz)\n", r,
1119 curchan->center_freq);
1120 spin_unlock_bh(&sc->sc_pcu_lock);
1125 * This is needed only to setup initial state
1126 * but it's best done after a reset.
1128 ath_update_txpow(sc);
1131 * Setup the hardware after reset:
1132 * The receive engine is set going.
1133 * Frame transmit is handled entirely
1134 * in the frame output path; there's nothing to do
1135 * here except setup the interrupt mask.
1137 if (ath_startrecv(sc) != 0) {
1138 ath_print(common, ATH_DBG_FATAL,
1139 "Unable to start recv logic\n");
1141 spin_unlock_bh(&sc->sc_pcu_lock);
1144 spin_unlock_bh(&sc->sc_pcu_lock);
1146 /* Setup our intr mask. */
1147 ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
1148 ATH9K_INT_RXORN | ATH9K_INT_FATAL |
1151 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
1152 ah->imask |= ATH9K_INT_RXHP |
1154 ATH9K_INT_BB_WATCHDOG;
1156 ah->imask |= ATH9K_INT_RX;
1158 ah->imask |= ATH9K_INT_GTT;
1160 if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
1161 ah->imask |= ATH9K_INT_CST;
1163 sc->sc_flags &= ~SC_OP_INVALID;
1164 sc->sc_ah->is_monitoring = false;
1166 /* Disable BMISS interrupt when we're not associated */
1167 ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
1168 ath9k_hw_set_interrupts(ah, ah->imask);
1170 ieee80211_wake_queues(hw);
1172 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
1174 if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
1175 !ah->btcoex_hw.enabled) {
1176 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
1177 AR_STOMP_LOW_WLAN_WGHT);
1178 ath9k_hw_btcoex_enable(ah);
1180 if (common->bus_ops->bt_coex_prep)
1181 common->bus_ops->bt_coex_prep(common);
1182 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1183 ath9k_btcoex_timer_resume(sc);
1186 pm_qos_update_request(&sc->pm_qos_req, 55);
1189 mutex_unlock(&sc->mutex);
1194 static int ath9k_tx(struct ieee80211_hw *hw,
1195 struct sk_buff *skb)
1197 struct ath_wiphy *aphy = hw->priv;
1198 struct ath_softc *sc = aphy->sc;
1199 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1200 struct ath_tx_control txctl;
1201 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1203 if (aphy->state != ATH_WIPHY_ACTIVE && aphy->state != ATH_WIPHY_SCAN) {
1204 ath_print(common, ATH_DBG_XMIT,
1205 "ath9k: %s: TX in unexpected wiphy state "
1206 "%d\n", wiphy_name(hw->wiphy), aphy->state);
1210 if (sc->ps_enabled) {
1212 * mac80211 does not set PM field for normal data frames, so we
1213 * need to update that based on the current PS mode.
1215 if (ieee80211_is_data(hdr->frame_control) &&
1216 !ieee80211_is_nullfunc(hdr->frame_control) &&
1217 !ieee80211_has_pm(hdr->frame_control)) {
1218 ath_print(common, ATH_DBG_PS, "Add PM=1 for a TX frame "
1219 "while in PS mode\n");
1220 hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1224 if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
1226 * We are using PS-Poll and mac80211 can request TX while in
1227 * power save mode. Need to wake up hardware for the TX to be
1228 * completed and if needed, also for RX of buffered frames.
1230 ath9k_ps_wakeup(sc);
1231 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
1232 ath9k_hw_setrxabort(sc->sc_ah, 0);
1233 if (ieee80211_is_pspoll(hdr->frame_control)) {
1234 ath_print(common, ATH_DBG_PS,
1235 "Sending PS-Poll to pick a buffered frame\n");
1236 sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
1238 ath_print(common, ATH_DBG_PS,
1239 "Wake up to complete TX\n");
1240 sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
1243 * The actual restore operation will happen only after
1244 * the sc_flags bit is cleared. We are just dropping
1245 * the ps_usecount here.
1247 ath9k_ps_restore(sc);
1250 memset(&txctl, 0, sizeof(struct ath_tx_control));
1251 txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
1253 ath_print(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
1255 if (ath_tx_start(hw, skb, &txctl) != 0) {
1256 ath_print(common, ATH_DBG_XMIT, "TX failed\n");
1262 dev_kfree_skb_any(skb);
1266 static void ath9k_stop(struct ieee80211_hw *hw)
1268 struct ath_wiphy *aphy = hw->priv;
1269 struct ath_softc *sc = aphy->sc;
1270 struct ath_hw *ah = sc->sc_ah;
1271 struct ath_common *common = ath9k_hw_common(ah);
1274 mutex_lock(&sc->mutex);
1276 aphy->state = ATH_WIPHY_INACTIVE;
1279 cancel_delayed_work_sync(&sc->ath_led_blink_work);
1281 cancel_delayed_work_sync(&sc->tx_complete_work);
1282 cancel_work_sync(&sc->paprd_work);
1283 cancel_work_sync(&sc->hw_check_work);
1285 for (i = 0; i < sc->num_sec_wiphy; i++) {
1286 if (sc->sec_wiphy[i])
1290 if (i == sc->num_sec_wiphy) {
1291 cancel_delayed_work_sync(&sc->wiphy_work);
1292 cancel_work_sync(&sc->chan_work);
1295 if (sc->sc_flags & SC_OP_INVALID) {
1296 ath_print(common, ATH_DBG_ANY, "Device not present\n");
1297 mutex_unlock(&sc->mutex);
1301 if (ath9k_wiphy_started(sc)) {
1302 mutex_unlock(&sc->mutex);
1303 return; /* another wiphy still in use */
1306 /* Ensure HW is awake when we try to shut it down. */
1307 ath9k_ps_wakeup(sc);
1309 if (ah->btcoex_hw.enabled) {
1310 ath9k_hw_btcoex_disable(ah);
1311 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1312 ath9k_btcoex_timer_pause(sc);
1315 spin_lock_bh(&sc->sc_pcu_lock);
1317 /* make sure h/w will not generate any interrupt
1318 * before setting the invalid flag. */
1319 ath9k_hw_disable_interrupts(ah);
1321 if (!(sc->sc_flags & SC_OP_INVALID)) {
1322 ath_drain_all_txq(sc, false);
1324 ath9k_hw_phy_disable(ah);
1326 sc->rx.rxlink = NULL;
1328 /* disable HAL and put h/w to sleep */
1329 ath9k_hw_disable(ah);
1330 ath9k_hw_configpcipowersave(ah, 1, 1);
1332 spin_unlock_bh(&sc->sc_pcu_lock);
1334 ath9k_ps_restore(sc);
1336 /* Finally, put the chip in FULL SLEEP mode */
1337 ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
1339 sc->sc_flags |= SC_OP_INVALID;
1341 pm_qos_update_request(&sc->pm_qos_req, PM_QOS_DEFAULT_VALUE);
1343 mutex_unlock(&sc->mutex);
1345 ath_print(common, ATH_DBG_CONFIG, "Driver halt\n");
1348 static int ath9k_add_interface(struct ieee80211_hw *hw,
1349 struct ieee80211_vif *vif)
1351 struct ath_wiphy *aphy = hw->priv;
1352 struct ath_softc *sc = aphy->sc;
1353 struct ath_hw *ah = sc->sc_ah;
1354 struct ath_common *common = ath9k_hw_common(ah);
1355 struct ath_vif *avp = (void *)vif->drv_priv;
1356 enum nl80211_iftype ic_opmode = NL80211_IFTYPE_UNSPECIFIED;
1359 mutex_lock(&sc->mutex);
1361 switch (vif->type) {
1362 case NL80211_IFTYPE_STATION:
1363 ic_opmode = NL80211_IFTYPE_STATION;
1365 case NL80211_IFTYPE_WDS:
1366 ic_opmode = NL80211_IFTYPE_WDS;
1368 case NL80211_IFTYPE_ADHOC:
1369 case NL80211_IFTYPE_AP:
1370 case NL80211_IFTYPE_MESH_POINT:
1371 if (sc->nbcnvifs >= ATH_BCBUF) {
1375 ic_opmode = vif->type;
1378 ath_print(common, ATH_DBG_FATAL,
1379 "Interface type %d not yet supported\n", vif->type);
1384 ath_print(common, ATH_DBG_CONFIG,
1385 "Attach a VIF of type: %d\n", ic_opmode);
1387 /* Set the VIF opmode */
1388 avp->av_opmode = ic_opmode;
1393 ath9k_set_bssid_mask(hw, vif);
1396 goto out; /* skip global settings for secondary vif */
1398 if (ic_opmode == NL80211_IFTYPE_AP) {
1399 ath9k_hw_set_tsfadjust(ah, 1);
1400 sc->sc_flags |= SC_OP_TSF_RESET;
1403 /* Set the device opmode */
1404 ah->opmode = ic_opmode;
1407 * Enable MIB interrupts when there are hardware phy counters.
1408 * Note we only do this (at the moment) for station mode.
1410 if ((vif->type == NL80211_IFTYPE_STATION) ||
1411 (vif->type == NL80211_IFTYPE_ADHOC) ||
1412 (vif->type == NL80211_IFTYPE_MESH_POINT)) {
1413 if (ah->config.enable_ani)
1414 ah->imask |= ATH9K_INT_MIB;
1415 ah->imask |= ATH9K_INT_TSFOOR;
1418 ath9k_hw_set_interrupts(ah, ah->imask);
1420 if (vif->type == NL80211_IFTYPE_AP ||
1421 vif->type == NL80211_IFTYPE_ADHOC) {
1422 sc->sc_flags |= SC_OP_ANI_RUN;
1423 ath_start_ani(common);
1427 mutex_unlock(&sc->mutex);
1431 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1432 struct ieee80211_vif *vif)
1434 struct ath_wiphy *aphy = hw->priv;
1435 struct ath_softc *sc = aphy->sc;
1436 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1437 struct ath_vif *avp = (void *)vif->drv_priv;
1438 bool bs_valid = false;
1441 ath_print(common, ATH_DBG_CONFIG, "Detach Interface\n");
1443 mutex_lock(&sc->mutex);
1446 sc->sc_flags &= ~SC_OP_ANI_RUN;
1447 del_timer_sync(&common->ani.timer);
1449 /* Reclaim beacon resources */
1450 if ((sc->sc_ah->opmode == NL80211_IFTYPE_AP) ||
1451 (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC) ||
1452 (sc->sc_ah->opmode == NL80211_IFTYPE_MESH_POINT)) {
1453 ath9k_ps_wakeup(sc);
1454 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1455 ath9k_ps_restore(sc);
1458 ath_beacon_return(sc, avp);
1459 sc->sc_flags &= ~SC_OP_BEACONS;
1461 for (i = 0; i < ARRAY_SIZE(sc->beacon.bslot); i++) {
1462 if (sc->beacon.bslot[i] == vif) {
1463 printk(KERN_DEBUG "%s: vif had allocated beacon "
1464 "slot\n", __func__);
1465 sc->beacon.bslot[i] = NULL;
1466 sc->beacon.bslot_aphy[i] = NULL;
1467 } else if (sc->beacon.bslot[i])
1470 if (!bs_valid && (sc->sc_ah->imask & ATH9K_INT_SWBA)) {
1471 /* Disable SWBA interrupt */
1472 sc->sc_ah->imask &= ~ATH9K_INT_SWBA;
1473 ath9k_ps_wakeup(sc);
1474 ath9k_hw_set_interrupts(sc->sc_ah, sc->sc_ah->imask);
1475 ath9k_ps_restore(sc);
1480 mutex_unlock(&sc->mutex);
1483 static void ath9k_enable_ps(struct ath_softc *sc)
1485 struct ath_hw *ah = sc->sc_ah;
1487 sc->ps_enabled = true;
1488 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1489 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1490 ah->imask |= ATH9K_INT_TIM_TIMER;
1491 ath9k_hw_set_interrupts(ah, ah->imask);
1493 ath9k_hw_setrxabort(ah, 1);
1497 static void ath9k_disable_ps(struct ath_softc *sc)
1499 struct ath_hw *ah = sc->sc_ah;
1501 sc->ps_enabled = false;
1502 ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
1503 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1504 ath9k_hw_setrxabort(ah, 0);
1505 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1507 PS_WAIT_FOR_PSPOLL_DATA |
1508 PS_WAIT_FOR_TX_ACK);
1509 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1510 ah->imask &= ~ATH9K_INT_TIM_TIMER;
1511 ath9k_hw_set_interrupts(ah, ah->imask);
1517 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1519 struct ath_wiphy *aphy = hw->priv;
1520 struct ath_softc *sc = aphy->sc;
1521 struct ath_hw *ah = sc->sc_ah;
1522 struct ath_common *common = ath9k_hw_common(ah);
1523 struct ieee80211_conf *conf = &hw->conf;
1526 mutex_lock(&sc->mutex);
1529 * Leave this as the first check because we need to turn on the
1530 * radio if it was disabled before prior to processing the rest
1531 * of the changes. Likewise we must only disable the radio towards
1534 if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1536 bool all_wiphys_idle;
1537 bool idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1539 spin_lock_bh(&sc->wiphy_lock);
1540 all_wiphys_idle = ath9k_all_wiphys_idle(sc);
1541 ath9k_set_wiphy_idle(aphy, idle);
1543 enable_radio = (!idle && all_wiphys_idle);
1546 * After we unlock here its possible another wiphy
1547 * can be re-renabled so to account for that we will
1548 * only disable the radio toward the end of this routine
1549 * if by then all wiphys are still idle.
1551 spin_unlock_bh(&sc->wiphy_lock);
1554 sc->ps_idle = false;
1555 ath_radio_enable(sc, hw);
1556 ath_print(common, ATH_DBG_CONFIG,
1557 "not-idle: enabling radio\n");
1562 * We just prepare to enable PS. We have to wait until our AP has
1563 * ACK'd our null data frame to disable RX otherwise we'll ignore
1564 * those ACKs and end up retransmitting the same null data frames.
1565 * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1567 if (changed & IEEE80211_CONF_CHANGE_PS) {
1568 unsigned long flags;
1569 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1570 if (conf->flags & IEEE80211_CONF_PS)
1571 ath9k_enable_ps(sc);
1573 ath9k_disable_ps(sc);
1574 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1577 if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1578 if (conf->flags & IEEE80211_CONF_MONITOR) {
1579 ath_print(common, ATH_DBG_CONFIG,
1580 "Monitor mode is enabled\n");
1581 sc->sc_ah->is_monitoring = true;
1583 ath_print(common, ATH_DBG_CONFIG,
1584 "Monitor mode is disabled\n");
1585 sc->sc_ah->is_monitoring = false;
1589 if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
1590 struct ieee80211_channel *curchan = hw->conf.channel;
1591 int pos = curchan->hw_value;
1593 unsigned long flags;
1596 old_pos = ah->curchan - &ah->channels[0];
1598 aphy->chan_idx = pos;
1599 aphy->chan_is_ht = conf_is_ht(conf);
1600 if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
1601 sc->sc_flags |= SC_OP_OFFCHANNEL;
1603 sc->sc_flags &= ~SC_OP_OFFCHANNEL;
1605 if (aphy->state == ATH_WIPHY_SCAN ||
1606 aphy->state == ATH_WIPHY_ACTIVE)
1607 ath9k_wiphy_pause_all_forced(sc, aphy);
1610 * Do not change operational channel based on a paused
1613 goto skip_chan_change;
1616 ath_print(common, ATH_DBG_CONFIG, "Set channel: %d MHz\n",
1617 curchan->center_freq);
1619 /* XXX: remove me eventualy */
1620 ath9k_update_ichannel(sc, hw, &sc->sc_ah->channels[pos]);
1622 ath_update_chainmask(sc, conf_is_ht(conf));
1624 /* update survey stats for the old channel before switching */
1625 spin_lock_irqsave(&common->cc_lock, flags);
1626 ath_update_survey_stats(sc);
1627 spin_unlock_irqrestore(&common->cc_lock, flags);
1630 * If the operating channel changes, change the survey in-use flags
1632 * Reset the survey data for the new channel, unless we're switching
1633 * back to the operating channel from an off-channel operation.
1635 if (!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) &&
1636 sc->cur_survey != &sc->survey[pos]) {
1639 sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE;
1641 sc->cur_survey = &sc->survey[pos];
1643 memset(sc->cur_survey, 0, sizeof(struct survey_info));
1644 sc->cur_survey->filled |= SURVEY_INFO_IN_USE;
1645 } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) {
1646 memset(&sc->survey[pos], 0, sizeof(struct survey_info));
1649 if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
1650 ath_print(common, ATH_DBG_FATAL,
1651 "Unable to set channel\n");
1652 mutex_unlock(&sc->mutex);
1657 * The most recent snapshot of channel->noisefloor for the old
1658 * channel is only available after the hardware reset. Copy it to
1659 * the survey stats now.
1662 ath_update_survey_nf(sc, old_pos);
1666 if (changed & IEEE80211_CONF_CHANGE_POWER) {
1667 sc->config.txpowlimit = 2 * conf->power_level;
1668 ath_update_txpow(sc);
1671 spin_lock_bh(&sc->wiphy_lock);
1672 disable_radio = ath9k_all_wiphys_idle(sc);
1673 spin_unlock_bh(&sc->wiphy_lock);
1675 if (disable_radio) {
1676 ath_print(common, ATH_DBG_CONFIG, "idle: disabling radio\n");
1678 ath_radio_disable(sc, hw);
1681 mutex_unlock(&sc->mutex);
1686 #define SUPPORTED_FILTERS \
1687 (FIF_PROMISC_IN_BSS | \
1692 FIF_BCN_PRBRESP_PROMISC | \
1696 /* FIXME: sc->sc_full_reset ? */
1697 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1698 unsigned int changed_flags,
1699 unsigned int *total_flags,
1702 struct ath_wiphy *aphy = hw->priv;
1703 struct ath_softc *sc = aphy->sc;
1706 changed_flags &= SUPPORTED_FILTERS;
1707 *total_flags &= SUPPORTED_FILTERS;
1709 sc->rx.rxfilter = *total_flags;
1710 ath9k_ps_wakeup(sc);
1711 rfilt = ath_calcrxfilter(sc);
1712 ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1713 ath9k_ps_restore(sc);
1715 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
1716 "Set HW RX filter: 0x%x\n", rfilt);
1719 static int ath9k_sta_add(struct ieee80211_hw *hw,
1720 struct ieee80211_vif *vif,
1721 struct ieee80211_sta *sta)
1723 struct ath_wiphy *aphy = hw->priv;
1724 struct ath_softc *sc = aphy->sc;
1726 ath_node_attach(sc, sta);
1731 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1732 struct ieee80211_vif *vif,
1733 struct ieee80211_sta *sta)
1735 struct ath_wiphy *aphy = hw->priv;
1736 struct ath_softc *sc = aphy->sc;
1738 ath_node_detach(sc, sta);
1743 static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
1744 const struct ieee80211_tx_queue_params *params)
1746 struct ath_wiphy *aphy = hw->priv;
1747 struct ath_softc *sc = aphy->sc;
1748 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1749 struct ath_txq *txq;
1750 struct ath9k_tx_queue_info qi;
1753 if (queue >= WME_NUM_AC)
1756 txq = sc->tx.txq_map[queue];
1758 mutex_lock(&sc->mutex);
1760 memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1762 qi.tqi_aifs = params->aifs;
1763 qi.tqi_cwmin = params->cw_min;
1764 qi.tqi_cwmax = params->cw_max;
1765 qi.tqi_burstTime = params->txop;
1767 ath_print(common, ATH_DBG_CONFIG,
1768 "Configure tx [queue/halq] [%d/%d], "
1769 "aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1770 queue, txq->axq_qnum, params->aifs, params->cw_min,
1771 params->cw_max, params->txop);
1773 ret = ath_txq_update(sc, txq->axq_qnum, &qi);
1775 ath_print(common, ATH_DBG_FATAL, "TXQ Update failed\n");
1777 if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
1778 if (queue == WME_AC_BE && !ret)
1779 ath_beaconq_config(sc);
1781 mutex_unlock(&sc->mutex);
1786 static int ath9k_set_key(struct ieee80211_hw *hw,
1787 enum set_key_cmd cmd,
1788 struct ieee80211_vif *vif,
1789 struct ieee80211_sta *sta,
1790 struct ieee80211_key_conf *key)
1792 struct ath_wiphy *aphy = hw->priv;
1793 struct ath_softc *sc = aphy->sc;
1794 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1797 if (modparam_nohwcrypt)
1800 mutex_lock(&sc->mutex);
1801 ath9k_ps_wakeup(sc);
1802 ath_print(common, ATH_DBG_CONFIG, "Set HW Key\n");
1806 ret = ath_key_config(common, vif, sta, key);
1808 key->hw_key_idx = ret;
1809 /* push IV and Michael MIC generation to stack */
1810 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1811 if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
1812 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1813 if (sc->sc_ah->sw_mgmt_crypto &&
1814 key->cipher == WLAN_CIPHER_SUITE_CCMP)
1815 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
1820 ath_key_delete(common, key);
1826 ath9k_ps_restore(sc);
1827 mutex_unlock(&sc->mutex);
1832 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1833 struct ieee80211_vif *vif,
1834 struct ieee80211_bss_conf *bss_conf,
1837 struct ath_wiphy *aphy = hw->priv;
1838 struct ath_softc *sc = aphy->sc;
1839 struct ath_hw *ah = sc->sc_ah;
1840 struct ath_common *common = ath9k_hw_common(ah);
1841 struct ath_vif *avp = (void *)vif->drv_priv;
1845 mutex_lock(&sc->mutex);
1847 if (changed & BSS_CHANGED_BSSID) {
1849 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1850 memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
1852 ath9k_hw_write_associd(ah);
1854 /* Set aggregation protection mode parameters */
1855 sc->config.ath_aggr_prot = 0;
1857 /* Only legacy IBSS for now */
1858 if (vif->type == NL80211_IFTYPE_ADHOC)
1859 ath_update_chainmask(sc, 0);
1861 ath_print(common, ATH_DBG_CONFIG,
1862 "BSSID: %pM aid: 0x%x\n",
1863 common->curbssid, common->curaid);
1865 /* need to reconfigure the beacon */
1866 sc->sc_flags &= ~SC_OP_BEACONS ;
1869 /* Enable transmission of beacons (AP, IBSS, MESH) */
1870 if ((changed & BSS_CHANGED_BEACON) ||
1871 ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
1872 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1873 error = ath_beacon_alloc(aphy, vif);
1875 ath_beacon_config(sc, vif);
1878 if (changed & BSS_CHANGED_ERP_SLOT) {
1879 if (bss_conf->use_short_slot)
1883 if (vif->type == NL80211_IFTYPE_AP) {
1885 * Defer update, so that connected stations can adjust
1886 * their settings at the same time.
1887 * See beacon.c for more details
1889 sc->beacon.slottime = slottime;
1890 sc->beacon.updateslot = UPDATE;
1892 ah->slottime = slottime;
1893 ath9k_hw_init_global_settings(ah);
1897 /* Disable transmission of beacons */
1898 if ((changed & BSS_CHANGED_BEACON_ENABLED) && !bss_conf->enable_beacon)
1899 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1901 if (changed & BSS_CHANGED_BEACON_INT) {
1902 sc->beacon_interval = bss_conf->beacon_int;
1904 * In case of AP mode, the HW TSF has to be reset
1905 * when the beacon interval changes.
1907 if (vif->type == NL80211_IFTYPE_AP) {
1908 sc->sc_flags |= SC_OP_TSF_RESET;
1909 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1910 error = ath_beacon_alloc(aphy, vif);
1912 ath_beacon_config(sc, vif);
1914 ath_beacon_config(sc, vif);
1918 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
1919 ath_print(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
1920 bss_conf->use_short_preamble);
1921 if (bss_conf->use_short_preamble)
1922 sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
1924 sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
1927 if (changed & BSS_CHANGED_ERP_CTS_PROT) {
1928 ath_print(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
1929 bss_conf->use_cts_prot);
1930 if (bss_conf->use_cts_prot &&
1931 hw->conf.channel->band != IEEE80211_BAND_5GHZ)
1932 sc->sc_flags |= SC_OP_PROTECT_ENABLE;
1934 sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
1937 if (changed & BSS_CHANGED_ASSOC) {
1938 ath_print(common, ATH_DBG_CONFIG, "BSS Changed ASSOC %d\n",
1940 ath9k_bss_assoc_info(sc, hw, vif, bss_conf);
1943 mutex_unlock(&sc->mutex);
1946 static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
1949 struct ath_wiphy *aphy = hw->priv;
1950 struct ath_softc *sc = aphy->sc;
1952 mutex_lock(&sc->mutex);
1953 tsf = ath9k_hw_gettsf64(sc->sc_ah);
1954 mutex_unlock(&sc->mutex);
1959 static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
1961 struct ath_wiphy *aphy = hw->priv;
1962 struct ath_softc *sc = aphy->sc;
1964 mutex_lock(&sc->mutex);
1965 ath9k_hw_settsf64(sc->sc_ah, tsf);
1966 mutex_unlock(&sc->mutex);
1969 static void ath9k_reset_tsf(struct ieee80211_hw *hw)
1971 struct ath_wiphy *aphy = hw->priv;
1972 struct ath_softc *sc = aphy->sc;
1974 mutex_lock(&sc->mutex);
1976 ath9k_ps_wakeup(sc);
1977 ath9k_hw_reset_tsf(sc->sc_ah);
1978 ath9k_ps_restore(sc);
1980 mutex_unlock(&sc->mutex);
1983 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
1984 struct ieee80211_vif *vif,
1985 enum ieee80211_ampdu_mlme_action action,
1986 struct ieee80211_sta *sta,
1989 struct ath_wiphy *aphy = hw->priv;
1990 struct ath_softc *sc = aphy->sc;
1996 case IEEE80211_AMPDU_RX_START:
1997 if (!(sc->sc_flags & SC_OP_RXAGGR))
2000 case IEEE80211_AMPDU_RX_STOP:
2002 case IEEE80211_AMPDU_TX_START:
2003 if (!(sc->sc_flags & SC_OP_TXAGGR))
2006 ath9k_ps_wakeup(sc);
2007 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
2009 ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2010 ath9k_ps_restore(sc);
2012 case IEEE80211_AMPDU_TX_STOP:
2013 ath9k_ps_wakeup(sc);
2014 ath_tx_aggr_stop(sc, sta, tid);
2015 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2016 ath9k_ps_restore(sc);
2018 case IEEE80211_AMPDU_TX_OPERATIONAL:
2019 ath9k_ps_wakeup(sc);
2020 ath_tx_aggr_resume(sc, sta, tid);
2021 ath9k_ps_restore(sc);
2024 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
2025 "Unknown AMPDU action\n");
2033 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
2034 struct survey_info *survey)
2036 struct ath_wiphy *aphy = hw->priv;
2037 struct ath_softc *sc = aphy->sc;
2038 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2039 struct ieee80211_supported_band *sband;
2040 struct ieee80211_channel *chan;
2041 unsigned long flags;
2044 spin_lock_irqsave(&common->cc_lock, flags);
2046 ath_update_survey_stats(sc);
2048 sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
2049 if (sband && idx >= sband->n_channels) {
2050 idx -= sband->n_channels;
2055 sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
2057 if (!sband || idx >= sband->n_channels) {
2058 spin_unlock_irqrestore(&common->cc_lock, flags);
2062 chan = &sband->channels[idx];
2063 pos = chan->hw_value;
2064 memcpy(survey, &sc->survey[pos], sizeof(*survey));
2065 survey->channel = chan;
2066 spin_unlock_irqrestore(&common->cc_lock, flags);
2071 static void ath9k_sw_scan_start(struct ieee80211_hw *hw)
2073 struct ath_wiphy *aphy = hw->priv;
2074 struct ath_softc *sc = aphy->sc;
2076 mutex_lock(&sc->mutex);
2077 if (ath9k_wiphy_scanning(sc)) {
2079 * There is a race here in mac80211 but fixing it requires
2080 * we revisit how we handle the scan complete callback.
2081 * After mac80211 fixes we will not have configured hardware
2082 * to the home channel nor would we have configured the RX
2085 mutex_unlock(&sc->mutex);
2089 aphy->state = ATH_WIPHY_SCAN;
2090 ath9k_wiphy_pause_all_forced(sc, aphy);
2091 mutex_unlock(&sc->mutex);
2095 * XXX: this requires a revisit after the driver
2096 * scan_complete gets moved to another place/removed in mac80211.
2098 static void ath9k_sw_scan_complete(struct ieee80211_hw *hw)
2100 struct ath_wiphy *aphy = hw->priv;
2101 struct ath_softc *sc = aphy->sc;
2103 mutex_lock(&sc->mutex);
2104 aphy->state = ATH_WIPHY_ACTIVE;
2105 mutex_unlock(&sc->mutex);
2108 static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
2110 struct ath_wiphy *aphy = hw->priv;
2111 struct ath_softc *sc = aphy->sc;
2112 struct ath_hw *ah = sc->sc_ah;
2114 mutex_lock(&sc->mutex);
2115 ah->coverage_class = coverage_class;
2116 ath9k_hw_init_global_settings(ah);
2117 mutex_unlock(&sc->mutex);
2120 struct ieee80211_ops ath9k_ops = {
2122 .start = ath9k_start,
2124 .add_interface = ath9k_add_interface,
2125 .remove_interface = ath9k_remove_interface,
2126 .config = ath9k_config,
2127 .configure_filter = ath9k_configure_filter,
2128 .sta_add = ath9k_sta_add,
2129 .sta_remove = ath9k_sta_remove,
2130 .conf_tx = ath9k_conf_tx,
2131 .bss_info_changed = ath9k_bss_info_changed,
2132 .set_key = ath9k_set_key,
2133 .get_tsf = ath9k_get_tsf,
2134 .set_tsf = ath9k_set_tsf,
2135 .reset_tsf = ath9k_reset_tsf,
2136 .ampdu_action = ath9k_ampdu_action,
2137 .get_survey = ath9k_get_survey,
2138 .sw_scan_start = ath9k_sw_scan_start,
2139 .sw_scan_complete = ath9k_sw_scan_complete,
2140 .rfkill_poll = ath9k_rfkill_poll_state,
2141 .set_coverage_class = ath9k_set_coverage_class,