drivers/net/wireless/ath/ath9k/main.c

   1 /*
   2  * Copyright (c) 2008-2011 Atheros Communications Inc.
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #include <linux/nl80211.h>
  18 #include <linux/delay.h>
  19 #include "ath9k.h"
  20 #include "btcoex.h"
  21
  22 static u8 parse_mpdudensity(u8 mpdudensity)
  23 {
  24         /*
  25          * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
  26          *   0 for no restriction
  27          *   1 for 1/4 us
  28          *   2 for 1/2 us
  29          *   3 for 1 us
  30          *   4 for 2 us
  31          *   5 for 4 us
  32          *   6 for 8 us
  33          *   7 for 16 us
  34          */
  35         switch (mpdudensity) {
  36         case 0:
  37                 return 0;
  38         case 1:
  39         case 2:
  40         case 3:
  41                 /* Our lower layer calculations limit our precision to
  42                    1 microsecond */
  43                 return 1;
  44         case 4:
  45                 return 2;
  46         case 5:
  47                 return 4;
  48         case 6:
  49                 return 8;
  50         case 7:
  51                 return 16;
  52         default:
  53                 return 0;
  54         }
  55 }
  56
  57 static bool ath9k_has_pending_frames(struct ath_softc *sc, struct ath_txq *txq)
  58 {
  59         bool pending = false;
  60
  61         spin_lock_bh(&txq->axq_lock);
  62
  63         if (txq->axq_depth || !list_empty(&txq->axq_acq))
  64                 pending = true;
  65
  66         spin_unlock_bh(&txq->axq_lock);
  67         return pending;
  68 }
  69
  70 static bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
  71 {
  72         unsigned long flags;
  73         bool ret;
  74
  75         spin_lock_irqsave(&sc->sc_pm_lock, flags);
  76         ret = ath9k_hw_setpower(sc->sc_ah, mode);
  77         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  78
  79         return ret;
  80 }
  81
  82 void ath9k_ps_wakeup(struct ath_softc *sc)
  83 {
  84         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  85         unsigned long flags;
  86         enum ath9k_power_mode power_mode;
  87
  88         spin_lock_irqsave(&sc->sc_pm_lock, flags);
  89         if (++sc->ps_usecount != 1)
  90                 goto unlock;
  91
  92         power_mode = sc->sc_ah->power_mode;
  93         ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
  94
  95         /*
  96          * While the hardware is asleep, the cycle counters contain no
  97          * useful data. Better clear them now so that they don't mess up
  98          * survey data results.
  99          */
 100         if (power_mode != ATH9K_PM_AWAKE) {
 101                 spin_lock(&common->cc_lock);
 102                 ath_hw_cycle_counters_update(common);
 103                 memset(&common->cc_survey, 0, sizeof(common->cc_survey));
 104                 spin_unlock(&common->cc_lock);
 105         }
 106
 107  unlock:
 108         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 109 }
 110
 111 void ath9k_ps_restore(struct ath_softc *sc)
 112 {
 113         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 114         unsigned long flags;
 115
 116         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 117         if (--sc->ps_usecount != 0)
 118                 goto unlock;
 119
 120         spin_lock(&common->cc_lock);
 121         ath_hw_cycle_counters_update(common);
 122         spin_unlock(&common->cc_lock);
 123
 124         if (sc->ps_idle)
 125                 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
 126         else if (sc->ps_enabled &&
 127                  !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
 128                               PS_WAIT_FOR_CAB |
 129                               PS_WAIT_FOR_PSPOLL_DATA |
 130                               PS_WAIT_FOR_TX_ACK)))
 131                 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
 132
 133  unlock:
 134         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 135 }
 136
 137 void ath_start_ani(struct ath_common *common)
 138 {
 139         struct ath_hw *ah = common->ah;
 140         unsigned long timestamp = jiffies_to_msecs(jiffies);
 141         struct ath_softc *sc = (struct ath_softc *) common->priv;
 142
 143         if (!(sc->sc_flags & SC_OP_ANI_RUN))
 144                 return;
 145
 146         if (sc->sc_flags & SC_OP_OFFCHANNEL)
 147                 return;
 148
 149         common->ani.longcal_timer = timestamp;
 150         common->ani.shortcal_timer = timestamp;
 151         common->ani.checkani_timer = timestamp;
 152
 153         mod_timer(&common->ani.timer,
 154                   jiffies +
 155                         msecs_to_jiffies((u32)ah->config.ani_poll_interval));
 156 }
 157
 158 static void ath_update_survey_nf(struct ath_softc *sc, int channel)
 159 {
 160         struct ath_hw *ah = sc->sc_ah;
 161         struct ath9k_channel *chan = &ah->channels[channel];
 162         struct survey_info *survey = &sc->survey[channel];
 163
 164         if (chan->noisefloor) {
 165                 survey->filled |= SURVEY_INFO_NOISE_DBM;
 166                 survey->noise = chan->noisefloor;
 167         }
 168 }
 169
 170 /*
 171  * Updates the survey statistics and returns the busy time since last
 172  * update in %, if the measurement duration was long enough for the
 173  * result to be useful, -1 otherwise.
 174  */
 175 static int ath_update_survey_stats(struct ath_softc *sc)
 176 {
 177         struct ath_hw *ah = sc->sc_ah;
 178         struct ath_common *common = ath9k_hw_common(ah);
 179         int pos = ah->curchan - &ah->channels[0];
 180         struct survey_info *survey = &sc->survey[pos];
 181         struct ath_cycle_counters *cc = &common->cc_survey;
 182         unsigned int div = common->clockrate * 1000;
 183         int ret = 0;
 184
 185         if (!ah->curchan)
 186                 return -1;
 187
 188         if (ah->power_mode == ATH9K_PM_AWAKE)
 189                 ath_hw_cycle_counters_update(common);
 190
 191         if (cc->cycles > 0) {
 192                 survey->filled |= SURVEY_INFO_CHANNEL_TIME |
 193                         SURVEY_INFO_CHANNEL_TIME_BUSY |
 194                         SURVEY_INFO_CHANNEL_TIME_RX |
 195                         SURVEY_INFO_CHANNEL_TIME_TX;
 196                 survey->channel_time += cc->cycles / div;
 197                 survey->channel_time_busy += cc->rx_busy / div;
 198                 survey->channel_time_rx += cc->rx_frame / div;
 199                 survey->channel_time_tx += cc->tx_frame / div;
 200         }
 201
 202         if (cc->cycles < div)
 203                 return -1;
 204
 205         if (cc->cycles > 0)
 206                 ret = cc->rx_busy * 100 / cc->cycles;
 207
 208         memset(cc, 0, sizeof(*cc));
 209
 210         ath_update_survey_nf(sc, pos);
 211
 212         return ret;
 213 }
 214
 215 /*
 216  * Set/change channels.  If the channel is really being changed, it's done
 217  * by reseting the chip.  To accomplish this we must first cleanup any pending
 218  * DMA, then restart stuff.
 219 */
 220 static int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
 221                     struct ath9k_channel *hchan)
 222 {
 223         struct ath_hw *ah = sc->sc_ah;
 224         struct ath_common *common = ath9k_hw_common(ah);
 225         struct ieee80211_conf *conf = &common->hw->conf;
 226         bool fastcc = true, stopped;
 227         struct ieee80211_channel *channel = hw->conf.channel;
 228         struct ath9k_hw_cal_data *caldata = NULL;
 229         int r;
 230
 231         if (sc->sc_flags & SC_OP_INVALID)
 232                 return -EIO;
 233
 234         sc->hw_busy_count = 0;
 235
 236         del_timer_sync(&common->ani.timer);
 237         cancel_work_sync(&sc->paprd_work);
 238         cancel_work_sync(&sc->hw_check_work);
 239         cancel_delayed_work_sync(&sc->tx_complete_work);
 240         cancel_delayed_work_sync(&sc->hw_pll_work);
 241
 242         ath9k_ps_wakeup(sc);
 243
 244         spin_lock_bh(&sc->sc_pcu_lock);
 245
 246         /*
 247          * This is only performed if the channel settings have
 248          * actually changed.
 249          *
 250          * To switch channels clear any pending DMA operations;
 251          * wait long enough for the RX fifo to drain, reset the
 252          * hardware at the new frequency, and then re-enable
 253          * the relevant bits of the h/w.
 254          */
 255         ath9k_hw_disable_interrupts(ah);
 256         stopped = ath_drain_all_txq(sc, false);
 257
 258         if (!ath_stoprecv(sc))
 259                 stopped = false;
 260
 261         if (!ath9k_hw_check_alive(ah))
 262                 stopped = false;
 263
 264         /* XXX: do not flush receive queue here. We don't want
 265          * to flush data frames already in queue because of
 266          * changing channel. */
 267
 268         if (!stopped || !(sc->sc_flags & SC_OP_OFFCHANNEL))
 269                 fastcc = false;
 270
 271         if (!(sc->sc_flags & SC_OP_OFFCHANNEL))
 272                 caldata = &sc->caldata;
 273
 274         ath_dbg(common, ATH_DBG_CONFIG,
 275                 "(%u MHz) -> (%u MHz), conf_is_ht40: %d fastcc: %d\n",
 276                 sc->sc_ah->curchan->channel,
 277                 channel->center_freq, conf_is_ht40(conf),
 278                 fastcc);
 279
 280         r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
 281         if (r) {
 282                 ath_err(common,
 283                         "Unable to reset channel (%u MHz), reset status %d\n",
 284                         channel->center_freq, r);
 285                 goto ps_restore;
 286         }
 287
 288         if (ath_startrecv(sc) != 0) {
 289                 ath_err(common, "Unable to restart recv logic\n");
 290                 r = -EIO;
 291                 goto ps_restore;
 292         }
 293
 294         ath9k_cmn_update_txpow(ah, sc->curtxpow,
 295                                sc->config.txpowlimit, &sc->curtxpow);
 296         ath9k_hw_set_interrupts(ah, ah->imask);
 297
 298         if (!(sc->sc_flags & (SC_OP_OFFCHANNEL))) {
 299                 if (sc->sc_flags & SC_OP_BEACONS)
 300                         ath_set_beacon(sc);
 301                 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
 302                 ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work, HZ/2);
 303                 if (!common->disable_ani)
 304                         ath_start_ani(common);
 305         }
 306
 307  ps_restore:
 308         ieee80211_wake_queues(hw);
 309
 310         spin_unlock_bh(&sc->sc_pcu_lock);
 311
 312         ath9k_ps_restore(sc);
 313         return r;
 314 }
 315
 316 static void ath_paprd_activate(struct ath_softc *sc)
 317 {
 318         struct ath_hw *ah = sc->sc_ah;
 319         struct ath9k_hw_cal_data *caldata = ah->caldata;
 320         struct ath_common *common = ath9k_hw_common(ah);
 321         int chain;
 322
 323         if (!caldata || !caldata->paprd_done)
 324                 return;
 325
 326         ath9k_ps_wakeup(sc);
 327         ar9003_paprd_enable(ah, false);
 328         for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
 329                 if (!(common->tx_chainmask & BIT(chain)))
 330                         continue;
 331
 332                 ar9003_paprd_populate_single_table(ah, caldata, chain);
 333         }
 334
 335         ar9003_paprd_enable(ah, true);
 336         ath9k_ps_restore(sc);
 337 }
 338
 339 static bool ath_paprd_send_frame(struct ath_softc *sc, struct sk_buff *skb, int chain)
 340 {
 341         struct ieee80211_hw *hw = sc->hw;
 342         struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
 343         struct ath_hw *ah = sc->sc_ah;
 344         struct ath_common *common = ath9k_hw_common(ah);
 345         struct ath_tx_control txctl;
 346         int time_left;
 347
 348         memset(&txctl, 0, sizeof(txctl));
 349         txctl.txq = sc->tx.txq_map[WME_AC_BE];
 350
 351         memset(tx_info, 0, sizeof(*tx_info));
 352         tx_info->band = hw->conf.channel->band;
 353         tx_info->flags |= IEEE80211_TX_CTL_NO_ACK;
 354         tx_info->control.rates[0].idx = 0;
 355         tx_info->control.rates[0].count = 1;
 356         tx_info->control.rates[0].flags = IEEE80211_TX_RC_MCS;
 357         tx_info->control.rates[1].idx = -1;
 358
 359         init_completion(&sc->paprd_complete);
 360         txctl.paprd = BIT(chain);
 361
 362         if (ath_tx_start(hw, skb, &txctl) != 0) {
 363                 ath_dbg(common, ATH_DBG_CALIBRATE, "PAPRD TX failed\n");
 364                 dev_kfree_skb_any(skb);
 365                 return false;
 366         }
 367
 368         time_left = wait_for_completion_timeout(&sc->paprd_complete,
 369                         msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
 370
 371         if (!time_left)
 372                 ath_dbg(common, ATH_DBG_CALIBRATE,
 373                         "Timeout waiting for paprd training on TX chain %d\n",
 374                         chain);
 375
 376         return !!time_left;
 377 }
 378
 379 void ath_paprd_calibrate(struct work_struct *work)
 380 {
 381         struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
 382         struct ieee80211_hw *hw = sc->hw;
 383         struct ath_hw *ah = sc->sc_ah;
 384         struct ieee80211_hdr *hdr;
 385         struct sk_buff *skb = NULL;
 386         struct ath9k_hw_cal_data *caldata = ah->caldata;
 387         struct ath_common *common = ath9k_hw_common(ah);
 388         int ftype;
 389         int chain_ok = 0;
 390         int chain;
 391         int len = 1800;
 392
 393         if (!caldata)
 394                 return;
 395
 396         ath9k_ps_wakeup(sc);
 397
 398         if (ar9003_paprd_init_table(ah) < 0)
 399                 goto fail_paprd;
 400
 401         skb = alloc_skb(len, GFP_KERNEL);
 402         if (!skb)
 403                 goto fail_paprd;
 404
 405         skb_put(skb, len);
 406         memset(skb->data, 0, len);
 407         hdr = (struct ieee80211_hdr *)skb->data;
 408         ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
 409         hdr->frame_control = cpu_to_le16(ftype);
 410         hdr->duration_id = cpu_to_le16(10);
 411         memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
 412         memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
 413         memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
 414
 415         for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
 416                 if (!(common->tx_chainmask & BIT(chain)))
 417                         continue;
 418
 419                 chain_ok = 0;
 420
 421                 ath_dbg(common, ATH_DBG_CALIBRATE,
 422                         "Sending PAPRD frame for thermal measurement "
 423                         "on chain %d\n", chain);
 424                 if (!ath_paprd_send_frame(sc, skb, chain))
 425                         goto fail_paprd;
 426
 427                 ar9003_paprd_setup_gain_table(ah, chain);
 428
 429                 ath_dbg(common, ATH_DBG_CALIBRATE,
 430                         "Sending PAPRD training frame on chain %d\n", chain);
 431                 if (!ath_paprd_send_frame(sc, skb, chain))
 432                         goto fail_paprd;
 433
 434                 if (!ar9003_paprd_is_done(ah)) {
 435                         ath_dbg(common, ATH_DBG_CALIBRATE,
 436                                 "PAPRD not yet done on chain %d\n", chain);
 437                         break;
 438                 }
 439
 440                 if (ar9003_paprd_create_curve(ah, caldata, chain)) {
 441                         ath_dbg(common, ATH_DBG_CALIBRATE,
 442                                 "PAPRD create curve failed on chain %d\n",
 443                                                                    chain);
 444                         break;
 445                 }
 446
 447                 chain_ok = 1;
 448         }
 449         kfree_skb(skb);
 450
 451         if (chain_ok) {
 452                 caldata->paprd_done = true;
 453                 ath_paprd_activate(sc);
 454         }
 455
 456 fail_paprd:
 457         ath9k_ps_restore(sc);
 458 }
 459
 460 /*
 461  *  This routine performs the periodic noise floor calibration function
 462  *  that is used to adjust and optimize the chip performance.  This
 463  *  takes environmental changes (location, temperature) into account.
 464  *  When the task is complete, it reschedules itself depending on the
 465  *  appropriate interval that was calculated.
 466  */
 467 void ath_ani_calibrate(unsigned long data)
 468 {
 469         struct ath_softc *sc = (struct ath_softc *)data;
 470         struct ath_hw *ah = sc->sc_ah;
 471         struct ath_common *common = ath9k_hw_common(ah);
 472         bool longcal = false;
 473         bool shortcal = false;
 474         bool aniflag = false;
 475         unsigned int timestamp = jiffies_to_msecs(jiffies);
 476         u32 cal_interval, short_cal_interval, long_cal_interval;
 477         unsigned long flags;
 478
 479         if (ah->caldata && ah->caldata->nfcal_interference)
 480                 long_cal_interval = ATH_LONG_CALINTERVAL_INT;
 481         else
 482                 long_cal_interval = ATH_LONG_CALINTERVAL;
 483
 484         short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
 485                 ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
 486
 487         /* Only calibrate if awake */
 488         if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
 489                 goto set_timer;
 490
 491         ath9k_ps_wakeup(sc);
 492
 493         /* Long calibration runs independently of short calibration. */
 494         if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) {
 495                 longcal = true;
 496                 ath_dbg(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
 497                 common->ani.longcal_timer = timestamp;
 498         }
 499
 500         /* Short calibration applies only while caldone is false */
 501         if (!common->ani.caldone) {
 502                 if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
 503                         shortcal = true;
 504                         ath_dbg(common, ATH_DBG_ANI,
 505                                 "shortcal @%lu\n", jiffies);
 506                         common->ani.shortcal_timer = timestamp;
 507                         common->ani.resetcal_timer = timestamp;
 508                 }
 509         } else {
 510                 if ((timestamp - common->ani.resetcal_timer) >=
 511                     ATH_RESTART_CALINTERVAL) {
 512                         common->ani.caldone = ath9k_hw_reset_calvalid(ah);
 513                         if (common->ani.caldone)
 514                                 common->ani.resetcal_timer = timestamp;
 515                 }
 516         }
 517
 518         /* Verify whether we must check ANI */
 519         if ((timestamp - common->ani.checkani_timer) >=
 520              ah->config.ani_poll_interval) {
 521                 aniflag = true;
 522                 common->ani.checkani_timer = timestamp;
 523         }
 524
 525         /* Call ANI routine if necessary */
 526         if (aniflag) {
 527                 spin_lock_irqsave(&common->cc_lock, flags);
 528                 ath9k_hw_ani_monitor(ah, ah->curchan);
 529                 ath_update_survey_stats(sc);
 530                 spin_unlock_irqrestore(&common->cc_lock, flags);
 531         }
 532
 533         /* Perform calibration if necessary */
 534         if (longcal || shortcal) {
 535                 common->ani.caldone =
 536                         ath9k_hw_calibrate(ah, ah->curchan,
 537                                                 common->rx_chainmask, longcal);
 538         }
 539
 540         ath9k_ps_restore(sc);
 541
 542 set_timer:
 543         /*
 544         * Set timer interval based on previous results.
 545         * The interval must be the shortest necessary to satisfy ANI,
 546         * short calibration and long calibration.
 547         */
 548         cal_interval = ATH_LONG_CALINTERVAL;
 549         if (sc->sc_ah->config.enable_ani)
 550                 cal_interval = min(cal_interval,
 551                                    (u32)ah->config.ani_poll_interval);
 552         if (!common->ani.caldone)
 553                 cal_interval = min(cal_interval, (u32)short_cal_interval);
 554
 555         mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
 556         if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->caldata) {
 557                 if (!ah->caldata->paprd_done)
 558                         ieee80211_queue_work(sc->hw, &sc->paprd_work);
 559                 else if (!ah->paprd_table_write_done)
 560                         ath_paprd_activate(sc);
 561         }
 562 }
 563
 564 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
 565 {
 566         struct ath_node *an;
 567         struct ath_hw *ah = sc->sc_ah;
 568         an = (struct ath_node *)sta->drv_priv;
 569
 570 #ifdef CONFIG_ATH9K_DEBUGFS
 571         spin_lock(&sc->nodes_lock);
 572         list_add(&an->list, &sc->nodes);
 573         spin_unlock(&sc->nodes_lock);
 574         an->sta = sta;
 575 #endif
 576         if ((ah->caps.hw_caps) & ATH9K_HW_CAP_APM)
 577                 sc->sc_flags |= SC_OP_ENABLE_APM;
 578
 579         if (sc->sc_flags & SC_OP_TXAGGR) {
 580                 ath_tx_node_init(sc, an);
 581                 an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
 582                                      sta->ht_cap.ampdu_factor);
 583                 an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
 584         }
 585 }
 586
 587 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
 588 {
 589         struct ath_node *an = (struct ath_node *)sta->drv_priv;
 590
 591 #ifdef CONFIG_ATH9K_DEBUGFS
 592         spin_lock(&sc->nodes_lock);
 593         list_del(&an->list);
 594         spin_unlock(&sc->nodes_lock);
 595         an->sta = NULL;
 596 #endif
 597
 598         if (sc->sc_flags & SC_OP_TXAGGR)
 599                 ath_tx_node_cleanup(sc, an);
 600 }
 601
 602 void ath_hw_check(struct work_struct *work)
 603 {
 604         struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
 605         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 606         unsigned long flags;
 607         int busy;
 608
 609         ath9k_ps_wakeup(sc);
 610         if (ath9k_hw_check_alive(sc->sc_ah))
 611                 goto out;
 612
 613         spin_lock_irqsave(&common->cc_lock, flags);
 614         busy = ath_update_survey_stats(sc);
 615         spin_unlock_irqrestore(&common->cc_lock, flags);
 616
 617         ath_dbg(common, ATH_DBG_RESET, "Possible baseband hang, "
 618                 "busy=%d (try %d)\n", busy, sc->hw_busy_count + 1);
 619         if (busy >= 99) {
 620                 if (++sc->hw_busy_count >= 3)
 621                         ath_reset(sc, true);
 622         } else if (busy >= 0)
 623                 sc->hw_busy_count = 0;
 624
 625 out:
 626         ath9k_ps_restore(sc);
 627 }
 628
 629 static void ath_hw_pll_rx_hang_check(struct ath_softc *sc, u32 pll_sqsum)
 630 {
 631         static int count;
 632         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 633
 634         if (pll_sqsum >= 0x40000) {
 635                 count++;
 636                 if (count == 3) {
 637                         /* Rx is hung for more than 500ms. Reset it */
 638                         ath_dbg(common, ATH_DBG_RESET,
 639                                 "Possible RX hang, resetting");
 640                         ath_reset(sc, true);
 641                         count = 0;
 642                 }
 643         } else
 644                 count = 0;
 645 }
 646
 647 void ath_hw_pll_work(struct work_struct *work)
 648 {
 649         struct ath_softc *sc = container_of(work, struct ath_softc,
 650                                             hw_pll_work.work);
 651         u32 pll_sqsum;
 652
 653         if (AR_SREV_9485(sc->sc_ah)) {
 654
 655                 ath9k_ps_wakeup(sc);
 656                 pll_sqsum = ar9003_get_pll_sqsum_dvc(sc->sc_ah);
 657                 ath9k_ps_restore(sc);
 658
 659                 ath_hw_pll_rx_hang_check(sc, pll_sqsum);
 660
 661                 ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work, HZ/5);
 662         }
 663 }
 664
 665
 666 void ath9k_tasklet(unsigned long data)
 667 {
 668         struct ath_softc *sc = (struct ath_softc *)data;
 669         struct ath_hw *ah = sc->sc_ah;
 670         struct ath_common *common = ath9k_hw_common(ah);
 671
 672         u32 status = sc->intrstatus;
 673         u32 rxmask;
 674
 675         if ((status & ATH9K_INT_FATAL) ||
 676             (status & ATH9K_INT_BB_WATCHDOG)) {
 677                 ath_reset(sc, true);
 678                 return;
 679         }
 680
 681         ath9k_ps_wakeup(sc);
 682         spin_lock(&sc->sc_pcu_lock);
 683
 684         /*
 685          * Only run the baseband hang check if beacons stop working in AP or
 686          * IBSS mode, because it has a high false positive rate. For station
 687          * mode it should not be necessary, since the upper layers will detect
 688          * this through a beacon miss automatically and the following channel
 689          * change will trigger a hardware reset anyway
 690          */
 691         if (ath9k_hw_numtxpending(ah, sc->beacon.beaconq) != 0 &&
 692             !ath9k_hw_check_alive(ah))
 693                 ieee80211_queue_work(sc->hw, &sc->hw_check_work);
 694
 695         if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
 696                 /*
 697                  * TSF sync does not look correct; remain awake to sync with
 698                  * the next Beacon.
 699                  */
 700                 ath_dbg(common, ATH_DBG_PS,
 701                         "TSFOOR - Sync with next Beacon\n");
 702                 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC |
 703                                 PS_TSFOOR_SYNC;
 704         }
 705
 706         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 707                 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
 708                           ATH9K_INT_RXORN);
 709         else
 710                 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 711
 712         if (status & rxmask) {
 713                 /* Check for high priority Rx first */
 714                 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
 715                     (status & ATH9K_INT_RXHP))
 716                         ath_rx_tasklet(sc, 0, true);
 717
 718                 ath_rx_tasklet(sc, 0, false);
 719         }
 720
 721         if (status & ATH9K_INT_TX) {
 722                 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 723                         ath_tx_edma_tasklet(sc);
 724                 else
 725                         ath_tx_tasklet(sc);
 726         }
 727
 728         if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
 729                 if (status & ATH9K_INT_GENTIMER)
 730                         ath_gen_timer_isr(sc->sc_ah);
 731
 732         /* re-enable hardware interrupt */
 733         ath9k_hw_enable_interrupts(ah);
 734
 735         spin_unlock(&sc->sc_pcu_lock);
 736         ath9k_ps_restore(sc);
 737 }
 738
 739 irqreturn_t ath_isr(int irq, void *dev)
 740 {
 741 #define SCHED_INTR (                            \
 742                 ATH9K_INT_FATAL |               \
 743                 ATH9K_INT_BB_WATCHDOG |         \
 744                 ATH9K_INT_RXORN |               \
 745                 ATH9K_INT_RXEOL |               \
 746                 ATH9K_INT_RX |                  \
 747                 ATH9K_INT_RXLP |                \
 748                 ATH9K_INT_RXHP |                \
 749                 ATH9K_INT_TX |                  \
 750                 ATH9K_INT_BMISS |               \
 751                 ATH9K_INT_CST |                 \
 752                 ATH9K_INT_TSFOOR |              \
 753                 ATH9K_INT_GENTIMER)
 754
 755         struct ath_softc *sc = dev;
 756         struct ath_hw *ah = sc->sc_ah;
 757         struct ath_common *common = ath9k_hw_common(ah);
 758         enum ath9k_int status;
 759         bool sched = false;
 760
 761         /*
 762          * The hardware is not ready/present, don't
 763          * touch anything. Note this can happen early
 764          * on if the IRQ is shared.
 765          */
 766         if (sc->sc_flags & SC_OP_INVALID)
 767                 return IRQ_NONE;
 768
 769
 770         /* shared irq, not for us */
 771
 772         if (!ath9k_hw_intrpend(ah))
 773                 return IRQ_NONE;
 774
 775         /*
 776          * Figure out the reason(s) for the interrupt.  Note
 777          * that the hal returns a pseudo-ISR that may include
 778          * bits we haven't explicitly enabled so we mask the
 779          * value to insure we only process bits we requested.
 780          */
 781         ath9k_hw_getisr(ah, &status);   /* NB: clears ISR too */
 782         status &= ah->imask;    /* discard unasked-for bits */
 783
 784         /*
 785          * If there are no status bits set, then this interrupt was not
 786          * for me (should have been caught above).
 787          */
 788         if (!status)
 789                 return IRQ_NONE;
 790
 791         /* Cache the status */
 792         sc->intrstatus = status;
 793
 794         if (status & SCHED_INTR)
 795                 sched = true;
 796
 797         /*
 798          * If a FATAL or RXORN interrupt is received, we have to reset the
 799          * chip immediately.
 800          */
 801         if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
 802             !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
 803                 goto chip_reset;
 804
 805         if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
 806             (status & ATH9K_INT_BB_WATCHDOG)) {
 807
 808                 spin_lock(&common->cc_lock);
 809                 ath_hw_cycle_counters_update(common);
 810                 ar9003_hw_bb_watchdog_dbg_info(ah);
 811                 spin_unlock(&common->cc_lock);
 812
 813                 goto chip_reset;
 814         }
 815
 816         if (status & ATH9K_INT_SWBA)
 817                 tasklet_schedule(&sc->bcon_tasklet);
 818
 819         if (status & ATH9K_INT_TXURN)
 820                 ath9k_hw_updatetxtriglevel(ah, true);
 821
 822         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
 823                 if (status & ATH9K_INT_RXEOL) {
 824                         ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 825                         ath9k_hw_set_interrupts(ah, ah->imask);
 826                 }
 827         }
 828
 829         if (status & ATH9K_INT_MIB) {
 830                 /*
 831                  * Disable interrupts until we service the MIB
 832                  * interrupt; otherwise it will continue to
 833                  * fire.
 834                  */
 835                 ath9k_hw_disable_interrupts(ah);
 836                 /*
 837                  * Let the hal handle the event. We assume
 838                  * it will clear whatever condition caused
 839                  * the interrupt.
 840                  */
 841                 spin_lock(&common->cc_lock);
 842                 ath9k_hw_proc_mib_event(ah);
 843                 spin_unlock(&common->cc_lock);
 844                 ath9k_hw_enable_interrupts(ah);
 845         }
 846
 847         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
 848                 if (status & ATH9K_INT_TIM_TIMER) {
 849                         if (ATH_DBG_WARN_ON_ONCE(sc->ps_idle))
 850                                 goto chip_reset;
 851                         /* Clear RxAbort bit so that we can
 852                          * receive frames */
 853                         ath9k_setpower(sc, ATH9K_PM_AWAKE);
 854                         ath9k_hw_setrxabort(sc->sc_ah, 0);
 855                         sc->ps_flags |= PS_WAIT_FOR_BEACON;
 856                 }
 857
 858 chip_reset:
 859
 860         ath_debug_stat_interrupt(sc, status);
 861
 862         if (sched) {
 863                 /* turn off every interrupt */
 864                 ath9k_hw_disable_interrupts(ah);
 865                 tasklet_schedule(&sc->intr_tq);
 866         }
 867
 868         return IRQ_HANDLED;
 869
 870 #undef SCHED_INTR
 871 }
 872
 873 static void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
 874 {
 875         struct ath_hw *ah = sc->sc_ah;
 876         struct ath_common *common = ath9k_hw_common(ah);
 877         struct ieee80211_channel *channel = hw->conf.channel;
 878         int r;
 879
 880         ath9k_ps_wakeup(sc);
 881         spin_lock_bh(&sc->sc_pcu_lock);
 882
 883         ath9k_hw_configpcipowersave(ah, 0, 0);
 884
 885         if (!ah->curchan)
 886                 ah->curchan = ath9k_cmn_get_curchannel(sc->hw, ah);
 887
 888         r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
 889         if (r) {
 890                 ath_err(common,
 891                         "Unable to reset channel (%u MHz), reset status %d\n",
 892                         channel->center_freq, r);
 893         }
 894
 895         ath9k_cmn_update_txpow(ah, sc->curtxpow,
 896                                sc->config.txpowlimit, &sc->curtxpow);
 897         if (ath_startrecv(sc) != 0) {
 898                 ath_err(common, "Unable to restart recv logic\n");
 899                 goto out;
 900         }
 901         if (sc->sc_flags & SC_OP_BEACONS)
 902                 ath_set_beacon(sc);     /* restart beacons */
 903
 904         /* Re-Enable  interrupts */
 905         ath9k_hw_set_interrupts(ah, ah->imask);
 906
 907         /* Enable LED */
 908         ath9k_hw_cfg_output(ah, ah->led_pin,
 909                             AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
 910         ath9k_hw_set_gpio(ah, ah->led_pin, 0);
 911
 912         ieee80211_wake_queues(hw);
 913         ieee80211_queue_delayed_work(hw, &sc->hw_pll_work, HZ/2);
 914
 915 out:
 916         spin_unlock_bh(&sc->sc_pcu_lock);
 917
 918         ath9k_ps_restore(sc);
 919 }
 920
 921 void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
 922 {
 923         struct ath_hw *ah = sc->sc_ah;
 924         struct ieee80211_channel *channel = hw->conf.channel;
 925         int r;
 926
 927         ath9k_ps_wakeup(sc);
 928         cancel_delayed_work_sync(&sc->hw_pll_work);
 929
 930         spin_lock_bh(&sc->sc_pcu_lock);
 931
 932         ieee80211_stop_queues(hw);
 933
 934         /*
 935          * Keep the LED on when the radio is disabled
 936          * during idle unassociated state.
 937          */
 938         if (!sc->ps_idle) {
 939                 ath9k_hw_set_gpio(ah, ah->led_pin, 1);
 940                 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
 941         }
 942
 943         /* Disable interrupts */
 944         ath9k_hw_disable_interrupts(ah);
 945
 946         ath_drain_all_txq(sc, false);   /* clear pending tx frames */
 947
 948         ath_stoprecv(sc);               /* turn off frame recv */
 949         ath_flushrecv(sc);              /* flush recv queue */
 950
 951         if (!ah->curchan)
 952                 ah->curchan = ath9k_cmn_get_curchannel(hw, ah);
 953
 954         r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
 955         if (r) {
 956                 ath_err(ath9k_hw_common(sc->sc_ah),
 957                         "Unable to reset channel (%u MHz), reset status %d\n",
 958                         channel->center_freq, r);
 959         }
 960
 961         ath9k_hw_phy_disable(ah);
 962
 963         ath9k_hw_configpcipowersave(ah, 1, 1);
 964
 965         spin_unlock_bh(&sc->sc_pcu_lock);
 966         ath9k_ps_restore(sc);
 967 }
 968
 969 int ath_reset(struct ath_softc *sc, bool retry_tx)
 970 {
 971         struct ath_hw *ah = sc->sc_ah;
 972         struct ath_common *common = ath9k_hw_common(ah);
 973         struct ieee80211_hw *hw = sc->hw;
 974         int r;
 975
 976         sc->hw_busy_count = 0;
 977
 978         /* Stop ANI */
 979
 980         del_timer_sync(&common->ani.timer);
 981
 982         ath9k_ps_wakeup(sc);
 983         spin_lock_bh(&sc->sc_pcu_lock);
 984
 985         ieee80211_stop_queues(hw);
 986
 987         ath9k_hw_disable_interrupts(ah);
 988         ath_drain_all_txq(sc, retry_tx);
 989
 990         ath_stoprecv(sc);
 991         ath_flushrecv(sc);
 992
 993         r = ath9k_hw_reset(ah, sc->sc_ah->curchan, ah->caldata, false);
 994         if (r)
 995                 ath_err(common,
 996                         "Unable to reset hardware; reset status %d\n", r);
 997
 998         if (ath_startrecv(sc) != 0)
 999                 ath_err(common, "Unable to start recv logic\n");
1000
1001         /*
1002          * We may be doing a reset in response to a request
1003          * that changes the channel so update any state that
1004          * might change as a result.
1005          */
1006         ath9k_cmn_update_txpow(ah, sc->curtxpow,
1007                                sc->config.txpowlimit, &sc->curtxpow);
1008
1009         if ((sc->sc_flags & SC_OP_BEACONS) || !(sc->sc_flags & (SC_OP_OFFCHANNEL)))
1010                 ath_set_beacon(sc);     /* restart beacons */
1011
1012         ath9k_hw_set_interrupts(ah, ah->imask);
1013
1014         if (retry_tx) {
1015                 int i;
1016                 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
1017                         if (ATH_TXQ_SETUP(sc, i)) {
1018                                 spin_lock_bh(&sc->tx.txq[i].axq_lock);
1019                                 ath_txq_schedule(sc, &sc->tx.txq[i]);
1020                                 spin_unlock_bh(&sc->tx.txq[i].axq_lock);
1021                         }
1022                 }
1023         }
1024
1025         ieee80211_wake_queues(hw);
1026         spin_unlock_bh(&sc->sc_pcu_lock);
1027
1028         /* Start ANI */
1029         if (!common->disable_ani)
1030                 ath_start_ani(common);
1031
1032         ath9k_ps_restore(sc);
1033
1034         return r;
1035 }
1036
1037 /**********************/
1038 /* mac80211 callbacks */
1039 /**********************/
1040
1041 static int ath9k_start(struct ieee80211_hw *hw)
1042 {
1043         struct ath_softc *sc = hw->priv;
1044         struct ath_hw *ah = sc->sc_ah;
1045         struct ath_common *common = ath9k_hw_common(ah);
1046         struct ieee80211_channel *curchan = hw->conf.channel;
1047         struct ath9k_channel *init_channel;
1048         int r;
1049
1050         ath_dbg(common, ATH_DBG_CONFIG,
1051                 "Starting driver with initial channel: %d MHz\n",
1052                 curchan->center_freq);
1053
1054         ath9k_ps_wakeup(sc);
1055
1056         mutex_lock(&sc->mutex);
1057
1058         /* setup initial channel */
1059         sc->chan_idx = curchan->hw_value;
1060
1061         init_channel = ath9k_cmn_get_curchannel(hw, ah);
1062
1063         /* Reset SERDES registers */
1064         ath9k_hw_configpcipowersave(ah, 0, 0);
1065
1066         /*
1067          * The basic interface to setting the hardware in a good
1068          * state is ``reset''.  On return the hardware is known to
1069          * be powered up and with interrupts disabled.  This must
1070          * be followed by initialization of the appropriate bits
1071          * and then setup of the interrupt mask.
1072          */
1073         spin_lock_bh(&sc->sc_pcu_lock);
1074         r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
1075         if (r) {
1076                 ath_err(common,
1077                         "Unable to reset hardware; reset status %d (freq %u MHz)\n",
1078                         r, curchan->center_freq);
1079                 spin_unlock_bh(&sc->sc_pcu_lock);
1080                 goto mutex_unlock;
1081         }
1082
1083         /*
1084          * This is needed only to setup initial state
1085          * but it's best done after a reset.
1086          */
1087         ath9k_cmn_update_txpow(ah, sc->curtxpow,
1088                         sc->config.txpowlimit, &sc->curtxpow);
1089
1090         /*
1091          * Setup the hardware after reset:
1092          * The receive engine is set going.
1093          * Frame transmit is handled entirely
1094          * in the frame output path; there's nothing to do
1095          * here except setup the interrupt mask.
1096          */
1097         if (ath_startrecv(sc) != 0) {
1098                 ath_err(common, "Unable to start recv logic\n");
1099                 r = -EIO;
1100                 spin_unlock_bh(&sc->sc_pcu_lock);
1101                 goto mutex_unlock;
1102         }
1103         spin_unlock_bh(&sc->sc_pcu_lock);
1104
1105         /* Setup our intr mask. */
1106         ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
1107                     ATH9K_INT_RXORN | ATH9K_INT_FATAL |
1108                     ATH9K_INT_GLOBAL;
1109
1110         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
1111                 ah->imask |= ATH9K_INT_RXHP |
1112                              ATH9K_INT_RXLP |
1113                              ATH9K_INT_BB_WATCHDOG;
1114         else
1115                 ah->imask |= ATH9K_INT_RX;
1116
1117         ah->imask |= ATH9K_INT_GTT;
1118
1119         if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
1120                 ah->imask |= ATH9K_INT_CST;
1121
1122         sc->sc_flags &= ~SC_OP_INVALID;
1123         sc->sc_ah->is_monitoring = false;
1124
1125         /* Disable BMISS interrupt when we're not associated */
1126         ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
1127         ath9k_hw_set_interrupts(ah, ah->imask);
1128
1129         ieee80211_wake_queues(hw);
1130
1131         ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
1132
1133         if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
1134             !ah->btcoex_hw.enabled) {
1135                 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
1136                                            AR_STOMP_LOW_WLAN_WGHT);
1137                 ath9k_hw_btcoex_enable(ah);
1138
1139                 if (common->bus_ops->bt_coex_prep)
1140                         common->bus_ops->bt_coex_prep(common);
1141                 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1142                         ath9k_btcoex_timer_resume(sc);
1143         }
1144
1145         if (ah->caps.pcie_lcr_extsync_en && common->bus_ops->extn_synch_en)
1146                 common->bus_ops->extn_synch_en(common);
1147
1148 mutex_unlock:
1149         mutex_unlock(&sc->mutex);
1150
1151         ath9k_ps_restore(sc);
1152
1153         return r;
1154 }
1155
1156 static void ath9k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
1157 {
1158         struct ath_softc *sc = hw->priv;
1159         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1160         struct ath_tx_control txctl;
1161         struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1162
1163         if (sc->ps_enabled) {
1164                 /*
1165                  * mac80211 does not set PM field for normal data frames, so we
1166                  * need to update that based on the current PS mode.
1167                  */
1168                 if (ieee80211_is_data(hdr->frame_control) &&
1169                     !ieee80211_is_nullfunc(hdr->frame_control) &&
1170                     !ieee80211_has_pm(hdr->frame_control)) {
1171                         ath_dbg(common, ATH_DBG_PS,
1172                                 "Add PM=1 for a TX frame while in PS mode\n");
1173                         hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1174                 }
1175         }
1176
1177         if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
1178                 /*
1179                  * We are using PS-Poll and mac80211 can request TX while in
1180                  * power save mode. Need to wake up hardware for the TX to be
1181                  * completed and if needed, also for RX of buffered frames.
1182                  */
1183                 ath9k_ps_wakeup(sc);
1184                 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
1185                         ath9k_hw_setrxabort(sc->sc_ah, 0);
1186                 if (ieee80211_is_pspoll(hdr->frame_control)) {
1187                         ath_dbg(common, ATH_DBG_PS,
1188                                 "Sending PS-Poll to pick a buffered frame\n");
1189                         sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
1190                 } else {
1191                         ath_dbg(common, ATH_DBG_PS,
1192                                 "Wake up to complete TX\n");
1193                         sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
1194                 }
1195                 /*
1196                  * The actual restore operation will happen only after
1197                  * the sc_flags bit is cleared. We are just dropping
1198                  * the ps_usecount here.
1199                  */
1200                 ath9k_ps_restore(sc);
1201         }
1202
1203         memset(&txctl, 0, sizeof(struct ath_tx_control));
1204         txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
1205
1206         ath_dbg(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
1207
1208         if (ath_tx_start(hw, skb, &txctl) != 0) {
1209                 ath_dbg(common, ATH_DBG_XMIT, "TX failed\n");
1210                 goto exit;
1211         }
1212
1213         return;
1214 exit:
1215         dev_kfree_skb_any(skb);
1216 }
1217
1218 static void ath9k_stop(struct ieee80211_hw *hw)
1219 {
1220         struct ath_softc *sc = hw->priv;
1221         struct ath_hw *ah = sc->sc_ah;
1222         struct ath_common *common = ath9k_hw_common(ah);
1223
1224         mutex_lock(&sc->mutex);
1225
1226         cancel_delayed_work_sync(&sc->tx_complete_work);
1227         cancel_delayed_work_sync(&sc->hw_pll_work);
1228         cancel_work_sync(&sc->paprd_work);
1229         cancel_work_sync(&sc->hw_check_work);
1230
1231         if (sc->sc_flags & SC_OP_INVALID) {
1232                 ath_dbg(common, ATH_DBG_ANY, "Device not present\n");
1233                 mutex_unlock(&sc->mutex);
1234                 return;
1235         }
1236
1237         /* Ensure HW is awake when we try to shut it down. */
1238         ath9k_ps_wakeup(sc);
1239
1240         if (ah->btcoex_hw.enabled) {
1241                 ath9k_hw_btcoex_disable(ah);
1242                 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1243                         ath9k_btcoex_timer_pause(sc);
1244         }
1245
1246         spin_lock_bh(&sc->sc_pcu_lock);
1247
1248         /* prevent tasklets to enable interrupts once we disable them */
1249         ah->imask &= ~ATH9K_INT_GLOBAL;
1250
1251         /* make sure h/w will not generate any interrupt
1252          * before setting the invalid flag. */
1253         ath9k_hw_disable_interrupts(ah);
1254
1255         if (!(sc->sc_flags & SC_OP_INVALID)) {
1256                 ath_drain_all_txq(sc, false);
1257                 ath_stoprecv(sc);
1258                 ath9k_hw_phy_disable(ah);
1259         } else
1260                 sc->rx.rxlink = NULL;
1261
1262         if (sc->rx.frag) {
1263                 dev_kfree_skb_any(sc->rx.frag);
1264                 sc->rx.frag = NULL;
1265         }
1266
1267         /* disable HAL and put h/w to sleep */
1268         ath9k_hw_disable(ah);
1269
1270         spin_unlock_bh(&sc->sc_pcu_lock);
1271
1272         /* we can now sync irq and kill any running tasklets, since we already
1273          * disabled interrupts and not holding a spin lock */
1274         synchronize_irq(sc->irq);
1275         tasklet_kill(&sc->intr_tq);
1276         tasklet_kill(&sc->bcon_tasklet);
1277
1278         ath9k_ps_restore(sc);
1279
1280         sc->ps_idle = true;
1281         ath_radio_disable(sc, hw);
1282
1283         sc->sc_flags |= SC_OP_INVALID;
1284
1285         mutex_unlock(&sc->mutex);
1286
1287         ath_dbg(common, ATH_DBG_CONFIG, "Driver halt\n");
1288 }
1289
1290 bool ath9k_uses_beacons(int type)
1291 {
1292         switch (type) {
1293         case NL80211_IFTYPE_AP:
1294         case NL80211_IFTYPE_ADHOC:
1295         case NL80211_IFTYPE_MESH_POINT:
1296                 return true;
1297         default:
1298                 return false;
1299         }
1300 }
1301
1302 static void ath9k_reclaim_beacon(struct ath_softc *sc,
1303                                  struct ieee80211_vif *vif)
1304 {
1305         struct ath_vif *avp = (void *)vif->drv_priv;
1306
1307         ath9k_set_beaconing_status(sc, false);
1308         ath_beacon_return(sc, avp);
1309         ath9k_set_beaconing_status(sc, true);
1310         sc->sc_flags &= ~SC_OP_BEACONS;
1311 }
1312
1313 static void ath9k_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
1314 {
1315         struct ath9k_vif_iter_data *iter_data = data;
1316         int i;
1317
1318         if (iter_data->hw_macaddr)
1319                 for (i = 0; i < ETH_ALEN; i++)
1320                         iter_data->mask[i] &=
1321                                 ~(iter_data->hw_macaddr[i] ^ mac[i]);
1322
1323         switch (vif->type) {
1324         case NL80211_IFTYPE_AP:
1325                 iter_data->naps++;
1326                 break;
1327         case NL80211_IFTYPE_STATION:
1328                 iter_data->nstations++;
1329                 break;
1330         case NL80211_IFTYPE_ADHOC:
1331                 iter_data->nadhocs++;
1332                 break;
1333         case NL80211_IFTYPE_MESH_POINT:
1334                 iter_data->nmeshes++;
1335                 break;
1336         case NL80211_IFTYPE_WDS:
1337                 iter_data->nwds++;
1338                 break;
1339         default:
1340                 iter_data->nothers++;
1341                 break;
1342         }
1343 }
1344
1345 /* Called with sc->mutex held. */
1346 void ath9k_calculate_iter_data(struct ieee80211_hw *hw,
1347                                struct ieee80211_vif *vif,
1348                                struct ath9k_vif_iter_data *iter_data)
1349 {
1350         struct ath_softc *sc = hw->priv;
1351         struct ath_hw *ah = sc->sc_ah;
1352         struct ath_common *common = ath9k_hw_common(ah);
1353
1354         /*
1355          * Use the hardware MAC address as reference, the hardware uses it
1356          * together with the BSSID mask when matching addresses.
1357          */
1358         memset(iter_data, 0, sizeof(*iter_data));
1359         iter_data->hw_macaddr = common->macaddr;
1360         memset(&iter_data->mask, 0xff, ETH_ALEN);
1361
1362         if (vif)
1363                 ath9k_vif_iter(iter_data, vif->addr, vif);
1364
1365         /* Get list of all active MAC addresses */
1366         ieee80211_iterate_active_interfaces_atomic(sc->hw, ath9k_vif_iter,
1367                                                    iter_data);
1368 }
1369
1370 /* Called with sc->mutex held. */
1371 static void ath9k_calculate_summary_state(struct ieee80211_hw *hw,
1372                                           struct ieee80211_vif *vif)
1373 {
1374         struct ath_softc *sc = hw->priv;
1375         struct ath_hw *ah = sc->sc_ah;
1376         struct ath_common *common = ath9k_hw_common(ah);
1377         struct ath9k_vif_iter_data iter_data;
1378
1379         ath9k_calculate_iter_data(hw, vif, &iter_data);
1380
1381         /* Set BSSID mask. */
1382         memcpy(common->bssidmask, iter_data.mask, ETH_ALEN);
1383         ath_hw_setbssidmask(common);
1384
1385         /* Set op-mode & TSF */
1386         if (iter_data.naps > 0) {
1387                 ath9k_hw_set_tsfadjust(ah, 1);
1388                 sc->sc_flags |= SC_OP_TSF_RESET;
1389                 ah->opmode = NL80211_IFTYPE_AP;
1390         } else {
1391                 ath9k_hw_set_tsfadjust(ah, 0);
1392                 sc->sc_flags &= ~SC_OP_TSF_RESET;
1393
1394                 if (iter_data.nmeshes)
1395                         ah->opmode = NL80211_IFTYPE_MESH_POINT;
1396                 else if (iter_data.nwds)
1397                         ah->opmode = NL80211_IFTYPE_AP;
1398                 else if (iter_data.nadhocs)
1399                         ah->opmode = NL80211_IFTYPE_ADHOC;
1400                 else
1401                         ah->opmode = NL80211_IFTYPE_STATION;
1402         }
1403
1404         /*
1405          * Enable MIB interrupts when there are hardware phy counters.
1406          */
1407         if ((iter_data.nstations + iter_data.nadhocs + iter_data.nmeshes) > 0) {
1408                 if (ah->config.enable_ani)
1409                         ah->imask |= ATH9K_INT_MIB;
1410                 ah->imask |= ATH9K_INT_TSFOOR;
1411         } else {
1412                 ah->imask &= ~ATH9K_INT_MIB;
1413                 ah->imask &= ~ATH9K_INT_TSFOOR;
1414         }
1415
1416         ath9k_hw_set_interrupts(ah, ah->imask);
1417
1418         /* Set up ANI */
1419         if (iter_data.naps > 0) {
1420                 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
1421
1422                 if (!common->disable_ani) {
1423                         sc->sc_flags |= SC_OP_ANI_RUN;
1424                         ath_start_ani(common);
1425                 }
1426
1427         } else {
1428                 sc->sc_flags &= ~SC_OP_ANI_RUN;
1429                 del_timer_sync(&common->ani.timer);
1430         }
1431 }
1432
1433 /* Called with sc->mutex held, vif counts set up properly. */
1434 static void ath9k_do_vif_add_setup(struct ieee80211_hw *hw,
1435                                    struct ieee80211_vif *vif)
1436 {
1437         struct ath_softc *sc = hw->priv;
1438
1439         ath9k_calculate_summary_state(hw, vif);
1440
1441         if (ath9k_uses_beacons(vif->type)) {
1442                 int error;
1443                 /* This may fail because upper levels do not have beacons
1444                  * properly configured yet.  That's OK, we assume it
1445                  * will be properly configured and then we will be notified
1446                  * in the info_changed method and set up beacons properly
1447                  * there.
1448                  */
1449                 ath9k_set_beaconing_status(sc, false);
1450                 error = ath_beacon_alloc(sc, vif);
1451                 if (!error)
1452                         ath_beacon_config(sc, vif);
1453                 ath9k_set_beaconing_status(sc, true);
1454         }
1455 }
1456
1457
1458 static int ath9k_add_interface(struct ieee80211_hw *hw,
1459                                struct ieee80211_vif *vif)
1460 {
1461         struct ath_softc *sc = hw->priv;
1462         struct ath_hw *ah = sc->sc_ah;
1463         struct ath_common *common = ath9k_hw_common(ah);
1464         int ret = 0;
1465
1466         ath9k_ps_wakeup(sc);
1467         mutex_lock(&sc->mutex);
1468
1469         switch (vif->type) {
1470         case NL80211_IFTYPE_STATION:
1471         case NL80211_IFTYPE_WDS:
1472         case NL80211_IFTYPE_ADHOC:
1473         case NL80211_IFTYPE_AP:
1474         case NL80211_IFTYPE_MESH_POINT:
1475                 break;
1476         default:
1477                 ath_err(common, "Interface type %d not yet supported\n",
1478                         vif->type);
1479                 ret = -EOPNOTSUPP;
1480                 goto out;
1481         }
1482
1483         if (ath9k_uses_beacons(vif->type)) {
1484                 if (sc->nbcnvifs >= ATH_BCBUF) {
1485                         ath_err(common, "Not enough beacon buffers when adding"
1486                                 " new interface of type: %i\n",
1487                                 vif->type);
1488                         ret = -ENOBUFS;
1489                         goto out;
1490                 }
1491         }
1492
1493         if ((ah->opmode == NL80211_IFTYPE_ADHOC) ||
1494             ((vif->type == NL80211_IFTYPE_ADHOC) &&
1495              sc->nvifs > 0)) {
1496                 ath_err(common, "Cannot create ADHOC interface when other"
1497                         " interfaces already exist.\n");
1498                 ret = -EINVAL;
1499                 goto out;
1500         }
1501
1502         ath_dbg(common, ATH_DBG_CONFIG,
1503                 "Attach a VIF of type: %d\n", vif->type);
1504
1505         sc->nvifs++;
1506
1507         ath9k_do_vif_add_setup(hw, vif);
1508 out:
1509         mutex_unlock(&sc->mutex);
1510         ath9k_ps_restore(sc);
1511         return ret;
1512 }
1513
1514 static int ath9k_change_interface(struct ieee80211_hw *hw,
1515                                   struct ieee80211_vif *vif,
1516                                   enum nl80211_iftype new_type,
1517                                   bool p2p)
1518 {
1519         struct ath_softc *sc = hw->priv;
1520         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1521         int ret = 0;
1522
1523         ath_dbg(common, ATH_DBG_CONFIG, "Change Interface\n");
1524         mutex_lock(&sc->mutex);
1525         ath9k_ps_wakeup(sc);
1526
1527         /* See if new interface type is valid. */
1528         if ((new_type == NL80211_IFTYPE_ADHOC) &&
1529             (sc->nvifs > 1)) {
1530                 ath_err(common, "When using ADHOC, it must be the only"
1531                         " interface.\n");
1532                 ret = -EINVAL;
1533                 goto out;
1534         }
1535
1536         if (ath9k_uses_beacons(new_type) &&
1537             !ath9k_uses_beacons(vif->type)) {
1538                 if (sc->nbcnvifs >= ATH_BCBUF) {
1539                         ath_err(common, "No beacon slot available\n");
1540                         ret = -ENOBUFS;
1541                         goto out;
1542                 }
1543         }
1544
1545         /* Clean up old vif stuff */
1546         if (ath9k_uses_beacons(vif->type))
1547                 ath9k_reclaim_beacon(sc, vif);
1548
1549         /* Add new settings */
1550         vif->type = new_type;
1551         vif->p2p = p2p;
1552
1553         ath9k_do_vif_add_setup(hw, vif);
1554 out:
1555         ath9k_ps_restore(sc);
1556         mutex_unlock(&sc->mutex);
1557         return ret;
1558 }
1559
1560 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1561                                    struct ieee80211_vif *vif)
1562 {
1563         struct ath_softc *sc = hw->priv;
1564         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1565
1566         ath_dbg(common, ATH_DBG_CONFIG, "Detach Interface\n");
1567
1568         ath9k_ps_wakeup(sc);
1569         mutex_lock(&sc->mutex);
1570
1571         sc->nvifs--;
1572
1573         /* Reclaim beacon resources */
1574         if (ath9k_uses_beacons(vif->type))
1575                 ath9k_reclaim_beacon(sc, vif);
1576
1577         ath9k_calculate_summary_state(hw, NULL);
1578
1579         mutex_unlock(&sc->mutex);
1580         ath9k_ps_restore(sc);
1581 }
1582
1583 static void ath9k_enable_ps(struct ath_softc *sc)
1584 {
1585         struct ath_hw *ah = sc->sc_ah;
1586
1587         sc->ps_enabled = true;
1588         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1589                 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1590                         ah->imask |= ATH9K_INT_TIM_TIMER;
1591                         ath9k_hw_set_interrupts(ah, ah->imask);
1592                 }
1593                 ath9k_hw_setrxabort(ah, 1);
1594         }
1595 }
1596
1597 static void ath9k_disable_ps(struct ath_softc *sc)
1598 {
1599         struct ath_hw *ah = sc->sc_ah;
1600
1601         sc->ps_enabled = false;
1602         ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
1603         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1604                 ath9k_hw_setrxabort(ah, 0);
1605                 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1606                                   PS_WAIT_FOR_CAB |
1607                                   PS_WAIT_FOR_PSPOLL_DATA |
1608                                   PS_WAIT_FOR_TX_ACK);
1609                 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1610                         ah->imask &= ~ATH9K_INT_TIM_TIMER;
1611                         ath9k_hw_set_interrupts(ah, ah->imask);
1612                 }
1613         }
1614
1615 }
1616
1617 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1618 {
1619         struct ath_softc *sc = hw->priv;
1620         struct ath_hw *ah = sc->sc_ah;
1621         struct ath_common *common = ath9k_hw_common(ah);
1622         struct ieee80211_conf *conf = &hw->conf;
1623         bool disable_radio = false;
1624
1625         mutex_lock(&sc->mutex);
1626
1627         /*
1628          * Leave this as the first check because we need to turn on the
1629          * radio if it was disabled before prior to processing the rest
1630          * of the changes. Likewise we must only disable the radio towards
1631          * the end.
1632          */
1633         if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1634                 sc->ps_idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1635                 if (!sc->ps_idle) {
1636                         ath_radio_enable(sc, hw);
1637                         ath_dbg(common, ATH_DBG_CONFIG,
1638                                 "not-idle: enabling radio\n");
1639                 } else {
1640                         disable_radio = true;
1641                 }
1642         }
1643
1644         /*
1645          * We just prepare to enable PS. We have to wait until our AP has
1646          * ACK'd our null data frame to disable RX otherwise we'll ignore
1647          * those ACKs and end up retransmitting the same null data frames.
1648          * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1649          */
1650         if (changed & IEEE80211_CONF_CHANGE_PS) {
1651                 unsigned long flags;
1652                 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1653                 if (conf->flags & IEEE80211_CONF_PS)
1654                         ath9k_enable_ps(sc);
1655                 else
1656                         ath9k_disable_ps(sc);
1657                 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1658         }
1659
1660         if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1661                 if (conf->flags & IEEE80211_CONF_MONITOR) {
1662                         ath_dbg(common, ATH_DBG_CONFIG,
1663                                 "Monitor mode is enabled\n");
1664                         sc->sc_ah->is_monitoring = true;
1665                 } else {
1666                         ath_dbg(common, ATH_DBG_CONFIG,
1667                                 "Monitor mode is disabled\n");
1668                         sc->sc_ah->is_monitoring = false;
1669                 }
1670         }
1671
1672         if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
1673                 struct ieee80211_channel *curchan = hw->conf.channel;
1674                 int pos = curchan->hw_value;
1675                 int old_pos = -1;
1676                 unsigned long flags;
1677
1678                 if (ah->curchan)
1679                         old_pos = ah->curchan - &ah->channels[0];
1680
1681                 if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
1682                         sc->sc_flags |= SC_OP_OFFCHANNEL;
1683                 else
1684                         sc->sc_flags &= ~SC_OP_OFFCHANNEL;
1685
1686                 ath_dbg(common, ATH_DBG_CONFIG,
1687                         "Set channel: %d MHz type: %d\n",
1688                         curchan->center_freq, conf->channel_type);
1689
1690                 ath9k_cmn_update_ichannel(&sc->sc_ah->channels[pos],
1691                                           curchan, conf->channel_type);
1692
1693                 /* update survey stats for the old channel before switching */
1694                 spin_lock_irqsave(&common->cc_lock, flags);
1695                 ath_update_survey_stats(sc);
1696                 spin_unlock_irqrestore(&common->cc_lock, flags);
1697
1698                 /*
1699                  * If the operating channel changes, change the survey in-use flags
1700                  * along with it.
1701                  * Reset the survey data for the new channel, unless we're switching
1702                  * back to the operating channel from an off-channel operation.
1703                  */
1704                 if (!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) &&
1705                     sc->cur_survey != &sc->survey[pos]) {
1706
1707                         if (sc->cur_survey)
1708                                 sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE;
1709
1710                         sc->cur_survey = &sc->survey[pos];
1711
1712                         memset(sc->cur_survey, 0, sizeof(struct survey_info));
1713                         sc->cur_survey->filled |= SURVEY_INFO_IN_USE;
1714                 } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) {
1715                         memset(&sc->survey[pos], 0, sizeof(struct survey_info));
1716                 }
1717
1718                 if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
1719                         ath_err(common, "Unable to set channel\n");
1720                         mutex_unlock(&sc->mutex);
1721                         return -EINVAL;
1722                 }
1723
1724                 /*
1725                  * The most recent snapshot of channel->noisefloor for the old
1726                  * channel is only available after the hardware reset. Copy it to
1727                  * the survey stats now.
1728                  */
1729                 if (old_pos >= 0)
1730                         ath_update_survey_nf(sc, old_pos);
1731         }
1732
1733         if (changed & IEEE80211_CONF_CHANGE_POWER) {
1734                 ath_dbg(common, ATH_DBG_CONFIG,
1735                         "Set power: %d\n", conf->power_level);
1736                 sc->config.txpowlimit = 2 * conf->power_level;
1737                 ath9k_ps_wakeup(sc);
1738                 ath9k_cmn_update_txpow(ah, sc->curtxpow,
1739                                        sc->config.txpowlimit, &sc->curtxpow);
1740                 ath9k_ps_restore(sc);
1741         }
1742
1743         if (disable_radio) {
1744                 ath_dbg(common, ATH_DBG_CONFIG, "idle: disabling radio\n");
1745                 ath_radio_disable(sc, hw);
1746         }
1747
1748         mutex_unlock(&sc->mutex);
1749
1750         return 0;
1751 }
1752
1753 #define SUPPORTED_FILTERS                       \
1754         (FIF_PROMISC_IN_BSS |                   \
1755         FIF_ALLMULTI |                          \
1756         FIF_CONTROL |                           \
1757         FIF_PSPOLL |                            \
1758         FIF_OTHER_BSS |                         \
1759         FIF_BCN_PRBRESP_PROMISC |               \
1760         FIF_PROBE_REQ |                         \
1761         FIF_FCSFAIL)
1762
1763 /* FIXME: sc->sc_full_reset ? */
1764 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1765                                    unsigned int changed_flags,
1766                                    unsigned int *total_flags,
1767                                    u64 multicast)
1768 {
1769         struct ath_softc *sc = hw->priv;
1770         u32 rfilt;
1771
1772         changed_flags &= SUPPORTED_FILTERS;
1773         *total_flags &= SUPPORTED_FILTERS;
1774
1775         sc->rx.rxfilter = *total_flags;
1776         ath9k_ps_wakeup(sc);
1777         rfilt = ath_calcrxfilter(sc);
1778         ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1779         ath9k_ps_restore(sc);
1780
1781         ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
1782                 "Set HW RX filter: 0x%x\n", rfilt);
1783 }
1784
1785 static int ath9k_sta_add(struct ieee80211_hw *hw,
1786                          struct ieee80211_vif *vif,
1787                          struct ieee80211_sta *sta)
1788 {
1789         struct ath_softc *sc = hw->priv;
1790         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1791         struct ath_node *an = (struct ath_node *) sta->drv_priv;
1792         struct ieee80211_key_conf ps_key = { };
1793
1794         ath_node_attach(sc, sta);
1795
1796         if (vif->type != NL80211_IFTYPE_AP &&
1797             vif->type != NL80211_IFTYPE_AP_VLAN)
1798                 return 0;
1799
1800         an->ps_key = ath_key_config(common, vif, sta, &ps_key);
1801
1802         return 0;
1803 }
1804
1805 static void ath9k_del_ps_key(struct ath_softc *sc,
1806                              struct ieee80211_vif *vif,
1807                              struct ieee80211_sta *sta)
1808 {
1809         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1810         struct ath_node *an = (struct ath_node *) sta->drv_priv;
1811         struct ieee80211_key_conf ps_key = { .hw_key_idx = an->ps_key };
1812
1813         if (!an->ps_key)
1814             return;
1815
1816         ath_key_delete(common, &ps_key);
1817 }
1818
1819 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1820                             struct ieee80211_vif *vif,
1821                             struct ieee80211_sta *sta)
1822 {
1823         struct ath_softc *sc = hw->priv;
1824
1825         ath9k_del_ps_key(sc, vif, sta);
1826         ath_node_detach(sc, sta);
1827
1828         return 0;
1829 }
1830
1831 static void ath9k_sta_notify(struct ieee80211_hw *hw,
1832                          struct ieee80211_vif *vif,
1833                          enum sta_notify_cmd cmd,
1834                          struct ieee80211_sta *sta)
1835 {
1836         struct ath_softc *sc = hw->priv;
1837         struct ath_node *an = (struct ath_node *) sta->drv_priv;
1838
1839         switch (cmd) {
1840         case STA_NOTIFY_SLEEP:
1841                 an->sleeping = true;
1842                 if (ath_tx_aggr_sleep(sc, an))
1843                         ieee80211_sta_set_tim(sta);
1844                 break;
1845         case STA_NOTIFY_AWAKE:
1846                 an->sleeping = false;
1847                 ath_tx_aggr_wakeup(sc, an);
1848                 break;
1849         }
1850 }
1851
1852 static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
1853                          const struct ieee80211_tx_queue_params *params)
1854 {
1855         struct ath_softc *sc = hw->priv;
1856         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1857         struct ath_txq *txq;
1858         struct ath9k_tx_queue_info qi;
1859         int ret = 0;
1860
1861         if (queue >= WME_NUM_AC)
1862                 return 0;
1863
1864         txq = sc->tx.txq_map[queue];
1865
1866         ath9k_ps_wakeup(sc);
1867         mutex_lock(&sc->mutex);
1868
1869         memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1870
1871         qi.tqi_aifs = params->aifs;
1872         qi.tqi_cwmin = params->cw_min;
1873         qi.tqi_cwmax = params->cw_max;
1874         qi.tqi_burstTime = params->txop;
1875
1876         ath_dbg(common, ATH_DBG_CONFIG,
1877                 "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1878                 queue, txq->axq_qnum, params->aifs, params->cw_min,
1879                 params->cw_max, params->txop);
1880
1881         ret = ath_txq_update(sc, txq->axq_qnum, &qi);
1882         if (ret)
1883                 ath_err(common, "TXQ Update failed\n");
1884
1885         if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
1886                 if (queue == WME_AC_BE && !ret)
1887                         ath_beaconq_config(sc);
1888
1889         mutex_unlock(&sc->mutex);
1890         ath9k_ps_restore(sc);
1891
1892         return ret;
1893 }
1894
1895 static int ath9k_set_key(struct ieee80211_hw *hw,
1896                          enum set_key_cmd cmd,
1897                          struct ieee80211_vif *vif,
1898                          struct ieee80211_sta *sta,
1899                          struct ieee80211_key_conf *key)
1900 {
1901         struct ath_softc *sc = hw->priv;
1902         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1903         int ret = 0;
1904
1905         if (ath9k_modparam_nohwcrypt)
1906                 return -ENOSPC;
1907
1908         if (vif->type == NL80211_IFTYPE_ADHOC &&
1909             (key->cipher == WLAN_CIPHER_SUITE_TKIP ||
1910              key->cipher == WLAN_CIPHER_SUITE_CCMP) &&
1911             !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) {
1912                 /*
1913                  * For now, disable hw crypto for the RSN IBSS group keys. This
1914                  * could be optimized in the future to use a modified key cache
1915                  * design to support per-STA RX GTK, but until that gets
1916                  * implemented, use of software crypto for group addressed
1917                  * frames is a acceptable to allow RSN IBSS to be used.
1918                  */
1919                 return -EOPNOTSUPP;
1920         }
1921
1922         mutex_lock(&sc->mutex);
1923         ath9k_ps_wakeup(sc);
1924         ath_dbg(common, ATH_DBG_CONFIG, "Set HW Key\n");
1925
1926         switch (cmd) {
1927         case SET_KEY:
1928                 if (sta)
1929                         ath9k_del_ps_key(sc, vif, sta);
1930
1931                 ret = ath_key_config(common, vif, sta, key);
1932                 if (ret >= 0) {
1933                         key->hw_key_idx = ret;
1934                         /* push IV and Michael MIC generation to stack */
1935                         key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1936                         if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
1937                                 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1938                         if (sc->sc_ah->sw_mgmt_crypto &&
1939                             key->cipher == WLAN_CIPHER_SUITE_CCMP)
1940                                 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
1941                         ret = 0;
1942                 }
1943                 break;
1944         case DISABLE_KEY:
1945                 ath_key_delete(common, key);
1946                 break;
1947         default:
1948                 ret = -EINVAL;
1949         }
1950
1951         ath9k_ps_restore(sc);
1952         mutex_unlock(&sc->mutex);
1953
1954         return ret;
1955 }
1956 static void ath9k_bss_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
1957 {
1958         struct ath_softc *sc = data;
1959         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1960         struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
1961         struct ath_vif *avp = (void *)vif->drv_priv;
1962
1963         /*
1964          * Skip iteration if primary station vif's bss info
1965          * was not changed
1966          */
1967         if (sc->sc_flags & SC_OP_PRIM_STA_VIF)
1968                 return;
1969
1970         if (bss_conf->assoc) {
1971                 sc->sc_flags |= SC_OP_PRIM_STA_VIF;
1972                 avp->primary_sta_vif = true;
1973                 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1974                 common->curaid = bss_conf->aid;
1975                 ath9k_hw_write_associd(sc->sc_ah);
1976                 ath_dbg(common, ATH_DBG_CONFIG,
1977                                 "Bss Info ASSOC %d, bssid: %pM\n",
1978                                 bss_conf->aid, common->curbssid);
1979                 ath_beacon_config(sc, vif);
1980                 /*
1981                  * Request a re-configuration of Beacon related timers
1982                  * on the receipt of the first Beacon frame (i.e.,
1983                  * after time sync with the AP).
1984                  */
1985                 sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON;
1986                 /* Reset rssi stats */
1987                 sc->last_rssi = ATH_RSSI_DUMMY_MARKER;
1988                 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
1989
1990                 if (!common->disable_ani) {
1991                         sc->sc_flags |= SC_OP_ANI_RUN;
1992                         ath_start_ani(common);
1993                 }
1994
1995         }
1996 }
1997
1998 static void ath9k_config_bss(struct ath_softc *sc, struct ieee80211_vif *vif)
1999 {
2000         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2001         struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
2002         struct ath_vif *avp = (void *)vif->drv_priv;
2003
2004         if (sc->sc_ah->opmode != NL80211_IFTYPE_STATION)
2005                 return;
2006
2007         /* Reconfigure bss info */
2008         if (avp->primary_sta_vif && !bss_conf->assoc) {
2009                 ath_dbg(common, ATH_DBG_CONFIG,
2010                         "Bss Info DISASSOC %d, bssid %pM\n",
2011                         common->curaid, common->curbssid);
2012                 sc->sc_flags &= ~(SC_OP_PRIM_STA_VIF | SC_OP_BEACONS);
2013                 avp->primary_sta_vif = false;
2014                 memset(common->curbssid, 0, ETH_ALEN);
2015                 common->curaid = 0;
2016         }
2017
2018         ieee80211_iterate_active_interfaces_atomic(
2019                         sc->hw, ath9k_bss_iter, sc);
2020
2021         /*
2022          * None of station vifs are associated.
2023          * Clear bssid & aid
2024          */
2025         if (!(sc->sc_flags & SC_OP_PRIM_STA_VIF)) {
2026                 ath9k_hw_write_associd(sc->sc_ah);
2027                 /* Stop ANI */
2028                 sc->sc_flags &= ~SC_OP_ANI_RUN;
2029                 del_timer_sync(&common->ani.timer);
2030         }
2031 }
2032
2033 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
2034                                    struct ieee80211_vif *vif,
2035                                    struct ieee80211_bss_conf *bss_conf,
2036                                    u32 changed)
2037 {
2038         struct ath_softc *sc = hw->priv;
2039         struct ath_hw *ah = sc->sc_ah;
2040         struct ath_common *common = ath9k_hw_common(ah);
2041         struct ath_vif *avp = (void *)vif->drv_priv;
2042         int slottime;
2043         int error;
2044
2045         ath9k_ps_wakeup(sc);
2046         mutex_lock(&sc->mutex);
2047
2048         if (changed & BSS_CHANGED_BSSID) {
2049                 ath9k_config_bss(sc, vif);
2050
2051                 ath_dbg(common, ATH_DBG_CONFIG, "BSSID: %pM aid: 0x%x\n",
2052                         common->curbssid, common->curaid);
2053         }
2054
2055         if (changed & BSS_CHANGED_IBSS) {
2056                 /* There can be only one vif available */
2057                 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
2058                 common->curaid = bss_conf->aid;
2059                 ath9k_hw_write_associd(sc->sc_ah);
2060
2061                 if (bss_conf->ibss_joined) {
2062                         sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
2063
2064                         if (!common->disable_ani) {
2065                                 sc->sc_flags |= SC_OP_ANI_RUN;
2066                                 ath_start_ani(common);
2067                         }
2068
2069                 } else {
2070                         sc->sc_flags &= ~SC_OP_ANI_RUN;
2071                         del_timer_sync(&common->ani.timer);
2072                 }
2073         }
2074
2075         /* Enable transmission of beacons (AP, IBSS, MESH) */
2076         if ((changed & BSS_CHANGED_BEACON) ||
2077             ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
2078                 ath9k_set_beaconing_status(sc, false);
2079                 error = ath_beacon_alloc(sc, vif);
2080                 if (!error)
2081                         ath_beacon_config(sc, vif);
2082                 ath9k_set_beaconing_status(sc, true);
2083         }
2084
2085         if (changed & BSS_CHANGED_ERP_SLOT) {
2086                 if (bss_conf->use_short_slot)
2087                         slottime = 9;
2088                 else
2089                         slottime = 20;
2090                 if (vif->type == NL80211_IFTYPE_AP) {
2091                         /*
2092                          * Defer update, so that connected stations can adjust
2093                          * their settings at the same time.
2094                          * See beacon.c for more details
2095                          */
2096                         sc->beacon.slottime = slottime;
2097                         sc->beacon.updateslot = UPDATE;
2098                 } else {
2099                         ah->slottime = slottime;
2100                         ath9k_hw_init_global_settings(ah);
2101                 }
2102         }
2103
2104         /* Disable transmission of beacons */
2105         if ((changed & BSS_CHANGED_BEACON_ENABLED) &&
2106             !bss_conf->enable_beacon) {
2107                 ath9k_set_beaconing_status(sc, false);
2108                 avp->is_bslot_active = false;
2109                 ath9k_set_beaconing_status(sc, true);
2110         }
2111
2112         if (changed & BSS_CHANGED_BEACON_INT) {
2113                 /*
2114                  * In case of AP mode, the HW TSF has to be reset
2115                  * when the beacon interval changes.
2116                  */
2117                 if (vif->type == NL80211_IFTYPE_AP) {
2118                         sc->sc_flags |= SC_OP_TSF_RESET;
2119                         ath9k_set_beaconing_status(sc, false);
2120                         error = ath_beacon_alloc(sc, vif);
2121                         if (!error)
2122                                 ath_beacon_config(sc, vif);
2123                         ath9k_set_beaconing_status(sc, true);
2124                 } else
2125                         ath_beacon_config(sc, vif);
2126         }
2127
2128         if (changed & BSS_CHANGED_ERP_PREAMBLE) {
2129                 ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
2130                         bss_conf->use_short_preamble);
2131                 if (bss_conf->use_short_preamble)
2132                         sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
2133                 else
2134                         sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
2135         }
2136
2137         if (changed & BSS_CHANGED_ERP_CTS_PROT) {
2138                 ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
2139                         bss_conf->use_cts_prot);
2140                 if (bss_conf->use_cts_prot &&
2141                     hw->conf.channel->band != IEEE80211_BAND_5GHZ)
2142                         sc->sc_flags |= SC_OP_PROTECT_ENABLE;
2143                 else
2144                         sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
2145         }
2146
2147         mutex_unlock(&sc->mutex);
2148         ath9k_ps_restore(sc);
2149 }
2150
2151 static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
2152 {
2153         struct ath_softc *sc = hw->priv;
2154         u64 tsf;
2155
2156         mutex_lock(&sc->mutex);
2157         ath9k_ps_wakeup(sc);
2158         tsf = ath9k_hw_gettsf64(sc->sc_ah);
2159         ath9k_ps_restore(sc);
2160         mutex_unlock(&sc->mutex);
2161
2162         return tsf;
2163 }
2164
2165 static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
2166 {
2167         struct ath_softc *sc = hw->priv;
2168
2169         mutex_lock(&sc->mutex);
2170         ath9k_ps_wakeup(sc);
2171         ath9k_hw_settsf64(sc->sc_ah, tsf);
2172         ath9k_ps_restore(sc);
2173         mutex_unlock(&sc->mutex);
2174 }
2175
2176 static void ath9k_reset_tsf(struct ieee80211_hw *hw)
2177 {
2178         struct ath_softc *sc = hw->priv;
2179
2180         mutex_lock(&sc->mutex);
2181
2182         ath9k_ps_wakeup(sc);
2183         ath9k_hw_reset_tsf(sc->sc_ah);
2184         ath9k_ps_restore(sc);
2185
2186         mutex_unlock(&sc->mutex);
2187 }
2188
2189 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
2190                               struct ieee80211_vif *vif,
2191                               enum ieee80211_ampdu_mlme_action action,
2192                               struct ieee80211_sta *sta,
2193                               u16 tid, u16 *ssn, u8 buf_size)
2194 {
2195         struct ath_softc *sc = hw->priv;
2196         int ret = 0;
2197
2198         local_bh_disable();
2199
2200         switch (action) {
2201         case IEEE80211_AMPDU_RX_START:
2202                 if (!(sc->sc_flags & SC_OP_RXAGGR))
2203                         ret = -ENOTSUPP;
2204                 break;
2205         case IEEE80211_AMPDU_RX_STOP:
2206                 break;
2207         case IEEE80211_AMPDU_TX_START:
2208                 if (!(sc->sc_flags & SC_OP_TXAGGR))
2209                         return -EOPNOTSUPP;
2210
2211                 ath9k_ps_wakeup(sc);
2212                 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
2213                 if (!ret)
2214                         ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2215                 ath9k_ps_restore(sc);
2216                 break;
2217         case IEEE80211_AMPDU_TX_STOP:
2218                 ath9k_ps_wakeup(sc);
2219                 ath_tx_aggr_stop(sc, sta, tid);
2220                 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2221                 ath9k_ps_restore(sc);
2222                 break;
2223         case IEEE80211_AMPDU_TX_OPERATIONAL:
2224                 ath9k_ps_wakeup(sc);
2225                 ath_tx_aggr_resume(sc, sta, tid);
2226                 ath9k_ps_restore(sc);
2227                 break;
2228         default:
2229                 ath_err(ath9k_hw_common(sc->sc_ah), "Unknown AMPDU action\n");
2230         }
2231
2232         local_bh_enable();
2233
2234         return ret;
2235 }
2236
2237 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
2238                              struct survey_info *survey)
2239 {
2240         struct ath_softc *sc = hw->priv;
2241         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2242         struct ieee80211_supported_band *sband;
2243         struct ieee80211_channel *chan;
2244         unsigned long flags;
2245         int pos;
2246
2247         spin_lock_irqsave(&common->cc_lock, flags);
2248         if (idx == 0)
2249                 ath_update_survey_stats(sc);
2250
2251         sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
2252         if (sband && idx >= sband->n_channels) {
2253                 idx -= sband->n_channels;
2254                 sband = NULL;
2255         }
2256
2257         if (!sband)
2258                 sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
2259
2260         if (!sband || idx >= sband->n_channels) {
2261                 spin_unlock_irqrestore(&common->cc_lock, flags);
2262                 return -ENOENT;
2263         }
2264
2265         chan = &sband->channels[idx];
2266         pos = chan->hw_value;
2267         memcpy(survey, &sc->survey[pos], sizeof(*survey));
2268         survey->channel = chan;
2269         spin_unlock_irqrestore(&common->cc_lock, flags);
2270
2271         return 0;
2272 }
2273
2274 static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
2275 {
2276         struct ath_softc *sc = hw->priv;
2277         struct ath_hw *ah = sc->sc_ah;
2278
2279         mutex_lock(&sc->mutex);
2280         ah->coverage_class = coverage_class;
2281         ath9k_hw_init_global_settings(ah);
2282         mutex_unlock(&sc->mutex);
2283 }
2284
2285 static void ath9k_flush(struct ieee80211_hw *hw, bool drop)
2286 {
2287         struct ath_softc *sc = hw->priv;
2288         struct ath_hw *ah = sc->sc_ah;
2289         struct ath_common *common = ath9k_hw_common(ah);
2290         int timeout = 200; /* ms */
2291         int i, j;
2292         bool drain_txq;
2293
2294         mutex_lock(&sc->mutex);
2295         cancel_delayed_work_sync(&sc->tx_complete_work);
2296
2297         if (sc->sc_flags & SC_OP_INVALID) {
2298                 ath_dbg(common, ATH_DBG_ANY, "Device not present\n");
2299                 mutex_unlock(&sc->mutex);
2300                 return;
2301         }
2302
2303         if (drop)
2304                 timeout = 1;
2305
2306         for (j = 0; j < timeout; j++) {
2307                 bool npend = false;
2308
2309                 if (j)
2310                         usleep_range(1000, 2000);
2311
2312                 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
2313                         if (!ATH_TXQ_SETUP(sc, i))
2314                                 continue;
2315
2316                         npend = ath9k_has_pending_frames(sc, &sc->tx.txq[i]);
2317
2318                         if (npend)
2319                                 break;
2320                 }
2321
2322                 if (!npend)
2323                     goto out;
2324         }
2325
2326         ath9k_ps_wakeup(sc);
2327         spin_lock_bh(&sc->sc_pcu_lock);
2328         drain_txq = ath_drain_all_txq(sc, false);
2329         spin_unlock_bh(&sc->sc_pcu_lock);
2330         if (!drain_txq)
2331                 ath_reset(sc, false);
2332         ath9k_ps_restore(sc);
2333         ieee80211_wake_queues(hw);
2334
2335 out:
2336         ieee80211_queue_delayed_work(hw, &sc->tx_complete_work, 0);
2337         mutex_unlock(&sc->mutex);
2338 }
2339
2340 static bool ath9k_tx_frames_pending(struct ieee80211_hw *hw)
2341 {
2342         struct ath_softc *sc = hw->priv;
2343         int i;
2344
2345         for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
2346                 if (!ATH_TXQ_SETUP(sc, i))
2347                         continue;
2348
2349                 if (ath9k_has_pending_frames(sc, &sc->tx.txq[i]))
2350                         return true;
2351         }
2352         return false;
2353 }
2354
2355 static int ath9k_tx_last_beacon(struct ieee80211_hw *hw)
2356 {
2357         struct ath_softc *sc = hw->priv;
2358         struct ath_hw *ah = sc->sc_ah;
2359         struct ieee80211_vif *vif;
2360         struct ath_vif *avp;
2361         struct ath_buf *bf;
2362         struct ath_tx_status ts;
2363         int status;
2364
2365         vif = sc->beacon.bslot[0];
2366         if (!vif)
2367                 return 0;
2368
2369         avp = (void *)vif->drv_priv;
2370         if (!avp->is_bslot_active)
2371                 return 0;
2372
2373         if (!sc->beacon.tx_processed) {
2374                 tasklet_disable(&sc->bcon_tasklet);
2375
2376                 bf = avp->av_bcbuf;
2377                 if (!bf || !bf->bf_mpdu)
2378                         goto skip;
2379
2380                 status = ath9k_hw_txprocdesc(ah, bf->bf_desc, &ts);
2381                 if (status == -EINPROGRESS)
2382                         goto skip;
2383
2384                 sc->beacon.tx_processed = true;
2385                 sc->beacon.tx_last = !(ts.ts_status & ATH9K_TXERR_MASK);
2386
2387 skip:
2388                 tasklet_enable(&sc->bcon_tasklet);
2389         }
2390
2391         return sc->beacon.tx_last;
2392 }
2393
2394 struct ieee80211_ops ath9k_ops = {
2395         .tx                 = ath9k_tx,
2396         .start              = ath9k_start,
2397         .stop               = ath9k_stop,
2398         .add_interface      = ath9k_add_interface,
2399         .change_interface   = ath9k_change_interface,
2400         .remove_interface   = ath9k_remove_interface,
2401         .config             = ath9k_config,
2402         .configure_filter   = ath9k_configure_filter,
2403         .sta_add            = ath9k_sta_add,
2404         .sta_remove         = ath9k_sta_remove,
2405         .sta_notify         = ath9k_sta_notify,
2406         .conf_tx            = ath9k_conf_tx,
2407         .bss_info_changed   = ath9k_bss_info_changed,
2408         .set_key            = ath9k_set_key,
2409         .get_tsf            = ath9k_get_tsf,
2410         .set_tsf            = ath9k_set_tsf,
2411         .reset_tsf          = ath9k_reset_tsf,
2412         .ampdu_action       = ath9k_ampdu_action,
2413         .get_survey         = ath9k_get_survey,
2414         .rfkill_poll        = ath9k_rfkill_poll_state,
2415         .set_coverage_class = ath9k_set_coverage_class,
2416         .flush              = ath9k_flush,
2417         .tx_frames_pending  = ath9k_tx_frames_pending,
2418         .tx_last_beacon = ath9k_tx_last_beacon,
2419 };