drivers/net/wireless/ath/ath9k/main.c

   1 /*
   2  * Copyright (c) 2008-2009 Atheros Communications Inc.
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #include <linux/nl80211.h>
  18 #include "ath9k.h"
  19 #include "btcoex.h"
  20
  21 static u8 parse_mpdudensity(u8 mpdudensity)
  22 {
  23         /*
  24          * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
  25          *   0 for no restriction
  26          *   1 for 1/4 us
  27          *   2 for 1/2 us
  28          *   3 for 1 us
  29          *   4 for 2 us
  30          *   5 for 4 us
  31          *   6 for 8 us
  32          *   7 for 16 us
  33          */
  34         switch (mpdudensity) {
  35         case 0:
  36                 return 0;
  37         case 1:
  38         case 2:
  39         case 3:
  40                 /* Our lower layer calculations limit our precision to
  41                    1 microsecond */
  42                 return 1;
  43         case 4:
  44                 return 2;
  45         case 5:
  46                 return 4;
  47         case 6:
  48                 return 8;
  49         case 7:
  50                 return 16;
  51         default:
  52                 return 0;
  53         }
  54 }
  55
  56 bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
  57 {
  58         unsigned long flags;
  59         bool ret;
  60
  61         spin_lock_irqsave(&sc->sc_pm_lock, flags);
  62         ret = ath9k_hw_setpower(sc->sc_ah, mode);
  63         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  64
  65         return ret;
  66 }
  67
  68 void ath9k_ps_wakeup(struct ath_softc *sc)
  69 {
  70         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  71         unsigned long flags;
  72         enum ath9k_power_mode power_mode;
  73
  74         spin_lock_irqsave(&sc->sc_pm_lock, flags);
  75         if (++sc->ps_usecount != 1)
  76                 goto unlock;
  77
  78         power_mode = sc->sc_ah->power_mode;
  79         ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
  80
  81         /*
  82          * While the hardware is asleep, the cycle counters contain no
  83          * useful data. Better clear them now so that they don't mess up
  84          * survey data results.
  85          */
  86         if (power_mode != ATH9K_PM_AWAKE) {
  87                 spin_lock(&common->cc_lock);
  88                 ath_hw_cycle_counters_update(common);
  89                 memset(&common->cc_survey, 0, sizeof(common->cc_survey));
  90                 spin_unlock(&common->cc_lock);
  91         }
  92
  93  unlock:
  94         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  95 }
  96
  97 void ath9k_ps_restore(struct ath_softc *sc)
  98 {
  99         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 100         unsigned long flags;
 101
 102         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 103         if (--sc->ps_usecount != 0)
 104                 goto unlock;
 105
 106         spin_lock(&common->cc_lock);
 107         ath_hw_cycle_counters_update(common);
 108         spin_unlock(&common->cc_lock);
 109
 110         if (sc->ps_idle)
 111                 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
 112         else if (sc->ps_enabled &&
 113                  !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
 114                               PS_WAIT_FOR_CAB |
 115                               PS_WAIT_FOR_PSPOLL_DATA |
 116                               PS_WAIT_FOR_TX_ACK)))
 117                 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
 118
 119  unlock:
 120         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 121 }
 122
 123 static void ath_start_ani(struct ath_common *common)
 124 {
 125         struct ath_hw *ah = common->ah;
 126         unsigned long timestamp = jiffies_to_msecs(jiffies);
 127         struct ath_softc *sc = (struct ath_softc *) common->priv;
 128
 129         if (!(sc->sc_flags & SC_OP_ANI_RUN))
 130                 return;
 131
 132         if (sc->sc_flags & SC_OP_OFFCHANNEL)
 133                 return;
 134
 135         common->ani.longcal_timer = timestamp;
 136         common->ani.shortcal_timer = timestamp;
 137         common->ani.checkani_timer = timestamp;
 138
 139         mod_timer(&common->ani.timer,
 140                   jiffies +
 141                         msecs_to_jiffies((u32)ah->config.ani_poll_interval));
 142 }
 143
 144 static void ath_update_survey_nf(struct ath_softc *sc, int channel)
 145 {
 146         struct ath_hw *ah = sc->sc_ah;
 147         struct ath9k_channel *chan = &ah->channels[channel];
 148         struct survey_info *survey = &sc->survey[channel];
 149
 150         if (chan->noisefloor) {
 151                 survey->filled |= SURVEY_INFO_NOISE_DBM;
 152                 survey->noise = chan->noisefloor;
 153         }
 154 }
 155
 156 /*
 157  * Updates the survey statistics and returns the busy time since last
 158  * update in %, if the measurement duration was long enough for the
 159  * result to be useful, -1 otherwise.
 160  */
 161 static int ath_update_survey_stats(struct ath_softc *sc)
 162 {
 163         struct ath_hw *ah = sc->sc_ah;
 164         struct ath_common *common = ath9k_hw_common(ah);
 165         int pos = ah->curchan - &ah->channels[0];
 166         struct survey_info *survey = &sc->survey[pos];
 167         struct ath_cycle_counters *cc = &common->cc_survey;
 168         unsigned int div = common->clockrate * 1000;
 169         int ret = 0;
 170
 171         if (!ah->curchan)
 172                 return -1;
 173
 174         if (ah->power_mode == ATH9K_PM_AWAKE)
 175                 ath_hw_cycle_counters_update(common);
 176
 177         if (cc->cycles > 0) {
 178                 survey->filled |= SURVEY_INFO_CHANNEL_TIME |
 179                         SURVEY_INFO_CHANNEL_TIME_BUSY |
 180                         SURVEY_INFO_CHANNEL_TIME_RX |
 181                         SURVEY_INFO_CHANNEL_TIME_TX;
 182                 survey->channel_time += cc->cycles / div;
 183                 survey->channel_time_busy += cc->rx_busy / div;
 184                 survey->channel_time_rx += cc->rx_frame / div;
 185                 survey->channel_time_tx += cc->tx_frame / div;
 186         }
 187
 188         if (cc->cycles < div)
 189                 return -1;
 190
 191         if (cc->cycles > 0)
 192                 ret = cc->rx_busy * 100 / cc->cycles;
 193
 194         memset(cc, 0, sizeof(*cc));
 195
 196         ath_update_survey_nf(sc, pos);
 197
 198         return ret;
 199 }
 200
 201 /*
 202  * Set/change channels.  If the channel is really being changed, it's done
 203  * by reseting the chip.  To accomplish this we must first cleanup any pending
 204  * DMA, then restart stuff.
 205 */
 206 int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
 207                     struct ath9k_channel *hchan)
 208 {
 209         struct ath_hw *ah = sc->sc_ah;
 210         struct ath_common *common = ath9k_hw_common(ah);
 211         struct ieee80211_conf *conf = &common->hw->conf;
 212         bool fastcc = true, stopped;
 213         struct ieee80211_channel *channel = hw->conf.channel;
 214         struct ath9k_hw_cal_data *caldata = NULL;
 215         int r;
 216
 217         if (sc->sc_flags & SC_OP_INVALID)
 218                 return -EIO;
 219
 220         sc->hw_busy_count = 0;
 221
 222         del_timer_sync(&common->ani.timer);
 223         cancel_work_sync(&sc->paprd_work);
 224         cancel_work_sync(&sc->hw_check_work);
 225         cancel_delayed_work_sync(&sc->tx_complete_work);
 226         cancel_delayed_work_sync(&sc->hw_pll_work);
 227
 228         ath9k_ps_wakeup(sc);
 229
 230         spin_lock_bh(&sc->sc_pcu_lock);
 231
 232         /*
 233          * This is only performed if the channel settings have
 234          * actually changed.
 235          *
 236          * To switch channels clear any pending DMA operations;
 237          * wait long enough for the RX fifo to drain, reset the
 238          * hardware at the new frequency, and then re-enable
 239          * the relevant bits of the h/w.
 240          */
 241         ath9k_hw_disable_interrupts(ah);
 242         stopped = ath_drain_all_txq(sc, false);
 243
 244         if (!ath_stoprecv(sc))
 245                 stopped = false;
 246
 247         if (!ath9k_hw_check_alive(ah))
 248                 stopped = false;
 249
 250         /* XXX: do not flush receive queue here. We don't want
 251          * to flush data frames already in queue because of
 252          * changing channel. */
 253
 254         if (!stopped || !(sc->sc_flags & SC_OP_OFFCHANNEL))
 255                 fastcc = false;
 256
 257         if (!(sc->sc_flags & SC_OP_OFFCHANNEL))
 258                 caldata = &sc->caldata;
 259
 260         ath_dbg(common, ATH_DBG_CONFIG,
 261                 "(%u MHz) -> (%u MHz), conf_is_ht40: %d fastcc: %d\n",
 262                 sc->sc_ah->curchan->channel,
 263                 channel->center_freq, conf_is_ht40(conf),
 264                 fastcc);
 265
 266         r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
 267         if (r) {
 268                 ath_err(common,
 269                         "Unable to reset channel (%u MHz), reset status %d\n",
 270                         channel->center_freq, r);
 271                 goto ps_restore;
 272         }
 273
 274         if (ath_startrecv(sc) != 0) {
 275                 ath_err(common, "Unable to restart recv logic\n");
 276                 r = -EIO;
 277                 goto ps_restore;
 278         }
 279
 280         ath9k_cmn_update_txpow(ah, sc->curtxpow,
 281                                sc->config.txpowlimit, &sc->curtxpow);
 282         ath9k_hw_set_interrupts(ah, ah->imask);
 283
 284         if (!(sc->sc_flags & (SC_OP_OFFCHANNEL))) {
 285                 if (sc->sc_flags & SC_OP_BEACONS)
 286                         ath_beacon_config(sc, NULL);
 287                 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
 288                 ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work, HZ/2);
 289                 ath_start_ani(common);
 290         }
 291
 292  ps_restore:
 293         ieee80211_wake_queues(hw);
 294
 295         spin_unlock_bh(&sc->sc_pcu_lock);
 296
 297         ath9k_ps_restore(sc);
 298         return r;
 299 }
 300
 301 static void ath_paprd_activate(struct ath_softc *sc)
 302 {
 303         struct ath_hw *ah = sc->sc_ah;
 304         struct ath9k_hw_cal_data *caldata = ah->caldata;
 305         struct ath_common *common = ath9k_hw_common(ah);
 306         int chain;
 307
 308         if (!caldata || !caldata->paprd_done)
 309                 return;
 310
 311         ath9k_ps_wakeup(sc);
 312         ar9003_paprd_enable(ah, false);
 313         for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
 314                 if (!(common->tx_chainmask & BIT(chain)))
 315                         continue;
 316
 317                 ar9003_paprd_populate_single_table(ah, caldata, chain);
 318         }
 319
 320         ar9003_paprd_enable(ah, true);
 321         ath9k_ps_restore(sc);
 322 }
 323
 324 static bool ath_paprd_send_frame(struct ath_softc *sc, struct sk_buff *skb, int chain)
 325 {
 326         struct ieee80211_hw *hw = sc->hw;
 327         struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
 328         struct ath_hw *ah = sc->sc_ah;
 329         struct ath_common *common = ath9k_hw_common(ah);
 330         struct ath_tx_control txctl;
 331         int time_left;
 332
 333         memset(&txctl, 0, sizeof(txctl));
 334         txctl.txq = sc->tx.txq_map[WME_AC_BE];
 335
 336         memset(tx_info, 0, sizeof(*tx_info));
 337         tx_info->band = hw->conf.channel->band;
 338         tx_info->flags |= IEEE80211_TX_CTL_NO_ACK;
 339         tx_info->control.rates[0].idx = 0;
 340         tx_info->control.rates[0].count = 1;
 341         tx_info->control.rates[0].flags = IEEE80211_TX_RC_MCS;
 342         tx_info->control.rates[1].idx = -1;
 343
 344         init_completion(&sc->paprd_complete);
 345         sc->paprd_pending = true;
 346         txctl.paprd = BIT(chain);
 347
 348         if (ath_tx_start(hw, skb, &txctl) != 0) {
 349                 ath_dbg(common, ATH_DBG_XMIT, "PAPRD TX failed\n");
 350                 dev_kfree_skb_any(skb);
 351                 return false;
 352         }
 353
 354         time_left = wait_for_completion_timeout(&sc->paprd_complete,
 355                         msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
 356         sc->paprd_pending = false;
 357
 358         if (!time_left)
 359                 ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_CALIBRATE,
 360                         "Timeout waiting for paprd training on TX chain %d\n",
 361                         chain);
 362
 363         return !!time_left;
 364 }
 365
 366 void ath_paprd_calibrate(struct work_struct *work)
 367 {
 368         struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
 369         struct ieee80211_hw *hw = sc->hw;
 370         struct ath_hw *ah = sc->sc_ah;
 371         struct ieee80211_hdr *hdr;
 372         struct sk_buff *skb = NULL;
 373         struct ath9k_hw_cal_data *caldata = ah->caldata;
 374         struct ath_common *common = ath9k_hw_common(ah);
 375         int ftype;
 376         int chain_ok = 0;
 377         int chain;
 378         int len = 1800;
 379
 380         if (!caldata)
 381                 return;
 382
 383         if (ar9003_paprd_init_table(ah) < 0)
 384                 return;
 385
 386         skb = alloc_skb(len, GFP_KERNEL);
 387         if (!skb)
 388                 return;
 389
 390         skb_put(skb, len);
 391         memset(skb->data, 0, len);
 392         hdr = (struct ieee80211_hdr *)skb->data;
 393         ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
 394         hdr->frame_control = cpu_to_le16(ftype);
 395         hdr->duration_id = cpu_to_le16(10);
 396         memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
 397         memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
 398         memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
 399
 400         ath9k_ps_wakeup(sc);
 401         for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
 402                 if (!(common->tx_chainmask & BIT(chain)))
 403                         continue;
 404
 405                 chain_ok = 0;
 406
 407                 ath_dbg(common, ATH_DBG_CALIBRATE,
 408                         "Sending PAPRD frame for thermal measurement "
 409                         "on chain %d\n", chain);
 410                 if (!ath_paprd_send_frame(sc, skb, chain))
 411                         goto fail_paprd;
 412
 413                 ar9003_paprd_setup_gain_table(ah, chain);
 414
 415                 ath_dbg(common, ATH_DBG_CALIBRATE,
 416                         "Sending PAPRD training frame on chain %d\n", chain);
 417                 if (!ath_paprd_send_frame(sc, skb, chain))
 418                         goto fail_paprd;
 419
 420                 if (!ar9003_paprd_is_done(ah))
 421                         break;
 422
 423                 if (ar9003_paprd_create_curve(ah, caldata, chain) != 0)
 424                         break;
 425
 426                 chain_ok = 1;
 427         }
 428         kfree_skb(skb);
 429
 430         if (chain_ok) {
 431                 caldata->paprd_done = true;
 432                 ath_paprd_activate(sc);
 433         }
 434
 435 fail_paprd:
 436         ath9k_ps_restore(sc);
 437 }
 438
 439 /*
 440  *  This routine performs the periodic noise floor calibration function
 441  *  that is used to adjust and optimize the chip performance.  This
 442  *  takes environmental changes (location, temperature) into account.
 443  *  When the task is complete, it reschedules itself depending on the
 444  *  appropriate interval that was calculated.
 445  */
 446 void ath_ani_calibrate(unsigned long data)
 447 {
 448         struct ath_softc *sc = (struct ath_softc *)data;
 449         struct ath_hw *ah = sc->sc_ah;
 450         struct ath_common *common = ath9k_hw_common(ah);
 451         bool longcal = false;
 452         bool shortcal = false;
 453         bool aniflag = false;
 454         unsigned int timestamp = jiffies_to_msecs(jiffies);
 455         u32 cal_interval, short_cal_interval, long_cal_interval;
 456         unsigned long flags;
 457
 458         if (ah->caldata && ah->caldata->nfcal_interference)
 459                 long_cal_interval = ATH_LONG_CALINTERVAL_INT;
 460         else
 461                 long_cal_interval = ATH_LONG_CALINTERVAL;
 462
 463         short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
 464                 ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
 465
 466         /* Only calibrate if awake */
 467         if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
 468                 goto set_timer;
 469
 470         ath9k_ps_wakeup(sc);
 471
 472         /* Long calibration runs independently of short calibration. */
 473         if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) {
 474                 longcal = true;
 475                 ath_dbg(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
 476                 common->ani.longcal_timer = timestamp;
 477         }
 478
 479         /* Short calibration applies only while caldone is false */
 480         if (!common->ani.caldone) {
 481                 if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
 482                         shortcal = true;
 483                         ath_dbg(common, ATH_DBG_ANI,
 484                                 "shortcal @%lu\n", jiffies);
 485                         common->ani.shortcal_timer = timestamp;
 486                         common->ani.resetcal_timer = timestamp;
 487                 }
 488         } else {
 489                 if ((timestamp - common->ani.resetcal_timer) >=
 490                     ATH_RESTART_CALINTERVAL) {
 491                         common->ani.caldone = ath9k_hw_reset_calvalid(ah);
 492                         if (common->ani.caldone)
 493                                 common->ani.resetcal_timer = timestamp;
 494                 }
 495         }
 496
 497         /* Verify whether we must check ANI */
 498         if ((timestamp - common->ani.checkani_timer) >=
 499              ah->config.ani_poll_interval) {
 500                 aniflag = true;
 501                 common->ani.checkani_timer = timestamp;
 502         }
 503
 504         /* Skip all processing if there's nothing to do. */
 505         if (longcal || shortcal || aniflag) {
 506                 /* Call ANI routine if necessary */
 507                 if (aniflag) {
 508                         spin_lock_irqsave(&common->cc_lock, flags);
 509                         ath9k_hw_ani_monitor(ah, ah->curchan);
 510                         ath_update_survey_stats(sc);
 511                         spin_unlock_irqrestore(&common->cc_lock, flags);
 512                 }
 513
 514                 /* Perform calibration if necessary */
 515                 if (longcal || shortcal) {
 516                         common->ani.caldone =
 517                                 ath9k_hw_calibrate(ah,
 518                                                    ah->curchan,
 519                                                    common->rx_chainmask,
 520                                                    longcal);
 521                 }
 522         }
 523
 524         ath9k_ps_restore(sc);
 525
 526 set_timer:
 527         /*
 528         * Set timer interval based on previous results.
 529         * The interval must be the shortest necessary to satisfy ANI,
 530         * short calibration and long calibration.
 531         */
 532         cal_interval = ATH_LONG_CALINTERVAL;
 533         if (sc->sc_ah->config.enable_ani)
 534                 cal_interval = min(cal_interval,
 535                                    (u32)ah->config.ani_poll_interval);
 536         if (!common->ani.caldone)
 537                 cal_interval = min(cal_interval, (u32)short_cal_interval);
 538
 539         mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
 540         if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->caldata) {
 541                 if (!ah->caldata->paprd_done)
 542                         ieee80211_queue_work(sc->hw, &sc->paprd_work);
 543                 else if (!ah->paprd_table_write_done)
 544                         ath_paprd_activate(sc);
 545         }
 546 }
 547
 548 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
 549 {
 550         struct ath_node *an;
 551         struct ath_hw *ah = sc->sc_ah;
 552         an = (struct ath_node *)sta->drv_priv;
 553
 554 #ifdef CONFIG_ATH9K_DEBUGFS
 555         spin_lock(&sc->nodes_lock);
 556         list_add(&an->list, &sc->nodes);
 557         spin_unlock(&sc->nodes_lock);
 558         an->sta = sta;
 559 #endif
 560         if ((ah->caps.hw_caps) & ATH9K_HW_CAP_APM)
 561                 sc->sc_flags |= SC_OP_ENABLE_APM;
 562
 563         if (sc->sc_flags & SC_OP_TXAGGR) {
 564                 ath_tx_node_init(sc, an);
 565                 an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
 566                                      sta->ht_cap.ampdu_factor);
 567                 an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
 568         }
 569 }
 570
 571 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
 572 {
 573         struct ath_node *an = (struct ath_node *)sta->drv_priv;
 574
 575 #ifdef CONFIG_ATH9K_DEBUGFS
 576         spin_lock(&sc->nodes_lock);
 577         list_del(&an->list);
 578         spin_unlock(&sc->nodes_lock);
 579         an->sta = NULL;
 580 #endif
 581
 582         if (sc->sc_flags & SC_OP_TXAGGR)
 583                 ath_tx_node_cleanup(sc, an);
 584 }
 585
 586 void ath_hw_check(struct work_struct *work)
 587 {
 588         struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
 589         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 590         unsigned long flags;
 591         int busy;
 592
 593         ath9k_ps_wakeup(sc);
 594         if (ath9k_hw_check_alive(sc->sc_ah))
 595                 goto out;
 596
 597         spin_lock_irqsave(&common->cc_lock, flags);
 598         busy = ath_update_survey_stats(sc);
 599         spin_unlock_irqrestore(&common->cc_lock, flags);
 600
 601         ath_dbg(common, ATH_DBG_RESET, "Possible baseband hang, "
 602                 "busy=%d (try %d)\n", busy, sc->hw_busy_count + 1);
 603         if (busy >= 99) {
 604                 if (++sc->hw_busy_count >= 3)
 605                         ath_reset(sc, true);
 606         } else if (busy >= 0)
 607                 sc->hw_busy_count = 0;
 608
 609 out:
 610         ath9k_ps_restore(sc);
 611 }
 612
 613 void ath9k_tasklet(unsigned long data)
 614 {
 615         struct ath_softc *sc = (struct ath_softc *)data;
 616         struct ath_hw *ah = sc->sc_ah;
 617         struct ath_common *common = ath9k_hw_common(ah);
 618
 619         u32 status = sc->intrstatus;
 620         u32 rxmask;
 621
 622         if (status & ATH9K_INT_FATAL) {
 623                 ath_reset(sc, true);
 624                 return;
 625         }
 626
 627         ath9k_ps_wakeup(sc);
 628         spin_lock(&sc->sc_pcu_lock);
 629
 630         /*
 631          * Only run the baseband hang check if beacons stop working in AP or
 632          * IBSS mode, because it has a high false positive rate. For station
 633          * mode it should not be necessary, since the upper layers will detect
 634          * this through a beacon miss automatically and the following channel
 635          * change will trigger a hardware reset anyway
 636          */
 637         if (ath9k_hw_numtxpending(ah, sc->beacon.beaconq) != 0 &&
 638             !ath9k_hw_check_alive(ah))
 639                 ieee80211_queue_work(sc->hw, &sc->hw_check_work);
 640
 641         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 642                 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
 643                           ATH9K_INT_RXORN);
 644         else
 645                 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 646
 647         if (status & rxmask) {
 648                 /* Check for high priority Rx first */
 649                 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
 650                     (status & ATH9K_INT_RXHP))
 651                         ath_rx_tasklet(sc, 0, true);
 652
 653                 ath_rx_tasklet(sc, 0, false);
 654         }
 655
 656         if (status & ATH9K_INT_TX) {
 657                 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 658                         ath_tx_edma_tasklet(sc);
 659                 else
 660                         ath_tx_tasklet(sc);
 661         }
 662
 663         if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
 664                 /*
 665                  * TSF sync does not look correct; remain awake to sync with
 666                  * the next Beacon.
 667                  */
 668                 ath_dbg(common, ATH_DBG_PS,
 669                         "TSFOOR - Sync with next Beacon\n");
 670                 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
 671         }
 672
 673         if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
 674                 if (status & ATH9K_INT_GENTIMER)
 675                         ath_gen_timer_isr(sc->sc_ah);
 676
 677         /* re-enable hardware interrupt */
 678         ath9k_hw_enable_interrupts(ah);
 679
 680         spin_unlock(&sc->sc_pcu_lock);
 681         ath9k_ps_restore(sc);
 682 }
 683
 684 irqreturn_t ath_isr(int irq, void *dev)
 685 {
 686 #define SCHED_INTR (                            \
 687                 ATH9K_INT_FATAL |               \
 688                 ATH9K_INT_RXORN |               \
 689                 ATH9K_INT_RXEOL |               \
 690                 ATH9K_INT_RX |                  \
 691                 ATH9K_INT_RXLP |                \
 692                 ATH9K_INT_RXHP |                \
 693                 ATH9K_INT_TX |                  \
 694                 ATH9K_INT_BMISS |               \
 695                 ATH9K_INT_CST |                 \
 696                 ATH9K_INT_TSFOOR |              \
 697                 ATH9K_INT_GENTIMER)
 698
 699         struct ath_softc *sc = dev;
 700         struct ath_hw *ah = sc->sc_ah;
 701         struct ath_common *common = ath9k_hw_common(ah);
 702         enum ath9k_int status;
 703         bool sched = false;
 704
 705         /*
 706          * The hardware is not ready/present, don't
 707          * touch anything. Note this can happen early
 708          * on if the IRQ is shared.
 709          */
 710         if (sc->sc_flags & SC_OP_INVALID)
 711                 return IRQ_NONE;
 712
 713
 714         /* shared irq, not for us */
 715
 716         if (!ath9k_hw_intrpend(ah))
 717                 return IRQ_NONE;
 718
 719         /*
 720          * Figure out the reason(s) for the interrupt.  Note
 721          * that the hal returns a pseudo-ISR that may include
 722          * bits we haven't explicitly enabled so we mask the
 723          * value to insure we only process bits we requested.
 724          */
 725         ath9k_hw_getisr(ah, &status);   /* NB: clears ISR too */
 726         status &= ah->imask;    /* discard unasked-for bits */
 727
 728         /*
 729          * If there are no status bits set, then this interrupt was not
 730          * for me (should have been caught above).
 731          */
 732         if (!status)
 733                 return IRQ_NONE;
 734
 735         /* Cache the status */
 736         sc->intrstatus = status;
 737
 738         if (status & SCHED_INTR)
 739                 sched = true;
 740
 741         /*
 742          * If a FATAL or RXORN interrupt is received, we have to reset the
 743          * chip immediately.
 744          */
 745         if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
 746             !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
 747                 goto chip_reset;
 748
 749         if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
 750             (status & ATH9K_INT_BB_WATCHDOG)) {
 751
 752                 spin_lock(&common->cc_lock);
 753                 ath_hw_cycle_counters_update(common);
 754                 ar9003_hw_bb_watchdog_dbg_info(ah);
 755                 spin_unlock(&common->cc_lock);
 756
 757                 goto chip_reset;
 758         }
 759
 760         if (status & ATH9K_INT_SWBA)
 761                 tasklet_schedule(&sc->bcon_tasklet);
 762
 763         if (status & ATH9K_INT_TXURN)
 764                 ath9k_hw_updatetxtriglevel(ah, true);
 765
 766         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
 767                 if (status & ATH9K_INT_RXEOL) {
 768                         ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 769                         ath9k_hw_set_interrupts(ah, ah->imask);
 770                 }
 771         }
 772
 773         if (status & ATH9K_INT_MIB) {
 774                 /*
 775                  * Disable interrupts until we service the MIB
 776                  * interrupt; otherwise it will continue to
 777                  * fire.
 778                  */
 779                 ath9k_hw_disable_interrupts(ah);
 780                 /*
 781                  * Let the hal handle the event. We assume
 782                  * it will clear whatever condition caused
 783                  * the interrupt.
 784                  */
 785                 spin_lock(&common->cc_lock);
 786                 ath9k_hw_proc_mib_event(ah);
 787                 spin_unlock(&common->cc_lock);
 788                 ath9k_hw_enable_interrupts(ah);
 789         }
 790
 791         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
 792                 if (status & ATH9K_INT_TIM_TIMER) {
 793                         if (ATH_DBG_WARN_ON_ONCE(sc->ps_idle))
 794                                 goto chip_reset;
 795                         /* Clear RxAbort bit so that we can
 796                          * receive frames */
 797                         ath9k_setpower(sc, ATH9K_PM_AWAKE);
 798                         ath9k_hw_setrxabort(sc->sc_ah, 0);
 799                         sc->ps_flags |= PS_WAIT_FOR_BEACON;
 800                 }
 801
 802 chip_reset:
 803
 804         ath_debug_stat_interrupt(sc, status);
 805
 806         if (sched) {
 807                 /* turn off every interrupt */
 808                 ath9k_hw_disable_interrupts(ah);
 809                 tasklet_schedule(&sc->intr_tq);
 810         }
 811
 812         return IRQ_HANDLED;
 813
 814 #undef SCHED_INTR
 815 }
 816
 817 static void ath9k_bss_assoc_info(struct ath_softc *sc,
 818                                  struct ieee80211_hw *hw,
 819                                  struct ieee80211_vif *vif,
 820                                  struct ieee80211_bss_conf *bss_conf)
 821 {
 822         struct ath_hw *ah = sc->sc_ah;
 823         struct ath_common *common = ath9k_hw_common(ah);
 824
 825         if (bss_conf->assoc) {
 826                 ath_dbg(common, ATH_DBG_CONFIG,
 827                         "Bss Info ASSOC %d, bssid: %pM\n",
 828                         bss_conf->aid, common->curbssid);
 829
 830                 /* New association, store aid */
 831                 common->curaid = bss_conf->aid;
 832                 ath9k_hw_write_associd(ah);
 833
 834                 /*
 835                  * Request a re-configuration of Beacon related timers
 836                  * on the receipt of the first Beacon frame (i.e.,
 837                  * after time sync with the AP).
 838                  */
 839                 sc->ps_flags |= PS_BEACON_SYNC;
 840
 841                 /* Configure the beacon */
 842                 ath_beacon_config(sc, vif);
 843
 844                 /* Reset rssi stats */
 845                 sc->last_rssi = ATH_RSSI_DUMMY_MARKER;
 846                 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
 847
 848                 sc->sc_flags |= SC_OP_ANI_RUN;
 849                 ath_start_ani(common);
 850         } else {
 851                 ath_dbg(common, ATH_DBG_CONFIG, "Bss Info DISASSOC\n");
 852                 common->curaid = 0;
 853                 /* Stop ANI */
 854                 sc->sc_flags &= ~SC_OP_ANI_RUN;
 855                 del_timer_sync(&common->ani.timer);
 856         }
 857 }
 858
 859 void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
 860 {
 861         struct ath_hw *ah = sc->sc_ah;
 862         struct ath_common *common = ath9k_hw_common(ah);
 863         struct ieee80211_channel *channel = hw->conf.channel;
 864         int r;
 865
 866         ath9k_ps_wakeup(sc);
 867         spin_lock_bh(&sc->sc_pcu_lock);
 868
 869         ath9k_hw_configpcipowersave(ah, 0, 0);
 870
 871         if (!ah->curchan)
 872                 ah->curchan = ath9k_cmn_get_curchannel(sc->hw, ah);
 873
 874         r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
 875         if (r) {
 876                 ath_err(common,
 877                         "Unable to reset channel (%u MHz), reset status %d\n",
 878                         channel->center_freq, r);
 879         }
 880
 881         ath9k_cmn_update_txpow(ah, sc->curtxpow,
 882                                sc->config.txpowlimit, &sc->curtxpow);
 883         if (ath_startrecv(sc) != 0) {
 884                 ath_err(common, "Unable to restart recv logic\n");
 885                 goto out;
 886         }
 887         if (sc->sc_flags & SC_OP_BEACONS)
 888                 ath_beacon_config(sc, NULL);    /* restart beacons */
 889
 890         /* Re-Enable  interrupts */
 891         ath9k_hw_set_interrupts(ah, ah->imask);
 892
 893         /* Enable LED */
 894         ath9k_hw_cfg_output(ah, ah->led_pin,
 895                             AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
 896         ath9k_hw_set_gpio(ah, ah->led_pin, 0);
 897
 898         ieee80211_wake_queues(hw);
 899 out:
 900         spin_unlock_bh(&sc->sc_pcu_lock);
 901
 902         ath9k_ps_restore(sc);
 903 }
 904
 905 void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
 906 {
 907         struct ath_hw *ah = sc->sc_ah;
 908         struct ieee80211_channel *channel = hw->conf.channel;
 909         int r;
 910
 911         ath9k_ps_wakeup(sc);
 912         spin_lock_bh(&sc->sc_pcu_lock);
 913
 914         ieee80211_stop_queues(hw);
 915
 916         /*
 917          * Keep the LED on when the radio is disabled
 918          * during idle unassociated state.
 919          */
 920         if (!sc->ps_idle) {
 921                 ath9k_hw_set_gpio(ah, ah->led_pin, 1);
 922                 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
 923         }
 924
 925         /* Disable interrupts */
 926         ath9k_hw_disable_interrupts(ah);
 927
 928         ath_drain_all_txq(sc, false);   /* clear pending tx frames */
 929
 930         ath_stoprecv(sc);               /* turn off frame recv */
 931         ath_flushrecv(sc);              /* flush recv queue */
 932
 933         if (!ah->curchan)
 934                 ah->curchan = ath9k_cmn_get_curchannel(hw, ah);
 935
 936         r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
 937         if (r) {
 938                 ath_err(ath9k_hw_common(sc->sc_ah),
 939                         "Unable to reset channel (%u MHz), reset status %d\n",
 940                         channel->center_freq, r);
 941         }
 942
 943         ath9k_hw_phy_disable(ah);
 944
 945         ath9k_hw_configpcipowersave(ah, 1, 1);
 946
 947         spin_unlock_bh(&sc->sc_pcu_lock);
 948         ath9k_ps_restore(sc);
 949 }
 950
 951 int ath_reset(struct ath_softc *sc, bool retry_tx)
 952 {
 953         struct ath_hw *ah = sc->sc_ah;
 954         struct ath_common *common = ath9k_hw_common(ah);
 955         struct ieee80211_hw *hw = sc->hw;
 956         int r;
 957
 958         sc->hw_busy_count = 0;
 959
 960         /* Stop ANI */
 961         del_timer_sync(&common->ani.timer);
 962
 963         ath9k_ps_wakeup(sc);
 964         spin_lock_bh(&sc->sc_pcu_lock);
 965
 966         ieee80211_stop_queues(hw);
 967
 968         ath9k_hw_disable_interrupts(ah);
 969         ath_drain_all_txq(sc, retry_tx);
 970
 971         ath_stoprecv(sc);
 972         ath_flushrecv(sc);
 973
 974         r = ath9k_hw_reset(ah, sc->sc_ah->curchan, ah->caldata, false);
 975         if (r)
 976                 ath_err(common,
 977                         "Unable to reset hardware; reset status %d\n", r);
 978
 979         if (ath_startrecv(sc) != 0)
 980                 ath_err(common, "Unable to start recv logic\n");
 981
 982         /*
 983          * We may be doing a reset in response to a request
 984          * that changes the channel so update any state that
 985          * might change as a result.
 986          */
 987         ath9k_cmn_update_txpow(ah, sc->curtxpow,
 988                                sc->config.txpowlimit, &sc->curtxpow);
 989
 990         if ((sc->sc_flags & SC_OP_BEACONS) || !(sc->sc_flags & (SC_OP_OFFCHANNEL)))
 991                 ath_beacon_config(sc, NULL);    /* restart beacons */
 992
 993         ath9k_hw_set_interrupts(ah, ah->imask);
 994
 995         if (retry_tx) {
 996                 int i;
 997                 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
 998                         if (ATH_TXQ_SETUP(sc, i)) {
 999                                 spin_lock_bh(&sc->tx.txq[i].axq_lock);
1000                                 ath_txq_schedule(sc, &sc->tx.txq[i]);
1001                                 spin_unlock_bh(&sc->tx.txq[i].axq_lock);
1002                         }
1003                 }
1004         }
1005
1006         ieee80211_wake_queues(hw);
1007         spin_unlock_bh(&sc->sc_pcu_lock);
1008
1009         /* Start ANI */
1010         ath_start_ani(common);
1011         ath9k_ps_restore(sc);
1012
1013         return r;
1014 }
1015
1016 /**********************/
1017 /* mac80211 callbacks */
1018 /**********************/
1019
1020 static int ath9k_start(struct ieee80211_hw *hw)
1021 {
1022         struct ath_softc *sc = hw->priv;
1023         struct ath_hw *ah = sc->sc_ah;
1024         struct ath_common *common = ath9k_hw_common(ah);
1025         struct ieee80211_channel *curchan = hw->conf.channel;
1026         struct ath9k_channel *init_channel;
1027         int r;
1028
1029         ath_dbg(common, ATH_DBG_CONFIG,
1030                 "Starting driver with initial channel: %d MHz\n",
1031                 curchan->center_freq);
1032
1033         mutex_lock(&sc->mutex);
1034
1035         /* setup initial channel */
1036         sc->chan_idx = curchan->hw_value;
1037
1038         init_channel = ath9k_cmn_get_curchannel(hw, ah);
1039
1040         /* Reset SERDES registers */
1041         ath9k_hw_configpcipowersave(ah, 0, 0);
1042
1043         /*
1044          * The basic interface to setting the hardware in a good
1045          * state is ``reset''.  On return the hardware is known to
1046          * be powered up and with interrupts disabled.  This must
1047          * be followed by initialization of the appropriate bits
1048          * and then setup of the interrupt mask.
1049          */
1050         spin_lock_bh(&sc->sc_pcu_lock);
1051         r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
1052         if (r) {
1053                 ath_err(common,
1054                         "Unable to reset hardware; reset status %d (freq %u MHz)\n",
1055                         r, curchan->center_freq);
1056                 spin_unlock_bh(&sc->sc_pcu_lock);
1057                 goto mutex_unlock;
1058         }
1059
1060         /*
1061          * This is needed only to setup initial state
1062          * but it's best done after a reset.
1063          */
1064         ath9k_cmn_update_txpow(ah, sc->curtxpow,
1065                         sc->config.txpowlimit, &sc->curtxpow);
1066
1067         /*
1068          * Setup the hardware after reset:
1069          * The receive engine is set going.
1070          * Frame transmit is handled entirely
1071          * in the frame output path; there's nothing to do
1072          * here except setup the interrupt mask.
1073          */
1074         if (ath_startrecv(sc) != 0) {
1075                 ath_err(common, "Unable to start recv logic\n");
1076                 r = -EIO;
1077                 spin_unlock_bh(&sc->sc_pcu_lock);
1078                 goto mutex_unlock;
1079         }
1080         spin_unlock_bh(&sc->sc_pcu_lock);
1081
1082         /* Setup our intr mask. */
1083         ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
1084                     ATH9K_INT_RXORN | ATH9K_INT_FATAL |
1085                     ATH9K_INT_GLOBAL;
1086
1087         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
1088                 ah->imask |= ATH9K_INT_RXHP |
1089                              ATH9K_INT_RXLP |
1090                              ATH9K_INT_BB_WATCHDOG;
1091         else
1092                 ah->imask |= ATH9K_INT_RX;
1093
1094         ah->imask |= ATH9K_INT_GTT;
1095
1096         if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
1097                 ah->imask |= ATH9K_INT_CST;
1098
1099         sc->sc_flags &= ~SC_OP_INVALID;
1100         sc->sc_ah->is_monitoring = false;
1101
1102         /* Disable BMISS interrupt when we're not associated */
1103         ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
1104         ath9k_hw_set_interrupts(ah, ah->imask);
1105
1106         ieee80211_wake_queues(hw);
1107
1108         ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
1109
1110         if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
1111             !ah->btcoex_hw.enabled) {
1112                 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
1113                                            AR_STOMP_LOW_WLAN_WGHT);
1114                 ath9k_hw_btcoex_enable(ah);
1115
1116                 if (common->bus_ops->bt_coex_prep)
1117                         common->bus_ops->bt_coex_prep(common);
1118                 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1119                         ath9k_btcoex_timer_resume(sc);
1120         }
1121
1122         /* User has the option to provide pm-qos value as a module
1123          * parameter rather than using the default value of
1124          * 'ATH9K_PM_QOS_DEFAULT_VALUE'.
1125          */
1126         pm_qos_update_request(&sc->pm_qos_req, ath9k_pm_qos_value);
1127
1128         if (ah->caps.pcie_lcr_extsync_en && common->bus_ops->extn_synch_en)
1129                 common->bus_ops->extn_synch_en(common);
1130
1131 mutex_unlock:
1132         mutex_unlock(&sc->mutex);
1133
1134         return r;
1135 }
1136
1137 static int ath9k_tx(struct ieee80211_hw *hw,
1138                     struct sk_buff *skb)
1139 {
1140         struct ath_softc *sc = hw->priv;
1141         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1142         struct ath_tx_control txctl;
1143         struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1144
1145         if (sc->ps_enabled) {
1146                 /*
1147                  * mac80211 does not set PM field for normal data frames, so we
1148                  * need to update that based on the current PS mode.
1149                  */
1150                 if (ieee80211_is_data(hdr->frame_control) &&
1151                     !ieee80211_is_nullfunc(hdr->frame_control) &&
1152                     !ieee80211_has_pm(hdr->frame_control)) {
1153                         ath_dbg(common, ATH_DBG_PS,
1154                                 "Add PM=1 for a TX frame while in PS mode\n");
1155                         hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1156                 }
1157         }
1158
1159         if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
1160                 /*
1161                  * We are using PS-Poll and mac80211 can request TX while in
1162                  * power save mode. Need to wake up hardware for the TX to be
1163                  * completed and if needed, also for RX of buffered frames.
1164                  */
1165                 ath9k_ps_wakeup(sc);
1166                 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
1167                         ath9k_hw_setrxabort(sc->sc_ah, 0);
1168                 if (ieee80211_is_pspoll(hdr->frame_control)) {
1169                         ath_dbg(common, ATH_DBG_PS,
1170                                 "Sending PS-Poll to pick a buffered frame\n");
1171                         sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
1172                 } else {
1173                         ath_dbg(common, ATH_DBG_PS,
1174                                 "Wake up to complete TX\n");
1175                         sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
1176                 }
1177                 /*
1178                  * The actual restore operation will happen only after
1179                  * the sc_flags bit is cleared. We are just dropping
1180                  * the ps_usecount here.
1181                  */
1182                 ath9k_ps_restore(sc);
1183         }
1184
1185         memset(&txctl, 0, sizeof(struct ath_tx_control));
1186         txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
1187
1188         ath_dbg(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
1189
1190         if (ath_tx_start(hw, skb, &txctl) != 0) {
1191                 ath_dbg(common, ATH_DBG_XMIT, "TX failed\n");
1192                 goto exit;
1193         }
1194
1195         return 0;
1196 exit:
1197         dev_kfree_skb_any(skb);
1198         return 0;
1199 }
1200
1201 static void ath9k_stop(struct ieee80211_hw *hw)
1202 {
1203         struct ath_softc *sc = hw->priv;
1204         struct ath_hw *ah = sc->sc_ah;
1205         struct ath_common *common = ath9k_hw_common(ah);
1206
1207         mutex_lock(&sc->mutex);
1208
1209         if (led_blink)
1210                 cancel_delayed_work_sync(&sc->ath_led_blink_work);
1211
1212         cancel_delayed_work_sync(&sc->tx_complete_work);
1213         cancel_delayed_work_sync(&sc->hw_pll_work);
1214         cancel_work_sync(&sc->paprd_work);
1215         cancel_work_sync(&sc->hw_check_work);
1216
1217         if (sc->sc_flags & SC_OP_INVALID) {
1218                 ath_dbg(common, ATH_DBG_ANY, "Device not present\n");
1219                 mutex_unlock(&sc->mutex);
1220                 return;
1221         }
1222
1223         /* Ensure HW is awake when we try to shut it down. */
1224         ath9k_ps_wakeup(sc);
1225
1226         if (ah->btcoex_hw.enabled) {
1227                 ath9k_hw_btcoex_disable(ah);
1228                 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1229                         ath9k_btcoex_timer_pause(sc);
1230         }
1231
1232         spin_lock_bh(&sc->sc_pcu_lock);
1233
1234         /* prevent tasklets to enable interrupts once we disable them */
1235         ah->imask &= ~ATH9K_INT_GLOBAL;
1236
1237         /* make sure h/w will not generate any interrupt
1238          * before setting the invalid flag. */
1239         ath9k_hw_disable_interrupts(ah);
1240
1241         if (!(sc->sc_flags & SC_OP_INVALID)) {
1242                 ath_drain_all_txq(sc, false);
1243                 ath_stoprecv(sc);
1244                 ath9k_hw_phy_disable(ah);
1245         } else
1246                 sc->rx.rxlink = NULL;
1247
1248         if (sc->rx.frag) {
1249                 dev_kfree_skb_any(sc->rx.frag);
1250                 sc->rx.frag = NULL;
1251         }
1252
1253         /* disable HAL and put h/w to sleep */
1254         ath9k_hw_disable(ah);
1255         ath9k_hw_configpcipowersave(ah, 1, 1);
1256
1257         spin_unlock_bh(&sc->sc_pcu_lock);
1258
1259         /* we can now sync irq and kill any running tasklets, since we already
1260          * disabled interrupts and not holding a spin lock */
1261         synchronize_irq(sc->irq);
1262         tasklet_kill(&sc->intr_tq);
1263         tasklet_kill(&sc->bcon_tasklet);
1264
1265         ath9k_ps_restore(sc);
1266
1267         sc->ps_idle = true;
1268         ath_radio_disable(sc, hw);
1269
1270         sc->sc_flags |= SC_OP_INVALID;
1271
1272         pm_qos_update_request(&sc->pm_qos_req, PM_QOS_DEFAULT_VALUE);
1273
1274         mutex_unlock(&sc->mutex);
1275
1276         ath_dbg(common, ATH_DBG_CONFIG, "Driver halt\n");
1277 }
1278
1279 bool ath9k_uses_beacons(int type)
1280 {
1281         switch (type) {
1282         case NL80211_IFTYPE_AP:
1283         case NL80211_IFTYPE_ADHOC:
1284         case NL80211_IFTYPE_MESH_POINT:
1285                 return true;
1286         default:
1287                 return false;
1288         }
1289 }
1290
1291 static void ath9k_reclaim_beacon(struct ath_softc *sc,
1292                                  struct ieee80211_vif *vif)
1293 {
1294         struct ath_vif *avp = (void *)vif->drv_priv;
1295
1296         /* Disable SWBA interrupt */
1297         sc->sc_ah->imask &= ~ATH9K_INT_SWBA;
1298         ath9k_ps_wakeup(sc);
1299         ath9k_hw_set_interrupts(sc->sc_ah, sc->sc_ah->imask);
1300         ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1301         tasklet_kill(&sc->bcon_tasklet);
1302         ath9k_ps_restore(sc);
1303
1304         ath_beacon_return(sc, avp);
1305         sc->sc_flags &= ~SC_OP_BEACONS;
1306
1307         if (sc->nbcnvifs > 0) {
1308                 /* Re-enable beaconing */
1309                 sc->sc_ah->imask |= ATH9K_INT_SWBA;
1310                 ath9k_ps_wakeup(sc);
1311                 ath9k_hw_set_interrupts(sc->sc_ah, sc->sc_ah->imask);
1312                 ath9k_ps_restore(sc);
1313         }
1314 }
1315
1316 static void ath9k_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
1317 {
1318         struct ath9k_vif_iter_data *iter_data = data;
1319         int i;
1320
1321         if (iter_data->hw_macaddr)
1322                 for (i = 0; i < ETH_ALEN; i++)
1323                         iter_data->mask[i] &=
1324                                 ~(iter_data->hw_macaddr[i] ^ mac[i]);
1325
1326         switch (vif->type) {
1327         case NL80211_IFTYPE_AP:
1328                 iter_data->naps++;
1329                 break;
1330         case NL80211_IFTYPE_STATION:
1331                 iter_data->nstations++;
1332                 break;
1333         case NL80211_IFTYPE_ADHOC:
1334                 iter_data->nadhocs++;
1335                 break;
1336         case NL80211_IFTYPE_MESH_POINT:
1337                 iter_data->nmeshes++;
1338                 break;
1339         case NL80211_IFTYPE_WDS:
1340                 iter_data->nwds++;
1341                 break;
1342         default:
1343                 iter_data->nothers++;
1344                 break;
1345         }
1346 }
1347
1348 /* Called with sc->mutex held. */
1349 void ath9k_calculate_iter_data(struct ieee80211_hw *hw,
1350                                struct ieee80211_vif *vif,
1351                                struct ath9k_vif_iter_data *iter_data)
1352 {
1353         struct ath_softc *sc = hw->priv;
1354         struct ath_hw *ah = sc->sc_ah;
1355         struct ath_common *common = ath9k_hw_common(ah);
1356
1357         /*
1358          * Use the hardware MAC address as reference, the hardware uses it
1359          * together with the BSSID mask when matching addresses.
1360          */
1361         memset(iter_data, 0, sizeof(*iter_data));
1362         iter_data->hw_macaddr = common->macaddr;
1363         memset(&iter_data->mask, 0xff, ETH_ALEN);
1364
1365         if (vif)
1366                 ath9k_vif_iter(iter_data, vif->addr, vif);
1367
1368         /* Get list of all active MAC addresses */
1369         ieee80211_iterate_active_interfaces_atomic(sc->hw, ath9k_vif_iter,
1370                                                    iter_data);
1371 }
1372
1373 /* Called with sc->mutex held. */
1374 static void ath9k_calculate_summary_state(struct ieee80211_hw *hw,
1375                                           struct ieee80211_vif *vif)
1376 {
1377         struct ath_softc *sc = hw->priv;
1378         struct ath_hw *ah = sc->sc_ah;
1379         struct ath_common *common = ath9k_hw_common(ah);
1380         struct ath9k_vif_iter_data iter_data;
1381
1382         ath9k_calculate_iter_data(hw, vif, &iter_data);
1383
1384         ath9k_ps_wakeup(sc);
1385         /* Set BSSID mask. */
1386         memcpy(common->bssidmask, iter_data.mask, ETH_ALEN);
1387         ath_hw_setbssidmask(common);
1388
1389         /* Set op-mode & TSF */
1390         if (iter_data.naps > 0) {
1391                 ath9k_hw_set_tsfadjust(ah, 1);
1392                 sc->sc_flags |= SC_OP_TSF_RESET;
1393                 ah->opmode = NL80211_IFTYPE_AP;
1394         } else {
1395                 ath9k_hw_set_tsfadjust(ah, 0);
1396                 sc->sc_flags &= ~SC_OP_TSF_RESET;
1397
1398                 if (iter_data.nwds + iter_data.nmeshes)
1399                         ah->opmode = NL80211_IFTYPE_AP;
1400                 else if (iter_data.nadhocs)
1401                         ah->opmode = NL80211_IFTYPE_ADHOC;
1402                 else
1403                         ah->opmode = NL80211_IFTYPE_STATION;
1404         }
1405
1406         /*
1407          * Enable MIB interrupts when there are hardware phy counters.
1408          */
1409         if ((iter_data.nstations + iter_data.nadhocs + iter_data.nmeshes) > 0) {
1410                 if (ah->config.enable_ani)
1411                         ah->imask |= ATH9K_INT_MIB;
1412                 ah->imask |= ATH9K_INT_TSFOOR;
1413         } else {
1414                 ah->imask &= ~ATH9K_INT_MIB;
1415                 ah->imask &= ~ATH9K_INT_TSFOOR;
1416         }
1417
1418         ath9k_hw_set_interrupts(ah, ah->imask);
1419         ath9k_ps_restore(sc);
1420
1421         /* Set up ANI */
1422         if ((iter_data.naps + iter_data.nadhocs) > 0) {
1423                 sc->sc_flags |= SC_OP_ANI_RUN;
1424                 ath_start_ani(common);
1425         } else {
1426                 sc->sc_flags &= ~SC_OP_ANI_RUN;
1427                 del_timer_sync(&common->ani.timer);
1428         }
1429 }
1430
1431 /* Called with sc->mutex held, vif counts set up properly. */
1432 static void ath9k_do_vif_add_setup(struct ieee80211_hw *hw,
1433                                    struct ieee80211_vif *vif)
1434 {
1435         struct ath_softc *sc = hw->priv;
1436
1437         ath9k_calculate_summary_state(hw, vif);
1438
1439         if (ath9k_uses_beacons(vif->type)) {
1440                 int error;
1441                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1442                 /* This may fail because upper levels do not have beacons
1443                  * properly configured yet.  That's OK, we assume it
1444                  * will be properly configured and then we will be notified
1445                  * in the info_changed method and set up beacons properly
1446                  * there.
1447                  */
1448                 error = ath_beacon_alloc(sc, vif);
1449                 if (!error)
1450                         ath_beacon_config(sc, vif);
1451         }
1452 }
1453
1454
1455 static int ath9k_add_interface(struct ieee80211_hw *hw,
1456                                struct ieee80211_vif *vif)
1457 {
1458         struct ath_softc *sc = hw->priv;
1459         struct ath_hw *ah = sc->sc_ah;
1460         struct ath_common *common = ath9k_hw_common(ah);
1461         struct ath_vif *avp = (void *)vif->drv_priv;
1462         int ret = 0;
1463
1464         mutex_lock(&sc->mutex);
1465
1466         switch (vif->type) {
1467         case NL80211_IFTYPE_STATION:
1468         case NL80211_IFTYPE_WDS:
1469         case NL80211_IFTYPE_ADHOC:
1470         case NL80211_IFTYPE_AP:
1471         case NL80211_IFTYPE_MESH_POINT:
1472                 break;
1473         default:
1474                 ath_err(common, "Interface type %d not yet supported\n",
1475                         vif->type);
1476                 ret = -EOPNOTSUPP;
1477                 goto out;
1478         }
1479
1480         if (ath9k_uses_beacons(vif->type)) {
1481                 if (sc->nbcnvifs >= ATH_BCBUF) {
1482                         ath_err(common, "Not enough beacon buffers when adding"
1483                                 " new interface of type: %i\n",
1484                                 vif->type);
1485                         ret = -ENOBUFS;
1486                         goto out;
1487                 }
1488         }
1489
1490         if ((vif->type == NL80211_IFTYPE_ADHOC) &&
1491             sc->nvifs > 0) {
1492                 ath_err(common, "Cannot create ADHOC interface when other"
1493                         " interfaces already exist.\n");
1494                 ret = -EINVAL;
1495                 goto out;
1496         }
1497
1498         ath_dbg(common, ATH_DBG_CONFIG,
1499                 "Attach a VIF of type: %d\n", vif->type);
1500
1501         /* Set the VIF opmode */
1502         avp->av_opmode = vif->type;
1503         avp->av_bslot = -1;
1504
1505         sc->nvifs++;
1506
1507         ath9k_do_vif_add_setup(hw, vif);
1508 out:
1509         mutex_unlock(&sc->mutex);
1510         return ret;
1511 }
1512
1513 static int ath9k_change_interface(struct ieee80211_hw *hw,
1514                                   struct ieee80211_vif *vif,
1515                                   enum nl80211_iftype new_type,
1516                                   bool p2p)
1517 {
1518         struct ath_softc *sc = hw->priv;
1519         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1520         int ret = 0;
1521
1522         ath_dbg(common, ATH_DBG_CONFIG, "Change Interface\n");
1523         mutex_lock(&sc->mutex);
1524
1525         /* See if new interface type is valid. */
1526         if ((new_type == NL80211_IFTYPE_ADHOC) &&
1527             (sc->nvifs > 1)) {
1528                 ath_err(common, "When using ADHOC, it must be the only"
1529                         " interface.\n");
1530                 ret = -EINVAL;
1531                 goto out;
1532         }
1533
1534         if (ath9k_uses_beacons(new_type) &&
1535             !ath9k_uses_beacons(vif->type)) {
1536                 if (sc->nbcnvifs >= ATH_BCBUF) {
1537                         ath_err(common, "No beacon slot available\n");
1538                         ret = -ENOBUFS;
1539                         goto out;
1540                 }
1541         }
1542
1543         /* Clean up old vif stuff */
1544         if (ath9k_uses_beacons(vif->type))
1545                 ath9k_reclaim_beacon(sc, vif);
1546
1547         /* Add new settings */
1548         vif->type = new_type;
1549         vif->p2p = p2p;
1550
1551         ath9k_do_vif_add_setup(hw, vif);
1552 out:
1553         mutex_unlock(&sc->mutex);
1554         return ret;
1555 }
1556
1557 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1558                                    struct ieee80211_vif *vif)
1559 {
1560         struct ath_softc *sc = hw->priv;
1561         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1562
1563         ath_dbg(common, ATH_DBG_CONFIG, "Detach Interface\n");
1564
1565         mutex_lock(&sc->mutex);
1566
1567         sc->nvifs--;
1568
1569         /* Reclaim beacon resources */
1570         if (ath9k_uses_beacons(vif->type))
1571                 ath9k_reclaim_beacon(sc, vif);
1572
1573         ath9k_calculate_summary_state(hw, NULL);
1574
1575         mutex_unlock(&sc->mutex);
1576 }
1577
1578 static void ath9k_enable_ps(struct ath_softc *sc)
1579 {
1580         struct ath_hw *ah = sc->sc_ah;
1581
1582         sc->ps_enabled = true;
1583         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1584                 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1585                         ah->imask |= ATH9K_INT_TIM_TIMER;
1586                         ath9k_hw_set_interrupts(ah, ah->imask);
1587                 }
1588                 ath9k_hw_setrxabort(ah, 1);
1589         }
1590 }
1591
1592 static void ath9k_disable_ps(struct ath_softc *sc)
1593 {
1594         struct ath_hw *ah = sc->sc_ah;
1595
1596         sc->ps_enabled = false;
1597         ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
1598         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1599                 ath9k_hw_setrxabort(ah, 0);
1600                 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1601                                   PS_WAIT_FOR_CAB |
1602                                   PS_WAIT_FOR_PSPOLL_DATA |
1603                                   PS_WAIT_FOR_TX_ACK);
1604                 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1605                         ah->imask &= ~ATH9K_INT_TIM_TIMER;
1606                         ath9k_hw_set_interrupts(ah, ah->imask);
1607                 }
1608         }
1609
1610 }
1611
1612 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1613 {
1614         struct ath_softc *sc = hw->priv;
1615         struct ath_hw *ah = sc->sc_ah;
1616         struct ath_common *common = ath9k_hw_common(ah);
1617         struct ieee80211_conf *conf = &hw->conf;
1618         bool disable_radio = false;
1619
1620         mutex_lock(&sc->mutex);
1621
1622         /*
1623          * Leave this as the first check because we need to turn on the
1624          * radio if it was disabled before prior to processing the rest
1625          * of the changes. Likewise we must only disable the radio towards
1626          * the end.
1627          */
1628         if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1629                 sc->ps_idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1630                 if (!sc->ps_idle) {
1631                         ath_radio_enable(sc, hw);
1632                         ath_dbg(common, ATH_DBG_CONFIG,
1633                                 "not-idle: enabling radio\n");
1634                 } else {
1635                         disable_radio = true;
1636                 }
1637         }
1638
1639         /*
1640          * We just prepare to enable PS. We have to wait until our AP has
1641          * ACK'd our null data frame to disable RX otherwise we'll ignore
1642          * those ACKs and end up retransmitting the same null data frames.
1643          * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1644          */
1645         if (changed & IEEE80211_CONF_CHANGE_PS) {
1646                 unsigned long flags;
1647                 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1648                 if (conf->flags & IEEE80211_CONF_PS)
1649                         ath9k_enable_ps(sc);
1650                 else
1651                         ath9k_disable_ps(sc);
1652                 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1653         }
1654
1655         if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1656                 if (conf->flags & IEEE80211_CONF_MONITOR) {
1657                         ath_dbg(common, ATH_DBG_CONFIG,
1658                                 "Monitor mode is enabled\n");
1659                         sc->sc_ah->is_monitoring = true;
1660                 } else {
1661                         ath_dbg(common, ATH_DBG_CONFIG,
1662                                 "Monitor mode is disabled\n");
1663                         sc->sc_ah->is_monitoring = false;
1664                 }
1665         }
1666
1667         if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
1668                 struct ieee80211_channel *curchan = hw->conf.channel;
1669                 int pos = curchan->hw_value;
1670                 int old_pos = -1;
1671                 unsigned long flags;
1672
1673                 if (ah->curchan)
1674                         old_pos = ah->curchan - &ah->channels[0];
1675
1676                 if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
1677                         sc->sc_flags |= SC_OP_OFFCHANNEL;
1678                 else
1679                         sc->sc_flags &= ~SC_OP_OFFCHANNEL;
1680
1681                 ath_dbg(common, ATH_DBG_CONFIG,
1682                         "Set channel: %d MHz type: %d\n",
1683                         curchan->center_freq, conf->channel_type);
1684
1685                 ath9k_cmn_update_ichannel(&sc->sc_ah->channels[pos],
1686                                           curchan, conf->channel_type);
1687
1688                 /* update survey stats for the old channel before switching */
1689                 spin_lock_irqsave(&common->cc_lock, flags);
1690                 ath_update_survey_stats(sc);
1691                 spin_unlock_irqrestore(&common->cc_lock, flags);
1692
1693                 /*
1694                  * If the operating channel changes, change the survey in-use flags
1695                  * along with it.
1696                  * Reset the survey data for the new channel, unless we're switching
1697                  * back to the operating channel from an off-channel operation.
1698                  */
1699                 if (!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) &&
1700                     sc->cur_survey != &sc->survey[pos]) {
1701
1702                         if (sc->cur_survey)
1703                                 sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE;
1704
1705                         sc->cur_survey = &sc->survey[pos];
1706
1707                         memset(sc->cur_survey, 0, sizeof(struct survey_info));
1708                         sc->cur_survey->filled |= SURVEY_INFO_IN_USE;
1709                 } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) {
1710                         memset(&sc->survey[pos], 0, sizeof(struct survey_info));
1711                 }
1712
1713                 if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
1714                         ath_err(common, "Unable to set channel\n");
1715                         mutex_unlock(&sc->mutex);
1716                         return -EINVAL;
1717                 }
1718
1719                 /*
1720                  * The most recent snapshot of channel->noisefloor for the old
1721                  * channel is only available after the hardware reset. Copy it to
1722                  * the survey stats now.
1723                  */
1724                 if (old_pos >= 0)
1725                         ath_update_survey_nf(sc, old_pos);
1726         }
1727
1728         if (changed & IEEE80211_CONF_CHANGE_POWER) {
1729                 ath_dbg(common, ATH_DBG_CONFIG,
1730                         "Set power: %d\n", conf->power_level);
1731                 sc->config.txpowlimit = 2 * conf->power_level;
1732                 ath9k_ps_wakeup(sc);
1733                 ath9k_cmn_update_txpow(ah, sc->curtxpow,
1734                                        sc->config.txpowlimit, &sc->curtxpow);
1735                 ath9k_ps_restore(sc);
1736         }
1737
1738         if (disable_radio) {
1739                 ath_dbg(common, ATH_DBG_CONFIG, "idle: disabling radio\n");
1740                 ath_radio_disable(sc, hw);
1741         }
1742
1743         mutex_unlock(&sc->mutex);
1744
1745         return 0;
1746 }
1747
1748 #define SUPPORTED_FILTERS                       \
1749         (FIF_PROMISC_IN_BSS |                   \
1750         FIF_ALLMULTI |                          \
1751         FIF_CONTROL |                           \
1752         FIF_PSPOLL |                            \
1753         FIF_OTHER_BSS |                         \
1754         FIF_BCN_PRBRESP_PROMISC |               \
1755         FIF_PROBE_REQ |                         \
1756         FIF_FCSFAIL)
1757
1758 /* FIXME: sc->sc_full_reset ? */
1759 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1760                                    unsigned int changed_flags,
1761                                    unsigned int *total_flags,
1762                                    u64 multicast)
1763 {
1764         struct ath_softc *sc = hw->priv;
1765         u32 rfilt;
1766
1767         changed_flags &= SUPPORTED_FILTERS;
1768         *total_flags &= SUPPORTED_FILTERS;
1769
1770         sc->rx.rxfilter = *total_flags;
1771         ath9k_ps_wakeup(sc);
1772         rfilt = ath_calcrxfilter(sc);
1773         ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1774         ath9k_ps_restore(sc);
1775
1776         ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
1777                 "Set HW RX filter: 0x%x\n", rfilt);
1778 }
1779
1780 static int ath9k_sta_add(struct ieee80211_hw *hw,
1781                          struct ieee80211_vif *vif,
1782                          struct ieee80211_sta *sta)
1783 {
1784         struct ath_softc *sc = hw->priv;
1785
1786         ath_node_attach(sc, sta);
1787
1788         return 0;
1789 }
1790
1791 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1792                             struct ieee80211_vif *vif,
1793                             struct ieee80211_sta *sta)
1794 {
1795         struct ath_softc *sc = hw->priv;
1796
1797         ath_node_detach(sc, sta);
1798
1799         return 0;
1800 }
1801
1802 static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
1803                          const struct ieee80211_tx_queue_params *params)
1804 {
1805         struct ath_softc *sc = hw->priv;
1806         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1807         struct ath_txq *txq;
1808         struct ath9k_tx_queue_info qi;
1809         int ret = 0;
1810
1811         if (queue >= WME_NUM_AC)
1812                 return 0;
1813
1814         txq = sc->tx.txq_map[queue];
1815
1816         mutex_lock(&sc->mutex);
1817
1818         memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1819
1820         qi.tqi_aifs = params->aifs;
1821         qi.tqi_cwmin = params->cw_min;
1822         qi.tqi_cwmax = params->cw_max;
1823         qi.tqi_burstTime = params->txop;
1824
1825         ath_dbg(common, ATH_DBG_CONFIG,
1826                 "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1827                 queue, txq->axq_qnum, params->aifs, params->cw_min,
1828                 params->cw_max, params->txop);
1829
1830         ret = ath_txq_update(sc, txq->axq_qnum, &qi);
1831         if (ret)
1832                 ath_err(common, "TXQ Update failed\n");
1833
1834         if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
1835                 if (queue == WME_AC_BE && !ret)
1836                         ath_beaconq_config(sc);
1837
1838         mutex_unlock(&sc->mutex);
1839
1840         return ret;
1841 }
1842
1843 static int ath9k_set_key(struct ieee80211_hw *hw,
1844                          enum set_key_cmd cmd,
1845                          struct ieee80211_vif *vif,
1846                          struct ieee80211_sta *sta,
1847                          struct ieee80211_key_conf *key)
1848 {
1849         struct ath_softc *sc = hw->priv;
1850         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1851         int ret = 0;
1852
1853         if (ath9k_modparam_nohwcrypt)
1854                 return -ENOSPC;
1855
1856         mutex_lock(&sc->mutex);
1857         ath9k_ps_wakeup(sc);
1858         ath_dbg(common, ATH_DBG_CONFIG, "Set HW Key\n");
1859
1860         switch (cmd) {
1861         case SET_KEY:
1862                 ret = ath_key_config(common, vif, sta, key);
1863                 if (ret >= 0) {
1864                         key->hw_key_idx = ret;
1865                         /* push IV and Michael MIC generation to stack */
1866                         key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1867                         if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
1868                                 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1869                         if (sc->sc_ah->sw_mgmt_crypto &&
1870                             key->cipher == WLAN_CIPHER_SUITE_CCMP)
1871                                 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
1872                         ret = 0;
1873                 }
1874                 break;
1875         case DISABLE_KEY:
1876                 ath_key_delete(common, key);
1877                 break;
1878         default:
1879                 ret = -EINVAL;
1880         }
1881
1882         ath9k_ps_restore(sc);
1883         mutex_unlock(&sc->mutex);
1884
1885         return ret;
1886 }
1887
1888 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1889                                    struct ieee80211_vif *vif,
1890                                    struct ieee80211_bss_conf *bss_conf,
1891                                    u32 changed)
1892 {
1893         struct ath_softc *sc = hw->priv;
1894         struct ath_hw *ah = sc->sc_ah;
1895         struct ath_common *common = ath9k_hw_common(ah);
1896         struct ath_vif *avp = (void *)vif->drv_priv;
1897         int slottime;
1898         int error;
1899
1900         mutex_lock(&sc->mutex);
1901
1902         if (changed & BSS_CHANGED_BSSID) {
1903                 /* Set BSSID */
1904                 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1905                 memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
1906                 common->curaid = 0;
1907                 ath9k_hw_write_associd(ah);
1908
1909                 /* Set aggregation protection mode parameters */
1910                 sc->config.ath_aggr_prot = 0;
1911
1912                 ath_dbg(common, ATH_DBG_CONFIG, "BSSID: %pM aid: 0x%x\n",
1913                         common->curbssid, common->curaid);
1914
1915                 /* need to reconfigure the beacon */
1916                 sc->sc_flags &= ~SC_OP_BEACONS ;
1917         }
1918
1919         /* Enable transmission of beacons (AP, IBSS, MESH) */
1920         if ((changed & BSS_CHANGED_BEACON) ||
1921             ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
1922                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1923                 error = ath_beacon_alloc(sc, vif);
1924                 if (!error)
1925                         ath_beacon_config(sc, vif);
1926         }
1927
1928         if (changed & BSS_CHANGED_ERP_SLOT) {
1929                 if (bss_conf->use_short_slot)
1930                         slottime = 9;
1931                 else
1932                         slottime = 20;
1933                 if (vif->type == NL80211_IFTYPE_AP) {
1934                         /*
1935                          * Defer update, so that connected stations can adjust
1936                          * their settings at the same time.
1937                          * See beacon.c for more details
1938                          */
1939                         sc->beacon.slottime = slottime;
1940                         sc->beacon.updateslot = UPDATE;
1941                 } else {
1942                         ah->slottime = slottime;
1943                         ath9k_hw_init_global_settings(ah);
1944                 }
1945         }
1946
1947         /* Disable transmission of beacons */
1948         if ((changed & BSS_CHANGED_BEACON_ENABLED) && !bss_conf->enable_beacon)
1949                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1950
1951         if (changed & BSS_CHANGED_BEACON_INT) {
1952                 sc->beacon_interval = bss_conf->beacon_int;
1953                 /*
1954                  * In case of AP mode, the HW TSF has to be reset
1955                  * when the beacon interval changes.
1956                  */
1957                 if (vif->type == NL80211_IFTYPE_AP) {
1958                         sc->sc_flags |= SC_OP_TSF_RESET;
1959                         ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1960                         error = ath_beacon_alloc(sc, vif);
1961                         if (!error)
1962                                 ath_beacon_config(sc, vif);
1963                 } else {
1964                         ath_beacon_config(sc, vif);
1965                 }
1966         }
1967
1968         if (changed & BSS_CHANGED_ERP_PREAMBLE) {
1969                 ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
1970                         bss_conf->use_short_preamble);
1971                 if (bss_conf->use_short_preamble)
1972                         sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
1973                 else
1974                         sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
1975         }
1976
1977         if (changed & BSS_CHANGED_ERP_CTS_PROT) {
1978                 ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
1979                         bss_conf->use_cts_prot);
1980                 if (bss_conf->use_cts_prot &&
1981                     hw->conf.channel->band != IEEE80211_BAND_5GHZ)
1982                         sc->sc_flags |= SC_OP_PROTECT_ENABLE;
1983                 else
1984                         sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
1985         }
1986
1987         if (changed & BSS_CHANGED_ASSOC) {
1988                 ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed ASSOC %d\n",
1989                         bss_conf->assoc);
1990                 ath9k_bss_assoc_info(sc, hw, vif, bss_conf);
1991         }
1992
1993         mutex_unlock(&sc->mutex);
1994 }
1995
1996 static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
1997 {
1998         struct ath_softc *sc = hw->priv;
1999         u64 tsf;
2000
2001         mutex_lock(&sc->mutex);
2002         ath9k_ps_wakeup(sc);
2003         tsf = ath9k_hw_gettsf64(sc->sc_ah);
2004         ath9k_ps_restore(sc);
2005         mutex_unlock(&sc->mutex);
2006
2007         return tsf;
2008 }
2009
2010 static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
2011 {
2012         struct ath_softc *sc = hw->priv;
2013
2014         mutex_lock(&sc->mutex);
2015         ath9k_ps_wakeup(sc);
2016         ath9k_hw_settsf64(sc->sc_ah, tsf);
2017         ath9k_ps_restore(sc);
2018         mutex_unlock(&sc->mutex);
2019 }
2020
2021 static void ath9k_reset_tsf(struct ieee80211_hw *hw)
2022 {
2023         struct ath_softc *sc = hw->priv;
2024
2025         mutex_lock(&sc->mutex);
2026
2027         ath9k_ps_wakeup(sc);
2028         ath9k_hw_reset_tsf(sc->sc_ah);
2029         ath9k_ps_restore(sc);
2030
2031         mutex_unlock(&sc->mutex);
2032 }
2033
2034 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
2035                               struct ieee80211_vif *vif,
2036                               enum ieee80211_ampdu_mlme_action action,
2037                               struct ieee80211_sta *sta,
2038                               u16 tid, u16 *ssn, u8 buf_size)
2039 {
2040         struct ath_softc *sc = hw->priv;
2041         int ret = 0;
2042
2043         local_bh_disable();
2044
2045         switch (action) {
2046         case IEEE80211_AMPDU_RX_START:
2047                 if (!(sc->sc_flags & SC_OP_RXAGGR))
2048                         ret = -ENOTSUPP;
2049                 break;
2050         case IEEE80211_AMPDU_RX_STOP:
2051                 break;
2052         case IEEE80211_AMPDU_TX_START:
2053                 if (!(sc->sc_flags & SC_OP_TXAGGR))
2054                         return -EOPNOTSUPP;
2055
2056                 ath9k_ps_wakeup(sc);
2057                 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
2058                 if (!ret)
2059                         ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2060                 ath9k_ps_restore(sc);
2061                 break;
2062         case IEEE80211_AMPDU_TX_STOP:
2063                 ath9k_ps_wakeup(sc);
2064                 ath_tx_aggr_stop(sc, sta, tid);
2065                 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2066                 ath9k_ps_restore(sc);
2067                 break;
2068         case IEEE80211_AMPDU_TX_OPERATIONAL:
2069                 ath9k_ps_wakeup(sc);
2070                 ath_tx_aggr_resume(sc, sta, tid);
2071                 ath9k_ps_restore(sc);
2072                 break;
2073         default:
2074                 ath_err(ath9k_hw_common(sc->sc_ah), "Unknown AMPDU action\n");
2075         }
2076
2077         local_bh_enable();
2078
2079         return ret;
2080 }
2081
2082 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
2083                              struct survey_info *survey)
2084 {
2085         struct ath_softc *sc = hw->priv;
2086         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2087         struct ieee80211_supported_band *sband;
2088         struct ieee80211_channel *chan;
2089         unsigned long flags;
2090         int pos;
2091
2092         spin_lock_irqsave(&common->cc_lock, flags);
2093         if (idx == 0)
2094                 ath_update_survey_stats(sc);
2095
2096         sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
2097         if (sband && idx >= sband->n_channels) {
2098                 idx -= sband->n_channels;
2099                 sband = NULL;
2100         }
2101
2102         if (!sband)
2103                 sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
2104
2105         if (!sband || idx >= sband->n_channels) {
2106                 spin_unlock_irqrestore(&common->cc_lock, flags);
2107                 return -ENOENT;
2108         }
2109
2110         chan = &sband->channels[idx];
2111         pos = chan->hw_value;
2112         memcpy(survey, &sc->survey[pos], sizeof(*survey));
2113         survey->channel = chan;
2114         spin_unlock_irqrestore(&common->cc_lock, flags);
2115
2116         return 0;
2117 }
2118
2119 static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
2120 {
2121         struct ath_softc *sc = hw->priv;
2122         struct ath_hw *ah = sc->sc_ah;
2123
2124         mutex_lock(&sc->mutex);
2125         ah->coverage_class = coverage_class;
2126         ath9k_hw_init_global_settings(ah);
2127         mutex_unlock(&sc->mutex);
2128 }
2129
2130 struct ieee80211_ops ath9k_ops = {
2131         .tx                 = ath9k_tx,
2132         .start              = ath9k_start,
2133         .stop               = ath9k_stop,
2134         .add_interface      = ath9k_add_interface,
2135         .change_interface   = ath9k_change_interface,
2136         .remove_interface   = ath9k_remove_interface,
2137         .config             = ath9k_config,
2138         .configure_filter   = ath9k_configure_filter,
2139         .sta_add            = ath9k_sta_add,
2140         .sta_remove         = ath9k_sta_remove,
2141         .conf_tx            = ath9k_conf_tx,
2142         .bss_info_changed   = ath9k_bss_info_changed,
2143         .set_key            = ath9k_set_key,
2144         .get_tsf            = ath9k_get_tsf,
2145         .set_tsf            = ath9k_set_tsf,
2146         .reset_tsf          = ath9k_reset_tsf,
2147         .ampdu_action       = ath9k_ampdu_action,
2148         .get_survey         = ath9k_get_survey,
2149         .rfkill_poll        = ath9k_rfkill_poll_state,
2150         .set_coverage_class = ath9k_set_coverage_class,
2151 };