drivers/net/wireless/ath/ath9k/htc_drv_init.c

   1 /*
   2  * Copyright (c) 2010 Atheros Communications Inc.
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #include "htc.h"
  18
  19 MODULE_AUTHOR("Atheros Communications");
  20 MODULE_LICENSE("Dual BSD/GPL");
  21 MODULE_DESCRIPTION("Atheros driver 802.11n HTC based wireless devices");
  22
  23 static unsigned int ath9k_debug = ATH_DBG_DEFAULT;
  24 module_param_named(debug, ath9k_debug, uint, 0);
  25 MODULE_PARM_DESC(debug, "Debugging mask");
  26
  27 int htc_modparam_nohwcrypt;
  28 module_param_named(nohwcrypt, htc_modparam_nohwcrypt, int, 0444);
  29 MODULE_PARM_DESC(nohwcrypt, "Disable hardware encryption");
  30
  31 #define CHAN2G(_freq, _idx)  { \
  32         .center_freq = (_freq), \
  33         .hw_value = (_idx), \
  34         .max_power = 20, \
  35 }
  36
  37 #define CHAN5G(_freq, _idx) { \
  38         .band = IEEE80211_BAND_5GHZ, \
  39         .center_freq = (_freq), \
  40         .hw_value = (_idx), \
  41         .max_power = 20, \
  42 }
  43
  44 #define ATH_HTC_BTCOEX_PRODUCT_ID "wb193"
  45
  46 static struct ieee80211_channel ath9k_2ghz_channels[] = {
  47         CHAN2G(2412, 0), /* Channel 1 */
  48         CHAN2G(2417, 1), /* Channel 2 */
  49         CHAN2G(2422, 2), /* Channel 3 */
  50         CHAN2G(2427, 3), /* Channel 4 */
  51         CHAN2G(2432, 4), /* Channel 5 */
  52         CHAN2G(2437, 5), /* Channel 6 */
  53         CHAN2G(2442, 6), /* Channel 7 */
  54         CHAN2G(2447, 7), /* Channel 8 */
  55         CHAN2G(2452, 8), /* Channel 9 */
  56         CHAN2G(2457, 9), /* Channel 10 */
  57         CHAN2G(2462, 10), /* Channel 11 */
  58         CHAN2G(2467, 11), /* Channel 12 */
  59         CHAN2G(2472, 12), /* Channel 13 */
  60         CHAN2G(2484, 13), /* Channel 14 */
  61 };
  62
  63 static struct ieee80211_channel ath9k_5ghz_channels[] = {
  64         /* _We_ call this UNII 1 */
  65         CHAN5G(5180, 14), /* Channel 36 */
  66         CHAN5G(5200, 15), /* Channel 40 */
  67         CHAN5G(5220, 16), /* Channel 44 */
  68         CHAN5G(5240, 17), /* Channel 48 */
  69         /* _We_ call this UNII 2 */
  70         CHAN5G(5260, 18), /* Channel 52 */
  71         CHAN5G(5280, 19), /* Channel 56 */
  72         CHAN5G(5300, 20), /* Channel 60 */
  73         CHAN5G(5320, 21), /* Channel 64 */
  74         /* _We_ call this "Middle band" */
  75         CHAN5G(5500, 22), /* Channel 100 */
  76         CHAN5G(5520, 23), /* Channel 104 */
  77         CHAN5G(5540, 24), /* Channel 108 */
  78         CHAN5G(5560, 25), /* Channel 112 */
  79         CHAN5G(5580, 26), /* Channel 116 */
  80         CHAN5G(5600, 27), /* Channel 120 */
  81         CHAN5G(5620, 28), /* Channel 124 */
  82         CHAN5G(5640, 29), /* Channel 128 */
  83         CHAN5G(5660, 30), /* Channel 132 */
  84         CHAN5G(5680, 31), /* Channel 136 */
  85         CHAN5G(5700, 32), /* Channel 140 */
  86         /* _We_ call this UNII 3 */
  87         CHAN5G(5745, 33), /* Channel 149 */
  88         CHAN5G(5765, 34), /* Channel 153 */
  89         CHAN5G(5785, 35), /* Channel 157 */
  90         CHAN5G(5805, 36), /* Channel 161 */
  91         CHAN5G(5825, 37), /* Channel 165 */
  92 };
  93
  94 /* Atheros hardware rate code addition for short premble */
  95 #define SHPCHECK(__hw_rate, __flags) \
  96         ((__flags & IEEE80211_RATE_SHORT_PREAMBLE) ? (__hw_rate | 0x04) : 0)
  97
  98 #define RATE(_bitrate, _hw_rate, _flags) {              \
  99         .bitrate        = (_bitrate),                   \
 100         .flags          = (_flags),                     \
 101         .hw_value       = (_hw_rate),                   \
 102         .hw_value_short = (SHPCHECK(_hw_rate, _flags))  \
 103 }
 104
 105 static struct ieee80211_rate ath9k_legacy_rates[] = {
 106         RATE(10, 0x1b, 0),
 107         RATE(20, 0x1a, IEEE80211_RATE_SHORT_PREAMBLE), /* shortp : 0x1e */
 108         RATE(55, 0x19, IEEE80211_RATE_SHORT_PREAMBLE), /* shortp: 0x1d */
 109         RATE(110, 0x18, IEEE80211_RATE_SHORT_PREAMBLE), /* short: 0x1c */
 110         RATE(60, 0x0b, 0),
 111         RATE(90, 0x0f, 0),
 112         RATE(120, 0x0a, 0),
 113         RATE(180, 0x0e, 0),
 114         RATE(240, 0x09, 0),
 115         RATE(360, 0x0d, 0),
 116         RATE(480, 0x08, 0),
 117         RATE(540, 0x0c, 0),
 118 };
 119
 120 static int ath9k_htc_wait_for_target(struct ath9k_htc_priv *priv)
 121 {
 122         int time_left;
 123
 124         if (atomic_read(&priv->htc->tgt_ready) > 0) {
 125                 atomic_dec(&priv->htc->tgt_ready);
 126                 return 0;
 127         }
 128
 129         /* Firmware can take up to 50ms to get ready, to be safe use 1 second */
 130         time_left = wait_for_completion_timeout(&priv->htc->target_wait, HZ);
 131         if (!time_left) {
 132                 dev_err(priv->dev, "ath9k_htc: Target is unresponsive\n");
 133                 return -ETIMEDOUT;
 134         }
 135
 136         atomic_dec(&priv->htc->tgt_ready);
 137
 138         return 0;
 139 }
 140
 141 static void ath9k_deinit_priv(struct ath9k_htc_priv *priv)
 142 {
 143         ath9k_hw_deinit(priv->ah);
 144         kfree(priv->ah);
 145         priv->ah = NULL;
 146 }
 147
 148 static void ath9k_deinit_device(struct ath9k_htc_priv *priv)
 149 {
 150         struct ieee80211_hw *hw = priv->hw;
 151
 152         wiphy_rfkill_stop_polling(hw->wiphy);
 153         ath9k_deinit_leds(priv);
 154         ieee80211_unregister_hw(hw);
 155         ath9k_rx_cleanup(priv);
 156         ath9k_tx_cleanup(priv);
 157         ath9k_deinit_priv(priv);
 158 }
 159
 160 static inline int ath9k_htc_connect_svc(struct ath9k_htc_priv *priv,
 161                                         u16 service_id,
 162                                         void (*tx) (void *,
 163                                                     struct sk_buff *,
 164                                                     enum htc_endpoint_id,
 165                                                     bool txok),
 166                                         enum htc_endpoint_id *ep_id)
 167 {
 168         struct htc_service_connreq req;
 169
 170         memset(&req, 0, sizeof(struct htc_service_connreq));
 171
 172         req.service_id = service_id;
 173         req.ep_callbacks.priv = priv;
 174         req.ep_callbacks.rx = ath9k_htc_rxep;
 175         req.ep_callbacks.tx = tx;
 176
 177         return htc_connect_service(priv->htc, &req, ep_id);
 178 }
 179
 180 static int ath9k_init_htc_services(struct ath9k_htc_priv *priv, u16 devid,
 181                                    u32 drv_info)
 182 {
 183         int ret;
 184
 185         /* WMI CMD*/
 186         ret = ath9k_wmi_connect(priv->htc, priv->wmi, &priv->wmi_cmd_ep);
 187         if (ret)
 188                 goto err;
 189
 190         /* Beacon */
 191         ret = ath9k_htc_connect_svc(priv, WMI_BEACON_SVC, ath9k_htc_beaconep,
 192                                     &priv->beacon_ep);
 193         if (ret)
 194                 goto err;
 195
 196         /* CAB */
 197         ret = ath9k_htc_connect_svc(priv, WMI_CAB_SVC, ath9k_htc_txep,
 198                                     &priv->cab_ep);
 199         if (ret)
 200                 goto err;
 201
 202
 203         /* UAPSD */
 204         ret = ath9k_htc_connect_svc(priv, WMI_UAPSD_SVC, ath9k_htc_txep,
 205                                     &priv->uapsd_ep);
 206         if (ret)
 207                 goto err;
 208
 209         /* MGMT */
 210         ret = ath9k_htc_connect_svc(priv, WMI_MGMT_SVC, ath9k_htc_txep,
 211                                     &priv->mgmt_ep);
 212         if (ret)
 213                 goto err;
 214
 215         /* DATA BE */
 216         ret = ath9k_htc_connect_svc(priv, WMI_DATA_BE_SVC, ath9k_htc_txep,
 217                                     &priv->data_be_ep);
 218         if (ret)
 219                 goto err;
 220
 221         /* DATA BK */
 222         ret = ath9k_htc_connect_svc(priv, WMI_DATA_BK_SVC, ath9k_htc_txep,
 223                                     &priv->data_bk_ep);
 224         if (ret)
 225                 goto err;
 226
 227         /* DATA VI */
 228         ret = ath9k_htc_connect_svc(priv, WMI_DATA_VI_SVC, ath9k_htc_txep,
 229                                     &priv->data_vi_ep);
 230         if (ret)
 231                 goto err;
 232
 233         /* DATA VO */
 234         ret = ath9k_htc_connect_svc(priv, WMI_DATA_VO_SVC, ath9k_htc_txep,
 235                                     &priv->data_vo_ep);
 236         if (ret)
 237                 goto err;
 238
 239         /*
 240          * Setup required credits before initializing HTC.
 241          * This is a bit hacky, but, since queuing is done in
 242          * the HIF layer, shouldn't matter much.
 243          */
 244
 245         if (IS_AR7010_DEVICE(drv_info))
 246                 priv->htc->credits = 45;
 247         else
 248                 priv->htc->credits = 33;
 249
 250         ret = htc_init(priv->htc);
 251         if (ret)
 252                 goto err;
 253
 254         dev_info(priv->dev, "ath9k_htc: HTC initialized with %d credits\n",
 255                  priv->htc->credits);
 256
 257         return 0;
 258
 259 err:
 260         dev_err(priv->dev, "ath9k_htc: Unable to initialize HTC services\n");
 261         return ret;
 262 }
 263
 264 static int ath9k_reg_notifier(struct wiphy *wiphy,
 265                               struct regulatory_request *request)
 266 {
 267         struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy);
 268         struct ath9k_htc_priv *priv = hw->priv;
 269
 270         return ath_reg_notifier_apply(wiphy, request,
 271                                       ath9k_hw_regulatory(priv->ah));
 272 }
 273
 274 static unsigned int ath9k_regread(void *hw_priv, u32 reg_offset)
 275 {
 276         struct ath_hw *ah = (struct ath_hw *) hw_priv;
 277         struct ath_common *common = ath9k_hw_common(ah);
 278         struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
 279         __be32 val, reg = cpu_to_be32(reg_offset);
 280         int r;
 281
 282         r = ath9k_wmi_cmd(priv->wmi, WMI_REG_READ_CMDID,
 283                           (u8 *) &reg, sizeof(reg),
 284                           (u8 *) &val, sizeof(val),
 285                           100);
 286         if (unlikely(r)) {
 287                 ath_dbg(common, ATH_DBG_WMI,
 288                         "REGISTER READ FAILED: (0x%04x, %d)\n",
 289                         reg_offset, r);
 290                 return -EIO;
 291         }
 292
 293         return be32_to_cpu(val);
 294 }
 295
 296 static void ath9k_multi_regread(void *hw_priv, u32 *addr,
 297                                 u32 *val, u16 count)
 298 {
 299         struct ath_hw *ah = (struct ath_hw *) hw_priv;
 300         struct ath_common *common = ath9k_hw_common(ah);
 301         struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
 302         __be32 tmpaddr[8];
 303         __be32 tmpval[8];
 304         int i, ret;
 305
 306        for (i = 0; i < count; i++) {
 307                tmpaddr[i] = cpu_to_be32(addr[i]);
 308        }
 309
 310        ret = ath9k_wmi_cmd(priv->wmi, WMI_REG_READ_CMDID,
 311                            (u8 *)tmpaddr , sizeof(u32) * count,
 312                            (u8 *)tmpval, sizeof(u32) * count,
 313                            100);
 314         if (unlikely(ret)) {
 315                 ath_dbg(common, ATH_DBG_WMI,
 316                         "Multiple REGISTER READ FAILED (count: %d)\n", count);
 317         }
 318
 319        for (i = 0; i < count; i++) {
 320                val[i] = be32_to_cpu(tmpval[i]);
 321        }
 322 }
 323
 324 static void ath9k_regwrite_single(void *hw_priv, u32 val, u32 reg_offset)
 325 {
 326         struct ath_hw *ah = (struct ath_hw *) hw_priv;
 327         struct ath_common *common = ath9k_hw_common(ah);
 328         struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
 329         const __be32 buf[2] = {
 330                 cpu_to_be32(reg_offset),
 331                 cpu_to_be32(val),
 332         };
 333         int r;
 334
 335         r = ath9k_wmi_cmd(priv->wmi, WMI_REG_WRITE_CMDID,
 336                           (u8 *) &buf, sizeof(buf),
 337                           (u8 *) &val, sizeof(val),
 338                           100);
 339         if (unlikely(r)) {
 340                 ath_dbg(common, ATH_DBG_WMI,
 341                         "REGISTER WRITE FAILED:(0x%04x, %d)\n",
 342                         reg_offset, r);
 343         }
 344 }
 345
 346 static void ath9k_regwrite_buffer(void *hw_priv, u32 val, u32 reg_offset)
 347 {
 348         struct ath_hw *ah = (struct ath_hw *) hw_priv;
 349         struct ath_common *common = ath9k_hw_common(ah);
 350         struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
 351         u32 rsp_status;
 352         int r;
 353
 354         mutex_lock(&priv->wmi->multi_write_mutex);
 355
 356         /* Store the register/value */
 357         priv->wmi->multi_write[priv->wmi->multi_write_idx].reg =
 358                 cpu_to_be32(reg_offset);
 359         priv->wmi->multi_write[priv->wmi->multi_write_idx].val =
 360                 cpu_to_be32(val);
 361
 362         priv->wmi->multi_write_idx++;
 363
 364         /* If the buffer is full, send it out. */
 365         if (priv->wmi->multi_write_idx == MAX_CMD_NUMBER) {
 366                 r = ath9k_wmi_cmd(priv->wmi, WMI_REG_WRITE_CMDID,
 367                           (u8 *) &priv->wmi->multi_write,
 368                           sizeof(struct register_write) * priv->wmi->multi_write_idx,
 369                           (u8 *) &rsp_status, sizeof(rsp_status),
 370                           100);
 371                 if (unlikely(r)) {
 372                         ath_dbg(common, ATH_DBG_WMI,
 373                                 "REGISTER WRITE FAILED, multi len: %d\n",
 374                                 priv->wmi->multi_write_idx);
 375                 }
 376                 priv->wmi->multi_write_idx = 0;
 377         }
 378
 379         mutex_unlock(&priv->wmi->multi_write_mutex);
 380 }
 381
 382 static void ath9k_regwrite(void *hw_priv, u32 val, u32 reg_offset)
 383 {
 384         struct ath_hw *ah = (struct ath_hw *) hw_priv;
 385         struct ath_common *common = ath9k_hw_common(ah);
 386         struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
 387
 388         if (atomic_read(&priv->wmi->mwrite_cnt))
 389                 ath9k_regwrite_buffer(hw_priv, val, reg_offset);
 390         else
 391                 ath9k_regwrite_single(hw_priv, val, reg_offset);
 392 }
 393
 394 static void ath9k_enable_regwrite_buffer(void *hw_priv)
 395 {
 396         struct ath_hw *ah = (struct ath_hw *) hw_priv;
 397         struct ath_common *common = ath9k_hw_common(ah);
 398         struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
 399
 400         atomic_inc(&priv->wmi->mwrite_cnt);
 401 }
 402
 403 static void ath9k_regwrite_flush(void *hw_priv)
 404 {
 405         struct ath_hw *ah = (struct ath_hw *) hw_priv;
 406         struct ath_common *common = ath9k_hw_common(ah);
 407         struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
 408         u32 rsp_status;
 409         int r;
 410
 411         atomic_dec(&priv->wmi->mwrite_cnt);
 412
 413         mutex_lock(&priv->wmi->multi_write_mutex);
 414
 415         if (priv->wmi->multi_write_idx) {
 416                 r = ath9k_wmi_cmd(priv->wmi, WMI_REG_WRITE_CMDID,
 417                           (u8 *) &priv->wmi->multi_write,
 418                           sizeof(struct register_write) * priv->wmi->multi_write_idx,
 419                           (u8 *) &rsp_status, sizeof(rsp_status),
 420                           100);
 421                 if (unlikely(r)) {
 422                         ath_dbg(common, ATH_DBG_WMI,
 423                                 "REGISTER WRITE FAILED, multi len: %d\n",
 424                                 priv->wmi->multi_write_idx);
 425                 }
 426                 priv->wmi->multi_write_idx = 0;
 427         }
 428
 429         mutex_unlock(&priv->wmi->multi_write_mutex);
 430 }
 431
 432 static u32 ath9k_reg_rmw(void *hw_priv, u32 reg_offset, u32 set, u32 clr)
 433 {
 434         u32 val;
 435
 436         val = ath9k_regread(hw_priv, reg_offset);
 437         val &= ~clr;
 438         val |= set;
 439         ath9k_regwrite(hw_priv, val, reg_offset);
 440         return val;
 441 }
 442
 443 static void ath_usb_read_cachesize(struct ath_common *common, int *csz)
 444 {
 445         *csz = L1_CACHE_BYTES >> 2;
 446 }
 447
 448 static bool ath_usb_eeprom_read(struct ath_common *common, u32 off, u16 *data)
 449 {
 450         struct ath_hw *ah = (struct ath_hw *) common->ah;
 451
 452         (void)REG_READ(ah, AR5416_EEPROM_OFFSET + (off << AR5416_EEPROM_S));
 453
 454         if (!ath9k_hw_wait(ah,
 455                            AR_EEPROM_STATUS_DATA,
 456                            AR_EEPROM_STATUS_DATA_BUSY |
 457                            AR_EEPROM_STATUS_DATA_PROT_ACCESS, 0,
 458                            AH_WAIT_TIMEOUT))
 459                 return false;
 460
 461         *data = MS(REG_READ(ah, AR_EEPROM_STATUS_DATA),
 462                    AR_EEPROM_STATUS_DATA_VAL);
 463
 464         return true;
 465 }
 466
 467 static const struct ath_bus_ops ath9k_usb_bus_ops = {
 468         .ath_bus_type = ATH_USB,
 469         .read_cachesize = ath_usb_read_cachesize,
 470         .eeprom_read = ath_usb_eeprom_read,
 471 };
 472
 473 static void setup_ht_cap(struct ath9k_htc_priv *priv,
 474                          struct ieee80211_sta_ht_cap *ht_info)
 475 {
 476         struct ath_common *common = ath9k_hw_common(priv->ah);
 477         u8 tx_streams, rx_streams;
 478         int i;
 479
 480         ht_info->ht_supported = true;
 481         ht_info->cap = IEEE80211_HT_CAP_SUP_WIDTH_20_40 |
 482                        IEEE80211_HT_CAP_SM_PS |
 483                        IEEE80211_HT_CAP_SGI_40 |
 484                        IEEE80211_HT_CAP_DSSSCCK40;
 485
 486         if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_SGI_20)
 487                 ht_info->cap |= IEEE80211_HT_CAP_SGI_20;
 488
 489         ht_info->cap |= (1 << IEEE80211_HT_CAP_RX_STBC_SHIFT);
 490
 491         ht_info->ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K;
 492         ht_info->ampdu_density = IEEE80211_HT_MPDU_DENSITY_8;
 493
 494         memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
 495
 496         /* ath9k_htc supports only 1 or 2 stream devices */
 497         tx_streams = ath9k_cmn_count_streams(common->tx_chainmask, 2);
 498         rx_streams = ath9k_cmn_count_streams(common->rx_chainmask, 2);
 499
 500         ath_dbg(common, ATH_DBG_CONFIG,
 501                 "TX streams %d, RX streams: %d\n",
 502                 tx_streams, rx_streams);
 503
 504         if (tx_streams != rx_streams) {
 505                 ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
 506                 ht_info->mcs.tx_params |= ((tx_streams - 1) <<
 507                                            IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT);
 508         }
 509
 510         for (i = 0; i < rx_streams; i++)
 511                 ht_info->mcs.rx_mask[i] = 0xff;
 512
 513         ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_DEFINED;
 514 }
 515
 516 static int ath9k_init_queues(struct ath9k_htc_priv *priv)
 517 {
 518         struct ath_common *common = ath9k_hw_common(priv->ah);
 519         int i;
 520
 521         for (i = 0; i < ARRAY_SIZE(priv->hwq_map); i++)
 522                 priv->hwq_map[i] = -1;
 523
 524         priv->beaconq = ath9k_hw_beaconq_setup(priv->ah);
 525         if (priv->beaconq == -1) {
 526                 ath_err(common, "Unable to setup BEACON xmit queue\n");
 527                 goto err;
 528         }
 529
 530         priv->cabq = ath9k_htc_cabq_setup(priv);
 531         if (priv->cabq == -1) {
 532                 ath_err(common, "Unable to setup CAB xmit queue\n");
 533                 goto err;
 534         }
 535
 536         if (!ath9k_htc_txq_setup(priv, WME_AC_BE)) {
 537                 ath_err(common, "Unable to setup xmit queue for BE traffic\n");
 538                 goto err;
 539         }
 540
 541         if (!ath9k_htc_txq_setup(priv, WME_AC_BK)) {
 542                 ath_err(common, "Unable to setup xmit queue for BK traffic\n");
 543                 goto err;
 544         }
 545         if (!ath9k_htc_txq_setup(priv, WME_AC_VI)) {
 546                 ath_err(common, "Unable to setup xmit queue for VI traffic\n");
 547                 goto err;
 548         }
 549         if (!ath9k_htc_txq_setup(priv, WME_AC_VO)) {
 550                 ath_err(common, "Unable to setup xmit queue for VO traffic\n");
 551                 goto err;
 552         }
 553
 554         return 0;
 555
 556 err:
 557         return -EINVAL;
 558 }
 559
 560 static void ath9k_init_crypto(struct ath9k_htc_priv *priv)
 561 {
 562         struct ath_common *common = ath9k_hw_common(priv->ah);
 563         int i = 0;
 564
 565         /* Get the hardware key cache size. */
 566         common->keymax = AR_KEYTABLE_SIZE;
 567
 568         if (priv->ah->misc_mode & AR_PCU_MIC_NEW_LOC_ENA)
 569                 common->crypt_caps |= ATH_CRYPT_CAP_MIC_COMBINED;
 570
 571         /*
 572          * Reset the key cache since some parts do not
 573          * reset the contents on initial power up.
 574          */
 575         for (i = 0; i < common->keymax; i++)
 576                 ath_hw_keyreset(common, (u16) i);
 577 }
 578
 579 static void ath9k_init_channels_rates(struct ath9k_htc_priv *priv)
 580 {
 581         if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_2GHZ) {
 582                 priv->sbands[IEEE80211_BAND_2GHZ].channels =
 583                         ath9k_2ghz_channels;
 584                 priv->sbands[IEEE80211_BAND_2GHZ].band = IEEE80211_BAND_2GHZ;
 585                 priv->sbands[IEEE80211_BAND_2GHZ].n_channels =
 586                         ARRAY_SIZE(ath9k_2ghz_channels);
 587                 priv->sbands[IEEE80211_BAND_2GHZ].bitrates = ath9k_legacy_rates;
 588                 priv->sbands[IEEE80211_BAND_2GHZ].n_bitrates =
 589                         ARRAY_SIZE(ath9k_legacy_rates);
 590         }
 591
 592         if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_5GHZ) {
 593                 priv->sbands[IEEE80211_BAND_5GHZ].channels = ath9k_5ghz_channels;
 594                 priv->sbands[IEEE80211_BAND_5GHZ].band = IEEE80211_BAND_5GHZ;
 595                 priv->sbands[IEEE80211_BAND_5GHZ].n_channels =
 596                         ARRAY_SIZE(ath9k_5ghz_channels);
 597                 priv->sbands[IEEE80211_BAND_5GHZ].bitrates =
 598                         ath9k_legacy_rates + 4;
 599                 priv->sbands[IEEE80211_BAND_5GHZ].n_bitrates =
 600                         ARRAY_SIZE(ath9k_legacy_rates) - 4;
 601         }
 602 }
 603
 604 static void ath9k_init_misc(struct ath9k_htc_priv *priv)
 605 {
 606         struct ath_common *common = ath9k_hw_common(priv->ah);
 607
 608         common->tx_chainmask = priv->ah->caps.tx_chainmask;
 609         common->rx_chainmask = priv->ah->caps.rx_chainmask;
 610
 611         memcpy(common->bssidmask, ath_bcast_mac, ETH_ALEN);
 612
 613         priv->ah->opmode = NL80211_IFTYPE_STATION;
 614 }
 615
 616 static void ath9k_init_btcoex(struct ath9k_htc_priv *priv)
 617 {
 618         int qnum;
 619
 620         switch (priv->ah->btcoex_hw.scheme) {
 621         case ATH_BTCOEX_CFG_NONE:
 622                 break;
 623         case ATH_BTCOEX_CFG_3WIRE:
 624                 priv->ah->btcoex_hw.btactive_gpio = 7;
 625                 priv->ah->btcoex_hw.btpriority_gpio = 6;
 626                 priv->ah->btcoex_hw.wlanactive_gpio = 8;
 627                 priv->btcoex.bt_stomp_type = ATH_BTCOEX_STOMP_LOW;
 628                 ath9k_hw_btcoex_init_3wire(priv->ah);
 629                 ath_htc_init_btcoex_work(priv);
 630                 qnum = priv->hwq_map[WME_AC_BE];
 631                 ath9k_hw_init_btcoex_hw(priv->ah, qnum);
 632                 break;
 633         default:
 634                 WARN_ON(1);
 635                 break;
 636         }
 637 }
 638
 639 static int ath9k_init_priv(struct ath9k_htc_priv *priv,
 640                            u16 devid, char *product,
 641                            u32 drv_info)
 642 {
 643         struct ath_hw *ah = NULL;
 644         struct ath_common *common;
 645         int i, ret = 0, csz = 0;
 646
 647         priv->op_flags |= OP_INVALID;
 648
 649         ah = kzalloc(sizeof(struct ath_hw), GFP_KERNEL);
 650         if (!ah)
 651                 return -ENOMEM;
 652
 653         ah->hw_version.devid = devid;
 654         ah->hw_version.subsysid = 0; /* FIXME */
 655         ah->hw_version.usbdev = drv_info;
 656         ah->ah_flags |= AH_USE_EEPROM;
 657         ah->reg_ops.read = ath9k_regread;
 658         ah->reg_ops.multi_read = ath9k_multi_regread;
 659         ah->reg_ops.write = ath9k_regwrite;
 660         ah->reg_ops.enable_write_buffer = ath9k_enable_regwrite_buffer;
 661         ah->reg_ops.write_flush = ath9k_regwrite_flush;
 662         ah->reg_ops.rmw = ath9k_reg_rmw;
 663         priv->ah = ah;
 664
 665         common = ath9k_hw_common(ah);
 666         common->ops = &ah->reg_ops;
 667         common->bus_ops = &ath9k_usb_bus_ops;
 668         common->ah = ah;
 669         common->hw = priv->hw;
 670         common->priv = priv;
 671         common->debug_mask = ath9k_debug;
 672
 673         spin_lock_init(&priv->beacon_lock);
 674         spin_lock_init(&priv->tx.tx_lock);
 675         mutex_init(&priv->mutex);
 676         mutex_init(&priv->htc_pm_lock);
 677         tasklet_init(&priv->rx_tasklet, ath9k_rx_tasklet,
 678                      (unsigned long)priv);
 679         tasklet_init(&priv->tx_failed_tasklet, ath9k_tx_failed_tasklet,
 680                      (unsigned long)priv);
 681         INIT_DELAYED_WORK(&priv->ani_work, ath9k_htc_ani_work);
 682         INIT_WORK(&priv->ps_work, ath9k_ps_work);
 683         INIT_WORK(&priv->fatal_work, ath9k_fatal_work);
 684         setup_timer(&priv->tx.cleanup_timer, ath9k_htc_tx_cleanup_timer,
 685                     (unsigned long)priv);
 686
 687         /*
 688          * Cache line size is used to size and align various
 689          * structures used to communicate with the hardware.
 690          */
 691         ath_read_cachesize(common, &csz);
 692         common->cachelsz = csz << 2; /* convert to bytes */
 693
 694         ret = ath9k_hw_init(ah);
 695         if (ret) {
 696                 ath_err(common,
 697                         "Unable to initialize hardware; initialization status: %d\n",
 698                         ret);
 699                 goto err_hw;
 700         }
 701
 702         ret = ath9k_init_queues(priv);
 703         if (ret)
 704                 goto err_queues;
 705
 706         for (i = 0; i < ATH9K_HTC_MAX_BCN_VIF; i++)
 707                 priv->cur_beacon_conf.bslot[i] = NULL;
 708
 709         ath9k_init_crypto(priv);
 710         ath9k_init_channels_rates(priv);
 711         ath9k_init_misc(priv);
 712
 713         if (product && strncmp(product, ATH_HTC_BTCOEX_PRODUCT_ID, 5) == 0) {
 714                 ah->btcoex_hw.scheme = ATH_BTCOEX_CFG_3WIRE;
 715                 ath9k_init_btcoex(priv);
 716         }
 717
 718         return 0;
 719
 720 err_queues:
 721         ath9k_hw_deinit(ah);
 722 err_hw:
 723
 724         kfree(ah);
 725         priv->ah = NULL;
 726
 727         return ret;
 728 }
 729
 730 static void ath9k_set_hw_capab(struct ath9k_htc_priv *priv,
 731                                struct ieee80211_hw *hw)
 732 {
 733         struct ath_common *common = ath9k_hw_common(priv->ah);
 734
 735         hw->flags = IEEE80211_HW_SIGNAL_DBM |
 736                 IEEE80211_HW_AMPDU_AGGREGATION |
 737                 IEEE80211_HW_SPECTRUM_MGMT |
 738                 IEEE80211_HW_HAS_RATE_CONTROL |
 739                 IEEE80211_HW_RX_INCLUDES_FCS |
 740                 IEEE80211_HW_SUPPORTS_PS |
 741                 IEEE80211_HW_PS_NULLFUNC_STACK |
 742                 IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING;
 743
 744         hw->wiphy->interface_modes =
 745                 BIT(NL80211_IFTYPE_STATION) |
 746                 BIT(NL80211_IFTYPE_ADHOC) |
 747                 BIT(NL80211_IFTYPE_AP) |
 748                 BIT(NL80211_IFTYPE_P2P_GO) |
 749                 BIT(NL80211_IFTYPE_P2P_CLIENT);
 750
 751         hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT;
 752
 753         hw->queues = 4;
 754         hw->channel_change_time = 5000;
 755         hw->max_listen_interval = 10;
 756         hw->vif_data_size = sizeof(struct ath9k_htc_vif);
 757         hw->sta_data_size = sizeof(struct ath9k_htc_sta);
 758
 759         /* tx_frame_hdr is larger than tx_mgmt_hdr anyway */
 760         hw->extra_tx_headroom = sizeof(struct tx_frame_hdr) +
 761                 sizeof(struct htc_frame_hdr) + 4;
 762
 763         if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_2GHZ)
 764                 hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
 765                         &priv->sbands[IEEE80211_BAND_2GHZ];
 766         if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_5GHZ)
 767                 hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
 768                         &priv->sbands[IEEE80211_BAND_5GHZ];
 769
 770         if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_HT) {
 771                 if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_2GHZ)
 772                         setup_ht_cap(priv,
 773                                      &priv->sbands[IEEE80211_BAND_2GHZ].ht_cap);
 774                 if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_5GHZ)
 775                         setup_ht_cap(priv,
 776                                      &priv->sbands[IEEE80211_BAND_5GHZ].ht_cap);
 777         }
 778
 779         SET_IEEE80211_PERM_ADDR(hw, common->macaddr);
 780 }
 781
 782 static int ath9k_init_firmware_version(struct ath9k_htc_priv *priv)
 783 {
 784         struct ieee80211_hw *hw = priv->hw;
 785         struct wmi_fw_version cmd_rsp;
 786         int ret;
 787
 788         memset(&cmd_rsp, 0, sizeof(cmd_rsp));
 789
 790         WMI_CMD(WMI_GET_FW_VERSION);
 791         if (ret)
 792                 return -EINVAL;
 793
 794         priv->fw_version_major = be16_to_cpu(cmd_rsp.major);
 795         priv->fw_version_minor = be16_to_cpu(cmd_rsp.minor);
 796
 797         snprintf(hw->wiphy->fw_version, ETHTOOL_BUSINFO_LEN, "%d.%d",
 798                  priv->fw_version_major,
 799                  priv->fw_version_minor);
 800
 801         dev_info(priv->dev, "ath9k_htc: FW Version: %d.%d\n",
 802                  priv->fw_version_major,
 803                  priv->fw_version_minor);
 804
 805         return 0;
 806 }
 807
 808 static int ath9k_init_device(struct ath9k_htc_priv *priv,
 809                              u16 devid, char *product, u32 drv_info)
 810 {
 811         struct ieee80211_hw *hw = priv->hw;
 812         struct ath_common *common;
 813         struct ath_hw *ah;
 814         int error = 0;
 815         struct ath_regulatory *reg;
 816         char hw_name[64];
 817
 818         /* Bring up device */
 819         error = ath9k_init_priv(priv, devid, product, drv_info);
 820         if (error != 0)
 821                 goto err_init;
 822
 823         ah = priv->ah;
 824         common = ath9k_hw_common(ah);
 825         ath9k_set_hw_capab(priv, hw);
 826
 827         error = ath9k_init_firmware_version(priv);
 828         if (error != 0)
 829                 goto err_fw;
 830
 831         /* Initialize regulatory */
 832         error = ath_regd_init(&common->regulatory, priv->hw->wiphy,
 833                               ath9k_reg_notifier);
 834         if (error)
 835                 goto err_regd;
 836
 837         reg = &common->regulatory;
 838
 839         /* Setup TX */
 840         error = ath9k_tx_init(priv);
 841         if (error != 0)
 842                 goto err_tx;
 843
 844         /* Setup RX */
 845         error = ath9k_rx_init(priv);
 846         if (error != 0)
 847                 goto err_rx;
 848
 849         /* Register with mac80211 */
 850         error = ieee80211_register_hw(hw);
 851         if (error)
 852                 goto err_register;
 853
 854         /* Handle world regulatory */
 855         if (!ath_is_world_regd(reg)) {
 856                 error = regulatory_hint(hw->wiphy, reg->alpha2);
 857                 if (error)
 858                         goto err_world;
 859         }
 860
 861         error = ath9k_htc_init_debug(priv->ah);
 862         if (error) {
 863                 ath_err(common, "Unable to create debugfs files\n");
 864                 goto err_world;
 865         }
 866
 867         ath_dbg(common, ATH_DBG_CONFIG,
 868                 "WMI:%d, BCN:%d, CAB:%d, UAPSD:%d, MGMT:%d, "
 869                 "BE:%d, BK:%d, VI:%d, VO:%d\n",
 870                 priv->wmi_cmd_ep,
 871                 priv->beacon_ep,
 872                 priv->cab_ep,
 873                 priv->uapsd_ep,
 874                 priv->mgmt_ep,
 875                 priv->data_be_ep,
 876                 priv->data_bk_ep,
 877                 priv->data_vi_ep,
 878                 priv->data_vo_ep);
 879
 880         ath9k_hw_name(priv->ah, hw_name, sizeof(hw_name));
 881         wiphy_info(hw->wiphy, "%s\n", hw_name);
 882
 883         ath9k_init_leds(priv);
 884         ath9k_start_rfkill_poll(priv);
 885
 886         return 0;
 887
 888 err_world:
 889         ieee80211_unregister_hw(hw);
 890 err_register:
 891         ath9k_rx_cleanup(priv);
 892 err_rx:
 893         ath9k_tx_cleanup(priv);
 894 err_tx:
 895         /* Nothing */
 896 err_regd:
 897         /* Nothing */
 898 err_fw:
 899         ath9k_deinit_priv(priv);
 900 err_init:
 901         return error;
 902 }
 903
 904 int ath9k_htc_probe_device(struct htc_target *htc_handle, struct device *dev,
 905                            u16 devid, char *product, u32 drv_info)
 906 {
 907         struct ieee80211_hw *hw;
 908         struct ath9k_htc_priv *priv;
 909         int ret;
 910
 911         hw = ieee80211_alloc_hw(sizeof(struct ath9k_htc_priv), &ath9k_htc_ops);
 912         if (!hw)
 913                 return -ENOMEM;
 914
 915         priv = hw->priv;
 916         priv->hw = hw;
 917         priv->htc = htc_handle;
 918         priv->dev = dev;
 919         htc_handle->drv_priv = priv;
 920         SET_IEEE80211_DEV(hw, priv->dev);
 921
 922         ret = ath9k_htc_wait_for_target(priv);
 923         if (ret)
 924                 goto err_free;
 925
 926         priv->wmi = ath9k_init_wmi(priv);
 927         if (!priv->wmi) {
 928                 ret = -EINVAL;
 929                 goto err_free;
 930         }
 931
 932         ret = ath9k_init_htc_services(priv, devid, drv_info);
 933         if (ret)
 934                 goto err_init;
 935
 936         ret = ath9k_init_device(priv, devid, product, drv_info);
 937         if (ret)
 938                 goto err_init;
 939
 940         return 0;
 941
 942 err_init:
 943         ath9k_deinit_wmi(priv);
 944 err_free:
 945         ieee80211_free_hw(hw);
 946         return ret;
 947 }
 948
 949 void ath9k_htc_disconnect_device(struct htc_target *htc_handle, bool hotunplug)
 950 {
 951         if (htc_handle->drv_priv) {
 952
 953                 /* Check if the device has been yanked out. */
 954                 if (hotunplug)
 955                         htc_handle->drv_priv->ah->ah_flags |= AH_UNPLUGGED;
 956
 957                 ath9k_deinit_device(htc_handle->drv_priv);
 958                 ath9k_deinit_wmi(htc_handle->drv_priv);
 959                 ieee80211_free_hw(htc_handle->drv_priv->hw);
 960         }
 961 }
 962
 963 #ifdef CONFIG_PM
 964
 965 void ath9k_htc_suspend(struct htc_target *htc_handle)
 966 {
 967         ath9k_htc_setpower(htc_handle->drv_priv, ATH9K_PM_FULL_SLEEP);
 968 }
 969
 970 int ath9k_htc_resume(struct htc_target *htc_handle)
 971 {
 972         struct ath9k_htc_priv *priv = htc_handle->drv_priv;
 973         int ret;
 974
 975         ret = ath9k_htc_wait_for_target(priv);
 976         if (ret)
 977                 return ret;
 978
 979         ret = ath9k_init_htc_services(priv, priv->ah->hw_version.devid,
 980                                       priv->ah->hw_version.usbdev);
 981         return ret;
 982 }
 983 #endif
 984
 985 static int __init ath9k_htc_init(void)
 986 {
 987         if (ath9k_hif_usb_init() < 0) {
 988                 printk(KERN_ERR
 989                         "ath9k_htc: No USB devices found,"
 990                         " driver not installed.\n");
 991                 return -ENODEV;
 992         }
 993
 994         return 0;
 995 }
 996 module_init(ath9k_htc_init);
 997
 998 static void __exit ath9k_htc_exit(void)
 999 {
1000         ath9k_hif_usb_exit();
1001         printk(KERN_INFO "ath9k_htc: Driver unloaded\n");
1002 }
1003 module_exit(ath9k_htc_exit);