drivers/net/wireless/ath/ath9k/htc_drv_init.c

   1 /*
   2  * Copyright (c) 2010-2011 Atheros Communications Inc.
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #include "htc.h"
  18
  19 MODULE_AUTHOR("Atheros Communications");
  20 MODULE_LICENSE("Dual BSD/GPL");
  21 MODULE_DESCRIPTION("Atheros driver 802.11n HTC based wireless devices");
  22
  23 static unsigned int ath9k_debug = ATH_DBG_DEFAULT;
  24 module_param_named(debug, ath9k_debug, uint, 0);
  25 MODULE_PARM_DESC(debug, "Debugging mask");
  26
  27 int htc_modparam_nohwcrypt;
  28 module_param_named(nohwcrypt, htc_modparam_nohwcrypt, int, 0444);
  29 MODULE_PARM_DESC(nohwcrypt, "Disable hardware encryption");
  30
  31 static int ath9k_ps_enable;
  32 module_param_named(ps_enable, ath9k_ps_enable, int, 0444);
  33 MODULE_PARM_DESC(ps_enable, "Enable WLAN PowerSave");
  34
  35 #define CHAN2G(_freq, _idx)  { \
  36         .center_freq = (_freq), \
  37         .hw_value = (_idx), \
  38         .max_power = 20, \
  39 }
  40
  41 #define CHAN5G(_freq, _idx) { \
  42         .band = IEEE80211_BAND_5GHZ, \
  43         .center_freq = (_freq), \
  44         .hw_value = (_idx), \
  45         .max_power = 20, \
  46 }
  47
  48 #define ATH_HTC_BTCOEX_PRODUCT_ID "wb193"
  49
  50 static struct ieee80211_channel ath9k_2ghz_channels[] = {
  51         CHAN2G(2412, 0), /* Channel 1 */
  52         CHAN2G(2417, 1), /* Channel 2 */
  53         CHAN2G(2422, 2), /* Channel 3 */
  54         CHAN2G(2427, 3), /* Channel 4 */
  55         CHAN2G(2432, 4), /* Channel 5 */
  56         CHAN2G(2437, 5), /* Channel 6 */
  57         CHAN2G(2442, 6), /* Channel 7 */
  58         CHAN2G(2447, 7), /* Channel 8 */
  59         CHAN2G(2452, 8), /* Channel 9 */
  60         CHAN2G(2457, 9), /* Channel 10 */
  61         CHAN2G(2462, 10), /* Channel 11 */
  62         CHAN2G(2467, 11), /* Channel 12 */
  63         CHAN2G(2472, 12), /* Channel 13 */
  64         CHAN2G(2484, 13), /* Channel 14 */
  65 };
  66
  67 static struct ieee80211_channel ath9k_5ghz_channels[] = {
  68         /* _We_ call this UNII 1 */
  69         CHAN5G(5180, 14), /* Channel 36 */
  70         CHAN5G(5200, 15), /* Channel 40 */
  71         CHAN5G(5220, 16), /* Channel 44 */
  72         CHAN5G(5240, 17), /* Channel 48 */
  73         /* _We_ call this UNII 2 */
  74         CHAN5G(5260, 18), /* Channel 52 */
  75         CHAN5G(5280, 19), /* Channel 56 */
  76         CHAN5G(5300, 20), /* Channel 60 */
  77         CHAN5G(5320, 21), /* Channel 64 */
  78         /* _We_ call this "Middle band" */
  79         CHAN5G(5500, 22), /* Channel 100 */
  80         CHAN5G(5520, 23), /* Channel 104 */
  81         CHAN5G(5540, 24), /* Channel 108 */
  82         CHAN5G(5560, 25), /* Channel 112 */
  83         CHAN5G(5580, 26), /* Channel 116 */
  84         CHAN5G(5600, 27), /* Channel 120 */
  85         CHAN5G(5620, 28), /* Channel 124 */
  86         CHAN5G(5640, 29), /* Channel 128 */
  87         CHAN5G(5660, 30), /* Channel 132 */
  88         CHAN5G(5680, 31), /* Channel 136 */
  89         CHAN5G(5700, 32), /* Channel 140 */
  90         /* _We_ call this UNII 3 */
  91         CHAN5G(5745, 33), /* Channel 149 */
  92         CHAN5G(5765, 34), /* Channel 153 */
  93         CHAN5G(5785, 35), /* Channel 157 */
  94         CHAN5G(5805, 36), /* Channel 161 */
  95         CHAN5G(5825, 37), /* Channel 165 */
  96 };
  97
  98 /* Atheros hardware rate code addition for short premble */
  99 #define SHPCHECK(__hw_rate, __flags) \
 100         ((__flags & IEEE80211_RATE_SHORT_PREAMBLE) ? (__hw_rate | 0x04) : 0)
 101
 102 #define RATE(_bitrate, _hw_rate, _flags) {              \
 103         .bitrate        = (_bitrate),                   \
 104         .flags          = (_flags),                     \
 105         .hw_value       = (_hw_rate),                   \
 106         .hw_value_short = (SHPCHECK(_hw_rate, _flags))  \
 107 }
 108
 109 static struct ieee80211_rate ath9k_legacy_rates[] = {
 110         RATE(10, 0x1b, 0),
 111         RATE(20, 0x1a, IEEE80211_RATE_SHORT_PREAMBLE), /* shortp : 0x1e */
 112         RATE(55, 0x19, IEEE80211_RATE_SHORT_PREAMBLE), /* shortp: 0x1d */
 113         RATE(110, 0x18, IEEE80211_RATE_SHORT_PREAMBLE), /* short: 0x1c */
 114         RATE(60, 0x0b, 0),
 115         RATE(90, 0x0f, 0),
 116         RATE(120, 0x0a, 0),
 117         RATE(180, 0x0e, 0),
 118         RATE(240, 0x09, 0),
 119         RATE(360, 0x0d, 0),
 120         RATE(480, 0x08, 0),
 121         RATE(540, 0x0c, 0),
 122 };
 123
 124 #ifdef CONFIG_MAC80211_LEDS
 125 static const struct ieee80211_tpt_blink ath9k_htc_tpt_blink[] = {
 126         { .throughput = 0 * 1024, .blink_time = 334 },
 127         { .throughput = 1 * 1024, .blink_time = 260 },
 128         { .throughput = 5 * 1024, .blink_time = 220 },
 129         { .throughput = 10 * 1024, .blink_time = 190 },
 130         { .throughput = 20 * 1024, .blink_time = 170 },
 131         { .throughput = 50 * 1024, .blink_time = 150 },
 132         { .throughput = 70 * 1024, .blink_time = 130 },
 133         { .throughput = 100 * 1024, .blink_time = 110 },
 134         { .throughput = 200 * 1024, .blink_time = 80 },
 135         { .throughput = 300 * 1024, .blink_time = 50 },
 136 };
 137 #endif
 138
 139 static int ath9k_htc_wait_for_target(struct ath9k_htc_priv *priv)
 140 {
 141         int time_left;
 142
 143         if (atomic_read(&priv->htc->tgt_ready) > 0) {
 144                 atomic_dec(&priv->htc->tgt_ready);
 145                 return 0;
 146         }
 147
 148         /* Firmware can take up to 50ms to get ready, to be safe use 1 second */
 149         time_left = wait_for_completion_timeout(&priv->htc->target_wait, HZ);
 150         if (!time_left) {
 151                 dev_err(priv->dev, "ath9k_htc: Target is unresponsive\n");
 152                 return -ETIMEDOUT;
 153         }
 154
 155         atomic_dec(&priv->htc->tgt_ready);
 156
 157         return 0;
 158 }
 159
 160 static void ath9k_deinit_priv(struct ath9k_htc_priv *priv)
 161 {
 162         ath9k_hw_deinit(priv->ah);
 163         kfree(priv->ah);
 164         priv->ah = NULL;
 165 }
 166
 167 static void ath9k_deinit_device(struct ath9k_htc_priv *priv)
 168 {
 169         struct ieee80211_hw *hw = priv->hw;
 170
 171         wiphy_rfkill_stop_polling(hw->wiphy);
 172         ath9k_deinit_leds(priv);
 173         ieee80211_unregister_hw(hw);
 174         ath9k_rx_cleanup(priv);
 175         ath9k_tx_cleanup(priv);
 176         ath9k_deinit_priv(priv);
 177 }
 178
 179 static inline int ath9k_htc_connect_svc(struct ath9k_htc_priv *priv,
 180                                         u16 service_id,
 181                                         void (*tx) (void *,
 182                                                     struct sk_buff *,
 183                                                     enum htc_endpoint_id,
 184                                                     bool txok),
 185                                         enum htc_endpoint_id *ep_id)
 186 {
 187         struct htc_service_connreq req;
 188
 189         memset(&req, 0, sizeof(struct htc_service_connreq));
 190
 191         req.service_id = service_id;
 192         req.ep_callbacks.priv = priv;
 193         req.ep_callbacks.rx = ath9k_htc_rxep;
 194         req.ep_callbacks.tx = tx;
 195
 196         return htc_connect_service(priv->htc, &req, ep_id);
 197 }
 198
 199 static int ath9k_init_htc_services(struct ath9k_htc_priv *priv, u16 devid,
 200                                    u32 drv_info)
 201 {
 202         int ret;
 203
 204         /* WMI CMD*/
 205         ret = ath9k_wmi_connect(priv->htc, priv->wmi, &priv->wmi_cmd_ep);
 206         if (ret)
 207                 goto err;
 208
 209         /* Beacon */
 210         ret = ath9k_htc_connect_svc(priv, WMI_BEACON_SVC, ath9k_htc_beaconep,
 211                                     &priv->beacon_ep);
 212         if (ret)
 213                 goto err;
 214
 215         /* CAB */
 216         ret = ath9k_htc_connect_svc(priv, WMI_CAB_SVC, ath9k_htc_txep,
 217                                     &priv->cab_ep);
 218         if (ret)
 219                 goto err;
 220
 221
 222         /* UAPSD */
 223         ret = ath9k_htc_connect_svc(priv, WMI_UAPSD_SVC, ath9k_htc_txep,
 224                                     &priv->uapsd_ep);
 225         if (ret)
 226                 goto err;
 227
 228         /* MGMT */
 229         ret = ath9k_htc_connect_svc(priv, WMI_MGMT_SVC, ath9k_htc_txep,
 230                                     &priv->mgmt_ep);
 231         if (ret)
 232                 goto err;
 233
 234         /* DATA BE */
 235         ret = ath9k_htc_connect_svc(priv, WMI_DATA_BE_SVC, ath9k_htc_txep,
 236                                     &priv->data_be_ep);
 237         if (ret)
 238                 goto err;
 239
 240         /* DATA BK */
 241         ret = ath9k_htc_connect_svc(priv, WMI_DATA_BK_SVC, ath9k_htc_txep,
 242                                     &priv->data_bk_ep);
 243         if (ret)
 244                 goto err;
 245
 246         /* DATA VI */
 247         ret = ath9k_htc_connect_svc(priv, WMI_DATA_VI_SVC, ath9k_htc_txep,
 248                                     &priv->data_vi_ep);
 249         if (ret)
 250                 goto err;
 251
 252         /* DATA VO */
 253         ret = ath9k_htc_connect_svc(priv, WMI_DATA_VO_SVC, ath9k_htc_txep,
 254                                     &priv->data_vo_ep);
 255         if (ret)
 256                 goto err;
 257
 258         /*
 259          * Setup required credits before initializing HTC.
 260          * This is a bit hacky, but, since queuing is done in
 261          * the HIF layer, shouldn't matter much.
 262          */
 263
 264         if (IS_AR7010_DEVICE(drv_info))
 265                 priv->htc->credits = 45;
 266         else
 267                 priv->htc->credits = 33;
 268
 269         ret = htc_init(priv->htc);
 270         if (ret)
 271                 goto err;
 272
 273         dev_info(priv->dev, "ath9k_htc: HTC initialized with %d credits\n",
 274                  priv->htc->credits);
 275
 276         return 0;
 277
 278 err:
 279         dev_err(priv->dev, "ath9k_htc: Unable to initialize HTC services\n");
 280         return ret;
 281 }
 282
 283 static int ath9k_reg_notifier(struct wiphy *wiphy,
 284                               struct regulatory_request *request)
 285 {
 286         struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy);
 287         struct ath9k_htc_priv *priv = hw->priv;
 288
 289         return ath_reg_notifier_apply(wiphy, request,
 290                                       ath9k_hw_regulatory(priv->ah));
 291 }
 292
 293 static unsigned int ath9k_regread(void *hw_priv, u32 reg_offset)
 294 {
 295         struct ath_hw *ah = (struct ath_hw *) hw_priv;
 296         struct ath_common *common = ath9k_hw_common(ah);
 297         struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
 298         __be32 val, reg = cpu_to_be32(reg_offset);
 299         int r;
 300
 301         r = ath9k_wmi_cmd(priv->wmi, WMI_REG_READ_CMDID,
 302                           (u8 *) &reg, sizeof(reg),
 303                           (u8 *) &val, sizeof(val),
 304                           100);
 305         if (unlikely(r)) {
 306                 ath_dbg(common, ATH_DBG_WMI,
 307                         "REGISTER READ FAILED: (0x%04x, %d)\n",
 308                         reg_offset, r);
 309                 return -EIO;
 310         }
 311
 312         return be32_to_cpu(val);
 313 }
 314
 315 static void ath9k_multi_regread(void *hw_priv, u32 *addr,
 316                                 u32 *val, u16 count)
 317 {
 318         struct ath_hw *ah = (struct ath_hw *) hw_priv;
 319         struct ath_common *common = ath9k_hw_common(ah);
 320         struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
 321         __be32 tmpaddr[8];
 322         __be32 tmpval[8];
 323         int i, ret;
 324
 325        for (i = 0; i < count; i++) {
 326                tmpaddr[i] = cpu_to_be32(addr[i]);
 327        }
 328
 329        ret = ath9k_wmi_cmd(priv->wmi, WMI_REG_READ_CMDID,
 330                            (u8 *)tmpaddr , sizeof(u32) * count,
 331                            (u8 *)tmpval, sizeof(u32) * count,
 332                            100);
 333         if (unlikely(ret)) {
 334                 ath_dbg(common, ATH_DBG_WMI,
 335                         "Multiple REGISTER READ FAILED (count: %d)\n", count);
 336         }
 337
 338        for (i = 0; i < count; i++) {
 339                val[i] = be32_to_cpu(tmpval[i]);
 340        }
 341 }
 342
 343 static void ath9k_regwrite_single(void *hw_priv, u32 val, u32 reg_offset)
 344 {
 345         struct ath_hw *ah = (struct ath_hw *) hw_priv;
 346         struct ath_common *common = ath9k_hw_common(ah);
 347         struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
 348         const __be32 buf[2] = {
 349                 cpu_to_be32(reg_offset),
 350                 cpu_to_be32(val),
 351         };
 352         int r;
 353
 354         r = ath9k_wmi_cmd(priv->wmi, WMI_REG_WRITE_CMDID,
 355                           (u8 *) &buf, sizeof(buf),
 356                           (u8 *) &val, sizeof(val),
 357                           100);
 358         if (unlikely(r)) {
 359                 ath_dbg(common, ATH_DBG_WMI,
 360                         "REGISTER WRITE FAILED:(0x%04x, %d)\n",
 361                         reg_offset, r);
 362         }
 363 }
 364
 365 static void ath9k_regwrite_buffer(void *hw_priv, u32 val, u32 reg_offset)
 366 {
 367         struct ath_hw *ah = (struct ath_hw *) hw_priv;
 368         struct ath_common *common = ath9k_hw_common(ah);
 369         struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
 370         u32 rsp_status;
 371         int r;
 372
 373         mutex_lock(&priv->wmi->multi_write_mutex);
 374
 375         /* Store the register/value */
 376         priv->wmi->multi_write[priv->wmi->multi_write_idx].reg =
 377                 cpu_to_be32(reg_offset);
 378         priv->wmi->multi_write[priv->wmi->multi_write_idx].val =
 379                 cpu_to_be32(val);
 380
 381         priv->wmi->multi_write_idx++;
 382
 383         /* If the buffer is full, send it out. */
 384         if (priv->wmi->multi_write_idx == MAX_CMD_NUMBER) {
 385                 r = ath9k_wmi_cmd(priv->wmi, WMI_REG_WRITE_CMDID,
 386                           (u8 *) &priv->wmi->multi_write,
 387                           sizeof(struct register_write) * priv->wmi->multi_write_idx,
 388                           (u8 *) &rsp_status, sizeof(rsp_status),
 389                           100);
 390                 if (unlikely(r)) {
 391                         ath_dbg(common, ATH_DBG_WMI,
 392                                 "REGISTER WRITE FAILED, multi len: %d\n",
 393                                 priv->wmi->multi_write_idx);
 394                 }
 395                 priv->wmi->multi_write_idx = 0;
 396         }
 397
 398         mutex_unlock(&priv->wmi->multi_write_mutex);
 399 }
 400
 401 static void ath9k_regwrite(void *hw_priv, u32 val, u32 reg_offset)
 402 {
 403         struct ath_hw *ah = (struct ath_hw *) hw_priv;
 404         struct ath_common *common = ath9k_hw_common(ah);
 405         struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
 406
 407         if (atomic_read(&priv->wmi->mwrite_cnt))
 408                 ath9k_regwrite_buffer(hw_priv, val, reg_offset);
 409         else
 410                 ath9k_regwrite_single(hw_priv, val, reg_offset);
 411 }
 412
 413 static void ath9k_enable_regwrite_buffer(void *hw_priv)
 414 {
 415         struct ath_hw *ah = (struct ath_hw *) hw_priv;
 416         struct ath_common *common = ath9k_hw_common(ah);
 417         struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
 418
 419         atomic_inc(&priv->wmi->mwrite_cnt);
 420 }
 421
 422 static void ath9k_regwrite_flush(void *hw_priv)
 423 {
 424         struct ath_hw *ah = (struct ath_hw *) hw_priv;
 425         struct ath_common *common = ath9k_hw_common(ah);
 426         struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
 427         u32 rsp_status;
 428         int r;
 429
 430         atomic_dec(&priv->wmi->mwrite_cnt);
 431
 432         mutex_lock(&priv->wmi->multi_write_mutex);
 433
 434         if (priv->wmi->multi_write_idx) {
 435                 r = ath9k_wmi_cmd(priv->wmi, WMI_REG_WRITE_CMDID,
 436                           (u8 *) &priv->wmi->multi_write,
 437                           sizeof(struct register_write) * priv->wmi->multi_write_idx,
 438                           (u8 *) &rsp_status, sizeof(rsp_status),
 439                           100);
 440                 if (unlikely(r)) {
 441                         ath_dbg(common, ATH_DBG_WMI,
 442                                 "REGISTER WRITE FAILED, multi len: %d\n",
 443                                 priv->wmi->multi_write_idx);
 444                 }
 445                 priv->wmi->multi_write_idx = 0;
 446         }
 447
 448         mutex_unlock(&priv->wmi->multi_write_mutex);
 449 }
 450
 451 static u32 ath9k_reg_rmw(void *hw_priv, u32 reg_offset, u32 set, u32 clr)
 452 {
 453         u32 val;
 454
 455         val = ath9k_regread(hw_priv, reg_offset);
 456         val &= ~clr;
 457         val |= set;
 458         ath9k_regwrite(hw_priv, val, reg_offset);
 459         return val;
 460 }
 461
 462 static void ath_usb_read_cachesize(struct ath_common *common, int *csz)
 463 {
 464         *csz = L1_CACHE_BYTES >> 2;
 465 }
 466
 467 static bool ath_usb_eeprom_read(struct ath_common *common, u32 off, u16 *data)
 468 {
 469         struct ath_hw *ah = (struct ath_hw *) common->ah;
 470
 471         (void)REG_READ(ah, AR5416_EEPROM_OFFSET + (off << AR5416_EEPROM_S));
 472
 473         if (!ath9k_hw_wait(ah,
 474                            AR_EEPROM_STATUS_DATA,
 475                            AR_EEPROM_STATUS_DATA_BUSY |
 476                            AR_EEPROM_STATUS_DATA_PROT_ACCESS, 0,
 477                            AH_WAIT_TIMEOUT))
 478                 return false;
 479
 480         *data = MS(REG_READ(ah, AR_EEPROM_STATUS_DATA),
 481                    AR_EEPROM_STATUS_DATA_VAL);
 482
 483         return true;
 484 }
 485
 486 static const struct ath_bus_ops ath9k_usb_bus_ops = {
 487         .ath_bus_type = ATH_USB,
 488         .read_cachesize = ath_usb_read_cachesize,
 489         .eeprom_read = ath_usb_eeprom_read,
 490 };
 491
 492 static void setup_ht_cap(struct ath9k_htc_priv *priv,
 493                          struct ieee80211_sta_ht_cap *ht_info)
 494 {
 495         struct ath_common *common = ath9k_hw_common(priv->ah);
 496         u8 tx_streams, rx_streams;
 497         int i;
 498
 499         ht_info->ht_supported = true;
 500         ht_info->cap = IEEE80211_HT_CAP_SUP_WIDTH_20_40 |
 501                        IEEE80211_HT_CAP_SM_PS |
 502                        IEEE80211_HT_CAP_SGI_40 |
 503                        IEEE80211_HT_CAP_DSSSCCK40;
 504
 505         if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_SGI_20)
 506                 ht_info->cap |= IEEE80211_HT_CAP_SGI_20;
 507
 508         ht_info->cap |= (1 << IEEE80211_HT_CAP_RX_STBC_SHIFT);
 509
 510         ht_info->ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K;
 511         ht_info->ampdu_density = IEEE80211_HT_MPDU_DENSITY_8;
 512
 513         memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
 514
 515         /* ath9k_htc supports only 1 or 2 stream devices */
 516         tx_streams = ath9k_cmn_count_streams(priv->ah->txchainmask, 2);
 517         rx_streams = ath9k_cmn_count_streams(priv->ah->rxchainmask, 2);
 518
 519         ath_dbg(common, ATH_DBG_CONFIG,
 520                 "TX streams %d, RX streams: %d\n",
 521                 tx_streams, rx_streams);
 522
 523         if (tx_streams != rx_streams) {
 524                 ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
 525                 ht_info->mcs.tx_params |= ((tx_streams - 1) <<
 526                                            IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT);
 527         }
 528
 529         for (i = 0; i < rx_streams; i++)
 530                 ht_info->mcs.rx_mask[i] = 0xff;
 531
 532         ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_DEFINED;
 533 }
 534
 535 static int ath9k_init_queues(struct ath9k_htc_priv *priv)
 536 {
 537         struct ath_common *common = ath9k_hw_common(priv->ah);
 538         int i;
 539
 540         for (i = 0; i < ARRAY_SIZE(priv->hwq_map); i++)
 541                 priv->hwq_map[i] = -1;
 542
 543         priv->beaconq = ath9k_hw_beaconq_setup(priv->ah);
 544         if (priv->beaconq == -1) {
 545                 ath_err(common, "Unable to setup BEACON xmit queue\n");
 546                 goto err;
 547         }
 548
 549         priv->cabq = ath9k_htc_cabq_setup(priv);
 550         if (priv->cabq == -1) {
 551                 ath_err(common, "Unable to setup CAB xmit queue\n");
 552                 goto err;
 553         }
 554
 555         if (!ath9k_htc_txq_setup(priv, WME_AC_BE)) {
 556                 ath_err(common, "Unable to setup xmit queue for BE traffic\n");
 557                 goto err;
 558         }
 559
 560         if (!ath9k_htc_txq_setup(priv, WME_AC_BK)) {
 561                 ath_err(common, "Unable to setup xmit queue for BK traffic\n");
 562                 goto err;
 563         }
 564         if (!ath9k_htc_txq_setup(priv, WME_AC_VI)) {
 565                 ath_err(common, "Unable to setup xmit queue for VI traffic\n");
 566                 goto err;
 567         }
 568         if (!ath9k_htc_txq_setup(priv, WME_AC_VO)) {
 569                 ath_err(common, "Unable to setup xmit queue for VO traffic\n");
 570                 goto err;
 571         }
 572
 573         return 0;
 574
 575 err:
 576         return -EINVAL;
 577 }
 578
 579 static void ath9k_init_channels_rates(struct ath9k_htc_priv *priv)
 580 {
 581         if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_2GHZ) {
 582                 priv->sbands[IEEE80211_BAND_2GHZ].channels =
 583                         ath9k_2ghz_channels;
 584                 priv->sbands[IEEE80211_BAND_2GHZ].band = IEEE80211_BAND_2GHZ;
 585                 priv->sbands[IEEE80211_BAND_2GHZ].n_channels =
 586                         ARRAY_SIZE(ath9k_2ghz_channels);
 587                 priv->sbands[IEEE80211_BAND_2GHZ].bitrates = ath9k_legacy_rates;
 588                 priv->sbands[IEEE80211_BAND_2GHZ].n_bitrates =
 589                         ARRAY_SIZE(ath9k_legacy_rates);
 590         }
 591
 592         if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_5GHZ) {
 593                 priv->sbands[IEEE80211_BAND_5GHZ].channels = ath9k_5ghz_channels;
 594                 priv->sbands[IEEE80211_BAND_5GHZ].band = IEEE80211_BAND_5GHZ;
 595                 priv->sbands[IEEE80211_BAND_5GHZ].n_channels =
 596                         ARRAY_SIZE(ath9k_5ghz_channels);
 597                 priv->sbands[IEEE80211_BAND_5GHZ].bitrates =
 598                         ath9k_legacy_rates + 4;
 599                 priv->sbands[IEEE80211_BAND_5GHZ].n_bitrates =
 600                         ARRAY_SIZE(ath9k_legacy_rates) - 4;
 601         }
 602 }
 603
 604 static void ath9k_init_misc(struct ath9k_htc_priv *priv)
 605 {
 606         struct ath_common *common = ath9k_hw_common(priv->ah);
 607
 608         memcpy(common->bssidmask, ath_bcast_mac, ETH_ALEN);
 609
 610         priv->ah->opmode = NL80211_IFTYPE_STATION;
 611 }
 612
 613 static void ath9k_init_btcoex(struct ath9k_htc_priv *priv)
 614 {
 615         int qnum;
 616
 617         switch (priv->ah->btcoex_hw.scheme) {
 618         case ATH_BTCOEX_CFG_NONE:
 619                 break;
 620         case ATH_BTCOEX_CFG_3WIRE:
 621                 priv->ah->btcoex_hw.btactive_gpio = 7;
 622                 priv->ah->btcoex_hw.btpriority_gpio = 6;
 623                 priv->ah->btcoex_hw.wlanactive_gpio = 8;
 624                 priv->btcoex.bt_stomp_type = ATH_BTCOEX_STOMP_LOW;
 625                 ath9k_hw_btcoex_init_3wire(priv->ah);
 626                 ath_htc_init_btcoex_work(priv);
 627                 qnum = priv->hwq_map[WME_AC_BE];
 628                 ath9k_hw_init_btcoex_hw(priv->ah, qnum);
 629                 break;
 630         default:
 631                 WARN_ON(1);
 632                 break;
 633         }
 634 }
 635
 636 static int ath9k_init_priv(struct ath9k_htc_priv *priv,
 637                            u16 devid, char *product,
 638                            u32 drv_info)
 639 {
 640         struct ath_hw *ah = NULL;
 641         struct ath_common *common;
 642         int i, ret = 0, csz = 0;
 643
 644         priv->op_flags |= OP_INVALID;
 645
 646         ah = kzalloc(sizeof(struct ath_hw), GFP_KERNEL);
 647         if (!ah)
 648                 return -ENOMEM;
 649
 650         ah->hw_version.devid = devid;
 651         ah->hw_version.usbdev = drv_info;
 652         ah->ah_flags |= AH_USE_EEPROM;
 653         ah->reg_ops.read = ath9k_regread;
 654         ah->reg_ops.multi_read = ath9k_multi_regread;
 655         ah->reg_ops.write = ath9k_regwrite;
 656         ah->reg_ops.enable_write_buffer = ath9k_enable_regwrite_buffer;
 657         ah->reg_ops.write_flush = ath9k_regwrite_flush;
 658         ah->reg_ops.rmw = ath9k_reg_rmw;
 659         priv->ah = ah;
 660
 661         common = ath9k_hw_common(ah);
 662         common->ops = &ah->reg_ops;
 663         common->bus_ops = &ath9k_usb_bus_ops;
 664         common->ah = ah;
 665         common->hw = priv->hw;
 666         common->priv = priv;
 667         common->debug_mask = ath9k_debug;
 668
 669         spin_lock_init(&priv->beacon_lock);
 670         spin_lock_init(&priv->tx.tx_lock);
 671         mutex_init(&priv->mutex);
 672         mutex_init(&priv->htc_pm_lock);
 673         tasklet_init(&priv->rx_tasklet, ath9k_rx_tasklet,
 674                      (unsigned long)priv);
 675         tasklet_init(&priv->tx_failed_tasklet, ath9k_tx_failed_tasklet,
 676                      (unsigned long)priv);
 677         INIT_DELAYED_WORK(&priv->ani_work, ath9k_htc_ani_work);
 678         INIT_WORK(&priv->ps_work, ath9k_ps_work);
 679         INIT_WORK(&priv->fatal_work, ath9k_fatal_work);
 680         setup_timer(&priv->tx.cleanup_timer, ath9k_htc_tx_cleanup_timer,
 681                     (unsigned long)priv);
 682
 683         /*
 684          * Cache line size is used to size and align various
 685          * structures used to communicate with the hardware.
 686          */
 687         ath_read_cachesize(common, &csz);
 688         common->cachelsz = csz << 2; /* convert to bytes */
 689
 690         ret = ath9k_hw_init(ah);
 691         if (ret) {
 692                 ath_err(common,
 693                         "Unable to initialize hardware; initialization status: %d\n",
 694                         ret);
 695                 goto err_hw;
 696         }
 697
 698         ret = ath9k_init_queues(priv);
 699         if (ret)
 700                 goto err_queues;
 701
 702         for (i = 0; i < ATH9K_HTC_MAX_BCN_VIF; i++)
 703                 priv->cur_beacon_conf.bslot[i] = NULL;
 704
 705         ath9k_cmn_init_crypto(ah);
 706         ath9k_init_channels_rates(priv);
 707         ath9k_init_misc(priv);
 708
 709         if (product && strncmp(product, ATH_HTC_BTCOEX_PRODUCT_ID, 5) == 0) {
 710                 ah->btcoex_hw.scheme = ATH_BTCOEX_CFG_3WIRE;
 711                 ath9k_init_btcoex(priv);
 712         }
 713
 714         return 0;
 715
 716 err_queues:
 717         ath9k_hw_deinit(ah);
 718 err_hw:
 719
 720         kfree(ah);
 721         priv->ah = NULL;
 722
 723         return ret;
 724 }
 725
 726 static void ath9k_set_hw_capab(struct ath9k_htc_priv *priv,
 727                                struct ieee80211_hw *hw)
 728 {
 729         struct ath_common *common = ath9k_hw_common(priv->ah);
 730
 731         hw->flags = IEEE80211_HW_SIGNAL_DBM |
 732                 IEEE80211_HW_AMPDU_AGGREGATION |
 733                 IEEE80211_HW_SPECTRUM_MGMT |
 734                 IEEE80211_HW_HAS_RATE_CONTROL |
 735                 IEEE80211_HW_RX_INCLUDES_FCS |
 736                 IEEE80211_HW_PS_NULLFUNC_STACK |
 737                 IEEE80211_HW_REPORTS_TX_ACK_STATUS |
 738                 IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING;
 739
 740         if (ath9k_ps_enable)
 741                 hw->flags |= IEEE80211_HW_SUPPORTS_PS;
 742
 743         hw->wiphy->interface_modes =
 744                 BIT(NL80211_IFTYPE_STATION) |
 745                 BIT(NL80211_IFTYPE_ADHOC) |
 746                 BIT(NL80211_IFTYPE_AP) |
 747                 BIT(NL80211_IFTYPE_P2P_GO) |
 748                 BIT(NL80211_IFTYPE_P2P_CLIENT);
 749
 750         hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT;
 751
 752         hw->queues = 4;
 753         hw->channel_change_time = 5000;
 754         hw->max_listen_interval = 10;
 755
 756         hw->vif_data_size = sizeof(struct ath9k_htc_vif);
 757         hw->sta_data_size = sizeof(struct ath9k_htc_sta);
 758
 759         /* tx_frame_hdr is larger than tx_mgmt_hdr anyway */
 760         hw->extra_tx_headroom = sizeof(struct tx_frame_hdr) +
 761                 sizeof(struct htc_frame_hdr) + 4;
 762
 763         if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_2GHZ)
 764                 hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
 765                         &priv->sbands[IEEE80211_BAND_2GHZ];
 766         if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_5GHZ)
 767                 hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
 768                         &priv->sbands[IEEE80211_BAND_5GHZ];
 769
 770         if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_HT) {
 771                 if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_2GHZ)
 772                         setup_ht_cap(priv,
 773                                      &priv->sbands[IEEE80211_BAND_2GHZ].ht_cap);
 774                 if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_5GHZ)
 775                         setup_ht_cap(priv,
 776                                      &priv->sbands[IEEE80211_BAND_5GHZ].ht_cap);
 777         }
 778
 779         SET_IEEE80211_PERM_ADDR(hw, common->macaddr);
 780 }
 781
 782 static int ath9k_init_firmware_version(struct ath9k_htc_priv *priv)
 783 {
 784         struct ieee80211_hw *hw = priv->hw;
 785         struct wmi_fw_version cmd_rsp;
 786         int ret;
 787
 788         memset(&cmd_rsp, 0, sizeof(cmd_rsp));
 789
 790         WMI_CMD(WMI_GET_FW_VERSION);
 791         if (ret)
 792                 return -EINVAL;
 793
 794         priv->fw_version_major = be16_to_cpu(cmd_rsp.major);
 795         priv->fw_version_minor = be16_to_cpu(cmd_rsp.minor);
 796
 797         snprintf(hw->wiphy->fw_version, ETHTOOL_BUSINFO_LEN, "%d.%d",
 798                  priv->fw_version_major,
 799                  priv->fw_version_minor);
 800
 801         dev_info(priv->dev, "ath9k_htc: FW Version: %d.%d\n",
 802                  priv->fw_version_major,
 803                  priv->fw_version_minor);
 804
 805         /*
 806          * Check if the available FW matches the driver's
 807          * required version.
 808          */
 809         if (priv->fw_version_major != MAJOR_VERSION_REQ ||
 810             priv->fw_version_minor < MINOR_VERSION_REQ) {
 811                 dev_err(priv->dev, "ath9k_htc: Please upgrade to FW version %d.%d\n",
 812                         MAJOR_VERSION_REQ, MINOR_VERSION_REQ);
 813                 return -EINVAL;
 814         }
 815
 816         return 0;
 817 }
 818
 819 static int ath9k_init_device(struct ath9k_htc_priv *priv,
 820                              u16 devid, char *product, u32 drv_info)
 821 {
 822         struct ieee80211_hw *hw = priv->hw;
 823         struct ath_common *common;
 824         struct ath_hw *ah;
 825         int error = 0;
 826         struct ath_regulatory *reg;
 827         char hw_name[64];
 828
 829         /* Bring up device */
 830         error = ath9k_init_priv(priv, devid, product, drv_info);
 831         if (error != 0)
 832                 goto err_init;
 833
 834         ah = priv->ah;
 835         common = ath9k_hw_common(ah);
 836         ath9k_set_hw_capab(priv, hw);
 837
 838         error = ath9k_init_firmware_version(priv);
 839         if (error != 0)
 840                 goto err_fw;
 841
 842         /* Initialize regulatory */
 843         error = ath_regd_init(&common->regulatory, priv->hw->wiphy,
 844                               ath9k_reg_notifier);
 845         if (error)
 846                 goto err_regd;
 847
 848         reg = &common->regulatory;
 849
 850         /* Setup TX */
 851         error = ath9k_tx_init(priv);
 852         if (error != 0)
 853                 goto err_tx;
 854
 855         /* Setup RX */
 856         error = ath9k_rx_init(priv);
 857         if (error != 0)
 858                 goto err_rx;
 859
 860         ath9k_hw_disable(priv->ah);
 861 #ifdef CONFIG_MAC80211_LEDS
 862         /* must be initialized before ieee80211_register_hw */
 863         priv->led_cdev.default_trigger = ieee80211_create_tpt_led_trigger(priv->hw,
 864                 IEEE80211_TPT_LEDTRIG_FL_RADIO, ath9k_htc_tpt_blink,
 865                 ARRAY_SIZE(ath9k_htc_tpt_blink));
 866 #endif
 867
 868         /* Register with mac80211 */
 869         error = ieee80211_register_hw(hw);
 870         if (error)
 871                 goto err_register;
 872
 873         /* Handle world regulatory */
 874         if (!ath_is_world_regd(reg)) {
 875                 error = regulatory_hint(hw->wiphy, reg->alpha2);
 876                 if (error)
 877                         goto err_world;
 878         }
 879
 880         error = ath9k_htc_init_debug(priv->ah);
 881         if (error) {
 882                 ath_err(common, "Unable to create debugfs files\n");
 883                 goto err_world;
 884         }
 885
 886         ath_dbg(common, ATH_DBG_CONFIG,
 887                 "WMI:%d, BCN:%d, CAB:%d, UAPSD:%d, MGMT:%d, "
 888                 "BE:%d, BK:%d, VI:%d, VO:%d\n",
 889                 priv->wmi_cmd_ep,
 890                 priv->beacon_ep,
 891                 priv->cab_ep,
 892                 priv->uapsd_ep,
 893                 priv->mgmt_ep,
 894                 priv->data_be_ep,
 895                 priv->data_bk_ep,
 896                 priv->data_vi_ep,
 897                 priv->data_vo_ep);
 898
 899         ath9k_hw_name(priv->ah, hw_name, sizeof(hw_name));
 900         wiphy_info(hw->wiphy, "%s\n", hw_name);
 901
 902         ath9k_init_leds(priv);
 903         ath9k_start_rfkill_poll(priv);
 904
 905         return 0;
 906
 907 err_world:
 908         ieee80211_unregister_hw(hw);
 909 err_register:
 910         ath9k_rx_cleanup(priv);
 911 err_rx:
 912         ath9k_tx_cleanup(priv);
 913 err_tx:
 914         /* Nothing */
 915 err_regd:
 916         /* Nothing */
 917 err_fw:
 918         ath9k_deinit_priv(priv);
 919 err_init:
 920         return error;
 921 }
 922
 923 int ath9k_htc_probe_device(struct htc_target *htc_handle, struct device *dev,
 924                            u16 devid, char *product, u32 drv_info)
 925 {
 926         struct ieee80211_hw *hw;
 927         struct ath9k_htc_priv *priv;
 928         int ret;
 929
 930         hw = ieee80211_alloc_hw(sizeof(struct ath9k_htc_priv), &ath9k_htc_ops);
 931         if (!hw)
 932                 return -ENOMEM;
 933
 934         priv = hw->priv;
 935         priv->hw = hw;
 936         priv->htc = htc_handle;
 937         priv->dev = dev;
 938         htc_handle->drv_priv = priv;
 939         SET_IEEE80211_DEV(hw, priv->dev);
 940
 941         ret = ath9k_htc_wait_for_target(priv);
 942         if (ret)
 943                 goto err_free;
 944
 945         priv->wmi = ath9k_init_wmi(priv);
 946         if (!priv->wmi) {
 947                 ret = -EINVAL;
 948                 goto err_free;
 949         }
 950
 951         ret = ath9k_init_htc_services(priv, devid, drv_info);
 952         if (ret)
 953                 goto err_init;
 954
 955         ret = ath9k_init_device(priv, devid, product, drv_info);
 956         if (ret)
 957                 goto err_init;
 958
 959         return 0;
 960
 961 err_init:
 962         ath9k_deinit_wmi(priv);
 963 err_free:
 964         ieee80211_free_hw(hw);
 965         return ret;
 966 }
 967
 968 void ath9k_htc_disconnect_device(struct htc_target *htc_handle, bool hotunplug)
 969 {
 970         if (htc_handle->drv_priv) {
 971
 972                 /* Check if the device has been yanked out. */
 973                 if (hotunplug)
 974                         htc_handle->drv_priv->ah->ah_flags |= AH_UNPLUGGED;
 975
 976                 ath9k_deinit_device(htc_handle->drv_priv);
 977                 ath9k_deinit_wmi(htc_handle->drv_priv);
 978                 ieee80211_free_hw(htc_handle->drv_priv->hw);
 979         }
 980 }
 981
 982 #ifdef CONFIG_PM
 983
 984 void ath9k_htc_suspend(struct htc_target *htc_handle)
 985 {
 986         ath9k_htc_setpower(htc_handle->drv_priv, ATH9K_PM_FULL_SLEEP);
 987 }
 988
 989 int ath9k_htc_resume(struct htc_target *htc_handle)
 990 {
 991         struct ath9k_htc_priv *priv = htc_handle->drv_priv;
 992         int ret;
 993
 994         ret = ath9k_htc_wait_for_target(priv);
 995         if (ret)
 996                 return ret;
 997
 998         ret = ath9k_init_htc_services(priv, priv->ah->hw_version.devid,
 999                                       priv->ah->hw_version.usbdev);
1000         return ret;
1001 }
1002 #endif
1003
1004 static int __init ath9k_htc_init(void)
1005 {
1006         if (ath9k_hif_usb_init() < 0) {
1007                 printk(KERN_ERR
1008                         "ath9k_htc: No USB devices found,"
1009                         " driver not installed.\n");
1010                 return -ENODEV;
1011         }
1012
1013         return 0;
1014 }
1015 module_init(ath9k_htc_init);
1016
1017 static void __exit ath9k_htc_exit(void)
1018 {
1019         ath9k_hif_usb_exit();
1020         printk(KERN_INFO "ath9k_htc: Driver unloaded\n");
1021 }
1022 module_exit(ath9k_htc_exit);