1 /***************************************************************************
3 * Copyright (C) 2004-2008 SMSC
4 * Copyright (C) 2005-2008 ARM
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
20 ***************************************************************************
21 * Rewritten, heavily based on smsc911x simple driver by SMSC.
22 * Partly uses io macros from smc91x.c by Nicolas Pitre
25 * LAN9115, LAN9116, LAN9117, LAN9118
26 * LAN9215, LAN9216, LAN9217, LAN9218
32 #include <linux/crc32.h>
33 #include <linux/delay.h>
34 #include <linux/errno.h>
35 #include <linux/etherdevice.h>
36 #include <linux/ethtool.h>
37 #include <linux/init.h>
38 #include <linux/ioport.h>
39 #include <linux/kernel.h>
40 #include <linux/module.h>
41 #include <linux/netdevice.h>
42 #include <linux/platform_device.h>
43 #include <linux/sched.h>
44 #include <linux/timer.h>
45 #include <linux/bug.h>
46 #include <linux/bitops.h>
47 #include <linux/irq.h>
49 #include <linux/swab.h>
50 #include <linux/phy.h>
51 #include <linux/smsc911x.h>
52 #include <linux/device.h>
55 #define SMSC_CHIPNAME "smsc911x"
56 #define SMSC_MDIONAME "smsc911x-mdio"
57 #define SMSC_DRV_VERSION "2008-10-21"
59 MODULE_LICENSE("GPL");
60 MODULE_VERSION(SMSC_DRV_VERSION);
61 MODULE_ALIAS("platform:smsc911x");
64 static int debug = 16;
69 module_param(debug, int, 0);
70 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
72 struct smsc911x_data {
77 /* used to decide which workarounds apply */
78 unsigned int generation;
80 /* device configuration (copied from platform_data during probe) */
81 struct smsc911x_platform_config config;
83 /* This needs to be acquired before calling any of below:
84 * smsc911x_mac_read(), smsc911x_mac_write()
88 /* spinlock to ensure register accesses are serialised */
91 struct phy_device *phy_dev;
92 struct mii_bus *mii_bus;
93 int phy_irq[PHY_MAX_ADDR];
94 unsigned int using_extphy;
99 unsigned int gpio_setting;
100 unsigned int gpio_orig_setting;
101 struct net_device *dev;
102 struct napi_struct napi;
104 unsigned int software_irq_signal;
106 #ifdef USE_PHY_WORK_AROUND
107 #define MIN_PACKET_SIZE (64)
108 char loopback_tx_pkt[MIN_PACKET_SIZE];
109 char loopback_rx_pkt[MIN_PACKET_SIZE];
110 unsigned int resetcount;
113 /* Members for Multicast filter workaround */
114 unsigned int multicast_update_pending;
115 unsigned int set_bits_mask;
116 unsigned int clear_bits_mask;
121 static inline u32 __smsc911x_reg_read(struct smsc911x_data *pdata, u32 reg)
123 if (pdata->config.flags & SMSC911X_USE_32BIT)
124 return readl(pdata->ioaddr + reg);
126 if (pdata->config.flags & SMSC911X_USE_16BIT)
127 return ((readw(pdata->ioaddr + reg) & 0xFFFF) |
128 ((readw(pdata->ioaddr + reg + 2) & 0xFFFF) << 16));
134 static inline u32 smsc911x_reg_read(struct smsc911x_data *pdata, u32 reg)
139 spin_lock_irqsave(&pdata->dev_lock, flags);
140 data = __smsc911x_reg_read(pdata, reg);
141 spin_unlock_irqrestore(&pdata->dev_lock, flags);
146 static inline void __smsc911x_reg_write(struct smsc911x_data *pdata, u32 reg,
149 if (pdata->config.flags & SMSC911X_USE_32BIT) {
150 writel(val, pdata->ioaddr + reg);
154 if (pdata->config.flags & SMSC911X_USE_16BIT) {
155 writew(val & 0xFFFF, pdata->ioaddr + reg);
156 writew((val >> 16) & 0xFFFF, pdata->ioaddr + reg + 2);
163 static inline void smsc911x_reg_write(struct smsc911x_data *pdata, u32 reg,
168 spin_lock_irqsave(&pdata->dev_lock, flags);
169 __smsc911x_reg_write(pdata, reg, val);
170 spin_unlock_irqrestore(&pdata->dev_lock, flags);
173 /* Writes a packet to the TX_DATA_FIFO */
175 smsc911x_tx_writefifo(struct smsc911x_data *pdata, unsigned int *buf,
176 unsigned int wordcount)
180 spin_lock_irqsave(&pdata->dev_lock, flags);
182 if (pdata->config.flags & SMSC911X_SWAP_FIFO) {
184 __smsc911x_reg_write(pdata, TX_DATA_FIFO,
189 if (pdata->config.flags & SMSC911X_USE_32BIT) {
190 writesl(pdata->ioaddr + TX_DATA_FIFO, buf, wordcount);
194 if (pdata->config.flags & SMSC911X_USE_16BIT) {
196 __smsc911x_reg_write(pdata, TX_DATA_FIFO, *buf++);
202 spin_unlock_irqrestore(&pdata->dev_lock, flags);
205 /* Reads a packet out of the RX_DATA_FIFO */
207 smsc911x_rx_readfifo(struct smsc911x_data *pdata, unsigned int *buf,
208 unsigned int wordcount)
212 spin_lock_irqsave(&pdata->dev_lock, flags);
214 if (pdata->config.flags & SMSC911X_SWAP_FIFO) {
216 *buf++ = swab32(__smsc911x_reg_read(pdata,
221 if (pdata->config.flags & SMSC911X_USE_32BIT) {
222 readsl(pdata->ioaddr + RX_DATA_FIFO, buf, wordcount);
226 if (pdata->config.flags & SMSC911X_USE_16BIT) {
228 *buf++ = __smsc911x_reg_read(pdata, RX_DATA_FIFO);
234 spin_unlock_irqrestore(&pdata->dev_lock, flags);
237 /* waits for MAC not busy, with timeout. Only called by smsc911x_mac_read
238 * and smsc911x_mac_write, so assumes mac_lock is held */
239 static int smsc911x_mac_complete(struct smsc911x_data *pdata)
244 SMSC_ASSERT_MAC_LOCK(pdata);
246 for (i = 0; i < 40; i++) {
247 val = smsc911x_reg_read(pdata, MAC_CSR_CMD);
248 if (!(val & MAC_CSR_CMD_CSR_BUSY_))
251 SMSC_WARNING(HW, "Timed out waiting for MAC not BUSY. "
252 "MAC_CSR_CMD: 0x%08X", val);
256 /* Fetches a MAC register value. Assumes mac_lock is acquired */
257 static u32 smsc911x_mac_read(struct smsc911x_data *pdata, unsigned int offset)
261 SMSC_ASSERT_MAC_LOCK(pdata);
263 temp = smsc911x_reg_read(pdata, MAC_CSR_CMD);
264 if (unlikely(temp & MAC_CSR_CMD_CSR_BUSY_)) {
265 SMSC_WARNING(HW, "MAC busy at entry");
269 /* Send the MAC cmd */
270 smsc911x_reg_write(pdata, MAC_CSR_CMD, ((offset & 0xFF) |
271 MAC_CSR_CMD_CSR_BUSY_ | MAC_CSR_CMD_R_NOT_W_));
273 /* Workaround for hardware read-after-write restriction */
274 temp = smsc911x_reg_read(pdata, BYTE_TEST);
276 /* Wait for the read to complete */
277 if (likely(smsc911x_mac_complete(pdata) == 0))
278 return smsc911x_reg_read(pdata, MAC_CSR_DATA);
280 SMSC_WARNING(HW, "MAC busy after read");
284 /* Set a mac register, mac_lock must be acquired before calling */
285 static void smsc911x_mac_write(struct smsc911x_data *pdata,
286 unsigned int offset, u32 val)
290 SMSC_ASSERT_MAC_LOCK(pdata);
292 temp = smsc911x_reg_read(pdata, MAC_CSR_CMD);
293 if (unlikely(temp & MAC_CSR_CMD_CSR_BUSY_)) {
295 "smsc911x_mac_write failed, MAC busy at entry");
299 /* Send data to write */
300 smsc911x_reg_write(pdata, MAC_CSR_DATA, val);
302 /* Write the actual data */
303 smsc911x_reg_write(pdata, MAC_CSR_CMD, ((offset & 0xFF) |
304 MAC_CSR_CMD_CSR_BUSY_));
306 /* Workaround for hardware read-after-write restriction */
307 temp = smsc911x_reg_read(pdata, BYTE_TEST);
309 /* Wait for the write to complete */
310 if (likely(smsc911x_mac_complete(pdata) == 0))
314 "smsc911x_mac_write failed, MAC busy after write");
317 /* Get a phy register */
318 static int smsc911x_mii_read(struct mii_bus *bus, int phyaddr, int regidx)
320 struct smsc911x_data *pdata = (struct smsc911x_data *)bus->priv;
325 spin_lock_irqsave(&pdata->mac_lock, flags);
327 /* Confirm MII not busy */
328 if (unlikely(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
330 "MII is busy in smsc911x_mii_read???");
335 /* Set the address, index & direction (read from PHY) */
336 addr = ((phyaddr & 0x1F) << 11) | ((regidx & 0x1F) << 6);
337 smsc911x_mac_write(pdata, MII_ACC, addr);
339 /* Wait for read to complete w/ timeout */
340 for (i = 0; i < 100; i++)
341 if (!(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
342 reg = smsc911x_mac_read(pdata, MII_DATA);
346 SMSC_WARNING(HW, "Timed out waiting for MII read to finish");
350 spin_unlock_irqrestore(&pdata->mac_lock, flags);
354 /* Set a phy register */
355 static int smsc911x_mii_write(struct mii_bus *bus, int phyaddr, int regidx,
358 struct smsc911x_data *pdata = (struct smsc911x_data *)bus->priv;
363 spin_lock_irqsave(&pdata->mac_lock, flags);
365 /* Confirm MII not busy */
366 if (unlikely(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
368 "MII is busy in smsc911x_mii_write???");
373 /* Put the data to write in the MAC */
374 smsc911x_mac_write(pdata, MII_DATA, val);
376 /* Set the address, index & direction (write to PHY) */
377 addr = ((phyaddr & 0x1F) << 11) | ((regidx & 0x1F) << 6) |
379 smsc911x_mac_write(pdata, MII_ACC, addr);
381 /* Wait for write to complete w/ timeout */
382 for (i = 0; i < 100; i++)
383 if (!(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
388 SMSC_WARNING(HW, "Timed out waiting for MII write to finish");
392 spin_unlock_irqrestore(&pdata->mac_lock, flags);
396 /* Switch to external phy. Assumes tx and rx are stopped. */
397 static void smsc911x_phy_enable_external(struct smsc911x_data *pdata)
399 unsigned int hwcfg = smsc911x_reg_read(pdata, HW_CFG);
401 /* Disable phy clocks to the MAC */
402 hwcfg &= (~HW_CFG_PHY_CLK_SEL_);
403 hwcfg |= HW_CFG_PHY_CLK_SEL_CLK_DIS_;
404 smsc911x_reg_write(pdata, HW_CFG, hwcfg);
405 udelay(10); /* Enough time for clocks to stop */
407 /* Switch to external phy */
408 hwcfg |= HW_CFG_EXT_PHY_EN_;
409 smsc911x_reg_write(pdata, HW_CFG, hwcfg);
411 /* Enable phy clocks to the MAC */
412 hwcfg &= (~HW_CFG_PHY_CLK_SEL_);
413 hwcfg |= HW_CFG_PHY_CLK_SEL_EXT_PHY_;
414 smsc911x_reg_write(pdata, HW_CFG, hwcfg);
415 udelay(10); /* Enough time for clocks to restart */
417 hwcfg |= HW_CFG_SMI_SEL_;
418 smsc911x_reg_write(pdata, HW_CFG, hwcfg);
421 /* Autodetects and enables external phy if present on supported chips.
422 * autodetection can be overridden by specifying SMSC911X_FORCE_INTERNAL_PHY
423 * or SMSC911X_FORCE_EXTERNAL_PHY in the platform_data flags. */
424 static void smsc911x_phy_initialise_external(struct smsc911x_data *pdata)
426 unsigned int hwcfg = smsc911x_reg_read(pdata, HW_CFG);
428 if (pdata->config.flags & SMSC911X_FORCE_INTERNAL_PHY) {
429 SMSC_TRACE(HW, "Forcing internal PHY");
430 pdata->using_extphy = 0;
431 } else if (pdata->config.flags & SMSC911X_FORCE_EXTERNAL_PHY) {
432 SMSC_TRACE(HW, "Forcing external PHY");
433 smsc911x_phy_enable_external(pdata);
434 pdata->using_extphy = 1;
435 } else if (hwcfg & HW_CFG_EXT_PHY_DET_) {
436 SMSC_TRACE(HW, "HW_CFG EXT_PHY_DET set, using external PHY");
437 smsc911x_phy_enable_external(pdata);
438 pdata->using_extphy = 1;
440 SMSC_TRACE(HW, "HW_CFG EXT_PHY_DET clear, using internal PHY");
441 pdata->using_extphy = 0;
445 /* Fetches a tx status out of the status fifo */
446 static unsigned int smsc911x_tx_get_txstatus(struct smsc911x_data *pdata)
448 unsigned int result =
449 smsc911x_reg_read(pdata, TX_FIFO_INF) & TX_FIFO_INF_TSUSED_;
452 result = smsc911x_reg_read(pdata, TX_STATUS_FIFO);
457 /* Fetches the next rx status */
458 static unsigned int smsc911x_rx_get_rxstatus(struct smsc911x_data *pdata)
460 unsigned int result =
461 smsc911x_reg_read(pdata, RX_FIFO_INF) & RX_FIFO_INF_RXSUSED_;
464 result = smsc911x_reg_read(pdata, RX_STATUS_FIFO);
469 #ifdef USE_PHY_WORK_AROUND
470 static int smsc911x_phy_check_loopbackpkt(struct smsc911x_data *pdata)
477 for (tries = 0; tries < 10; tries++) {
478 unsigned int txcmd_a;
479 unsigned int txcmd_b;
481 unsigned int pktlength;
484 /* Zero-out rx packet memory */
485 memset(pdata->loopback_rx_pkt, 0, MIN_PACKET_SIZE);
487 /* Write tx packet to 118 */
488 txcmd_a = (u32)((ulong)pdata->loopback_tx_pkt & 0x03) << 16;
489 txcmd_a |= TX_CMD_A_FIRST_SEG_ | TX_CMD_A_LAST_SEG_;
490 txcmd_a |= MIN_PACKET_SIZE;
492 txcmd_b = MIN_PACKET_SIZE << 16 | MIN_PACKET_SIZE;
494 smsc911x_reg_write(pdata, TX_DATA_FIFO, txcmd_a);
495 smsc911x_reg_write(pdata, TX_DATA_FIFO, txcmd_b);
497 bufp = (ulong)pdata->loopback_tx_pkt & (~0x3);
498 wrsz = MIN_PACKET_SIZE + 3;
499 wrsz += (u32)((ulong)pdata->loopback_tx_pkt & 0x3);
502 smsc911x_tx_writefifo(pdata, (unsigned int *)bufp, wrsz);
504 /* Wait till transmit is done */
508 status = smsc911x_tx_get_txstatus(pdata);
509 } while ((i--) && (!status));
512 SMSC_WARNING(HW, "Failed to transmit "
513 "during loopback test");
516 if (status & TX_STS_ES_) {
517 SMSC_WARNING(HW, "Transmit encountered "
518 "errors during loopback test");
522 /* Wait till receive is done */
526 status = smsc911x_rx_get_rxstatus(pdata);
527 } while ((i--) && (!status));
531 "Failed to receive during loopback test");
534 if (status & RX_STS_ES_) {
535 SMSC_WARNING(HW, "Receive encountered "
536 "errors during loopback test");
540 pktlength = ((status & 0x3FFF0000UL) >> 16);
541 bufp = (ulong)pdata->loopback_rx_pkt;
542 rdsz = pktlength + 3;
543 rdsz += (u32)((ulong)pdata->loopback_rx_pkt & 0x3);
546 smsc911x_rx_readfifo(pdata, (unsigned int *)bufp, rdsz);
548 if (pktlength != (MIN_PACKET_SIZE + 4)) {
549 SMSC_WARNING(HW, "Unexpected packet size "
550 "during loop back test, size=%d, will retry",
555 for (j = 0; j < MIN_PACKET_SIZE; j++) {
556 if (pdata->loopback_tx_pkt[j]
557 != pdata->loopback_rx_pkt[j]) {
563 SMSC_TRACE(HW, "Successfully verified "
567 SMSC_WARNING(HW, "Data mismatch "
568 "during loop back test, will retry");
576 static int smsc911x_phy_reset(struct smsc911x_data *pdata)
578 struct phy_device *phy_dev = pdata->phy_dev;
580 unsigned int i = 100000;
583 BUG_ON(!phy_dev->bus);
585 SMSC_TRACE(HW, "Performing PHY BCR Reset");
586 smsc911x_mii_write(phy_dev->bus, phy_dev->addr, MII_BMCR, BMCR_RESET);
589 temp = smsc911x_mii_read(phy_dev->bus, phy_dev->addr,
591 } while ((i--) && (temp & BMCR_RESET));
593 if (temp & BMCR_RESET) {
594 SMSC_WARNING(HW, "PHY reset failed to complete.");
597 /* Extra delay required because the phy may not be completed with
598 * its reset when BMCR_RESET is cleared. Specs say 256 uS is
599 * enough delay but using 1ms here to be safe */
605 static int smsc911x_phy_loopbacktest(struct net_device *dev)
607 struct smsc911x_data *pdata = netdev_priv(dev);
608 struct phy_device *phy_dev = pdata->phy_dev;
613 /* Initialise tx packet using broadcast destination address */
614 memset(pdata->loopback_tx_pkt, 0xff, ETH_ALEN);
616 /* Use incrementing source address */
617 for (i = 6; i < 12; i++)
618 pdata->loopback_tx_pkt[i] = (char)i;
620 /* Set length type field */
621 pdata->loopback_tx_pkt[12] = 0x00;
622 pdata->loopback_tx_pkt[13] = 0x00;
624 for (i = 14; i < MIN_PACKET_SIZE; i++)
625 pdata->loopback_tx_pkt[i] = (char)i;
627 val = smsc911x_reg_read(pdata, HW_CFG);
628 val &= HW_CFG_TX_FIF_SZ_;
630 smsc911x_reg_write(pdata, HW_CFG, val);
632 smsc911x_reg_write(pdata, TX_CFG, TX_CFG_TX_ON_);
633 smsc911x_reg_write(pdata, RX_CFG,
634 (u32)((ulong)pdata->loopback_rx_pkt & 0x03) << 8);
636 for (i = 0; i < 10; i++) {
637 /* Set PHY to 10/FD, no ANEG, and loopback mode */
638 smsc911x_mii_write(phy_dev->bus, phy_dev->addr, MII_BMCR,
639 BMCR_LOOPBACK | BMCR_FULLDPLX);
641 /* Enable MAC tx/rx, FD */
642 spin_lock_irqsave(&pdata->mac_lock, flags);
643 smsc911x_mac_write(pdata, MAC_CR, MAC_CR_FDPX_
644 | MAC_CR_TXEN_ | MAC_CR_RXEN_);
645 spin_unlock_irqrestore(&pdata->mac_lock, flags);
647 if (smsc911x_phy_check_loopbackpkt(pdata) == 0) {
654 spin_lock_irqsave(&pdata->mac_lock, flags);
655 smsc911x_mac_write(pdata, MAC_CR, 0);
656 spin_unlock_irqrestore(&pdata->mac_lock, flags);
658 smsc911x_phy_reset(pdata);
662 spin_lock_irqsave(&pdata->mac_lock, flags);
663 smsc911x_mac_write(pdata, MAC_CR, 0);
664 spin_unlock_irqrestore(&pdata->mac_lock, flags);
666 /* Cancel PHY loopback mode */
667 smsc911x_mii_write(phy_dev->bus, phy_dev->addr, MII_BMCR, 0);
669 smsc911x_reg_write(pdata, TX_CFG, 0);
670 smsc911x_reg_write(pdata, RX_CFG, 0);
674 #endif /* USE_PHY_WORK_AROUND */
676 static void smsc911x_phy_update_flowcontrol(struct smsc911x_data *pdata)
678 struct phy_device *phy_dev = pdata->phy_dev;
679 u32 afc = smsc911x_reg_read(pdata, AFC_CFG);
683 if (phy_dev->duplex == DUPLEX_FULL) {
684 u16 lcladv = phy_read(phy_dev, MII_ADVERTISE);
685 u16 rmtadv = phy_read(phy_dev, MII_LPA);
686 u8 cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv);
688 if (cap & FLOW_CTRL_RX)
693 if (cap & FLOW_CTRL_TX)
698 SMSC_TRACE(HW, "rx pause %s, tx pause %s",
699 (cap & FLOW_CTRL_RX ? "enabled" : "disabled"),
700 (cap & FLOW_CTRL_TX ? "enabled" : "disabled"));
702 SMSC_TRACE(HW, "half duplex");
707 spin_lock_irqsave(&pdata->mac_lock, flags);
708 smsc911x_mac_write(pdata, FLOW, flow);
709 spin_unlock_irqrestore(&pdata->mac_lock, flags);
711 smsc911x_reg_write(pdata, AFC_CFG, afc);
714 /* Update link mode if anything has changed. Called periodically when the
715 * PHY is in polling mode, even if nothing has changed. */
716 static void smsc911x_phy_adjust_link(struct net_device *dev)
718 struct smsc911x_data *pdata = netdev_priv(dev);
719 struct phy_device *phy_dev = pdata->phy_dev;
723 if (phy_dev->duplex != pdata->last_duplex) {
725 SMSC_TRACE(HW, "duplex state has changed");
727 spin_lock_irqsave(&pdata->mac_lock, flags);
728 mac_cr = smsc911x_mac_read(pdata, MAC_CR);
729 if (phy_dev->duplex) {
731 "configuring for full duplex mode");
732 mac_cr |= MAC_CR_FDPX_;
735 "configuring for half duplex mode");
736 mac_cr &= ~MAC_CR_FDPX_;
738 smsc911x_mac_write(pdata, MAC_CR, mac_cr);
739 spin_unlock_irqrestore(&pdata->mac_lock, flags);
741 smsc911x_phy_update_flowcontrol(pdata);
742 pdata->last_duplex = phy_dev->duplex;
745 carrier = netif_carrier_ok(dev);
746 if (carrier != pdata->last_carrier) {
747 SMSC_TRACE(HW, "carrier state has changed");
749 SMSC_TRACE(HW, "configuring for carrier OK");
750 if ((pdata->gpio_orig_setting & GPIO_CFG_LED1_EN_) &&
751 (!pdata->using_extphy)) {
752 /* Restore original GPIO configuration */
753 pdata->gpio_setting = pdata->gpio_orig_setting;
754 smsc911x_reg_write(pdata, GPIO_CFG,
755 pdata->gpio_setting);
758 SMSC_TRACE(HW, "configuring for no carrier");
759 /* Check global setting that LED1
760 * usage is 10/100 indicator */
761 pdata->gpio_setting = smsc911x_reg_read(pdata,
763 if ((pdata->gpio_setting & GPIO_CFG_LED1_EN_) &&
764 (!pdata->using_extphy)) {
765 /* Force 10/100 LED off, after saving
766 * original GPIO configuration */
767 pdata->gpio_orig_setting = pdata->gpio_setting;
769 pdata->gpio_setting &= ~GPIO_CFG_LED1_EN_;
770 pdata->gpio_setting |= (GPIO_CFG_GPIOBUF0_
773 smsc911x_reg_write(pdata, GPIO_CFG,
774 pdata->gpio_setting);
777 pdata->last_carrier = carrier;
781 static int smsc911x_mii_probe(struct net_device *dev)
783 struct smsc911x_data *pdata = netdev_priv(dev);
784 struct phy_device *phydev = NULL;
787 /* find the first phy */
788 phydev = phy_find_first(pdata->mii_bus);
790 pr_err("%s: no PHY found\n", dev->name);
794 SMSC_TRACE(PROBE, "PHY %d: addr %d, phy_id 0x%08X",
795 phy_addr, phydev->addr, phydev->phy_id);
797 ret = phy_connect_direct(dev, phydev,
798 &smsc911x_phy_adjust_link, 0,
799 pdata->config.phy_interface);
802 pr_err("%s: Could not attach to PHY\n", dev->name);
806 pr_info("%s: attached PHY driver [%s] (mii_bus:phy_addr=%s, irq=%d)\n",
807 dev->name, phydev->drv->name,
808 dev_name(&phydev->dev), phydev->irq);
810 /* mask with MAC supported features */
811 phydev->supported &= (PHY_BASIC_FEATURES | SUPPORTED_Pause |
812 SUPPORTED_Asym_Pause);
813 phydev->advertising = phydev->supported;
815 pdata->phy_dev = phydev;
816 pdata->last_duplex = -1;
817 pdata->last_carrier = -1;
819 #ifdef USE_PHY_WORK_AROUND
820 if (smsc911x_phy_loopbacktest(dev) < 0) {
821 SMSC_WARNING(HW, "Failed Loop Back Test");
824 SMSC_TRACE(HW, "Passed Loop Back Test");
825 #endif /* USE_PHY_WORK_AROUND */
827 SMSC_TRACE(HW, "phy initialised successfully");
831 static int __devinit smsc911x_mii_init(struct platform_device *pdev,
832 struct net_device *dev)
834 struct smsc911x_data *pdata = netdev_priv(dev);
837 pdata->mii_bus = mdiobus_alloc();
838 if (!pdata->mii_bus) {
843 pdata->mii_bus->name = SMSC_MDIONAME;
844 snprintf(pdata->mii_bus->id, MII_BUS_ID_SIZE, "%x", pdev->id);
845 pdata->mii_bus->priv = pdata;
846 pdata->mii_bus->read = smsc911x_mii_read;
847 pdata->mii_bus->write = smsc911x_mii_write;
848 pdata->mii_bus->irq = pdata->phy_irq;
849 for (i = 0; i < PHY_MAX_ADDR; ++i)
850 pdata->mii_bus->irq[i] = PHY_POLL;
852 pdata->mii_bus->parent = &pdev->dev;
854 switch (pdata->idrev & 0xFFFF0000) {
859 /* External PHY supported, try to autodetect */
860 smsc911x_phy_initialise_external(pdata);
863 SMSC_TRACE(HW, "External PHY is not supported, "
864 "using internal PHY");
865 pdata->using_extphy = 0;
869 if (!pdata->using_extphy) {
870 /* Mask all PHYs except ID 1 (internal) */
871 pdata->mii_bus->phy_mask = ~(1 << 1);
874 if (mdiobus_register(pdata->mii_bus)) {
875 SMSC_WARNING(PROBE, "Error registering mii bus");
876 goto err_out_free_bus_2;
879 if (smsc911x_mii_probe(dev) < 0) {
880 SMSC_WARNING(PROBE, "Error registering mii bus");
881 goto err_out_unregister_bus_3;
886 err_out_unregister_bus_3:
887 mdiobus_unregister(pdata->mii_bus);
889 mdiobus_free(pdata->mii_bus);
894 /* Gets the number of tx statuses in the fifo */
895 static unsigned int smsc911x_tx_get_txstatcount(struct smsc911x_data *pdata)
897 return (smsc911x_reg_read(pdata, TX_FIFO_INF)
898 & TX_FIFO_INF_TSUSED_) >> 16;
901 /* Reads tx statuses and increments counters where necessary */
902 static void smsc911x_tx_update_txcounters(struct net_device *dev)
904 struct smsc911x_data *pdata = netdev_priv(dev);
905 unsigned int tx_stat;
907 while ((tx_stat = smsc911x_tx_get_txstatus(pdata)) != 0) {
908 if (unlikely(tx_stat & 0x80000000)) {
909 /* In this driver the packet tag is used as the packet
910 * length. Since a packet length can never reach the
911 * size of 0x8000, this bit is reserved. It is worth
912 * noting that the "reserved bit" in the warning above
913 * does not reference a hardware defined reserved bit
914 * but rather a driver defined one.
917 "Packet tag reserved bit is high");
919 if (unlikely(tx_stat & TX_STS_ES_)) {
920 dev->stats.tx_errors++;
922 dev->stats.tx_packets++;
923 dev->stats.tx_bytes += (tx_stat >> 16);
925 if (unlikely(tx_stat & TX_STS_EXCESS_COL_)) {
926 dev->stats.collisions += 16;
927 dev->stats.tx_aborted_errors += 1;
929 dev->stats.collisions +=
930 ((tx_stat >> 3) & 0xF);
932 if (unlikely(tx_stat & TX_STS_LOST_CARRIER_))
933 dev->stats.tx_carrier_errors += 1;
934 if (unlikely(tx_stat & TX_STS_LATE_COL_)) {
935 dev->stats.collisions++;
936 dev->stats.tx_aborted_errors++;
942 /* Increments the Rx error counters */
944 smsc911x_rx_counterrors(struct net_device *dev, unsigned int rxstat)
948 if (unlikely(rxstat & RX_STS_ES_)) {
949 dev->stats.rx_errors++;
950 if (unlikely(rxstat & RX_STS_CRC_ERR_)) {
951 dev->stats.rx_crc_errors++;
955 if (likely(!crc_err)) {
956 if (unlikely((rxstat & RX_STS_FRAME_TYPE_) &&
957 (rxstat & RX_STS_LENGTH_ERR_)))
958 dev->stats.rx_length_errors++;
959 if (rxstat & RX_STS_MCAST_)
960 dev->stats.multicast++;
964 /* Quickly dumps bad packets */
966 smsc911x_rx_fastforward(struct smsc911x_data *pdata, unsigned int pktbytes)
968 unsigned int pktwords = (pktbytes + NET_IP_ALIGN + 3) >> 2;
970 if (likely(pktwords >= 4)) {
971 unsigned int timeout = 500;
973 smsc911x_reg_write(pdata, RX_DP_CTRL, RX_DP_CTRL_RX_FFWD_);
976 val = smsc911x_reg_read(pdata, RX_DP_CTRL);
977 } while ((val & RX_DP_CTRL_RX_FFWD_) && --timeout);
979 if (unlikely(timeout == 0))
980 SMSC_WARNING(HW, "Timed out waiting for "
981 "RX FFWD to finish, RX_DP_CTRL: 0x%08X", val);
985 temp = smsc911x_reg_read(pdata, RX_DATA_FIFO);
989 /* NAPI poll function */
990 static int smsc911x_poll(struct napi_struct *napi, int budget)
992 struct smsc911x_data *pdata =
993 container_of(napi, struct smsc911x_data, napi);
994 struct net_device *dev = pdata->dev;
997 while (npackets < budget) {
998 unsigned int pktlength;
999 unsigned int pktwords;
1000 struct sk_buff *skb;
1001 unsigned int rxstat = smsc911x_rx_get_rxstatus(pdata);
1005 /* We processed all packets available. Tell NAPI it can
1006 * stop polling then re-enable rx interrupts */
1007 smsc911x_reg_write(pdata, INT_STS, INT_STS_RSFL_);
1008 napi_complete(napi);
1009 temp = smsc911x_reg_read(pdata, INT_EN);
1010 temp |= INT_EN_RSFL_EN_;
1011 smsc911x_reg_write(pdata, INT_EN, temp);
1015 /* Count packet for NAPI scheduling, even if it has an error.
1016 * Error packets still require cycles to discard */
1019 pktlength = ((rxstat & 0x3FFF0000) >> 16);
1020 pktwords = (pktlength + NET_IP_ALIGN + 3) >> 2;
1021 smsc911x_rx_counterrors(dev, rxstat);
1023 if (unlikely(rxstat & RX_STS_ES_)) {
1024 SMSC_WARNING(RX_ERR,
1025 "Discarding packet with error bit set");
1026 /* Packet has an error, discard it and continue with
1028 smsc911x_rx_fastforward(pdata, pktwords);
1029 dev->stats.rx_dropped++;
1033 skb = netdev_alloc_skb(dev, pktlength + NET_IP_ALIGN);
1034 if (unlikely(!skb)) {
1035 SMSC_WARNING(RX_ERR,
1036 "Unable to allocate skb for rx packet");
1037 /* Drop the packet and stop this polling iteration */
1038 smsc911x_rx_fastforward(pdata, pktwords);
1039 dev->stats.rx_dropped++;
1043 skb->data = skb->head;
1044 skb_reset_tail_pointer(skb);
1046 /* Align IP on 16B boundary */
1047 skb_reserve(skb, NET_IP_ALIGN);
1048 skb_put(skb, pktlength - 4);
1049 smsc911x_rx_readfifo(pdata, (unsigned int *)skb->head,
1051 skb->protocol = eth_type_trans(skb, dev);
1052 skb->ip_summed = CHECKSUM_NONE;
1053 netif_receive_skb(skb);
1055 /* Update counters */
1056 dev->stats.rx_packets++;
1057 dev->stats.rx_bytes += (pktlength - 4);
1060 /* Return total received packets */
1064 /* Returns hash bit number for given MAC address
1066 * 01 00 5E 00 00 01 -> returns bit number 31 */
1067 static unsigned int smsc911x_hash(char addr[ETH_ALEN])
1069 return (ether_crc(ETH_ALEN, addr) >> 26) & 0x3f;
1072 static void smsc911x_rx_multicast_update(struct smsc911x_data *pdata)
1074 /* Performs the multicast & mac_cr update. This is called when
1075 * safe on the current hardware, and with the mac_lock held */
1076 unsigned int mac_cr;
1078 SMSC_ASSERT_MAC_LOCK(pdata);
1080 mac_cr = smsc911x_mac_read(pdata, MAC_CR);
1081 mac_cr |= pdata->set_bits_mask;
1082 mac_cr &= ~(pdata->clear_bits_mask);
1083 smsc911x_mac_write(pdata, MAC_CR, mac_cr);
1084 smsc911x_mac_write(pdata, HASHH, pdata->hashhi);
1085 smsc911x_mac_write(pdata, HASHL, pdata->hashlo);
1086 SMSC_TRACE(HW, "maccr 0x%08X, HASHH 0x%08X, HASHL 0x%08X",
1087 mac_cr, pdata->hashhi, pdata->hashlo);
1090 static void smsc911x_rx_multicast_update_workaround(struct smsc911x_data *pdata)
1092 unsigned int mac_cr;
1094 /* This function is only called for older LAN911x devices
1095 * (revA or revB), where MAC_CR, HASHH and HASHL should not
1096 * be modified during Rx - newer devices immediately update the
1099 * This is called from interrupt context */
1101 spin_lock(&pdata->mac_lock);
1103 /* Check Rx has stopped */
1104 if (smsc911x_mac_read(pdata, MAC_CR) & MAC_CR_RXEN_)
1105 SMSC_WARNING(DRV, "Rx not stopped");
1107 /* Perform the update - safe to do now Rx has stopped */
1108 smsc911x_rx_multicast_update(pdata);
1111 mac_cr = smsc911x_mac_read(pdata, MAC_CR);
1112 mac_cr |= MAC_CR_RXEN_;
1113 smsc911x_mac_write(pdata, MAC_CR, mac_cr);
1115 pdata->multicast_update_pending = 0;
1117 spin_unlock(&pdata->mac_lock);
1120 static int smsc911x_soft_reset(struct smsc911x_data *pdata)
1122 unsigned int timeout;
1125 /* Reset the LAN911x */
1126 smsc911x_reg_write(pdata, HW_CFG, HW_CFG_SRST_);
1130 temp = smsc911x_reg_read(pdata, HW_CFG);
1131 } while ((--timeout) && (temp & HW_CFG_SRST_));
1133 if (unlikely(temp & HW_CFG_SRST_)) {
1134 SMSC_WARNING(DRV, "Failed to complete reset");
1140 /* Sets the device MAC address to dev_addr, called with mac_lock held */
1142 smsc911x_set_hw_mac_address(struct smsc911x_data *pdata, u8 dev_addr[6])
1144 u32 mac_high16 = (dev_addr[5] << 8) | dev_addr[4];
1145 u32 mac_low32 = (dev_addr[3] << 24) | (dev_addr[2] << 16) |
1146 (dev_addr[1] << 8) | dev_addr[0];
1148 SMSC_ASSERT_MAC_LOCK(pdata);
1150 smsc911x_mac_write(pdata, ADDRH, mac_high16);
1151 smsc911x_mac_write(pdata, ADDRL, mac_low32);
1154 static int smsc911x_open(struct net_device *dev)
1156 struct smsc911x_data *pdata = netdev_priv(dev);
1157 unsigned int timeout;
1159 unsigned int intcfg;
1161 /* if the phy is not yet registered, retry later*/
1162 if (!pdata->phy_dev) {
1163 SMSC_WARNING(HW, "phy_dev is NULL");
1167 if (!is_valid_ether_addr(dev->dev_addr)) {
1168 SMSC_WARNING(HW, "dev_addr is not a valid MAC address");
1169 return -EADDRNOTAVAIL;
1172 /* Reset the LAN911x */
1173 if (smsc911x_soft_reset(pdata)) {
1174 SMSC_WARNING(HW, "soft reset failed");
1178 smsc911x_reg_write(pdata, HW_CFG, 0x00050000);
1179 smsc911x_reg_write(pdata, AFC_CFG, 0x006E3740);
1181 /* Make sure EEPROM has finished loading before setting GPIO_CFG */
1183 while ((smsc911x_reg_read(pdata, E2P_CMD) & E2P_CMD_EPC_BUSY_) &&
1188 if (unlikely(timeout == 0))
1190 "Timed out waiting for EEPROM busy bit to clear");
1192 smsc911x_reg_write(pdata, GPIO_CFG, 0x70070000);
1194 /* The soft reset above cleared the device's MAC address,
1195 * restore it from local copy (set in probe) */
1196 spin_lock_irq(&pdata->mac_lock);
1197 smsc911x_set_hw_mac_address(pdata, dev->dev_addr);
1198 spin_unlock_irq(&pdata->mac_lock);
1200 /* Initialise irqs, but leave all sources disabled */
1201 smsc911x_reg_write(pdata, INT_EN, 0);
1202 smsc911x_reg_write(pdata, INT_STS, 0xFFFFFFFF);
1204 /* Set interrupt deassertion to 100uS */
1205 intcfg = ((10 << 24) | INT_CFG_IRQ_EN_);
1207 if (pdata->config.irq_polarity) {
1208 SMSC_TRACE(IFUP, "irq polarity: active high");
1209 intcfg |= INT_CFG_IRQ_POL_;
1211 SMSC_TRACE(IFUP, "irq polarity: active low");
1214 if (pdata->config.irq_type) {
1215 SMSC_TRACE(IFUP, "irq type: push-pull");
1216 intcfg |= INT_CFG_IRQ_TYPE_;
1218 SMSC_TRACE(IFUP, "irq type: open drain");
1221 smsc911x_reg_write(pdata, INT_CFG, intcfg);
1223 SMSC_TRACE(IFUP, "Testing irq handler using IRQ %d", dev->irq);
1224 pdata->software_irq_signal = 0;
1227 temp = smsc911x_reg_read(pdata, INT_EN);
1228 temp |= INT_EN_SW_INT_EN_;
1229 smsc911x_reg_write(pdata, INT_EN, temp);
1233 if (pdata->software_irq_signal)
1238 if (!pdata->software_irq_signal) {
1239 dev_warn(&dev->dev, "ISR failed signaling test (IRQ %d)\n",
1243 SMSC_TRACE(IFUP, "IRQ handler passed test using IRQ %d", dev->irq);
1245 dev_info(&dev->dev, "SMSC911x/921x identified at %#08lx, IRQ: %d\n",
1246 (unsigned long)pdata->ioaddr, dev->irq);
1248 /* Reset the last known duplex and carrier */
1249 pdata->last_duplex = -1;
1250 pdata->last_carrier = -1;
1252 /* Bring the PHY up */
1253 phy_start(pdata->phy_dev);
1255 temp = smsc911x_reg_read(pdata, HW_CFG);
1256 /* Preserve TX FIFO size and external PHY configuration */
1257 temp &= (HW_CFG_TX_FIF_SZ_|0x00000FFF);
1259 smsc911x_reg_write(pdata, HW_CFG, temp);
1261 temp = smsc911x_reg_read(pdata, FIFO_INT);
1262 temp |= FIFO_INT_TX_AVAIL_LEVEL_;
1263 temp &= ~(FIFO_INT_RX_STS_LEVEL_);
1264 smsc911x_reg_write(pdata, FIFO_INT, temp);
1266 /* set RX Data offset to 2 bytes for alignment */
1267 smsc911x_reg_write(pdata, RX_CFG, (2 << 8));
1269 /* enable NAPI polling before enabling RX interrupts */
1270 napi_enable(&pdata->napi);
1272 temp = smsc911x_reg_read(pdata, INT_EN);
1273 temp |= (INT_EN_TDFA_EN_ | INT_EN_RSFL_EN_ | INT_EN_RXSTOP_INT_EN_);
1274 smsc911x_reg_write(pdata, INT_EN, temp);
1276 spin_lock_irq(&pdata->mac_lock);
1277 temp = smsc911x_mac_read(pdata, MAC_CR);
1278 temp |= (MAC_CR_TXEN_ | MAC_CR_RXEN_ | MAC_CR_HBDIS_);
1279 smsc911x_mac_write(pdata, MAC_CR, temp);
1280 spin_unlock_irq(&pdata->mac_lock);
1282 smsc911x_reg_write(pdata, TX_CFG, TX_CFG_TX_ON_);
1284 netif_start_queue(dev);
1288 /* Entry point for stopping the interface */
1289 static int smsc911x_stop(struct net_device *dev)
1291 struct smsc911x_data *pdata = netdev_priv(dev);
1294 /* Disable all device interrupts */
1295 temp = smsc911x_reg_read(pdata, INT_CFG);
1296 temp &= ~INT_CFG_IRQ_EN_;
1297 smsc911x_reg_write(pdata, INT_CFG, temp);
1299 /* Stop Tx and Rx polling */
1300 netif_stop_queue(dev);
1301 napi_disable(&pdata->napi);
1303 /* At this point all Rx and Tx activity is stopped */
1304 dev->stats.rx_dropped += smsc911x_reg_read(pdata, RX_DROP);
1305 smsc911x_tx_update_txcounters(dev);
1307 /* Bring the PHY down */
1309 phy_stop(pdata->phy_dev);
1311 SMSC_TRACE(IFDOWN, "Interface stopped");
1315 /* Entry point for transmitting a packet */
1316 static int smsc911x_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
1318 struct smsc911x_data *pdata = netdev_priv(dev);
1319 unsigned int freespace;
1320 unsigned int tx_cmd_a;
1321 unsigned int tx_cmd_b;
1326 freespace = smsc911x_reg_read(pdata, TX_FIFO_INF) & TX_FIFO_INF_TDFREE_;
1328 if (unlikely(freespace < TX_FIFO_LOW_THRESHOLD))
1329 SMSC_WARNING(TX_ERR,
1330 "Tx data fifo low, space available: %d", freespace);
1332 /* Word alignment adjustment */
1333 tx_cmd_a = (u32)((ulong)skb->data & 0x03) << 16;
1334 tx_cmd_a |= TX_CMD_A_FIRST_SEG_ | TX_CMD_A_LAST_SEG_;
1335 tx_cmd_a |= (unsigned int)skb->len;
1337 tx_cmd_b = ((unsigned int)skb->len) << 16;
1338 tx_cmd_b |= (unsigned int)skb->len;
1340 smsc911x_reg_write(pdata, TX_DATA_FIFO, tx_cmd_a);
1341 smsc911x_reg_write(pdata, TX_DATA_FIFO, tx_cmd_b);
1343 bufp = (ulong)skb->data & (~0x3);
1344 wrsz = (u32)skb->len + 3;
1345 wrsz += (u32)((ulong)skb->data & 0x3);
1348 smsc911x_tx_writefifo(pdata, (unsigned int *)bufp, wrsz);
1349 freespace -= (skb->len + 32);
1352 if (unlikely(smsc911x_tx_get_txstatcount(pdata) >= 30))
1353 smsc911x_tx_update_txcounters(dev);
1355 if (freespace < TX_FIFO_LOW_THRESHOLD) {
1356 netif_stop_queue(dev);
1357 temp = smsc911x_reg_read(pdata, FIFO_INT);
1360 smsc911x_reg_write(pdata, FIFO_INT, temp);
1363 return NETDEV_TX_OK;
1366 /* Entry point for getting status counters */
1367 static struct net_device_stats *smsc911x_get_stats(struct net_device *dev)
1369 struct smsc911x_data *pdata = netdev_priv(dev);
1370 smsc911x_tx_update_txcounters(dev);
1371 dev->stats.rx_dropped += smsc911x_reg_read(pdata, RX_DROP);
1375 /* Entry point for setting addressing modes */
1376 static void smsc911x_set_multicast_list(struct net_device *dev)
1378 struct smsc911x_data *pdata = netdev_priv(dev);
1379 unsigned long flags;
1381 if (dev->flags & IFF_PROMISC) {
1382 /* Enabling promiscuous mode */
1383 pdata->set_bits_mask = MAC_CR_PRMS_;
1384 pdata->clear_bits_mask = (MAC_CR_MCPAS_ | MAC_CR_HPFILT_);
1387 } else if (dev->flags & IFF_ALLMULTI) {
1388 /* Enabling all multicast mode */
1389 pdata->set_bits_mask = MAC_CR_MCPAS_;
1390 pdata->clear_bits_mask = (MAC_CR_PRMS_ | MAC_CR_HPFILT_);
1393 } else if (!netdev_mc_empty(dev)) {
1394 /* Enabling specific multicast addresses */
1395 unsigned int hash_high = 0;
1396 unsigned int hash_low = 0;
1397 struct netdev_hw_addr *ha;
1399 pdata->set_bits_mask = MAC_CR_HPFILT_;
1400 pdata->clear_bits_mask = (MAC_CR_PRMS_ | MAC_CR_MCPAS_);
1402 netdev_for_each_mc_addr(ha, dev) {
1403 unsigned int bitnum = smsc911x_hash(ha->addr);
1404 unsigned int mask = 0x01 << (bitnum & 0x1F);
1412 pdata->hashhi = hash_high;
1413 pdata->hashlo = hash_low;
1415 /* Enabling local MAC address only */
1416 pdata->set_bits_mask = 0;
1417 pdata->clear_bits_mask =
1418 (MAC_CR_PRMS_ | MAC_CR_MCPAS_ | MAC_CR_HPFILT_);
1423 spin_lock_irqsave(&pdata->mac_lock, flags);
1425 if (pdata->generation <= 1) {
1426 /* Older hardware revision - cannot change these flags while
1428 if (!pdata->multicast_update_pending) {
1430 SMSC_TRACE(HW, "scheduling mcast update");
1431 pdata->multicast_update_pending = 1;
1433 /* Request the hardware to stop, then perform the
1434 * update when we get an RX_STOP interrupt */
1435 temp = smsc911x_mac_read(pdata, MAC_CR);
1436 temp &= ~(MAC_CR_RXEN_);
1437 smsc911x_mac_write(pdata, MAC_CR, temp);
1439 /* There is another update pending, this should now
1440 * use the newer values */
1443 /* Newer hardware revision - can write immediately */
1444 smsc911x_rx_multicast_update(pdata);
1447 spin_unlock_irqrestore(&pdata->mac_lock, flags);
1450 static irqreturn_t smsc911x_irqhandler(int irq, void *dev_id)
1452 struct net_device *dev = dev_id;
1453 struct smsc911x_data *pdata = netdev_priv(dev);
1454 u32 intsts = smsc911x_reg_read(pdata, INT_STS);
1455 u32 inten = smsc911x_reg_read(pdata, INT_EN);
1456 int serviced = IRQ_NONE;
1459 if (unlikely(intsts & inten & INT_STS_SW_INT_)) {
1460 temp = smsc911x_reg_read(pdata, INT_EN);
1461 temp &= (~INT_EN_SW_INT_EN_);
1462 smsc911x_reg_write(pdata, INT_EN, temp);
1463 smsc911x_reg_write(pdata, INT_STS, INT_STS_SW_INT_);
1464 pdata->software_irq_signal = 1;
1466 serviced = IRQ_HANDLED;
1469 if (unlikely(intsts & inten & INT_STS_RXSTOP_INT_)) {
1470 /* Called when there is a multicast update scheduled and
1471 * it is now safe to complete the update */
1472 SMSC_TRACE(INTR, "RX Stop interrupt");
1473 smsc911x_reg_write(pdata, INT_STS, INT_STS_RXSTOP_INT_);
1474 if (pdata->multicast_update_pending)
1475 smsc911x_rx_multicast_update_workaround(pdata);
1476 serviced = IRQ_HANDLED;
1479 if (intsts & inten & INT_STS_TDFA_) {
1480 temp = smsc911x_reg_read(pdata, FIFO_INT);
1481 temp |= FIFO_INT_TX_AVAIL_LEVEL_;
1482 smsc911x_reg_write(pdata, FIFO_INT, temp);
1483 smsc911x_reg_write(pdata, INT_STS, INT_STS_TDFA_);
1484 netif_wake_queue(dev);
1485 serviced = IRQ_HANDLED;
1488 if (unlikely(intsts & inten & INT_STS_RXE_)) {
1489 SMSC_TRACE(INTR, "RX Error interrupt");
1490 smsc911x_reg_write(pdata, INT_STS, INT_STS_RXE_);
1491 serviced = IRQ_HANDLED;
1494 if (likely(intsts & inten & INT_STS_RSFL_)) {
1495 if (likely(napi_schedule_prep(&pdata->napi))) {
1496 /* Disable Rx interrupts */
1497 temp = smsc911x_reg_read(pdata, INT_EN);
1498 temp &= (~INT_EN_RSFL_EN_);
1499 smsc911x_reg_write(pdata, INT_EN, temp);
1500 /* Schedule a NAPI poll */
1501 __napi_schedule(&pdata->napi);
1503 SMSC_WARNING(RX_ERR,
1504 "napi_schedule_prep failed");
1506 serviced = IRQ_HANDLED;
1512 #ifdef CONFIG_NET_POLL_CONTROLLER
1513 static void smsc911x_poll_controller(struct net_device *dev)
1515 disable_irq(dev->irq);
1516 smsc911x_irqhandler(0, dev);
1517 enable_irq(dev->irq);
1519 #endif /* CONFIG_NET_POLL_CONTROLLER */
1521 static int smsc911x_set_mac_address(struct net_device *dev, void *p)
1523 struct smsc911x_data *pdata = netdev_priv(dev);
1524 struct sockaddr *addr = p;
1526 /* On older hardware revisions we cannot change the mac address
1527 * registers while receiving data. Newer devices can safely change
1528 * this at any time. */
1529 if (pdata->generation <= 1 && netif_running(dev))
1532 if (!is_valid_ether_addr(addr->sa_data))
1533 return -EADDRNOTAVAIL;
1535 memcpy(dev->dev_addr, addr->sa_data, ETH_ALEN);
1537 spin_lock_irq(&pdata->mac_lock);
1538 smsc911x_set_hw_mac_address(pdata, dev->dev_addr);
1539 spin_unlock_irq(&pdata->mac_lock);
1541 dev_info(&dev->dev, "MAC Address: %pM\n", dev->dev_addr);
1546 /* Standard ioctls for mii-tool */
1547 static int smsc911x_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
1549 struct smsc911x_data *pdata = netdev_priv(dev);
1551 if (!netif_running(dev) || !pdata->phy_dev)
1554 return phy_mii_ioctl(pdata->phy_dev, ifr, cmd);
1558 smsc911x_ethtool_getsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1560 struct smsc911x_data *pdata = netdev_priv(dev);
1564 return phy_ethtool_gset(pdata->phy_dev, cmd);
1568 smsc911x_ethtool_setsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1570 struct smsc911x_data *pdata = netdev_priv(dev);
1572 return phy_ethtool_sset(pdata->phy_dev, cmd);
1575 static void smsc911x_ethtool_getdrvinfo(struct net_device *dev,
1576 struct ethtool_drvinfo *info)
1578 strlcpy(info->driver, SMSC_CHIPNAME, sizeof(info->driver));
1579 strlcpy(info->version, SMSC_DRV_VERSION, sizeof(info->version));
1580 strlcpy(info->bus_info, dev_name(dev->dev.parent),
1581 sizeof(info->bus_info));
1584 static int smsc911x_ethtool_nwayreset(struct net_device *dev)
1586 struct smsc911x_data *pdata = netdev_priv(dev);
1588 return phy_start_aneg(pdata->phy_dev);
1591 static u32 smsc911x_ethtool_getmsglevel(struct net_device *dev)
1593 struct smsc911x_data *pdata = netdev_priv(dev);
1594 return pdata->msg_enable;
1597 static void smsc911x_ethtool_setmsglevel(struct net_device *dev, u32 level)
1599 struct smsc911x_data *pdata = netdev_priv(dev);
1600 pdata->msg_enable = level;
1603 static int smsc911x_ethtool_getregslen(struct net_device *dev)
1605 return (((E2P_DATA - ID_REV) / 4 + 1) + (WUCSR - MAC_CR) + 1 + 32) *
1610 smsc911x_ethtool_getregs(struct net_device *dev, struct ethtool_regs *regs,
1613 struct smsc911x_data *pdata = netdev_priv(dev);
1614 struct phy_device *phy_dev = pdata->phy_dev;
1615 unsigned long flags;
1620 regs->version = pdata->idrev;
1621 for (i = ID_REV; i <= E2P_DATA; i += (sizeof(u32)))
1622 data[j++] = smsc911x_reg_read(pdata, i);
1624 for (i = MAC_CR; i <= WUCSR; i++) {
1625 spin_lock_irqsave(&pdata->mac_lock, flags);
1626 data[j++] = smsc911x_mac_read(pdata, i);
1627 spin_unlock_irqrestore(&pdata->mac_lock, flags);
1630 for (i = 0; i <= 31; i++)
1631 data[j++] = smsc911x_mii_read(phy_dev->bus, phy_dev->addr, i);
1634 static void smsc911x_eeprom_enable_access(struct smsc911x_data *pdata)
1636 unsigned int temp = smsc911x_reg_read(pdata, GPIO_CFG);
1637 temp &= ~GPIO_CFG_EEPR_EN_;
1638 smsc911x_reg_write(pdata, GPIO_CFG, temp);
1642 static int smsc911x_eeprom_send_cmd(struct smsc911x_data *pdata, u32 op)
1647 SMSC_TRACE(DRV, "op 0x%08x", op);
1648 if (smsc911x_reg_read(pdata, E2P_CMD) & E2P_CMD_EPC_BUSY_) {
1649 SMSC_WARNING(DRV, "Busy at start");
1653 e2cmd = op | E2P_CMD_EPC_BUSY_;
1654 smsc911x_reg_write(pdata, E2P_CMD, e2cmd);
1658 e2cmd = smsc911x_reg_read(pdata, E2P_CMD);
1659 } while ((e2cmd & E2P_CMD_EPC_BUSY_) && (--timeout));
1662 SMSC_TRACE(DRV, "TIMED OUT");
1666 if (e2cmd & E2P_CMD_EPC_TIMEOUT_) {
1667 SMSC_TRACE(DRV, "Error occured during eeprom operation");
1674 static int smsc911x_eeprom_read_location(struct smsc911x_data *pdata,
1675 u8 address, u8 *data)
1677 u32 op = E2P_CMD_EPC_CMD_READ_ | address;
1680 SMSC_TRACE(DRV, "address 0x%x", address);
1681 ret = smsc911x_eeprom_send_cmd(pdata, op);
1684 data[address] = smsc911x_reg_read(pdata, E2P_DATA);
1689 static int smsc911x_eeprom_write_location(struct smsc911x_data *pdata,
1690 u8 address, u8 data)
1692 u32 op = E2P_CMD_EPC_CMD_ERASE_ | address;
1696 SMSC_TRACE(DRV, "address 0x%x, data 0x%x", address, data);
1697 ret = smsc911x_eeprom_send_cmd(pdata, op);
1700 op = E2P_CMD_EPC_CMD_WRITE_ | address;
1701 smsc911x_reg_write(pdata, E2P_DATA, (u32)data);
1703 /* Workaround for hardware read-after-write restriction */
1704 temp = smsc911x_reg_read(pdata, BYTE_TEST);
1706 ret = smsc911x_eeprom_send_cmd(pdata, op);
1712 static int smsc911x_ethtool_get_eeprom_len(struct net_device *dev)
1714 return SMSC911X_EEPROM_SIZE;
1717 static int smsc911x_ethtool_get_eeprom(struct net_device *dev,
1718 struct ethtool_eeprom *eeprom, u8 *data)
1720 struct smsc911x_data *pdata = netdev_priv(dev);
1721 u8 eeprom_data[SMSC911X_EEPROM_SIZE];
1725 smsc911x_eeprom_enable_access(pdata);
1727 len = min(eeprom->len, SMSC911X_EEPROM_SIZE);
1728 for (i = 0; i < len; i++) {
1729 int ret = smsc911x_eeprom_read_location(pdata, i, eeprom_data);
1736 memcpy(data, &eeprom_data[eeprom->offset], len);
1741 static int smsc911x_ethtool_set_eeprom(struct net_device *dev,
1742 struct ethtool_eeprom *eeprom, u8 *data)
1745 struct smsc911x_data *pdata = netdev_priv(dev);
1747 smsc911x_eeprom_enable_access(pdata);
1748 smsc911x_eeprom_send_cmd(pdata, E2P_CMD_EPC_CMD_EWEN_);
1749 ret = smsc911x_eeprom_write_location(pdata, eeprom->offset, *data);
1750 smsc911x_eeprom_send_cmd(pdata, E2P_CMD_EPC_CMD_EWDS_);
1752 /* Single byte write, according to man page */
1758 static const struct ethtool_ops smsc911x_ethtool_ops = {
1759 .get_settings = smsc911x_ethtool_getsettings,
1760 .set_settings = smsc911x_ethtool_setsettings,
1761 .get_link = ethtool_op_get_link,
1762 .get_drvinfo = smsc911x_ethtool_getdrvinfo,
1763 .nway_reset = smsc911x_ethtool_nwayreset,
1764 .get_msglevel = smsc911x_ethtool_getmsglevel,
1765 .set_msglevel = smsc911x_ethtool_setmsglevel,
1766 .get_regs_len = smsc911x_ethtool_getregslen,
1767 .get_regs = smsc911x_ethtool_getregs,
1768 .get_eeprom_len = smsc911x_ethtool_get_eeprom_len,
1769 .get_eeprom = smsc911x_ethtool_get_eeprom,
1770 .set_eeprom = smsc911x_ethtool_set_eeprom,
1773 static const struct net_device_ops smsc911x_netdev_ops = {
1774 .ndo_open = smsc911x_open,
1775 .ndo_stop = smsc911x_stop,
1776 .ndo_start_xmit = smsc911x_hard_start_xmit,
1777 .ndo_get_stats = smsc911x_get_stats,
1778 .ndo_set_multicast_list = smsc911x_set_multicast_list,
1779 .ndo_do_ioctl = smsc911x_do_ioctl,
1780 .ndo_change_mtu = eth_change_mtu,
1781 .ndo_validate_addr = eth_validate_addr,
1782 .ndo_set_mac_address = smsc911x_set_mac_address,
1783 #ifdef CONFIG_NET_POLL_CONTROLLER
1784 .ndo_poll_controller = smsc911x_poll_controller,
1788 /* copies the current mac address from hardware to dev->dev_addr */
1789 static void __devinit smsc911x_read_mac_address(struct net_device *dev)
1791 struct smsc911x_data *pdata = netdev_priv(dev);
1792 u32 mac_high16 = smsc911x_mac_read(pdata, ADDRH);
1793 u32 mac_low32 = smsc911x_mac_read(pdata, ADDRL);
1795 dev->dev_addr[0] = (u8)(mac_low32);
1796 dev->dev_addr[1] = (u8)(mac_low32 >> 8);
1797 dev->dev_addr[2] = (u8)(mac_low32 >> 16);
1798 dev->dev_addr[3] = (u8)(mac_low32 >> 24);
1799 dev->dev_addr[4] = (u8)(mac_high16);
1800 dev->dev_addr[5] = (u8)(mac_high16 >> 8);
1803 /* Initializing private device structures, only called from probe */
1804 static int __devinit smsc911x_init(struct net_device *dev)
1806 struct smsc911x_data *pdata = netdev_priv(dev);
1807 unsigned int byte_test;
1809 SMSC_TRACE(PROBE, "Driver Parameters:");
1810 SMSC_TRACE(PROBE, "LAN base: 0x%08lX",
1811 (unsigned long)pdata->ioaddr);
1812 SMSC_TRACE(PROBE, "IRQ: %d", dev->irq);
1813 SMSC_TRACE(PROBE, "PHY will be autodetected.");
1815 spin_lock_init(&pdata->dev_lock);
1817 if (pdata->ioaddr == 0) {
1818 SMSC_WARNING(PROBE, "pdata->ioaddr: 0x00000000");
1822 /* Check byte ordering */
1823 byte_test = smsc911x_reg_read(pdata, BYTE_TEST);
1824 SMSC_TRACE(PROBE, "BYTE_TEST: 0x%08X", byte_test);
1825 if (byte_test == 0x43218765) {
1826 SMSC_TRACE(PROBE, "BYTE_TEST looks swapped, "
1827 "applying WORD_SWAP");
1828 smsc911x_reg_write(pdata, WORD_SWAP, 0xffffffff);
1830 /* 1 dummy read of BYTE_TEST is needed after a write to
1831 * WORD_SWAP before its contents are valid */
1832 byte_test = smsc911x_reg_read(pdata, BYTE_TEST);
1834 byte_test = smsc911x_reg_read(pdata, BYTE_TEST);
1837 if (byte_test != 0x87654321) {
1838 SMSC_WARNING(DRV, "BYTE_TEST: 0x%08X", byte_test);
1839 if (((byte_test >> 16) & 0xFFFF) == (byte_test & 0xFFFF)) {
1841 "top 16 bits equal to bottom 16 bits");
1842 SMSC_TRACE(PROBE, "This may mean the chip is set "
1843 "for 32 bit while the bus is reading 16 bit");
1848 /* Default generation to zero (all workarounds apply) */
1849 pdata->generation = 0;
1851 pdata->idrev = smsc911x_reg_read(pdata, ID_REV);
1852 switch (pdata->idrev & 0xFFFF0000) {
1857 /* LAN911[5678] family */
1858 pdata->generation = pdata->idrev & 0x0000FFFF;
1865 /* LAN921[5678] family */
1866 pdata->generation = 3;
1873 /* LAN9210/LAN9211/LAN9220/LAN9221 */
1874 pdata->generation = 4;
1878 SMSC_WARNING(PROBE, "LAN911x not identified, idrev: 0x%08X",
1883 SMSC_TRACE(PROBE, "LAN911x identified, idrev: 0x%08X, generation: %d",
1884 pdata->idrev, pdata->generation);
1886 if (pdata->generation == 0)
1888 "This driver is not intended for this chip revision");
1890 /* workaround for platforms without an eeprom, where the mac address
1891 * is stored elsewhere and set by the bootloader. This saves the
1892 * mac address before resetting the device */
1893 if (pdata->config.flags & SMSC911X_SAVE_MAC_ADDRESS)
1894 smsc911x_read_mac_address(dev);
1896 /* Reset the LAN911x */
1897 if (smsc911x_soft_reset(pdata))
1900 /* Disable all interrupt sources until we bring the device up */
1901 smsc911x_reg_write(pdata, INT_EN, 0);
1904 dev->flags |= IFF_MULTICAST;
1905 netif_napi_add(dev, &pdata->napi, smsc911x_poll, SMSC_NAPI_WEIGHT);
1906 dev->netdev_ops = &smsc911x_netdev_ops;
1907 dev->ethtool_ops = &smsc911x_ethtool_ops;
1912 static int __devexit smsc911x_drv_remove(struct platform_device *pdev)
1914 struct net_device *dev;
1915 struct smsc911x_data *pdata;
1916 struct resource *res;
1918 dev = platform_get_drvdata(pdev);
1920 pdata = netdev_priv(dev);
1922 BUG_ON(!pdata->ioaddr);
1923 BUG_ON(!pdata->phy_dev);
1925 SMSC_TRACE(IFDOWN, "Stopping driver.");
1927 phy_disconnect(pdata->phy_dev);
1928 pdata->phy_dev = NULL;
1929 mdiobus_unregister(pdata->mii_bus);
1930 mdiobus_free(pdata->mii_bus);
1932 platform_set_drvdata(pdev, NULL);
1933 unregister_netdev(dev);
1934 free_irq(dev->irq, dev);
1935 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
1938 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1940 release_mem_region(res->start, resource_size(res));
1942 iounmap(pdata->ioaddr);
1949 static int __devinit smsc911x_drv_probe(struct platform_device *pdev)
1951 struct net_device *dev;
1952 struct smsc911x_data *pdata;
1953 struct smsc911x_platform_config *config = pdev->dev.platform_data;
1954 struct resource *res, *irq_res;
1955 unsigned int intcfg = 0;
1956 int res_size, irq_flags;
1959 pr_info("%s: Driver version %s.\n", SMSC_CHIPNAME, SMSC_DRV_VERSION);
1961 /* platform data specifies irq & dynamic bus configuration */
1962 if (!pdev->dev.platform_data) {
1963 pr_warning("%s: platform_data not provided\n", SMSC_CHIPNAME);
1968 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
1971 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1973 pr_warning("%s: Could not allocate resource.\n",
1978 res_size = resource_size(res);
1980 irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
1982 pr_warning("%s: Could not allocate irq resource.\n",
1988 if (!request_mem_region(res->start, res_size, SMSC_CHIPNAME)) {
1993 dev = alloc_etherdev(sizeof(struct smsc911x_data));
1995 pr_warning("%s: Could not allocate device.\n", SMSC_CHIPNAME);
1997 goto out_release_io_1;
2000 SET_NETDEV_DEV(dev, &pdev->dev);
2002 pdata = netdev_priv(dev);
2004 dev->irq = irq_res->start;
2005 irq_flags = irq_res->flags & IRQF_TRIGGER_MASK;
2006 pdata->ioaddr = ioremap_nocache(res->start, res_size);
2008 /* copy config parameters across to pdata */
2009 memcpy(&pdata->config, config, sizeof(pdata->config));
2012 pdata->msg_enable = ((1 << debug) - 1);
2014 if (pdata->ioaddr == NULL) {
2016 "Error smsc911x base address invalid");
2018 goto out_free_netdev_2;
2021 retval = smsc911x_init(dev);
2023 goto out_unmap_io_3;
2025 /* configure irq polarity and type before connecting isr */
2026 if (pdata->config.irq_polarity == SMSC911X_IRQ_POLARITY_ACTIVE_HIGH)
2027 intcfg |= INT_CFG_IRQ_POL_;
2029 if (pdata->config.irq_type == SMSC911X_IRQ_TYPE_PUSH_PULL)
2030 intcfg |= INT_CFG_IRQ_TYPE_;
2032 smsc911x_reg_write(pdata, INT_CFG, intcfg);
2034 /* Ensure interrupts are globally disabled before connecting ISR */
2035 smsc911x_reg_write(pdata, INT_EN, 0);
2036 smsc911x_reg_write(pdata, INT_STS, 0xFFFFFFFF);
2038 retval = request_irq(dev->irq, smsc911x_irqhandler,
2039 irq_flags | IRQF_SHARED, dev->name, dev);
2042 "Unable to claim requested irq: %d", dev->irq);
2043 goto out_unmap_io_3;
2046 platform_set_drvdata(pdev, dev);
2048 retval = register_netdev(dev);
2051 "Error %i registering device", retval);
2052 goto out_unset_drvdata_4;
2054 SMSC_TRACE(PROBE, "Network interface: \"%s\"", dev->name);
2057 spin_lock_init(&pdata->mac_lock);
2059 retval = smsc911x_mii_init(pdev, dev);
2062 "Error %i initialising mii", retval);
2063 goto out_unregister_netdev_5;
2066 spin_lock_irq(&pdata->mac_lock);
2068 /* Check if mac address has been specified when bringing interface up */
2069 if (is_valid_ether_addr(dev->dev_addr)) {
2070 smsc911x_set_hw_mac_address(pdata, dev->dev_addr);
2071 SMSC_TRACE(PROBE, "MAC Address is specified by configuration");
2072 } else if (is_valid_ether_addr(pdata->config.mac)) {
2073 memcpy(dev->dev_addr, pdata->config.mac, 6);
2074 SMSC_TRACE(PROBE, "MAC Address specified by platform data");
2076 /* Try reading mac address from device. if EEPROM is present
2077 * it will already have been set */
2078 smsc911x_read_mac_address(dev);
2080 if (is_valid_ether_addr(dev->dev_addr)) {
2081 /* eeprom values are valid so use them */
2083 "Mac Address is read from LAN911x EEPROM");
2085 /* eeprom values are invalid, generate random MAC */
2086 random_ether_addr(dev->dev_addr);
2087 smsc911x_set_hw_mac_address(pdata, dev->dev_addr);
2089 "MAC Address is set to random_ether_addr");
2093 spin_unlock_irq(&pdata->mac_lock);
2095 dev_info(&dev->dev, "MAC Address: %pM\n", dev->dev_addr);
2099 out_unregister_netdev_5:
2100 unregister_netdev(dev);
2101 out_unset_drvdata_4:
2102 platform_set_drvdata(pdev, NULL);
2103 free_irq(dev->irq, dev);
2105 iounmap(pdata->ioaddr);
2109 release_mem_region(res->start, resource_size(res));
2115 /* This implementation assumes the devices remains powered on its VDDVARIO
2116 * pins during suspend. */
2118 /* TODO: implement freeze/thaw callbacks for hibernation.*/
2120 static int smsc911x_suspend(struct device *dev)
2122 struct net_device *ndev = dev_get_drvdata(dev);
2123 struct smsc911x_data *pdata = netdev_priv(ndev);
2125 /* enable wake on LAN, energy detection and the external PME
2127 smsc911x_reg_write(pdata, PMT_CTRL,
2128 PMT_CTRL_PM_MODE_D1_ | PMT_CTRL_WOL_EN_ |
2129 PMT_CTRL_ED_EN_ | PMT_CTRL_PME_EN_);
2134 static int smsc911x_resume(struct device *dev)
2136 struct net_device *ndev = dev_get_drvdata(dev);
2137 struct smsc911x_data *pdata = netdev_priv(ndev);
2138 unsigned int to = 100;
2140 /* Note 3.11 from the datasheet:
2141 * "When the LAN9220 is in a power saving state, a write of any
2142 * data to the BYTE_TEST register will wake-up the device."
2144 smsc911x_reg_write(pdata, BYTE_TEST, 0);
2146 /* poll the READY bit in PMT_CTRL. Any other access to the device is
2147 * forbidden while this bit isn't set. Try for 100ms and return -EIO
2149 while (!(smsc911x_reg_read(pdata, PMT_CTRL) & PMT_CTRL_READY_) && --to)
2152 return (to == 0) ? -EIO : 0;
2155 static const struct dev_pm_ops smsc911x_pm_ops = {
2156 .suspend = smsc911x_suspend,
2157 .resume = smsc911x_resume,
2160 #define SMSC911X_PM_OPS (&smsc911x_pm_ops)
2163 #define SMSC911X_PM_OPS NULL
2166 static struct platform_driver smsc911x_driver = {
2167 .probe = smsc911x_drv_probe,
2168 .remove = __devexit_p(smsc911x_drv_remove),
2170 .name = SMSC_CHIPNAME,
2171 .owner = THIS_MODULE,
2172 .pm = SMSC911X_PM_OPS,
2176 /* Entry point for loading the module */
2177 static int __init smsc911x_init_module(void)
2179 return platform_driver_register(&smsc911x_driver);
2182 /* entry point for unloading the module */
2183 static void __exit smsc911x_cleanup_module(void)
2185 platform_driver_unregister(&smsc911x_driver);
2188 module_init(smsc911x_init_module);
2189 module_exit(smsc911x_cleanup_module);