1 /***************************************************************************
3 * Copyright (C) 2004-2008 SMSC
4 * Copyright (C) 2005-2008 ARM
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
20 ***************************************************************************
21 * Rewritten, heavily based on smsc911x simple driver by SMSC.
22 * Partly uses io macros from smc91x.c by Nicolas Pitre
25 * LAN9115, LAN9116, LAN9117, LAN9118
26 * LAN9215, LAN9216, LAN9217, LAN9218
32 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
34 #include <linux/crc32.h>
35 #include <linux/delay.h>
36 #include <linux/errno.h>
37 #include <linux/etherdevice.h>
38 #include <linux/ethtool.h>
39 #include <linux/init.h>
40 #include <linux/interrupt.h>
41 #include <linux/ioport.h>
42 #include <linux/kernel.h>
43 #include <linux/module.h>
44 #include <linux/netdevice.h>
45 #include <linux/platform_device.h>
46 #include <linux/sched.h>
47 #include <linux/timer.h>
48 #include <linux/bug.h>
49 #include <linux/bitops.h>
50 #include <linux/irq.h>
52 #include <linux/swab.h>
53 #include <linux/phy.h>
54 #include <linux/smsc911x.h>
55 #include <linux/device.h>
57 #include <linux/of_device.h>
58 #include <linux/of_gpio.h>
59 #include <linux/of_net.h>
62 #define SMSC_CHIPNAME "smsc911x"
63 #define SMSC_MDIONAME "smsc911x-mdio"
64 #define SMSC_DRV_VERSION "2008-10-21"
66 MODULE_LICENSE("GPL");
67 MODULE_VERSION(SMSC_DRV_VERSION);
68 MODULE_ALIAS("platform:smsc911x");
71 static int debug = 16;
76 module_param(debug, int, 0);
77 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
82 u32 (*reg_read)(struct smsc911x_data *pdata, u32 reg);
83 void (*reg_write)(struct smsc911x_data *pdata, u32 reg, u32 val);
84 void (*rx_readfifo)(struct smsc911x_data *pdata,
85 unsigned int *buf, unsigned int wordcount);
86 void (*tx_writefifo)(struct smsc911x_data *pdata,
87 unsigned int *buf, unsigned int wordcount);
90 struct smsc911x_data {
95 /* used to decide which workarounds apply */
96 unsigned int generation;
98 /* device configuration (copied from platform_data during probe) */
99 struct smsc911x_platform_config config;
101 /* This needs to be acquired before calling any of below:
102 * smsc911x_mac_read(), smsc911x_mac_write()
106 /* spinlock to ensure register accesses are serialised */
109 struct phy_device *phy_dev;
110 struct mii_bus *mii_bus;
111 int phy_irq[PHY_MAX_ADDR];
112 unsigned int using_extphy;
117 unsigned int gpio_setting;
118 unsigned int gpio_orig_setting;
119 struct net_device *dev;
120 struct napi_struct napi;
122 unsigned int software_irq_signal;
124 #ifdef USE_PHY_WORK_AROUND
125 #define MIN_PACKET_SIZE (64)
126 char loopback_tx_pkt[MIN_PACKET_SIZE];
127 char loopback_rx_pkt[MIN_PACKET_SIZE];
128 unsigned int resetcount;
131 /* Members for Multicast filter workaround */
132 unsigned int multicast_update_pending;
133 unsigned int set_bits_mask;
134 unsigned int clear_bits_mask;
138 /* register access functions */
139 const struct smsc911x_ops *ops;
142 /* Easy access to information */
143 #define __smsc_shift(pdata, reg) ((reg) << ((pdata)->config.shift))
145 static inline u32 __smsc911x_reg_read(struct smsc911x_data *pdata, u32 reg)
147 if (pdata->config.flags & SMSC911X_USE_32BIT)
148 return readl(pdata->ioaddr + reg);
150 if (pdata->config.flags & SMSC911X_USE_16BIT)
151 return ((readw(pdata->ioaddr + reg) & 0xFFFF) |
152 ((readw(pdata->ioaddr + reg + 2) & 0xFFFF) << 16));
159 __smsc911x_reg_read_shift(struct smsc911x_data *pdata, u32 reg)
161 if (pdata->config.flags & SMSC911X_USE_32BIT)
162 return readl(pdata->ioaddr + __smsc_shift(pdata, reg));
164 if (pdata->config.flags & SMSC911X_USE_16BIT)
165 return (readw(pdata->ioaddr +
166 __smsc_shift(pdata, reg)) & 0xFFFF) |
167 ((readw(pdata->ioaddr +
168 __smsc_shift(pdata, reg + 2)) & 0xFFFF) << 16);
174 static inline u32 smsc911x_reg_read(struct smsc911x_data *pdata, u32 reg)
179 spin_lock_irqsave(&pdata->dev_lock, flags);
180 data = pdata->ops->reg_read(pdata, reg);
181 spin_unlock_irqrestore(&pdata->dev_lock, flags);
186 static inline void __smsc911x_reg_write(struct smsc911x_data *pdata, u32 reg,
189 if (pdata->config.flags & SMSC911X_USE_32BIT) {
190 writel(val, pdata->ioaddr + reg);
194 if (pdata->config.flags & SMSC911X_USE_16BIT) {
195 writew(val & 0xFFFF, pdata->ioaddr + reg);
196 writew((val >> 16) & 0xFFFF, pdata->ioaddr + reg + 2);
204 __smsc911x_reg_write_shift(struct smsc911x_data *pdata, u32 reg, u32 val)
206 if (pdata->config.flags & SMSC911X_USE_32BIT) {
207 writel(val, pdata->ioaddr + __smsc_shift(pdata, reg));
211 if (pdata->config.flags & SMSC911X_USE_16BIT) {
213 pdata->ioaddr + __smsc_shift(pdata, reg));
214 writew((val >> 16) & 0xFFFF,
215 pdata->ioaddr + __smsc_shift(pdata, reg + 2));
222 static inline void smsc911x_reg_write(struct smsc911x_data *pdata, u32 reg,
227 spin_lock_irqsave(&pdata->dev_lock, flags);
228 pdata->ops->reg_write(pdata, reg, val);
229 spin_unlock_irqrestore(&pdata->dev_lock, flags);
232 /* Writes a packet to the TX_DATA_FIFO */
234 smsc911x_tx_writefifo(struct smsc911x_data *pdata, unsigned int *buf,
235 unsigned int wordcount)
239 spin_lock_irqsave(&pdata->dev_lock, flags);
241 if (pdata->config.flags & SMSC911X_SWAP_FIFO) {
243 __smsc911x_reg_write(pdata, TX_DATA_FIFO,
248 if (pdata->config.flags & SMSC911X_USE_32BIT) {
249 writesl(pdata->ioaddr + TX_DATA_FIFO, buf, wordcount);
253 if (pdata->config.flags & SMSC911X_USE_16BIT) {
255 __smsc911x_reg_write(pdata, TX_DATA_FIFO, *buf++);
261 spin_unlock_irqrestore(&pdata->dev_lock, flags);
264 /* Writes a packet to the TX_DATA_FIFO - shifted version */
266 smsc911x_tx_writefifo_shift(struct smsc911x_data *pdata, unsigned int *buf,
267 unsigned int wordcount)
271 spin_lock_irqsave(&pdata->dev_lock, flags);
273 if (pdata->config.flags & SMSC911X_SWAP_FIFO) {
275 __smsc911x_reg_write_shift(pdata, TX_DATA_FIFO,
280 if (pdata->config.flags & SMSC911X_USE_32BIT) {
281 writesl(pdata->ioaddr + __smsc_shift(pdata,
282 TX_DATA_FIFO), buf, wordcount);
286 if (pdata->config.flags & SMSC911X_USE_16BIT) {
288 __smsc911x_reg_write_shift(pdata,
289 TX_DATA_FIFO, *buf++);
295 spin_unlock_irqrestore(&pdata->dev_lock, flags);
298 /* Reads a packet out of the RX_DATA_FIFO */
300 smsc911x_rx_readfifo(struct smsc911x_data *pdata, unsigned int *buf,
301 unsigned int wordcount)
305 spin_lock_irqsave(&pdata->dev_lock, flags);
307 if (pdata->config.flags & SMSC911X_SWAP_FIFO) {
309 *buf++ = swab32(__smsc911x_reg_read(pdata,
314 if (pdata->config.flags & SMSC911X_USE_32BIT) {
315 readsl(pdata->ioaddr + RX_DATA_FIFO, buf, wordcount);
319 if (pdata->config.flags & SMSC911X_USE_16BIT) {
321 *buf++ = __smsc911x_reg_read(pdata, RX_DATA_FIFO);
327 spin_unlock_irqrestore(&pdata->dev_lock, flags);
330 /* Reads a packet out of the RX_DATA_FIFO - shifted version */
332 smsc911x_rx_readfifo_shift(struct smsc911x_data *pdata, unsigned int *buf,
333 unsigned int wordcount)
337 spin_lock_irqsave(&pdata->dev_lock, flags);
339 if (pdata->config.flags & SMSC911X_SWAP_FIFO) {
341 *buf++ = swab32(__smsc911x_reg_read_shift(pdata,
346 if (pdata->config.flags & SMSC911X_USE_32BIT) {
347 readsl(pdata->ioaddr + __smsc_shift(pdata,
348 RX_DATA_FIFO), buf, wordcount);
352 if (pdata->config.flags & SMSC911X_USE_16BIT) {
354 *buf++ = __smsc911x_reg_read_shift(pdata,
361 spin_unlock_irqrestore(&pdata->dev_lock, flags);
364 /* waits for MAC not busy, with timeout. Only called by smsc911x_mac_read
365 * and smsc911x_mac_write, so assumes mac_lock is held */
366 static int smsc911x_mac_complete(struct smsc911x_data *pdata)
371 SMSC_ASSERT_MAC_LOCK(pdata);
373 for (i = 0; i < 40; i++) {
374 val = smsc911x_reg_read(pdata, MAC_CSR_CMD);
375 if (!(val & MAC_CSR_CMD_CSR_BUSY_))
378 SMSC_WARN(pdata, hw, "Timed out waiting for MAC not BUSY. "
379 "MAC_CSR_CMD: 0x%08X", val);
383 /* Fetches a MAC register value. Assumes mac_lock is acquired */
384 static u32 smsc911x_mac_read(struct smsc911x_data *pdata, unsigned int offset)
388 SMSC_ASSERT_MAC_LOCK(pdata);
390 temp = smsc911x_reg_read(pdata, MAC_CSR_CMD);
391 if (unlikely(temp & MAC_CSR_CMD_CSR_BUSY_)) {
392 SMSC_WARN(pdata, hw, "MAC busy at entry");
396 /* Send the MAC cmd */
397 smsc911x_reg_write(pdata, MAC_CSR_CMD, ((offset & 0xFF) |
398 MAC_CSR_CMD_CSR_BUSY_ | MAC_CSR_CMD_R_NOT_W_));
400 /* Workaround for hardware read-after-write restriction */
401 temp = smsc911x_reg_read(pdata, BYTE_TEST);
403 /* Wait for the read to complete */
404 if (likely(smsc911x_mac_complete(pdata) == 0))
405 return smsc911x_reg_read(pdata, MAC_CSR_DATA);
407 SMSC_WARN(pdata, hw, "MAC busy after read");
411 /* Set a mac register, mac_lock must be acquired before calling */
412 static void smsc911x_mac_write(struct smsc911x_data *pdata,
413 unsigned int offset, u32 val)
417 SMSC_ASSERT_MAC_LOCK(pdata);
419 temp = smsc911x_reg_read(pdata, MAC_CSR_CMD);
420 if (unlikely(temp & MAC_CSR_CMD_CSR_BUSY_)) {
422 "smsc911x_mac_write failed, MAC busy at entry");
426 /* Send data to write */
427 smsc911x_reg_write(pdata, MAC_CSR_DATA, val);
429 /* Write the actual data */
430 smsc911x_reg_write(pdata, MAC_CSR_CMD, ((offset & 0xFF) |
431 MAC_CSR_CMD_CSR_BUSY_));
433 /* Workaround for hardware read-after-write restriction */
434 temp = smsc911x_reg_read(pdata, BYTE_TEST);
436 /* Wait for the write to complete */
437 if (likely(smsc911x_mac_complete(pdata) == 0))
440 SMSC_WARN(pdata, hw, "smsc911x_mac_write failed, MAC busy after write");
443 /* Get a phy register */
444 static int smsc911x_mii_read(struct mii_bus *bus, int phyaddr, int regidx)
446 struct smsc911x_data *pdata = (struct smsc911x_data *)bus->priv;
451 spin_lock_irqsave(&pdata->mac_lock, flags);
453 /* Confirm MII not busy */
454 if (unlikely(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
455 SMSC_WARN(pdata, hw, "MII is busy in smsc911x_mii_read???");
460 /* Set the address, index & direction (read from PHY) */
461 addr = ((phyaddr & 0x1F) << 11) | ((regidx & 0x1F) << 6);
462 smsc911x_mac_write(pdata, MII_ACC, addr);
464 /* Wait for read to complete w/ timeout */
465 for (i = 0; i < 100; i++)
466 if (!(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
467 reg = smsc911x_mac_read(pdata, MII_DATA);
471 SMSC_WARN(pdata, hw, "Timed out waiting for MII read to finish");
475 spin_unlock_irqrestore(&pdata->mac_lock, flags);
479 /* Set a phy register */
480 static int smsc911x_mii_write(struct mii_bus *bus, int phyaddr, int regidx,
483 struct smsc911x_data *pdata = (struct smsc911x_data *)bus->priv;
488 spin_lock_irqsave(&pdata->mac_lock, flags);
490 /* Confirm MII not busy */
491 if (unlikely(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
492 SMSC_WARN(pdata, hw, "MII is busy in smsc911x_mii_write???");
497 /* Put the data to write in the MAC */
498 smsc911x_mac_write(pdata, MII_DATA, val);
500 /* Set the address, index & direction (write to PHY) */
501 addr = ((phyaddr & 0x1F) << 11) | ((regidx & 0x1F) << 6) |
503 smsc911x_mac_write(pdata, MII_ACC, addr);
505 /* Wait for write to complete w/ timeout */
506 for (i = 0; i < 100; i++)
507 if (!(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
512 SMSC_WARN(pdata, hw, "Timed out waiting for MII write to finish");
516 spin_unlock_irqrestore(&pdata->mac_lock, flags);
520 /* Switch to external phy. Assumes tx and rx are stopped. */
521 static void smsc911x_phy_enable_external(struct smsc911x_data *pdata)
523 unsigned int hwcfg = smsc911x_reg_read(pdata, HW_CFG);
525 /* Disable phy clocks to the MAC */
526 hwcfg &= (~HW_CFG_PHY_CLK_SEL_);
527 hwcfg |= HW_CFG_PHY_CLK_SEL_CLK_DIS_;
528 smsc911x_reg_write(pdata, HW_CFG, hwcfg);
529 udelay(10); /* Enough time for clocks to stop */
531 /* Switch to external phy */
532 hwcfg |= HW_CFG_EXT_PHY_EN_;
533 smsc911x_reg_write(pdata, HW_CFG, hwcfg);
535 /* Enable phy clocks to the MAC */
536 hwcfg &= (~HW_CFG_PHY_CLK_SEL_);
537 hwcfg |= HW_CFG_PHY_CLK_SEL_EXT_PHY_;
538 smsc911x_reg_write(pdata, HW_CFG, hwcfg);
539 udelay(10); /* Enough time for clocks to restart */
541 hwcfg |= HW_CFG_SMI_SEL_;
542 smsc911x_reg_write(pdata, HW_CFG, hwcfg);
545 /* Autodetects and enables external phy if present on supported chips.
546 * autodetection can be overridden by specifying SMSC911X_FORCE_INTERNAL_PHY
547 * or SMSC911X_FORCE_EXTERNAL_PHY in the platform_data flags. */
548 static void smsc911x_phy_initialise_external(struct smsc911x_data *pdata)
550 unsigned int hwcfg = smsc911x_reg_read(pdata, HW_CFG);
552 if (pdata->config.flags & SMSC911X_FORCE_INTERNAL_PHY) {
553 SMSC_TRACE(pdata, hw, "Forcing internal PHY");
554 pdata->using_extphy = 0;
555 } else if (pdata->config.flags & SMSC911X_FORCE_EXTERNAL_PHY) {
556 SMSC_TRACE(pdata, hw, "Forcing external PHY");
557 smsc911x_phy_enable_external(pdata);
558 pdata->using_extphy = 1;
559 } else if (hwcfg & HW_CFG_EXT_PHY_DET_) {
560 SMSC_TRACE(pdata, hw,
561 "HW_CFG EXT_PHY_DET set, using external PHY");
562 smsc911x_phy_enable_external(pdata);
563 pdata->using_extphy = 1;
565 SMSC_TRACE(pdata, hw,
566 "HW_CFG EXT_PHY_DET clear, using internal PHY");
567 pdata->using_extphy = 0;
571 /* Fetches a tx status out of the status fifo */
572 static unsigned int smsc911x_tx_get_txstatus(struct smsc911x_data *pdata)
574 unsigned int result =
575 smsc911x_reg_read(pdata, TX_FIFO_INF) & TX_FIFO_INF_TSUSED_;
578 result = smsc911x_reg_read(pdata, TX_STATUS_FIFO);
583 /* Fetches the next rx status */
584 static unsigned int smsc911x_rx_get_rxstatus(struct smsc911x_data *pdata)
586 unsigned int result =
587 smsc911x_reg_read(pdata, RX_FIFO_INF) & RX_FIFO_INF_RXSUSED_;
590 result = smsc911x_reg_read(pdata, RX_STATUS_FIFO);
595 #ifdef USE_PHY_WORK_AROUND
596 static int smsc911x_phy_check_loopbackpkt(struct smsc911x_data *pdata)
603 for (tries = 0; tries < 10; tries++) {
604 unsigned int txcmd_a;
605 unsigned int txcmd_b;
607 unsigned int pktlength;
610 /* Zero-out rx packet memory */
611 memset(pdata->loopback_rx_pkt, 0, MIN_PACKET_SIZE);
613 /* Write tx packet to 118 */
614 txcmd_a = (u32)((ulong)pdata->loopback_tx_pkt & 0x03) << 16;
615 txcmd_a |= TX_CMD_A_FIRST_SEG_ | TX_CMD_A_LAST_SEG_;
616 txcmd_a |= MIN_PACKET_SIZE;
618 txcmd_b = MIN_PACKET_SIZE << 16 | MIN_PACKET_SIZE;
620 smsc911x_reg_write(pdata, TX_DATA_FIFO, txcmd_a);
621 smsc911x_reg_write(pdata, TX_DATA_FIFO, txcmd_b);
623 bufp = (ulong)pdata->loopback_tx_pkt & (~0x3);
624 wrsz = MIN_PACKET_SIZE + 3;
625 wrsz += (u32)((ulong)pdata->loopback_tx_pkt & 0x3);
628 pdata->ops->tx_writefifo(pdata, (unsigned int *)bufp, wrsz);
630 /* Wait till transmit is done */
634 status = smsc911x_tx_get_txstatus(pdata);
635 } while ((i--) && (!status));
639 "Failed to transmit during loopback test");
642 if (status & TX_STS_ES_) {
644 "Transmit encountered errors during loopback test");
648 /* Wait till receive is done */
652 status = smsc911x_rx_get_rxstatus(pdata);
653 } while ((i--) && (!status));
657 "Failed to receive during loopback test");
660 if (status & RX_STS_ES_) {
662 "Receive encountered errors during loopback test");
666 pktlength = ((status & 0x3FFF0000UL) >> 16);
667 bufp = (ulong)pdata->loopback_rx_pkt;
668 rdsz = pktlength + 3;
669 rdsz += (u32)((ulong)pdata->loopback_rx_pkt & 0x3);
672 pdata->ops->rx_readfifo(pdata, (unsigned int *)bufp, rdsz);
674 if (pktlength != (MIN_PACKET_SIZE + 4)) {
675 SMSC_WARN(pdata, hw, "Unexpected packet size "
676 "during loop back test, size=%d, will retry",
681 for (j = 0; j < MIN_PACKET_SIZE; j++) {
682 if (pdata->loopback_tx_pkt[j]
683 != pdata->loopback_rx_pkt[j]) {
689 SMSC_TRACE(pdata, hw, "Successfully verified "
693 SMSC_WARN(pdata, hw, "Data mismatch "
694 "during loop back test, will retry");
702 static int smsc911x_phy_reset(struct smsc911x_data *pdata)
704 struct phy_device *phy_dev = pdata->phy_dev;
706 unsigned int i = 100000;
709 BUG_ON(!phy_dev->bus);
711 SMSC_TRACE(pdata, hw, "Performing PHY BCR Reset");
712 smsc911x_mii_write(phy_dev->bus, phy_dev->addr, MII_BMCR, BMCR_RESET);
715 temp = smsc911x_mii_read(phy_dev->bus, phy_dev->addr,
717 } while ((i--) && (temp & BMCR_RESET));
719 if (temp & BMCR_RESET) {
720 SMSC_WARN(pdata, hw, "PHY reset failed to complete");
723 /* Extra delay required because the phy may not be completed with
724 * its reset when BMCR_RESET is cleared. Specs say 256 uS is
725 * enough delay but using 1ms here to be safe */
731 static int smsc911x_phy_loopbacktest(struct net_device *dev)
733 struct smsc911x_data *pdata = netdev_priv(dev);
734 struct phy_device *phy_dev = pdata->phy_dev;
739 /* Initialise tx packet using broadcast destination address */
740 memset(pdata->loopback_tx_pkt, 0xff, ETH_ALEN);
742 /* Use incrementing source address */
743 for (i = 6; i < 12; i++)
744 pdata->loopback_tx_pkt[i] = (char)i;
746 /* Set length type field */
747 pdata->loopback_tx_pkt[12] = 0x00;
748 pdata->loopback_tx_pkt[13] = 0x00;
750 for (i = 14; i < MIN_PACKET_SIZE; i++)
751 pdata->loopback_tx_pkt[i] = (char)i;
753 val = smsc911x_reg_read(pdata, HW_CFG);
754 val &= HW_CFG_TX_FIF_SZ_;
756 smsc911x_reg_write(pdata, HW_CFG, val);
758 smsc911x_reg_write(pdata, TX_CFG, TX_CFG_TX_ON_);
759 smsc911x_reg_write(pdata, RX_CFG,
760 (u32)((ulong)pdata->loopback_rx_pkt & 0x03) << 8);
762 for (i = 0; i < 10; i++) {
763 /* Set PHY to 10/FD, no ANEG, and loopback mode */
764 smsc911x_mii_write(phy_dev->bus, phy_dev->addr, MII_BMCR,
765 BMCR_LOOPBACK | BMCR_FULLDPLX);
767 /* Enable MAC tx/rx, FD */
768 spin_lock_irqsave(&pdata->mac_lock, flags);
769 smsc911x_mac_write(pdata, MAC_CR, MAC_CR_FDPX_
770 | MAC_CR_TXEN_ | MAC_CR_RXEN_);
771 spin_unlock_irqrestore(&pdata->mac_lock, flags);
773 if (smsc911x_phy_check_loopbackpkt(pdata) == 0) {
780 spin_lock_irqsave(&pdata->mac_lock, flags);
781 smsc911x_mac_write(pdata, MAC_CR, 0);
782 spin_unlock_irqrestore(&pdata->mac_lock, flags);
784 smsc911x_phy_reset(pdata);
788 spin_lock_irqsave(&pdata->mac_lock, flags);
789 smsc911x_mac_write(pdata, MAC_CR, 0);
790 spin_unlock_irqrestore(&pdata->mac_lock, flags);
792 /* Cancel PHY loopback mode */
793 smsc911x_mii_write(phy_dev->bus, phy_dev->addr, MII_BMCR, 0);
795 smsc911x_reg_write(pdata, TX_CFG, 0);
796 smsc911x_reg_write(pdata, RX_CFG, 0);
800 #endif /* USE_PHY_WORK_AROUND */
802 static void smsc911x_phy_update_flowcontrol(struct smsc911x_data *pdata)
804 struct phy_device *phy_dev = pdata->phy_dev;
805 u32 afc = smsc911x_reg_read(pdata, AFC_CFG);
809 if (phy_dev->duplex == DUPLEX_FULL) {
810 u16 lcladv = phy_read(phy_dev, MII_ADVERTISE);
811 u16 rmtadv = phy_read(phy_dev, MII_LPA);
812 u8 cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv);
814 if (cap & FLOW_CTRL_RX)
819 if (cap & FLOW_CTRL_TX)
824 SMSC_TRACE(pdata, hw, "rx pause %s, tx pause %s",
825 (cap & FLOW_CTRL_RX ? "enabled" : "disabled"),
826 (cap & FLOW_CTRL_TX ? "enabled" : "disabled"));
828 SMSC_TRACE(pdata, hw, "half duplex");
833 spin_lock_irqsave(&pdata->mac_lock, flags);
834 smsc911x_mac_write(pdata, FLOW, flow);
835 spin_unlock_irqrestore(&pdata->mac_lock, flags);
837 smsc911x_reg_write(pdata, AFC_CFG, afc);
840 /* Update link mode if anything has changed. Called periodically when the
841 * PHY is in polling mode, even if nothing has changed. */
842 static void smsc911x_phy_adjust_link(struct net_device *dev)
844 struct smsc911x_data *pdata = netdev_priv(dev);
845 struct phy_device *phy_dev = pdata->phy_dev;
849 if (phy_dev->duplex != pdata->last_duplex) {
851 SMSC_TRACE(pdata, hw, "duplex state has changed");
853 spin_lock_irqsave(&pdata->mac_lock, flags);
854 mac_cr = smsc911x_mac_read(pdata, MAC_CR);
855 if (phy_dev->duplex) {
856 SMSC_TRACE(pdata, hw,
857 "configuring for full duplex mode");
858 mac_cr |= MAC_CR_FDPX_;
860 SMSC_TRACE(pdata, hw,
861 "configuring for half duplex mode");
862 mac_cr &= ~MAC_CR_FDPX_;
864 smsc911x_mac_write(pdata, MAC_CR, mac_cr);
865 spin_unlock_irqrestore(&pdata->mac_lock, flags);
867 smsc911x_phy_update_flowcontrol(pdata);
868 pdata->last_duplex = phy_dev->duplex;
871 carrier = netif_carrier_ok(dev);
872 if (carrier != pdata->last_carrier) {
873 SMSC_TRACE(pdata, hw, "carrier state has changed");
875 SMSC_TRACE(pdata, hw, "configuring for carrier OK");
876 if ((pdata->gpio_orig_setting & GPIO_CFG_LED1_EN_) &&
877 (!pdata->using_extphy)) {
878 /* Restore original GPIO configuration */
879 pdata->gpio_setting = pdata->gpio_orig_setting;
880 smsc911x_reg_write(pdata, GPIO_CFG,
881 pdata->gpio_setting);
884 SMSC_TRACE(pdata, hw, "configuring for no carrier");
885 /* Check global setting that LED1
886 * usage is 10/100 indicator */
887 pdata->gpio_setting = smsc911x_reg_read(pdata,
889 if ((pdata->gpio_setting & GPIO_CFG_LED1_EN_) &&
890 (!pdata->using_extphy)) {
891 /* Force 10/100 LED off, after saving
892 * original GPIO configuration */
893 pdata->gpio_orig_setting = pdata->gpio_setting;
895 pdata->gpio_setting &= ~GPIO_CFG_LED1_EN_;
896 pdata->gpio_setting |= (GPIO_CFG_GPIOBUF0_
899 smsc911x_reg_write(pdata, GPIO_CFG,
900 pdata->gpio_setting);
903 pdata->last_carrier = carrier;
907 static int smsc911x_mii_probe(struct net_device *dev)
909 struct smsc911x_data *pdata = netdev_priv(dev);
910 struct phy_device *phydev = NULL;
913 /* find the first phy */
914 phydev = phy_find_first(pdata->mii_bus);
916 netdev_err(dev, "no PHY found\n");
920 SMSC_TRACE(pdata, probe, "PHY: addr %d, phy_id 0x%08X",
921 phydev->addr, phydev->phy_id);
923 ret = phy_connect_direct(dev, phydev,
924 &smsc911x_phy_adjust_link, 0,
925 pdata->config.phy_interface);
928 netdev_err(dev, "Could not attach to PHY\n");
933 "attached PHY driver [%s] (mii_bus:phy_addr=%s, irq=%d)\n",
934 phydev->drv->name, dev_name(&phydev->dev), phydev->irq);
936 /* mask with MAC supported features */
937 phydev->supported &= (PHY_BASIC_FEATURES | SUPPORTED_Pause |
938 SUPPORTED_Asym_Pause);
939 phydev->advertising = phydev->supported;
941 pdata->phy_dev = phydev;
942 pdata->last_duplex = -1;
943 pdata->last_carrier = -1;
945 #ifdef USE_PHY_WORK_AROUND
946 if (smsc911x_phy_loopbacktest(dev) < 0) {
947 SMSC_WARN(pdata, hw, "Failed Loop Back Test");
950 SMSC_TRACE(pdata, hw, "Passed Loop Back Test");
951 #endif /* USE_PHY_WORK_AROUND */
953 SMSC_TRACE(pdata, hw, "phy initialised successfully");
957 static int __devinit smsc911x_mii_init(struct platform_device *pdev,
958 struct net_device *dev)
960 struct smsc911x_data *pdata = netdev_priv(dev);
963 pdata->mii_bus = mdiobus_alloc();
964 if (!pdata->mii_bus) {
969 pdata->mii_bus->name = SMSC_MDIONAME;
970 snprintf(pdata->mii_bus->id, MII_BUS_ID_SIZE, "%x", pdev->id);
971 pdata->mii_bus->priv = pdata;
972 pdata->mii_bus->read = smsc911x_mii_read;
973 pdata->mii_bus->write = smsc911x_mii_write;
974 pdata->mii_bus->irq = pdata->phy_irq;
975 for (i = 0; i < PHY_MAX_ADDR; ++i)
976 pdata->mii_bus->irq[i] = PHY_POLL;
978 pdata->mii_bus->parent = &pdev->dev;
980 switch (pdata->idrev & 0xFFFF0000) {
985 /* External PHY supported, try to autodetect */
986 smsc911x_phy_initialise_external(pdata);
989 SMSC_TRACE(pdata, hw, "External PHY is not supported, "
990 "using internal PHY");
991 pdata->using_extphy = 0;
995 if (!pdata->using_extphy) {
996 /* Mask all PHYs except ID 1 (internal) */
997 pdata->mii_bus->phy_mask = ~(1 << 1);
1000 if (mdiobus_register(pdata->mii_bus)) {
1001 SMSC_WARN(pdata, probe, "Error registering mii bus");
1002 goto err_out_free_bus_2;
1005 if (smsc911x_mii_probe(dev) < 0) {
1006 SMSC_WARN(pdata, probe, "Error registering mii bus");
1007 goto err_out_unregister_bus_3;
1012 err_out_unregister_bus_3:
1013 mdiobus_unregister(pdata->mii_bus);
1015 mdiobus_free(pdata->mii_bus);
1020 /* Gets the number of tx statuses in the fifo */
1021 static unsigned int smsc911x_tx_get_txstatcount(struct smsc911x_data *pdata)
1023 return (smsc911x_reg_read(pdata, TX_FIFO_INF)
1024 & TX_FIFO_INF_TSUSED_) >> 16;
1027 /* Reads tx statuses and increments counters where necessary */
1028 static void smsc911x_tx_update_txcounters(struct net_device *dev)
1030 struct smsc911x_data *pdata = netdev_priv(dev);
1031 unsigned int tx_stat;
1033 while ((tx_stat = smsc911x_tx_get_txstatus(pdata)) != 0) {
1034 if (unlikely(tx_stat & 0x80000000)) {
1035 /* In this driver the packet tag is used as the packet
1036 * length. Since a packet length can never reach the
1037 * size of 0x8000, this bit is reserved. It is worth
1038 * noting that the "reserved bit" in the warning above
1039 * does not reference a hardware defined reserved bit
1040 * but rather a driver defined one.
1042 SMSC_WARN(pdata, hw, "Packet tag reserved bit is high");
1044 if (unlikely(tx_stat & TX_STS_ES_)) {
1045 dev->stats.tx_errors++;
1047 dev->stats.tx_packets++;
1048 dev->stats.tx_bytes += (tx_stat >> 16);
1050 if (unlikely(tx_stat & TX_STS_EXCESS_COL_)) {
1051 dev->stats.collisions += 16;
1052 dev->stats.tx_aborted_errors += 1;
1054 dev->stats.collisions +=
1055 ((tx_stat >> 3) & 0xF);
1057 if (unlikely(tx_stat & TX_STS_LOST_CARRIER_))
1058 dev->stats.tx_carrier_errors += 1;
1059 if (unlikely(tx_stat & TX_STS_LATE_COL_)) {
1060 dev->stats.collisions++;
1061 dev->stats.tx_aborted_errors++;
1067 /* Increments the Rx error counters */
1069 smsc911x_rx_counterrors(struct net_device *dev, unsigned int rxstat)
1073 if (unlikely(rxstat & RX_STS_ES_)) {
1074 dev->stats.rx_errors++;
1075 if (unlikely(rxstat & RX_STS_CRC_ERR_)) {
1076 dev->stats.rx_crc_errors++;
1080 if (likely(!crc_err)) {
1081 if (unlikely((rxstat & RX_STS_FRAME_TYPE_) &&
1082 (rxstat & RX_STS_LENGTH_ERR_)))
1083 dev->stats.rx_length_errors++;
1084 if (rxstat & RX_STS_MCAST_)
1085 dev->stats.multicast++;
1089 /* Quickly dumps bad packets */
1091 smsc911x_rx_fastforward(struct smsc911x_data *pdata, unsigned int pktbytes)
1093 unsigned int pktwords = (pktbytes + NET_IP_ALIGN + 3) >> 2;
1095 if (likely(pktwords >= 4)) {
1096 unsigned int timeout = 500;
1098 smsc911x_reg_write(pdata, RX_DP_CTRL, RX_DP_CTRL_RX_FFWD_);
1101 val = smsc911x_reg_read(pdata, RX_DP_CTRL);
1102 } while ((val & RX_DP_CTRL_RX_FFWD_) && --timeout);
1104 if (unlikely(timeout == 0))
1105 SMSC_WARN(pdata, hw, "Timed out waiting for "
1106 "RX FFWD to finish, RX_DP_CTRL: 0x%08X", val);
1110 temp = smsc911x_reg_read(pdata, RX_DATA_FIFO);
1114 /* NAPI poll function */
1115 static int smsc911x_poll(struct napi_struct *napi, int budget)
1117 struct smsc911x_data *pdata =
1118 container_of(napi, struct smsc911x_data, napi);
1119 struct net_device *dev = pdata->dev;
1122 while (npackets < budget) {
1123 unsigned int pktlength;
1124 unsigned int pktwords;
1125 struct sk_buff *skb;
1126 unsigned int rxstat = smsc911x_rx_get_rxstatus(pdata);
1130 /* We processed all packets available. Tell NAPI it can
1131 * stop polling then re-enable rx interrupts */
1132 smsc911x_reg_write(pdata, INT_STS, INT_STS_RSFL_);
1133 napi_complete(napi);
1134 temp = smsc911x_reg_read(pdata, INT_EN);
1135 temp |= INT_EN_RSFL_EN_;
1136 smsc911x_reg_write(pdata, INT_EN, temp);
1140 /* Count packet for NAPI scheduling, even if it has an error.
1141 * Error packets still require cycles to discard */
1144 pktlength = ((rxstat & 0x3FFF0000) >> 16);
1145 pktwords = (pktlength + NET_IP_ALIGN + 3) >> 2;
1146 smsc911x_rx_counterrors(dev, rxstat);
1148 if (unlikely(rxstat & RX_STS_ES_)) {
1149 SMSC_WARN(pdata, rx_err,
1150 "Discarding packet with error bit set");
1151 /* Packet has an error, discard it and continue with
1153 smsc911x_rx_fastforward(pdata, pktwords);
1154 dev->stats.rx_dropped++;
1158 skb = netdev_alloc_skb(dev, pktlength + NET_IP_ALIGN);
1159 if (unlikely(!skb)) {
1160 SMSC_WARN(pdata, rx_err,
1161 "Unable to allocate skb for rx packet");
1162 /* Drop the packet and stop this polling iteration */
1163 smsc911x_rx_fastforward(pdata, pktwords);
1164 dev->stats.rx_dropped++;
1168 skb->data = skb->head;
1169 skb_reset_tail_pointer(skb);
1171 /* Align IP on 16B boundary */
1172 skb_reserve(skb, NET_IP_ALIGN);
1173 skb_put(skb, pktlength - 4);
1174 pdata->ops->rx_readfifo(pdata,
1175 (unsigned int *)skb->head, pktwords);
1176 skb->protocol = eth_type_trans(skb, dev);
1177 skb_checksum_none_assert(skb);
1178 netif_receive_skb(skb);
1180 /* Update counters */
1181 dev->stats.rx_packets++;
1182 dev->stats.rx_bytes += (pktlength - 4);
1185 /* Return total received packets */
1189 /* Returns hash bit number for given MAC address
1191 * 01 00 5E 00 00 01 -> returns bit number 31 */
1192 static unsigned int smsc911x_hash(char addr[ETH_ALEN])
1194 return (ether_crc(ETH_ALEN, addr) >> 26) & 0x3f;
1197 static void smsc911x_rx_multicast_update(struct smsc911x_data *pdata)
1199 /* Performs the multicast & mac_cr update. This is called when
1200 * safe on the current hardware, and with the mac_lock held */
1201 unsigned int mac_cr;
1203 SMSC_ASSERT_MAC_LOCK(pdata);
1205 mac_cr = smsc911x_mac_read(pdata, MAC_CR);
1206 mac_cr |= pdata->set_bits_mask;
1207 mac_cr &= ~(pdata->clear_bits_mask);
1208 smsc911x_mac_write(pdata, MAC_CR, mac_cr);
1209 smsc911x_mac_write(pdata, HASHH, pdata->hashhi);
1210 smsc911x_mac_write(pdata, HASHL, pdata->hashlo);
1211 SMSC_TRACE(pdata, hw, "maccr 0x%08X, HASHH 0x%08X, HASHL 0x%08X",
1212 mac_cr, pdata->hashhi, pdata->hashlo);
1215 static void smsc911x_rx_multicast_update_workaround(struct smsc911x_data *pdata)
1217 unsigned int mac_cr;
1219 /* This function is only called for older LAN911x devices
1220 * (revA or revB), where MAC_CR, HASHH and HASHL should not
1221 * be modified during Rx - newer devices immediately update the
1224 * This is called from interrupt context */
1226 spin_lock(&pdata->mac_lock);
1228 /* Check Rx has stopped */
1229 if (smsc911x_mac_read(pdata, MAC_CR) & MAC_CR_RXEN_)
1230 SMSC_WARN(pdata, drv, "Rx not stopped");
1232 /* Perform the update - safe to do now Rx has stopped */
1233 smsc911x_rx_multicast_update(pdata);
1236 mac_cr = smsc911x_mac_read(pdata, MAC_CR);
1237 mac_cr |= MAC_CR_RXEN_;
1238 smsc911x_mac_write(pdata, MAC_CR, mac_cr);
1240 pdata->multicast_update_pending = 0;
1242 spin_unlock(&pdata->mac_lock);
1245 static int smsc911x_soft_reset(struct smsc911x_data *pdata)
1247 unsigned int timeout;
1250 /* Reset the LAN911x */
1251 smsc911x_reg_write(pdata, HW_CFG, HW_CFG_SRST_);
1255 temp = smsc911x_reg_read(pdata, HW_CFG);
1256 } while ((--timeout) && (temp & HW_CFG_SRST_));
1258 if (unlikely(temp & HW_CFG_SRST_)) {
1259 SMSC_WARN(pdata, drv, "Failed to complete reset");
1265 /* Sets the device MAC address to dev_addr, called with mac_lock held */
1267 smsc911x_set_hw_mac_address(struct smsc911x_data *pdata, u8 dev_addr[6])
1269 u32 mac_high16 = (dev_addr[5] << 8) | dev_addr[4];
1270 u32 mac_low32 = (dev_addr[3] << 24) | (dev_addr[2] << 16) |
1271 (dev_addr[1] << 8) | dev_addr[0];
1273 SMSC_ASSERT_MAC_LOCK(pdata);
1275 smsc911x_mac_write(pdata, ADDRH, mac_high16);
1276 smsc911x_mac_write(pdata, ADDRL, mac_low32);
1279 static int smsc911x_open(struct net_device *dev)
1281 struct smsc911x_data *pdata = netdev_priv(dev);
1282 unsigned int timeout;
1284 unsigned int intcfg;
1286 /* if the phy is not yet registered, retry later*/
1287 if (!pdata->phy_dev) {
1288 SMSC_WARN(pdata, hw, "phy_dev is NULL");
1292 if (!is_valid_ether_addr(dev->dev_addr)) {
1293 SMSC_WARN(pdata, hw, "dev_addr is not a valid MAC address");
1294 return -EADDRNOTAVAIL;
1297 /* Reset the LAN911x */
1298 if (smsc911x_soft_reset(pdata)) {
1299 SMSC_WARN(pdata, hw, "soft reset failed");
1303 smsc911x_reg_write(pdata, HW_CFG, 0x00050000);
1304 smsc911x_reg_write(pdata, AFC_CFG, 0x006E3740);
1306 /* Increase the legal frame size of VLAN tagged frames to 1522 bytes */
1307 spin_lock_irq(&pdata->mac_lock);
1308 smsc911x_mac_write(pdata, VLAN1, ETH_P_8021Q);
1309 spin_unlock_irq(&pdata->mac_lock);
1311 /* Make sure EEPROM has finished loading before setting GPIO_CFG */
1313 while ((smsc911x_reg_read(pdata, E2P_CMD) & E2P_CMD_EPC_BUSY_) &&
1318 if (unlikely(timeout == 0))
1319 SMSC_WARN(pdata, ifup,
1320 "Timed out waiting for EEPROM busy bit to clear");
1322 smsc911x_reg_write(pdata, GPIO_CFG, 0x70070000);
1324 /* The soft reset above cleared the device's MAC address,
1325 * restore it from local copy (set in probe) */
1326 spin_lock_irq(&pdata->mac_lock);
1327 smsc911x_set_hw_mac_address(pdata, dev->dev_addr);
1328 spin_unlock_irq(&pdata->mac_lock);
1330 /* Initialise irqs, but leave all sources disabled */
1331 smsc911x_reg_write(pdata, INT_EN, 0);
1332 smsc911x_reg_write(pdata, INT_STS, 0xFFFFFFFF);
1334 /* Set interrupt deassertion to 100uS */
1335 intcfg = ((10 << 24) | INT_CFG_IRQ_EN_);
1337 if (pdata->config.irq_polarity) {
1338 SMSC_TRACE(pdata, ifup, "irq polarity: active high");
1339 intcfg |= INT_CFG_IRQ_POL_;
1341 SMSC_TRACE(pdata, ifup, "irq polarity: active low");
1344 if (pdata->config.irq_type) {
1345 SMSC_TRACE(pdata, ifup, "irq type: push-pull");
1346 intcfg |= INT_CFG_IRQ_TYPE_;
1348 SMSC_TRACE(pdata, ifup, "irq type: open drain");
1351 smsc911x_reg_write(pdata, INT_CFG, intcfg);
1353 SMSC_TRACE(pdata, ifup, "Testing irq handler using IRQ %d", dev->irq);
1354 pdata->software_irq_signal = 0;
1357 temp = smsc911x_reg_read(pdata, INT_EN);
1358 temp |= INT_EN_SW_INT_EN_;
1359 smsc911x_reg_write(pdata, INT_EN, temp);
1363 if (pdata->software_irq_signal)
1368 if (!pdata->software_irq_signal) {
1369 netdev_warn(dev, "ISR failed signaling test (IRQ %d)\n",
1373 SMSC_TRACE(pdata, ifup, "IRQ handler passed test using IRQ %d",
1376 netdev_info(dev, "SMSC911x/921x identified at %#08lx, IRQ: %d\n",
1377 (unsigned long)pdata->ioaddr, dev->irq);
1379 /* Reset the last known duplex and carrier */
1380 pdata->last_duplex = -1;
1381 pdata->last_carrier = -1;
1383 /* Bring the PHY up */
1384 phy_start(pdata->phy_dev);
1386 temp = smsc911x_reg_read(pdata, HW_CFG);
1387 /* Preserve TX FIFO size and external PHY configuration */
1388 temp &= (HW_CFG_TX_FIF_SZ_|0x00000FFF);
1390 smsc911x_reg_write(pdata, HW_CFG, temp);
1392 temp = smsc911x_reg_read(pdata, FIFO_INT);
1393 temp |= FIFO_INT_TX_AVAIL_LEVEL_;
1394 temp &= ~(FIFO_INT_RX_STS_LEVEL_);
1395 smsc911x_reg_write(pdata, FIFO_INT, temp);
1397 /* set RX Data offset to 2 bytes for alignment */
1398 smsc911x_reg_write(pdata, RX_CFG, (2 << 8));
1400 /* enable NAPI polling before enabling RX interrupts */
1401 napi_enable(&pdata->napi);
1403 temp = smsc911x_reg_read(pdata, INT_EN);
1404 temp |= (INT_EN_TDFA_EN_ | INT_EN_RSFL_EN_ | INT_EN_RXSTOP_INT_EN_);
1405 smsc911x_reg_write(pdata, INT_EN, temp);
1407 spin_lock_irq(&pdata->mac_lock);
1408 temp = smsc911x_mac_read(pdata, MAC_CR);
1409 temp |= (MAC_CR_TXEN_ | MAC_CR_RXEN_ | MAC_CR_HBDIS_);
1410 smsc911x_mac_write(pdata, MAC_CR, temp);
1411 spin_unlock_irq(&pdata->mac_lock);
1413 smsc911x_reg_write(pdata, TX_CFG, TX_CFG_TX_ON_);
1415 netif_start_queue(dev);
1419 /* Entry point for stopping the interface */
1420 static int smsc911x_stop(struct net_device *dev)
1422 struct smsc911x_data *pdata = netdev_priv(dev);
1425 /* Disable all device interrupts */
1426 temp = smsc911x_reg_read(pdata, INT_CFG);
1427 temp &= ~INT_CFG_IRQ_EN_;
1428 smsc911x_reg_write(pdata, INT_CFG, temp);
1430 /* Stop Tx and Rx polling */
1431 netif_stop_queue(dev);
1432 napi_disable(&pdata->napi);
1434 /* At this point all Rx and Tx activity is stopped */
1435 dev->stats.rx_dropped += smsc911x_reg_read(pdata, RX_DROP);
1436 smsc911x_tx_update_txcounters(dev);
1438 /* Bring the PHY down */
1440 phy_stop(pdata->phy_dev);
1442 SMSC_TRACE(pdata, ifdown, "Interface stopped");
1446 /* Entry point for transmitting a packet */
1447 static int smsc911x_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
1449 struct smsc911x_data *pdata = netdev_priv(dev);
1450 unsigned int freespace;
1451 unsigned int tx_cmd_a;
1452 unsigned int tx_cmd_b;
1457 freespace = smsc911x_reg_read(pdata, TX_FIFO_INF) & TX_FIFO_INF_TDFREE_;
1459 if (unlikely(freespace < TX_FIFO_LOW_THRESHOLD))
1460 SMSC_WARN(pdata, tx_err,
1461 "Tx data fifo low, space available: %d", freespace);
1463 /* Word alignment adjustment */
1464 tx_cmd_a = (u32)((ulong)skb->data & 0x03) << 16;
1465 tx_cmd_a |= TX_CMD_A_FIRST_SEG_ | TX_CMD_A_LAST_SEG_;
1466 tx_cmd_a |= (unsigned int)skb->len;
1468 tx_cmd_b = ((unsigned int)skb->len) << 16;
1469 tx_cmd_b |= (unsigned int)skb->len;
1471 smsc911x_reg_write(pdata, TX_DATA_FIFO, tx_cmd_a);
1472 smsc911x_reg_write(pdata, TX_DATA_FIFO, tx_cmd_b);
1474 bufp = (ulong)skb->data & (~0x3);
1475 wrsz = (u32)skb->len + 3;
1476 wrsz += (u32)((ulong)skb->data & 0x3);
1479 pdata->ops->tx_writefifo(pdata, (unsigned int *)bufp, wrsz);
1480 freespace -= (skb->len + 32);
1481 skb_tx_timestamp(skb);
1484 if (unlikely(smsc911x_tx_get_txstatcount(pdata) >= 30))
1485 smsc911x_tx_update_txcounters(dev);
1487 if (freespace < TX_FIFO_LOW_THRESHOLD) {
1488 netif_stop_queue(dev);
1489 temp = smsc911x_reg_read(pdata, FIFO_INT);
1492 smsc911x_reg_write(pdata, FIFO_INT, temp);
1495 return NETDEV_TX_OK;
1498 /* Entry point for getting status counters */
1499 static struct net_device_stats *smsc911x_get_stats(struct net_device *dev)
1501 struct smsc911x_data *pdata = netdev_priv(dev);
1502 smsc911x_tx_update_txcounters(dev);
1503 dev->stats.rx_dropped += smsc911x_reg_read(pdata, RX_DROP);
1507 /* Entry point for setting addressing modes */
1508 static void smsc911x_set_multicast_list(struct net_device *dev)
1510 struct smsc911x_data *pdata = netdev_priv(dev);
1511 unsigned long flags;
1513 if (dev->flags & IFF_PROMISC) {
1514 /* Enabling promiscuous mode */
1515 pdata->set_bits_mask = MAC_CR_PRMS_;
1516 pdata->clear_bits_mask = (MAC_CR_MCPAS_ | MAC_CR_HPFILT_);
1519 } else if (dev->flags & IFF_ALLMULTI) {
1520 /* Enabling all multicast mode */
1521 pdata->set_bits_mask = MAC_CR_MCPAS_;
1522 pdata->clear_bits_mask = (MAC_CR_PRMS_ | MAC_CR_HPFILT_);
1525 } else if (!netdev_mc_empty(dev)) {
1526 /* Enabling specific multicast addresses */
1527 unsigned int hash_high = 0;
1528 unsigned int hash_low = 0;
1529 struct netdev_hw_addr *ha;
1531 pdata->set_bits_mask = MAC_CR_HPFILT_;
1532 pdata->clear_bits_mask = (MAC_CR_PRMS_ | MAC_CR_MCPAS_);
1534 netdev_for_each_mc_addr(ha, dev) {
1535 unsigned int bitnum = smsc911x_hash(ha->addr);
1536 unsigned int mask = 0x01 << (bitnum & 0x1F);
1544 pdata->hashhi = hash_high;
1545 pdata->hashlo = hash_low;
1547 /* Enabling local MAC address only */
1548 pdata->set_bits_mask = 0;
1549 pdata->clear_bits_mask =
1550 (MAC_CR_PRMS_ | MAC_CR_MCPAS_ | MAC_CR_HPFILT_);
1555 spin_lock_irqsave(&pdata->mac_lock, flags);
1557 if (pdata->generation <= 1) {
1558 /* Older hardware revision - cannot change these flags while
1560 if (!pdata->multicast_update_pending) {
1562 SMSC_TRACE(pdata, hw, "scheduling mcast update");
1563 pdata->multicast_update_pending = 1;
1565 /* Request the hardware to stop, then perform the
1566 * update when we get an RX_STOP interrupt */
1567 temp = smsc911x_mac_read(pdata, MAC_CR);
1568 temp &= ~(MAC_CR_RXEN_);
1569 smsc911x_mac_write(pdata, MAC_CR, temp);
1571 /* There is another update pending, this should now
1572 * use the newer values */
1575 /* Newer hardware revision - can write immediately */
1576 smsc911x_rx_multicast_update(pdata);
1579 spin_unlock_irqrestore(&pdata->mac_lock, flags);
1582 static irqreturn_t smsc911x_irqhandler(int irq, void *dev_id)
1584 struct net_device *dev = dev_id;
1585 struct smsc911x_data *pdata = netdev_priv(dev);
1586 u32 intsts = smsc911x_reg_read(pdata, INT_STS);
1587 u32 inten = smsc911x_reg_read(pdata, INT_EN);
1588 int serviced = IRQ_NONE;
1591 if (unlikely(intsts & inten & INT_STS_SW_INT_)) {
1592 temp = smsc911x_reg_read(pdata, INT_EN);
1593 temp &= (~INT_EN_SW_INT_EN_);
1594 smsc911x_reg_write(pdata, INT_EN, temp);
1595 smsc911x_reg_write(pdata, INT_STS, INT_STS_SW_INT_);
1596 pdata->software_irq_signal = 1;
1598 serviced = IRQ_HANDLED;
1601 if (unlikely(intsts & inten & INT_STS_RXSTOP_INT_)) {
1602 /* Called when there is a multicast update scheduled and
1603 * it is now safe to complete the update */
1604 SMSC_TRACE(pdata, intr, "RX Stop interrupt");
1605 smsc911x_reg_write(pdata, INT_STS, INT_STS_RXSTOP_INT_);
1606 if (pdata->multicast_update_pending)
1607 smsc911x_rx_multicast_update_workaround(pdata);
1608 serviced = IRQ_HANDLED;
1611 if (intsts & inten & INT_STS_TDFA_) {
1612 temp = smsc911x_reg_read(pdata, FIFO_INT);
1613 temp |= FIFO_INT_TX_AVAIL_LEVEL_;
1614 smsc911x_reg_write(pdata, FIFO_INT, temp);
1615 smsc911x_reg_write(pdata, INT_STS, INT_STS_TDFA_);
1616 netif_wake_queue(dev);
1617 serviced = IRQ_HANDLED;
1620 if (unlikely(intsts & inten & INT_STS_RXE_)) {
1621 SMSC_TRACE(pdata, intr, "RX Error interrupt");
1622 smsc911x_reg_write(pdata, INT_STS, INT_STS_RXE_);
1623 serviced = IRQ_HANDLED;
1626 if (likely(intsts & inten & INT_STS_RSFL_)) {
1627 if (likely(napi_schedule_prep(&pdata->napi))) {
1628 /* Disable Rx interrupts */
1629 temp = smsc911x_reg_read(pdata, INT_EN);
1630 temp &= (~INT_EN_RSFL_EN_);
1631 smsc911x_reg_write(pdata, INT_EN, temp);
1632 /* Schedule a NAPI poll */
1633 __napi_schedule(&pdata->napi);
1635 SMSC_WARN(pdata, rx_err, "napi_schedule_prep failed");
1637 serviced = IRQ_HANDLED;
1643 #ifdef CONFIG_NET_POLL_CONTROLLER
1644 static void smsc911x_poll_controller(struct net_device *dev)
1646 disable_irq(dev->irq);
1647 smsc911x_irqhandler(0, dev);
1648 enable_irq(dev->irq);
1650 #endif /* CONFIG_NET_POLL_CONTROLLER */
1652 static int smsc911x_set_mac_address(struct net_device *dev, void *p)
1654 struct smsc911x_data *pdata = netdev_priv(dev);
1655 struct sockaddr *addr = p;
1657 /* On older hardware revisions we cannot change the mac address
1658 * registers while receiving data. Newer devices can safely change
1659 * this at any time. */
1660 if (pdata->generation <= 1 && netif_running(dev))
1663 if (!is_valid_ether_addr(addr->sa_data))
1664 return -EADDRNOTAVAIL;
1666 memcpy(dev->dev_addr, addr->sa_data, ETH_ALEN);
1668 spin_lock_irq(&pdata->mac_lock);
1669 smsc911x_set_hw_mac_address(pdata, dev->dev_addr);
1670 spin_unlock_irq(&pdata->mac_lock);
1672 netdev_info(dev, "MAC Address: %pM\n", dev->dev_addr);
1677 /* Standard ioctls for mii-tool */
1678 static int smsc911x_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
1680 struct smsc911x_data *pdata = netdev_priv(dev);
1682 if (!netif_running(dev) || !pdata->phy_dev)
1685 return phy_mii_ioctl(pdata->phy_dev, ifr, cmd);
1689 smsc911x_ethtool_getsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1691 struct smsc911x_data *pdata = netdev_priv(dev);
1695 return phy_ethtool_gset(pdata->phy_dev, cmd);
1699 smsc911x_ethtool_setsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1701 struct smsc911x_data *pdata = netdev_priv(dev);
1703 return phy_ethtool_sset(pdata->phy_dev, cmd);
1706 static void smsc911x_ethtool_getdrvinfo(struct net_device *dev,
1707 struct ethtool_drvinfo *info)
1709 strlcpy(info->driver, SMSC_CHIPNAME, sizeof(info->driver));
1710 strlcpy(info->version, SMSC_DRV_VERSION, sizeof(info->version));
1711 strlcpy(info->bus_info, dev_name(dev->dev.parent),
1712 sizeof(info->bus_info));
1715 static int smsc911x_ethtool_nwayreset(struct net_device *dev)
1717 struct smsc911x_data *pdata = netdev_priv(dev);
1719 return phy_start_aneg(pdata->phy_dev);
1722 static u32 smsc911x_ethtool_getmsglevel(struct net_device *dev)
1724 struct smsc911x_data *pdata = netdev_priv(dev);
1725 return pdata->msg_enable;
1728 static void smsc911x_ethtool_setmsglevel(struct net_device *dev, u32 level)
1730 struct smsc911x_data *pdata = netdev_priv(dev);
1731 pdata->msg_enable = level;
1734 static int smsc911x_ethtool_getregslen(struct net_device *dev)
1736 return (((E2P_DATA - ID_REV) / 4 + 1) + (WUCSR - MAC_CR) + 1 + 32) *
1741 smsc911x_ethtool_getregs(struct net_device *dev, struct ethtool_regs *regs,
1744 struct smsc911x_data *pdata = netdev_priv(dev);
1745 struct phy_device *phy_dev = pdata->phy_dev;
1746 unsigned long flags;
1751 regs->version = pdata->idrev;
1752 for (i = ID_REV; i <= E2P_DATA; i += (sizeof(u32)))
1753 data[j++] = smsc911x_reg_read(pdata, i);
1755 for (i = MAC_CR; i <= WUCSR; i++) {
1756 spin_lock_irqsave(&pdata->mac_lock, flags);
1757 data[j++] = smsc911x_mac_read(pdata, i);
1758 spin_unlock_irqrestore(&pdata->mac_lock, flags);
1761 for (i = 0; i <= 31; i++)
1762 data[j++] = smsc911x_mii_read(phy_dev->bus, phy_dev->addr, i);
1765 static void smsc911x_eeprom_enable_access(struct smsc911x_data *pdata)
1767 unsigned int temp = smsc911x_reg_read(pdata, GPIO_CFG);
1768 temp &= ~GPIO_CFG_EEPR_EN_;
1769 smsc911x_reg_write(pdata, GPIO_CFG, temp);
1773 static int smsc911x_eeprom_send_cmd(struct smsc911x_data *pdata, u32 op)
1778 SMSC_TRACE(pdata, drv, "op 0x%08x", op);
1779 if (smsc911x_reg_read(pdata, E2P_CMD) & E2P_CMD_EPC_BUSY_) {
1780 SMSC_WARN(pdata, drv, "Busy at start");
1784 e2cmd = op | E2P_CMD_EPC_BUSY_;
1785 smsc911x_reg_write(pdata, E2P_CMD, e2cmd);
1789 e2cmd = smsc911x_reg_read(pdata, E2P_CMD);
1790 } while ((e2cmd & E2P_CMD_EPC_BUSY_) && (--timeout));
1793 SMSC_TRACE(pdata, drv, "TIMED OUT");
1797 if (e2cmd & E2P_CMD_EPC_TIMEOUT_) {
1798 SMSC_TRACE(pdata, drv, "Error occurred during eeprom operation");
1805 static int smsc911x_eeprom_read_location(struct smsc911x_data *pdata,
1806 u8 address, u8 *data)
1808 u32 op = E2P_CMD_EPC_CMD_READ_ | address;
1811 SMSC_TRACE(pdata, drv, "address 0x%x", address);
1812 ret = smsc911x_eeprom_send_cmd(pdata, op);
1815 data[address] = smsc911x_reg_read(pdata, E2P_DATA);
1820 static int smsc911x_eeprom_write_location(struct smsc911x_data *pdata,
1821 u8 address, u8 data)
1823 u32 op = E2P_CMD_EPC_CMD_ERASE_ | address;
1827 SMSC_TRACE(pdata, drv, "address 0x%x, data 0x%x", address, data);
1828 ret = smsc911x_eeprom_send_cmd(pdata, op);
1831 op = E2P_CMD_EPC_CMD_WRITE_ | address;
1832 smsc911x_reg_write(pdata, E2P_DATA, (u32)data);
1834 /* Workaround for hardware read-after-write restriction */
1835 temp = smsc911x_reg_read(pdata, BYTE_TEST);
1837 ret = smsc911x_eeprom_send_cmd(pdata, op);
1843 static int smsc911x_ethtool_get_eeprom_len(struct net_device *dev)
1845 return SMSC911X_EEPROM_SIZE;
1848 static int smsc911x_ethtool_get_eeprom(struct net_device *dev,
1849 struct ethtool_eeprom *eeprom, u8 *data)
1851 struct smsc911x_data *pdata = netdev_priv(dev);
1852 u8 eeprom_data[SMSC911X_EEPROM_SIZE];
1856 smsc911x_eeprom_enable_access(pdata);
1858 len = min(eeprom->len, SMSC911X_EEPROM_SIZE);
1859 for (i = 0; i < len; i++) {
1860 int ret = smsc911x_eeprom_read_location(pdata, i, eeprom_data);
1867 memcpy(data, &eeprom_data[eeprom->offset], len);
1872 static int smsc911x_ethtool_set_eeprom(struct net_device *dev,
1873 struct ethtool_eeprom *eeprom, u8 *data)
1876 struct smsc911x_data *pdata = netdev_priv(dev);
1878 smsc911x_eeprom_enable_access(pdata);
1879 smsc911x_eeprom_send_cmd(pdata, E2P_CMD_EPC_CMD_EWEN_);
1880 ret = smsc911x_eeprom_write_location(pdata, eeprom->offset, *data);
1881 smsc911x_eeprom_send_cmd(pdata, E2P_CMD_EPC_CMD_EWDS_);
1883 /* Single byte write, according to man page */
1889 static const struct ethtool_ops smsc911x_ethtool_ops = {
1890 .get_settings = smsc911x_ethtool_getsettings,
1891 .set_settings = smsc911x_ethtool_setsettings,
1892 .get_link = ethtool_op_get_link,
1893 .get_drvinfo = smsc911x_ethtool_getdrvinfo,
1894 .nway_reset = smsc911x_ethtool_nwayreset,
1895 .get_msglevel = smsc911x_ethtool_getmsglevel,
1896 .set_msglevel = smsc911x_ethtool_setmsglevel,
1897 .get_regs_len = smsc911x_ethtool_getregslen,
1898 .get_regs = smsc911x_ethtool_getregs,
1899 .get_eeprom_len = smsc911x_ethtool_get_eeprom_len,
1900 .get_eeprom = smsc911x_ethtool_get_eeprom,
1901 .set_eeprom = smsc911x_ethtool_set_eeprom,
1904 static const struct net_device_ops smsc911x_netdev_ops = {
1905 .ndo_open = smsc911x_open,
1906 .ndo_stop = smsc911x_stop,
1907 .ndo_start_xmit = smsc911x_hard_start_xmit,
1908 .ndo_get_stats = smsc911x_get_stats,
1909 .ndo_set_multicast_list = smsc911x_set_multicast_list,
1910 .ndo_do_ioctl = smsc911x_do_ioctl,
1911 .ndo_change_mtu = eth_change_mtu,
1912 .ndo_validate_addr = eth_validate_addr,
1913 .ndo_set_mac_address = smsc911x_set_mac_address,
1914 #ifdef CONFIG_NET_POLL_CONTROLLER
1915 .ndo_poll_controller = smsc911x_poll_controller,
1919 /* copies the current mac address from hardware to dev->dev_addr */
1920 static void __devinit smsc911x_read_mac_address(struct net_device *dev)
1922 struct smsc911x_data *pdata = netdev_priv(dev);
1923 u32 mac_high16 = smsc911x_mac_read(pdata, ADDRH);
1924 u32 mac_low32 = smsc911x_mac_read(pdata, ADDRL);
1926 dev->dev_addr[0] = (u8)(mac_low32);
1927 dev->dev_addr[1] = (u8)(mac_low32 >> 8);
1928 dev->dev_addr[2] = (u8)(mac_low32 >> 16);
1929 dev->dev_addr[3] = (u8)(mac_low32 >> 24);
1930 dev->dev_addr[4] = (u8)(mac_high16);
1931 dev->dev_addr[5] = (u8)(mac_high16 >> 8);
1934 /* Initializing private device structures, only called from probe */
1935 static int __devinit smsc911x_init(struct net_device *dev)
1937 struct smsc911x_data *pdata = netdev_priv(dev);
1938 unsigned int byte_test;
1940 SMSC_TRACE(pdata, probe, "Driver Parameters:");
1941 SMSC_TRACE(pdata, probe, "LAN base: 0x%08lX",
1942 (unsigned long)pdata->ioaddr);
1943 SMSC_TRACE(pdata, probe, "IRQ: %d", dev->irq);
1944 SMSC_TRACE(pdata, probe, "PHY will be autodetected.");
1946 spin_lock_init(&pdata->dev_lock);
1947 spin_lock_init(&pdata->mac_lock);
1949 if (pdata->ioaddr == 0) {
1950 SMSC_WARN(pdata, probe, "pdata->ioaddr: 0x00000000");
1954 /* Check byte ordering */
1955 byte_test = smsc911x_reg_read(pdata, BYTE_TEST);
1956 SMSC_TRACE(pdata, probe, "BYTE_TEST: 0x%08X", byte_test);
1957 if (byte_test == 0x43218765) {
1958 SMSC_TRACE(pdata, probe, "BYTE_TEST looks swapped, "
1959 "applying WORD_SWAP");
1960 smsc911x_reg_write(pdata, WORD_SWAP, 0xffffffff);
1962 /* 1 dummy read of BYTE_TEST is needed after a write to
1963 * WORD_SWAP before its contents are valid */
1964 byte_test = smsc911x_reg_read(pdata, BYTE_TEST);
1966 byte_test = smsc911x_reg_read(pdata, BYTE_TEST);
1969 if (byte_test != 0x87654321) {
1970 SMSC_WARN(pdata, drv, "BYTE_TEST: 0x%08X", byte_test);
1971 if (((byte_test >> 16) & 0xFFFF) == (byte_test & 0xFFFF)) {
1972 SMSC_WARN(pdata, probe,
1973 "top 16 bits equal to bottom 16 bits");
1974 SMSC_TRACE(pdata, probe,
1975 "This may mean the chip is set "
1976 "for 32 bit while the bus is reading 16 bit");
1981 /* Default generation to zero (all workarounds apply) */
1982 pdata->generation = 0;
1984 pdata->idrev = smsc911x_reg_read(pdata, ID_REV);
1985 switch (pdata->idrev & 0xFFFF0000) {
1990 /* LAN911[5678] family */
1991 pdata->generation = pdata->idrev & 0x0000FFFF;
1998 /* LAN921[5678] family */
1999 pdata->generation = 3;
2006 /* LAN9210/LAN9211/LAN9220/LAN9221 */
2007 pdata->generation = 4;
2011 SMSC_WARN(pdata, probe, "LAN911x not identified, idrev: 0x%08X",
2016 SMSC_TRACE(pdata, probe,
2017 "LAN911x identified, idrev: 0x%08X, generation: %d",
2018 pdata->idrev, pdata->generation);
2020 if (pdata->generation == 0)
2021 SMSC_WARN(pdata, probe,
2022 "This driver is not intended for this chip revision");
2024 /* workaround for platforms without an eeprom, where the mac address
2025 * is stored elsewhere and set by the bootloader. This saves the
2026 * mac address before resetting the device */
2027 if (pdata->config.flags & SMSC911X_SAVE_MAC_ADDRESS) {
2028 spin_lock_irq(&pdata->mac_lock);
2029 smsc911x_read_mac_address(dev);
2030 spin_unlock_irq(&pdata->mac_lock);
2033 /* Reset the LAN911x */
2034 if (smsc911x_soft_reset(pdata))
2037 /* Disable all interrupt sources until we bring the device up */
2038 smsc911x_reg_write(pdata, INT_EN, 0);
2041 dev->flags |= IFF_MULTICAST;
2042 netif_napi_add(dev, &pdata->napi, smsc911x_poll, SMSC_NAPI_WEIGHT);
2043 dev->netdev_ops = &smsc911x_netdev_ops;
2044 dev->ethtool_ops = &smsc911x_ethtool_ops;
2049 static int __devexit smsc911x_drv_remove(struct platform_device *pdev)
2051 struct net_device *dev;
2052 struct smsc911x_data *pdata;
2053 struct resource *res;
2055 dev = platform_get_drvdata(pdev);
2057 pdata = netdev_priv(dev);
2059 BUG_ON(!pdata->ioaddr);
2060 BUG_ON(!pdata->phy_dev);
2062 SMSC_TRACE(pdata, ifdown, "Stopping driver");
2064 phy_disconnect(pdata->phy_dev);
2065 pdata->phy_dev = NULL;
2066 mdiobus_unregister(pdata->mii_bus);
2067 mdiobus_free(pdata->mii_bus);
2069 platform_set_drvdata(pdev, NULL);
2070 unregister_netdev(dev);
2071 free_irq(dev->irq, dev);
2072 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
2075 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2077 release_mem_region(res->start, resource_size(res));
2079 iounmap(pdata->ioaddr);
2086 /* standard register acces */
2087 static const struct smsc911x_ops standard_smsc911x_ops = {
2088 .reg_read = __smsc911x_reg_read,
2089 .reg_write = __smsc911x_reg_write,
2090 .rx_readfifo = smsc911x_rx_readfifo,
2091 .tx_writefifo = smsc911x_tx_writefifo,
2094 /* shifted register access */
2095 static const struct smsc911x_ops shifted_smsc911x_ops = {
2096 .reg_read = __smsc911x_reg_read_shift,
2097 .reg_write = __smsc911x_reg_write_shift,
2098 .rx_readfifo = smsc911x_rx_readfifo_shift,
2099 .tx_writefifo = smsc911x_tx_writefifo_shift,
2103 static int __devinit smsc911x_probe_config_dt(
2104 struct smsc911x_platform_config *config,
2105 struct device_node *np)
2113 config->phy_interface = of_get_phy_mode(np);
2115 mac = of_get_mac_address(np);
2117 memcpy(config->mac, mac, ETH_ALEN);
2119 of_property_read_u32(np, "reg-shift", &config->shift);
2121 of_property_read_u32(np, "reg-io-width", &width);
2123 config->flags |= SMSC911X_USE_32BIT;
2125 if (of_get_property(np, "smsc,irq-active-high", NULL))
2126 config->irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_HIGH;
2128 if (of_get_property(np, "smsc,irq-push-pull", NULL))
2129 config->irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL;
2131 if (of_get_property(np, "smsc,force-internal-phy", NULL))
2132 config->flags |= SMSC911X_FORCE_INTERNAL_PHY;
2134 if (of_get_property(np, "smsc,force-external-phy", NULL))
2135 config->flags |= SMSC911X_FORCE_EXTERNAL_PHY;
2137 if (of_get_property(np, "smsc,save-mac-address", NULL))
2138 config->flags |= SMSC911X_SAVE_MAC_ADDRESS;
2143 static inline int smsc911x_probe_config_dt(
2144 struct smsc911x_platform_config *config,
2145 struct device_node *np)
2149 #endif /* CONFIG_OF */
2151 static int __devinit smsc911x_drv_probe(struct platform_device *pdev)
2153 struct device_node *np = pdev->dev.of_node;
2154 struct net_device *dev;
2155 struct smsc911x_data *pdata;
2156 struct smsc911x_platform_config *config = pdev->dev.platform_data;
2157 struct resource *res, *irq_res;
2158 unsigned int intcfg = 0;
2159 int res_size, irq_flags;
2162 pr_info("Driver version %s\n", SMSC_DRV_VERSION);
2164 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
2167 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2169 pr_warn("Could not allocate resource\n");
2173 res_size = resource_size(res);
2175 irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
2177 pr_warn("Could not allocate irq resource\n");
2182 if (!request_mem_region(res->start, res_size, SMSC_CHIPNAME)) {
2187 dev = alloc_etherdev(sizeof(struct smsc911x_data));
2189 pr_warn("Could not allocate device\n");
2191 goto out_release_io_1;
2194 SET_NETDEV_DEV(dev, &pdev->dev);
2196 pdata = netdev_priv(dev);
2198 dev->irq = irq_res->start;
2199 irq_flags = irq_res->flags & IRQF_TRIGGER_MASK;
2200 pdata->ioaddr = ioremap_nocache(res->start, res_size);
2203 pdata->msg_enable = ((1 << debug) - 1);
2205 if (pdata->ioaddr == NULL) {
2206 SMSC_WARN(pdata, probe, "Error smsc911x base address invalid");
2208 goto out_free_netdev_2;
2211 retval = smsc911x_probe_config_dt(&pdata->config, np);
2212 if (retval && config) {
2213 /* copy config parameters across to pdata */
2214 memcpy(&pdata->config, config, sizeof(pdata->config));
2219 SMSC_WARN(pdata, probe, "Error smsc911x config not found");
2220 goto out_unmap_io_3;
2223 /* assume standard, non-shifted, access to HW registers */
2224 pdata->ops = &standard_smsc911x_ops;
2225 /* apply the right access if shifting is needed */
2226 if (pdata->config.shift)
2227 pdata->ops = &shifted_smsc911x_ops;
2229 retval = smsc911x_init(dev);
2231 goto out_unmap_io_3;
2233 /* configure irq polarity and type before connecting isr */
2234 if (pdata->config.irq_polarity == SMSC911X_IRQ_POLARITY_ACTIVE_HIGH)
2235 intcfg |= INT_CFG_IRQ_POL_;
2237 if (pdata->config.irq_type == SMSC911X_IRQ_TYPE_PUSH_PULL)
2238 intcfg |= INT_CFG_IRQ_TYPE_;
2240 smsc911x_reg_write(pdata, INT_CFG, intcfg);
2242 /* Ensure interrupts are globally disabled before connecting ISR */
2243 smsc911x_reg_write(pdata, INT_EN, 0);
2244 smsc911x_reg_write(pdata, INT_STS, 0xFFFFFFFF);
2246 retval = request_irq(dev->irq, smsc911x_irqhandler,
2247 irq_flags | IRQF_SHARED, dev->name, dev);
2249 SMSC_WARN(pdata, probe,
2250 "Unable to claim requested irq: %d", dev->irq);
2251 goto out_unmap_io_3;
2254 platform_set_drvdata(pdev, dev);
2256 retval = register_netdev(dev);
2258 SMSC_WARN(pdata, probe, "Error %i registering device", retval);
2259 goto out_unset_drvdata_4;
2261 SMSC_TRACE(pdata, probe,
2262 "Network interface: \"%s\"", dev->name);
2265 retval = smsc911x_mii_init(pdev, dev);
2267 SMSC_WARN(pdata, probe, "Error %i initialising mii", retval);
2268 goto out_unregister_netdev_5;
2271 spin_lock_irq(&pdata->mac_lock);
2273 /* Check if mac address has been specified when bringing interface up */
2274 if (is_valid_ether_addr(dev->dev_addr)) {
2275 smsc911x_set_hw_mac_address(pdata, dev->dev_addr);
2276 SMSC_TRACE(pdata, probe,
2277 "MAC Address is specified by configuration");
2278 } else if (is_valid_ether_addr(pdata->config.mac)) {
2279 memcpy(dev->dev_addr, pdata->config.mac, 6);
2280 SMSC_TRACE(pdata, probe,
2281 "MAC Address specified by platform data");
2283 /* Try reading mac address from device. if EEPROM is present
2284 * it will already have been set */
2287 if (is_valid_ether_addr(dev->dev_addr)) {
2288 /* eeprom values are valid so use them */
2289 SMSC_TRACE(pdata, probe,
2290 "Mac Address is read from LAN911x EEPROM");
2292 /* eeprom values are invalid, generate random MAC */
2293 random_ether_addr(dev->dev_addr);
2294 smsc911x_set_hw_mac_address(pdata, dev->dev_addr);
2295 SMSC_TRACE(pdata, probe,
2296 "MAC Address is set to random_ether_addr");
2300 spin_unlock_irq(&pdata->mac_lock);
2302 netdev_info(dev, "MAC Address: %pM\n", dev->dev_addr);
2306 out_unregister_netdev_5:
2307 unregister_netdev(dev);
2308 out_unset_drvdata_4:
2309 platform_set_drvdata(pdev, NULL);
2310 free_irq(dev->irq, dev);
2312 iounmap(pdata->ioaddr);
2316 release_mem_region(res->start, resource_size(res));
2322 /* This implementation assumes the devices remains powered on its VDDVARIO
2323 * pins during suspend. */
2325 /* TODO: implement freeze/thaw callbacks for hibernation.*/
2327 static int smsc911x_suspend(struct device *dev)
2329 struct net_device *ndev = dev_get_drvdata(dev);
2330 struct smsc911x_data *pdata = netdev_priv(ndev);
2332 /* enable wake on LAN, energy detection and the external PME
2334 smsc911x_reg_write(pdata, PMT_CTRL,
2335 PMT_CTRL_PM_MODE_D1_ | PMT_CTRL_WOL_EN_ |
2336 PMT_CTRL_ED_EN_ | PMT_CTRL_PME_EN_);
2341 static int smsc911x_resume(struct device *dev)
2343 struct net_device *ndev = dev_get_drvdata(dev);
2344 struct smsc911x_data *pdata = netdev_priv(ndev);
2345 unsigned int to = 100;
2347 /* Note 3.11 from the datasheet:
2348 * "When the LAN9220 is in a power saving state, a write of any
2349 * data to the BYTE_TEST register will wake-up the device."
2351 smsc911x_reg_write(pdata, BYTE_TEST, 0);
2353 /* poll the READY bit in PMT_CTRL. Any other access to the device is
2354 * forbidden while this bit isn't set. Try for 100ms and return -EIO
2356 while (!(smsc911x_reg_read(pdata, PMT_CTRL) & PMT_CTRL_READY_) && --to)
2359 return (to == 0) ? -EIO : 0;
2362 static const struct dev_pm_ops smsc911x_pm_ops = {
2363 .suspend = smsc911x_suspend,
2364 .resume = smsc911x_resume,
2367 #define SMSC911X_PM_OPS (&smsc911x_pm_ops)
2370 #define SMSC911X_PM_OPS NULL
2373 static const struct of_device_id smsc911x_dt_ids[] = {
2374 { .compatible = "smsc,lan9115", },
2377 MODULE_DEVICE_TABLE(of, smsc911x_dt_ids);
2379 static struct platform_driver smsc911x_driver = {
2380 .probe = smsc911x_drv_probe,
2381 .remove = __devexit_p(smsc911x_drv_remove),
2383 .name = SMSC_CHIPNAME,
2384 .owner = THIS_MODULE,
2385 .pm = SMSC911X_PM_OPS,
2386 .of_match_table = smsc911x_dt_ids,
2390 /* Entry point for loading the module */
2391 static int __init smsc911x_init_module(void)
2394 return platform_driver_register(&smsc911x_driver);
2397 /* entry point for unloading the module */
2398 static void __exit smsc911x_cleanup_module(void)
2400 platform_driver_unregister(&smsc911x_driver);
2403 module_init(smsc911x_init_module);
2404 module_exit(smsc911x_cleanup_module);