1 /****************************************************************************
2 * Driver for Solarflare Solarstorm network controllers and boards
3 * Copyright 2005-2006 Fen Systems Ltd.
4 * Copyright 2005-2009 Solarflare Communications Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation, incorporated herein by reference.
11 #include <linux/module.h>
12 #include <linux/pci.h>
13 #include <linux/netdevice.h>
14 #include <linux/etherdevice.h>
15 #include <linux/delay.h>
16 #include <linux/notifier.h>
18 #include <linux/tcp.h>
20 #include <linux/crc32.h>
21 #include <linux/ethtool.h>
22 #include <linux/topology.h>
23 #include <linux/gfp.h>
24 #include "net_driver.h"
30 #include "workarounds.h"
32 /**************************************************************************
36 **************************************************************************
39 /* Loopback mode names (see LOOPBACK_MODE()) */
40 const unsigned int efx_loopback_mode_max = LOOPBACK_MAX;
41 const char *efx_loopback_mode_names[] = {
42 [LOOPBACK_NONE] = "NONE",
43 [LOOPBACK_DATA] = "DATAPATH",
44 [LOOPBACK_GMAC] = "GMAC",
45 [LOOPBACK_XGMII] = "XGMII",
46 [LOOPBACK_XGXS] = "XGXS",
47 [LOOPBACK_XAUI] = "XAUI",
48 [LOOPBACK_GMII] = "GMII",
49 [LOOPBACK_SGMII] = "SGMII",
50 [LOOPBACK_XGBR] = "XGBR",
51 [LOOPBACK_XFI] = "XFI",
52 [LOOPBACK_XAUI_FAR] = "XAUI_FAR",
53 [LOOPBACK_GMII_FAR] = "GMII_FAR",
54 [LOOPBACK_SGMII_FAR] = "SGMII_FAR",
55 [LOOPBACK_XFI_FAR] = "XFI_FAR",
56 [LOOPBACK_GPHY] = "GPHY",
57 [LOOPBACK_PHYXS] = "PHYXS",
58 [LOOPBACK_PCS] = "PCS",
59 [LOOPBACK_PMAPMD] = "PMA/PMD",
60 [LOOPBACK_XPORT] = "XPORT",
61 [LOOPBACK_XGMII_WS] = "XGMII_WS",
62 [LOOPBACK_XAUI_WS] = "XAUI_WS",
63 [LOOPBACK_XAUI_WS_FAR] = "XAUI_WS_FAR",
64 [LOOPBACK_XAUI_WS_NEAR] = "XAUI_WS_NEAR",
65 [LOOPBACK_GMII_WS] = "GMII_WS",
66 [LOOPBACK_XFI_WS] = "XFI_WS",
67 [LOOPBACK_XFI_WS_FAR] = "XFI_WS_FAR",
68 [LOOPBACK_PHYXS_WS] = "PHYXS_WS",
71 /* Interrupt mode names (see INT_MODE())) */
72 const unsigned int efx_interrupt_mode_max = EFX_INT_MODE_MAX;
73 const char *efx_interrupt_mode_names[] = {
74 [EFX_INT_MODE_MSIX] = "MSI-X",
75 [EFX_INT_MODE_MSI] = "MSI",
76 [EFX_INT_MODE_LEGACY] = "legacy",
79 const unsigned int efx_reset_type_max = RESET_TYPE_MAX;
80 const char *efx_reset_type_names[] = {
81 [RESET_TYPE_INVISIBLE] = "INVISIBLE",
82 [RESET_TYPE_ALL] = "ALL",
83 [RESET_TYPE_WORLD] = "WORLD",
84 [RESET_TYPE_DISABLE] = "DISABLE",
85 [RESET_TYPE_TX_WATCHDOG] = "TX_WATCHDOG",
86 [RESET_TYPE_INT_ERROR] = "INT_ERROR",
87 [RESET_TYPE_RX_RECOVERY] = "RX_RECOVERY",
88 [RESET_TYPE_RX_DESC_FETCH] = "RX_DESC_FETCH",
89 [RESET_TYPE_TX_DESC_FETCH] = "TX_DESC_FETCH",
90 [RESET_TYPE_TX_SKIP] = "TX_SKIP",
91 [RESET_TYPE_MC_FAILURE] = "MC_FAILURE",
94 #define EFX_MAX_MTU (9 * 1024)
96 /* Reset workqueue. If any NIC has a hardware failure then a reset will be
97 * queued onto this work queue. This is not a per-nic work queue, because
98 * efx_reset_work() acquires the rtnl lock, so resets are naturally serialised.
100 static struct workqueue_struct *reset_workqueue;
102 /**************************************************************************
104 * Configurable values
106 *************************************************************************/
109 * Use separate channels for TX and RX events
111 * Set this to 1 to use separate channels for TX and RX. It allows us
112 * to control interrupt affinity separately for TX and RX.
114 * This is only used in MSI-X interrupt mode
116 static unsigned int separate_tx_channels;
117 module_param(separate_tx_channels, uint, 0444);
118 MODULE_PARM_DESC(separate_tx_channels,
119 "Use separate channels for TX and RX");
121 /* This is the weight assigned to each of the (per-channel) virtual
124 static int napi_weight = 64;
126 /* This is the time (in jiffies) between invocations of the hardware
127 * monitor, which checks for known hardware bugs and resets the
128 * hardware and driver as necessary.
130 unsigned int efx_monitor_interval = 1 * HZ;
132 /* This controls whether or not the driver will initialise devices
133 * with invalid MAC addresses stored in the EEPROM or flash. If true,
134 * such devices will be initialised with a random locally-generated
135 * MAC address. This allows for loading the sfc_mtd driver to
136 * reprogram the flash, even if the flash contents (including the MAC
137 * address) have previously been erased.
139 static unsigned int allow_bad_hwaddr;
141 /* Initial interrupt moderation settings. They can be modified after
142 * module load with ethtool.
144 * The default for RX should strike a balance between increasing the
145 * round-trip latency and reducing overhead.
147 static unsigned int rx_irq_mod_usec = 60;
149 /* Initial interrupt moderation settings. They can be modified after
150 * module load with ethtool.
152 * This default is chosen to ensure that a 10G link does not go idle
153 * while a TX queue is stopped after it has become full. A queue is
154 * restarted when it drops below half full. The time this takes (assuming
155 * worst case 3 descriptors per packet and 1024 descriptors) is
156 * 512 / 3 * 1.2 = 205 usec.
158 static unsigned int tx_irq_mod_usec = 150;
160 /* This is the first interrupt mode to try out of:
165 static unsigned int interrupt_mode;
167 /* This is the requested number of CPUs to use for Receive-Side Scaling (RSS),
168 * i.e. the number of CPUs among which we may distribute simultaneous
169 * interrupt handling.
171 * Cards without MSI-X will only target one CPU via legacy or MSI interrupt.
172 * The default (0) means to assign an interrupt to each package (level II cache)
174 static unsigned int rss_cpus;
175 module_param(rss_cpus, uint, 0444);
176 MODULE_PARM_DESC(rss_cpus, "Number of CPUs to use for Receive-Side Scaling");
178 static int phy_flash_cfg;
179 module_param(phy_flash_cfg, int, 0644);
180 MODULE_PARM_DESC(phy_flash_cfg, "Set PHYs into reflash mode initially");
182 static unsigned irq_adapt_low_thresh = 10000;
183 module_param(irq_adapt_low_thresh, uint, 0644);
184 MODULE_PARM_DESC(irq_adapt_low_thresh,
185 "Threshold score for reducing IRQ moderation");
187 static unsigned irq_adapt_high_thresh = 20000;
188 module_param(irq_adapt_high_thresh, uint, 0644);
189 MODULE_PARM_DESC(irq_adapt_high_thresh,
190 "Threshold score for increasing IRQ moderation");
192 static unsigned debug = (NETIF_MSG_DRV | NETIF_MSG_PROBE |
193 NETIF_MSG_LINK | NETIF_MSG_IFDOWN |
194 NETIF_MSG_IFUP | NETIF_MSG_RX_ERR |
195 NETIF_MSG_TX_ERR | NETIF_MSG_HW);
196 module_param(debug, uint, 0);
197 MODULE_PARM_DESC(debug, "Bitmapped debugging message enable value");
199 /**************************************************************************
201 * Utility functions and prototypes
203 *************************************************************************/
205 static void efx_remove_channels(struct efx_nic *efx);
206 static void efx_remove_port(struct efx_nic *efx);
207 static void efx_fini_napi(struct efx_nic *efx);
208 static void efx_fini_struct(struct efx_nic *efx);
209 static void efx_start_all(struct efx_nic *efx);
210 static void efx_stop_all(struct efx_nic *efx);
212 #define EFX_ASSERT_RESET_SERIALISED(efx) \
214 if ((efx->state == STATE_RUNNING) || \
215 (efx->state == STATE_DISABLED)) \
219 /**************************************************************************
221 * Event queue processing
223 *************************************************************************/
225 /* Process channel's event queue
227 * This function is responsible for processing the event queue of a
228 * single channel. The caller must guarantee that this function will
229 * never be concurrently called more than once on the same channel,
230 * though different channels may be being processed concurrently.
232 static int efx_process_channel(struct efx_channel *channel, int budget)
234 struct efx_nic *efx = channel->efx;
237 if (unlikely(efx->reset_pending != RESET_TYPE_NONE ||
241 spent = efx_nic_process_eventq(channel, budget);
245 /* Deliver last RX packet. */
246 if (channel->rx_pkt) {
247 __efx_rx_packet(channel, channel->rx_pkt,
248 channel->rx_pkt_csummed);
249 channel->rx_pkt = NULL;
252 efx_rx_strategy(channel);
254 efx_fast_push_rx_descriptors(efx_channel_get_rx_queue(channel));
259 /* Mark channel as finished processing
261 * Note that since we will not receive further interrupts for this
262 * channel before we finish processing and call the eventq_read_ack()
263 * method, there is no need to use the interrupt hold-off timers.
265 static inline void efx_channel_processed(struct efx_channel *channel)
267 /* The interrupt handler for this channel may set work_pending
268 * as soon as we acknowledge the events we've seen. Make sure
269 * it's cleared before then. */
270 channel->work_pending = false;
273 efx_nic_eventq_read_ack(channel);
278 * NAPI guarantees serialisation of polls of the same device, which
279 * provides the guarantee required by efx_process_channel().
281 static int efx_poll(struct napi_struct *napi, int budget)
283 struct efx_channel *channel =
284 container_of(napi, struct efx_channel, napi_str);
285 struct efx_nic *efx = channel->efx;
288 netif_vdbg(efx, intr, efx->net_dev,
289 "channel %d NAPI poll executing on CPU %d\n",
290 channel->channel, raw_smp_processor_id());
292 spent = efx_process_channel(channel, budget);
294 if (spent < budget) {
295 if (channel->channel < efx->n_rx_channels &&
296 efx->irq_rx_adaptive &&
297 unlikely(++channel->irq_count == 1000)) {
298 if (unlikely(channel->irq_mod_score <
299 irq_adapt_low_thresh)) {
300 if (channel->irq_moderation > 1) {
301 channel->irq_moderation -= 1;
302 efx->type->push_irq_moderation(channel);
304 } else if (unlikely(channel->irq_mod_score >
305 irq_adapt_high_thresh)) {
306 if (channel->irq_moderation <
307 efx->irq_rx_moderation) {
308 channel->irq_moderation += 1;
309 efx->type->push_irq_moderation(channel);
312 channel->irq_count = 0;
313 channel->irq_mod_score = 0;
316 /* There is no race here; although napi_disable() will
317 * only wait for napi_complete(), this isn't a problem
318 * since efx_channel_processed() will have no effect if
319 * interrupts have already been disabled.
322 efx_channel_processed(channel);
328 /* Process the eventq of the specified channel immediately on this CPU
330 * Disable hardware generated interrupts, wait for any existing
331 * processing to finish, then directly poll (and ack ) the eventq.
332 * Finally reenable NAPI and interrupts.
334 * Since we are touching interrupts the caller should hold the suspend lock
336 void efx_process_channel_now(struct efx_channel *channel)
338 struct efx_nic *efx = channel->efx;
340 BUG_ON(channel->channel >= efx->n_channels);
341 BUG_ON(!channel->enabled);
343 /* Disable interrupts and wait for ISRs to complete */
344 efx_nic_disable_interrupts(efx);
346 synchronize_irq(efx->legacy_irq);
348 synchronize_irq(channel->irq);
350 /* Wait for any NAPI processing to complete */
351 napi_disable(&channel->napi_str);
353 /* Poll the channel */
354 efx_process_channel(channel, channel->eventq_mask + 1);
356 /* Ack the eventq. This may cause an interrupt to be generated
357 * when they are reenabled */
358 efx_channel_processed(channel);
360 napi_enable(&channel->napi_str);
361 efx_nic_enable_interrupts(efx);
364 /* Create event queue
365 * Event queue memory allocations are done only once. If the channel
366 * is reset, the memory buffer will be reused; this guards against
367 * errors during channel reset and also simplifies interrupt handling.
369 static int efx_probe_eventq(struct efx_channel *channel)
371 struct efx_nic *efx = channel->efx;
372 unsigned long entries;
374 netif_dbg(channel->efx, probe, channel->efx->net_dev,
375 "chan %d create event queue\n", channel->channel);
377 /* Build an event queue with room for one event per tx and rx buffer,
378 * plus some extra for link state events and MCDI completions. */
379 entries = roundup_pow_of_two(efx->rxq_entries + efx->txq_entries + 128);
380 EFX_BUG_ON_PARANOID(entries > EFX_MAX_EVQ_SIZE);
381 channel->eventq_mask = max(entries, EFX_MIN_EVQ_SIZE) - 1;
383 return efx_nic_probe_eventq(channel);
386 /* Prepare channel's event queue */
387 static void efx_init_eventq(struct efx_channel *channel)
389 netif_dbg(channel->efx, drv, channel->efx->net_dev,
390 "chan %d init event queue\n", channel->channel);
392 channel->eventq_read_ptr = 0;
394 efx_nic_init_eventq(channel);
397 static void efx_fini_eventq(struct efx_channel *channel)
399 netif_dbg(channel->efx, drv, channel->efx->net_dev,
400 "chan %d fini event queue\n", channel->channel);
402 efx_nic_fini_eventq(channel);
405 static void efx_remove_eventq(struct efx_channel *channel)
407 netif_dbg(channel->efx, drv, channel->efx->net_dev,
408 "chan %d remove event queue\n", channel->channel);
410 efx_nic_remove_eventq(channel);
413 /**************************************************************************
417 *************************************************************************/
419 /* Allocate and initialise a channel structure, optionally copying
420 * parameters (but not resources) from an old channel structure. */
421 static struct efx_channel *
422 efx_alloc_channel(struct efx_nic *efx, int i, struct efx_channel *old_channel)
424 struct efx_channel *channel;
425 struct efx_rx_queue *rx_queue;
426 struct efx_tx_queue *tx_queue;
430 channel = kmalloc(sizeof(*channel), GFP_KERNEL);
434 *channel = *old_channel;
436 memset(&channel->eventq, 0, sizeof(channel->eventq));
438 rx_queue = &channel->rx_queue;
439 rx_queue->buffer = NULL;
440 memset(&rx_queue->rxd, 0, sizeof(rx_queue->rxd));
442 for (j = 0; j < EFX_TXQ_TYPES; j++) {
443 tx_queue = &channel->tx_queue[j];
444 if (tx_queue->channel)
445 tx_queue->channel = channel;
446 tx_queue->buffer = NULL;
447 memset(&tx_queue->txd, 0, sizeof(tx_queue->txd));
450 channel = kzalloc(sizeof(*channel), GFP_KERNEL);
455 channel->channel = i;
457 for (j = 0; j < EFX_TXQ_TYPES; j++) {
458 tx_queue = &channel->tx_queue[j];
460 tx_queue->queue = i * EFX_TXQ_TYPES + j;
461 tx_queue->channel = channel;
465 spin_lock_init(&channel->tx_stop_lock);
466 atomic_set(&channel->tx_stop_count, 1);
468 rx_queue = &channel->rx_queue;
470 setup_timer(&rx_queue->slow_fill, efx_rx_slow_fill,
471 (unsigned long)rx_queue);
476 static int efx_probe_channel(struct efx_channel *channel)
478 struct efx_tx_queue *tx_queue;
479 struct efx_rx_queue *rx_queue;
482 netif_dbg(channel->efx, probe, channel->efx->net_dev,
483 "creating channel %d\n", channel->channel);
485 rc = efx_probe_eventq(channel);
489 efx_for_each_channel_tx_queue(tx_queue, channel) {
490 rc = efx_probe_tx_queue(tx_queue);
495 efx_for_each_channel_rx_queue(rx_queue, channel) {
496 rc = efx_probe_rx_queue(rx_queue);
501 channel->n_rx_frm_trunc = 0;
506 efx_for_each_channel_rx_queue(rx_queue, channel)
507 efx_remove_rx_queue(rx_queue);
509 efx_for_each_channel_tx_queue(tx_queue, channel)
510 efx_remove_tx_queue(tx_queue);
516 static void efx_set_channel_names(struct efx_nic *efx)
518 struct efx_channel *channel;
519 const char *type = "";
522 efx_for_each_channel(channel, efx) {
523 number = channel->channel;
524 if (efx->n_channels > efx->n_rx_channels) {
525 if (channel->channel < efx->n_rx_channels) {
529 number -= efx->n_rx_channels;
532 snprintf(efx->channel_name[channel->channel],
533 sizeof(efx->channel_name[0]),
534 "%s%s-%d", efx->name, type, number);
538 static int efx_probe_channels(struct efx_nic *efx)
540 struct efx_channel *channel;
543 /* Restart special buffer allocation */
544 efx->next_buffer_table = 0;
546 efx_for_each_channel(channel, efx) {
547 rc = efx_probe_channel(channel);
549 netif_err(efx, probe, efx->net_dev,
550 "failed to create channel %d\n",
555 efx_set_channel_names(efx);
560 efx_remove_channels(efx);
564 /* Channels are shutdown and reinitialised whilst the NIC is running
565 * to propagate configuration changes (mtu, checksum offload), or
566 * to clear hardware error conditions
568 static void efx_init_channels(struct efx_nic *efx)
570 struct efx_tx_queue *tx_queue;
571 struct efx_rx_queue *rx_queue;
572 struct efx_channel *channel;
574 /* Calculate the rx buffer allocation parameters required to
575 * support the current MTU, including padding for header
576 * alignment and overruns.
578 efx->rx_buffer_len = (max(EFX_PAGE_IP_ALIGN, NET_IP_ALIGN) +
579 EFX_MAX_FRAME_LEN(efx->net_dev->mtu) +
580 efx->type->rx_buffer_hash_size +
581 efx->type->rx_buffer_padding);
582 efx->rx_buffer_order = get_order(efx->rx_buffer_len +
583 sizeof(struct efx_rx_page_state));
585 /* Initialise the channels */
586 efx_for_each_channel(channel, efx) {
587 netif_dbg(channel->efx, drv, channel->efx->net_dev,
588 "init chan %d\n", channel->channel);
590 efx_init_eventq(channel);
592 efx_for_each_channel_tx_queue(tx_queue, channel)
593 efx_init_tx_queue(tx_queue);
595 /* The rx buffer allocation strategy is MTU dependent */
596 efx_rx_strategy(channel);
598 efx_for_each_channel_rx_queue(rx_queue, channel)
599 efx_init_rx_queue(rx_queue);
601 WARN_ON(channel->rx_pkt != NULL);
602 efx_rx_strategy(channel);
606 /* This enables event queue processing and packet transmission.
608 * Note that this function is not allowed to fail, since that would
609 * introduce too much complexity into the suspend/resume path.
611 static void efx_start_channel(struct efx_channel *channel)
613 struct efx_rx_queue *rx_queue;
615 netif_dbg(channel->efx, ifup, channel->efx->net_dev,
616 "starting chan %d\n", channel->channel);
618 /* The interrupt handler for this channel may set work_pending
619 * as soon as we enable it. Make sure it's cleared before
620 * then. Similarly, make sure it sees the enabled flag set. */
621 channel->work_pending = false;
622 channel->enabled = true;
625 /* Fill the queues before enabling NAPI */
626 efx_for_each_channel_rx_queue(rx_queue, channel)
627 efx_fast_push_rx_descriptors(rx_queue);
629 napi_enable(&channel->napi_str);
632 /* This disables event queue processing and packet transmission.
633 * This function does not guarantee that all queue processing
634 * (e.g. RX refill) is complete.
636 static void efx_stop_channel(struct efx_channel *channel)
638 if (!channel->enabled)
641 netif_dbg(channel->efx, ifdown, channel->efx->net_dev,
642 "stop chan %d\n", channel->channel);
644 channel->enabled = false;
645 napi_disable(&channel->napi_str);
648 static void efx_fini_channels(struct efx_nic *efx)
650 struct efx_channel *channel;
651 struct efx_tx_queue *tx_queue;
652 struct efx_rx_queue *rx_queue;
655 EFX_ASSERT_RESET_SERIALISED(efx);
656 BUG_ON(efx->port_enabled);
658 rc = efx_nic_flush_queues(efx);
659 if (rc && EFX_WORKAROUND_7803(efx)) {
660 /* Schedule a reset to recover from the flush failure. The
661 * descriptor caches reference memory we're about to free,
662 * but falcon_reconfigure_mac_wrapper() won't reconnect
663 * the MACs because of the pending reset. */
664 netif_err(efx, drv, efx->net_dev,
665 "Resetting to recover from flush failure\n");
666 efx_schedule_reset(efx, RESET_TYPE_ALL);
668 netif_err(efx, drv, efx->net_dev, "failed to flush queues\n");
670 netif_dbg(efx, drv, efx->net_dev,
671 "successfully flushed all queues\n");
674 efx_for_each_channel(channel, efx) {
675 netif_dbg(channel->efx, drv, channel->efx->net_dev,
676 "shut down chan %d\n", channel->channel);
678 efx_for_each_channel_rx_queue(rx_queue, channel)
679 efx_fini_rx_queue(rx_queue);
680 efx_for_each_channel_tx_queue(tx_queue, channel)
681 efx_fini_tx_queue(tx_queue);
682 efx_fini_eventq(channel);
686 static void efx_remove_channel(struct efx_channel *channel)
688 struct efx_tx_queue *tx_queue;
689 struct efx_rx_queue *rx_queue;
691 netif_dbg(channel->efx, drv, channel->efx->net_dev,
692 "destroy chan %d\n", channel->channel);
694 efx_for_each_channel_rx_queue(rx_queue, channel)
695 efx_remove_rx_queue(rx_queue);
696 efx_for_each_channel_tx_queue(tx_queue, channel)
697 efx_remove_tx_queue(tx_queue);
698 efx_remove_eventq(channel);
701 static void efx_remove_channels(struct efx_nic *efx)
703 struct efx_channel *channel;
705 efx_for_each_channel(channel, efx)
706 efx_remove_channel(channel);
710 efx_realloc_channels(struct efx_nic *efx, u32 rxq_entries, u32 txq_entries)
712 struct efx_channel *other_channel[EFX_MAX_CHANNELS], *channel;
713 u32 old_rxq_entries, old_txq_entries;
718 efx_fini_channels(efx);
721 memset(other_channel, 0, sizeof(other_channel));
722 for (i = 0; i < efx->n_channels; i++) {
723 channel = efx_alloc_channel(efx, i, efx->channel[i]);
728 other_channel[i] = channel;
731 /* Swap entry counts and channel pointers */
732 old_rxq_entries = efx->rxq_entries;
733 old_txq_entries = efx->txq_entries;
734 efx->rxq_entries = rxq_entries;
735 efx->txq_entries = txq_entries;
736 for (i = 0; i < efx->n_channels; i++) {
737 channel = efx->channel[i];
738 efx->channel[i] = other_channel[i];
739 other_channel[i] = channel;
742 rc = efx_probe_channels(efx);
746 /* Destroy old channels */
747 for (i = 0; i < efx->n_channels; i++)
748 efx_remove_channel(other_channel[i]);
750 /* Free unused channel structures */
751 for (i = 0; i < efx->n_channels; i++)
752 kfree(other_channel[i]);
754 efx_init_channels(efx);
760 efx->rxq_entries = old_rxq_entries;
761 efx->txq_entries = old_txq_entries;
762 for (i = 0; i < efx->n_channels; i++) {
763 channel = efx->channel[i];
764 efx->channel[i] = other_channel[i];
765 other_channel[i] = channel;
770 void efx_schedule_slow_fill(struct efx_rx_queue *rx_queue)
772 mod_timer(&rx_queue->slow_fill, jiffies + msecs_to_jiffies(100));
775 /**************************************************************************
779 **************************************************************************/
781 /* This ensures that the kernel is kept informed (via
782 * netif_carrier_on/off) of the link status, and also maintains the
783 * link status's stop on the port's TX queue.
785 void efx_link_status_changed(struct efx_nic *efx)
787 struct efx_link_state *link_state = &efx->link_state;
789 /* SFC Bug 5356: A net_dev notifier is registered, so we must ensure
790 * that no events are triggered between unregister_netdev() and the
791 * driver unloading. A more general condition is that NETDEV_CHANGE
792 * can only be generated between NETDEV_UP and NETDEV_DOWN */
793 if (!netif_running(efx->net_dev))
796 if (efx->port_inhibited) {
797 netif_carrier_off(efx->net_dev);
801 if (link_state->up != netif_carrier_ok(efx->net_dev)) {
802 efx->n_link_state_changes++;
805 netif_carrier_on(efx->net_dev);
807 netif_carrier_off(efx->net_dev);
810 /* Status message for kernel log */
811 if (link_state->up) {
812 netif_info(efx, link, efx->net_dev,
813 "link up at %uMbps %s-duplex (MTU %d)%s\n",
814 link_state->speed, link_state->fd ? "full" : "half",
816 (efx->promiscuous ? " [PROMISC]" : ""));
818 netif_info(efx, link, efx->net_dev, "link down\n");
823 void efx_link_set_advertising(struct efx_nic *efx, u32 advertising)
825 efx->link_advertising = advertising;
827 if (advertising & ADVERTISED_Pause)
828 efx->wanted_fc |= (EFX_FC_TX | EFX_FC_RX);
830 efx->wanted_fc &= ~(EFX_FC_TX | EFX_FC_RX);
831 if (advertising & ADVERTISED_Asym_Pause)
832 efx->wanted_fc ^= EFX_FC_TX;
836 void efx_link_set_wanted_fc(struct efx_nic *efx, enum efx_fc_type wanted_fc)
838 efx->wanted_fc = wanted_fc;
839 if (efx->link_advertising) {
840 if (wanted_fc & EFX_FC_RX)
841 efx->link_advertising |= (ADVERTISED_Pause |
842 ADVERTISED_Asym_Pause);
844 efx->link_advertising &= ~(ADVERTISED_Pause |
845 ADVERTISED_Asym_Pause);
846 if (wanted_fc & EFX_FC_TX)
847 efx->link_advertising ^= ADVERTISED_Asym_Pause;
851 static void efx_fini_port(struct efx_nic *efx);
853 /* Push loopback/power/transmit disable settings to the PHY, and reconfigure
854 * the MAC appropriately. All other PHY configuration changes are pushed
855 * through phy_op->set_settings(), and pushed asynchronously to the MAC
856 * through efx_monitor().
858 * Callers must hold the mac_lock
860 int __efx_reconfigure_port(struct efx_nic *efx)
862 enum efx_phy_mode phy_mode;
865 WARN_ON(!mutex_is_locked(&efx->mac_lock));
867 /* Serialise the promiscuous flag with efx_set_multicast_list. */
868 if (efx_dev_registered(efx)) {
869 netif_addr_lock_bh(efx->net_dev);
870 netif_addr_unlock_bh(efx->net_dev);
873 /* Disable PHY transmit in mac level loopbacks */
874 phy_mode = efx->phy_mode;
875 if (LOOPBACK_INTERNAL(efx))
876 efx->phy_mode |= PHY_MODE_TX_DISABLED;
878 efx->phy_mode &= ~PHY_MODE_TX_DISABLED;
880 rc = efx->type->reconfigure_port(efx);
883 efx->phy_mode = phy_mode;
888 /* Reinitialise the MAC to pick up new PHY settings, even if the port is
890 int efx_reconfigure_port(struct efx_nic *efx)
894 EFX_ASSERT_RESET_SERIALISED(efx);
896 mutex_lock(&efx->mac_lock);
897 rc = __efx_reconfigure_port(efx);
898 mutex_unlock(&efx->mac_lock);
903 /* Asynchronous work item for changing MAC promiscuity and multicast
904 * hash. Avoid a drain/rx_ingress enable by reconfiguring the current
906 static void efx_mac_work(struct work_struct *data)
908 struct efx_nic *efx = container_of(data, struct efx_nic, mac_work);
910 mutex_lock(&efx->mac_lock);
911 if (efx->port_enabled) {
912 efx->type->push_multicast_hash(efx);
913 efx->mac_op->reconfigure(efx);
915 mutex_unlock(&efx->mac_lock);
918 static int efx_probe_port(struct efx_nic *efx)
922 netif_dbg(efx, probe, efx->net_dev, "create port\n");
925 efx->phy_mode = PHY_MODE_SPECIAL;
927 /* Connect up MAC/PHY operations table */
928 rc = efx->type->probe_port(efx);
932 /* Sanity check MAC address */
933 if (is_valid_ether_addr(efx->mac_address)) {
934 memcpy(efx->net_dev->dev_addr, efx->mac_address, ETH_ALEN);
936 netif_err(efx, probe, efx->net_dev, "invalid MAC address %pM\n",
938 if (!allow_bad_hwaddr) {
942 random_ether_addr(efx->net_dev->dev_addr);
943 netif_info(efx, probe, efx->net_dev,
944 "using locally-generated MAC %pM\n",
945 efx->net_dev->dev_addr);
951 efx->type->remove_port(efx);
955 static int efx_init_port(struct efx_nic *efx)
959 netif_dbg(efx, drv, efx->net_dev, "init port\n");
961 mutex_lock(&efx->mac_lock);
963 rc = efx->phy_op->init(efx);
967 efx->port_initialized = true;
969 /* Reconfigure the MAC before creating dma queues (required for
970 * Falcon/A1 where RX_INGR_EN/TX_DRAIN_EN isn't supported) */
971 efx->mac_op->reconfigure(efx);
973 /* Ensure the PHY advertises the correct flow control settings */
974 rc = efx->phy_op->reconfigure(efx);
978 mutex_unlock(&efx->mac_lock);
982 efx->phy_op->fini(efx);
984 mutex_unlock(&efx->mac_lock);
988 static void efx_start_port(struct efx_nic *efx)
990 netif_dbg(efx, ifup, efx->net_dev, "start port\n");
991 BUG_ON(efx->port_enabled);
993 mutex_lock(&efx->mac_lock);
994 efx->port_enabled = true;
996 /* efx_mac_work() might have been scheduled after efx_stop_port(),
997 * and then cancelled by efx_flush_all() */
998 efx->type->push_multicast_hash(efx);
999 efx->mac_op->reconfigure(efx);
1001 mutex_unlock(&efx->mac_lock);
1004 /* Prevent efx_mac_work() and efx_monitor() from working */
1005 static void efx_stop_port(struct efx_nic *efx)
1007 netif_dbg(efx, ifdown, efx->net_dev, "stop port\n");
1009 mutex_lock(&efx->mac_lock);
1010 efx->port_enabled = false;
1011 mutex_unlock(&efx->mac_lock);
1013 /* Serialise against efx_set_multicast_list() */
1014 if (efx_dev_registered(efx)) {
1015 netif_addr_lock_bh(efx->net_dev);
1016 netif_addr_unlock_bh(efx->net_dev);
1020 static void efx_fini_port(struct efx_nic *efx)
1022 netif_dbg(efx, drv, efx->net_dev, "shut down port\n");
1024 if (!efx->port_initialized)
1027 efx->phy_op->fini(efx);
1028 efx->port_initialized = false;
1030 efx->link_state.up = false;
1031 efx_link_status_changed(efx);
1034 static void efx_remove_port(struct efx_nic *efx)
1036 netif_dbg(efx, drv, efx->net_dev, "destroying port\n");
1038 efx->type->remove_port(efx);
1041 /**************************************************************************
1045 **************************************************************************/
1047 /* This configures the PCI device to enable I/O and DMA. */
1048 static int efx_init_io(struct efx_nic *efx)
1050 struct pci_dev *pci_dev = efx->pci_dev;
1051 dma_addr_t dma_mask = efx->type->max_dma_mask;
1054 netif_dbg(efx, probe, efx->net_dev, "initialising I/O\n");
1056 rc = pci_enable_device(pci_dev);
1058 netif_err(efx, probe, efx->net_dev,
1059 "failed to enable PCI device\n");
1063 pci_set_master(pci_dev);
1065 /* Set the PCI DMA mask. Try all possibilities from our
1066 * genuine mask down to 32 bits, because some architectures
1067 * (e.g. x86_64 with iommu_sac_force set) will allow 40 bit
1068 * masks event though they reject 46 bit masks.
1070 while (dma_mask > 0x7fffffffUL) {
1071 if (pci_dma_supported(pci_dev, dma_mask) &&
1072 ((rc = pci_set_dma_mask(pci_dev, dma_mask)) == 0))
1077 netif_err(efx, probe, efx->net_dev,
1078 "could not find a suitable DMA mask\n");
1081 netif_dbg(efx, probe, efx->net_dev,
1082 "using DMA mask %llx\n", (unsigned long long) dma_mask);
1083 rc = pci_set_consistent_dma_mask(pci_dev, dma_mask);
1085 /* pci_set_consistent_dma_mask() is not *allowed* to
1086 * fail with a mask that pci_set_dma_mask() accepted,
1087 * but just in case...
1089 netif_err(efx, probe, efx->net_dev,
1090 "failed to set consistent DMA mask\n");
1094 efx->membase_phys = pci_resource_start(efx->pci_dev, EFX_MEM_BAR);
1095 rc = pci_request_region(pci_dev, EFX_MEM_BAR, "sfc");
1097 netif_err(efx, probe, efx->net_dev,
1098 "request for memory BAR failed\n");
1102 efx->membase = ioremap_nocache(efx->membase_phys,
1103 efx->type->mem_map_size);
1104 if (!efx->membase) {
1105 netif_err(efx, probe, efx->net_dev,
1106 "could not map memory BAR at %llx+%x\n",
1107 (unsigned long long)efx->membase_phys,
1108 efx->type->mem_map_size);
1112 netif_dbg(efx, probe, efx->net_dev,
1113 "memory BAR at %llx+%x (virtual %p)\n",
1114 (unsigned long long)efx->membase_phys,
1115 efx->type->mem_map_size, efx->membase);
1120 pci_release_region(efx->pci_dev, EFX_MEM_BAR);
1122 efx->membase_phys = 0;
1124 pci_disable_device(efx->pci_dev);
1129 static void efx_fini_io(struct efx_nic *efx)
1131 netif_dbg(efx, drv, efx->net_dev, "shutting down I/O\n");
1134 iounmap(efx->membase);
1135 efx->membase = NULL;
1138 if (efx->membase_phys) {
1139 pci_release_region(efx->pci_dev, EFX_MEM_BAR);
1140 efx->membase_phys = 0;
1143 pci_disable_device(efx->pci_dev);
1146 /* Get number of channels wanted. Each channel will have its own IRQ,
1147 * 1 RX queue and/or 2 TX queues. */
1148 static int efx_wanted_channels(void)
1150 cpumask_var_t core_mask;
1154 if (unlikely(!zalloc_cpumask_var(&core_mask, GFP_KERNEL))) {
1156 "sfc: RSS disabled due to allocation failure\n");
1161 for_each_online_cpu(cpu) {
1162 if (!cpumask_test_cpu(cpu, core_mask)) {
1164 cpumask_or(core_mask, core_mask,
1165 topology_core_cpumask(cpu));
1169 free_cpumask_var(core_mask);
1173 /* Probe the number and type of interrupts we are able to obtain, and
1174 * the resulting numbers of channels and RX queues.
1176 static void efx_probe_interrupts(struct efx_nic *efx)
1179 min_t(int, efx->type->phys_addr_channels, EFX_MAX_CHANNELS);
1182 if (efx->interrupt_mode == EFX_INT_MODE_MSIX) {
1183 struct msix_entry xentries[EFX_MAX_CHANNELS];
1186 n_channels = efx_wanted_channels();
1187 if (separate_tx_channels)
1189 n_channels = min(n_channels, max_channels);
1191 for (i = 0; i < n_channels; i++)
1192 xentries[i].entry = i;
1193 rc = pci_enable_msix(efx->pci_dev, xentries, n_channels);
1195 netif_err(efx, drv, efx->net_dev,
1196 "WARNING: Insufficient MSI-X vectors"
1197 " available (%d < %d).\n", rc, n_channels);
1198 netif_err(efx, drv, efx->net_dev,
1199 "WARNING: Performance may be reduced.\n");
1200 EFX_BUG_ON_PARANOID(rc >= n_channels);
1202 rc = pci_enable_msix(efx->pci_dev, xentries,
1207 efx->n_channels = n_channels;
1208 if (separate_tx_channels) {
1209 efx->n_tx_channels =
1210 max(efx->n_channels / 2, 1U);
1211 efx->n_rx_channels =
1212 max(efx->n_channels -
1213 efx->n_tx_channels, 1U);
1215 efx->n_tx_channels = efx->n_channels;
1216 efx->n_rx_channels = efx->n_channels;
1218 for (i = 0; i < n_channels; i++)
1219 efx_get_channel(efx, i)->irq =
1222 /* Fall back to single channel MSI */
1223 efx->interrupt_mode = EFX_INT_MODE_MSI;
1224 netif_err(efx, drv, efx->net_dev,
1225 "could not enable MSI-X\n");
1229 /* Try single interrupt MSI */
1230 if (efx->interrupt_mode == EFX_INT_MODE_MSI) {
1231 efx->n_channels = 1;
1232 efx->n_rx_channels = 1;
1233 efx->n_tx_channels = 1;
1234 rc = pci_enable_msi(efx->pci_dev);
1236 efx_get_channel(efx, 0)->irq = efx->pci_dev->irq;
1238 netif_err(efx, drv, efx->net_dev,
1239 "could not enable MSI\n");
1240 efx->interrupt_mode = EFX_INT_MODE_LEGACY;
1244 /* Assume legacy interrupts */
1245 if (efx->interrupt_mode == EFX_INT_MODE_LEGACY) {
1246 efx->n_channels = 1 + (separate_tx_channels ? 1 : 0);
1247 efx->n_rx_channels = 1;
1248 efx->n_tx_channels = 1;
1249 efx->legacy_irq = efx->pci_dev->irq;
1253 static void efx_remove_interrupts(struct efx_nic *efx)
1255 struct efx_channel *channel;
1257 /* Remove MSI/MSI-X interrupts */
1258 efx_for_each_channel(channel, efx)
1260 pci_disable_msi(efx->pci_dev);
1261 pci_disable_msix(efx->pci_dev);
1263 /* Remove legacy interrupt */
1264 efx->legacy_irq = 0;
1267 struct efx_tx_queue *
1268 efx_get_tx_queue(struct efx_nic *efx, unsigned index, unsigned type)
1270 unsigned tx_channel_offset =
1271 separate_tx_channels ? efx->n_channels - efx->n_tx_channels : 0;
1272 EFX_BUG_ON_PARANOID(index >= efx->n_tx_channels ||
1273 type >= EFX_TXQ_TYPES);
1274 return &efx->channel[tx_channel_offset + index]->tx_queue[type];
1277 static void efx_set_channels(struct efx_nic *efx)
1279 struct efx_channel *channel;
1280 struct efx_tx_queue *tx_queue;
1281 unsigned tx_channel_offset =
1282 separate_tx_channels ? efx->n_channels - efx->n_tx_channels : 0;
1284 /* Channel pointers were set in efx_init_struct() but we now
1285 * need to clear them for TX queues in any RX-only channels. */
1286 efx_for_each_channel(channel, efx) {
1287 if (channel->channel - tx_channel_offset >=
1288 efx->n_tx_channels) {
1289 efx_for_each_channel_tx_queue(tx_queue, channel)
1290 tx_queue->channel = NULL;
1295 static int efx_probe_nic(struct efx_nic *efx)
1300 netif_dbg(efx, probe, efx->net_dev, "creating NIC\n");
1302 /* Carry out hardware-type specific initialisation */
1303 rc = efx->type->probe(efx);
1307 /* Determine the number of channels and queues by trying to hook
1308 * in MSI-X interrupts. */
1309 efx_probe_interrupts(efx);
1311 if (efx->n_channels > 1)
1312 get_random_bytes(&efx->rx_hash_key, sizeof(efx->rx_hash_key));
1313 for (i = 0; i < ARRAY_SIZE(efx->rx_indir_table); i++)
1314 efx->rx_indir_table[i] = i % efx->n_rx_channels;
1316 efx_set_channels(efx);
1317 efx->net_dev->real_num_tx_queues = efx->n_tx_channels;
1319 /* Initialise the interrupt moderation settings */
1320 efx_init_irq_moderation(efx, tx_irq_mod_usec, rx_irq_mod_usec, true);
1325 static void efx_remove_nic(struct efx_nic *efx)
1327 netif_dbg(efx, drv, efx->net_dev, "destroying NIC\n");
1329 efx_remove_interrupts(efx);
1330 efx->type->remove(efx);
1333 /**************************************************************************
1335 * NIC startup/shutdown
1337 *************************************************************************/
1339 static int efx_probe_all(struct efx_nic *efx)
1343 rc = efx_probe_nic(efx);
1345 netif_err(efx, probe, efx->net_dev, "failed to create NIC\n");
1349 rc = efx_probe_port(efx);
1351 netif_err(efx, probe, efx->net_dev, "failed to create port\n");
1355 efx->rxq_entries = efx->txq_entries = EFX_DEFAULT_DMAQ_SIZE;
1356 rc = efx_probe_channels(efx);
1363 efx_remove_port(efx);
1365 efx_remove_nic(efx);
1370 /* Called after previous invocation(s) of efx_stop_all, restarts the
1371 * port, kernel transmit queue, NAPI processing and hardware interrupts,
1372 * and ensures that the port is scheduled to be reconfigured.
1373 * This function is safe to call multiple times when the NIC is in any
1375 static void efx_start_all(struct efx_nic *efx)
1377 struct efx_channel *channel;
1379 EFX_ASSERT_RESET_SERIALISED(efx);
1381 /* Check that it is appropriate to restart the interface. All
1382 * of these flags are safe to read under just the rtnl lock */
1383 if (efx->port_enabled)
1385 if ((efx->state != STATE_RUNNING) && (efx->state != STATE_INIT))
1387 if (efx_dev_registered(efx) && !netif_running(efx->net_dev))
1390 /* Mark the port as enabled so port reconfigurations can start, then
1391 * restart the transmit interface early so the watchdog timer stops */
1392 efx_start_port(efx);
1394 efx_for_each_channel(channel, efx) {
1395 if (efx_dev_registered(efx))
1396 efx_wake_queue(channel);
1397 efx_start_channel(channel);
1400 efx_nic_enable_interrupts(efx);
1402 /* Switch to event based MCDI completions after enabling interrupts.
1403 * If a reset has been scheduled, then we need to stay in polled mode.
1404 * Rather than serialising efx_mcdi_mode_event() [which sleeps] and
1405 * reset_pending [modified from an atomic context], we instead guarantee
1406 * that efx_mcdi_mode_poll() isn't reverted erroneously */
1407 efx_mcdi_mode_event(efx);
1408 if (efx->reset_pending != RESET_TYPE_NONE)
1409 efx_mcdi_mode_poll(efx);
1411 /* Start the hardware monitor if there is one. Otherwise (we're link
1412 * event driven), we have to poll the PHY because after an event queue
1413 * flush, we could have a missed a link state change */
1414 if (efx->type->monitor != NULL) {
1415 queue_delayed_work(efx->workqueue, &efx->monitor_work,
1416 efx_monitor_interval);
1418 mutex_lock(&efx->mac_lock);
1419 if (efx->phy_op->poll(efx))
1420 efx_link_status_changed(efx);
1421 mutex_unlock(&efx->mac_lock);
1424 efx->type->start_stats(efx);
1427 /* Flush all delayed work. Should only be called when no more delayed work
1428 * will be scheduled. This doesn't flush pending online resets (efx_reset),
1429 * since we're holding the rtnl_lock at this point. */
1430 static void efx_flush_all(struct efx_nic *efx)
1432 /* Make sure the hardware monitor is stopped */
1433 cancel_delayed_work_sync(&efx->monitor_work);
1434 /* Stop scheduled port reconfigurations */
1435 cancel_work_sync(&efx->mac_work);
1438 /* Quiesce hardware and software without bringing the link down.
1439 * Safe to call multiple times, when the nic and interface is in any
1440 * state. The caller is guaranteed to subsequently be in a position
1441 * to modify any hardware and software state they see fit without
1443 static void efx_stop_all(struct efx_nic *efx)
1445 struct efx_channel *channel;
1447 EFX_ASSERT_RESET_SERIALISED(efx);
1449 /* port_enabled can be read safely under the rtnl lock */
1450 if (!efx->port_enabled)
1453 efx->type->stop_stats(efx);
1455 /* Switch to MCDI polling on Siena before disabling interrupts */
1456 efx_mcdi_mode_poll(efx);
1458 /* Disable interrupts and wait for ISR to complete */
1459 efx_nic_disable_interrupts(efx);
1460 if (efx->legacy_irq)
1461 synchronize_irq(efx->legacy_irq);
1462 efx_for_each_channel(channel, efx) {
1464 synchronize_irq(channel->irq);
1467 /* Stop all NAPI processing and synchronous rx refills */
1468 efx_for_each_channel(channel, efx)
1469 efx_stop_channel(channel);
1471 /* Stop all asynchronous port reconfigurations. Since all
1472 * event processing has already been stopped, there is no
1473 * window to loose phy events */
1476 /* Flush efx_mac_work(), refill_workqueue, monitor_work */
1479 /* Stop the kernel transmit interface late, so the watchdog
1480 * timer isn't ticking over the flush */
1481 if (efx_dev_registered(efx)) {
1482 struct efx_channel *channel;
1483 efx_for_each_channel(channel, efx)
1484 efx_stop_queue(channel);
1485 netif_tx_lock_bh(efx->net_dev);
1486 netif_tx_unlock_bh(efx->net_dev);
1490 static void efx_remove_all(struct efx_nic *efx)
1492 efx_remove_channels(efx);
1493 efx_remove_port(efx);
1494 efx_remove_nic(efx);
1497 /**************************************************************************
1499 * Interrupt moderation
1501 **************************************************************************/
1503 static unsigned irq_mod_ticks(int usecs, int resolution)
1506 return 0; /* cannot receive interrupts ahead of time :-) */
1507 if (usecs < resolution)
1508 return 1; /* never round down to 0 */
1509 return usecs / resolution;
1512 /* Set interrupt moderation parameters */
1513 void efx_init_irq_moderation(struct efx_nic *efx, int tx_usecs, int rx_usecs,
1516 struct efx_channel *channel;
1517 unsigned tx_ticks = irq_mod_ticks(tx_usecs, EFX_IRQ_MOD_RESOLUTION);
1518 unsigned rx_ticks = irq_mod_ticks(rx_usecs, EFX_IRQ_MOD_RESOLUTION);
1520 EFX_ASSERT_RESET_SERIALISED(efx);
1522 efx->irq_rx_adaptive = rx_adaptive;
1523 efx->irq_rx_moderation = rx_ticks;
1524 efx_for_each_channel(channel, efx) {
1525 if (efx_channel_get_rx_queue(channel))
1526 channel->irq_moderation = rx_ticks;
1527 else if (efx_channel_get_tx_queue(channel, 0))
1528 channel->irq_moderation = tx_ticks;
1532 /**************************************************************************
1536 **************************************************************************/
1538 /* Run periodically off the general workqueue. Serialised against
1539 * efx_reconfigure_port via the mac_lock */
1540 static void efx_monitor(struct work_struct *data)
1542 struct efx_nic *efx = container_of(data, struct efx_nic,
1545 netif_vdbg(efx, timer, efx->net_dev,
1546 "hardware monitor executing on CPU %d\n",
1547 raw_smp_processor_id());
1548 BUG_ON(efx->type->monitor == NULL);
1550 /* If the mac_lock is already held then it is likely a port
1551 * reconfiguration is already in place, which will likely do
1552 * most of the work of check_hw() anyway. */
1553 if (!mutex_trylock(&efx->mac_lock))
1555 if (!efx->port_enabled)
1557 efx->type->monitor(efx);
1560 mutex_unlock(&efx->mac_lock);
1562 queue_delayed_work(efx->workqueue, &efx->monitor_work,
1563 efx_monitor_interval);
1566 /**************************************************************************
1570 *************************************************************************/
1573 * Context: process, rtnl_lock() held.
1575 static int efx_ioctl(struct net_device *net_dev, struct ifreq *ifr, int cmd)
1577 struct efx_nic *efx = netdev_priv(net_dev);
1578 struct mii_ioctl_data *data = if_mii(ifr);
1580 EFX_ASSERT_RESET_SERIALISED(efx);
1582 /* Convert phy_id from older PRTAD/DEVAD format */
1583 if ((cmd == SIOCGMIIREG || cmd == SIOCSMIIREG) &&
1584 (data->phy_id & 0xfc00) == 0x0400)
1585 data->phy_id ^= MDIO_PHY_ID_C45 | 0x0400;
1587 return mdio_mii_ioctl(&efx->mdio, data, cmd);
1590 /**************************************************************************
1594 **************************************************************************/
1596 static int efx_init_napi(struct efx_nic *efx)
1598 struct efx_channel *channel;
1600 efx_for_each_channel(channel, efx) {
1601 channel->napi_dev = efx->net_dev;
1602 netif_napi_add(channel->napi_dev, &channel->napi_str,
1603 efx_poll, napi_weight);
1608 static void efx_fini_napi(struct efx_nic *efx)
1610 struct efx_channel *channel;
1612 efx_for_each_channel(channel, efx) {
1613 if (channel->napi_dev)
1614 netif_napi_del(&channel->napi_str);
1615 channel->napi_dev = NULL;
1619 /**************************************************************************
1621 * Kernel netpoll interface
1623 *************************************************************************/
1625 #ifdef CONFIG_NET_POLL_CONTROLLER
1627 /* Although in the common case interrupts will be disabled, this is not
1628 * guaranteed. However, all our work happens inside the NAPI callback,
1629 * so no locking is required.
1631 static void efx_netpoll(struct net_device *net_dev)
1633 struct efx_nic *efx = netdev_priv(net_dev);
1634 struct efx_channel *channel;
1636 efx_for_each_channel(channel, efx)
1637 efx_schedule_channel(channel);
1642 /**************************************************************************
1644 * Kernel net device interface
1646 *************************************************************************/
1648 /* Context: process, rtnl_lock() held. */
1649 static int efx_net_open(struct net_device *net_dev)
1651 struct efx_nic *efx = netdev_priv(net_dev);
1652 EFX_ASSERT_RESET_SERIALISED(efx);
1654 netif_dbg(efx, ifup, efx->net_dev, "opening device on CPU %d\n",
1655 raw_smp_processor_id());
1657 if (efx->state == STATE_DISABLED)
1659 if (efx->phy_mode & PHY_MODE_SPECIAL)
1661 if (efx_mcdi_poll_reboot(efx) && efx_reset(efx, RESET_TYPE_ALL))
1664 /* Notify the kernel of the link state polled during driver load,
1665 * before the monitor starts running */
1666 efx_link_status_changed(efx);
1672 /* Context: process, rtnl_lock() held.
1673 * Note that the kernel will ignore our return code; this method
1674 * should really be a void.
1676 static int efx_net_stop(struct net_device *net_dev)
1678 struct efx_nic *efx = netdev_priv(net_dev);
1680 netif_dbg(efx, ifdown, efx->net_dev, "closing on CPU %d\n",
1681 raw_smp_processor_id());
1683 if (efx->state != STATE_DISABLED) {
1684 /* Stop the device and flush all the channels */
1686 efx_fini_channels(efx);
1687 efx_init_channels(efx);
1693 /* Context: process, dev_base_lock or RTNL held, non-blocking. */
1694 static struct rtnl_link_stats64 *efx_net_stats(struct net_device *net_dev, struct rtnl_link_stats64 *stats)
1696 struct efx_nic *efx = netdev_priv(net_dev);
1697 struct efx_mac_stats *mac_stats = &efx->mac_stats;
1699 spin_lock_bh(&efx->stats_lock);
1700 efx->type->update_stats(efx);
1701 spin_unlock_bh(&efx->stats_lock);
1703 stats->rx_packets = mac_stats->rx_packets;
1704 stats->tx_packets = mac_stats->tx_packets;
1705 stats->rx_bytes = mac_stats->rx_bytes;
1706 stats->tx_bytes = mac_stats->tx_bytes;
1707 stats->rx_dropped = efx->n_rx_nodesc_drop_cnt;
1708 stats->multicast = mac_stats->rx_multicast;
1709 stats->collisions = mac_stats->tx_collision;
1710 stats->rx_length_errors = (mac_stats->rx_gtjumbo +
1711 mac_stats->rx_length_error);
1712 stats->rx_crc_errors = mac_stats->rx_bad;
1713 stats->rx_frame_errors = mac_stats->rx_align_error;
1714 stats->rx_fifo_errors = mac_stats->rx_overflow;
1715 stats->rx_missed_errors = mac_stats->rx_missed;
1716 stats->tx_window_errors = mac_stats->tx_late_collision;
1718 stats->rx_errors = (stats->rx_length_errors +
1719 stats->rx_crc_errors +
1720 stats->rx_frame_errors +
1721 mac_stats->rx_symbol_error);
1722 stats->tx_errors = (stats->tx_window_errors +
1728 /* Context: netif_tx_lock held, BHs disabled. */
1729 static void efx_watchdog(struct net_device *net_dev)
1731 struct efx_nic *efx = netdev_priv(net_dev);
1733 netif_err(efx, tx_err, efx->net_dev,
1734 "TX stuck with port_enabled=%d: resetting channels\n",
1737 efx_schedule_reset(efx, RESET_TYPE_TX_WATCHDOG);
1741 /* Context: process, rtnl_lock() held. */
1742 static int efx_change_mtu(struct net_device *net_dev, int new_mtu)
1744 struct efx_nic *efx = netdev_priv(net_dev);
1747 EFX_ASSERT_RESET_SERIALISED(efx);
1749 if (new_mtu > EFX_MAX_MTU)
1754 netif_dbg(efx, drv, efx->net_dev, "changing MTU to %d\n", new_mtu);
1756 efx_fini_channels(efx);
1758 mutex_lock(&efx->mac_lock);
1759 /* Reconfigure the MAC before enabling the dma queues so that
1760 * the RX buffers don't overflow */
1761 net_dev->mtu = new_mtu;
1762 efx->mac_op->reconfigure(efx);
1763 mutex_unlock(&efx->mac_lock);
1765 efx_init_channels(efx);
1771 static int efx_set_mac_address(struct net_device *net_dev, void *data)
1773 struct efx_nic *efx = netdev_priv(net_dev);
1774 struct sockaddr *addr = data;
1775 char *new_addr = addr->sa_data;
1777 EFX_ASSERT_RESET_SERIALISED(efx);
1779 if (!is_valid_ether_addr(new_addr)) {
1780 netif_err(efx, drv, efx->net_dev,
1781 "invalid ethernet MAC address requested: %pM\n",
1786 memcpy(net_dev->dev_addr, new_addr, net_dev->addr_len);
1788 /* Reconfigure the MAC */
1789 mutex_lock(&efx->mac_lock);
1790 efx->mac_op->reconfigure(efx);
1791 mutex_unlock(&efx->mac_lock);
1796 /* Context: netif_addr_lock held, BHs disabled. */
1797 static void efx_set_multicast_list(struct net_device *net_dev)
1799 struct efx_nic *efx = netdev_priv(net_dev);
1800 struct netdev_hw_addr *ha;
1801 union efx_multicast_hash *mc_hash = &efx->multicast_hash;
1805 efx->promiscuous = !!(net_dev->flags & IFF_PROMISC);
1807 /* Build multicast hash table */
1808 if (efx->promiscuous || (net_dev->flags & IFF_ALLMULTI)) {
1809 memset(mc_hash, 0xff, sizeof(*mc_hash));
1811 memset(mc_hash, 0x00, sizeof(*mc_hash));
1812 netdev_for_each_mc_addr(ha, net_dev) {
1813 crc = ether_crc_le(ETH_ALEN, ha->addr);
1814 bit = crc & (EFX_MCAST_HASH_ENTRIES - 1);
1815 set_bit_le(bit, mc_hash->byte);
1818 /* Broadcast packets go through the multicast hash filter.
1819 * ether_crc_le() of the broadcast address is 0xbe2612ff
1820 * so we always add bit 0xff to the mask.
1822 set_bit_le(0xff, mc_hash->byte);
1825 if (efx->port_enabled)
1826 queue_work(efx->workqueue, &efx->mac_work);
1827 /* Otherwise efx_start_port() will do this */
1830 static const struct net_device_ops efx_netdev_ops = {
1831 .ndo_open = efx_net_open,
1832 .ndo_stop = efx_net_stop,
1833 .ndo_get_stats64 = efx_net_stats,
1834 .ndo_tx_timeout = efx_watchdog,
1835 .ndo_start_xmit = efx_hard_start_xmit,
1836 .ndo_validate_addr = eth_validate_addr,
1837 .ndo_do_ioctl = efx_ioctl,
1838 .ndo_change_mtu = efx_change_mtu,
1839 .ndo_set_mac_address = efx_set_mac_address,
1840 .ndo_set_multicast_list = efx_set_multicast_list,
1841 #ifdef CONFIG_NET_POLL_CONTROLLER
1842 .ndo_poll_controller = efx_netpoll,
1846 static void efx_update_name(struct efx_nic *efx)
1848 strcpy(efx->name, efx->net_dev->name);
1849 efx_mtd_rename(efx);
1850 efx_set_channel_names(efx);
1853 static int efx_netdev_event(struct notifier_block *this,
1854 unsigned long event, void *ptr)
1856 struct net_device *net_dev = ptr;
1858 if (net_dev->netdev_ops == &efx_netdev_ops &&
1859 event == NETDEV_CHANGENAME)
1860 efx_update_name(netdev_priv(net_dev));
1865 static struct notifier_block efx_netdev_notifier = {
1866 .notifier_call = efx_netdev_event,
1870 show_phy_type(struct device *dev, struct device_attribute *attr, char *buf)
1872 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
1873 return sprintf(buf, "%d\n", efx->phy_type);
1875 static DEVICE_ATTR(phy_type, 0644, show_phy_type, NULL);
1877 static int efx_register_netdev(struct efx_nic *efx)
1879 struct net_device *net_dev = efx->net_dev;
1882 net_dev->watchdog_timeo = 5 * HZ;
1883 net_dev->irq = efx->pci_dev->irq;
1884 net_dev->netdev_ops = &efx_netdev_ops;
1885 SET_ETHTOOL_OPS(net_dev, &efx_ethtool_ops);
1887 /* Clear MAC statistics */
1888 efx->mac_op->update_stats(efx);
1889 memset(&efx->mac_stats, 0, sizeof(efx->mac_stats));
1893 rc = dev_alloc_name(net_dev, net_dev->name);
1896 efx_update_name(efx);
1898 rc = register_netdevice(net_dev);
1902 /* Always start with carrier off; PHY events will detect the link */
1903 netif_carrier_off(efx->net_dev);
1907 rc = device_create_file(&efx->pci_dev->dev, &dev_attr_phy_type);
1909 netif_err(efx, drv, efx->net_dev,
1910 "failed to init net dev attributes\n");
1911 goto fail_registered;
1918 netif_err(efx, drv, efx->net_dev, "could not register net dev\n");
1922 unregister_netdev(net_dev);
1926 static void efx_unregister_netdev(struct efx_nic *efx)
1928 struct efx_channel *channel;
1929 struct efx_tx_queue *tx_queue;
1934 BUG_ON(netdev_priv(efx->net_dev) != efx);
1936 /* Free up any skbs still remaining. This has to happen before
1937 * we try to unregister the netdev as running their destructors
1938 * may be needed to get the device ref. count to 0. */
1939 efx_for_each_channel(channel, efx) {
1940 efx_for_each_channel_tx_queue(tx_queue, channel)
1941 efx_release_tx_buffers(tx_queue);
1944 if (efx_dev_registered(efx)) {
1945 strlcpy(efx->name, pci_name(efx->pci_dev), sizeof(efx->name));
1946 device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_type);
1947 unregister_netdev(efx->net_dev);
1951 /**************************************************************************
1953 * Device reset and suspend
1955 **************************************************************************/
1957 /* Tears down the entire software state and most of the hardware state
1959 void efx_reset_down(struct efx_nic *efx, enum reset_type method)
1961 EFX_ASSERT_RESET_SERIALISED(efx);
1964 mutex_lock(&efx->mac_lock);
1965 mutex_lock(&efx->spi_lock);
1967 efx_fini_channels(efx);
1968 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE)
1969 efx->phy_op->fini(efx);
1970 efx->type->fini(efx);
1973 /* This function will always ensure that the locks acquired in
1974 * efx_reset_down() are released. A failure return code indicates
1975 * that we were unable to reinitialise the hardware, and the
1976 * driver should be disabled. If ok is false, then the rx and tx
1977 * engines are not restarted, pending a RESET_DISABLE. */
1978 int efx_reset_up(struct efx_nic *efx, enum reset_type method, bool ok)
1982 EFX_ASSERT_RESET_SERIALISED(efx);
1984 rc = efx->type->init(efx);
1986 netif_err(efx, drv, efx->net_dev, "failed to initialise NIC\n");
1993 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE) {
1994 rc = efx->phy_op->init(efx);
1997 if (efx->phy_op->reconfigure(efx))
1998 netif_err(efx, drv, efx->net_dev,
1999 "could not restore PHY settings\n");
2002 efx->mac_op->reconfigure(efx);
2004 efx_init_channels(efx);
2006 mutex_unlock(&efx->spi_lock);
2007 mutex_unlock(&efx->mac_lock);
2014 efx->port_initialized = false;
2016 mutex_unlock(&efx->spi_lock);
2017 mutex_unlock(&efx->mac_lock);
2022 /* Reset the NIC using the specified method. Note that the reset may
2023 * fail, in which case the card will be left in an unusable state.
2025 * Caller must hold the rtnl_lock.
2027 int efx_reset(struct efx_nic *efx, enum reset_type method)
2032 netif_info(efx, drv, efx->net_dev, "resetting (%s)\n",
2033 RESET_TYPE(method));
2035 efx_reset_down(efx, method);
2037 rc = efx->type->reset(efx, method);
2039 netif_err(efx, drv, efx->net_dev, "failed to reset hardware\n");
2043 /* Allow resets to be rescheduled. */
2044 efx->reset_pending = RESET_TYPE_NONE;
2046 /* Reinitialise bus-mastering, which may have been turned off before
2047 * the reset was scheduled. This is still appropriate, even in the
2048 * RESET_TYPE_DISABLE since this driver generally assumes the hardware
2049 * can respond to requests. */
2050 pci_set_master(efx->pci_dev);
2053 /* Leave device stopped if necessary */
2054 disabled = rc || method == RESET_TYPE_DISABLE;
2055 rc2 = efx_reset_up(efx, method, !disabled);
2063 dev_close(efx->net_dev);
2064 netif_err(efx, drv, efx->net_dev, "has been disabled\n");
2065 efx->state = STATE_DISABLED;
2067 netif_dbg(efx, drv, efx->net_dev, "reset complete\n");
2072 /* The worker thread exists so that code that cannot sleep can
2073 * schedule a reset for later.
2075 static void efx_reset_work(struct work_struct *data)
2077 struct efx_nic *efx = container_of(data, struct efx_nic, reset_work);
2079 if (efx->reset_pending == RESET_TYPE_NONE)
2082 /* If we're not RUNNING then don't reset. Leave the reset_pending
2083 * flag set so that efx_pci_probe_main will be retried */
2084 if (efx->state != STATE_RUNNING) {
2085 netif_info(efx, drv, efx->net_dev,
2086 "scheduled reset quenched. NIC not RUNNING\n");
2091 (void)efx_reset(efx, efx->reset_pending);
2095 void efx_schedule_reset(struct efx_nic *efx, enum reset_type type)
2097 enum reset_type method;
2099 if (efx->reset_pending != RESET_TYPE_NONE) {
2100 netif_info(efx, drv, efx->net_dev,
2101 "quenching already scheduled reset\n");
2106 case RESET_TYPE_INVISIBLE:
2107 case RESET_TYPE_ALL:
2108 case RESET_TYPE_WORLD:
2109 case RESET_TYPE_DISABLE:
2112 case RESET_TYPE_RX_RECOVERY:
2113 case RESET_TYPE_RX_DESC_FETCH:
2114 case RESET_TYPE_TX_DESC_FETCH:
2115 case RESET_TYPE_TX_SKIP:
2116 method = RESET_TYPE_INVISIBLE;
2118 case RESET_TYPE_MC_FAILURE:
2120 method = RESET_TYPE_ALL;
2125 netif_dbg(efx, drv, efx->net_dev,
2126 "scheduling %s reset for %s\n",
2127 RESET_TYPE(method), RESET_TYPE(type));
2129 netif_dbg(efx, drv, efx->net_dev, "scheduling %s reset\n",
2130 RESET_TYPE(method));
2132 efx->reset_pending = method;
2134 /* efx_process_channel() will no longer read events once a
2135 * reset is scheduled. So switch back to poll'd MCDI completions. */
2136 efx_mcdi_mode_poll(efx);
2138 queue_work(reset_workqueue, &efx->reset_work);
2141 /**************************************************************************
2143 * List of NICs we support
2145 **************************************************************************/
2147 /* PCI device ID table */
2148 static DEFINE_PCI_DEVICE_TABLE(efx_pci_table) = {
2149 {PCI_DEVICE(EFX_VENDID_SFC, FALCON_A_P_DEVID),
2150 .driver_data = (unsigned long) &falcon_a1_nic_type},
2151 {PCI_DEVICE(EFX_VENDID_SFC, FALCON_B_P_DEVID),
2152 .driver_data = (unsigned long) &falcon_b0_nic_type},
2153 {PCI_DEVICE(EFX_VENDID_SFC, BETHPAGE_A_P_DEVID),
2154 .driver_data = (unsigned long) &siena_a0_nic_type},
2155 {PCI_DEVICE(EFX_VENDID_SFC, SIENA_A_P_DEVID),
2156 .driver_data = (unsigned long) &siena_a0_nic_type},
2157 {0} /* end of list */
2160 /**************************************************************************
2162 * Dummy PHY/MAC operations
2164 * Can be used for some unimplemented operations
2165 * Needed so all function pointers are valid and do not have to be tested
2168 **************************************************************************/
2169 int efx_port_dummy_op_int(struct efx_nic *efx)
2173 void efx_port_dummy_op_void(struct efx_nic *efx) {}
2174 void efx_port_dummy_op_set_id_led(struct efx_nic *efx, enum efx_led_mode mode)
2177 bool efx_port_dummy_op_poll(struct efx_nic *efx)
2182 static struct efx_phy_operations efx_dummy_phy_operations = {
2183 .init = efx_port_dummy_op_int,
2184 .reconfigure = efx_port_dummy_op_int,
2185 .poll = efx_port_dummy_op_poll,
2186 .fini = efx_port_dummy_op_void,
2189 /**************************************************************************
2193 **************************************************************************/
2195 /* This zeroes out and then fills in the invariants in a struct
2196 * efx_nic (including all sub-structures).
2198 static int efx_init_struct(struct efx_nic *efx, struct efx_nic_type *type,
2199 struct pci_dev *pci_dev, struct net_device *net_dev)
2203 /* Initialise common structures */
2204 memset(efx, 0, sizeof(*efx));
2205 spin_lock_init(&efx->biu_lock);
2206 mutex_init(&efx->mdio_lock);
2207 mutex_init(&efx->spi_lock);
2208 #ifdef CONFIG_SFC_MTD
2209 INIT_LIST_HEAD(&efx->mtd_list);
2211 INIT_WORK(&efx->reset_work, efx_reset_work);
2212 INIT_DELAYED_WORK(&efx->monitor_work, efx_monitor);
2213 efx->pci_dev = pci_dev;
2214 efx->msg_enable = debug;
2215 efx->state = STATE_INIT;
2216 efx->reset_pending = RESET_TYPE_NONE;
2217 strlcpy(efx->name, pci_name(pci_dev), sizeof(efx->name));
2219 efx->net_dev = net_dev;
2220 efx->rx_checksum_enabled = true;
2221 spin_lock_init(&efx->stats_lock);
2222 mutex_init(&efx->mac_lock);
2223 efx->mac_op = type->default_mac_ops;
2224 efx->phy_op = &efx_dummy_phy_operations;
2225 efx->mdio.dev = net_dev;
2226 INIT_WORK(&efx->mac_work, efx_mac_work);
2228 for (i = 0; i < EFX_MAX_CHANNELS; i++) {
2229 efx->channel[i] = efx_alloc_channel(efx, i, NULL);
2230 if (!efx->channel[i])
2236 EFX_BUG_ON_PARANOID(efx->type->phys_addr_channels > EFX_MAX_CHANNELS);
2238 /* Higher numbered interrupt modes are less capable! */
2239 efx->interrupt_mode = max(efx->type->max_interrupt_mode,
2242 /* Would be good to use the net_dev name, but we're too early */
2243 snprintf(efx->workqueue_name, sizeof(efx->workqueue_name), "sfc%s",
2245 efx->workqueue = create_singlethread_workqueue(efx->workqueue_name);
2246 if (!efx->workqueue)
2252 efx_fini_struct(efx);
2256 static void efx_fini_struct(struct efx_nic *efx)
2260 for (i = 0; i < EFX_MAX_CHANNELS; i++)
2261 kfree(efx->channel[i]);
2263 if (efx->workqueue) {
2264 destroy_workqueue(efx->workqueue);
2265 efx->workqueue = NULL;
2269 /**************************************************************************
2273 **************************************************************************/
2275 /* Main body of final NIC shutdown code
2276 * This is called only at module unload (or hotplug removal).
2278 static void efx_pci_remove_main(struct efx_nic *efx)
2280 efx_nic_fini_interrupt(efx);
2281 efx_fini_channels(efx);
2283 efx->type->fini(efx);
2285 efx_remove_all(efx);
2288 /* Final NIC shutdown
2289 * This is called only at module unload (or hotplug removal).
2291 static void efx_pci_remove(struct pci_dev *pci_dev)
2293 struct efx_nic *efx;
2295 efx = pci_get_drvdata(pci_dev);
2299 /* Mark the NIC as fini, then stop the interface */
2301 efx->state = STATE_FINI;
2302 dev_close(efx->net_dev);
2304 /* Allow any queued efx_resets() to complete */
2307 efx_unregister_netdev(efx);
2309 efx_mtd_remove(efx);
2311 /* Wait for any scheduled resets to complete. No more will be
2312 * scheduled from this point because efx_stop_all() has been
2313 * called, we are no longer registered with driverlink, and
2314 * the net_device's have been removed. */
2315 cancel_work_sync(&efx->reset_work);
2317 efx_pci_remove_main(efx);
2320 netif_dbg(efx, drv, efx->net_dev, "shutdown successful\n");
2322 pci_set_drvdata(pci_dev, NULL);
2323 efx_fini_struct(efx);
2324 free_netdev(efx->net_dev);
2327 /* Main body of NIC initialisation
2328 * This is called at module load (or hotplug insertion, theoretically).
2330 static int efx_pci_probe_main(struct efx_nic *efx)
2334 /* Do start-of-day initialisation */
2335 rc = efx_probe_all(efx);
2339 rc = efx_init_napi(efx);
2343 rc = efx->type->init(efx);
2345 netif_err(efx, probe, efx->net_dev,
2346 "failed to initialise NIC\n");
2350 rc = efx_init_port(efx);
2352 netif_err(efx, probe, efx->net_dev,
2353 "failed to initialise port\n");
2357 efx_init_channels(efx);
2359 rc = efx_nic_init_interrupt(efx);
2366 efx_fini_channels(efx);
2369 efx->type->fini(efx);
2373 efx_remove_all(efx);
2378 /* NIC initialisation
2380 * This is called at module load (or hotplug insertion,
2381 * theoretically). It sets up PCI mappings, tests and resets the NIC,
2382 * sets up and registers the network devices with the kernel and hooks
2383 * the interrupt service routine. It does not prepare the device for
2384 * transmission; this is left to the first time one of the network
2385 * interfaces is brought up (i.e. efx_net_open).
2387 static int __devinit efx_pci_probe(struct pci_dev *pci_dev,
2388 const struct pci_device_id *entry)
2390 struct efx_nic_type *type = (struct efx_nic_type *) entry->driver_data;
2391 struct net_device *net_dev;
2392 struct efx_nic *efx;
2395 /* Allocate and initialise a struct net_device and struct efx_nic */
2396 net_dev = alloc_etherdev_mq(sizeof(*efx), EFX_MAX_CORE_TX_QUEUES);
2399 net_dev->features |= (type->offload_features | NETIF_F_SG |
2400 NETIF_F_HIGHDMA | NETIF_F_TSO |
2402 if (type->offload_features & NETIF_F_V6_CSUM)
2403 net_dev->features |= NETIF_F_TSO6;
2404 /* Mask for features that also apply to VLAN devices */
2405 net_dev->vlan_features |= (NETIF_F_ALL_CSUM | NETIF_F_SG |
2406 NETIF_F_HIGHDMA | NETIF_F_TSO);
2407 efx = netdev_priv(net_dev);
2408 pci_set_drvdata(pci_dev, efx);
2409 SET_NETDEV_DEV(net_dev, &pci_dev->dev);
2410 rc = efx_init_struct(efx, type, pci_dev, net_dev);
2414 netif_info(efx, probe, efx->net_dev,
2415 "Solarflare Communications NIC detected\n");
2417 /* Set up basic I/O (BAR mappings etc) */
2418 rc = efx_init_io(efx);
2422 /* No serialisation is required with the reset path because
2423 * we're in STATE_INIT. */
2424 for (i = 0; i < 5; i++) {
2425 rc = efx_pci_probe_main(efx);
2427 /* Serialise against efx_reset(). No more resets will be
2428 * scheduled since efx_stop_all() has been called, and we
2429 * have not and never have been registered with either
2430 * the rtnetlink or driverlink layers. */
2431 cancel_work_sync(&efx->reset_work);
2434 if (efx->reset_pending != RESET_TYPE_NONE) {
2435 /* If there was a scheduled reset during
2436 * probe, the NIC is probably hosed anyway */
2437 efx_pci_remove_main(efx);
2444 /* Retry if a recoverably reset event has been scheduled */
2445 if ((efx->reset_pending != RESET_TYPE_INVISIBLE) &&
2446 (efx->reset_pending != RESET_TYPE_ALL))
2449 efx->reset_pending = RESET_TYPE_NONE;
2453 netif_err(efx, probe, efx->net_dev, "Could not reset NIC\n");
2457 /* Switch to the running state before we expose the device to the OS,
2458 * so that dev_open()|efx_start_all() will actually start the device */
2459 efx->state = STATE_RUNNING;
2461 rc = efx_register_netdev(efx);
2465 netif_dbg(efx, probe, efx->net_dev, "initialisation successful\n");
2468 efx_mtd_probe(efx); /* allowed to fail */
2473 efx_pci_remove_main(efx);
2478 efx_fini_struct(efx);
2481 netif_dbg(efx, drv, efx->net_dev, "initialisation failed. rc=%d\n", rc);
2482 free_netdev(net_dev);
2486 static int efx_pm_freeze(struct device *dev)
2488 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
2490 efx->state = STATE_FINI;
2492 netif_device_detach(efx->net_dev);
2495 efx_fini_channels(efx);
2500 static int efx_pm_thaw(struct device *dev)
2502 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
2504 efx->state = STATE_INIT;
2506 efx_init_channels(efx);
2508 mutex_lock(&efx->mac_lock);
2509 efx->phy_op->reconfigure(efx);
2510 mutex_unlock(&efx->mac_lock);
2514 netif_device_attach(efx->net_dev);
2516 efx->state = STATE_RUNNING;
2518 efx->type->resume_wol(efx);
2520 /* Reschedule any quenched resets scheduled during efx_pm_freeze() */
2521 queue_work(reset_workqueue, &efx->reset_work);
2526 static int efx_pm_poweroff(struct device *dev)
2528 struct pci_dev *pci_dev = to_pci_dev(dev);
2529 struct efx_nic *efx = pci_get_drvdata(pci_dev);
2531 efx->type->fini(efx);
2533 efx->reset_pending = RESET_TYPE_NONE;
2535 pci_save_state(pci_dev);
2536 return pci_set_power_state(pci_dev, PCI_D3hot);
2539 /* Used for both resume and restore */
2540 static int efx_pm_resume(struct device *dev)
2542 struct pci_dev *pci_dev = to_pci_dev(dev);
2543 struct efx_nic *efx = pci_get_drvdata(pci_dev);
2546 rc = pci_set_power_state(pci_dev, PCI_D0);
2549 pci_restore_state(pci_dev);
2550 rc = pci_enable_device(pci_dev);
2553 pci_set_master(efx->pci_dev);
2554 rc = efx->type->reset(efx, RESET_TYPE_ALL);
2557 rc = efx->type->init(efx);
2564 static int efx_pm_suspend(struct device *dev)
2569 rc = efx_pm_poweroff(dev);
2575 static struct dev_pm_ops efx_pm_ops = {
2576 .suspend = efx_pm_suspend,
2577 .resume = efx_pm_resume,
2578 .freeze = efx_pm_freeze,
2579 .thaw = efx_pm_thaw,
2580 .poweroff = efx_pm_poweroff,
2581 .restore = efx_pm_resume,
2584 static struct pci_driver efx_pci_driver = {
2585 .name = KBUILD_MODNAME,
2586 .id_table = efx_pci_table,
2587 .probe = efx_pci_probe,
2588 .remove = efx_pci_remove,
2589 .driver.pm = &efx_pm_ops,
2592 /**************************************************************************
2594 * Kernel module interface
2596 *************************************************************************/
2598 module_param(interrupt_mode, uint, 0444);
2599 MODULE_PARM_DESC(interrupt_mode,
2600 "Interrupt mode (0=>MSIX 1=>MSI 2=>legacy)");
2602 static int __init efx_init_module(void)
2606 printk(KERN_INFO "Solarflare NET driver v" EFX_DRIVER_VERSION "\n");
2608 rc = register_netdevice_notifier(&efx_netdev_notifier);
2612 reset_workqueue = create_singlethread_workqueue("sfc_reset");
2613 if (!reset_workqueue) {
2618 rc = pci_register_driver(&efx_pci_driver);
2625 destroy_workqueue(reset_workqueue);
2627 unregister_netdevice_notifier(&efx_netdev_notifier);
2632 static void __exit efx_exit_module(void)
2634 printk(KERN_INFO "Solarflare NET driver unloading\n");
2636 pci_unregister_driver(&efx_pci_driver);
2637 destroy_workqueue(reset_workqueue);
2638 unregister_netdevice_notifier(&efx_netdev_notifier);
2642 module_init(efx_init_module);
2643 module_exit(efx_exit_module);
2645 MODULE_AUTHOR("Solarflare Communications and "
2646 "Michael Brown <mbrown@fensystems.co.uk>");
2647 MODULE_DESCRIPTION("Solarflare Communications network driver");
2648 MODULE_LICENSE("GPL");
2649 MODULE_DEVICE_TABLE(pci, efx_pci_table);