1 /****************************************************************************
2 * Driver for Solarflare Solarstorm network controllers and boards
3 * Copyright 2005-2006 Fen Systems Ltd.
4 * Copyright 2005-2009 Solarflare Communications Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation, incorporated herein by reference.
11 #include <linux/module.h>
12 #include <linux/pci.h>
13 #include <linux/netdevice.h>
14 #include <linux/etherdevice.h>
15 #include <linux/delay.h>
16 #include <linux/notifier.h>
18 #include <linux/tcp.h>
20 #include <linux/crc32.h>
21 #include <linux/ethtool.h>
22 #include <linux/topology.h>
23 #include <linux/gfp.h>
24 #include "net_driver.h"
30 #include "workarounds.h"
32 /**************************************************************************
36 **************************************************************************
39 /* Loopback mode names (see LOOPBACK_MODE()) */
40 const unsigned int efx_loopback_mode_max = LOOPBACK_MAX;
41 const char *efx_loopback_mode_names[] = {
42 [LOOPBACK_NONE] = "NONE",
43 [LOOPBACK_DATA] = "DATAPATH",
44 [LOOPBACK_GMAC] = "GMAC",
45 [LOOPBACK_XGMII] = "XGMII",
46 [LOOPBACK_XGXS] = "XGXS",
47 [LOOPBACK_XAUI] = "XAUI",
48 [LOOPBACK_GMII] = "GMII",
49 [LOOPBACK_SGMII] = "SGMII",
50 [LOOPBACK_XGBR] = "XGBR",
51 [LOOPBACK_XFI] = "XFI",
52 [LOOPBACK_XAUI_FAR] = "XAUI_FAR",
53 [LOOPBACK_GMII_FAR] = "GMII_FAR",
54 [LOOPBACK_SGMII_FAR] = "SGMII_FAR",
55 [LOOPBACK_XFI_FAR] = "XFI_FAR",
56 [LOOPBACK_GPHY] = "GPHY",
57 [LOOPBACK_PHYXS] = "PHYXS",
58 [LOOPBACK_PCS] = "PCS",
59 [LOOPBACK_PMAPMD] = "PMA/PMD",
60 [LOOPBACK_XPORT] = "XPORT",
61 [LOOPBACK_XGMII_WS] = "XGMII_WS",
62 [LOOPBACK_XAUI_WS] = "XAUI_WS",
63 [LOOPBACK_XAUI_WS_FAR] = "XAUI_WS_FAR",
64 [LOOPBACK_XAUI_WS_NEAR] = "XAUI_WS_NEAR",
65 [LOOPBACK_GMII_WS] = "GMII_WS",
66 [LOOPBACK_XFI_WS] = "XFI_WS",
67 [LOOPBACK_XFI_WS_FAR] = "XFI_WS_FAR",
68 [LOOPBACK_PHYXS_WS] = "PHYXS_WS",
71 /* Interrupt mode names (see INT_MODE())) */
72 const unsigned int efx_interrupt_mode_max = EFX_INT_MODE_MAX;
73 const char *efx_interrupt_mode_names[] = {
74 [EFX_INT_MODE_MSIX] = "MSI-X",
75 [EFX_INT_MODE_MSI] = "MSI",
76 [EFX_INT_MODE_LEGACY] = "legacy",
79 const unsigned int efx_reset_type_max = RESET_TYPE_MAX;
80 const char *efx_reset_type_names[] = {
81 [RESET_TYPE_INVISIBLE] = "INVISIBLE",
82 [RESET_TYPE_ALL] = "ALL",
83 [RESET_TYPE_WORLD] = "WORLD",
84 [RESET_TYPE_DISABLE] = "DISABLE",
85 [RESET_TYPE_TX_WATCHDOG] = "TX_WATCHDOG",
86 [RESET_TYPE_INT_ERROR] = "INT_ERROR",
87 [RESET_TYPE_RX_RECOVERY] = "RX_RECOVERY",
88 [RESET_TYPE_RX_DESC_FETCH] = "RX_DESC_FETCH",
89 [RESET_TYPE_TX_DESC_FETCH] = "TX_DESC_FETCH",
90 [RESET_TYPE_TX_SKIP] = "TX_SKIP",
91 [RESET_TYPE_MC_FAILURE] = "MC_FAILURE",
94 #define EFX_MAX_MTU (9 * 1024)
96 /* Reset workqueue. If any NIC has a hardware failure then a reset will be
97 * queued onto this work queue. This is not a per-nic work queue, because
98 * efx_reset_work() acquires the rtnl lock, so resets are naturally serialised.
100 static struct workqueue_struct *reset_workqueue;
102 /**************************************************************************
104 * Configurable values
106 *************************************************************************/
109 * Use separate channels for TX and RX events
111 * Set this to 1 to use separate channels for TX and RX. It allows us
112 * to control interrupt affinity separately for TX and RX.
114 * This is only used in MSI-X interrupt mode
116 static unsigned int separate_tx_channels;
117 module_param(separate_tx_channels, uint, 0444);
118 MODULE_PARM_DESC(separate_tx_channels,
119 "Use separate channels for TX and RX");
121 /* This is the weight assigned to each of the (per-channel) virtual
124 static int napi_weight = 64;
126 /* This is the time (in jiffies) between invocations of the hardware
127 * monitor, which checks for known hardware bugs and resets the
128 * hardware and driver as necessary.
130 unsigned int efx_monitor_interval = 1 * HZ;
132 /* This controls whether or not the driver will initialise devices
133 * with invalid MAC addresses stored in the EEPROM or flash. If true,
134 * such devices will be initialised with a random locally-generated
135 * MAC address. This allows for loading the sfc_mtd driver to
136 * reprogram the flash, even if the flash contents (including the MAC
137 * address) have previously been erased.
139 static unsigned int allow_bad_hwaddr;
141 /* Initial interrupt moderation settings. They can be modified after
142 * module load with ethtool.
144 * The default for RX should strike a balance between increasing the
145 * round-trip latency and reducing overhead.
147 static unsigned int rx_irq_mod_usec = 60;
149 /* Initial interrupt moderation settings. They can be modified after
150 * module load with ethtool.
152 * This default is chosen to ensure that a 10G link does not go idle
153 * while a TX queue is stopped after it has become full. A queue is
154 * restarted when it drops below half full. The time this takes (assuming
155 * worst case 3 descriptors per packet and 1024 descriptors) is
156 * 512 / 3 * 1.2 = 205 usec.
158 static unsigned int tx_irq_mod_usec = 150;
160 /* This is the first interrupt mode to try out of:
165 static unsigned int interrupt_mode;
167 /* This is the requested number of CPUs to use for Receive-Side Scaling (RSS),
168 * i.e. the number of CPUs among which we may distribute simultaneous
169 * interrupt handling.
171 * Cards without MSI-X will only target one CPU via legacy or MSI interrupt.
172 * The default (0) means to assign an interrupt to each package (level II cache)
174 static unsigned int rss_cpus;
175 module_param(rss_cpus, uint, 0444);
176 MODULE_PARM_DESC(rss_cpus, "Number of CPUs to use for Receive-Side Scaling");
178 static int phy_flash_cfg;
179 module_param(phy_flash_cfg, int, 0644);
180 MODULE_PARM_DESC(phy_flash_cfg, "Set PHYs into reflash mode initially");
182 static unsigned irq_adapt_low_thresh = 10000;
183 module_param(irq_adapt_low_thresh, uint, 0644);
184 MODULE_PARM_DESC(irq_adapt_low_thresh,
185 "Threshold score for reducing IRQ moderation");
187 static unsigned irq_adapt_high_thresh = 20000;
188 module_param(irq_adapt_high_thresh, uint, 0644);
189 MODULE_PARM_DESC(irq_adapt_high_thresh,
190 "Threshold score for increasing IRQ moderation");
192 static unsigned debug = (NETIF_MSG_DRV | NETIF_MSG_PROBE |
193 NETIF_MSG_LINK | NETIF_MSG_IFDOWN |
194 NETIF_MSG_IFUP | NETIF_MSG_RX_ERR |
195 NETIF_MSG_TX_ERR | NETIF_MSG_HW);
196 module_param(debug, uint, 0);
197 MODULE_PARM_DESC(debug, "Bitmapped debugging message enable value");
199 /**************************************************************************
201 * Utility functions and prototypes
203 *************************************************************************/
204 static void efx_remove_channel(struct efx_channel *channel);
205 static void efx_remove_port(struct efx_nic *efx);
206 static void efx_fini_napi(struct efx_nic *efx);
207 static void efx_fini_channels(struct efx_nic *efx);
209 #define EFX_ASSERT_RESET_SERIALISED(efx) \
211 if ((efx->state == STATE_RUNNING) || \
212 (efx->state == STATE_DISABLED)) \
216 /**************************************************************************
218 * Event queue processing
220 *************************************************************************/
222 /* Process channel's event queue
224 * This function is responsible for processing the event queue of a
225 * single channel. The caller must guarantee that this function will
226 * never be concurrently called more than once on the same channel,
227 * though different channels may be being processed concurrently.
229 static int efx_process_channel(struct efx_channel *channel, int budget)
231 struct efx_nic *efx = channel->efx;
234 if (unlikely(efx->reset_pending != RESET_TYPE_NONE ||
238 spent = efx_nic_process_eventq(channel, budget);
242 /* Deliver last RX packet. */
243 if (channel->rx_pkt) {
244 __efx_rx_packet(channel, channel->rx_pkt,
245 channel->rx_pkt_csummed);
246 channel->rx_pkt = NULL;
249 efx_rx_strategy(channel);
251 efx_fast_push_rx_descriptors(efx_channel_get_rx_queue(channel));
256 /* Mark channel as finished processing
258 * Note that since we will not receive further interrupts for this
259 * channel before we finish processing and call the eventq_read_ack()
260 * method, there is no need to use the interrupt hold-off timers.
262 static inline void efx_channel_processed(struct efx_channel *channel)
264 /* The interrupt handler for this channel may set work_pending
265 * as soon as we acknowledge the events we've seen. Make sure
266 * it's cleared before then. */
267 channel->work_pending = false;
270 efx_nic_eventq_read_ack(channel);
275 * NAPI guarantees serialisation of polls of the same device, which
276 * provides the guarantee required by efx_process_channel().
278 static int efx_poll(struct napi_struct *napi, int budget)
280 struct efx_channel *channel =
281 container_of(napi, struct efx_channel, napi_str);
282 struct efx_nic *efx = channel->efx;
285 netif_vdbg(efx, intr, efx->net_dev,
286 "channel %d NAPI poll executing on CPU %d\n",
287 channel->channel, raw_smp_processor_id());
289 spent = efx_process_channel(channel, budget);
291 if (spent < budget) {
292 if (channel->channel < efx->n_rx_channels &&
293 efx->irq_rx_adaptive &&
294 unlikely(++channel->irq_count == 1000)) {
295 if (unlikely(channel->irq_mod_score <
296 irq_adapt_low_thresh)) {
297 if (channel->irq_moderation > 1) {
298 channel->irq_moderation -= 1;
299 efx->type->push_irq_moderation(channel);
301 } else if (unlikely(channel->irq_mod_score >
302 irq_adapt_high_thresh)) {
303 if (channel->irq_moderation <
304 efx->irq_rx_moderation) {
305 channel->irq_moderation += 1;
306 efx->type->push_irq_moderation(channel);
309 channel->irq_count = 0;
310 channel->irq_mod_score = 0;
313 /* There is no race here; although napi_disable() will
314 * only wait for napi_complete(), this isn't a problem
315 * since efx_channel_processed() will have no effect if
316 * interrupts have already been disabled.
319 efx_channel_processed(channel);
325 /* Process the eventq of the specified channel immediately on this CPU
327 * Disable hardware generated interrupts, wait for any existing
328 * processing to finish, then directly poll (and ack ) the eventq.
329 * Finally reenable NAPI and interrupts.
331 * Since we are touching interrupts the caller should hold the suspend lock
333 void efx_process_channel_now(struct efx_channel *channel)
335 struct efx_nic *efx = channel->efx;
337 BUG_ON(channel->channel >= efx->n_channels);
338 BUG_ON(!channel->enabled);
340 /* Disable interrupts and wait for ISRs to complete */
341 efx_nic_disable_interrupts(efx);
343 synchronize_irq(efx->legacy_irq);
345 synchronize_irq(channel->irq);
347 /* Wait for any NAPI processing to complete */
348 napi_disable(&channel->napi_str);
350 /* Poll the channel */
351 efx_process_channel(channel, EFX_EVQ_SIZE);
353 /* Ack the eventq. This may cause an interrupt to be generated
354 * when they are reenabled */
355 efx_channel_processed(channel);
357 napi_enable(&channel->napi_str);
358 efx_nic_enable_interrupts(efx);
361 /* Create event queue
362 * Event queue memory allocations are done only once. If the channel
363 * is reset, the memory buffer will be reused; this guards against
364 * errors during channel reset and also simplifies interrupt handling.
366 static int efx_probe_eventq(struct efx_channel *channel)
368 netif_dbg(channel->efx, probe, channel->efx->net_dev,
369 "chan %d create event queue\n", channel->channel);
371 return efx_nic_probe_eventq(channel);
374 /* Prepare channel's event queue */
375 static void efx_init_eventq(struct efx_channel *channel)
377 netif_dbg(channel->efx, drv, channel->efx->net_dev,
378 "chan %d init event queue\n", channel->channel);
380 channel->eventq_read_ptr = 0;
382 efx_nic_init_eventq(channel);
385 static void efx_fini_eventq(struct efx_channel *channel)
387 netif_dbg(channel->efx, drv, channel->efx->net_dev,
388 "chan %d fini event queue\n", channel->channel);
390 efx_nic_fini_eventq(channel);
393 static void efx_remove_eventq(struct efx_channel *channel)
395 netif_dbg(channel->efx, drv, channel->efx->net_dev,
396 "chan %d remove event queue\n", channel->channel);
398 efx_nic_remove_eventq(channel);
401 /**************************************************************************
405 *************************************************************************/
407 static int efx_probe_channel(struct efx_channel *channel)
409 struct efx_tx_queue *tx_queue;
410 struct efx_rx_queue *rx_queue;
413 netif_dbg(channel->efx, probe, channel->efx->net_dev,
414 "creating channel %d\n", channel->channel);
416 rc = efx_probe_eventq(channel);
420 efx_for_each_channel_tx_queue(tx_queue, channel) {
421 rc = efx_probe_tx_queue(tx_queue);
426 efx_for_each_channel_rx_queue(rx_queue, channel) {
427 rc = efx_probe_rx_queue(rx_queue);
432 channel->n_rx_frm_trunc = 0;
437 efx_for_each_channel_rx_queue(rx_queue, channel)
438 efx_remove_rx_queue(rx_queue);
440 efx_for_each_channel_tx_queue(tx_queue, channel)
441 efx_remove_tx_queue(tx_queue);
447 static void efx_set_channel_names(struct efx_nic *efx)
449 struct efx_channel *channel;
450 const char *type = "";
453 efx_for_each_channel(channel, efx) {
454 number = channel->channel;
455 if (efx->n_channels > efx->n_rx_channels) {
456 if (channel->channel < efx->n_rx_channels) {
460 number -= efx->n_rx_channels;
463 snprintf(channel->name, sizeof(channel->name),
464 "%s%s-%d", efx->name, type, number);
468 /* Channels are shutdown and reinitialised whilst the NIC is running
469 * to propagate configuration changes (mtu, checksum offload), or
470 * to clear hardware error conditions
472 static void efx_init_channels(struct efx_nic *efx)
474 struct efx_tx_queue *tx_queue;
475 struct efx_rx_queue *rx_queue;
476 struct efx_channel *channel;
478 /* Calculate the rx buffer allocation parameters required to
479 * support the current MTU, including padding for header
480 * alignment and overruns.
482 efx->rx_buffer_len = (max(EFX_PAGE_IP_ALIGN, NET_IP_ALIGN) +
483 EFX_MAX_FRAME_LEN(efx->net_dev->mtu) +
484 efx->type->rx_buffer_hash_size +
485 efx->type->rx_buffer_padding);
486 efx->rx_buffer_order = get_order(efx->rx_buffer_len +
487 sizeof(struct efx_rx_page_state));
489 /* Initialise the channels */
490 efx_for_each_channel(channel, efx) {
491 netif_dbg(channel->efx, drv, channel->efx->net_dev,
492 "init chan %d\n", channel->channel);
494 efx_init_eventq(channel);
496 efx_for_each_channel_tx_queue(tx_queue, channel)
497 efx_init_tx_queue(tx_queue);
499 /* The rx buffer allocation strategy is MTU dependent */
500 efx_rx_strategy(channel);
502 efx_for_each_channel_rx_queue(rx_queue, channel)
503 efx_init_rx_queue(rx_queue);
505 WARN_ON(channel->rx_pkt != NULL);
506 efx_rx_strategy(channel);
510 /* This enables event queue processing and packet transmission.
512 * Note that this function is not allowed to fail, since that would
513 * introduce too much complexity into the suspend/resume path.
515 static void efx_start_channel(struct efx_channel *channel)
517 struct efx_rx_queue *rx_queue;
519 netif_dbg(channel->efx, ifup, channel->efx->net_dev,
520 "starting chan %d\n", channel->channel);
522 /* The interrupt handler for this channel may set work_pending
523 * as soon as we enable it. Make sure it's cleared before
524 * then. Similarly, make sure it sees the enabled flag set. */
525 channel->work_pending = false;
526 channel->enabled = true;
529 /* Fill the queues before enabling NAPI */
530 efx_for_each_channel_rx_queue(rx_queue, channel)
531 efx_fast_push_rx_descriptors(rx_queue);
533 napi_enable(&channel->napi_str);
536 /* This disables event queue processing and packet transmission.
537 * This function does not guarantee that all queue processing
538 * (e.g. RX refill) is complete.
540 static void efx_stop_channel(struct efx_channel *channel)
542 if (!channel->enabled)
545 netif_dbg(channel->efx, ifdown, channel->efx->net_dev,
546 "stop chan %d\n", channel->channel);
548 channel->enabled = false;
549 napi_disable(&channel->napi_str);
552 static void efx_fini_channels(struct efx_nic *efx)
554 struct efx_channel *channel;
555 struct efx_tx_queue *tx_queue;
556 struct efx_rx_queue *rx_queue;
559 EFX_ASSERT_RESET_SERIALISED(efx);
560 BUG_ON(efx->port_enabled);
562 rc = efx_nic_flush_queues(efx);
563 if (rc && EFX_WORKAROUND_7803(efx)) {
564 /* Schedule a reset to recover from the flush failure. The
565 * descriptor caches reference memory we're about to free,
566 * but falcon_reconfigure_mac_wrapper() won't reconnect
567 * the MACs because of the pending reset. */
568 netif_err(efx, drv, efx->net_dev,
569 "Resetting to recover from flush failure\n");
570 efx_schedule_reset(efx, RESET_TYPE_ALL);
572 netif_err(efx, drv, efx->net_dev, "failed to flush queues\n");
574 netif_dbg(efx, drv, efx->net_dev,
575 "successfully flushed all queues\n");
578 efx_for_each_channel(channel, efx) {
579 netif_dbg(channel->efx, drv, channel->efx->net_dev,
580 "shut down chan %d\n", channel->channel);
582 efx_for_each_channel_rx_queue(rx_queue, channel)
583 efx_fini_rx_queue(rx_queue);
584 efx_for_each_channel_tx_queue(tx_queue, channel)
585 efx_fini_tx_queue(tx_queue);
586 efx_fini_eventq(channel);
590 static void efx_remove_channel(struct efx_channel *channel)
592 struct efx_tx_queue *tx_queue;
593 struct efx_rx_queue *rx_queue;
595 netif_dbg(channel->efx, drv, channel->efx->net_dev,
596 "destroy chan %d\n", channel->channel);
598 efx_for_each_channel_rx_queue(rx_queue, channel)
599 efx_remove_rx_queue(rx_queue);
600 efx_for_each_channel_tx_queue(tx_queue, channel)
601 efx_remove_tx_queue(tx_queue);
602 efx_remove_eventq(channel);
605 void efx_schedule_slow_fill(struct efx_rx_queue *rx_queue)
607 mod_timer(&rx_queue->slow_fill, jiffies + msecs_to_jiffies(100));
610 /**************************************************************************
614 **************************************************************************/
616 /* This ensures that the kernel is kept informed (via
617 * netif_carrier_on/off) of the link status, and also maintains the
618 * link status's stop on the port's TX queue.
620 void efx_link_status_changed(struct efx_nic *efx)
622 struct efx_link_state *link_state = &efx->link_state;
624 /* SFC Bug 5356: A net_dev notifier is registered, so we must ensure
625 * that no events are triggered between unregister_netdev() and the
626 * driver unloading. A more general condition is that NETDEV_CHANGE
627 * can only be generated between NETDEV_UP and NETDEV_DOWN */
628 if (!netif_running(efx->net_dev))
631 if (efx->port_inhibited) {
632 netif_carrier_off(efx->net_dev);
636 if (link_state->up != netif_carrier_ok(efx->net_dev)) {
637 efx->n_link_state_changes++;
640 netif_carrier_on(efx->net_dev);
642 netif_carrier_off(efx->net_dev);
645 /* Status message for kernel log */
646 if (link_state->up) {
647 netif_info(efx, link, efx->net_dev,
648 "link up at %uMbps %s-duplex (MTU %d)%s\n",
649 link_state->speed, link_state->fd ? "full" : "half",
651 (efx->promiscuous ? " [PROMISC]" : ""));
653 netif_info(efx, link, efx->net_dev, "link down\n");
658 void efx_link_set_advertising(struct efx_nic *efx, u32 advertising)
660 efx->link_advertising = advertising;
662 if (advertising & ADVERTISED_Pause)
663 efx->wanted_fc |= (EFX_FC_TX | EFX_FC_RX);
665 efx->wanted_fc &= ~(EFX_FC_TX | EFX_FC_RX);
666 if (advertising & ADVERTISED_Asym_Pause)
667 efx->wanted_fc ^= EFX_FC_TX;
671 void efx_link_set_wanted_fc(struct efx_nic *efx, enum efx_fc_type wanted_fc)
673 efx->wanted_fc = wanted_fc;
674 if (efx->link_advertising) {
675 if (wanted_fc & EFX_FC_RX)
676 efx->link_advertising |= (ADVERTISED_Pause |
677 ADVERTISED_Asym_Pause);
679 efx->link_advertising &= ~(ADVERTISED_Pause |
680 ADVERTISED_Asym_Pause);
681 if (wanted_fc & EFX_FC_TX)
682 efx->link_advertising ^= ADVERTISED_Asym_Pause;
686 static void efx_fini_port(struct efx_nic *efx);
688 /* Push loopback/power/transmit disable settings to the PHY, and reconfigure
689 * the MAC appropriately. All other PHY configuration changes are pushed
690 * through phy_op->set_settings(), and pushed asynchronously to the MAC
691 * through efx_monitor().
693 * Callers must hold the mac_lock
695 int __efx_reconfigure_port(struct efx_nic *efx)
697 enum efx_phy_mode phy_mode;
700 WARN_ON(!mutex_is_locked(&efx->mac_lock));
702 /* Serialise the promiscuous flag with efx_set_multicast_list. */
703 if (efx_dev_registered(efx)) {
704 netif_addr_lock_bh(efx->net_dev);
705 netif_addr_unlock_bh(efx->net_dev);
708 /* Disable PHY transmit in mac level loopbacks */
709 phy_mode = efx->phy_mode;
710 if (LOOPBACK_INTERNAL(efx))
711 efx->phy_mode |= PHY_MODE_TX_DISABLED;
713 efx->phy_mode &= ~PHY_MODE_TX_DISABLED;
715 rc = efx->type->reconfigure_port(efx);
718 efx->phy_mode = phy_mode;
723 /* Reinitialise the MAC to pick up new PHY settings, even if the port is
725 int efx_reconfigure_port(struct efx_nic *efx)
729 EFX_ASSERT_RESET_SERIALISED(efx);
731 mutex_lock(&efx->mac_lock);
732 rc = __efx_reconfigure_port(efx);
733 mutex_unlock(&efx->mac_lock);
738 /* Asynchronous work item for changing MAC promiscuity and multicast
739 * hash. Avoid a drain/rx_ingress enable by reconfiguring the current
741 static void efx_mac_work(struct work_struct *data)
743 struct efx_nic *efx = container_of(data, struct efx_nic, mac_work);
745 mutex_lock(&efx->mac_lock);
746 if (efx->port_enabled) {
747 efx->type->push_multicast_hash(efx);
748 efx->mac_op->reconfigure(efx);
750 mutex_unlock(&efx->mac_lock);
753 static int efx_probe_port(struct efx_nic *efx)
757 netif_dbg(efx, probe, efx->net_dev, "create port\n");
760 efx->phy_mode = PHY_MODE_SPECIAL;
762 /* Connect up MAC/PHY operations table */
763 rc = efx->type->probe_port(efx);
767 /* Sanity check MAC address */
768 if (is_valid_ether_addr(efx->mac_address)) {
769 memcpy(efx->net_dev->dev_addr, efx->mac_address, ETH_ALEN);
771 netif_err(efx, probe, efx->net_dev, "invalid MAC address %pM\n",
773 if (!allow_bad_hwaddr) {
777 random_ether_addr(efx->net_dev->dev_addr);
778 netif_info(efx, probe, efx->net_dev,
779 "using locally-generated MAC %pM\n",
780 efx->net_dev->dev_addr);
786 efx->type->remove_port(efx);
790 static int efx_init_port(struct efx_nic *efx)
794 netif_dbg(efx, drv, efx->net_dev, "init port\n");
796 mutex_lock(&efx->mac_lock);
798 rc = efx->phy_op->init(efx);
802 efx->port_initialized = true;
804 /* Reconfigure the MAC before creating dma queues (required for
805 * Falcon/A1 where RX_INGR_EN/TX_DRAIN_EN isn't supported) */
806 efx->mac_op->reconfigure(efx);
808 /* Ensure the PHY advertises the correct flow control settings */
809 rc = efx->phy_op->reconfigure(efx);
813 mutex_unlock(&efx->mac_lock);
817 efx->phy_op->fini(efx);
819 mutex_unlock(&efx->mac_lock);
823 static void efx_start_port(struct efx_nic *efx)
825 netif_dbg(efx, ifup, efx->net_dev, "start port\n");
826 BUG_ON(efx->port_enabled);
828 mutex_lock(&efx->mac_lock);
829 efx->port_enabled = true;
831 /* efx_mac_work() might have been scheduled after efx_stop_port(),
832 * and then cancelled by efx_flush_all() */
833 efx->type->push_multicast_hash(efx);
834 efx->mac_op->reconfigure(efx);
836 mutex_unlock(&efx->mac_lock);
839 /* Prevent efx_mac_work() and efx_monitor() from working */
840 static void efx_stop_port(struct efx_nic *efx)
842 netif_dbg(efx, ifdown, efx->net_dev, "stop port\n");
844 mutex_lock(&efx->mac_lock);
845 efx->port_enabled = false;
846 mutex_unlock(&efx->mac_lock);
848 /* Serialise against efx_set_multicast_list() */
849 if (efx_dev_registered(efx)) {
850 netif_addr_lock_bh(efx->net_dev);
851 netif_addr_unlock_bh(efx->net_dev);
855 static void efx_fini_port(struct efx_nic *efx)
857 netif_dbg(efx, drv, efx->net_dev, "shut down port\n");
859 if (!efx->port_initialized)
862 efx->phy_op->fini(efx);
863 efx->port_initialized = false;
865 efx->link_state.up = false;
866 efx_link_status_changed(efx);
869 static void efx_remove_port(struct efx_nic *efx)
871 netif_dbg(efx, drv, efx->net_dev, "destroying port\n");
873 efx->type->remove_port(efx);
876 /**************************************************************************
880 **************************************************************************/
882 /* This configures the PCI device to enable I/O and DMA. */
883 static int efx_init_io(struct efx_nic *efx)
885 struct pci_dev *pci_dev = efx->pci_dev;
886 dma_addr_t dma_mask = efx->type->max_dma_mask;
889 netif_dbg(efx, probe, efx->net_dev, "initialising I/O\n");
891 rc = pci_enable_device(pci_dev);
893 netif_err(efx, probe, efx->net_dev,
894 "failed to enable PCI device\n");
898 pci_set_master(pci_dev);
900 /* Set the PCI DMA mask. Try all possibilities from our
901 * genuine mask down to 32 bits, because some architectures
902 * (e.g. x86_64 with iommu_sac_force set) will allow 40 bit
903 * masks event though they reject 46 bit masks.
905 while (dma_mask > 0x7fffffffUL) {
906 if (pci_dma_supported(pci_dev, dma_mask) &&
907 ((rc = pci_set_dma_mask(pci_dev, dma_mask)) == 0))
912 netif_err(efx, probe, efx->net_dev,
913 "could not find a suitable DMA mask\n");
916 netif_dbg(efx, probe, efx->net_dev,
917 "using DMA mask %llx\n", (unsigned long long) dma_mask);
918 rc = pci_set_consistent_dma_mask(pci_dev, dma_mask);
920 /* pci_set_consistent_dma_mask() is not *allowed* to
921 * fail with a mask that pci_set_dma_mask() accepted,
922 * but just in case...
924 netif_err(efx, probe, efx->net_dev,
925 "failed to set consistent DMA mask\n");
929 efx->membase_phys = pci_resource_start(efx->pci_dev, EFX_MEM_BAR);
930 rc = pci_request_region(pci_dev, EFX_MEM_BAR, "sfc");
932 netif_err(efx, probe, efx->net_dev,
933 "request for memory BAR failed\n");
937 efx->membase = ioremap_nocache(efx->membase_phys,
938 efx->type->mem_map_size);
940 netif_err(efx, probe, efx->net_dev,
941 "could not map memory BAR at %llx+%x\n",
942 (unsigned long long)efx->membase_phys,
943 efx->type->mem_map_size);
947 netif_dbg(efx, probe, efx->net_dev,
948 "memory BAR at %llx+%x (virtual %p)\n",
949 (unsigned long long)efx->membase_phys,
950 efx->type->mem_map_size, efx->membase);
955 pci_release_region(efx->pci_dev, EFX_MEM_BAR);
957 efx->membase_phys = 0;
959 pci_disable_device(efx->pci_dev);
964 static void efx_fini_io(struct efx_nic *efx)
966 netif_dbg(efx, drv, efx->net_dev, "shutting down I/O\n");
969 iounmap(efx->membase);
973 if (efx->membase_phys) {
974 pci_release_region(efx->pci_dev, EFX_MEM_BAR);
975 efx->membase_phys = 0;
978 pci_disable_device(efx->pci_dev);
981 /* Get number of channels wanted. Each channel will have its own IRQ,
982 * 1 RX queue and/or 2 TX queues. */
983 static int efx_wanted_channels(void)
985 cpumask_var_t core_mask;
989 if (unlikely(!zalloc_cpumask_var(&core_mask, GFP_KERNEL))) {
991 "sfc: RSS disabled due to allocation failure\n");
996 for_each_online_cpu(cpu) {
997 if (!cpumask_test_cpu(cpu, core_mask)) {
999 cpumask_or(core_mask, core_mask,
1000 topology_core_cpumask(cpu));
1004 free_cpumask_var(core_mask);
1008 /* Probe the number and type of interrupts we are able to obtain, and
1009 * the resulting numbers of channels and RX queues.
1011 static void efx_probe_interrupts(struct efx_nic *efx)
1014 min_t(int, efx->type->phys_addr_channels, EFX_MAX_CHANNELS);
1017 if (efx->interrupt_mode == EFX_INT_MODE_MSIX) {
1018 struct msix_entry xentries[EFX_MAX_CHANNELS];
1021 n_channels = efx_wanted_channels();
1022 if (separate_tx_channels)
1024 n_channels = min(n_channels, max_channels);
1026 for (i = 0; i < n_channels; i++)
1027 xentries[i].entry = i;
1028 rc = pci_enable_msix(efx->pci_dev, xentries, n_channels);
1030 netif_err(efx, drv, efx->net_dev,
1031 "WARNING: Insufficient MSI-X vectors"
1032 " available (%d < %d).\n", rc, n_channels);
1033 netif_err(efx, drv, efx->net_dev,
1034 "WARNING: Performance may be reduced.\n");
1035 EFX_BUG_ON_PARANOID(rc >= n_channels);
1037 rc = pci_enable_msix(efx->pci_dev, xentries,
1042 efx->n_channels = n_channels;
1043 if (separate_tx_channels) {
1044 efx->n_tx_channels =
1045 max(efx->n_channels / 2, 1U);
1046 efx->n_rx_channels =
1047 max(efx->n_channels -
1048 efx->n_tx_channels, 1U);
1050 efx->n_tx_channels = efx->n_channels;
1051 efx->n_rx_channels = efx->n_channels;
1053 for (i = 0; i < n_channels; i++)
1054 efx_get_channel(efx, i)->irq =
1057 /* Fall back to single channel MSI */
1058 efx->interrupt_mode = EFX_INT_MODE_MSI;
1059 netif_err(efx, drv, efx->net_dev,
1060 "could not enable MSI-X\n");
1064 /* Try single interrupt MSI */
1065 if (efx->interrupt_mode == EFX_INT_MODE_MSI) {
1066 efx->n_channels = 1;
1067 efx->n_rx_channels = 1;
1068 efx->n_tx_channels = 1;
1069 rc = pci_enable_msi(efx->pci_dev);
1071 efx_get_channel(efx, 0)->irq = efx->pci_dev->irq;
1073 netif_err(efx, drv, efx->net_dev,
1074 "could not enable MSI\n");
1075 efx->interrupt_mode = EFX_INT_MODE_LEGACY;
1079 /* Assume legacy interrupts */
1080 if (efx->interrupt_mode == EFX_INT_MODE_LEGACY) {
1081 efx->n_channels = 1 + (separate_tx_channels ? 1 : 0);
1082 efx->n_rx_channels = 1;
1083 efx->n_tx_channels = 1;
1084 efx->legacy_irq = efx->pci_dev->irq;
1088 static void efx_remove_interrupts(struct efx_nic *efx)
1090 struct efx_channel *channel;
1092 /* Remove MSI/MSI-X interrupts */
1093 efx_for_each_channel(channel, efx)
1095 pci_disable_msi(efx->pci_dev);
1096 pci_disable_msix(efx->pci_dev);
1098 /* Remove legacy interrupt */
1099 efx->legacy_irq = 0;
1102 struct efx_tx_queue *
1103 efx_get_tx_queue(struct efx_nic *efx, unsigned index, unsigned type)
1105 unsigned tx_channel_offset =
1106 separate_tx_channels ? efx->n_channels - efx->n_tx_channels : 0;
1107 EFX_BUG_ON_PARANOID(index >= efx->n_tx_channels ||
1108 type >= EFX_TXQ_TYPES);
1109 return &efx->channel[tx_channel_offset + index]->tx_queue[type];
1112 static void efx_set_channels(struct efx_nic *efx)
1114 struct efx_channel *channel;
1115 struct efx_tx_queue *tx_queue;
1116 unsigned tx_channel_offset =
1117 separate_tx_channels ? efx->n_channels - efx->n_tx_channels : 0;
1119 /* Channel pointers were set in efx_init_struct() but we now
1120 * need to clear them for TX queues in any RX-only channels. */
1121 efx_for_each_channel(channel, efx) {
1122 if (channel->channel - tx_channel_offset >=
1123 efx->n_tx_channels) {
1124 efx_for_each_channel_tx_queue(tx_queue, channel)
1125 tx_queue->channel = NULL;
1130 static int efx_probe_nic(struct efx_nic *efx)
1135 netif_dbg(efx, probe, efx->net_dev, "creating NIC\n");
1137 /* Carry out hardware-type specific initialisation */
1138 rc = efx->type->probe(efx);
1142 /* Determine the number of channels and queues by trying to hook
1143 * in MSI-X interrupts. */
1144 efx_probe_interrupts(efx);
1146 if (efx->n_channels > 1)
1147 get_random_bytes(&efx->rx_hash_key, sizeof(efx->rx_hash_key));
1148 for (i = 0; i < ARRAY_SIZE(efx->rx_indir_table); i++)
1149 efx->rx_indir_table[i] = i % efx->n_rx_channels;
1151 efx_set_channels(efx);
1152 efx->net_dev->real_num_tx_queues = efx->n_tx_channels;
1154 /* Initialise the interrupt moderation settings */
1155 efx_init_irq_moderation(efx, tx_irq_mod_usec, rx_irq_mod_usec, true);
1160 static void efx_remove_nic(struct efx_nic *efx)
1162 netif_dbg(efx, drv, efx->net_dev, "destroying NIC\n");
1164 efx_remove_interrupts(efx);
1165 efx->type->remove(efx);
1168 /**************************************************************************
1170 * NIC startup/shutdown
1172 *************************************************************************/
1174 static int efx_probe_all(struct efx_nic *efx)
1176 struct efx_channel *channel;
1180 rc = efx_probe_nic(efx);
1182 netif_err(efx, probe, efx->net_dev, "failed to create NIC\n");
1187 rc = efx_probe_port(efx);
1189 netif_err(efx, probe, efx->net_dev, "failed to create port\n");
1193 /* Create channels */
1194 efx_for_each_channel(channel, efx) {
1195 rc = efx_probe_channel(channel);
1197 netif_err(efx, probe, efx->net_dev,
1198 "failed to create channel %d\n",
1203 efx_set_channel_names(efx);
1208 efx_for_each_channel(channel, efx)
1209 efx_remove_channel(channel);
1210 efx_remove_port(efx);
1212 efx_remove_nic(efx);
1217 /* Called after previous invocation(s) of efx_stop_all, restarts the
1218 * port, kernel transmit queue, NAPI processing and hardware interrupts,
1219 * and ensures that the port is scheduled to be reconfigured.
1220 * This function is safe to call multiple times when the NIC is in any
1222 static void efx_start_all(struct efx_nic *efx)
1224 struct efx_channel *channel;
1226 EFX_ASSERT_RESET_SERIALISED(efx);
1228 /* Check that it is appropriate to restart the interface. All
1229 * of these flags are safe to read under just the rtnl lock */
1230 if (efx->port_enabled)
1232 if ((efx->state != STATE_RUNNING) && (efx->state != STATE_INIT))
1234 if (efx_dev_registered(efx) && !netif_running(efx->net_dev))
1237 /* Mark the port as enabled so port reconfigurations can start, then
1238 * restart the transmit interface early so the watchdog timer stops */
1239 efx_start_port(efx);
1241 efx_for_each_channel(channel, efx) {
1242 if (efx_dev_registered(efx))
1243 efx_wake_queue(channel);
1244 efx_start_channel(channel);
1247 efx_nic_enable_interrupts(efx);
1249 /* Switch to event based MCDI completions after enabling interrupts.
1250 * If a reset has been scheduled, then we need to stay in polled mode.
1251 * Rather than serialising efx_mcdi_mode_event() [which sleeps] and
1252 * reset_pending [modified from an atomic context], we instead guarantee
1253 * that efx_mcdi_mode_poll() isn't reverted erroneously */
1254 efx_mcdi_mode_event(efx);
1255 if (efx->reset_pending != RESET_TYPE_NONE)
1256 efx_mcdi_mode_poll(efx);
1258 /* Start the hardware monitor if there is one. Otherwise (we're link
1259 * event driven), we have to poll the PHY because after an event queue
1260 * flush, we could have a missed a link state change */
1261 if (efx->type->monitor != NULL) {
1262 queue_delayed_work(efx->workqueue, &efx->monitor_work,
1263 efx_monitor_interval);
1265 mutex_lock(&efx->mac_lock);
1266 if (efx->phy_op->poll(efx))
1267 efx_link_status_changed(efx);
1268 mutex_unlock(&efx->mac_lock);
1271 efx->type->start_stats(efx);
1274 /* Flush all delayed work. Should only be called when no more delayed work
1275 * will be scheduled. This doesn't flush pending online resets (efx_reset),
1276 * since we're holding the rtnl_lock at this point. */
1277 static void efx_flush_all(struct efx_nic *efx)
1279 /* Make sure the hardware monitor is stopped */
1280 cancel_delayed_work_sync(&efx->monitor_work);
1281 /* Stop scheduled port reconfigurations */
1282 cancel_work_sync(&efx->mac_work);
1285 /* Quiesce hardware and software without bringing the link down.
1286 * Safe to call multiple times, when the nic and interface is in any
1287 * state. The caller is guaranteed to subsequently be in a position
1288 * to modify any hardware and software state they see fit without
1290 static void efx_stop_all(struct efx_nic *efx)
1292 struct efx_channel *channel;
1294 EFX_ASSERT_RESET_SERIALISED(efx);
1296 /* port_enabled can be read safely under the rtnl lock */
1297 if (!efx->port_enabled)
1300 efx->type->stop_stats(efx);
1302 /* Switch to MCDI polling on Siena before disabling interrupts */
1303 efx_mcdi_mode_poll(efx);
1305 /* Disable interrupts and wait for ISR to complete */
1306 efx_nic_disable_interrupts(efx);
1307 if (efx->legacy_irq)
1308 synchronize_irq(efx->legacy_irq);
1309 efx_for_each_channel(channel, efx) {
1311 synchronize_irq(channel->irq);
1314 /* Stop all NAPI processing and synchronous rx refills */
1315 efx_for_each_channel(channel, efx)
1316 efx_stop_channel(channel);
1318 /* Stop all asynchronous port reconfigurations. Since all
1319 * event processing has already been stopped, there is no
1320 * window to loose phy events */
1323 /* Flush efx_mac_work(), refill_workqueue, monitor_work */
1326 /* Stop the kernel transmit interface late, so the watchdog
1327 * timer isn't ticking over the flush */
1328 if (efx_dev_registered(efx)) {
1329 struct efx_channel *channel;
1330 efx_for_each_channel(channel, efx)
1331 efx_stop_queue(channel);
1332 netif_tx_lock_bh(efx->net_dev);
1333 netif_tx_unlock_bh(efx->net_dev);
1337 static void efx_remove_all(struct efx_nic *efx)
1339 struct efx_channel *channel;
1341 efx_for_each_channel(channel, efx)
1342 efx_remove_channel(channel);
1343 efx_remove_port(efx);
1344 efx_remove_nic(efx);
1347 /**************************************************************************
1349 * Interrupt moderation
1351 **************************************************************************/
1353 static unsigned irq_mod_ticks(int usecs, int resolution)
1356 return 0; /* cannot receive interrupts ahead of time :-) */
1357 if (usecs < resolution)
1358 return 1; /* never round down to 0 */
1359 return usecs / resolution;
1362 /* Set interrupt moderation parameters */
1363 void efx_init_irq_moderation(struct efx_nic *efx, int tx_usecs, int rx_usecs,
1366 struct efx_channel *channel;
1367 unsigned tx_ticks = irq_mod_ticks(tx_usecs, EFX_IRQ_MOD_RESOLUTION);
1368 unsigned rx_ticks = irq_mod_ticks(rx_usecs, EFX_IRQ_MOD_RESOLUTION);
1370 EFX_ASSERT_RESET_SERIALISED(efx);
1372 efx->irq_rx_adaptive = rx_adaptive;
1373 efx->irq_rx_moderation = rx_ticks;
1374 efx_for_each_channel(channel, efx) {
1375 if (efx_channel_get_rx_queue(channel))
1376 channel->irq_moderation = rx_ticks;
1377 else if (efx_channel_get_tx_queue(channel, 0))
1378 channel->irq_moderation = tx_ticks;
1382 /**************************************************************************
1386 **************************************************************************/
1388 /* Run periodically off the general workqueue. Serialised against
1389 * efx_reconfigure_port via the mac_lock */
1390 static void efx_monitor(struct work_struct *data)
1392 struct efx_nic *efx = container_of(data, struct efx_nic,
1395 netif_vdbg(efx, timer, efx->net_dev,
1396 "hardware monitor executing on CPU %d\n",
1397 raw_smp_processor_id());
1398 BUG_ON(efx->type->monitor == NULL);
1400 /* If the mac_lock is already held then it is likely a port
1401 * reconfiguration is already in place, which will likely do
1402 * most of the work of check_hw() anyway. */
1403 if (!mutex_trylock(&efx->mac_lock))
1405 if (!efx->port_enabled)
1407 efx->type->monitor(efx);
1410 mutex_unlock(&efx->mac_lock);
1412 queue_delayed_work(efx->workqueue, &efx->monitor_work,
1413 efx_monitor_interval);
1416 /**************************************************************************
1420 *************************************************************************/
1423 * Context: process, rtnl_lock() held.
1425 static int efx_ioctl(struct net_device *net_dev, struct ifreq *ifr, int cmd)
1427 struct efx_nic *efx = netdev_priv(net_dev);
1428 struct mii_ioctl_data *data = if_mii(ifr);
1430 EFX_ASSERT_RESET_SERIALISED(efx);
1432 /* Convert phy_id from older PRTAD/DEVAD format */
1433 if ((cmd == SIOCGMIIREG || cmd == SIOCSMIIREG) &&
1434 (data->phy_id & 0xfc00) == 0x0400)
1435 data->phy_id ^= MDIO_PHY_ID_C45 | 0x0400;
1437 return mdio_mii_ioctl(&efx->mdio, data, cmd);
1440 /**************************************************************************
1444 **************************************************************************/
1446 static int efx_init_napi(struct efx_nic *efx)
1448 struct efx_channel *channel;
1450 efx_for_each_channel(channel, efx) {
1451 channel->napi_dev = efx->net_dev;
1452 netif_napi_add(channel->napi_dev, &channel->napi_str,
1453 efx_poll, napi_weight);
1458 static void efx_fini_napi(struct efx_nic *efx)
1460 struct efx_channel *channel;
1462 efx_for_each_channel(channel, efx) {
1463 if (channel->napi_dev)
1464 netif_napi_del(&channel->napi_str);
1465 channel->napi_dev = NULL;
1469 /**************************************************************************
1471 * Kernel netpoll interface
1473 *************************************************************************/
1475 #ifdef CONFIG_NET_POLL_CONTROLLER
1477 /* Although in the common case interrupts will be disabled, this is not
1478 * guaranteed. However, all our work happens inside the NAPI callback,
1479 * so no locking is required.
1481 static void efx_netpoll(struct net_device *net_dev)
1483 struct efx_nic *efx = netdev_priv(net_dev);
1484 struct efx_channel *channel;
1486 efx_for_each_channel(channel, efx)
1487 efx_schedule_channel(channel);
1492 /**************************************************************************
1494 * Kernel net device interface
1496 *************************************************************************/
1498 /* Context: process, rtnl_lock() held. */
1499 static int efx_net_open(struct net_device *net_dev)
1501 struct efx_nic *efx = netdev_priv(net_dev);
1502 EFX_ASSERT_RESET_SERIALISED(efx);
1504 netif_dbg(efx, ifup, efx->net_dev, "opening device on CPU %d\n",
1505 raw_smp_processor_id());
1507 if (efx->state == STATE_DISABLED)
1509 if (efx->phy_mode & PHY_MODE_SPECIAL)
1511 if (efx_mcdi_poll_reboot(efx) && efx_reset(efx, RESET_TYPE_ALL))
1514 /* Notify the kernel of the link state polled during driver load,
1515 * before the monitor starts running */
1516 efx_link_status_changed(efx);
1522 /* Context: process, rtnl_lock() held.
1523 * Note that the kernel will ignore our return code; this method
1524 * should really be a void.
1526 static int efx_net_stop(struct net_device *net_dev)
1528 struct efx_nic *efx = netdev_priv(net_dev);
1530 netif_dbg(efx, ifdown, efx->net_dev, "closing on CPU %d\n",
1531 raw_smp_processor_id());
1533 if (efx->state != STATE_DISABLED) {
1534 /* Stop the device and flush all the channels */
1536 efx_fini_channels(efx);
1537 efx_init_channels(efx);
1543 /* Context: process, dev_base_lock or RTNL held, non-blocking. */
1544 static struct rtnl_link_stats64 *efx_net_stats(struct net_device *net_dev, struct rtnl_link_stats64 *stats)
1546 struct efx_nic *efx = netdev_priv(net_dev);
1547 struct efx_mac_stats *mac_stats = &efx->mac_stats;
1549 spin_lock_bh(&efx->stats_lock);
1550 efx->type->update_stats(efx);
1551 spin_unlock_bh(&efx->stats_lock);
1553 stats->rx_packets = mac_stats->rx_packets;
1554 stats->tx_packets = mac_stats->tx_packets;
1555 stats->rx_bytes = mac_stats->rx_bytes;
1556 stats->tx_bytes = mac_stats->tx_bytes;
1557 stats->rx_dropped = efx->n_rx_nodesc_drop_cnt;
1558 stats->multicast = mac_stats->rx_multicast;
1559 stats->collisions = mac_stats->tx_collision;
1560 stats->rx_length_errors = (mac_stats->rx_gtjumbo +
1561 mac_stats->rx_length_error);
1562 stats->rx_crc_errors = mac_stats->rx_bad;
1563 stats->rx_frame_errors = mac_stats->rx_align_error;
1564 stats->rx_fifo_errors = mac_stats->rx_overflow;
1565 stats->rx_missed_errors = mac_stats->rx_missed;
1566 stats->tx_window_errors = mac_stats->tx_late_collision;
1568 stats->rx_errors = (stats->rx_length_errors +
1569 stats->rx_crc_errors +
1570 stats->rx_frame_errors +
1571 mac_stats->rx_symbol_error);
1572 stats->tx_errors = (stats->tx_window_errors +
1578 /* Context: netif_tx_lock held, BHs disabled. */
1579 static void efx_watchdog(struct net_device *net_dev)
1581 struct efx_nic *efx = netdev_priv(net_dev);
1583 netif_err(efx, tx_err, efx->net_dev,
1584 "TX stuck with port_enabled=%d: resetting channels\n",
1587 efx_schedule_reset(efx, RESET_TYPE_TX_WATCHDOG);
1591 /* Context: process, rtnl_lock() held. */
1592 static int efx_change_mtu(struct net_device *net_dev, int new_mtu)
1594 struct efx_nic *efx = netdev_priv(net_dev);
1597 EFX_ASSERT_RESET_SERIALISED(efx);
1599 if (new_mtu > EFX_MAX_MTU)
1604 netif_dbg(efx, drv, efx->net_dev, "changing MTU to %d\n", new_mtu);
1606 efx_fini_channels(efx);
1608 mutex_lock(&efx->mac_lock);
1609 /* Reconfigure the MAC before enabling the dma queues so that
1610 * the RX buffers don't overflow */
1611 net_dev->mtu = new_mtu;
1612 efx->mac_op->reconfigure(efx);
1613 mutex_unlock(&efx->mac_lock);
1615 efx_init_channels(efx);
1621 static int efx_set_mac_address(struct net_device *net_dev, void *data)
1623 struct efx_nic *efx = netdev_priv(net_dev);
1624 struct sockaddr *addr = data;
1625 char *new_addr = addr->sa_data;
1627 EFX_ASSERT_RESET_SERIALISED(efx);
1629 if (!is_valid_ether_addr(new_addr)) {
1630 netif_err(efx, drv, efx->net_dev,
1631 "invalid ethernet MAC address requested: %pM\n",
1636 memcpy(net_dev->dev_addr, new_addr, net_dev->addr_len);
1638 /* Reconfigure the MAC */
1639 mutex_lock(&efx->mac_lock);
1640 efx->mac_op->reconfigure(efx);
1641 mutex_unlock(&efx->mac_lock);
1646 /* Context: netif_addr_lock held, BHs disabled. */
1647 static void efx_set_multicast_list(struct net_device *net_dev)
1649 struct efx_nic *efx = netdev_priv(net_dev);
1650 struct netdev_hw_addr *ha;
1651 union efx_multicast_hash *mc_hash = &efx->multicast_hash;
1655 efx->promiscuous = !!(net_dev->flags & IFF_PROMISC);
1657 /* Build multicast hash table */
1658 if (efx->promiscuous || (net_dev->flags & IFF_ALLMULTI)) {
1659 memset(mc_hash, 0xff, sizeof(*mc_hash));
1661 memset(mc_hash, 0x00, sizeof(*mc_hash));
1662 netdev_for_each_mc_addr(ha, net_dev) {
1663 crc = ether_crc_le(ETH_ALEN, ha->addr);
1664 bit = crc & (EFX_MCAST_HASH_ENTRIES - 1);
1665 set_bit_le(bit, mc_hash->byte);
1668 /* Broadcast packets go through the multicast hash filter.
1669 * ether_crc_le() of the broadcast address is 0xbe2612ff
1670 * so we always add bit 0xff to the mask.
1672 set_bit_le(0xff, mc_hash->byte);
1675 if (efx->port_enabled)
1676 queue_work(efx->workqueue, &efx->mac_work);
1677 /* Otherwise efx_start_port() will do this */
1680 static const struct net_device_ops efx_netdev_ops = {
1681 .ndo_open = efx_net_open,
1682 .ndo_stop = efx_net_stop,
1683 .ndo_get_stats64 = efx_net_stats,
1684 .ndo_tx_timeout = efx_watchdog,
1685 .ndo_start_xmit = efx_hard_start_xmit,
1686 .ndo_validate_addr = eth_validate_addr,
1687 .ndo_do_ioctl = efx_ioctl,
1688 .ndo_change_mtu = efx_change_mtu,
1689 .ndo_set_mac_address = efx_set_mac_address,
1690 .ndo_set_multicast_list = efx_set_multicast_list,
1691 #ifdef CONFIG_NET_POLL_CONTROLLER
1692 .ndo_poll_controller = efx_netpoll,
1696 static void efx_update_name(struct efx_nic *efx)
1698 strcpy(efx->name, efx->net_dev->name);
1699 efx_mtd_rename(efx);
1700 efx_set_channel_names(efx);
1703 static int efx_netdev_event(struct notifier_block *this,
1704 unsigned long event, void *ptr)
1706 struct net_device *net_dev = ptr;
1708 if (net_dev->netdev_ops == &efx_netdev_ops &&
1709 event == NETDEV_CHANGENAME)
1710 efx_update_name(netdev_priv(net_dev));
1715 static struct notifier_block efx_netdev_notifier = {
1716 .notifier_call = efx_netdev_event,
1720 show_phy_type(struct device *dev, struct device_attribute *attr, char *buf)
1722 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
1723 return sprintf(buf, "%d\n", efx->phy_type);
1725 static DEVICE_ATTR(phy_type, 0644, show_phy_type, NULL);
1727 static int efx_register_netdev(struct efx_nic *efx)
1729 struct net_device *net_dev = efx->net_dev;
1732 net_dev->watchdog_timeo = 5 * HZ;
1733 net_dev->irq = efx->pci_dev->irq;
1734 net_dev->netdev_ops = &efx_netdev_ops;
1735 SET_ETHTOOL_OPS(net_dev, &efx_ethtool_ops);
1737 /* Clear MAC statistics */
1738 efx->mac_op->update_stats(efx);
1739 memset(&efx->mac_stats, 0, sizeof(efx->mac_stats));
1743 rc = dev_alloc_name(net_dev, net_dev->name);
1746 efx_update_name(efx);
1748 rc = register_netdevice(net_dev);
1752 /* Always start with carrier off; PHY events will detect the link */
1753 netif_carrier_off(efx->net_dev);
1757 rc = device_create_file(&efx->pci_dev->dev, &dev_attr_phy_type);
1759 netif_err(efx, drv, efx->net_dev,
1760 "failed to init net dev attributes\n");
1761 goto fail_registered;
1768 netif_err(efx, drv, efx->net_dev, "could not register net dev\n");
1772 unregister_netdev(net_dev);
1776 static void efx_unregister_netdev(struct efx_nic *efx)
1778 struct efx_channel *channel;
1779 struct efx_tx_queue *tx_queue;
1784 BUG_ON(netdev_priv(efx->net_dev) != efx);
1786 /* Free up any skbs still remaining. This has to happen before
1787 * we try to unregister the netdev as running their destructors
1788 * may be needed to get the device ref. count to 0. */
1789 efx_for_each_channel(channel, efx) {
1790 efx_for_each_channel_tx_queue(tx_queue, channel)
1791 efx_release_tx_buffers(tx_queue);
1794 if (efx_dev_registered(efx)) {
1795 strlcpy(efx->name, pci_name(efx->pci_dev), sizeof(efx->name));
1796 device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_type);
1797 unregister_netdev(efx->net_dev);
1801 /**************************************************************************
1803 * Device reset and suspend
1805 **************************************************************************/
1807 /* Tears down the entire software state and most of the hardware state
1809 void efx_reset_down(struct efx_nic *efx, enum reset_type method)
1811 EFX_ASSERT_RESET_SERIALISED(efx);
1814 mutex_lock(&efx->mac_lock);
1815 mutex_lock(&efx->spi_lock);
1817 efx_fini_channels(efx);
1818 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE)
1819 efx->phy_op->fini(efx);
1820 efx->type->fini(efx);
1823 /* This function will always ensure that the locks acquired in
1824 * efx_reset_down() are released. A failure return code indicates
1825 * that we were unable to reinitialise the hardware, and the
1826 * driver should be disabled. If ok is false, then the rx and tx
1827 * engines are not restarted, pending a RESET_DISABLE. */
1828 int efx_reset_up(struct efx_nic *efx, enum reset_type method, bool ok)
1832 EFX_ASSERT_RESET_SERIALISED(efx);
1834 rc = efx->type->init(efx);
1836 netif_err(efx, drv, efx->net_dev, "failed to initialise NIC\n");
1843 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE) {
1844 rc = efx->phy_op->init(efx);
1847 if (efx->phy_op->reconfigure(efx))
1848 netif_err(efx, drv, efx->net_dev,
1849 "could not restore PHY settings\n");
1852 efx->mac_op->reconfigure(efx);
1854 efx_init_channels(efx);
1856 mutex_unlock(&efx->spi_lock);
1857 mutex_unlock(&efx->mac_lock);
1864 efx->port_initialized = false;
1866 mutex_unlock(&efx->spi_lock);
1867 mutex_unlock(&efx->mac_lock);
1872 /* Reset the NIC using the specified method. Note that the reset may
1873 * fail, in which case the card will be left in an unusable state.
1875 * Caller must hold the rtnl_lock.
1877 int efx_reset(struct efx_nic *efx, enum reset_type method)
1882 netif_info(efx, drv, efx->net_dev, "resetting (%s)\n",
1883 RESET_TYPE(method));
1885 efx_reset_down(efx, method);
1887 rc = efx->type->reset(efx, method);
1889 netif_err(efx, drv, efx->net_dev, "failed to reset hardware\n");
1893 /* Allow resets to be rescheduled. */
1894 efx->reset_pending = RESET_TYPE_NONE;
1896 /* Reinitialise bus-mastering, which may have been turned off before
1897 * the reset was scheduled. This is still appropriate, even in the
1898 * RESET_TYPE_DISABLE since this driver generally assumes the hardware
1899 * can respond to requests. */
1900 pci_set_master(efx->pci_dev);
1903 /* Leave device stopped if necessary */
1904 disabled = rc || method == RESET_TYPE_DISABLE;
1905 rc2 = efx_reset_up(efx, method, !disabled);
1913 dev_close(efx->net_dev);
1914 netif_err(efx, drv, efx->net_dev, "has been disabled\n");
1915 efx->state = STATE_DISABLED;
1917 netif_dbg(efx, drv, efx->net_dev, "reset complete\n");
1922 /* The worker thread exists so that code that cannot sleep can
1923 * schedule a reset for later.
1925 static void efx_reset_work(struct work_struct *data)
1927 struct efx_nic *efx = container_of(data, struct efx_nic, reset_work);
1929 if (efx->reset_pending == RESET_TYPE_NONE)
1932 /* If we're not RUNNING then don't reset. Leave the reset_pending
1933 * flag set so that efx_pci_probe_main will be retried */
1934 if (efx->state != STATE_RUNNING) {
1935 netif_info(efx, drv, efx->net_dev,
1936 "scheduled reset quenched. NIC not RUNNING\n");
1941 (void)efx_reset(efx, efx->reset_pending);
1945 void efx_schedule_reset(struct efx_nic *efx, enum reset_type type)
1947 enum reset_type method;
1949 if (efx->reset_pending != RESET_TYPE_NONE) {
1950 netif_info(efx, drv, efx->net_dev,
1951 "quenching already scheduled reset\n");
1956 case RESET_TYPE_INVISIBLE:
1957 case RESET_TYPE_ALL:
1958 case RESET_TYPE_WORLD:
1959 case RESET_TYPE_DISABLE:
1962 case RESET_TYPE_RX_RECOVERY:
1963 case RESET_TYPE_RX_DESC_FETCH:
1964 case RESET_TYPE_TX_DESC_FETCH:
1965 case RESET_TYPE_TX_SKIP:
1966 method = RESET_TYPE_INVISIBLE;
1968 case RESET_TYPE_MC_FAILURE:
1970 method = RESET_TYPE_ALL;
1975 netif_dbg(efx, drv, efx->net_dev,
1976 "scheduling %s reset for %s\n",
1977 RESET_TYPE(method), RESET_TYPE(type));
1979 netif_dbg(efx, drv, efx->net_dev, "scheduling %s reset\n",
1980 RESET_TYPE(method));
1982 efx->reset_pending = method;
1984 /* efx_process_channel() will no longer read events once a
1985 * reset is scheduled. So switch back to poll'd MCDI completions. */
1986 efx_mcdi_mode_poll(efx);
1988 queue_work(reset_workqueue, &efx->reset_work);
1991 /**************************************************************************
1993 * List of NICs we support
1995 **************************************************************************/
1997 /* PCI device ID table */
1998 static DEFINE_PCI_DEVICE_TABLE(efx_pci_table) = {
1999 {PCI_DEVICE(EFX_VENDID_SFC, FALCON_A_P_DEVID),
2000 .driver_data = (unsigned long) &falcon_a1_nic_type},
2001 {PCI_DEVICE(EFX_VENDID_SFC, FALCON_B_P_DEVID),
2002 .driver_data = (unsigned long) &falcon_b0_nic_type},
2003 {PCI_DEVICE(EFX_VENDID_SFC, BETHPAGE_A_P_DEVID),
2004 .driver_data = (unsigned long) &siena_a0_nic_type},
2005 {PCI_DEVICE(EFX_VENDID_SFC, SIENA_A_P_DEVID),
2006 .driver_data = (unsigned long) &siena_a0_nic_type},
2007 {0} /* end of list */
2010 /**************************************************************************
2012 * Dummy PHY/MAC operations
2014 * Can be used for some unimplemented operations
2015 * Needed so all function pointers are valid and do not have to be tested
2018 **************************************************************************/
2019 int efx_port_dummy_op_int(struct efx_nic *efx)
2023 void efx_port_dummy_op_void(struct efx_nic *efx) {}
2024 void efx_port_dummy_op_set_id_led(struct efx_nic *efx, enum efx_led_mode mode)
2027 bool efx_port_dummy_op_poll(struct efx_nic *efx)
2032 static struct efx_phy_operations efx_dummy_phy_operations = {
2033 .init = efx_port_dummy_op_int,
2034 .reconfigure = efx_port_dummy_op_int,
2035 .poll = efx_port_dummy_op_poll,
2036 .fini = efx_port_dummy_op_void,
2039 /**************************************************************************
2043 **************************************************************************/
2045 /* This zeroes out and then fills in the invariants in a struct
2046 * efx_nic (including all sub-structures).
2048 static int efx_init_struct(struct efx_nic *efx, struct efx_nic_type *type,
2049 struct pci_dev *pci_dev, struct net_device *net_dev)
2051 struct efx_channel *channel;
2052 struct efx_tx_queue *tx_queue;
2053 struct efx_rx_queue *rx_queue;
2056 /* Initialise common structures */
2057 memset(efx, 0, sizeof(*efx));
2058 spin_lock_init(&efx->biu_lock);
2059 mutex_init(&efx->mdio_lock);
2060 mutex_init(&efx->spi_lock);
2061 #ifdef CONFIG_SFC_MTD
2062 INIT_LIST_HEAD(&efx->mtd_list);
2064 INIT_WORK(&efx->reset_work, efx_reset_work);
2065 INIT_DELAYED_WORK(&efx->monitor_work, efx_monitor);
2066 efx->pci_dev = pci_dev;
2067 efx->msg_enable = debug;
2068 efx->state = STATE_INIT;
2069 efx->reset_pending = RESET_TYPE_NONE;
2070 strlcpy(efx->name, pci_name(pci_dev), sizeof(efx->name));
2072 efx->net_dev = net_dev;
2073 efx->rx_checksum_enabled = true;
2074 spin_lock_init(&efx->stats_lock);
2075 mutex_init(&efx->mac_lock);
2076 efx->mac_op = type->default_mac_ops;
2077 efx->phy_op = &efx_dummy_phy_operations;
2078 efx->mdio.dev = net_dev;
2079 INIT_WORK(&efx->mac_work, efx_mac_work);
2081 for (i = 0; i < EFX_MAX_CHANNELS; i++) {
2082 efx->channel[i] = kzalloc(sizeof(*channel), GFP_KERNEL);
2083 channel = efx->channel[i];
2085 channel->channel = i;
2086 spin_lock_init(&channel->tx_stop_lock);
2087 atomic_set(&channel->tx_stop_count, 1);
2089 for (j = 0; j < EFX_TXQ_TYPES; j++) {
2090 tx_queue = &channel->tx_queue[j];
2091 tx_queue->efx = efx;
2092 tx_queue->queue = i * EFX_TXQ_TYPES + j;
2093 tx_queue->channel = channel;
2096 rx_queue = &channel->rx_queue;
2097 rx_queue->efx = efx;
2098 setup_timer(&rx_queue->slow_fill, efx_rx_slow_fill,
2099 (unsigned long)rx_queue);
2104 /* As close as we can get to guaranteeing that we don't overflow */
2105 BUILD_BUG_ON(EFX_EVQ_SIZE < EFX_TXQ_SIZE + EFX_RXQ_SIZE);
2107 EFX_BUG_ON_PARANOID(efx->type->phys_addr_channels > EFX_MAX_CHANNELS);
2109 /* Higher numbered interrupt modes are less capable! */
2110 efx->interrupt_mode = max(efx->type->max_interrupt_mode,
2113 /* Would be good to use the net_dev name, but we're too early */
2114 snprintf(efx->workqueue_name, sizeof(efx->workqueue_name), "sfc%s",
2116 efx->workqueue = create_singlethread_workqueue(efx->workqueue_name);
2117 if (!efx->workqueue)
2123 static void efx_fini_struct(struct efx_nic *efx)
2127 for (i = 0; i < EFX_MAX_CHANNELS; i++)
2128 kfree(efx->channel[i]);
2130 if (efx->workqueue) {
2131 destroy_workqueue(efx->workqueue);
2132 efx->workqueue = NULL;
2136 /**************************************************************************
2140 **************************************************************************/
2142 /* Main body of final NIC shutdown code
2143 * This is called only at module unload (or hotplug removal).
2145 static void efx_pci_remove_main(struct efx_nic *efx)
2147 efx_nic_fini_interrupt(efx);
2148 efx_fini_channels(efx);
2150 efx->type->fini(efx);
2152 efx_remove_all(efx);
2155 /* Final NIC shutdown
2156 * This is called only at module unload (or hotplug removal).
2158 static void efx_pci_remove(struct pci_dev *pci_dev)
2160 struct efx_nic *efx;
2162 efx = pci_get_drvdata(pci_dev);
2166 /* Mark the NIC as fini, then stop the interface */
2168 efx->state = STATE_FINI;
2169 dev_close(efx->net_dev);
2171 /* Allow any queued efx_resets() to complete */
2174 efx_unregister_netdev(efx);
2176 efx_mtd_remove(efx);
2178 /* Wait for any scheduled resets to complete. No more will be
2179 * scheduled from this point because efx_stop_all() has been
2180 * called, we are no longer registered with driverlink, and
2181 * the net_device's have been removed. */
2182 cancel_work_sync(&efx->reset_work);
2184 efx_pci_remove_main(efx);
2187 netif_dbg(efx, drv, efx->net_dev, "shutdown successful\n");
2189 pci_set_drvdata(pci_dev, NULL);
2190 efx_fini_struct(efx);
2191 free_netdev(efx->net_dev);
2194 /* Main body of NIC initialisation
2195 * This is called at module load (or hotplug insertion, theoretically).
2197 static int efx_pci_probe_main(struct efx_nic *efx)
2201 /* Do start-of-day initialisation */
2202 rc = efx_probe_all(efx);
2206 rc = efx_init_napi(efx);
2210 rc = efx->type->init(efx);
2212 netif_err(efx, probe, efx->net_dev,
2213 "failed to initialise NIC\n");
2217 rc = efx_init_port(efx);
2219 netif_err(efx, probe, efx->net_dev,
2220 "failed to initialise port\n");
2224 efx_init_channels(efx);
2226 rc = efx_nic_init_interrupt(efx);
2233 efx_fini_channels(efx);
2236 efx->type->fini(efx);
2240 efx_remove_all(efx);
2245 /* NIC initialisation
2247 * This is called at module load (or hotplug insertion,
2248 * theoretically). It sets up PCI mappings, tests and resets the NIC,
2249 * sets up and registers the network devices with the kernel and hooks
2250 * the interrupt service routine. It does not prepare the device for
2251 * transmission; this is left to the first time one of the network
2252 * interfaces is brought up (i.e. efx_net_open).
2254 static int __devinit efx_pci_probe(struct pci_dev *pci_dev,
2255 const struct pci_device_id *entry)
2257 struct efx_nic_type *type = (struct efx_nic_type *) entry->driver_data;
2258 struct net_device *net_dev;
2259 struct efx_nic *efx;
2262 /* Allocate and initialise a struct net_device and struct efx_nic */
2263 net_dev = alloc_etherdev_mq(sizeof(*efx), EFX_MAX_CORE_TX_QUEUES);
2266 net_dev->features |= (type->offload_features | NETIF_F_SG |
2267 NETIF_F_HIGHDMA | NETIF_F_TSO |
2269 if (type->offload_features & NETIF_F_V6_CSUM)
2270 net_dev->features |= NETIF_F_TSO6;
2271 /* Mask for features that also apply to VLAN devices */
2272 net_dev->vlan_features |= (NETIF_F_ALL_CSUM | NETIF_F_SG |
2273 NETIF_F_HIGHDMA | NETIF_F_TSO);
2274 efx = netdev_priv(net_dev);
2275 pci_set_drvdata(pci_dev, efx);
2276 SET_NETDEV_DEV(net_dev, &pci_dev->dev);
2277 rc = efx_init_struct(efx, type, pci_dev, net_dev);
2281 netif_info(efx, probe, efx->net_dev,
2282 "Solarflare Communications NIC detected\n");
2284 /* Set up basic I/O (BAR mappings etc) */
2285 rc = efx_init_io(efx);
2289 /* No serialisation is required with the reset path because
2290 * we're in STATE_INIT. */
2291 for (i = 0; i < 5; i++) {
2292 rc = efx_pci_probe_main(efx);
2294 /* Serialise against efx_reset(). No more resets will be
2295 * scheduled since efx_stop_all() has been called, and we
2296 * have not and never have been registered with either
2297 * the rtnetlink or driverlink layers. */
2298 cancel_work_sync(&efx->reset_work);
2301 if (efx->reset_pending != RESET_TYPE_NONE) {
2302 /* If there was a scheduled reset during
2303 * probe, the NIC is probably hosed anyway */
2304 efx_pci_remove_main(efx);
2311 /* Retry if a recoverably reset event has been scheduled */
2312 if ((efx->reset_pending != RESET_TYPE_INVISIBLE) &&
2313 (efx->reset_pending != RESET_TYPE_ALL))
2316 efx->reset_pending = RESET_TYPE_NONE;
2320 netif_err(efx, probe, efx->net_dev, "Could not reset NIC\n");
2324 /* Switch to the running state before we expose the device to the OS,
2325 * so that dev_open()|efx_start_all() will actually start the device */
2326 efx->state = STATE_RUNNING;
2328 rc = efx_register_netdev(efx);
2332 netif_dbg(efx, probe, efx->net_dev, "initialisation successful\n");
2335 efx_mtd_probe(efx); /* allowed to fail */
2340 efx_pci_remove_main(efx);
2345 efx_fini_struct(efx);
2348 netif_dbg(efx, drv, efx->net_dev, "initialisation failed. rc=%d\n", rc);
2349 free_netdev(net_dev);
2353 static int efx_pm_freeze(struct device *dev)
2355 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
2357 efx->state = STATE_FINI;
2359 netif_device_detach(efx->net_dev);
2362 efx_fini_channels(efx);
2367 static int efx_pm_thaw(struct device *dev)
2369 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
2371 efx->state = STATE_INIT;
2373 efx_init_channels(efx);
2375 mutex_lock(&efx->mac_lock);
2376 efx->phy_op->reconfigure(efx);
2377 mutex_unlock(&efx->mac_lock);
2381 netif_device_attach(efx->net_dev);
2383 efx->state = STATE_RUNNING;
2385 efx->type->resume_wol(efx);
2387 /* Reschedule any quenched resets scheduled during efx_pm_freeze() */
2388 queue_work(reset_workqueue, &efx->reset_work);
2393 static int efx_pm_poweroff(struct device *dev)
2395 struct pci_dev *pci_dev = to_pci_dev(dev);
2396 struct efx_nic *efx = pci_get_drvdata(pci_dev);
2398 efx->type->fini(efx);
2400 efx->reset_pending = RESET_TYPE_NONE;
2402 pci_save_state(pci_dev);
2403 return pci_set_power_state(pci_dev, PCI_D3hot);
2406 /* Used for both resume and restore */
2407 static int efx_pm_resume(struct device *dev)
2409 struct pci_dev *pci_dev = to_pci_dev(dev);
2410 struct efx_nic *efx = pci_get_drvdata(pci_dev);
2413 rc = pci_set_power_state(pci_dev, PCI_D0);
2416 pci_restore_state(pci_dev);
2417 rc = pci_enable_device(pci_dev);
2420 pci_set_master(efx->pci_dev);
2421 rc = efx->type->reset(efx, RESET_TYPE_ALL);
2424 rc = efx->type->init(efx);
2431 static int efx_pm_suspend(struct device *dev)
2436 rc = efx_pm_poweroff(dev);
2442 static struct dev_pm_ops efx_pm_ops = {
2443 .suspend = efx_pm_suspend,
2444 .resume = efx_pm_resume,
2445 .freeze = efx_pm_freeze,
2446 .thaw = efx_pm_thaw,
2447 .poweroff = efx_pm_poweroff,
2448 .restore = efx_pm_resume,
2451 static struct pci_driver efx_pci_driver = {
2452 .name = KBUILD_MODNAME,
2453 .id_table = efx_pci_table,
2454 .probe = efx_pci_probe,
2455 .remove = efx_pci_remove,
2456 .driver.pm = &efx_pm_ops,
2459 /**************************************************************************
2461 * Kernel module interface
2463 *************************************************************************/
2465 module_param(interrupt_mode, uint, 0444);
2466 MODULE_PARM_DESC(interrupt_mode,
2467 "Interrupt mode (0=>MSIX 1=>MSI 2=>legacy)");
2469 static int __init efx_init_module(void)
2473 printk(KERN_INFO "Solarflare NET driver v" EFX_DRIVER_VERSION "\n");
2475 rc = register_netdevice_notifier(&efx_netdev_notifier);
2479 reset_workqueue = create_singlethread_workqueue("sfc_reset");
2480 if (!reset_workqueue) {
2485 rc = pci_register_driver(&efx_pci_driver);
2492 destroy_workqueue(reset_workqueue);
2494 unregister_netdevice_notifier(&efx_netdev_notifier);
2499 static void __exit efx_exit_module(void)
2501 printk(KERN_INFO "Solarflare NET driver unloading\n");
2503 pci_unregister_driver(&efx_pci_driver);
2504 destroy_workqueue(reset_workqueue);
2505 unregister_netdevice_notifier(&efx_netdev_notifier);
2509 module_init(efx_init_module);
2510 module_exit(efx_exit_module);
2512 MODULE_AUTHOR("Solarflare Communications and "
2513 "Michael Brown <mbrown@fensystems.co.uk>");
2514 MODULE_DESCRIPTION("Solarflare Communications network driver");
2515 MODULE_LICENSE("GPL");
2516 MODULE_DEVICE_TABLE(pci, efx_pci_table);