drivers/net/r8169.c

   1 /*
   2 =========================================================================
   3  r8169.c: A RealTek RTL-8169 Gigabit Ethernet driver for Linux kernel 2.4.x.
   4  --------------------------------------------------------------------
   5
   6  History:
   7  Feb  4 2002    - created initially by ShuChen <shuchen@realtek.com.tw>.
   8  May 20 2002    - Add link status force-mode and TBI mode support.
   9         2004    - Massive updates. See kernel SCM system for details.
  10 =========================================================================
  11   1. [DEPRECATED: use ethtool instead] The media can be forced in 5 modes.
  12          Command: 'insmod r8169 media = SET_MEDIA'
  13          Ex:      'insmod r8169 media = 0x04' will force PHY to operate in 100Mpbs Half-duplex.
  14
  15          SET_MEDIA can be:
  16                 _10_Half        = 0x01
  17                 _10_Full        = 0x02
  18                 _100_Half       = 0x04
  19                 _100_Full       = 0x08
  20                 _1000_Full      = 0x10
  21
  22   2. Support TBI mode.
  23 =========================================================================
  24 VERSION 1.1     <2002/10/4>
  25
  26         The bit4:0 of MII register 4 is called "selector field", and have to be
  27         00001b to indicate support of IEEE std 802.3 during NWay process of
  28         exchanging Link Code Word (FLP).
  29
  30 VERSION 1.2     <2002/11/30>
  31
  32         - Large style cleanup
  33         - Use ether_crc in stock kernel (linux/crc32.h)
  34         - Copy mc_filter setup code from 8139cp
  35           (includes an optimization, and avoids set_bit use)
  36
  37 VERSION 1.6LK   <2004/04/14>
  38
  39         - Merge of Realtek's version 1.6
  40         - Conversion to DMA API
  41         - Suspend/resume
  42         - Endianness
  43         - Misc Rx/Tx bugs
  44
  45 VERSION 2.2LK   <2005/01/25>
  46
  47         - RX csum, TX csum/SG, TSO
  48         - VLAN
  49         - baby (< 7200) Jumbo frames support
  50         - Merge of Realtek's version 2.2 (new phy)
  51  */
  52
  53 #include <linux/module.h>
  54 #include <linux/moduleparam.h>
  55 #include <linux/pci.h>
  56 #include <linux/netdevice.h>
  57 #include <linux/etherdevice.h>
  58 #include <linux/delay.h>
  59 #include <linux/ethtool.h>
  60 #include <linux/mii.h>
  61 #include <linux/if_vlan.h>
  62 #include <linux/crc32.h>
  63 #include <linux/in.h>
  64 #include <linux/ip.h>
  65 #include <linux/tcp.h>
  66 #include <linux/init.h>
  67 #include <linux/dma-mapping.h>
  68
  69 #include <asm/io.h>
  70 #include <asm/irq.h>
  71
  72 #ifdef CONFIG_R8169_NAPI
  73 #define NAPI_SUFFIX     "-NAPI"
  74 #else
  75 #define NAPI_SUFFIX     ""
  76 #endif
  77
  78 #define RTL8169_VERSION "2.2LK" NAPI_SUFFIX
  79 #define MODULENAME "r8169"
  80 #define PFX MODULENAME ": "
  81
  82 #ifdef RTL8169_DEBUG
  83 #define assert(expr) \
  84         if (!(expr)) {                                  \
  85                 printk( "Assertion failed! %s,%s,%s,line=%d\n", \
  86                 #expr,__FILE__,__FUNCTION__,__LINE__);          \
  87         }
  88 #define dprintk(fmt, args...)   do { printk(PFX fmt, ## args); } while (0)
  89 #else
  90 #define assert(expr) do {} while (0)
  91 #define dprintk(fmt, args...)   do {} while (0)
  92 #endif /* RTL8169_DEBUG */
  93
  94 #define R8169_MSG_DEFAULT \
  95         (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_IFUP | NETIF_MSG_IFDOWN)
  96
  97 #define TX_BUFFS_AVAIL(tp) \
  98         (tp->dirty_tx + NUM_TX_DESC - tp->cur_tx - 1)
  99
 100 #ifdef CONFIG_R8169_NAPI
 101 #define rtl8169_rx_skb                  netif_receive_skb
 102 #define rtl8169_rx_hwaccel_skb          vlan_hwaccel_receive_skb
 103 #define rtl8169_rx_quota(count, quota)  min(count, quota)
 104 #else
 105 #define rtl8169_rx_skb                  netif_rx
 106 #define rtl8169_rx_hwaccel_skb          vlan_hwaccel_rx
 107 #define rtl8169_rx_quota(count, quota)  count
 108 #endif
 109
 110 /* media options */
 111 #define MAX_UNITS 8
 112 static int media[MAX_UNITS] = { -1, -1, -1, -1, -1, -1, -1, -1 };
 113 static int num_media = 0;
 114
 115 /* Maximum events (Rx packets, etc.) to handle at each interrupt. */
 116 static const int max_interrupt_work = 20;
 117
 118 /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
 119    The RTL chips use a 64 element hash table based on the Ethernet CRC. */
 120 static const int multicast_filter_limit = 32;
 121
 122 /* MAC address length */
 123 #define MAC_ADDR_LEN    6
 124
 125 #define RX_FIFO_THRESH  7       /* 7 means NO threshold, Rx buffer level before first PCI xfer. */
 126 #define RX_DMA_BURST    6       /* Maximum PCI burst, '6' is 1024 */
 127 #define TX_DMA_BURST    6       /* Maximum PCI burst, '6' is 1024 */
 128 #define EarlyTxThld     0x3F    /* 0x3F means NO early transmit */
 129 #define RxPacketMaxSize 0x3FE8  /* 16K - 1 - ETH_HLEN - VLAN - CRC... */
 130 #define SafeMtu         0x1c20  /* ... actually life sucks beyond ~7k */
 131 #define InterFrameGap   0x03    /* 3 means InterFrameGap = the shortest one */
 132
 133 #define R8169_REGS_SIZE         256
 134 #define R8169_NAPI_WEIGHT       64
 135 #define NUM_TX_DESC     64      /* Number of Tx descriptor registers */
 136 #define NUM_RX_DESC     256     /* Number of Rx descriptor registers */
 137 #define RX_BUF_SIZE     1536    /* Rx Buffer size */
 138 #define R8169_TX_RING_BYTES     (NUM_TX_DESC * sizeof(struct TxDesc))
 139 #define R8169_RX_RING_BYTES     (NUM_RX_DESC * sizeof(struct RxDesc))
 140
 141 #define RTL8169_TX_TIMEOUT      (6*HZ)
 142 #define RTL8169_PHY_TIMEOUT     (10*HZ)
 143
 144 /* write/read MMIO register */
 145 #define RTL_W8(reg, val8)       writeb ((val8), ioaddr + (reg))
 146 #define RTL_W16(reg, val16)     writew ((val16), ioaddr + (reg))
 147 #define RTL_W32(reg, val32)     writel ((val32), ioaddr + (reg))
 148 #define RTL_R8(reg)             readb (ioaddr + (reg))
 149 #define RTL_R16(reg)            readw (ioaddr + (reg))
 150 #define RTL_R32(reg)            ((unsigned long) readl (ioaddr + (reg)))
 151
 152 enum mac_version {
 153         RTL_GIGA_MAC_VER_01 = 0x00,
 154         RTL_GIGA_MAC_VER_02 = 0x01,
 155         RTL_GIGA_MAC_VER_03 = 0x02,
 156         RTL_GIGA_MAC_VER_04 = 0x03,
 157         RTL_GIGA_MAC_VER_05 = 0x04,
 158         RTL_GIGA_MAC_VER_11 = 0x0b,
 159         RTL_GIGA_MAC_VER_12 = 0x0c,
 160         RTL_GIGA_MAC_VER_13 = 0x0d,
 161         RTL_GIGA_MAC_VER_14 = 0x0e,
 162         RTL_GIGA_MAC_VER_15 = 0x0f
 163 };
 164
 165 enum phy_version {
 166         RTL_GIGA_PHY_VER_C = 0x03, /* PHY Reg 0x03 bit0-3 == 0x0000 */
 167         RTL_GIGA_PHY_VER_D = 0x04, /* PHY Reg 0x03 bit0-3 == 0x0000 */
 168         RTL_GIGA_PHY_VER_E = 0x05, /* PHY Reg 0x03 bit0-3 == 0x0000 */
 169         RTL_GIGA_PHY_VER_F = 0x06, /* PHY Reg 0x03 bit0-3 == 0x0001 */
 170         RTL_GIGA_PHY_VER_G = 0x07, /* PHY Reg 0x03 bit0-3 == 0x0002 */
 171         RTL_GIGA_PHY_VER_H = 0x08, /* PHY Reg 0x03 bit0-3 == 0x0003 */
 172 };
 173
 174 #define _R(NAME,MAC,MASK) \
 175         { .name = NAME, .mac_version = MAC, .RxConfigMask = MASK }
 176
 177 static const struct {
 178         const char *name;
 179         u8 mac_version;
 180         u32 RxConfigMask;       /* Clears the bits supported by this chip */
 181 } rtl_chip_info[] = {
 182         _R("RTL8169",           RTL_GIGA_MAC_VER_01, 0xff7e1880),
 183         _R("RTL8169s/8110s",    RTL_GIGA_MAC_VER_02, 0xff7e1880),
 184         _R("RTL8169s/8110s",    RTL_GIGA_MAC_VER_03, 0xff7e1880),
 185         _R("RTL8169sb/8110sb",  RTL_GIGA_MAC_VER_04, 0xff7e1880),
 186         _R("RTL8169sc/8110sc",  RTL_GIGA_MAC_VER_05, 0xff7e1880),
 187         _R("RTL8168b/8111b",    RTL_GIGA_MAC_VER_11, 0xff7e1880), // PCI-E
 188         _R("RTL8168b/8111b",    RTL_GIGA_MAC_VER_12, 0xff7e1880), // PCI-E
 189         _R("RTL8101e",          RTL_GIGA_MAC_VER_13, 0xff7e1880), // PCI-E 8139
 190         _R("RTL8100e",          RTL_GIGA_MAC_VER_14, 0xff7e1880), // PCI-E 8139
 191         _R("RTL8100e",          RTL_GIGA_MAC_VER_15, 0xff7e1880)  // PCI-E 8139
 192 };
 193 #undef _R
 194
 195 enum cfg_version {
 196         RTL_CFG_0 = 0x00,
 197         RTL_CFG_1,
 198         RTL_CFG_2
 199 };
 200
 201 static const struct {
 202         unsigned int region;
 203         unsigned int align;
 204 } rtl_cfg_info[] = {
 205         [RTL_CFG_0] = { 1, NET_IP_ALIGN },
 206         [RTL_CFG_1] = { 2, NET_IP_ALIGN },
 207         [RTL_CFG_2] = { 2, 8 }
 208 };
 209
 210 static struct pci_device_id rtl8169_pci_tbl[] = {
 211         { PCI_DEVICE(PCI_VENDOR_ID_REALTEK,     0x8129), 0, 0, RTL_CFG_0 },
 212         { PCI_DEVICE(PCI_VENDOR_ID_REALTEK,     0x8136), 0, 0, RTL_CFG_2 },
 213         { PCI_DEVICE(PCI_VENDOR_ID_REALTEK,     0x8167), 0, 0, RTL_CFG_0 },
 214         { PCI_DEVICE(PCI_VENDOR_ID_REALTEK,     0x8168), 0, 0, RTL_CFG_2 },
 215         { PCI_DEVICE(PCI_VENDOR_ID_REALTEK,     0x8169), 0, 0, RTL_CFG_0 },
 216         { PCI_DEVICE(PCI_VENDOR_ID_DLINK,       0x4300), 0, 0, RTL_CFG_0 },
 217         { PCI_DEVICE(0x1259,                    0xc107), 0, 0, RTL_CFG_0 },
 218         { PCI_DEVICE(0x16ec,                    0x0116), 0, 0, RTL_CFG_0 },
 219         { PCI_VENDOR_ID_LINKSYS,                0x1032,
 220                 PCI_ANY_ID, 0x0024, 0, 0, RTL_CFG_0 },
 221         {0,},
 222 };
 223
 224 MODULE_DEVICE_TABLE(pci, rtl8169_pci_tbl);
 225
 226 static int rx_copybreak = 200;
 227 static int use_dac;
 228 static int ignore_parity_err;
 229 static struct {
 230         u32 msg_enable;
 231 } debug = { -1 };
 232
 233 enum RTL8169_registers {
 234         MAC0 = 0,               /* Ethernet hardware address. */
 235         MAR0 = 8,               /* Multicast filter. */
 236         CounterAddrLow = 0x10,
 237         CounterAddrHigh = 0x14,
 238         TxDescStartAddrLow = 0x20,
 239         TxDescStartAddrHigh = 0x24,
 240         TxHDescStartAddrLow = 0x28,
 241         TxHDescStartAddrHigh = 0x2c,
 242         FLASH = 0x30,
 243         ERSR = 0x36,
 244         ChipCmd = 0x37,
 245         TxPoll = 0x38,
 246         IntrMask = 0x3C,
 247         IntrStatus = 0x3E,
 248         TxConfig = 0x40,
 249         RxConfig = 0x44,
 250         RxMissed = 0x4C,
 251         Cfg9346 = 0x50,
 252         Config0 = 0x51,
 253         Config1 = 0x52,
 254         Config2 = 0x53,
 255         Config3 = 0x54,
 256         Config4 = 0x55,
 257         Config5 = 0x56,
 258         MultiIntr = 0x5C,
 259         PHYAR = 0x60,
 260         TBICSR = 0x64,
 261         TBI_ANAR = 0x68,
 262         TBI_LPAR = 0x6A,
 263         PHYstatus = 0x6C,
 264         RxMaxSize = 0xDA,
 265         CPlusCmd = 0xE0,
 266         IntrMitigate = 0xE2,
 267         RxDescAddrLow = 0xE4,
 268         RxDescAddrHigh = 0xE8,
 269         EarlyTxThres = 0xEC,
 270         FuncEvent = 0xF0,
 271         FuncEventMask = 0xF4,
 272         FuncPresetState = 0xF8,
 273         FuncForceEvent = 0xFC,
 274 };
 275
 276 enum RTL8169_register_content {
 277         /* InterruptStatusBits */
 278         SYSErr = 0x8000,
 279         PCSTimeout = 0x4000,
 280         SWInt = 0x0100,
 281         TxDescUnavail = 0x80,
 282         RxFIFOOver = 0x40,
 283         LinkChg = 0x20,
 284         RxOverflow = 0x10,
 285         TxErr = 0x08,
 286         TxOK = 0x04,
 287         RxErr = 0x02,
 288         RxOK = 0x01,
 289
 290         /* RxStatusDesc */
 291         RxFOVF  = (1 << 23),
 292         RxRWT   = (1 << 22),
 293         RxRES   = (1 << 21),
 294         RxRUNT  = (1 << 20),
 295         RxCRC   = (1 << 19),
 296
 297         /* ChipCmdBits */
 298         CmdReset = 0x10,
 299         CmdRxEnb = 0x08,
 300         CmdTxEnb = 0x04,
 301         RxBufEmpty = 0x01,
 302
 303         /* Cfg9346Bits */
 304         Cfg9346_Lock = 0x00,
 305         Cfg9346_Unlock = 0xC0,
 306
 307         /* rx_mode_bits */
 308         AcceptErr = 0x20,
 309         AcceptRunt = 0x10,
 310         AcceptBroadcast = 0x08,
 311         AcceptMulticast = 0x04,
 312         AcceptMyPhys = 0x02,
 313         AcceptAllPhys = 0x01,
 314
 315         /* RxConfigBits */
 316         RxCfgFIFOShift = 13,
 317         RxCfgDMAShift = 8,
 318
 319         /* TxConfigBits */
 320         TxInterFrameGapShift = 24,
 321         TxDMAShift = 8, /* DMA burst value (0-7) is shift this many bits */
 322
 323         /* Config1 register p.24 */
 324         PMEnable        = (1 << 0),     /* Power Management Enable */
 325
 326         /* Config3 register p.25 */
 327         MagicPacket     = (1 << 5),     /* Wake up when receives a Magic Packet */
 328         LinkUp          = (1 << 4),     /* Wake up when the cable connection is re-established */
 329
 330         /* Config5 register p.27 */
 331         BWF             = (1 << 6),     /* Accept Broadcast wakeup frame */
 332         MWF             = (1 << 5),     /* Accept Multicast wakeup frame */
 333         UWF             = (1 << 4),     /* Accept Unicast wakeup frame */
 334         LanWake         = (1 << 1),     /* LanWake enable/disable */
 335         PMEStatus       = (1 << 0),     /* PME status can be reset by PCI RST# */
 336
 337         /* TBICSR p.28 */
 338         TBIReset        = 0x80000000,
 339         TBILoopback     = 0x40000000,
 340         TBINwEnable     = 0x20000000,
 341         TBINwRestart    = 0x10000000,
 342         TBILinkOk       = 0x02000000,
 343         TBINwComplete   = 0x01000000,
 344
 345         /* CPlusCmd p.31 */
 346         RxVlan          = (1 << 6),
 347         RxChkSum        = (1 << 5),
 348         PCIDAC          = (1 << 4),
 349         PCIMulRW        = (1 << 3),
 350
 351         /* rtl8169_PHYstatus */
 352         TBI_Enable = 0x80,
 353         TxFlowCtrl = 0x40,
 354         RxFlowCtrl = 0x20,
 355         _1000bpsF = 0x10,
 356         _100bps = 0x08,
 357         _10bps = 0x04,
 358         LinkStatus = 0x02,
 359         FullDup = 0x01,
 360
 361         /* _MediaType */
 362         _10_Half = 0x01,
 363         _10_Full = 0x02,
 364         _100_Half = 0x04,
 365         _100_Full = 0x08,
 366         _1000_Full = 0x10,
 367
 368         /* _TBICSRBit */
 369         TBILinkOK = 0x02000000,
 370
 371         /* DumpCounterCommand */
 372         CounterDump = 0x8,
 373 };
 374
 375 enum _DescStatusBit {
 376         DescOwn         = (1 << 31), /* Descriptor is owned by NIC */
 377         RingEnd         = (1 << 30), /* End of descriptor ring */
 378         FirstFrag       = (1 << 29), /* First segment of a packet */
 379         LastFrag        = (1 << 28), /* Final segment of a packet */
 380
 381         /* Tx private */
 382         LargeSend       = (1 << 27), /* TCP Large Send Offload (TSO) */
 383         MSSShift        = 16,        /* MSS value position */
 384         MSSMask         = 0xfff,     /* MSS value + LargeSend bit: 12 bits */
 385         IPCS            = (1 << 18), /* Calculate IP checksum */
 386         UDPCS           = (1 << 17), /* Calculate UDP/IP checksum */
 387         TCPCS           = (1 << 16), /* Calculate TCP/IP checksum */
 388         TxVlanTag       = (1 << 17), /* Add VLAN tag */
 389
 390         /* Rx private */
 391         PID1            = (1 << 18), /* Protocol ID bit 1/2 */
 392         PID0            = (1 << 17), /* Protocol ID bit 2/2 */
 393
 394 #define RxProtoUDP      (PID1)
 395 #define RxProtoTCP      (PID0)
 396 #define RxProtoIP       (PID1 | PID0)
 397 #define RxProtoMask     RxProtoIP
 398
 399         IPFail          = (1 << 16), /* IP checksum failed */
 400         UDPFail         = (1 << 15), /* UDP/IP checksum failed */
 401         TCPFail         = (1 << 14), /* TCP/IP checksum failed */
 402         RxVlanTag       = (1 << 16), /* VLAN tag available */
 403 };
 404
 405 #define RsvdMask        0x3fffc000
 406
 407 struct TxDesc {
 408         u32 opts1;
 409         u32 opts2;
 410         u64 addr;
 411 };
 412
 413 struct RxDesc {
 414         u32 opts1;
 415         u32 opts2;
 416         u64 addr;
 417 };
 418
 419 struct ring_info {
 420         struct sk_buff  *skb;
 421         u32             len;
 422         u8              __pad[sizeof(void *) - sizeof(u32)];
 423 };
 424
 425 struct rtl8169_private {
 426         void __iomem *mmio_addr;        /* memory map physical address */
 427         struct pci_dev *pci_dev;        /* Index of PCI device */
 428         struct net_device_stats stats;  /* statistics of net device */
 429         spinlock_t lock;                /* spin lock flag */
 430         u32 msg_enable;
 431         int chipset;
 432         int mac_version;
 433         int phy_version;
 434         u32 cur_rx; /* Index into the Rx descriptor buffer of next Rx pkt. */
 435         u32 cur_tx; /* Index into the Tx descriptor buffer of next Rx pkt. */
 436         u32 dirty_rx;
 437         u32 dirty_tx;
 438         struct TxDesc *TxDescArray;     /* 256-aligned Tx descriptor ring */
 439         struct RxDesc *RxDescArray;     /* 256-aligned Rx descriptor ring */
 440         dma_addr_t TxPhyAddr;
 441         dma_addr_t RxPhyAddr;
 442         struct sk_buff *Rx_skbuff[NUM_RX_DESC]; /* Rx data buffers */
 443         struct ring_info tx_skb[NUM_TX_DESC];   /* Tx data buffers */
 444         unsigned align;
 445         unsigned rx_buf_sz;
 446         struct timer_list timer;
 447         u16 cp_cmd;
 448         u16 intr_mask;
 449         int phy_auto_nego_reg;
 450         int phy_1000_ctrl_reg;
 451 #ifdef CONFIG_R8169_VLAN
 452         struct vlan_group *vlgrp;
 453 #endif
 454         int (*set_speed)(struct net_device *, u8 autoneg, u16 speed, u8 duplex);
 455         void (*get_settings)(struct net_device *, struct ethtool_cmd *);
 456         void (*phy_reset_enable)(void __iomem *);
 457         unsigned int (*phy_reset_pending)(void __iomem *);
 458         unsigned int (*link_ok)(void __iomem *);
 459         struct work_struct task;
 460         unsigned wol_enabled : 1;
 461 };
 462
 463 MODULE_AUTHOR("Realtek and the Linux r8169 crew <netdev@vger.kernel.org>");
 464 MODULE_DESCRIPTION("RealTek RTL-8169 Gigabit Ethernet driver");
 465 module_param_array(media, int, &num_media, 0);
 466 MODULE_PARM_DESC(media, "force phy operation. Deprecated by ethtool (8).");
 467 module_param(rx_copybreak, int, 0);
 468 MODULE_PARM_DESC(rx_copybreak, "Copy breakpoint for copy-only-tiny-frames");
 469 module_param(use_dac, int, 0);
 470 MODULE_PARM_DESC(use_dac, "Enable PCI DAC. Unsafe on 32 bit PCI slot.");
 471 module_param_named(debug, debug.msg_enable, int, 0);
 472 MODULE_PARM_DESC(debug, "Debug verbosity level (0=none, ..., 16=all)");
 473 module_param_named(ignore_parity_err, ignore_parity_err, bool, 0);
 474 MODULE_PARM_DESC(ignore_parity_err, "Ignore PCI parity error as target. Default: false");
 475 MODULE_LICENSE("GPL");
 476 MODULE_VERSION(RTL8169_VERSION);
 477
 478 static int rtl8169_open(struct net_device *dev);
 479 static int rtl8169_start_xmit(struct sk_buff *skb, struct net_device *dev);
 480 static irqreturn_t rtl8169_interrupt(int irq, void *dev_instance);
 481 static int rtl8169_init_ring(struct net_device *dev);
 482 static void rtl8169_hw_start(struct net_device *dev);
 483 static int rtl8169_close(struct net_device *dev);
 484 static void rtl8169_set_rx_mode(struct net_device *dev);
 485 static void rtl8169_tx_timeout(struct net_device *dev);
 486 static struct net_device_stats *rtl8169_get_stats(struct net_device *dev);
 487 static int rtl8169_rx_interrupt(struct net_device *, struct rtl8169_private *,
 488                                 void __iomem *);
 489 static int rtl8169_change_mtu(struct net_device *dev, int new_mtu);
 490 static void rtl8169_down(struct net_device *dev);
 491
 492 #ifdef CONFIG_R8169_NAPI
 493 static int rtl8169_poll(struct net_device *dev, int *budget);
 494 #endif
 495
 496 static const u16 rtl8169_intr_mask =
 497         SYSErr | LinkChg | RxOverflow | RxFIFOOver | TxErr | TxOK | RxErr | RxOK;
 498 static const u16 rtl8169_napi_event =
 499         RxOK | RxOverflow | RxFIFOOver | TxOK | TxErr;
 500 static const unsigned int rtl8169_rx_config =
 501         (RX_FIFO_THRESH << RxCfgFIFOShift) | (RX_DMA_BURST << RxCfgDMAShift);
 502
 503 static void mdio_write(void __iomem *ioaddr, int RegAddr, int value)
 504 {
 505         int i;
 506
 507         RTL_W32(PHYAR, 0x80000000 | (RegAddr & 0xFF) << 16 | value);
 508
 509         for (i = 20; i > 0; i--) {
 510                 /* Check if the RTL8169 has completed writing to the specified MII register */
 511                 if (!(RTL_R32(PHYAR) & 0x80000000))
 512                         break;
 513                 udelay(25);
 514         }
 515 }
 516
 517 static int mdio_read(void __iomem *ioaddr, int RegAddr)
 518 {
 519         int i, value = -1;
 520
 521         RTL_W32(PHYAR, 0x0 | (RegAddr & 0xFF) << 16);
 522
 523         for (i = 20; i > 0; i--) {
 524                 /* Check if the RTL8169 has completed retrieving data from the specified MII register */
 525                 if (RTL_R32(PHYAR) & 0x80000000) {
 526                         value = (int) (RTL_R32(PHYAR) & 0xFFFF);
 527                         break;
 528                 }
 529                 udelay(25);
 530         }
 531         return value;
 532 }
 533
 534 static void rtl8169_irq_mask_and_ack(void __iomem *ioaddr)
 535 {
 536         RTL_W16(IntrMask, 0x0000);
 537
 538         RTL_W16(IntrStatus, 0xffff);
 539 }
 540
 541 static void rtl8169_asic_down(void __iomem *ioaddr)
 542 {
 543         RTL_W8(ChipCmd, 0x00);
 544         rtl8169_irq_mask_and_ack(ioaddr);
 545         RTL_R16(CPlusCmd);
 546 }
 547
 548 static unsigned int rtl8169_tbi_reset_pending(void __iomem *ioaddr)
 549 {
 550         return RTL_R32(TBICSR) & TBIReset;
 551 }
 552
 553 static unsigned int rtl8169_xmii_reset_pending(void __iomem *ioaddr)
 554 {
 555         return mdio_read(ioaddr, MII_BMCR) & BMCR_RESET;
 556 }
 557
 558 static unsigned int rtl8169_tbi_link_ok(void __iomem *ioaddr)
 559 {
 560         return RTL_R32(TBICSR) & TBILinkOk;
 561 }
 562
 563 static unsigned int rtl8169_xmii_link_ok(void __iomem *ioaddr)
 564 {
 565         return RTL_R8(PHYstatus) & LinkStatus;
 566 }
 567
 568 static void rtl8169_tbi_reset_enable(void __iomem *ioaddr)
 569 {
 570         RTL_W32(TBICSR, RTL_R32(TBICSR) | TBIReset);
 571 }
 572
 573 static void rtl8169_xmii_reset_enable(void __iomem *ioaddr)
 574 {
 575         unsigned int val;
 576
 577         mdio_write(ioaddr, MII_BMCR, BMCR_RESET);
 578         val = mdio_read(ioaddr, MII_BMCR);
 579 }
 580
 581 static void rtl8169_check_link_status(struct net_device *dev,
 582                                       struct rtl8169_private *tp, void __iomem *ioaddr)
 583 {
 584         unsigned long flags;
 585
 586         spin_lock_irqsave(&tp->lock, flags);
 587         if (tp->link_ok(ioaddr)) {
 588                 netif_carrier_on(dev);
 589                 if (netif_msg_ifup(tp))
 590                         printk(KERN_INFO PFX "%s: link up\n", dev->name);
 591         } else {
 592                 if (netif_msg_ifdown(tp))
 593                         printk(KERN_INFO PFX "%s: link down\n", dev->name);
 594                 netif_carrier_off(dev);
 595         }
 596         spin_unlock_irqrestore(&tp->lock, flags);
 597 }
 598
 599 static void rtl8169_link_option(int idx, u8 *autoneg, u16 *speed, u8 *duplex)
 600 {
 601         struct {
 602                 u16 speed;
 603                 u8 duplex;
 604                 u8 autoneg;
 605                 u8 media;
 606         } link_settings[] = {
 607                 { SPEED_10,     DUPLEX_HALF, AUTONEG_DISABLE,   _10_Half },
 608                 { SPEED_10,     DUPLEX_FULL, AUTONEG_DISABLE,   _10_Full },
 609                 { SPEED_100,    DUPLEX_HALF, AUTONEG_DISABLE,   _100_Half },
 610                 { SPEED_100,    DUPLEX_FULL, AUTONEG_DISABLE,   _100_Full },
 611                 { SPEED_1000,   DUPLEX_FULL, AUTONEG_DISABLE,   _1000_Full },
 612                 /* Make TBI happy */
 613                 { SPEED_1000,   DUPLEX_FULL, AUTONEG_ENABLE,    0xff }
 614         }, *p;
 615         unsigned char option;
 616
 617         option = ((idx < MAX_UNITS) && (idx >= 0)) ? media[idx] : 0xff;
 618
 619         if ((option != 0xff) && !idx && netif_msg_drv(&debug))
 620                 printk(KERN_WARNING PFX "media option is deprecated.\n");
 621
 622         for (p = link_settings; p->media != 0xff; p++) {
 623                 if (p->media == option)
 624                         break;
 625         }
 626         *autoneg = p->autoneg;
 627         *speed = p->speed;
 628         *duplex = p->duplex;
 629 }
 630
 631 static void rtl8169_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
 632 {
 633         struct rtl8169_private *tp = netdev_priv(dev);
 634         void __iomem *ioaddr = tp->mmio_addr;
 635         u8 options;
 636
 637         wol->wolopts = 0;
 638
 639 #define WAKE_ANY (WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_BCAST | WAKE_MCAST)
 640         wol->supported = WAKE_ANY;
 641
 642         spin_lock_irq(&tp->lock);
 643
 644         options = RTL_R8(Config1);
 645         if (!(options & PMEnable))
 646                 goto out_unlock;
 647
 648         options = RTL_R8(Config3);
 649         if (options & LinkUp)
 650                 wol->wolopts |= WAKE_PHY;
 651         if (options & MagicPacket)
 652                 wol->wolopts |= WAKE_MAGIC;
 653
 654         options = RTL_R8(Config5);
 655         if (options & UWF)
 656                 wol->wolopts |= WAKE_UCAST;
 657         if (options & BWF)
 658                 wol->wolopts |= WAKE_BCAST;
 659         if (options & MWF)
 660                 wol->wolopts |= WAKE_MCAST;
 661
 662 out_unlock:
 663         spin_unlock_irq(&tp->lock);
 664 }
 665
 666 static int rtl8169_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
 667 {
 668         struct rtl8169_private *tp = netdev_priv(dev);
 669         void __iomem *ioaddr = tp->mmio_addr;
 670         int i;
 671         static struct {
 672                 u32 opt;
 673                 u16 reg;
 674                 u8  mask;
 675         } cfg[] = {
 676                 { WAKE_ANY,   Config1, PMEnable },
 677                 { WAKE_PHY,   Config3, LinkUp },
 678                 { WAKE_MAGIC, Config3, MagicPacket },
 679                 { WAKE_UCAST, Config5, UWF },
 680                 { WAKE_BCAST, Config5, BWF },
 681                 { WAKE_MCAST, Config5, MWF },
 682                 { WAKE_ANY,   Config5, LanWake }
 683         };
 684
 685         spin_lock_irq(&tp->lock);
 686
 687         RTL_W8(Cfg9346, Cfg9346_Unlock);
 688
 689         for (i = 0; i < ARRAY_SIZE(cfg); i++) {
 690                 u8 options = RTL_R8(cfg[i].reg) & ~cfg[i].mask;
 691                 if (wol->wolopts & cfg[i].opt)
 692                         options |= cfg[i].mask;
 693                 RTL_W8(cfg[i].reg, options);
 694         }
 695
 696         RTL_W8(Cfg9346, Cfg9346_Lock);
 697
 698         tp->wol_enabled = (wol->wolopts) ? 1 : 0;
 699
 700         spin_unlock_irq(&tp->lock);
 701
 702         return 0;
 703 }
 704
 705 static void rtl8169_get_drvinfo(struct net_device *dev,
 706                                 struct ethtool_drvinfo *info)
 707 {
 708         struct rtl8169_private *tp = netdev_priv(dev);
 709
 710         strcpy(info->driver, MODULENAME);
 711         strcpy(info->version, RTL8169_VERSION);
 712         strcpy(info->bus_info, pci_name(tp->pci_dev));
 713 }
 714
 715 static int rtl8169_get_regs_len(struct net_device *dev)
 716 {
 717         return R8169_REGS_SIZE;
 718 }
 719
 720 static int rtl8169_set_speed_tbi(struct net_device *dev,
 721                                  u8 autoneg, u16 speed, u8 duplex)
 722 {
 723         struct rtl8169_private *tp = netdev_priv(dev);
 724         void __iomem *ioaddr = tp->mmio_addr;
 725         int ret = 0;
 726         u32 reg;
 727
 728         reg = RTL_R32(TBICSR);
 729         if ((autoneg == AUTONEG_DISABLE) && (speed == SPEED_1000) &&
 730             (duplex == DUPLEX_FULL)) {
 731                 RTL_W32(TBICSR, reg & ~(TBINwEnable | TBINwRestart));
 732         } else if (autoneg == AUTONEG_ENABLE)
 733                 RTL_W32(TBICSR, reg | TBINwEnable | TBINwRestart);
 734         else {
 735                 if (netif_msg_link(tp)) {
 736                         printk(KERN_WARNING "%s: "
 737                                "incorrect speed setting refused in TBI mode\n",
 738                                dev->name);
 739                 }
 740                 ret = -EOPNOTSUPP;
 741         }
 742
 743         return ret;
 744 }
 745
 746 static int rtl8169_set_speed_xmii(struct net_device *dev,
 747                                   u8 autoneg, u16 speed, u8 duplex)
 748 {
 749         struct rtl8169_private *tp = netdev_priv(dev);
 750         void __iomem *ioaddr = tp->mmio_addr;
 751         int auto_nego, giga_ctrl;
 752
 753         auto_nego = mdio_read(ioaddr, MII_ADVERTISE);
 754         auto_nego &= ~(ADVERTISE_10HALF | ADVERTISE_10FULL |
 755                        ADVERTISE_100HALF | ADVERTISE_100FULL);
 756         giga_ctrl = mdio_read(ioaddr, MII_CTRL1000);
 757         giga_ctrl &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF);
 758
 759         if (autoneg == AUTONEG_ENABLE) {
 760                 auto_nego |= (ADVERTISE_10HALF | ADVERTISE_10FULL |
 761                               ADVERTISE_100HALF | ADVERTISE_100FULL);
 762                 giga_ctrl |= ADVERTISE_1000FULL | ADVERTISE_1000HALF;
 763         } else {
 764                 if (speed == SPEED_10)
 765                         auto_nego |= ADVERTISE_10HALF | ADVERTISE_10FULL;
 766                 else if (speed == SPEED_100)
 767                         auto_nego |= ADVERTISE_100HALF | ADVERTISE_100FULL;
 768                 else if (speed == SPEED_1000)
 769                         giga_ctrl |= ADVERTISE_1000FULL | ADVERTISE_1000HALF;
 770
 771                 if (duplex == DUPLEX_HALF)
 772                         auto_nego &= ~(ADVERTISE_10FULL | ADVERTISE_100FULL);
 773
 774                 if (duplex == DUPLEX_FULL)
 775                         auto_nego &= ~(ADVERTISE_10HALF | ADVERTISE_100HALF);
 776
 777                 /* This tweak comes straight from Realtek's driver. */
 778                 if ((speed == SPEED_100) && (duplex == DUPLEX_HALF) &&
 779                     (tp->mac_version == RTL_GIGA_MAC_VER_13)) {
 780                         auto_nego = ADVERTISE_100HALF | ADVERTISE_CSMA;
 781                 }
 782         }
 783
 784         /* The 8100e/8101e do Fast Ethernet only. */
 785         if ((tp->mac_version == RTL_GIGA_MAC_VER_13) ||
 786             (tp->mac_version == RTL_GIGA_MAC_VER_14) ||
 787             (tp->mac_version == RTL_GIGA_MAC_VER_15)) {
 788                 if ((giga_ctrl & (ADVERTISE_1000FULL | ADVERTISE_1000HALF)) &&
 789                     netif_msg_link(tp)) {
 790                         printk(KERN_INFO "%s: PHY does not support 1000Mbps.\n",
 791                                dev->name);
 792                 }
 793                 giga_ctrl &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF);
 794         }
 795
 796         auto_nego |= ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
 797
 798         tp->phy_auto_nego_reg = auto_nego;
 799         tp->phy_1000_ctrl_reg = giga_ctrl;
 800
 801         mdio_write(ioaddr, MII_ADVERTISE, auto_nego);
 802         mdio_write(ioaddr, MII_CTRL1000, giga_ctrl);
 803         mdio_write(ioaddr, MII_BMCR, BMCR_ANENABLE | BMCR_ANRESTART);
 804         return 0;
 805 }
 806
 807 static int rtl8169_set_speed(struct net_device *dev,
 808                              u8 autoneg, u16 speed, u8 duplex)
 809 {
 810         struct rtl8169_private *tp = netdev_priv(dev);
 811         int ret;
 812
 813         ret = tp->set_speed(dev, autoneg, speed, duplex);
 814
 815         if (netif_running(dev) && (tp->phy_1000_ctrl_reg & ADVERTISE_1000FULL))
 816                 mod_timer(&tp->timer, jiffies + RTL8169_PHY_TIMEOUT);
 817
 818         return ret;
 819 }
 820
 821 static int rtl8169_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
 822 {
 823         struct rtl8169_private *tp = netdev_priv(dev);
 824         unsigned long flags;
 825         int ret;
 826
 827         spin_lock_irqsave(&tp->lock, flags);
 828         ret = rtl8169_set_speed(dev, cmd->autoneg, cmd->speed, cmd->duplex);
 829         spin_unlock_irqrestore(&tp->lock, flags);
 830
 831         return ret;
 832 }
 833
 834 static u32 rtl8169_get_rx_csum(struct net_device *dev)
 835 {
 836         struct rtl8169_private *tp = netdev_priv(dev);
 837
 838         return tp->cp_cmd & RxChkSum;
 839 }
 840
 841 static int rtl8169_set_rx_csum(struct net_device *dev, u32 data)
 842 {
 843         struct rtl8169_private *tp = netdev_priv(dev);
 844         void __iomem *ioaddr = tp->mmio_addr;
 845         unsigned long flags;
 846
 847         spin_lock_irqsave(&tp->lock, flags);
 848
 849         if (data)
 850                 tp->cp_cmd |= RxChkSum;
 851         else
 852                 tp->cp_cmd &= ~RxChkSum;
 853
 854         RTL_W16(CPlusCmd, tp->cp_cmd);
 855         RTL_R16(CPlusCmd);
 856
 857         spin_unlock_irqrestore(&tp->lock, flags);
 858
 859         return 0;
 860 }
 861
 862 #ifdef CONFIG_R8169_VLAN
 863
 864 static inline u32 rtl8169_tx_vlan_tag(struct rtl8169_private *tp,
 865                                       struct sk_buff *skb)
 866 {
 867         return (tp->vlgrp && vlan_tx_tag_present(skb)) ?
 868                 TxVlanTag | swab16(vlan_tx_tag_get(skb)) : 0x00;
 869 }
 870
 871 static void rtl8169_vlan_rx_register(struct net_device *dev,
 872                                      struct vlan_group *grp)
 873 {
 874         struct rtl8169_private *tp = netdev_priv(dev);
 875         void __iomem *ioaddr = tp->mmio_addr;
 876         unsigned long flags;
 877
 878         spin_lock_irqsave(&tp->lock, flags);
 879         tp->vlgrp = grp;
 880         if (tp->vlgrp)
 881                 tp->cp_cmd |= RxVlan;
 882         else
 883                 tp->cp_cmd &= ~RxVlan;
 884         RTL_W16(CPlusCmd, tp->cp_cmd);
 885         RTL_R16(CPlusCmd);
 886         spin_unlock_irqrestore(&tp->lock, flags);
 887 }
 888
 889 static void rtl8169_vlan_rx_kill_vid(struct net_device *dev, unsigned short vid)
 890 {
 891         struct rtl8169_private *tp = netdev_priv(dev);
 892         unsigned long flags;
 893
 894         spin_lock_irqsave(&tp->lock, flags);
 895         if (tp->vlgrp)
 896                 tp->vlgrp->vlan_devices[vid] = NULL;
 897         spin_unlock_irqrestore(&tp->lock, flags);
 898 }
 899
 900 static int rtl8169_rx_vlan_skb(struct rtl8169_private *tp, struct RxDesc *desc,
 901                                struct sk_buff *skb)
 902 {
 903         u32 opts2 = le32_to_cpu(desc->opts2);
 904         int ret;
 905
 906         if (tp->vlgrp && (opts2 & RxVlanTag)) {
 907                 rtl8169_rx_hwaccel_skb(skb, tp->vlgrp,
 908                                        swab16(opts2 & 0xffff));
 909                 ret = 0;
 910         } else
 911                 ret = -1;
 912         desc->opts2 = 0;
 913         return ret;
 914 }
 915
 916 #else /* !CONFIG_R8169_VLAN */
 917
 918 static inline u32 rtl8169_tx_vlan_tag(struct rtl8169_private *tp,
 919                                       struct sk_buff *skb)
 920 {
 921         return 0;
 922 }
 923
 924 static int rtl8169_rx_vlan_skb(struct rtl8169_private *tp, struct RxDesc *desc,
 925                                struct sk_buff *skb)
 926 {
 927         return -1;
 928 }
 929
 930 #endif
 931
 932 static void rtl8169_gset_tbi(struct net_device *dev, struct ethtool_cmd *cmd)
 933 {
 934         struct rtl8169_private *tp = netdev_priv(dev);
 935         void __iomem *ioaddr = tp->mmio_addr;
 936         u32 status;
 937
 938         cmd->supported =
 939                 SUPPORTED_1000baseT_Full | SUPPORTED_Autoneg | SUPPORTED_FIBRE;
 940         cmd->port = PORT_FIBRE;
 941         cmd->transceiver = XCVR_INTERNAL;
 942
 943         status = RTL_R32(TBICSR);
 944         cmd->advertising = (status & TBINwEnable) ?  ADVERTISED_Autoneg : 0;
 945         cmd->autoneg = !!(status & TBINwEnable);
 946
 947         cmd->speed = SPEED_1000;
 948         cmd->duplex = DUPLEX_FULL; /* Always set */
 949 }
 950
 951 static void rtl8169_gset_xmii(struct net_device *dev, struct ethtool_cmd *cmd)
 952 {
 953         struct rtl8169_private *tp = netdev_priv(dev);
 954         void __iomem *ioaddr = tp->mmio_addr;
 955         u8 status;
 956
 957         cmd->supported = SUPPORTED_10baseT_Half |
 958                          SUPPORTED_10baseT_Full |
 959                          SUPPORTED_100baseT_Half |
 960                          SUPPORTED_100baseT_Full |
 961                          SUPPORTED_1000baseT_Full |
 962                          SUPPORTED_Autoneg |
 963                          SUPPORTED_TP;
 964
 965         cmd->autoneg = 1;
 966         cmd->advertising = ADVERTISED_TP | ADVERTISED_Autoneg;
 967
 968         if (tp->phy_auto_nego_reg & ADVERTISE_10HALF)
 969                 cmd->advertising |= ADVERTISED_10baseT_Half;
 970         if (tp->phy_auto_nego_reg & ADVERTISE_10FULL)
 971                 cmd->advertising |= ADVERTISED_10baseT_Full;
 972         if (tp->phy_auto_nego_reg & ADVERTISE_100HALF)
 973                 cmd->advertising |= ADVERTISED_100baseT_Half;
 974         if (tp->phy_auto_nego_reg & ADVERTISE_100FULL)
 975                 cmd->advertising |= ADVERTISED_100baseT_Full;
 976         if (tp->phy_1000_ctrl_reg & ADVERTISE_1000FULL)
 977                 cmd->advertising |= ADVERTISED_1000baseT_Full;
 978
 979         status = RTL_R8(PHYstatus);
 980
 981         if (status & _1000bpsF)
 982                 cmd->speed = SPEED_1000;
 983         else if (status & _100bps)
 984                 cmd->speed = SPEED_100;
 985         else if (status & _10bps)
 986                 cmd->speed = SPEED_10;
 987
 988         if (status & TxFlowCtrl)
 989                 cmd->advertising |= ADVERTISED_Asym_Pause;
 990         if (status & RxFlowCtrl)
 991                 cmd->advertising |= ADVERTISED_Pause;
 992
 993         cmd->duplex = ((status & _1000bpsF) || (status & FullDup)) ?
 994                       DUPLEX_FULL : DUPLEX_HALF;
 995 }
 996
 997 static int rtl8169_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
 998 {
 999         struct rtl8169_private *tp = netdev_priv(dev);
1000         unsigned long flags;
1001
1002         spin_lock_irqsave(&tp->lock, flags);
1003
1004         tp->get_settings(dev, cmd);
1005
1006         spin_unlock_irqrestore(&tp->lock, flags);
1007         return 0;
1008 }
1009
1010 static void rtl8169_get_regs(struct net_device *dev, struct ethtool_regs *regs,
1011                              void *p)
1012 {
1013         struct rtl8169_private *tp = netdev_priv(dev);
1014         unsigned long flags;
1015
1016         if (regs->len > R8169_REGS_SIZE)
1017                 regs->len = R8169_REGS_SIZE;
1018
1019         spin_lock_irqsave(&tp->lock, flags);
1020         memcpy_fromio(p, tp->mmio_addr, regs->len);
1021         spin_unlock_irqrestore(&tp->lock, flags);
1022 }
1023
1024 static u32 rtl8169_get_msglevel(struct net_device *dev)
1025 {
1026         struct rtl8169_private *tp = netdev_priv(dev);
1027
1028         return tp->msg_enable;
1029 }
1030
1031 static void rtl8169_set_msglevel(struct net_device *dev, u32 value)
1032 {
1033         struct rtl8169_private *tp = netdev_priv(dev);
1034
1035         tp->msg_enable = value;
1036 }
1037
1038 static const char rtl8169_gstrings[][ETH_GSTRING_LEN] = {
1039         "tx_packets",
1040         "rx_packets",
1041         "tx_errors",
1042         "rx_errors",
1043         "rx_missed",
1044         "align_errors",
1045         "tx_single_collisions",
1046         "tx_multi_collisions",
1047         "unicast",
1048         "broadcast",
1049         "multicast",
1050         "tx_aborted",
1051         "tx_underrun",
1052 };
1053
1054 struct rtl8169_counters {
1055         u64     tx_packets;
1056         u64     rx_packets;
1057         u64     tx_errors;
1058         u32     rx_errors;
1059         u16     rx_missed;
1060         u16     align_errors;
1061         u32     tx_one_collision;
1062         u32     tx_multi_collision;
1063         u64     rx_unicast;
1064         u64     rx_broadcast;
1065         u32     rx_multicast;
1066         u16     tx_aborted;
1067         u16     tx_underun;
1068 };
1069
1070 static int rtl8169_get_stats_count(struct net_device *dev)
1071 {
1072         return ARRAY_SIZE(rtl8169_gstrings);
1073 }
1074
1075 static void rtl8169_get_ethtool_stats(struct net_device *dev,
1076                                       struct ethtool_stats *stats, u64 *data)
1077 {
1078         struct rtl8169_private *tp = netdev_priv(dev);
1079         void __iomem *ioaddr = tp->mmio_addr;
1080         struct rtl8169_counters *counters;
1081         dma_addr_t paddr;
1082         u32 cmd;
1083
1084         ASSERT_RTNL();
1085
1086         counters = pci_alloc_consistent(tp->pci_dev, sizeof(*counters), &paddr);
1087         if (!counters)
1088                 return;
1089
1090         RTL_W32(CounterAddrHigh, (u64)paddr >> 32);
1091         cmd = (u64)paddr & DMA_32BIT_MASK;
1092         RTL_W32(CounterAddrLow, cmd);
1093         RTL_W32(CounterAddrLow, cmd | CounterDump);
1094
1095         while (RTL_R32(CounterAddrLow) & CounterDump) {
1096                 if (msleep_interruptible(1))
1097                         break;
1098         }
1099
1100         RTL_W32(CounterAddrLow, 0);
1101         RTL_W32(CounterAddrHigh, 0);
1102
1103         data[0] = le64_to_cpu(counters->tx_packets);
1104         data[1] = le64_to_cpu(counters->rx_packets);
1105         data[2] = le64_to_cpu(counters->tx_errors);
1106         data[3] = le32_to_cpu(counters->rx_errors);
1107         data[4] = le16_to_cpu(counters->rx_missed);
1108         data[5] = le16_to_cpu(counters->align_errors);
1109         data[6] = le32_to_cpu(counters->tx_one_collision);
1110         data[7] = le32_to_cpu(counters->tx_multi_collision);
1111         data[8] = le64_to_cpu(counters->rx_unicast);
1112         data[9] = le64_to_cpu(counters->rx_broadcast);
1113         data[10] = le32_to_cpu(counters->rx_multicast);
1114         data[11] = le16_to_cpu(counters->tx_aborted);
1115         data[12] = le16_to_cpu(counters->tx_underun);
1116
1117         pci_free_consistent(tp->pci_dev, sizeof(*counters), counters, paddr);
1118 }
1119
1120 static void rtl8169_get_strings(struct net_device *dev, u32 stringset, u8 *data)
1121 {
1122         switch(stringset) {
1123         case ETH_SS_STATS:
1124                 memcpy(data, *rtl8169_gstrings, sizeof(rtl8169_gstrings));
1125                 break;
1126         }
1127 }
1128
1129
1130 static const struct ethtool_ops rtl8169_ethtool_ops = {
1131         .get_drvinfo            = rtl8169_get_drvinfo,
1132         .get_regs_len           = rtl8169_get_regs_len,
1133         .get_link               = ethtool_op_get_link,
1134         .get_settings           = rtl8169_get_settings,
1135         .set_settings           = rtl8169_set_settings,
1136         .get_msglevel           = rtl8169_get_msglevel,
1137         .set_msglevel           = rtl8169_set_msglevel,
1138         .get_rx_csum            = rtl8169_get_rx_csum,
1139         .set_rx_csum            = rtl8169_set_rx_csum,
1140         .get_tx_csum            = ethtool_op_get_tx_csum,
1141         .set_tx_csum            = ethtool_op_set_tx_csum,
1142         .get_sg                 = ethtool_op_get_sg,
1143         .set_sg                 = ethtool_op_set_sg,
1144         .get_tso                = ethtool_op_get_tso,
1145         .set_tso                = ethtool_op_set_tso,
1146         .get_regs               = rtl8169_get_regs,
1147         .get_wol                = rtl8169_get_wol,
1148         .set_wol                = rtl8169_set_wol,
1149         .get_strings            = rtl8169_get_strings,
1150         .get_stats_count        = rtl8169_get_stats_count,
1151         .get_ethtool_stats      = rtl8169_get_ethtool_stats,
1152         .get_perm_addr          = ethtool_op_get_perm_addr,
1153 };
1154
1155 static void rtl8169_write_gmii_reg_bit(void __iomem *ioaddr, int reg, int bitnum,
1156                                        int bitval)
1157 {
1158         int val;
1159
1160         val = mdio_read(ioaddr, reg);
1161         val = (bitval == 1) ?
1162                 val | (bitval << bitnum) :  val & ~(0x0001 << bitnum);
1163         mdio_write(ioaddr, reg, val & 0xffff);
1164 }
1165
1166 static void rtl8169_get_mac_version(struct rtl8169_private *tp, void __iomem *ioaddr)
1167 {
1168         const struct {
1169                 u32 mask;
1170                 int mac_version;
1171         } mac_info[] = {
1172                 { 0x38800000,   RTL_GIGA_MAC_VER_15 },
1173                 { 0x38000000,   RTL_GIGA_MAC_VER_12 },
1174                 { 0x34000000,   RTL_GIGA_MAC_VER_13 },
1175                 { 0x30800000,   RTL_GIGA_MAC_VER_14 },
1176                 { 0x30000000,   RTL_GIGA_MAC_VER_11 },
1177                 { 0x18000000,   RTL_GIGA_MAC_VER_05 },
1178                 { 0x10000000,   RTL_GIGA_MAC_VER_04 },
1179                 { 0x04000000,   RTL_GIGA_MAC_VER_03 },
1180                 { 0x00800000,   RTL_GIGA_MAC_VER_02 },
1181                 { 0x00000000,   RTL_GIGA_MAC_VER_01 }   /* Catch-all */
1182         }, *p = mac_info;
1183         u32 reg;
1184
1185         reg = RTL_R32(TxConfig) & 0x7c800000;
1186         while ((reg & p->mask) != p->mask)
1187                 p++;
1188         tp->mac_version = p->mac_version;
1189 }
1190
1191 static void rtl8169_print_mac_version(struct rtl8169_private *tp)
1192 {
1193         dprintk("mac_version = 0x%02x\n", tp->mac_version);
1194 }
1195
1196 static void rtl8169_get_phy_version(struct rtl8169_private *tp, void __iomem *ioaddr)
1197 {
1198         const struct {
1199                 u16 mask;
1200                 u16 set;
1201                 int phy_version;
1202         } phy_info[] = {
1203                 { 0x000f, 0x0002, RTL_GIGA_PHY_VER_G },
1204                 { 0x000f, 0x0001, RTL_GIGA_PHY_VER_F },
1205                 { 0x000f, 0x0000, RTL_GIGA_PHY_VER_E },
1206                 { 0x0000, 0x0000, RTL_GIGA_PHY_VER_D } /* Catch-all */
1207         }, *p = phy_info;
1208         u16 reg;
1209
1210         reg = mdio_read(ioaddr, MII_PHYSID2) & 0xffff;
1211         while ((reg & p->mask) != p->set)
1212                 p++;
1213         tp->phy_version = p->phy_version;
1214 }
1215
1216 static void rtl8169_print_phy_version(struct rtl8169_private *tp)
1217 {
1218         struct {
1219                 int version;
1220                 char *msg;
1221                 u32 reg;
1222         } phy_print[] = {
1223                 { RTL_GIGA_PHY_VER_G, "RTL_GIGA_PHY_VER_G", 0x0002 },
1224                 { RTL_GIGA_PHY_VER_F, "RTL_GIGA_PHY_VER_F", 0x0001 },
1225                 { RTL_GIGA_PHY_VER_E, "RTL_GIGA_PHY_VER_E", 0x0000 },
1226                 { RTL_GIGA_PHY_VER_D, "RTL_GIGA_PHY_VER_D", 0x0000 },
1227                 { 0, NULL, 0x0000 }
1228         }, *p;
1229
1230         for (p = phy_print; p->msg; p++) {
1231                 if (tp->phy_version == p->version) {
1232                         dprintk("phy_version == %s (%04x)\n", p->msg, p->reg);
1233                         return;
1234                 }
1235         }
1236         dprintk("phy_version == Unknown\n");
1237 }
1238
1239 static void rtl8169_hw_phy_config(struct net_device *dev)
1240 {
1241         struct rtl8169_private *tp = netdev_priv(dev);
1242         void __iomem *ioaddr = tp->mmio_addr;
1243         struct {
1244                 u16 regs[5]; /* Beware of bit-sign propagation */
1245         } phy_magic[5] = { {
1246                 { 0x0000,       //w 4 15 12 0
1247                   0x00a1,       //w 3 15 0 00a1
1248                   0x0008,       //w 2 15 0 0008
1249                   0x1020,       //w 1 15 0 1020
1250                   0x1000 } },{  //w 0 15 0 1000
1251                 { 0x7000,       //w 4 15 12 7
1252                   0xff41,       //w 3 15 0 ff41
1253                   0xde60,       //w 2 15 0 de60
1254                   0x0140,       //w 1 15 0 0140
1255                   0x0077 } },{  //w 0 15 0 0077
1256                 { 0xa000,       //w 4 15 12 a
1257                   0xdf01,       //w 3 15 0 df01
1258                   0xdf20,       //w 2 15 0 df20
1259                   0xff95,       //w 1 15 0 ff95
1260                   0xfa00 } },{  //w 0 15 0 fa00
1261                 { 0xb000,       //w 4 15 12 b
1262                   0xff41,       //w 3 15 0 ff41
1263                   0xde20,       //w 2 15 0 de20
1264                   0x0140,       //w 1 15 0 0140
1265                   0x00bb } },{  //w 0 15 0 00bb
1266                 { 0xf000,       //w 4 15 12 f
1267                   0xdf01,       //w 3 15 0 df01
1268                   0xdf20,       //w 2 15 0 df20
1269                   0xff95,       //w 1 15 0 ff95
1270                   0xbf00 }      //w 0 15 0 bf00
1271                 }
1272         }, *p = phy_magic;
1273         int i;
1274
1275         rtl8169_print_mac_version(tp);
1276         rtl8169_print_phy_version(tp);
1277
1278         if (tp->mac_version <= RTL_GIGA_MAC_VER_01)
1279                 return;
1280         if (tp->phy_version >= RTL_GIGA_PHY_VER_H)
1281                 return;
1282
1283         dprintk("MAC version != 0 && PHY version == 0 or 1\n");
1284         dprintk("Do final_reg2.cfg\n");
1285
1286         /* Shazam ! */
1287
1288         if (tp->mac_version == RTL_GIGA_MAC_VER_04) {
1289                 mdio_write(ioaddr, 31, 0x0002);
1290                 mdio_write(ioaddr,  1, 0x90d0);
1291                 mdio_write(ioaddr, 31, 0x0000);
1292                 return;
1293         }
1294
1295         /* phy config for RTL8169s mac_version C chip */
1296         mdio_write(ioaddr, 31, 0x0001);                 //w 31 2 0 1
1297         mdio_write(ioaddr, 21, 0x1000);                 //w 21 15 0 1000
1298         mdio_write(ioaddr, 24, 0x65c7);                 //w 24 15 0 65c7
1299         rtl8169_write_gmii_reg_bit(ioaddr, 4, 11, 0);   //w 4 11 11 0
1300
1301         for (i = 0; i < ARRAY_SIZE(phy_magic); i++, p++) {
1302                 int val, pos = 4;
1303
1304                 val = (mdio_read(ioaddr, pos) & 0x0fff) | (p->regs[0] & 0xffff);
1305                 mdio_write(ioaddr, pos, val);
1306                 while (--pos >= 0)
1307                         mdio_write(ioaddr, pos, p->regs[4 - pos] & 0xffff);
1308                 rtl8169_write_gmii_reg_bit(ioaddr, 4, 11, 1); //w 4 11 11 1
1309                 rtl8169_write_gmii_reg_bit(ioaddr, 4, 11, 0); //w 4 11 11 0
1310         }
1311         mdio_write(ioaddr, 31, 0x0000); //w 31 2 0 0
1312 }
1313
1314 static void rtl8169_phy_timer(unsigned long __opaque)
1315 {
1316         struct net_device *dev = (struct net_device *)__opaque;
1317         struct rtl8169_private *tp = netdev_priv(dev);
1318         struct timer_list *timer = &tp->timer;
1319         void __iomem *ioaddr = tp->mmio_addr;
1320         unsigned long timeout = RTL8169_PHY_TIMEOUT;
1321
1322         assert(tp->mac_version > RTL_GIGA_MAC_VER_01);
1323         assert(tp->phy_version < RTL_GIGA_PHY_VER_H);
1324
1325         if (!(tp->phy_1000_ctrl_reg & ADVERTISE_1000FULL))
1326                 return;
1327
1328         spin_lock_irq(&tp->lock);
1329
1330         if (tp->phy_reset_pending(ioaddr)) {
1331                 /*
1332                  * A busy loop could burn quite a few cycles on nowadays CPU.
1333                  * Let's delay the execution of the timer for a few ticks.
1334                  */
1335                 timeout = HZ/10;
1336                 goto out_mod_timer;
1337         }
1338
1339         if (tp->link_ok(ioaddr))
1340                 goto out_unlock;
1341
1342         if (netif_msg_link(tp))
1343                 printk(KERN_WARNING "%s: PHY reset until link up\n", dev->name);
1344
1345         tp->phy_reset_enable(ioaddr);
1346
1347 out_mod_timer:
1348         mod_timer(timer, jiffies + timeout);
1349 out_unlock:
1350         spin_unlock_irq(&tp->lock);
1351 }
1352
1353 static inline void rtl8169_delete_timer(struct net_device *dev)
1354 {
1355         struct rtl8169_private *tp = netdev_priv(dev);
1356         struct timer_list *timer = &tp->timer;
1357
1358         if ((tp->mac_version <= RTL_GIGA_MAC_VER_01) ||
1359             (tp->phy_version >= RTL_GIGA_PHY_VER_H))
1360                 return;
1361
1362         del_timer_sync(timer);
1363 }
1364
1365 static inline void rtl8169_request_timer(struct net_device *dev)
1366 {
1367         struct rtl8169_private *tp = netdev_priv(dev);
1368         struct timer_list *timer = &tp->timer;
1369
1370         if ((tp->mac_version <= RTL_GIGA_MAC_VER_01) ||
1371             (tp->phy_version >= RTL_GIGA_PHY_VER_H))
1372                 return;
1373
1374         init_timer(timer);
1375         timer->expires = jiffies + RTL8169_PHY_TIMEOUT;
1376         timer->data = (unsigned long)(dev);
1377         timer->function = rtl8169_phy_timer;
1378         add_timer(timer);
1379 }
1380
1381 #ifdef CONFIG_NET_POLL_CONTROLLER
1382 /*
1383  * Polling 'interrupt' - used by things like netconsole to send skbs
1384  * without having to re-enable interrupts. It's not called while
1385  * the interrupt routine is executing.
1386  */
1387 static void rtl8169_netpoll(struct net_device *dev)
1388 {
1389         struct rtl8169_private *tp = netdev_priv(dev);
1390         struct pci_dev *pdev = tp->pci_dev;
1391
1392         disable_irq(pdev->irq);
1393         rtl8169_interrupt(pdev->irq, dev);
1394         enable_irq(pdev->irq);
1395 }
1396 #endif
1397
1398 static void rtl8169_release_board(struct pci_dev *pdev, struct net_device *dev,
1399                                   void __iomem *ioaddr)
1400 {
1401         iounmap(ioaddr);
1402         pci_release_regions(pdev);
1403         pci_disable_device(pdev);
1404         free_netdev(dev);
1405 }
1406
1407 static void rtl8169_phy_reset(struct net_device *dev,
1408                               struct rtl8169_private *tp)
1409 {
1410         void __iomem *ioaddr = tp->mmio_addr;
1411         int i;
1412
1413         tp->phy_reset_enable(ioaddr);
1414         for (i = 0; i < 100; i++) {
1415                 if (!tp->phy_reset_pending(ioaddr))
1416                         return;
1417                 msleep(1);
1418         }
1419         if (netif_msg_link(tp))
1420                 printk(KERN_ERR "%s: PHY reset failed.\n", dev->name);
1421 }
1422
1423 static void rtl8169_init_phy(struct net_device *dev, struct rtl8169_private *tp)
1424 {
1425         void __iomem *ioaddr = tp->mmio_addr;
1426         static int board_idx = -1;
1427         u8 autoneg, duplex;
1428         u16 speed;
1429
1430         board_idx++;
1431
1432         rtl8169_hw_phy_config(dev);
1433
1434         dprintk("Set MAC Reg C+CR Offset 0x82h = 0x01h\n");
1435         RTL_W8(0x82, 0x01);
1436
1437         if (tp->mac_version < RTL_GIGA_MAC_VER_03) {
1438                 dprintk("Set PCI Latency=0x40\n");
1439                 pci_write_config_byte(tp->pci_dev, PCI_LATENCY_TIMER, 0x40);
1440         }
1441
1442         if (tp->mac_version == RTL_GIGA_MAC_VER_02) {
1443                 dprintk("Set MAC Reg C+CR Offset 0x82h = 0x01h\n");
1444                 RTL_W8(0x82, 0x01);
1445                 dprintk("Set PHY Reg 0x0bh = 0x00h\n");
1446                 mdio_write(ioaddr, 0x0b, 0x0000); //w 0x0b 15 0 0
1447         }
1448
1449         rtl8169_link_option(board_idx, &autoneg, &speed, &duplex);
1450
1451         rtl8169_phy_reset(dev, tp);
1452
1453         rtl8169_set_speed(dev, autoneg, speed, duplex);
1454
1455         if ((RTL_R8(PHYstatus) & TBI_Enable) && netif_msg_link(tp))
1456                 printk(KERN_INFO PFX "%s: TBI auto-negotiating\n", dev->name);
1457 }
1458
1459 static int rtl8169_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
1460 {
1461         struct rtl8169_private *tp = netdev_priv(dev);
1462         struct mii_ioctl_data *data = if_mii(ifr);
1463
1464         if (!netif_running(dev))
1465                 return -ENODEV;
1466
1467         switch (cmd) {
1468         case SIOCGMIIPHY:
1469                 data->phy_id = 32; /* Internal PHY */
1470                 return 0;
1471
1472         case SIOCGMIIREG:
1473                 data->val_out = mdio_read(tp->mmio_addr, data->reg_num & 0x1f);
1474                 return 0;
1475
1476         case SIOCSMIIREG:
1477                 if (!capable(CAP_NET_ADMIN))
1478                         return -EPERM;
1479                 mdio_write(tp->mmio_addr, data->reg_num & 0x1f, data->val_in);
1480                 return 0;
1481         }
1482         return -EOPNOTSUPP;
1483 }
1484
1485 static int __devinit
1486 rtl8169_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
1487 {
1488         const unsigned int region = rtl_cfg_info[ent->driver_data].region;
1489         struct rtl8169_private *tp;
1490         struct net_device *dev;
1491         void __iomem *ioaddr;
1492         unsigned int pm_cap;
1493         int i, rc;
1494
1495         if (netif_msg_drv(&debug)) {
1496                 printk(KERN_INFO "%s Gigabit Ethernet driver %s loaded\n",
1497                        MODULENAME, RTL8169_VERSION);
1498         }
1499
1500         dev = alloc_etherdev(sizeof (*tp));
1501         if (!dev) {
1502                 if (netif_msg_drv(&debug))
1503                         dev_err(&pdev->dev, "unable to alloc new ethernet\n");
1504                 rc = -ENOMEM;
1505                 goto out;
1506         }
1507
1508         SET_MODULE_OWNER(dev);
1509         SET_NETDEV_DEV(dev, &pdev->dev);
1510         tp = netdev_priv(dev);
1511         tp->msg_enable = netif_msg_init(debug.msg_enable, R8169_MSG_DEFAULT);
1512
1513         /* enable device (incl. PCI PM wakeup and hotplug setup) */
1514         rc = pci_enable_device(pdev);
1515         if (rc < 0) {
1516                 if (netif_msg_probe(tp))
1517                         dev_err(&pdev->dev, "enable failure\n");
1518                 goto err_out_free_dev_1;
1519         }
1520
1521         rc = pci_set_mwi(pdev);
1522         if (rc < 0)
1523                 goto err_out_disable_2;
1524
1525         /* save power state before pci_enable_device overwrites it */
1526         pm_cap = pci_find_capability(pdev, PCI_CAP_ID_PM);
1527         if (pm_cap) {
1528                 u16 pwr_command, acpi_idle_state;
1529
1530                 pci_read_config_word(pdev, pm_cap + PCI_PM_CTRL, &pwr_command);
1531                 acpi_idle_state = pwr_command & PCI_PM_CTRL_STATE_MASK;
1532         } else {
1533                 if (netif_msg_probe(tp)) {
1534                         dev_err(&pdev->dev,
1535                                 "PowerManagement capability not found.\n");
1536                 }
1537         }
1538
1539         /* make sure PCI base addr 1 is MMIO */
1540         if (!(pci_resource_flags(pdev, region) & IORESOURCE_MEM)) {
1541                 if (netif_msg_probe(tp)) {
1542                         dev_err(&pdev->dev,
1543                                 "region #%d not an MMIO resource, aborting\n",
1544                                 region);
1545                 }
1546                 rc = -ENODEV;
1547                 goto err_out_mwi_3;
1548         }
1549
1550         /* check for weird/broken PCI region reporting */
1551         if (pci_resource_len(pdev, region) < R8169_REGS_SIZE) {
1552                 if (netif_msg_probe(tp)) {
1553                         dev_err(&pdev->dev,
1554                                 "Invalid PCI region size(s), aborting\n");
1555                 }
1556                 rc = -ENODEV;
1557                 goto err_out_mwi_3;
1558         }
1559
1560         rc = pci_request_regions(pdev, MODULENAME);
1561         if (rc < 0) {
1562                 if (netif_msg_probe(tp))
1563                         dev_err(&pdev->dev, "could not request regions.\n");
1564                 goto err_out_mwi_3;
1565         }
1566
1567         tp->cp_cmd = PCIMulRW | RxChkSum;
1568
1569         if ((sizeof(dma_addr_t) > 4) &&
1570             !pci_set_dma_mask(pdev, DMA_64BIT_MASK) && use_dac) {
1571                 tp->cp_cmd |= PCIDAC;
1572                 dev->features |= NETIF_F_HIGHDMA;
1573         } else {
1574                 rc = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
1575                 if (rc < 0) {
1576                         if (netif_msg_probe(tp)) {
1577                                 dev_err(&pdev->dev,
1578                                         "DMA configuration failed.\n");
1579                         }
1580                         goto err_out_free_res_4;
1581                 }
1582         }
1583
1584         pci_set_master(pdev);
1585
1586         /* ioremap MMIO region */
1587         ioaddr = ioremap(pci_resource_start(pdev, region), R8169_REGS_SIZE);
1588         if (!ioaddr) {
1589                 if (netif_msg_probe(tp))
1590                         dev_err(&pdev->dev, "cannot remap MMIO, aborting\n");
1591                 rc = -EIO;
1592                 goto err_out_free_res_4;
1593         }
1594
1595         /* Unneeded ? Don't mess with Mrs. Murphy. */
1596         rtl8169_irq_mask_and_ack(ioaddr);
1597
1598         /* Soft reset the chip. */
1599         RTL_W8(ChipCmd, CmdReset);
1600
1601         /* Check that the chip has finished the reset. */
1602         for (i = 100; i > 0; i--) {
1603                 if ((RTL_R8(ChipCmd) & CmdReset) == 0)
1604                         break;
1605                 msleep_interruptible(1);
1606         }
1607
1608         /* Identify chip attached to board */
1609         rtl8169_get_mac_version(tp, ioaddr);
1610         rtl8169_get_phy_version(tp, ioaddr);
1611
1612         rtl8169_print_mac_version(tp);
1613         rtl8169_print_phy_version(tp);
1614
1615         for (i = ARRAY_SIZE(rtl_chip_info) - 1; i >= 0; i--) {
1616                 if (tp->mac_version == rtl_chip_info[i].mac_version)
1617                         break;
1618         }
1619         if (i < 0) {
1620                 /* Unknown chip: assume array element #0, original RTL-8169 */
1621                 if (netif_msg_probe(tp)) {
1622                         dev_printk(KERN_DEBUG, &pdev->dev,
1623                                 "unknown chip version, assuming %s\n",
1624                                 rtl_chip_info[0].name);
1625                 }
1626                 i++;
1627         }
1628         tp->chipset = i;
1629
1630         RTL_W8(Cfg9346, Cfg9346_Unlock);
1631         RTL_W8(Config1, RTL_R8(Config1) | PMEnable);
1632         RTL_W8(Config5, RTL_R8(Config5) & PMEStatus);
1633         RTL_W8(Cfg9346, Cfg9346_Lock);
1634
1635         if (RTL_R8(PHYstatus) & TBI_Enable) {
1636                 tp->set_speed = rtl8169_set_speed_tbi;
1637                 tp->get_settings = rtl8169_gset_tbi;
1638                 tp->phy_reset_enable = rtl8169_tbi_reset_enable;
1639                 tp->phy_reset_pending = rtl8169_tbi_reset_pending;
1640                 tp->link_ok = rtl8169_tbi_link_ok;
1641
1642                 tp->phy_1000_ctrl_reg = ADVERTISE_1000FULL; /* Implied by TBI */
1643         } else {
1644                 tp->set_speed = rtl8169_set_speed_xmii;
1645                 tp->get_settings = rtl8169_gset_xmii;
1646                 tp->phy_reset_enable = rtl8169_xmii_reset_enable;
1647                 tp->phy_reset_pending = rtl8169_xmii_reset_pending;
1648                 tp->link_ok = rtl8169_xmii_link_ok;
1649
1650                 dev->do_ioctl = rtl8169_ioctl;
1651         }
1652
1653         /* Get MAC address.  FIXME: read EEPROM */
1654         for (i = 0; i < MAC_ADDR_LEN; i++)
1655                 dev->dev_addr[i] = RTL_R8(MAC0 + i);
1656         memcpy(dev->perm_addr, dev->dev_addr, dev->addr_len);
1657
1658         dev->open = rtl8169_open;
1659         dev->hard_start_xmit = rtl8169_start_xmit;
1660         dev->get_stats = rtl8169_get_stats;
1661         SET_ETHTOOL_OPS(dev, &rtl8169_ethtool_ops);
1662         dev->stop = rtl8169_close;
1663         dev->tx_timeout = rtl8169_tx_timeout;
1664         dev->set_multicast_list = rtl8169_set_rx_mode;
1665         dev->watchdog_timeo = RTL8169_TX_TIMEOUT;
1666         dev->irq = pdev->irq;
1667         dev->base_addr = (unsigned long) ioaddr;
1668         dev->change_mtu = rtl8169_change_mtu;
1669
1670 #ifdef CONFIG_R8169_NAPI
1671         dev->poll = rtl8169_poll;
1672         dev->weight = R8169_NAPI_WEIGHT;
1673 #endif
1674
1675 #ifdef CONFIG_R8169_VLAN
1676         dev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX;
1677         dev->vlan_rx_register = rtl8169_vlan_rx_register;
1678         dev->vlan_rx_kill_vid = rtl8169_vlan_rx_kill_vid;
1679 #endif
1680
1681 #ifdef CONFIG_NET_POLL_CONTROLLER
1682         dev->poll_controller = rtl8169_netpoll;
1683 #endif
1684
1685         tp->intr_mask = 0xffff;
1686         tp->pci_dev = pdev;
1687         tp->mmio_addr = ioaddr;
1688         tp->align = rtl_cfg_info[ent->driver_data].align;
1689
1690         spin_lock_init(&tp->lock);
1691
1692         rc = register_netdev(dev);
1693         if (rc < 0)
1694                 goto err_out_unmap_5;
1695
1696         pci_set_drvdata(pdev, dev);
1697
1698         if (netif_msg_probe(tp)) {
1699                 printk(KERN_INFO "%s: %s at 0x%lx, "
1700                        "%2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x, "
1701                        "IRQ %d\n",
1702                        dev->name,
1703                        rtl_chip_info[tp->chipset].name,
1704                        dev->base_addr,
1705                        dev->dev_addr[0], dev->dev_addr[1],
1706                        dev->dev_addr[2], dev->dev_addr[3],
1707                        dev->dev_addr[4], dev->dev_addr[5], dev->irq);
1708         }
1709
1710         rtl8169_init_phy(dev, tp);
1711
1712 out:
1713         return rc;
1714
1715 err_out_unmap_5:
1716         iounmap(ioaddr);
1717 err_out_free_res_4:
1718         pci_release_regions(pdev);
1719 err_out_mwi_3:
1720         pci_clear_mwi(pdev);
1721 err_out_disable_2:
1722         pci_disable_device(pdev);
1723 err_out_free_dev_1:
1724         free_netdev(dev);
1725         goto out;
1726 }
1727
1728 static void __devexit
1729 rtl8169_remove_one(struct pci_dev *pdev)
1730 {
1731         struct net_device *dev = pci_get_drvdata(pdev);
1732         struct rtl8169_private *tp = netdev_priv(dev);
1733
1734         assert(dev != NULL);
1735         assert(tp != NULL);
1736
1737         unregister_netdev(dev);
1738         rtl8169_release_board(pdev, dev, tp->mmio_addr);
1739         pci_set_drvdata(pdev, NULL);
1740 }
1741
1742 static void rtl8169_set_rxbufsize(struct rtl8169_private *tp,
1743                                   struct net_device *dev)
1744 {
1745         unsigned int mtu = dev->mtu;
1746
1747         tp->rx_buf_sz = (mtu > RX_BUF_SIZE) ? mtu + ETH_HLEN + 8 : RX_BUF_SIZE;
1748 }
1749
1750 static int rtl8169_open(struct net_device *dev)
1751 {
1752         struct rtl8169_private *tp = netdev_priv(dev);
1753         struct pci_dev *pdev = tp->pci_dev;
1754         int retval;
1755
1756         rtl8169_set_rxbufsize(tp, dev);
1757
1758         retval =
1759             request_irq(dev->irq, rtl8169_interrupt, IRQF_SHARED, dev->name, dev);
1760         if (retval < 0)
1761                 goto out;
1762
1763         retval = -ENOMEM;
1764
1765         /*
1766          * Rx and Tx desscriptors needs 256 bytes alignment.
1767          * pci_alloc_consistent provides more.
1768          */
1769         tp->TxDescArray = pci_alloc_consistent(pdev, R8169_TX_RING_BYTES,
1770                                                &tp->TxPhyAddr);
1771         if (!tp->TxDescArray)
1772                 goto err_free_irq;
1773
1774         tp->RxDescArray = pci_alloc_consistent(pdev, R8169_RX_RING_BYTES,
1775                                                &tp->RxPhyAddr);
1776         if (!tp->RxDescArray)
1777                 goto err_free_tx;
1778
1779         retval = rtl8169_init_ring(dev);
1780         if (retval < 0)
1781                 goto err_free_rx;
1782
1783         INIT_WORK(&tp->task, NULL, dev);
1784
1785         rtl8169_hw_start(dev);
1786
1787         rtl8169_request_timer(dev);
1788
1789         rtl8169_check_link_status(dev, tp, tp->mmio_addr);
1790 out:
1791         return retval;
1792
1793 err_free_rx:
1794         pci_free_consistent(pdev, R8169_RX_RING_BYTES, tp->RxDescArray,
1795                             tp->RxPhyAddr);
1796 err_free_tx:
1797         pci_free_consistent(pdev, R8169_TX_RING_BYTES, tp->TxDescArray,
1798                             tp->TxPhyAddr);
1799 err_free_irq:
1800         free_irq(dev->irq, dev);
1801         goto out;
1802 }
1803
1804 static void rtl8169_hw_reset(void __iomem *ioaddr)
1805 {
1806         /* Disable interrupts */
1807         rtl8169_irq_mask_and_ack(ioaddr);
1808
1809         /* Reset the chipset */
1810         RTL_W8(ChipCmd, CmdReset);
1811
1812         /* PCI commit */
1813         RTL_R8(ChipCmd);
1814 }
1815
1816 static void rtl8169_set_rx_tx_config_registers(struct rtl8169_private *tp)
1817 {
1818         void __iomem *ioaddr = tp->mmio_addr;
1819         u32 cfg = rtl8169_rx_config;
1820
1821         cfg |= (RTL_R32(RxConfig) & rtl_chip_info[tp->chipset].RxConfigMask);
1822         RTL_W32(RxConfig, cfg);
1823
1824         /* Set DMA burst size and Interframe Gap Time */
1825         RTL_W32(TxConfig, (TX_DMA_BURST << TxDMAShift) |
1826                 (InterFrameGap << TxInterFrameGapShift));
1827 }
1828
1829 static void rtl8169_hw_start(struct net_device *dev)
1830 {
1831         struct rtl8169_private *tp = netdev_priv(dev);
1832         void __iomem *ioaddr = tp->mmio_addr;
1833         struct pci_dev *pdev = tp->pci_dev;
1834         u16 cmd;
1835         u32 i;
1836
1837         /* Soft reset the chip. */
1838         RTL_W8(ChipCmd, CmdReset);
1839
1840         /* Check that the chip has finished the reset. */
1841         for (i = 100; i > 0; i--) {
1842                 if ((RTL_R8(ChipCmd) & CmdReset) == 0)
1843                         break;
1844                 msleep_interruptible(1);
1845         }
1846
1847         if (tp->mac_version == RTL_GIGA_MAC_VER_05) {
1848                 RTL_W16(CPlusCmd, RTL_R16(CPlusCmd) | PCIMulRW);
1849                 pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE, 0x08);
1850         }
1851
1852         if (tp->mac_version == RTL_GIGA_MAC_VER_13) {
1853                 pci_write_config_word(pdev, 0x68, 0x00);
1854                 pci_write_config_word(pdev, 0x69, 0x08);
1855         }
1856
1857         /* Undocumented stuff. */
1858         if (tp->mac_version == RTL_GIGA_MAC_VER_05) {
1859                 /* Realtek's r1000_n.c driver uses '&& 0x01' here. Well... */
1860                 if ((RTL_R8(Config2) & 0x07) & 0x01)
1861                         RTL_W32(0x7c, 0x0007ffff);
1862
1863                 RTL_W32(0x7c, 0x0007ff00);
1864
1865                 pci_read_config_word(pdev, PCI_COMMAND, &cmd);
1866                 cmd = cmd & 0xef;
1867                 pci_write_config_word(pdev, PCI_COMMAND, cmd);
1868         }
1869
1870         RTL_W8(Cfg9346, Cfg9346_Unlock);
1871         if ((tp->mac_version == RTL_GIGA_MAC_VER_01) ||
1872             (tp->mac_version == RTL_GIGA_MAC_VER_02) ||
1873             (tp->mac_version == RTL_GIGA_MAC_VER_03) ||
1874             (tp->mac_version == RTL_GIGA_MAC_VER_04))
1875                 RTL_W8(ChipCmd, CmdTxEnb | CmdRxEnb);
1876
1877         RTL_W8(EarlyTxThres, EarlyTxThld);
1878
1879         /* Low hurts. Let's disable the filtering. */
1880         RTL_W16(RxMaxSize, 16383);
1881
1882         if ((tp->mac_version == RTL_GIGA_MAC_VER_01) ||
1883             (tp->mac_version == RTL_GIGA_MAC_VER_02) ||
1884             (tp->mac_version == RTL_GIGA_MAC_VER_03) ||
1885             (tp->mac_version == RTL_GIGA_MAC_VER_04))
1886                 RTL_W8(ChipCmd, CmdTxEnb | CmdRxEnb);
1887                 rtl8169_set_rx_tx_config_registers(tp);
1888
1889         cmd = RTL_R16(CPlusCmd);
1890         RTL_W16(CPlusCmd, cmd);
1891
1892         tp->cp_cmd |= cmd | PCIMulRW;
1893
1894         if ((tp->mac_version == RTL_GIGA_MAC_VER_02) ||
1895             (tp->mac_version == RTL_GIGA_MAC_VER_03)) {
1896                 dprintk(KERN_INFO PFX "Set MAC Reg C+CR Offset 0xE0. "
1897                         "Bit-3 and bit-14 MUST be 1\n");
1898                 tp->cp_cmd |= (1 << 14);
1899         }
1900
1901         RTL_W16(CPlusCmd, tp->cp_cmd);
1902
1903         /*
1904          * Undocumented corner. Supposedly:
1905          * (TxTimer << 12) | (TxPackets << 8) | (RxTimer << 4) | RxPackets
1906          */
1907         RTL_W16(IntrMitigate, 0x0000);
1908
1909         /*
1910          * Magic spell: some iop3xx ARM board needs the TxDescAddrHigh
1911          * register to be written before TxDescAddrLow to work.
1912          * Switching from MMIO to I/O access fixes the issue as well.
1913          */
1914         RTL_W32(TxDescStartAddrHigh, ((u64) tp->TxPhyAddr >> 32));
1915         RTL_W32(TxDescStartAddrLow, ((u64) tp->TxPhyAddr & DMA_32BIT_MASK));
1916         RTL_W32(RxDescAddrHigh, ((u64) tp->RxPhyAddr >> 32));
1917         RTL_W32(RxDescAddrLow, ((u64) tp->RxPhyAddr & DMA_32BIT_MASK));
1918
1919         if ((tp->mac_version != RTL_GIGA_MAC_VER_01) &&
1920             (tp->mac_version != RTL_GIGA_MAC_VER_02) &&
1921             (tp->mac_version != RTL_GIGA_MAC_VER_03) &&
1922             (tp->mac_version != RTL_GIGA_MAC_VER_04)) {
1923                 RTL_W8(ChipCmd, CmdTxEnb | CmdRxEnb);
1924                 rtl8169_set_rx_tx_config_registers(tp);
1925         }
1926
1927         RTL_W8(Cfg9346, Cfg9346_Lock);
1928
1929         /* Initially a 10 us delay. Turned it into a PCI commit. - FR */
1930         RTL_R8(IntrMask);
1931
1932         RTL_W32(RxMissed, 0);
1933
1934         rtl8169_set_rx_mode(dev);
1935
1936         /* no early-rx interrupts */
1937         RTL_W16(MultiIntr, RTL_R16(MultiIntr) & 0xF000);
1938
1939         /* Enable all known interrupts by setting the interrupt mask. */
1940         RTL_W16(IntrMask, rtl8169_intr_mask);
1941
1942         netif_start_queue(dev);
1943 }
1944
1945 static int rtl8169_change_mtu(struct net_device *dev, int new_mtu)
1946 {
1947         struct rtl8169_private *tp = netdev_priv(dev);
1948         int ret = 0;
1949
1950         if (new_mtu < ETH_ZLEN || new_mtu > SafeMtu)
1951                 return -EINVAL;
1952
1953         dev->mtu = new_mtu;
1954
1955         if (!netif_running(dev))
1956                 goto out;
1957
1958         rtl8169_down(dev);
1959
1960         rtl8169_set_rxbufsize(tp, dev);
1961
1962         ret = rtl8169_init_ring(dev);
1963         if (ret < 0)
1964                 goto out;
1965
1966         netif_poll_enable(dev);
1967
1968         rtl8169_hw_start(dev);
1969
1970         rtl8169_request_timer(dev);
1971
1972 out:
1973         return ret;
1974 }
1975
1976 static inline void rtl8169_make_unusable_by_asic(struct RxDesc *desc)
1977 {
1978         desc->addr = 0x0badbadbadbadbadull;
1979         desc->opts1 &= ~cpu_to_le32(DescOwn | RsvdMask);
1980 }
1981
1982 static void rtl8169_free_rx_skb(struct rtl8169_private *tp,
1983                                 struct sk_buff **sk_buff, struct RxDesc *desc)
1984 {
1985         struct pci_dev *pdev = tp->pci_dev;
1986
1987         pci_unmap_single(pdev, le64_to_cpu(desc->addr), tp->rx_buf_sz,
1988                          PCI_DMA_FROMDEVICE);
1989         dev_kfree_skb(*sk_buff);
1990         *sk_buff = NULL;
1991         rtl8169_make_unusable_by_asic(desc);
1992 }
1993
1994 static inline void rtl8169_mark_to_asic(struct RxDesc *desc, u32 rx_buf_sz)
1995 {
1996         u32 eor = le32_to_cpu(desc->opts1) & RingEnd;
1997
1998         desc->opts1 = cpu_to_le32(DescOwn | eor | rx_buf_sz);
1999 }
2000
2001 static inline void rtl8169_map_to_asic(struct RxDesc *desc, dma_addr_t mapping,
2002                                        u32 rx_buf_sz)
2003 {
2004         desc->addr = cpu_to_le64(mapping);
2005         wmb();
2006         rtl8169_mark_to_asic(desc, rx_buf_sz);
2007 }
2008
2009 static int rtl8169_alloc_rx_skb(struct pci_dev *pdev, struct sk_buff **sk_buff,
2010                                 struct RxDesc *desc, int rx_buf_sz,
2011                                 unsigned int align)
2012 {
2013         struct sk_buff *skb;
2014         dma_addr_t mapping;
2015         int ret = 0;
2016
2017         skb = dev_alloc_skb(rx_buf_sz + align);
2018         if (!skb)
2019                 goto err_out;
2020
2021         skb_reserve(skb, align);
2022         *sk_buff = skb;
2023
2024         mapping = pci_map_single(pdev, skb->data, rx_buf_sz,
2025                                  PCI_DMA_FROMDEVICE);
2026
2027         rtl8169_map_to_asic(desc, mapping, rx_buf_sz);
2028
2029 out:
2030         return ret;
2031
2032 err_out:
2033         ret = -ENOMEM;
2034         rtl8169_make_unusable_by_asic(desc);
2035         goto out;
2036 }
2037
2038 static void rtl8169_rx_clear(struct rtl8169_private *tp)
2039 {
2040         int i;
2041
2042         for (i = 0; i < NUM_RX_DESC; i++) {
2043                 if (tp->Rx_skbuff[i]) {
2044                         rtl8169_free_rx_skb(tp, tp->Rx_skbuff + i,
2045                                             tp->RxDescArray + i);
2046                 }
2047         }
2048 }
2049
2050 static u32 rtl8169_rx_fill(struct rtl8169_private *tp, struct net_device *dev,
2051                            u32 start, u32 end)
2052 {
2053         u32 cur;
2054
2055         for (cur = start; end - cur > 0; cur++) {
2056                 int ret, i = cur % NUM_RX_DESC;
2057
2058                 if (tp->Rx_skbuff[i])
2059                         continue;
2060
2061                 ret = rtl8169_alloc_rx_skb(tp->pci_dev, tp->Rx_skbuff + i,
2062                         tp->RxDescArray + i, tp->rx_buf_sz, tp->align);
2063                 if (ret < 0)
2064                         break;
2065         }
2066         return cur - start;
2067 }
2068
2069 static inline void rtl8169_mark_as_last_descriptor(struct RxDesc *desc)
2070 {
2071         desc->opts1 |= cpu_to_le32(RingEnd);
2072 }
2073
2074 static void rtl8169_init_ring_indexes(struct rtl8169_private *tp)
2075 {
2076         tp->dirty_tx = tp->dirty_rx = tp->cur_tx = tp->cur_rx = 0;
2077 }
2078
2079 static int rtl8169_init_ring(struct net_device *dev)
2080 {
2081         struct rtl8169_private *tp = netdev_priv(dev);
2082
2083         rtl8169_init_ring_indexes(tp);
2084
2085         memset(tp->tx_skb, 0x0, NUM_TX_DESC * sizeof(struct ring_info));
2086         memset(tp->Rx_skbuff, 0x0, NUM_RX_DESC * sizeof(struct sk_buff *));
2087
2088         if (rtl8169_rx_fill(tp, dev, 0, NUM_RX_DESC) != NUM_RX_DESC)
2089                 goto err_out;
2090
2091         rtl8169_mark_as_last_descriptor(tp->RxDescArray + NUM_RX_DESC - 1);
2092
2093         return 0;
2094
2095 err_out:
2096         rtl8169_rx_clear(tp);
2097         return -ENOMEM;
2098 }
2099
2100 static void rtl8169_unmap_tx_skb(struct pci_dev *pdev, struct ring_info *tx_skb,
2101                                  struct TxDesc *desc)
2102 {
2103         unsigned int len = tx_skb->len;
2104
2105         pci_unmap_single(pdev, le64_to_cpu(desc->addr), len, PCI_DMA_TODEVICE);
2106         desc->opts1 = 0x00;
2107         desc->opts2 = 0x00;
2108         desc->addr = 0x00;
2109         tx_skb->len = 0;
2110 }
2111
2112 static void rtl8169_tx_clear(struct rtl8169_private *tp)
2113 {
2114         unsigned int i;
2115
2116         for (i = tp->dirty_tx; i < tp->dirty_tx + NUM_TX_DESC; i++) {
2117                 unsigned int entry = i % NUM_TX_DESC;
2118                 struct ring_info *tx_skb = tp->tx_skb + entry;
2119                 unsigned int len = tx_skb->len;
2120
2121                 if (len) {
2122                         struct sk_buff *skb = tx_skb->skb;
2123
2124                         rtl8169_unmap_tx_skb(tp->pci_dev, tx_skb,
2125                                              tp->TxDescArray + entry);
2126                         if (skb) {
2127                                 dev_kfree_skb(skb);
2128                                 tx_skb->skb = NULL;
2129                         }
2130                         tp->stats.tx_dropped++;
2131                 }
2132         }
2133         tp->cur_tx = tp->dirty_tx = 0;
2134 }
2135
2136 static void rtl8169_schedule_work(struct net_device *dev, void (*task)(void *))
2137 {
2138         struct rtl8169_private *tp = netdev_priv(dev);
2139
2140         PREPARE_WORK(&tp->task, task, dev);
2141         schedule_delayed_work(&tp->task, 4);
2142 }
2143
2144 static void rtl8169_wait_for_quiescence(struct net_device *dev)
2145 {
2146         struct rtl8169_private *tp = netdev_priv(dev);
2147         void __iomem *ioaddr = tp->mmio_addr;
2148
2149         synchronize_irq(dev->irq);
2150
2151         /* Wait for any pending NAPI task to complete */
2152         netif_poll_disable(dev);
2153
2154         rtl8169_irq_mask_and_ack(ioaddr);
2155
2156         netif_poll_enable(dev);
2157 }
2158
2159 static void rtl8169_reinit_task(void *_data)
2160 {
2161         struct net_device *dev = _data;
2162         int ret;
2163
2164         if (netif_running(dev)) {
2165                 rtl8169_wait_for_quiescence(dev);
2166                 rtl8169_close(dev);
2167         }
2168
2169         ret = rtl8169_open(dev);
2170         if (unlikely(ret < 0)) {
2171                 if (net_ratelimit()) {
2172                         struct rtl8169_private *tp = netdev_priv(dev);
2173
2174                         if (netif_msg_drv(tp)) {
2175                                 printk(PFX KERN_ERR
2176                                        "%s: reinit failure (status = %d)."
2177                                        " Rescheduling.\n", dev->name, ret);
2178                         }
2179                 }
2180                 rtl8169_schedule_work(dev, rtl8169_reinit_task);
2181         }
2182 }
2183
2184 static void rtl8169_reset_task(void *_data)
2185 {
2186         struct net_device *dev = _data;
2187         struct rtl8169_private *tp = netdev_priv(dev);
2188
2189         if (!netif_running(dev))
2190                 return;
2191
2192         rtl8169_wait_for_quiescence(dev);
2193
2194         rtl8169_rx_interrupt(dev, tp, tp->mmio_addr);
2195         rtl8169_tx_clear(tp);
2196
2197         if (tp->dirty_rx == tp->cur_rx) {
2198                 rtl8169_init_ring_indexes(tp);
2199                 rtl8169_hw_start(dev);
2200                 netif_wake_queue(dev);
2201         } else {
2202                 if (net_ratelimit()) {
2203                         struct rtl8169_private *tp = netdev_priv(dev);
2204
2205                         if (netif_msg_intr(tp)) {
2206                                 printk(PFX KERN_EMERG
2207                                        "%s: Rx buffers shortage\n", dev->name);
2208                         }
2209                 }
2210                 rtl8169_schedule_work(dev, rtl8169_reset_task);
2211         }
2212 }
2213
2214 static void rtl8169_tx_timeout(struct net_device *dev)
2215 {
2216         struct rtl8169_private *tp = netdev_priv(dev);
2217
2218         rtl8169_hw_reset(tp->mmio_addr);
2219
2220         /* Let's wait a bit while any (async) irq lands on */
2221         rtl8169_schedule_work(dev, rtl8169_reset_task);
2222 }
2223
2224 static int rtl8169_xmit_frags(struct rtl8169_private *tp, struct sk_buff *skb,
2225                               u32 opts1)
2226 {
2227         struct skb_shared_info *info = skb_shinfo(skb);
2228         unsigned int cur_frag, entry;
2229         struct TxDesc *txd;
2230
2231         entry = tp->cur_tx;
2232         for (cur_frag = 0; cur_frag < info->nr_frags; cur_frag++) {
2233                 skb_frag_t *frag = info->frags + cur_frag;
2234                 dma_addr_t mapping;
2235                 u32 status, len;
2236                 void *addr;
2237
2238                 entry = (entry + 1) % NUM_TX_DESC;
2239
2240                 txd = tp->TxDescArray + entry;
2241                 len = frag->size;
2242                 addr = ((void *) page_address(frag->page)) + frag->page_offset;
2243                 mapping = pci_map_single(tp->pci_dev, addr, len, PCI_DMA_TODEVICE);
2244
2245                 /* anti gcc 2.95.3 bugware (sic) */
2246                 status = opts1 | len | (RingEnd * !((entry + 1) % NUM_TX_DESC));
2247
2248                 txd->opts1 = cpu_to_le32(status);
2249                 txd->addr = cpu_to_le64(mapping);
2250
2251                 tp->tx_skb[entry].len = len;
2252         }
2253
2254         if (cur_frag) {
2255                 tp->tx_skb[entry].skb = skb;
2256                 txd->opts1 |= cpu_to_le32(LastFrag);
2257         }
2258
2259         return cur_frag;
2260 }
2261
2262 static inline u32 rtl8169_tso_csum(struct sk_buff *skb, struct net_device *dev)
2263 {
2264         if (dev->features & NETIF_F_TSO) {
2265                 u32 mss = skb_shinfo(skb)->gso_size;
2266
2267                 if (mss)
2268                         return LargeSend | ((mss & MSSMask) << MSSShift);
2269         }
2270         if (skb->ip_summed == CHECKSUM_PARTIAL) {
2271                 const struct iphdr *ip = skb->nh.iph;
2272
2273                 if (ip->protocol == IPPROTO_TCP)
2274                         return IPCS | TCPCS;
2275                 else if (ip->protocol == IPPROTO_UDP)
2276                         return IPCS | UDPCS;
2277                 WARN_ON(1);     /* we need a WARN() */
2278         }
2279         return 0;
2280 }
2281
2282 static int rtl8169_start_xmit(struct sk_buff *skb, struct net_device *dev)
2283 {
2284         struct rtl8169_private *tp = netdev_priv(dev);
2285         unsigned int frags, entry = tp->cur_tx % NUM_TX_DESC;
2286         struct TxDesc *txd = tp->TxDescArray + entry;
2287         void __iomem *ioaddr = tp->mmio_addr;
2288         dma_addr_t mapping;
2289         u32 status, len;
2290         u32 opts1;
2291         int ret = NETDEV_TX_OK;
2292
2293         if (unlikely(TX_BUFFS_AVAIL(tp) < skb_shinfo(skb)->nr_frags)) {
2294                 if (netif_msg_drv(tp)) {
2295                         printk(KERN_ERR
2296                                "%s: BUG! Tx Ring full when queue awake!\n",
2297                                dev->name);
2298                 }
2299                 goto err_stop;
2300         }
2301
2302         if (unlikely(le32_to_cpu(txd->opts1) & DescOwn))
2303                 goto err_stop;
2304
2305         opts1 = DescOwn | rtl8169_tso_csum(skb, dev);
2306
2307         frags = rtl8169_xmit_frags(tp, skb, opts1);
2308         if (frags) {
2309                 len = skb_headlen(skb);
2310                 opts1 |= FirstFrag;
2311         } else {
2312                 len = skb->len;
2313
2314                 if (unlikely(len < ETH_ZLEN)) {
2315                         if (skb_padto(skb, ETH_ZLEN))
2316                                 goto err_update_stats;
2317                         len = ETH_ZLEN;
2318                 }
2319
2320                 opts1 |= FirstFrag | LastFrag;
2321                 tp->tx_skb[entry].skb = skb;
2322         }
2323
2324         mapping = pci_map_single(tp->pci_dev, skb->data, len, PCI_DMA_TODEVICE);
2325
2326         tp->tx_skb[entry].len = len;
2327         txd->addr = cpu_to_le64(mapping);
2328         txd->opts2 = cpu_to_le32(rtl8169_tx_vlan_tag(tp, skb));
2329
2330         wmb();
2331
2332         /* anti gcc 2.95.3 bugware (sic) */
2333         status = opts1 | len | (RingEnd * !((entry + 1) % NUM_TX_DESC));
2334         txd->opts1 = cpu_to_le32(status);
2335
2336         dev->trans_start = jiffies;
2337
2338         tp->cur_tx += frags + 1;
2339
2340         smp_wmb();
2341
2342         RTL_W8(TxPoll, 0x40);   /* set polling bit */
2343
2344         if (TX_BUFFS_AVAIL(tp) < MAX_SKB_FRAGS) {
2345                 netif_stop_queue(dev);
2346                 smp_rmb();
2347                 if (TX_BUFFS_AVAIL(tp) >= MAX_SKB_FRAGS)
2348                         netif_wake_queue(dev);
2349         }
2350
2351 out:
2352         return ret;
2353
2354 err_stop:
2355         netif_stop_queue(dev);
2356         ret = NETDEV_TX_BUSY;
2357 err_update_stats:
2358         tp->stats.tx_dropped++;
2359         goto out;
2360 }
2361
2362 static void rtl8169_pcierr_interrupt(struct net_device *dev)
2363 {
2364         struct rtl8169_private *tp = netdev_priv(dev);
2365         struct pci_dev *pdev = tp->pci_dev;
2366         void __iomem *ioaddr = tp->mmio_addr;
2367         u16 pci_status, pci_cmd;
2368
2369         pci_read_config_word(pdev, PCI_COMMAND, &pci_cmd);
2370         pci_read_config_word(pdev, PCI_STATUS, &pci_status);
2371
2372         if (netif_msg_intr(tp)) {
2373                 printk(KERN_ERR
2374                        "%s: PCI error (cmd = 0x%04x, status = 0x%04x).\n",
2375                        dev->name, pci_cmd, pci_status);
2376         }
2377
2378         /*
2379          * The recovery sequence below admits a very elaborated explanation:
2380          * - it seems to work;
2381          * - I did not see what else could be done;
2382          * - it makes iop3xx happy.
2383          *
2384          * Feel free to adjust to your needs.
2385          */
2386         if (ignore_parity_err)
2387                 pci_cmd &= ~PCI_COMMAND_PARITY;
2388         else
2389                 pci_cmd |= PCI_COMMAND_SERR | PCI_COMMAND_PARITY;
2390
2391         pci_write_config_word(pdev, PCI_COMMAND, pci_cmd);
2392
2393         pci_write_config_word(pdev, PCI_STATUS,
2394                 pci_status & (PCI_STATUS_DETECTED_PARITY |
2395                 PCI_STATUS_SIG_SYSTEM_ERROR | PCI_STATUS_REC_MASTER_ABORT |
2396                 PCI_STATUS_REC_TARGET_ABORT | PCI_STATUS_SIG_TARGET_ABORT));
2397
2398         /* The infamous DAC f*ckup only happens at boot time */
2399         if ((tp->cp_cmd & PCIDAC) && !tp->dirty_rx && !tp->cur_rx) {
2400                 if (netif_msg_intr(tp))
2401                         printk(KERN_INFO "%s: disabling PCI DAC.\n", dev->name);
2402                 tp->cp_cmd &= ~PCIDAC;
2403                 RTL_W16(CPlusCmd, tp->cp_cmd);
2404                 dev->features &= ~NETIF_F_HIGHDMA;
2405         }
2406
2407         rtl8169_hw_reset(ioaddr);
2408
2409         rtl8169_schedule_work(dev, rtl8169_reinit_task);
2410 }
2411
2412 static void
2413 rtl8169_tx_interrupt(struct net_device *dev, struct rtl8169_private *tp,
2414                      void __iomem *ioaddr)
2415 {
2416         unsigned int dirty_tx, tx_left;
2417
2418         assert(dev != NULL);
2419         assert(tp != NULL);
2420         assert(ioaddr != NULL);
2421
2422         dirty_tx = tp->dirty_tx;
2423         smp_rmb();
2424         tx_left = tp->cur_tx - dirty_tx;
2425
2426         while (tx_left > 0) {
2427                 unsigned int entry = dirty_tx % NUM_TX_DESC;
2428                 struct ring_info *tx_skb = tp->tx_skb + entry;
2429                 u32 len = tx_skb->len;
2430                 u32 status;
2431
2432                 rmb();
2433                 status = le32_to_cpu(tp->TxDescArray[entry].opts1);
2434                 if (status & DescOwn)
2435                         break;
2436
2437                 tp->stats.tx_bytes += len;
2438                 tp->stats.tx_packets++;
2439
2440                 rtl8169_unmap_tx_skb(tp->pci_dev, tx_skb, tp->TxDescArray + entry);
2441
2442                 if (status & LastFrag) {
2443                         dev_kfree_skb_irq(tx_skb->skb);
2444                         tx_skb->skb = NULL;
2445                 }
2446                 dirty_tx++;
2447                 tx_left--;
2448         }
2449
2450         if (tp->dirty_tx != dirty_tx) {
2451                 tp->dirty_tx = dirty_tx;
2452                 smp_wmb();
2453                 if (netif_queue_stopped(dev) &&
2454                     (TX_BUFFS_AVAIL(tp) >= MAX_SKB_FRAGS)) {
2455                         netif_wake_queue(dev);
2456                 }
2457         }
2458 }
2459
2460 static inline int rtl8169_fragmented_frame(u32 status)
2461 {
2462         return (status & (FirstFrag | LastFrag)) != (FirstFrag | LastFrag);
2463 }
2464
2465 static inline void rtl8169_rx_csum(struct sk_buff *skb, struct RxDesc *desc)
2466 {
2467         u32 opts1 = le32_to_cpu(desc->opts1);
2468         u32 status = opts1 & RxProtoMask;
2469
2470         if (((status == RxProtoTCP) && !(opts1 & TCPFail)) ||
2471             ((status == RxProtoUDP) && !(opts1 & UDPFail)) ||
2472             ((status == RxProtoIP) && !(opts1 & IPFail)))
2473                 skb->ip_summed = CHECKSUM_UNNECESSARY;
2474         else
2475                 skb->ip_summed = CHECKSUM_NONE;
2476 }
2477
2478 static inline int rtl8169_try_rx_copy(struct sk_buff **sk_buff, int pkt_size,
2479                                       struct RxDesc *desc, int rx_buf_sz,
2480                                       unsigned int align)
2481 {
2482         int ret = -1;
2483
2484         if (pkt_size < rx_copybreak) {
2485                 struct sk_buff *skb;
2486
2487                 skb = dev_alloc_skb(pkt_size + align);
2488                 if (skb) {
2489                         skb_reserve(skb, align);
2490                         eth_copy_and_sum(skb, sk_buff[0]->data, pkt_size, 0);
2491                         *sk_buff = skb;
2492                         rtl8169_mark_to_asic(desc, rx_buf_sz);
2493                         ret = 0;
2494                 }
2495         }
2496         return ret;
2497 }
2498
2499 static int
2500 rtl8169_rx_interrupt(struct net_device *dev, struct rtl8169_private *tp,
2501                      void __iomem *ioaddr)
2502 {
2503         unsigned int cur_rx, rx_left;
2504         unsigned int delta, count;
2505
2506         assert(dev != NULL);
2507         assert(tp != NULL);
2508         assert(ioaddr != NULL);
2509
2510         cur_rx = tp->cur_rx;
2511         rx_left = NUM_RX_DESC + tp->dirty_rx - cur_rx;
2512         rx_left = rtl8169_rx_quota(rx_left, (u32) dev->quota);
2513
2514         for (; rx_left > 0; rx_left--, cur_rx++) {
2515                 unsigned int entry = cur_rx % NUM_RX_DESC;
2516                 struct RxDesc *desc = tp->RxDescArray + entry;
2517                 u32 status;
2518
2519                 rmb();
2520                 status = le32_to_cpu(desc->opts1);
2521
2522                 if (status & DescOwn)
2523                         break;
2524                 if (unlikely(status & RxRES)) {
2525                         if (netif_msg_rx_err(tp)) {
2526                                 printk(KERN_INFO
2527                                        "%s: Rx ERROR. status = %08x\n",
2528                                        dev->name, status);
2529                         }
2530                         tp->stats.rx_errors++;
2531                         if (status & (RxRWT | RxRUNT))
2532                                 tp->stats.rx_length_errors++;
2533                         if (status & RxCRC)
2534                                 tp->stats.rx_crc_errors++;
2535                         if (status & RxFOVF) {
2536                                 rtl8169_schedule_work(dev, rtl8169_reset_task);
2537                                 tp->stats.rx_fifo_errors++;
2538                         }
2539                         rtl8169_mark_to_asic(desc, tp->rx_buf_sz);
2540                 } else {
2541                         struct sk_buff *skb = tp->Rx_skbuff[entry];
2542                         int pkt_size = (status & 0x00001FFF) - 4;
2543                         void (*pci_action)(struct pci_dev *, dma_addr_t,
2544                                 size_t, int) = pci_dma_sync_single_for_device;
2545
2546                         /*
2547                          * The driver does not support incoming fragmented
2548                          * frames. They are seen as a symptom of over-mtu
2549                          * sized frames.
2550                          */
2551                         if (unlikely(rtl8169_fragmented_frame(status))) {
2552                                 tp->stats.rx_dropped++;
2553                                 tp->stats.rx_length_errors++;
2554                                 rtl8169_mark_to_asic(desc, tp->rx_buf_sz);
2555                                 continue;
2556                         }
2557
2558                         rtl8169_rx_csum(skb, desc);
2559
2560                         pci_dma_sync_single_for_cpu(tp->pci_dev,
2561                                 le64_to_cpu(desc->addr), tp->rx_buf_sz,
2562                                 PCI_DMA_FROMDEVICE);
2563
2564                         if (rtl8169_try_rx_copy(&skb, pkt_size, desc,
2565                                                 tp->rx_buf_sz, tp->align)) {
2566                                 pci_action = pci_unmap_single;
2567                                 tp->Rx_skbuff[entry] = NULL;
2568                         }
2569
2570                         pci_action(tp->pci_dev, le64_to_cpu(desc->addr),
2571                                    tp->rx_buf_sz, PCI_DMA_FROMDEVICE);
2572
2573                         skb->dev = dev;
2574                         skb_put(skb, pkt_size);
2575                         skb->protocol = eth_type_trans(skb, dev);
2576
2577                         if (rtl8169_rx_vlan_skb(tp, desc, skb) < 0)
2578                                 rtl8169_rx_skb(skb);
2579
2580                         dev->last_rx = jiffies;
2581                         tp->stats.rx_bytes += pkt_size;
2582                         tp->stats.rx_packets++;
2583                 }
2584         }
2585
2586         count = cur_rx - tp->cur_rx;
2587         tp->cur_rx = cur_rx;
2588
2589         delta = rtl8169_rx_fill(tp, dev, tp->dirty_rx, tp->cur_rx);
2590         if (!delta && count && netif_msg_intr(tp))
2591                 printk(KERN_INFO "%s: no Rx buffer allocated\n", dev->name);
2592         tp->dirty_rx += delta;
2593
2594         /*
2595          * FIXME: until there is periodic timer to try and refill the ring,
2596          * a temporary shortage may definitely kill the Rx process.
2597          * - disable the asic to try and avoid an overflow and kick it again
2598          *   after refill ?
2599          * - how do others driver handle this condition (Uh oh...).
2600          */
2601         if ((tp->dirty_rx + NUM_RX_DESC == tp->cur_rx) && netif_msg_intr(tp))
2602                 printk(KERN_EMERG "%s: Rx buffers exhausted\n", dev->name);
2603
2604         return count;
2605 }
2606
2607 /* The interrupt handler does all of the Rx thread work and cleans up after the Tx thread. */
2608 static irqreturn_t
2609 rtl8169_interrupt(int irq, void *dev_instance)
2610 {
2611         struct net_device *dev = (struct net_device *) dev_instance;
2612         struct rtl8169_private *tp = netdev_priv(dev);
2613         int boguscnt = max_interrupt_work;
2614         void __iomem *ioaddr = tp->mmio_addr;
2615         int status;
2616         int handled = 0;
2617
2618         do {
2619                 status = RTL_R16(IntrStatus);
2620
2621                 /* hotplug/major error/no more work/shared irq */
2622                 if ((status == 0xFFFF) || !status)
2623                         break;
2624
2625                 handled = 1;
2626
2627                 if (unlikely(!netif_running(dev))) {
2628                         rtl8169_asic_down(ioaddr);
2629                         goto out;
2630                 }
2631
2632                 status &= tp->intr_mask;
2633                 RTL_W16(IntrStatus,
2634                         (status & RxFIFOOver) ? (status | RxOverflow) : status);
2635
2636                 if (!(status & rtl8169_intr_mask))
2637                         break;
2638
2639                 if (unlikely(status & SYSErr)) {
2640                         rtl8169_pcierr_interrupt(dev);
2641                         break;
2642                 }
2643
2644                 if (status & LinkChg)
2645                         rtl8169_check_link_status(dev, tp, ioaddr);
2646
2647 #ifdef CONFIG_R8169_NAPI
2648                 RTL_W16(IntrMask, rtl8169_intr_mask & ~rtl8169_napi_event);
2649                 tp->intr_mask = ~rtl8169_napi_event;
2650
2651                 if (likely(netif_rx_schedule_prep(dev)))
2652                         __netif_rx_schedule(dev);
2653                 else if (netif_msg_intr(tp)) {
2654                         printk(KERN_INFO "%s: interrupt %04x taken in poll\n",
2655                                dev->name, status);
2656                 }
2657                 break;
2658 #else
2659                 /* Rx interrupt */
2660                 if (status & (RxOK | RxOverflow | RxFIFOOver)) {
2661                         rtl8169_rx_interrupt(dev, tp, ioaddr);
2662                 }
2663                 /* Tx interrupt */
2664                 if (status & (TxOK | TxErr))
2665                         rtl8169_tx_interrupt(dev, tp, ioaddr);
2666 #endif
2667
2668                 boguscnt--;
2669         } while (boguscnt > 0);
2670
2671         if (boguscnt <= 0) {
2672                 if (netif_msg_intr(tp) && net_ratelimit() ) {
2673                         printk(KERN_WARNING
2674                                "%s: Too much work at interrupt!\n", dev->name);
2675                 }
2676                 /* Clear all interrupt sources. */
2677                 RTL_W16(IntrStatus, 0xffff);
2678         }
2679 out:
2680         return IRQ_RETVAL(handled);
2681 }
2682
2683 #ifdef CONFIG_R8169_NAPI
2684 static int rtl8169_poll(struct net_device *dev, int *budget)
2685 {
2686         unsigned int work_done, work_to_do = min(*budget, dev->quota);
2687         struct rtl8169_private *tp = netdev_priv(dev);
2688         void __iomem *ioaddr = tp->mmio_addr;
2689
2690         work_done = rtl8169_rx_interrupt(dev, tp, ioaddr);
2691         rtl8169_tx_interrupt(dev, tp, ioaddr);
2692
2693         *budget -= work_done;
2694         dev->quota -= work_done;
2695
2696         if (work_done < work_to_do) {
2697                 netif_rx_complete(dev);
2698                 tp->intr_mask = 0xffff;
2699                 /*
2700                  * 20040426: the barrier is not strictly required but the
2701                  * behavior of the irq handler could be less predictable
2702                  * without it. Btw, the lack of flush for the posted pci
2703                  * write is safe - FR
2704                  */
2705                 smp_wmb();
2706                 RTL_W16(IntrMask, rtl8169_intr_mask);
2707         }
2708
2709         return (work_done >= work_to_do);
2710 }
2711 #endif
2712
2713 static void rtl8169_down(struct net_device *dev)
2714 {
2715         struct rtl8169_private *tp = netdev_priv(dev);
2716         void __iomem *ioaddr = tp->mmio_addr;
2717         unsigned int poll_locked = 0;
2718         unsigned int intrmask;
2719
2720         rtl8169_delete_timer(dev);
2721
2722         netif_stop_queue(dev);
2723
2724         flush_scheduled_work();
2725
2726 core_down:
2727         spin_lock_irq(&tp->lock);
2728
2729         rtl8169_asic_down(ioaddr);
2730
2731         /* Update the error counts. */
2732         tp->stats.rx_missed_errors += RTL_R32(RxMissed);
2733         RTL_W32(RxMissed, 0);
2734
2735         spin_unlock_irq(&tp->lock);
2736
2737         synchronize_irq(dev->irq);
2738
2739         if (!poll_locked) {
2740                 netif_poll_disable(dev);
2741                 poll_locked++;
2742         }
2743
2744         /* Give a racing hard_start_xmit a few cycles to complete. */
2745         synchronize_sched();  /* FIXME: should this be synchronize_irq()? */
2746
2747         /*
2748          * And now for the 50k$ question: are IRQ disabled or not ?
2749          *
2750          * Two paths lead here:
2751          * 1) dev->close
2752          *    -> netif_running() is available to sync the current code and the
2753          *       IRQ handler. See rtl8169_interrupt for details.
2754          * 2) dev->change_mtu
2755          *    -> rtl8169_poll can not be issued again and re-enable the
2756          *       interruptions. Let's simply issue the IRQ down sequence again.
2757          *
2758          * No loop if hotpluged or major error (0xffff).
2759          */
2760         intrmask = RTL_R16(IntrMask);
2761         if (intrmask && (intrmask != 0xffff))
2762                 goto core_down;
2763
2764         rtl8169_tx_clear(tp);
2765
2766         rtl8169_rx_clear(tp);
2767 }
2768
2769 static int rtl8169_close(struct net_device *dev)
2770 {
2771         struct rtl8169_private *tp = netdev_priv(dev);
2772         struct pci_dev *pdev = tp->pci_dev;
2773
2774         rtl8169_down(dev);
2775
2776         free_irq(dev->irq, dev);
2777
2778         netif_poll_enable(dev);
2779
2780         pci_free_consistent(pdev, R8169_RX_RING_BYTES, tp->RxDescArray,
2781                             tp->RxPhyAddr);
2782         pci_free_consistent(pdev, R8169_TX_RING_BYTES, tp->TxDescArray,
2783                             tp->TxPhyAddr);
2784         tp->TxDescArray = NULL;
2785         tp->RxDescArray = NULL;
2786
2787         return 0;
2788 }
2789
2790 static void
2791 rtl8169_set_rx_mode(struct net_device *dev)
2792 {
2793         struct rtl8169_private *tp = netdev_priv(dev);
2794         void __iomem *ioaddr = tp->mmio_addr;
2795         unsigned long flags;
2796         u32 mc_filter[2];       /* Multicast hash filter */
2797         int i, rx_mode;
2798         u32 tmp = 0;
2799
2800         if (dev->flags & IFF_PROMISC) {
2801                 /* Unconditionally log net taps. */
2802                 if (netif_msg_link(tp)) {
2803                         printk(KERN_NOTICE "%s: Promiscuous mode enabled.\n",
2804                                dev->name);
2805                 }
2806                 rx_mode =
2807                     AcceptBroadcast | AcceptMulticast | AcceptMyPhys |
2808                     AcceptAllPhys;
2809                 mc_filter[1] = mc_filter[0] = 0xffffffff;
2810         } else if ((dev->mc_count > multicast_filter_limit)
2811                    || (dev->flags & IFF_ALLMULTI)) {
2812                 /* Too many to filter perfectly -- accept all multicasts. */
2813                 rx_mode = AcceptBroadcast | AcceptMulticast | AcceptMyPhys;
2814                 mc_filter[1] = mc_filter[0] = 0xffffffff;
2815         } else {
2816                 struct dev_mc_list *mclist;
2817                 rx_mode = AcceptBroadcast | AcceptMyPhys;
2818                 mc_filter[1] = mc_filter[0] = 0;
2819                 for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count;
2820                      i++, mclist = mclist->next) {
2821                         int bit_nr = ether_crc(ETH_ALEN, mclist->dmi_addr) >> 26;
2822                         mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31);
2823                         rx_mode |= AcceptMulticast;
2824                 }
2825         }
2826
2827         spin_lock_irqsave(&tp->lock, flags);
2828
2829         tmp = rtl8169_rx_config | rx_mode |
2830               (RTL_R32(RxConfig) & rtl_chip_info[tp->chipset].RxConfigMask);
2831
2832         if ((tp->mac_version == RTL_GIGA_MAC_VER_11) ||
2833             (tp->mac_version == RTL_GIGA_MAC_VER_12) ||
2834             (tp->mac_version == RTL_GIGA_MAC_VER_13) ||
2835             (tp->mac_version == RTL_GIGA_MAC_VER_14) ||
2836             (tp->mac_version == RTL_GIGA_MAC_VER_15)) {
2837                 mc_filter[0] = 0xffffffff;
2838                 mc_filter[1] = 0xffffffff;
2839         }
2840
2841         RTL_W32(RxConfig, tmp);
2842         RTL_W32(MAR0 + 0, mc_filter[0]);
2843         RTL_W32(MAR0 + 4, mc_filter[1]);
2844
2845         spin_unlock_irqrestore(&tp->lock, flags);
2846 }
2847
2848 /**
2849  *  rtl8169_get_stats - Get rtl8169 read/write statistics
2850  *  @dev: The Ethernet Device to get statistics for
2851  *
2852  *  Get TX/RX statistics for rtl8169
2853  */
2854 static struct net_device_stats *rtl8169_get_stats(struct net_device *dev)
2855 {
2856         struct rtl8169_private *tp = netdev_priv(dev);
2857         void __iomem *ioaddr = tp->mmio_addr;
2858         unsigned long flags;
2859
2860         if (netif_running(dev)) {
2861                 spin_lock_irqsave(&tp->lock, flags);
2862                 tp->stats.rx_missed_errors += RTL_R32(RxMissed);
2863                 RTL_W32(RxMissed, 0);
2864                 spin_unlock_irqrestore(&tp->lock, flags);
2865         }
2866
2867         return &tp->stats;
2868 }
2869
2870 #ifdef CONFIG_PM
2871
2872 static int rtl8169_suspend(struct pci_dev *pdev, pm_message_t state)
2873 {
2874         struct net_device *dev = pci_get_drvdata(pdev);
2875         struct rtl8169_private *tp = netdev_priv(dev);
2876         void __iomem *ioaddr = tp->mmio_addr;
2877
2878         if (!netif_running(dev))
2879                 goto out;
2880
2881         netif_device_detach(dev);
2882         netif_stop_queue(dev);
2883
2884         spin_lock_irq(&tp->lock);
2885
2886         rtl8169_asic_down(ioaddr);
2887
2888         tp->stats.rx_missed_errors += RTL_R32(RxMissed);
2889         RTL_W32(RxMissed, 0);
2890
2891         spin_unlock_irq(&tp->lock);
2892
2893         pci_save_state(pdev);
2894         pci_enable_wake(pdev, pci_choose_state(pdev, state), tp->wol_enabled);
2895         pci_set_power_state(pdev, pci_choose_state(pdev, state));
2896 out:
2897         return 0;
2898 }
2899
2900 static int rtl8169_resume(struct pci_dev *pdev)
2901 {
2902         struct net_device *dev = pci_get_drvdata(pdev);
2903
2904         if (!netif_running(dev))
2905                 goto out;
2906
2907         netif_device_attach(dev);
2908
2909         pci_set_power_state(pdev, PCI_D0);
2910         pci_restore_state(pdev);
2911         pci_enable_wake(pdev, PCI_D0, 0);
2912
2913         rtl8169_schedule_work(dev, rtl8169_reset_task);
2914 out:
2915         return 0;
2916 }
2917
2918 #endif /* CONFIG_PM */
2919
2920 static struct pci_driver rtl8169_pci_driver = {
2921         .name           = MODULENAME,
2922         .id_table       = rtl8169_pci_tbl,
2923         .probe          = rtl8169_init_one,
2924         .remove         = __devexit_p(rtl8169_remove_one),
2925 #ifdef CONFIG_PM
2926         .suspend        = rtl8169_suspend,
2927         .resume         = rtl8169_resume,
2928 #endif
2929 };
2930
2931 static int __init
2932 rtl8169_init_module(void)
2933 {
2934         return pci_register_driver(&rtl8169_pci_driver);
2935 }
2936
2937 static void __exit
2938 rtl8169_cleanup_module(void)
2939 {
2940         pci_unregister_driver(&rtl8169_pci_driver);
2941 }
2942
2943 module_init(rtl8169_init_module);
2944 module_exit(rtl8169_cleanup_module);