2 * QLogic qlcnic NIC Driver
3 * Copyright (c) 2009-2010 QLogic Corporation
5 * See LICENSE.qlcnic for copyright and licensing details.
11 qlcnic_poll_rsp(struct qlcnic_adapter *adapter)
17 /* give atleast 1ms for firmware to respond */
20 if (++timeout > QLCNIC_OS_CRB_RETRY_COUNT)
21 return QLCNIC_CDRP_RSP_TIMEOUT;
23 rsp = QLCRD32(adapter, QLCNIC_CDRP_CRB_OFFSET);
24 } while (!QLCNIC_CDRP_IS_RSP(rsp));
30 qlcnic_issue_cmd(struct qlcnic_adapter *adapter,
31 u32 pci_fn, u32 version, u32 arg1, u32 arg2, u32 arg3, u32 cmd)
35 u32 rcode = QLCNIC_RCODE_SUCCESS;
36 struct pci_dev *pdev = adapter->pdev;
38 signature = QLCNIC_CDRP_SIGNATURE_MAKE(pci_fn, version);
40 /* Acquire semaphore before accessing CRB */
41 if (qlcnic_api_lock(adapter))
42 return QLCNIC_RCODE_TIMEOUT;
44 QLCWR32(adapter, QLCNIC_SIGN_CRB_OFFSET, signature);
45 QLCWR32(adapter, QLCNIC_ARG1_CRB_OFFSET, arg1);
46 QLCWR32(adapter, QLCNIC_ARG2_CRB_OFFSET, arg2);
47 QLCWR32(adapter, QLCNIC_ARG3_CRB_OFFSET, arg3);
48 QLCWR32(adapter, QLCNIC_CDRP_CRB_OFFSET, QLCNIC_CDRP_FORM_CMD(cmd));
50 rsp = qlcnic_poll_rsp(adapter);
52 if (rsp == QLCNIC_CDRP_RSP_TIMEOUT) {
53 dev_err(&pdev->dev, "card response timeout.\n");
54 rcode = QLCNIC_RCODE_TIMEOUT;
55 } else if (rsp == QLCNIC_CDRP_RSP_FAIL) {
56 rcode = QLCRD32(adapter, QLCNIC_ARG1_CRB_OFFSET);
57 dev_err(&pdev->dev, "failed card response code:0x%x\n",
61 /* Release semaphore */
62 qlcnic_api_unlock(adapter);
67 static uint32_t qlcnic_temp_checksum(uint32_t *temp_buffer, u16 temp_size)
70 int count = temp_size / sizeof(uint32_t);
72 sum += *temp_buffer++;
74 sum = (sum & 0xFFFFFFFF) + (sum >> 32);
78 int qlcnic_fw_cmd_get_minidump_temp(struct qlcnic_adapter *adapter)
83 u32 version, csum, *template, *tmp_buf;
84 struct qlcnic_hardware_context *ahw;
85 struct qlcnic_dump_template_hdr *tmpl_hdr, *tmp_tmpl;
86 dma_addr_t tmp_addr_t = 0;
89 err = qlcnic_issue_cmd(adapter,
90 adapter->ahw->pci_func,
91 adapter->fw_hal_version,
95 QLCNIC_CDRP_CMD_TEMP_SIZE);
96 if (err != QLCNIC_RCODE_SUCCESS) {
97 err = QLCRD32(adapter, QLCNIC_ARG1_CRB_OFFSET);
98 dev_err(&adapter->pdev->dev,
99 "Failed to get template size %d\n", err);
103 version = QLCRD32(adapter, QLCNIC_ARG3_CRB_OFFSET);
104 temp_size = QLCRD32(adapter, QLCNIC_ARG2_CRB_OFFSET);
108 tmp_addr = dma_alloc_coherent(&adapter->pdev->dev, temp_size,
109 &tmp_addr_t, GFP_KERNEL);
111 dev_err(&adapter->pdev->dev,
112 "Can't get memory for FW dump template\n");
115 err = qlcnic_issue_cmd(adapter,
116 adapter->ahw->pci_func,
117 adapter->fw_hal_version,
121 QLCNIC_CDRP_CMD_GET_TEMP_HDR);
123 if (err != QLCNIC_RCODE_SUCCESS) {
124 dev_err(&adapter->pdev->dev,
125 "Failed to get mini dump template header %d\n", err);
129 tmp_tmpl = (struct qlcnic_dump_template_hdr *) tmp_addr;
130 csum = qlcnic_temp_checksum((uint32_t *) tmp_addr, temp_size);
132 dev_err(&adapter->pdev->dev,
133 "Template header checksum validation failed\n");
137 ahw->fw_dump.tmpl_hdr = vzalloc(temp_size);
138 if (!ahw->fw_dump.tmpl_hdr) {
142 tmp_buf = (u32 *) tmp_addr;
143 template = (u32 *) ahw->fw_dump.tmpl_hdr;
144 for (i = 0; i < temp_size/sizeof(u32); i++)
145 *template++ = __le32_to_cpu(*tmp_buf++);
147 tmpl_hdr = ahw->fw_dump.tmpl_hdr;
148 if (tmpl_hdr->cap_mask > QLCNIC_DUMP_MASK_DEF &&
149 tmpl_hdr->cap_mask <= QLCNIC_DUMP_MASK_MAX)
150 tmpl_hdr->drv_cap_mask = tmpl_hdr->cap_mask;
152 tmpl_hdr->drv_cap_mask = QLCNIC_DUMP_MASK_DEF;
154 dma_free_coherent(&adapter->pdev->dev, temp_size, tmp_addr, tmp_addr_t);
159 qlcnic_fw_cmd_set_mtu(struct qlcnic_adapter *adapter, int mtu)
161 struct qlcnic_recv_context *recv_ctx = adapter->recv_ctx;
163 if (recv_ctx->state == QLCNIC_HOST_CTX_STATE_ACTIVE) {
164 if (qlcnic_issue_cmd(adapter,
165 adapter->ahw->pci_func,
166 adapter->fw_hal_version,
167 recv_ctx->context_id,
170 QLCNIC_CDRP_CMD_SET_MTU)) {
172 dev_err(&adapter->pdev->dev, "Failed to set mtu\n");
181 qlcnic_fw_cmd_create_rx_ctx(struct qlcnic_adapter *adapter)
184 struct qlcnic_hostrq_rx_ctx *prq;
185 struct qlcnic_cardrsp_rx_ctx *prsp;
186 struct qlcnic_hostrq_rds_ring *prq_rds;
187 struct qlcnic_hostrq_sds_ring *prq_sds;
188 struct qlcnic_cardrsp_rds_ring *prsp_rds;
189 struct qlcnic_cardrsp_sds_ring *prsp_sds;
190 struct qlcnic_host_rds_ring *rds_ring;
191 struct qlcnic_host_sds_ring *sds_ring;
193 dma_addr_t hostrq_phys_addr, cardrsp_phys_addr;
196 u8 i, nrds_rings, nsds_rings;
197 size_t rq_size, rsp_size;
198 u32 cap, reg, val, reg2;
201 struct qlcnic_recv_context *recv_ctx = adapter->recv_ctx;
203 nrds_rings = adapter->max_rds_rings;
204 nsds_rings = adapter->max_sds_rings;
207 SIZEOF_HOSTRQ_RX(struct qlcnic_hostrq_rx_ctx, nrds_rings,
210 SIZEOF_CARDRSP_RX(struct qlcnic_cardrsp_rx_ctx, nrds_rings,
213 addr = dma_alloc_coherent(&adapter->pdev->dev, rq_size,
214 &hostrq_phys_addr, GFP_KERNEL);
217 prq = (struct qlcnic_hostrq_rx_ctx *)addr;
219 addr = dma_alloc_coherent(&adapter->pdev->dev, rsp_size,
220 &cardrsp_phys_addr, GFP_KERNEL);
225 prsp = (struct qlcnic_cardrsp_rx_ctx *)addr;
227 prq->host_rsp_dma_addr = cpu_to_le64(cardrsp_phys_addr);
229 cap = (QLCNIC_CAP0_LEGACY_CONTEXT | QLCNIC_CAP0_LEGACY_MN
230 | QLCNIC_CAP0_VALIDOFF);
231 cap |= (QLCNIC_CAP0_JUMBO_CONTIGUOUS | QLCNIC_CAP0_LRO_CONTIGUOUS);
233 prq->valid_field_offset = offsetof(struct qlcnic_hostrq_rx_ctx,
235 prq->txrx_sds_binding = nsds_rings - 1;
237 prq->capabilities[0] = cpu_to_le32(cap);
238 prq->host_int_crb_mode =
239 cpu_to_le32(QLCNIC_HOST_INT_CRB_MODE_SHARED);
240 prq->host_rds_crb_mode =
241 cpu_to_le32(QLCNIC_HOST_RDS_CRB_MODE_UNIQUE);
243 prq->num_rds_rings = cpu_to_le16(nrds_rings);
244 prq->num_sds_rings = cpu_to_le16(nsds_rings);
245 prq->rds_ring_offset = 0;
247 val = le32_to_cpu(prq->rds_ring_offset) +
248 (sizeof(struct qlcnic_hostrq_rds_ring) * nrds_rings);
249 prq->sds_ring_offset = cpu_to_le32(val);
251 prq_rds = (struct qlcnic_hostrq_rds_ring *)(prq->data +
252 le32_to_cpu(prq->rds_ring_offset));
254 for (i = 0; i < nrds_rings; i++) {
256 rds_ring = &recv_ctx->rds_rings[i];
257 rds_ring->producer = 0;
259 prq_rds[i].host_phys_addr = cpu_to_le64(rds_ring->phys_addr);
260 prq_rds[i].ring_size = cpu_to_le32(rds_ring->num_desc);
261 prq_rds[i].ring_kind = cpu_to_le32(i);
262 prq_rds[i].buff_size = cpu_to_le64(rds_ring->dma_size);
265 prq_sds = (struct qlcnic_hostrq_sds_ring *)(prq->data +
266 le32_to_cpu(prq->sds_ring_offset));
268 for (i = 0; i < nsds_rings; i++) {
270 sds_ring = &recv_ctx->sds_rings[i];
271 sds_ring->consumer = 0;
272 memset(sds_ring->desc_head, 0, STATUS_DESC_RINGSIZE(sds_ring));
274 prq_sds[i].host_phys_addr = cpu_to_le64(sds_ring->phys_addr);
275 prq_sds[i].ring_size = cpu_to_le32(sds_ring->num_desc);
276 prq_sds[i].msi_index = cpu_to_le16(i);
279 phys_addr = hostrq_phys_addr;
280 err = qlcnic_issue_cmd(adapter,
281 adapter->ahw->pci_func,
282 adapter->fw_hal_version,
283 (u32)(phys_addr >> 32),
284 (u32)(phys_addr & 0xffffffff),
286 QLCNIC_CDRP_CMD_CREATE_RX_CTX);
288 dev_err(&adapter->pdev->dev,
289 "Failed to create rx ctx in firmware%d\n", err);
294 prsp_rds = ((struct qlcnic_cardrsp_rds_ring *)
295 &prsp->data[le32_to_cpu(prsp->rds_ring_offset)]);
297 for (i = 0; i < le16_to_cpu(prsp->num_rds_rings); i++) {
298 rds_ring = &recv_ctx->rds_rings[i];
300 reg = le32_to_cpu(prsp_rds[i].host_producer_crb);
301 rds_ring->crb_rcv_producer = adapter->ahw->pci_base0 + reg;
304 prsp_sds = ((struct qlcnic_cardrsp_sds_ring *)
305 &prsp->data[le32_to_cpu(prsp->sds_ring_offset)]);
307 for (i = 0; i < le16_to_cpu(prsp->num_sds_rings); i++) {
308 sds_ring = &recv_ctx->sds_rings[i];
310 reg = le32_to_cpu(prsp_sds[i].host_consumer_crb);
311 reg2 = le32_to_cpu(prsp_sds[i].interrupt_crb);
313 sds_ring->crb_sts_consumer = adapter->ahw->pci_base0 + reg;
314 sds_ring->crb_intr_mask = adapter->ahw->pci_base0 + reg2;
317 recv_ctx->state = le32_to_cpu(prsp->host_ctx_state);
318 recv_ctx->context_id = le16_to_cpu(prsp->context_id);
319 recv_ctx->virt_port = prsp->virt_port;
322 dma_free_coherent(&adapter->pdev->dev, rsp_size, prsp,
325 dma_free_coherent(&adapter->pdev->dev, rq_size, prq, hostrq_phys_addr);
330 qlcnic_fw_cmd_destroy_rx_ctx(struct qlcnic_adapter *adapter)
332 struct qlcnic_recv_context *recv_ctx = adapter->recv_ctx;
334 if (qlcnic_issue_cmd(adapter,
335 adapter->ahw->pci_func,
336 adapter->fw_hal_version,
337 recv_ctx->context_id,
338 QLCNIC_DESTROY_CTX_RESET,
340 QLCNIC_CDRP_CMD_DESTROY_RX_CTX)) {
342 dev_err(&adapter->pdev->dev,
343 "Failed to destroy rx ctx in firmware\n");
346 recv_ctx->state = QLCNIC_HOST_CTX_STATE_FREED;
350 qlcnic_fw_cmd_create_tx_ctx(struct qlcnic_adapter *adapter)
352 struct qlcnic_hostrq_tx_ctx *prq;
353 struct qlcnic_hostrq_cds_ring *prq_cds;
354 struct qlcnic_cardrsp_tx_ctx *prsp;
355 void *rq_addr, *rsp_addr;
356 size_t rq_size, rsp_size;
360 dma_addr_t rq_phys_addr, rsp_phys_addr;
361 struct qlcnic_host_tx_ring *tx_ring = adapter->tx_ring;
363 /* reset host resources */
364 tx_ring->producer = 0;
365 tx_ring->sw_consumer = 0;
366 *(tx_ring->hw_consumer) = 0;
368 rq_size = SIZEOF_HOSTRQ_TX(struct qlcnic_hostrq_tx_ctx);
369 rq_addr = dma_alloc_coherent(&adapter->pdev->dev, rq_size,
370 &rq_phys_addr, GFP_KERNEL);
374 rsp_size = SIZEOF_CARDRSP_TX(struct qlcnic_cardrsp_tx_ctx);
375 rsp_addr = dma_alloc_coherent(&adapter->pdev->dev, rsp_size,
376 &rsp_phys_addr, GFP_KERNEL);
382 memset(rq_addr, 0, rq_size);
383 prq = (struct qlcnic_hostrq_tx_ctx *)rq_addr;
385 memset(rsp_addr, 0, rsp_size);
386 prsp = (struct qlcnic_cardrsp_tx_ctx *)rsp_addr;
388 prq->host_rsp_dma_addr = cpu_to_le64(rsp_phys_addr);
390 temp = (QLCNIC_CAP0_LEGACY_CONTEXT | QLCNIC_CAP0_LEGACY_MN |
392 prq->capabilities[0] = cpu_to_le32(temp);
394 prq->host_int_crb_mode =
395 cpu_to_le32(QLCNIC_HOST_INT_CRB_MODE_SHARED);
397 prq->interrupt_ctl = 0;
399 prq->cmd_cons_dma_addr = cpu_to_le64(tx_ring->hw_cons_phys_addr);
401 prq_cds = &prq->cds_ring;
403 prq_cds->host_phys_addr = cpu_to_le64(tx_ring->phys_addr);
404 prq_cds->ring_size = cpu_to_le32(tx_ring->num_desc);
406 phys_addr = rq_phys_addr;
407 err = qlcnic_issue_cmd(adapter,
408 adapter->ahw->pci_func,
409 adapter->fw_hal_version,
410 (u32)(phys_addr >> 32),
411 ((u32)phys_addr & 0xffffffff),
413 QLCNIC_CDRP_CMD_CREATE_TX_CTX);
415 if (err == QLCNIC_RCODE_SUCCESS) {
416 temp = le32_to_cpu(prsp->cds_ring.host_producer_crb);
417 tx_ring->crb_cmd_producer = adapter->ahw->pci_base0 + temp;
419 adapter->tx_context_id =
420 le16_to_cpu(prsp->context_id);
422 dev_err(&adapter->pdev->dev,
423 "Failed to create tx ctx in firmware%d\n", err);
427 dma_free_coherent(&adapter->pdev->dev, rsp_size, rsp_addr,
431 dma_free_coherent(&adapter->pdev->dev, rq_size, rq_addr, rq_phys_addr);
437 qlcnic_fw_cmd_destroy_tx_ctx(struct qlcnic_adapter *adapter)
439 if (qlcnic_issue_cmd(adapter,
440 adapter->ahw->pci_func,
441 adapter->fw_hal_version,
442 adapter->tx_context_id,
443 QLCNIC_DESTROY_CTX_RESET,
445 QLCNIC_CDRP_CMD_DESTROY_TX_CTX)) {
447 dev_err(&adapter->pdev->dev,
448 "Failed to destroy tx ctx in firmware\n");
453 qlcnic_fw_cmd_set_port(struct qlcnic_adapter *adapter, u32 config)
455 return qlcnic_issue_cmd(adapter,
456 adapter->ahw->pci_func,
457 adapter->fw_hal_version,
461 QLCNIC_CDRP_CMD_CONFIG_PORT);
464 int qlcnic_alloc_hw_resources(struct qlcnic_adapter *adapter)
469 struct qlcnic_recv_context *recv_ctx;
470 struct qlcnic_host_rds_ring *rds_ring;
471 struct qlcnic_host_sds_ring *sds_ring;
472 struct qlcnic_host_tx_ring *tx_ring;
474 struct pci_dev *pdev = adapter->pdev;
476 recv_ctx = adapter->recv_ctx;
477 tx_ring = adapter->tx_ring;
479 tx_ring->hw_consumer = (__le32 *) dma_alloc_coherent(&pdev->dev,
480 sizeof(u32), &tx_ring->hw_cons_phys_addr, GFP_KERNEL);
481 if (tx_ring->hw_consumer == NULL) {
482 dev_err(&pdev->dev, "failed to allocate tx consumer\n");
487 addr = dma_alloc_coherent(&pdev->dev, TX_DESC_RINGSIZE(tx_ring),
488 &tx_ring->phys_addr, GFP_KERNEL);
491 dev_err(&pdev->dev, "failed to allocate tx desc ring\n");
496 tx_ring->desc_head = (struct cmd_desc_type0 *)addr;
498 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
499 rds_ring = &recv_ctx->rds_rings[ring];
500 addr = dma_alloc_coherent(&adapter->pdev->dev,
501 RCV_DESC_RINGSIZE(rds_ring),
502 &rds_ring->phys_addr, GFP_KERNEL);
505 "failed to allocate rds ring [%d]\n", ring);
509 rds_ring->desc_head = (struct rcv_desc *)addr;
513 for (ring = 0; ring < adapter->max_sds_rings; ring++) {
514 sds_ring = &recv_ctx->sds_rings[ring];
516 addr = dma_alloc_coherent(&adapter->pdev->dev,
517 STATUS_DESC_RINGSIZE(sds_ring),
518 &sds_ring->phys_addr, GFP_KERNEL);
521 "failed to allocate sds ring [%d]\n", ring);
525 sds_ring->desc_head = (struct status_desc *)addr;
531 qlcnic_free_hw_resources(adapter);
536 int qlcnic_fw_create_ctx(struct qlcnic_adapter *adapter)
540 if (adapter->flags & QLCNIC_NEED_FLR) {
541 pci_reset_function(adapter->pdev);
542 adapter->flags &= ~QLCNIC_NEED_FLR;
545 err = qlcnic_fw_cmd_create_rx_ctx(adapter);
549 err = qlcnic_fw_cmd_create_tx_ctx(adapter);
551 qlcnic_fw_cmd_destroy_rx_ctx(adapter);
555 set_bit(__QLCNIC_FW_ATTACHED, &adapter->state);
559 void qlcnic_fw_destroy_ctx(struct qlcnic_adapter *adapter)
561 if (test_and_clear_bit(__QLCNIC_FW_ATTACHED, &adapter->state)) {
562 qlcnic_fw_cmd_destroy_rx_ctx(adapter);
563 qlcnic_fw_cmd_destroy_tx_ctx(adapter);
565 /* Allow dma queues to drain after context reset */
570 void qlcnic_free_hw_resources(struct qlcnic_adapter *adapter)
572 struct qlcnic_recv_context *recv_ctx;
573 struct qlcnic_host_rds_ring *rds_ring;
574 struct qlcnic_host_sds_ring *sds_ring;
575 struct qlcnic_host_tx_ring *tx_ring;
578 recv_ctx = adapter->recv_ctx;
580 tx_ring = adapter->tx_ring;
581 if (tx_ring->hw_consumer != NULL) {
582 dma_free_coherent(&adapter->pdev->dev,
584 tx_ring->hw_consumer,
585 tx_ring->hw_cons_phys_addr);
586 tx_ring->hw_consumer = NULL;
589 if (tx_ring->desc_head != NULL) {
590 dma_free_coherent(&adapter->pdev->dev,
591 TX_DESC_RINGSIZE(tx_ring),
592 tx_ring->desc_head, tx_ring->phys_addr);
593 tx_ring->desc_head = NULL;
596 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
597 rds_ring = &recv_ctx->rds_rings[ring];
599 if (rds_ring->desc_head != NULL) {
600 dma_free_coherent(&adapter->pdev->dev,
601 RCV_DESC_RINGSIZE(rds_ring),
603 rds_ring->phys_addr);
604 rds_ring->desc_head = NULL;
608 for (ring = 0; ring < adapter->max_sds_rings; ring++) {
609 sds_ring = &recv_ctx->sds_rings[ring];
611 if (sds_ring->desc_head != NULL) {
612 dma_free_coherent(&adapter->pdev->dev,
613 STATUS_DESC_RINGSIZE(sds_ring),
615 sds_ring->phys_addr);
616 sds_ring->desc_head = NULL;
622 /* Get MAC address of a NIC partition */
623 int qlcnic_get_mac_address(struct qlcnic_adapter *adapter, u8 *mac)
628 arg1 = adapter->ahw->pci_func | BIT_8;
629 err = qlcnic_issue_cmd(adapter,
630 adapter->ahw->pci_func,
631 adapter->fw_hal_version,
635 QLCNIC_CDRP_CMD_MAC_ADDRESS);
637 if (err == QLCNIC_RCODE_SUCCESS)
638 qlcnic_fetch_mac(adapter, QLCNIC_ARG1_CRB_OFFSET,
639 QLCNIC_ARG2_CRB_OFFSET, 0, mac);
641 dev_err(&adapter->pdev->dev,
642 "Failed to get mac address%d\n", err);
649 /* Get info of a NIC partition */
650 int qlcnic_get_nic_info(struct qlcnic_adapter *adapter,
651 struct qlcnic_info *npar_info, u8 func_id)
654 dma_addr_t nic_dma_t;
655 struct qlcnic_info *nic_info;
657 size_t nic_size = sizeof(struct qlcnic_info);
659 nic_info_addr = dma_alloc_coherent(&adapter->pdev->dev, nic_size,
660 &nic_dma_t, GFP_KERNEL);
663 memset(nic_info_addr, 0, nic_size);
665 nic_info = (struct qlcnic_info *) nic_info_addr;
666 err = qlcnic_issue_cmd(adapter,
667 adapter->ahw->pci_func,
668 adapter->fw_hal_version,
671 (func_id << 16 | nic_size),
672 QLCNIC_CDRP_CMD_GET_NIC_INFO);
674 if (err == QLCNIC_RCODE_SUCCESS) {
675 npar_info->pci_func = le16_to_cpu(nic_info->pci_func);
676 npar_info->op_mode = le16_to_cpu(nic_info->op_mode);
677 npar_info->phys_port = le16_to_cpu(nic_info->phys_port);
678 npar_info->switch_mode = le16_to_cpu(nic_info->switch_mode);
679 npar_info->max_tx_ques = le16_to_cpu(nic_info->max_tx_ques);
680 npar_info->max_rx_ques = le16_to_cpu(nic_info->max_rx_ques);
681 npar_info->min_tx_bw = le16_to_cpu(nic_info->min_tx_bw);
682 npar_info->max_tx_bw = le16_to_cpu(nic_info->max_tx_bw);
683 npar_info->capabilities = le32_to_cpu(nic_info->capabilities);
684 npar_info->max_mtu = le16_to_cpu(nic_info->max_mtu);
686 dev_info(&adapter->pdev->dev,
687 "phy port: %d switch_mode: %d,\n"
688 "\tmax_tx_q: %d max_rx_q: %d min_tx_bw: 0x%x,\n"
689 "\tmax_tx_bw: 0x%x max_mtu:0x%x, capabilities: 0x%x\n",
690 npar_info->phys_port, npar_info->switch_mode,
691 npar_info->max_tx_ques, npar_info->max_rx_ques,
692 npar_info->min_tx_bw, npar_info->max_tx_bw,
693 npar_info->max_mtu, npar_info->capabilities);
695 dev_err(&adapter->pdev->dev,
696 "Failed to get nic info%d\n", err);
700 dma_free_coherent(&adapter->pdev->dev, nic_size, nic_info_addr,
705 /* Configure a NIC partition */
706 int qlcnic_set_nic_info(struct qlcnic_adapter *adapter, struct qlcnic_info *nic)
709 dma_addr_t nic_dma_t;
711 struct qlcnic_info *nic_info;
712 size_t nic_size = sizeof(struct qlcnic_info);
714 if (adapter->op_mode != QLCNIC_MGMT_FUNC)
717 nic_info_addr = dma_alloc_coherent(&adapter->pdev->dev, nic_size,
718 &nic_dma_t, GFP_KERNEL);
722 memset(nic_info_addr, 0, nic_size);
723 nic_info = (struct qlcnic_info *)nic_info_addr;
725 nic_info->pci_func = cpu_to_le16(nic->pci_func);
726 nic_info->op_mode = cpu_to_le16(nic->op_mode);
727 nic_info->phys_port = cpu_to_le16(nic->phys_port);
728 nic_info->switch_mode = cpu_to_le16(nic->switch_mode);
729 nic_info->capabilities = cpu_to_le32(nic->capabilities);
730 nic_info->max_mac_filters = nic->max_mac_filters;
731 nic_info->max_tx_ques = cpu_to_le16(nic->max_tx_ques);
732 nic_info->max_rx_ques = cpu_to_le16(nic->max_rx_ques);
733 nic_info->min_tx_bw = cpu_to_le16(nic->min_tx_bw);
734 nic_info->max_tx_bw = cpu_to_le16(nic->max_tx_bw);
736 err = qlcnic_issue_cmd(adapter,
737 adapter->ahw->pci_func,
738 adapter->fw_hal_version,
741 ((nic->pci_func << 16) | nic_size),
742 QLCNIC_CDRP_CMD_SET_NIC_INFO);
744 if (err != QLCNIC_RCODE_SUCCESS) {
745 dev_err(&adapter->pdev->dev,
746 "Failed to set nic info%d\n", err);
750 dma_free_coherent(&adapter->pdev->dev, nic_size, nic_info_addr,
755 /* Get PCI Info of a partition */
756 int qlcnic_get_pci_info(struct qlcnic_adapter *adapter,
757 struct qlcnic_pci_info *pci_info)
760 dma_addr_t pci_info_dma_t;
761 struct qlcnic_pci_info *npar;
763 size_t npar_size = sizeof(struct qlcnic_pci_info);
764 size_t pci_size = npar_size * QLCNIC_MAX_PCI_FUNC;
766 pci_info_addr = dma_alloc_coherent(&adapter->pdev->dev, pci_size,
767 &pci_info_dma_t, GFP_KERNEL);
770 memset(pci_info_addr, 0, pci_size);
772 npar = (struct qlcnic_pci_info *) pci_info_addr;
773 err = qlcnic_issue_cmd(adapter,
774 adapter->ahw->pci_func,
775 adapter->fw_hal_version,
779 QLCNIC_CDRP_CMD_GET_PCI_INFO);
781 if (err == QLCNIC_RCODE_SUCCESS) {
782 for (i = 0; i < QLCNIC_MAX_PCI_FUNC; i++, npar++, pci_info++) {
783 pci_info->id = le16_to_cpu(npar->id);
784 pci_info->active = le16_to_cpu(npar->active);
785 pci_info->type = le16_to_cpu(npar->type);
786 pci_info->default_port =
787 le16_to_cpu(npar->default_port);
788 pci_info->tx_min_bw =
789 le16_to_cpu(npar->tx_min_bw);
790 pci_info->tx_max_bw =
791 le16_to_cpu(npar->tx_max_bw);
792 memcpy(pci_info->mac, npar->mac, ETH_ALEN);
795 dev_err(&adapter->pdev->dev,
796 "Failed to get PCI Info%d\n", err);
800 dma_free_coherent(&adapter->pdev->dev, pci_size, pci_info_addr,
805 /* Configure eSwitch for port mirroring */
806 int qlcnic_config_port_mirroring(struct qlcnic_adapter *adapter, u8 id,
807 u8 enable_mirroring, u8 pci_func)
812 if (adapter->op_mode != QLCNIC_MGMT_FUNC ||
813 !(adapter->eswitch[id].flags & QLCNIC_SWITCH_ENABLE))
816 arg1 = id | (enable_mirroring ? BIT_4 : 0);
817 arg1 |= pci_func << 8;
819 err = qlcnic_issue_cmd(adapter,
820 adapter->ahw->pci_func,
821 adapter->fw_hal_version,
825 QLCNIC_CDRP_CMD_SET_PORTMIRRORING);
827 if (err != QLCNIC_RCODE_SUCCESS) {
828 dev_err(&adapter->pdev->dev,
829 "Failed to configure port mirroring%d on eswitch:%d\n",
832 dev_info(&adapter->pdev->dev,
833 "Configured eSwitch %d for port mirroring:%d\n",
840 int qlcnic_get_port_stats(struct qlcnic_adapter *adapter, const u8 func,
841 const u8 rx_tx, struct __qlcnic_esw_statistics *esw_stats) {
843 size_t stats_size = sizeof(struct __qlcnic_esw_statistics);
844 struct __qlcnic_esw_statistics *stats;
845 dma_addr_t stats_dma_t;
850 if (esw_stats == NULL)
853 if (adapter->op_mode != QLCNIC_MGMT_FUNC &&
854 func != adapter->ahw->pci_func) {
855 dev_err(&adapter->pdev->dev,
856 "Not privilege to query stats for func=%d", func);
860 stats_addr = dma_alloc_coherent(&adapter->pdev->dev, stats_size,
861 &stats_dma_t, GFP_KERNEL);
863 dev_err(&adapter->pdev->dev, "Unable to allocate memory\n");
866 memset(stats_addr, 0, stats_size);
868 arg1 = func | QLCNIC_STATS_VERSION << 8 | QLCNIC_STATS_PORT << 12;
869 arg1 |= rx_tx << 15 | stats_size << 16;
871 err = qlcnic_issue_cmd(adapter,
872 adapter->ahw->pci_func,
873 adapter->fw_hal_version,
877 QLCNIC_CDRP_CMD_GET_ESWITCH_STATS);
880 stats = (struct __qlcnic_esw_statistics *)stats_addr;
881 esw_stats->context_id = le16_to_cpu(stats->context_id);
882 esw_stats->version = le16_to_cpu(stats->version);
883 esw_stats->size = le16_to_cpu(stats->size);
884 esw_stats->multicast_frames =
885 le64_to_cpu(stats->multicast_frames);
886 esw_stats->broadcast_frames =
887 le64_to_cpu(stats->broadcast_frames);
888 esw_stats->unicast_frames = le64_to_cpu(stats->unicast_frames);
889 esw_stats->dropped_frames = le64_to_cpu(stats->dropped_frames);
890 esw_stats->local_frames = le64_to_cpu(stats->local_frames);
891 esw_stats->errors = le64_to_cpu(stats->errors);
892 esw_stats->numbytes = le64_to_cpu(stats->numbytes);
895 dma_free_coherent(&adapter->pdev->dev, stats_size, stats_addr,
900 int qlcnic_get_eswitch_stats(struct qlcnic_adapter *adapter, const u8 eswitch,
901 const u8 rx_tx, struct __qlcnic_esw_statistics *esw_stats) {
903 struct __qlcnic_esw_statistics port_stats;
907 if (esw_stats == NULL)
909 if (adapter->op_mode != QLCNIC_MGMT_FUNC)
911 if (adapter->npars == NULL)
914 memset(esw_stats, 0, sizeof(u64));
915 esw_stats->unicast_frames = QLCNIC_ESW_STATS_NOT_AVAIL;
916 esw_stats->multicast_frames = QLCNIC_ESW_STATS_NOT_AVAIL;
917 esw_stats->broadcast_frames = QLCNIC_ESW_STATS_NOT_AVAIL;
918 esw_stats->dropped_frames = QLCNIC_ESW_STATS_NOT_AVAIL;
919 esw_stats->errors = QLCNIC_ESW_STATS_NOT_AVAIL;
920 esw_stats->local_frames = QLCNIC_ESW_STATS_NOT_AVAIL;
921 esw_stats->numbytes = QLCNIC_ESW_STATS_NOT_AVAIL;
922 esw_stats->context_id = eswitch;
924 for (i = 0; i < QLCNIC_MAX_PCI_FUNC; i++) {
925 if (adapter->npars[i].phy_port != eswitch)
928 memset(&port_stats, 0, sizeof(struct __qlcnic_esw_statistics));
929 if (qlcnic_get_port_stats(adapter, i, rx_tx, &port_stats))
932 esw_stats->size = port_stats.size;
933 esw_stats->version = port_stats.version;
934 QLCNIC_ADD_ESW_STATS(esw_stats->unicast_frames,
935 port_stats.unicast_frames);
936 QLCNIC_ADD_ESW_STATS(esw_stats->multicast_frames,
937 port_stats.multicast_frames);
938 QLCNIC_ADD_ESW_STATS(esw_stats->broadcast_frames,
939 port_stats.broadcast_frames);
940 QLCNIC_ADD_ESW_STATS(esw_stats->dropped_frames,
941 port_stats.dropped_frames);
942 QLCNIC_ADD_ESW_STATS(esw_stats->errors,
944 QLCNIC_ADD_ESW_STATS(esw_stats->local_frames,
945 port_stats.local_frames);
946 QLCNIC_ADD_ESW_STATS(esw_stats->numbytes,
947 port_stats.numbytes);
953 int qlcnic_clear_esw_stats(struct qlcnic_adapter *adapter, const u8 func_esw,
954 const u8 port, const u8 rx_tx)
959 if (adapter->op_mode != QLCNIC_MGMT_FUNC)
962 if (func_esw == QLCNIC_STATS_PORT) {
963 if (port >= QLCNIC_MAX_PCI_FUNC)
965 } else if (func_esw == QLCNIC_STATS_ESWITCH) {
966 if (port >= QLCNIC_NIU_MAX_XG_PORTS)
972 if (rx_tx > QLCNIC_QUERY_TX_COUNTER)
975 arg1 = port | QLCNIC_STATS_VERSION << 8 | func_esw << 12;
976 arg1 |= BIT_14 | rx_tx << 15;
978 return qlcnic_issue_cmd(adapter,
979 adapter->ahw->pci_func,
980 adapter->fw_hal_version,
984 QLCNIC_CDRP_CMD_GET_ESWITCH_STATS);
987 dev_err(&adapter->pdev->dev, "Invalid argument func_esw=%d port=%d"
988 "rx_ctx=%d\n", func_esw, port, rx_tx);
993 __qlcnic_get_eswitch_port_config(struct qlcnic_adapter *adapter,
994 u32 *arg1, u32 *arg2)
998 pci_func = (*arg1 >> 8);
999 err = qlcnic_issue_cmd(adapter,
1000 adapter->ahw->pci_func,
1001 adapter->fw_hal_version,
1005 QLCNIC_CDRP_CMD_GET_ESWITCH_PORT_CONFIG);
1007 if (err == QLCNIC_RCODE_SUCCESS) {
1008 *arg1 = QLCRD32(adapter, QLCNIC_ARG1_CRB_OFFSET);
1009 *arg2 = QLCRD32(adapter, QLCNIC_ARG2_CRB_OFFSET);
1010 dev_info(&adapter->pdev->dev,
1011 "eSwitch port config for pci func %d\n", pci_func);
1013 dev_err(&adapter->pdev->dev,
1014 "Failed to get eswitch port config for pci func %d\n",
1019 /* Configure eSwitch port
1020 op_mode = 0 for setting default port behavior
1021 op_mode = 1 for setting vlan id
1022 op_mode = 2 for deleting vlan id
1023 op_type = 0 for vlan_id
1024 op_type = 1 for port vlan_id
1026 int qlcnic_config_switch_port(struct qlcnic_adapter *adapter,
1027 struct qlcnic_esw_func_cfg *esw_cfg)
1033 if (adapter->op_mode != QLCNIC_MGMT_FUNC)
1035 pci_func = esw_cfg->pci_func;
1036 arg1 = (adapter->npars[pci_func].phy_port & BIT_0);
1037 arg1 |= (pci_func << 8);
1039 if (__qlcnic_get_eswitch_port_config(adapter, &arg1, &arg2))
1041 arg1 &= ~(0x0ff << 8);
1042 arg1 |= (pci_func << 8);
1043 arg1 &= ~(BIT_2 | BIT_3);
1044 switch (esw_cfg->op_mode) {
1045 case QLCNIC_PORT_DEFAULTS:
1046 arg1 |= (BIT_4 | BIT_6 | BIT_7);
1047 arg2 |= (BIT_0 | BIT_1);
1048 if (adapter->capabilities & QLCNIC_FW_CAPABILITY_TSO)
1049 arg2 |= (BIT_2 | BIT_3);
1050 if (!(esw_cfg->discard_tagged))
1052 if (!(esw_cfg->promisc_mode))
1054 if (!(esw_cfg->mac_override))
1056 if (!(esw_cfg->mac_anti_spoof))
1058 if (!(esw_cfg->offload_flags & BIT_0))
1059 arg2 &= ~(BIT_1 | BIT_2 | BIT_3);
1060 if (!(esw_cfg->offload_flags & BIT_1))
1062 if (!(esw_cfg->offload_flags & BIT_2))
1065 case QLCNIC_ADD_VLAN:
1066 arg1 |= (BIT_2 | BIT_5);
1067 arg1 |= (esw_cfg->vlan_id << 16);
1069 case QLCNIC_DEL_VLAN:
1070 arg1 |= (BIT_3 | BIT_5);
1071 arg1 &= ~(0x0ffff << 16);
1077 err = qlcnic_issue_cmd(adapter,
1078 adapter->ahw->pci_func,
1079 adapter->fw_hal_version,
1083 QLCNIC_CDRP_CMD_CONFIGURE_ESWITCH);
1085 if (err != QLCNIC_RCODE_SUCCESS) {
1086 dev_err(&adapter->pdev->dev,
1087 "Failed to configure eswitch pci func %d\n", pci_func);
1089 dev_info(&adapter->pdev->dev,
1090 "Configured eSwitch for pci func %d\n", pci_func);
1097 qlcnic_get_eswitch_port_config(struct qlcnic_adapter *adapter,
1098 struct qlcnic_esw_func_cfg *esw_cfg)
1102 if (adapter->op_mode == QLCNIC_MGMT_FUNC)
1103 phy_port = adapter->npars[esw_cfg->pci_func].phy_port;
1105 phy_port = adapter->physical_port;
1107 arg1 |= (esw_cfg->pci_func << 8);
1108 if (__qlcnic_get_eswitch_port_config(adapter, &arg1, &arg2))
1111 esw_cfg->discard_tagged = !!(arg1 & BIT_4);
1112 esw_cfg->host_vlan_tag = !!(arg1 & BIT_5);
1113 esw_cfg->promisc_mode = !!(arg1 & BIT_6);
1114 esw_cfg->mac_override = !!(arg1 & BIT_7);
1115 esw_cfg->vlan_id = LSW(arg1 >> 16);
1116 esw_cfg->mac_anti_spoof = (arg2 & 0x1);
1117 esw_cfg->offload_flags = ((arg2 >> 1) & 0x7);