2 * Driver for ICPlus PHYs
4 * Copyright (c) 2007 Freescale Semiconductor, Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
12 #include <linux/kernel.h>
13 #include <linux/string.h>
14 #include <linux/errno.h>
15 #include <linux/unistd.h>
16 #include <linux/interrupt.h>
17 #include <linux/init.h>
18 #include <linux/delay.h>
19 #include <linux/netdevice.h>
20 #include <linux/etherdevice.h>
21 #include <linux/skbuff.h>
22 #include <linux/spinlock.h>
24 #include <linux/module.h>
25 #include <linux/mii.h>
26 #include <linux/ethtool.h>
27 #include <linux/phy.h>
31 #include <asm/uaccess.h>
33 MODULE_DESCRIPTION("ICPlus IP175C/IP101A/IC1001 PHY drivers");
34 MODULE_AUTHOR("Michael Barkowski");
35 MODULE_LICENSE("GPL");
38 #define IP10XX_SPEC_CTRL_STATUS 16 /* Spec. Control Register */
39 #define IP1001_SPEC_CTRL_STATUS_2 20 /* IP1001 Spec. Control Reg 2 */
40 #define IP1001_PHASE_SEL_MASK 3 /* IP1001 RX/TXPHASE_SEL */
41 #define IP1001_APS_ON 11 /* IP1001 APS Mode bit */
42 #define IP101A_APS_ON 2 /* IP101A APS Mode bit */
44 static int ip175c_config_init(struct phy_device *phydev)
47 static int full_reset_performed = 0;
49 if (full_reset_performed == 0) {
52 err = mdiobus_write(phydev->bus, 30, 0, 0x175c);
56 /* ensure no bus delays overlap reset period */
57 err = mdiobus_read(phydev->bus, 30, 0);
59 /* data sheet specifies reset period is 2 msec */
62 /* enable IP175C mode */
63 err = mdiobus_write(phydev->bus, 29, 31, 0x175c);
67 /* Set MII0 speed and duplex (in PHY mode) */
68 err = mdiobus_write(phydev->bus, 29, 22, 0x420);
72 /* reset switch ports */
73 for (i = 0; i < 5; i++) {
74 err = mdiobus_write(phydev->bus, i,
75 MII_BMCR, BMCR_RESET);
80 for (i = 0; i < 5; i++)
81 err = mdiobus_read(phydev->bus, i, MII_BMCR);
85 full_reset_performed = 1;
88 if (phydev->addr != 4) {
89 phydev->state = PHY_RUNNING;
90 phydev->speed = SPEED_100;
91 phydev->duplex = DUPLEX_FULL;
93 netif_carrier_on(phydev->attached_dev);
99 static int ip1xx_reset(struct phy_device *phydev)
103 /* Software Reset PHY */
104 bmcr = phy_read(phydev, MII_BMCR);
106 err = phy_write(phydev, MII_BMCR, bmcr);
111 bmcr = phy_read(phydev, MII_BMCR);
112 } while (bmcr & BMCR_RESET);
117 static int ip1001_config_init(struct phy_device *phydev)
121 c = ip1xx_reset(phydev);
125 /* Enable Auto Power Saving mode */
126 c = phy_read(phydev, IP1001_SPEC_CTRL_STATUS_2);
131 if (phydev->interface == PHY_INTERFACE_MODE_RGMII) {
132 /* Additional delay (2ns) used to adjust RX clock phase
133 * at RGMII interface */
134 c = phy_read(phydev, IP10XX_SPEC_CTRL_STATUS);
135 c |= IP1001_PHASE_SEL_MASK;
136 c = phy_write(phydev, IP10XX_SPEC_CTRL_STATUS, c);
142 static int ip101a_config_init(struct phy_device *phydev)
146 c = ip1xx_reset(phydev);
150 /* Enable Auto Power Saving mode */
151 c = phy_read(phydev, IP10XX_SPEC_CTRL_STATUS);
156 static int ip175c_read_status(struct phy_device *phydev)
158 if (phydev->addr == 4) /* WAN port */
159 genphy_read_status(phydev);
161 /* Don't need to read status for switch ports */
162 phydev->irq = PHY_IGNORE_INTERRUPT;
167 static int ip175c_config_aneg(struct phy_device *phydev)
169 if (phydev->addr == 4) /* WAN port */
170 genphy_config_aneg(phydev);
175 static struct phy_driver ip175c_driver = {
176 .phy_id = 0x02430d80,
177 .name = "ICPlus IP175C",
178 .phy_id_mask = 0x0ffffff0,
179 .features = PHY_BASIC_FEATURES,
180 .config_init = &ip175c_config_init,
181 .config_aneg = &ip175c_config_aneg,
182 .read_status = &ip175c_read_status,
183 .suspend = genphy_suspend,
184 .resume = genphy_resume,
185 .driver = { .owner = THIS_MODULE,},
188 static struct phy_driver ip1001_driver = {
189 .phy_id = 0x02430d90,
190 .name = "ICPlus IP1001",
191 .phy_id_mask = 0x0ffffff0,
192 .features = PHY_GBIT_FEATURES | SUPPORTED_Pause |
193 SUPPORTED_Asym_Pause,
194 .config_init = &ip1001_config_init,
195 .config_aneg = &genphy_config_aneg,
196 .read_status = &genphy_read_status,
197 .suspend = genphy_suspend,
198 .resume = genphy_resume,
199 .driver = { .owner = THIS_MODULE,},
202 static struct phy_driver ip101a_driver = {
203 .phy_id = 0x02430c54,
204 .name = "ICPlus IP101A",
205 .phy_id_mask = 0x0ffffff0,
206 .features = PHY_BASIC_FEATURES | SUPPORTED_Pause |
207 SUPPORTED_Asym_Pause,
208 .config_init = &ip101a_config_init,
209 .config_aneg = &genphy_config_aneg,
210 .read_status = &genphy_read_status,
211 .suspend = genphy_suspend,
212 .resume = genphy_resume,
213 .driver = { .owner = THIS_MODULE,},
216 static int __init icplus_init(void)
220 ret = phy_driver_register(&ip1001_driver);
224 ret = phy_driver_register(&ip101a_driver);
228 return phy_driver_register(&ip175c_driver);
231 static void __exit icplus_exit(void)
233 phy_driver_unregister(&ip1001_driver);
234 phy_driver_unregister(&ip101a_driver);
235 phy_driver_unregister(&ip175c_driver);
238 module_init(icplus_init);
239 module_exit(icplus_exit);
241 static struct mdio_device_id __maybe_unused icplus_tbl[] = {
242 { 0x02430d80, 0x0ffffff0 },
243 { 0x02430d90, 0x0ffffff0 },
247 MODULE_DEVICE_TABLE(mdio, icplus_tbl);