drivers/net/pasemi_mac.c

   1 /*
   2  * Copyright (C) 2006-2007 PA Semi, Inc
   3  *
   4  * Driver for the PA Semi PWRficient onchip 1G/10G Ethernet MACs
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9  *
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License
  16  * along with this program; if not, write to the Free Software
  17  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  18  */
  19
  20 #include <linux/init.h>
  21 #include <linux/module.h>
  22 #include <linux/pci.h>
  23 #include <linux/slab.h>
  24 #include <linux/interrupt.h>
  25 #include <linux/dmaengine.h>
  26 #include <linux/delay.h>
  27 #include <linux/netdevice.h>
  28 #include <linux/of_mdio.h>
  29 #include <linux/etherdevice.h>
  30 #include <asm/dma-mapping.h>
  31 #include <linux/in.h>
  32 #include <linux/skbuff.h>
  33
  34 #include <linux/ip.h>
  35 #include <linux/tcp.h>
  36 #include <net/checksum.h>
  37 #include <linux/inet_lro.h>
  38
  39 #include <asm/irq.h>
  40 #include <asm/firmware.h>
  41 #include <asm/pasemi_dma.h>
  42
  43 #include "pasemi_mac.h"
  44
  45 /* We have our own align, since ppc64 in general has it at 0 because
  46  * of design flaws in some of the server bridge chips. However, for
  47  * PWRficient doing the unaligned copies is more expensive than doing
  48  * unaligned DMA, so make sure the data is aligned instead.
  49  */
  50 #define LOCAL_SKB_ALIGN 2
  51
  52 /* TODO list
  53  *
  54  * - Multicast support
  55  * - Large MTU support
  56  * - SW LRO
  57  * - Multiqueue RX/TX
  58  */
  59
  60 #define LRO_MAX_AGGR 64
  61
  62 #define PE_MIN_MTU      64
  63 #define PE_MAX_MTU      9000
  64 #define PE_DEF_MTU      ETH_DATA_LEN
  65
  66 #define DEFAULT_MSG_ENABLE        \
  67         (NETIF_MSG_DRV          | \
  68          NETIF_MSG_PROBE        | \
  69          NETIF_MSG_LINK         | \
  70          NETIF_MSG_TIMER        | \
  71          NETIF_MSG_IFDOWN       | \
  72          NETIF_MSG_IFUP         | \
  73          NETIF_MSG_RX_ERR       | \
  74          NETIF_MSG_TX_ERR)
  75
  76 MODULE_LICENSE("GPL");
  77 MODULE_AUTHOR ("Olof Johansson <olof@lixom.net>");
  78 MODULE_DESCRIPTION("PA Semi PWRficient Ethernet driver");
  79
  80 static int debug = -1;  /* -1 == use DEFAULT_MSG_ENABLE as value */
  81 module_param(debug, int, 0);
  82 MODULE_PARM_DESC(debug, "PA Semi MAC bitmapped debugging message enable value");
  83
  84 extern const struct ethtool_ops pasemi_mac_ethtool_ops;
  85
  86 static int translation_enabled(void)
  87 {
  88 #if defined(CONFIG_PPC_PASEMI_IOMMU_DMA_FORCE)
  89         return 1;
  90 #else
  91         return firmware_has_feature(FW_FEATURE_LPAR);
  92 #endif
  93 }
  94
  95 static void write_iob_reg(unsigned int reg, unsigned int val)
  96 {
  97         pasemi_write_iob_reg(reg, val);
  98 }
  99
 100 static unsigned int read_mac_reg(const struct pasemi_mac *mac, unsigned int reg)
 101 {
 102         return pasemi_read_mac_reg(mac->dma_if, reg);
 103 }
 104
 105 static void write_mac_reg(const struct pasemi_mac *mac, unsigned int reg,
 106                           unsigned int val)
 107 {
 108         pasemi_write_mac_reg(mac->dma_if, reg, val);
 109 }
 110
 111 static unsigned int read_dma_reg(unsigned int reg)
 112 {
 113         return pasemi_read_dma_reg(reg);
 114 }
 115
 116 static void write_dma_reg(unsigned int reg, unsigned int val)
 117 {
 118         pasemi_write_dma_reg(reg, val);
 119 }
 120
 121 static struct pasemi_mac_rxring *rx_ring(const struct pasemi_mac *mac)
 122 {
 123         return mac->rx;
 124 }
 125
 126 static struct pasemi_mac_txring *tx_ring(const struct pasemi_mac *mac)
 127 {
 128         return mac->tx;
 129 }
 130
 131 static inline void prefetch_skb(const struct sk_buff *skb)
 132 {
 133         const void *d = skb;
 134
 135         prefetch(d);
 136         prefetch(d+64);
 137         prefetch(d+128);
 138         prefetch(d+192);
 139 }
 140
 141 static int mac_to_intf(struct pasemi_mac *mac)
 142 {
 143         struct pci_dev *pdev = mac->pdev;
 144         u32 tmp;
 145         int nintf, off, i, j;
 146         int devfn = pdev->devfn;
 147
 148         tmp = read_dma_reg(PAS_DMA_CAP_IFI);
 149         nintf = (tmp & PAS_DMA_CAP_IFI_NIN_M) >> PAS_DMA_CAP_IFI_NIN_S;
 150         off = (tmp & PAS_DMA_CAP_IFI_IOFF_M) >> PAS_DMA_CAP_IFI_IOFF_S;
 151
 152         /* IOFF contains the offset to the registers containing the
 153          * DMA interface-to-MAC-pci-id mappings, and NIN contains number
 154          * of total interfaces. Each register contains 4 devfns.
 155          * Just do a linear search until we find the devfn of the MAC
 156          * we're trying to look up.
 157          */
 158
 159         for (i = 0; i < (nintf+3)/4; i++) {
 160                 tmp = read_dma_reg(off+4*i);
 161                 for (j = 0; j < 4; j++) {
 162                         if (((tmp >> (8*j)) & 0xff) == devfn)
 163                                 return i*4 + j;
 164                 }
 165         }
 166         return -1;
 167 }
 168
 169 static void pasemi_mac_intf_disable(struct pasemi_mac *mac)
 170 {
 171         unsigned int flags;
 172
 173         flags = read_mac_reg(mac, PAS_MAC_CFG_PCFG);
 174         flags &= ~PAS_MAC_CFG_PCFG_PE;
 175         write_mac_reg(mac, PAS_MAC_CFG_PCFG, flags);
 176 }
 177
 178 static void pasemi_mac_intf_enable(struct pasemi_mac *mac)
 179 {
 180         unsigned int flags;
 181
 182         flags = read_mac_reg(mac, PAS_MAC_CFG_PCFG);
 183         flags |= PAS_MAC_CFG_PCFG_PE;
 184         write_mac_reg(mac, PAS_MAC_CFG_PCFG, flags);
 185 }
 186
 187 static int pasemi_get_mac_addr(struct pasemi_mac *mac)
 188 {
 189         struct pci_dev *pdev = mac->pdev;
 190         struct device_node *dn = pci_device_to_OF_node(pdev);
 191         int len;
 192         const u8 *maddr;
 193         u8 addr[6];
 194
 195         if (!dn) {
 196                 dev_dbg(&pdev->dev,
 197                           "No device node for mac, not configuring\n");
 198                 return -ENOENT;
 199         }
 200
 201         maddr = of_get_property(dn, "local-mac-address", &len);
 202
 203         if (maddr && len == 6) {
 204                 memcpy(mac->mac_addr, maddr, 6);
 205                 return 0;
 206         }
 207
 208         /* Some old versions of firmware mistakenly uses mac-address
 209          * (and as a string) instead of a byte array in local-mac-address.
 210          */
 211
 212         if (maddr == NULL)
 213                 maddr = of_get_property(dn, "mac-address", NULL);
 214
 215         if (maddr == NULL) {
 216                 dev_warn(&pdev->dev,
 217                          "no mac address in device tree, not configuring\n");
 218                 return -ENOENT;
 219         }
 220
 221         if (sscanf(maddr, "%hhx:%hhx:%hhx:%hhx:%hhx:%hhx", &addr[0],
 222                    &addr[1], &addr[2], &addr[3], &addr[4], &addr[5]) != 6) {
 223                 dev_warn(&pdev->dev,
 224                          "can't parse mac address, not configuring\n");
 225                 return -EINVAL;
 226         }
 227
 228         memcpy(mac->mac_addr, addr, 6);
 229
 230         return 0;
 231 }
 232
 233 static int pasemi_mac_set_mac_addr(struct net_device *dev, void *p)
 234 {
 235         struct pasemi_mac *mac = netdev_priv(dev);
 236         struct sockaddr *addr = p;
 237         unsigned int adr0, adr1;
 238
 239         if (!is_valid_ether_addr(addr->sa_data))
 240                 return -EINVAL;
 241
 242         memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
 243
 244         adr0 = dev->dev_addr[2] << 24 |
 245                dev->dev_addr[3] << 16 |
 246                dev->dev_addr[4] << 8 |
 247                dev->dev_addr[5];
 248         adr1 = read_mac_reg(mac, PAS_MAC_CFG_ADR1);
 249         adr1 &= ~0xffff;
 250         adr1 |= dev->dev_addr[0] << 8 | dev->dev_addr[1];
 251
 252         pasemi_mac_intf_disable(mac);
 253         write_mac_reg(mac, PAS_MAC_CFG_ADR0, adr0);
 254         write_mac_reg(mac, PAS_MAC_CFG_ADR1, adr1);
 255         pasemi_mac_intf_enable(mac);
 256
 257         return 0;
 258 }
 259
 260 static int get_skb_hdr(struct sk_buff *skb, void **iphdr,
 261                        void **tcph, u64 *hdr_flags, void *data)
 262 {
 263         u64 macrx = (u64) data;
 264         unsigned int ip_len;
 265         struct iphdr *iph;
 266
 267         /* IPv4 header checksum failed */
 268         if ((macrx & XCT_MACRX_HTY_M) != XCT_MACRX_HTY_IPV4_OK)
 269                 return -1;
 270
 271         /* non tcp packet */
 272         skb_reset_network_header(skb);
 273         iph = ip_hdr(skb);
 274         if (iph->protocol != IPPROTO_TCP)
 275                 return -1;
 276
 277         ip_len = ip_hdrlen(skb);
 278         skb_set_transport_header(skb, ip_len);
 279         *tcph = tcp_hdr(skb);
 280
 281         /* check if ip header and tcp header are complete */
 282         if (ntohs(iph->tot_len) < ip_len + tcp_hdrlen(skb))
 283                 return -1;
 284
 285         *hdr_flags = LRO_IPV4 | LRO_TCP;
 286         *iphdr = iph;
 287
 288         return 0;
 289 }
 290
 291 static int pasemi_mac_unmap_tx_skb(struct pasemi_mac *mac,
 292                                     const int nfrags,
 293                                     struct sk_buff *skb,
 294                                     const dma_addr_t *dmas)
 295 {
 296         int f;
 297         struct pci_dev *pdev = mac->dma_pdev;
 298
 299         pci_unmap_single(pdev, dmas[0], skb_headlen(skb), PCI_DMA_TODEVICE);
 300
 301         for (f = 0; f < nfrags; f++) {
 302                 skb_frag_t *frag = &skb_shinfo(skb)->frags[f];
 303
 304                 pci_unmap_page(pdev, dmas[f+1], frag->size, PCI_DMA_TODEVICE);
 305         }
 306         dev_kfree_skb_irq(skb);
 307
 308         /* Freed descriptor slot + main SKB ptr + nfrags additional ptrs,
 309          * aligned up to a power of 2
 310          */
 311         return (nfrags + 3) & ~1;
 312 }
 313
 314 static struct pasemi_mac_csring *pasemi_mac_setup_csring(struct pasemi_mac *mac)
 315 {
 316         struct pasemi_mac_csring *ring;
 317         u32 val;
 318         unsigned int cfg;
 319         int chno;
 320
 321         ring = pasemi_dma_alloc_chan(TXCHAN, sizeof(struct pasemi_mac_csring),
 322                                        offsetof(struct pasemi_mac_csring, chan));
 323
 324         if (!ring) {
 325                 dev_err(&mac->pdev->dev, "Can't allocate checksum channel\n");
 326                 goto out_chan;
 327         }
 328
 329         chno = ring->chan.chno;
 330
 331         ring->size = CS_RING_SIZE;
 332         ring->next_to_fill = 0;
 333
 334         /* Allocate descriptors */
 335         if (pasemi_dma_alloc_ring(&ring->chan, CS_RING_SIZE))
 336                 goto out_ring_desc;
 337
 338         write_dma_reg(PAS_DMA_TXCHAN_BASEL(chno),
 339                       PAS_DMA_TXCHAN_BASEL_BRBL(ring->chan.ring_dma));
 340         val = PAS_DMA_TXCHAN_BASEU_BRBH(ring->chan.ring_dma >> 32);
 341         val |= PAS_DMA_TXCHAN_BASEU_SIZ(CS_RING_SIZE >> 3);
 342
 343         write_dma_reg(PAS_DMA_TXCHAN_BASEU(chno), val);
 344
 345         ring->events[0] = pasemi_dma_alloc_flag();
 346         ring->events[1] = pasemi_dma_alloc_flag();
 347         if (ring->events[0] < 0 || ring->events[1] < 0)
 348                 goto out_flags;
 349
 350         pasemi_dma_clear_flag(ring->events[0]);
 351         pasemi_dma_clear_flag(ring->events[1]);
 352
 353         ring->fun = pasemi_dma_alloc_fun();
 354         if (ring->fun < 0)
 355                 goto out_fun;
 356
 357         cfg = PAS_DMA_TXCHAN_CFG_TY_FUNC | PAS_DMA_TXCHAN_CFG_UP |
 358               PAS_DMA_TXCHAN_CFG_TATTR(ring->fun) |
 359               PAS_DMA_TXCHAN_CFG_LPSQ | PAS_DMA_TXCHAN_CFG_LPDQ;
 360
 361         if (translation_enabled())
 362                 cfg |= PAS_DMA_TXCHAN_CFG_TRD | PAS_DMA_TXCHAN_CFG_TRR;
 363
 364         write_dma_reg(PAS_DMA_TXCHAN_CFG(chno), cfg);
 365
 366         /* enable channel */
 367         pasemi_dma_start_chan(&ring->chan, PAS_DMA_TXCHAN_TCMDSTA_SZ |
 368                                            PAS_DMA_TXCHAN_TCMDSTA_DB |
 369                                            PAS_DMA_TXCHAN_TCMDSTA_DE |
 370                                            PAS_DMA_TXCHAN_TCMDSTA_DA);
 371
 372         return ring;
 373
 374 out_fun:
 375 out_flags:
 376         if (ring->events[0] >= 0)
 377                 pasemi_dma_free_flag(ring->events[0]);
 378         if (ring->events[1] >= 0)
 379                 pasemi_dma_free_flag(ring->events[1]);
 380         pasemi_dma_free_ring(&ring->chan);
 381 out_ring_desc:
 382         pasemi_dma_free_chan(&ring->chan);
 383 out_chan:
 384
 385         return NULL;
 386 }
 387
 388 static void pasemi_mac_setup_csrings(struct pasemi_mac *mac)
 389 {
 390         int i;
 391         mac->cs[0] = pasemi_mac_setup_csring(mac);
 392         if (mac->type == MAC_TYPE_XAUI)
 393                 mac->cs[1] = pasemi_mac_setup_csring(mac);
 394         else
 395                 mac->cs[1] = 0;
 396
 397         for (i = 0; i < MAX_CS; i++)
 398                 if (mac->cs[i])
 399                         mac->num_cs++;
 400 }
 401
 402 static void pasemi_mac_free_csring(struct pasemi_mac_csring *csring)
 403 {
 404         pasemi_dma_stop_chan(&csring->chan);
 405         pasemi_dma_free_flag(csring->events[0]);
 406         pasemi_dma_free_flag(csring->events[1]);
 407         pasemi_dma_free_ring(&csring->chan);
 408         pasemi_dma_free_chan(&csring->chan);
 409         pasemi_dma_free_fun(csring->fun);
 410 }
 411
 412 static int pasemi_mac_setup_rx_resources(const struct net_device *dev)
 413 {
 414         struct pasemi_mac_rxring *ring;
 415         struct pasemi_mac *mac = netdev_priv(dev);
 416         int chno;
 417         unsigned int cfg;
 418
 419         ring = pasemi_dma_alloc_chan(RXCHAN, sizeof(struct pasemi_mac_rxring),
 420                                      offsetof(struct pasemi_mac_rxring, chan));
 421
 422         if (!ring) {
 423                 dev_err(&mac->pdev->dev, "Can't allocate RX channel\n");
 424                 goto out_chan;
 425         }
 426         chno = ring->chan.chno;
 427
 428         spin_lock_init(&ring->lock);
 429
 430         ring->size = RX_RING_SIZE;
 431         ring->ring_info = kzalloc(sizeof(struct pasemi_mac_buffer) *
 432                                   RX_RING_SIZE, GFP_KERNEL);
 433
 434         if (!ring->ring_info)
 435                 goto out_ring_info;
 436
 437         /* Allocate descriptors */
 438         if (pasemi_dma_alloc_ring(&ring->chan, RX_RING_SIZE))
 439                 goto out_ring_desc;
 440
 441         ring->buffers = dma_alloc_coherent(&mac->dma_pdev->dev,
 442                                            RX_RING_SIZE * sizeof(u64),
 443                                            &ring->buf_dma, GFP_KERNEL);
 444         if (!ring->buffers)
 445                 goto out_ring_desc;
 446
 447         memset(ring->buffers, 0, RX_RING_SIZE * sizeof(u64));
 448
 449         write_dma_reg(PAS_DMA_RXCHAN_BASEL(chno),
 450                       PAS_DMA_RXCHAN_BASEL_BRBL(ring->chan.ring_dma));
 451
 452         write_dma_reg(PAS_DMA_RXCHAN_BASEU(chno),
 453                       PAS_DMA_RXCHAN_BASEU_BRBH(ring->chan.ring_dma >> 32) |
 454                       PAS_DMA_RXCHAN_BASEU_SIZ(RX_RING_SIZE >> 3));
 455
 456         cfg = PAS_DMA_RXCHAN_CFG_HBU(2);
 457
 458         if (translation_enabled())
 459                 cfg |= PAS_DMA_RXCHAN_CFG_CTR;
 460
 461         write_dma_reg(PAS_DMA_RXCHAN_CFG(chno), cfg);
 462
 463         write_dma_reg(PAS_DMA_RXINT_BASEL(mac->dma_if),
 464                       PAS_DMA_RXINT_BASEL_BRBL(ring->buf_dma));
 465
 466         write_dma_reg(PAS_DMA_RXINT_BASEU(mac->dma_if),
 467                       PAS_DMA_RXINT_BASEU_BRBH(ring->buf_dma >> 32) |
 468                       PAS_DMA_RXINT_BASEU_SIZ(RX_RING_SIZE >> 3));
 469
 470         cfg = PAS_DMA_RXINT_CFG_DHL(2) | PAS_DMA_RXINT_CFG_L2 |
 471               PAS_DMA_RXINT_CFG_LW | PAS_DMA_RXINT_CFG_RBP |
 472               PAS_DMA_RXINT_CFG_HEN;
 473
 474         if (translation_enabled())
 475                 cfg |= PAS_DMA_RXINT_CFG_ITRR | PAS_DMA_RXINT_CFG_ITR;
 476
 477         write_dma_reg(PAS_DMA_RXINT_CFG(mac->dma_if), cfg);
 478
 479         ring->next_to_fill = 0;
 480         ring->next_to_clean = 0;
 481         ring->mac = mac;
 482         mac->rx = ring;
 483
 484         return 0;
 485
 486 out_ring_desc:
 487         kfree(ring->ring_info);
 488 out_ring_info:
 489         pasemi_dma_free_chan(&ring->chan);
 490 out_chan:
 491         return -ENOMEM;
 492 }
 493
 494 static struct pasemi_mac_txring *
 495 pasemi_mac_setup_tx_resources(const struct net_device *dev)
 496 {
 497         struct pasemi_mac *mac = netdev_priv(dev);
 498         u32 val;
 499         struct pasemi_mac_txring *ring;
 500         unsigned int cfg;
 501         int chno;
 502
 503         ring = pasemi_dma_alloc_chan(TXCHAN, sizeof(struct pasemi_mac_txring),
 504                                      offsetof(struct pasemi_mac_txring, chan));
 505
 506         if (!ring) {
 507                 dev_err(&mac->pdev->dev, "Can't allocate TX channel\n");
 508                 goto out_chan;
 509         }
 510
 511         chno = ring->chan.chno;
 512
 513         spin_lock_init(&ring->lock);
 514
 515         ring->size = TX_RING_SIZE;
 516         ring->ring_info = kzalloc(sizeof(struct pasemi_mac_buffer) *
 517                                   TX_RING_SIZE, GFP_KERNEL);
 518         if (!ring->ring_info)
 519                 goto out_ring_info;
 520
 521         /* Allocate descriptors */
 522         if (pasemi_dma_alloc_ring(&ring->chan, TX_RING_SIZE))
 523                 goto out_ring_desc;
 524
 525         write_dma_reg(PAS_DMA_TXCHAN_BASEL(chno),
 526                       PAS_DMA_TXCHAN_BASEL_BRBL(ring->chan.ring_dma));
 527         val = PAS_DMA_TXCHAN_BASEU_BRBH(ring->chan.ring_dma >> 32);
 528         val |= PAS_DMA_TXCHAN_BASEU_SIZ(TX_RING_SIZE >> 3);
 529
 530         write_dma_reg(PAS_DMA_TXCHAN_BASEU(chno), val);
 531
 532         cfg = PAS_DMA_TXCHAN_CFG_TY_IFACE |
 533               PAS_DMA_TXCHAN_CFG_TATTR(mac->dma_if) |
 534               PAS_DMA_TXCHAN_CFG_UP |
 535               PAS_DMA_TXCHAN_CFG_WT(4);
 536
 537         if (translation_enabled())
 538                 cfg |= PAS_DMA_TXCHAN_CFG_TRD | PAS_DMA_TXCHAN_CFG_TRR;
 539
 540         write_dma_reg(PAS_DMA_TXCHAN_CFG(chno), cfg);
 541
 542         ring->next_to_fill = 0;
 543         ring->next_to_clean = 0;
 544         ring->mac = mac;
 545
 546         return ring;
 547
 548 out_ring_desc:
 549         kfree(ring->ring_info);
 550 out_ring_info:
 551         pasemi_dma_free_chan(&ring->chan);
 552 out_chan:
 553         return NULL;
 554 }
 555
 556 static void pasemi_mac_free_tx_resources(struct pasemi_mac *mac)
 557 {
 558         struct pasemi_mac_txring *txring = tx_ring(mac);
 559         unsigned int i, j;
 560         struct pasemi_mac_buffer *info;
 561         dma_addr_t dmas[MAX_SKB_FRAGS+1];
 562         int freed, nfrags;
 563         int start, limit;
 564
 565         start = txring->next_to_clean;
 566         limit = txring->next_to_fill;
 567
 568         /* Compensate for when fill has wrapped and clean has not */
 569         if (start > limit)
 570                 limit += TX_RING_SIZE;
 571
 572         for (i = start; i < limit; i += freed) {
 573                 info = &txring->ring_info[(i+1) & (TX_RING_SIZE-1)];
 574                 if (info->dma && info->skb) {
 575                         nfrags = skb_shinfo(info->skb)->nr_frags;
 576                         for (j = 0; j <= nfrags; j++)
 577                                 dmas[j] = txring->ring_info[(i+1+j) &
 578                                                 (TX_RING_SIZE-1)].dma;
 579                         freed = pasemi_mac_unmap_tx_skb(mac, nfrags,
 580                                                         info->skb, dmas);
 581                 } else
 582                         freed = 2;
 583         }
 584
 585         kfree(txring->ring_info);
 586         pasemi_dma_free_chan(&txring->chan);
 587
 588 }
 589
 590 static void pasemi_mac_free_rx_buffers(struct pasemi_mac *mac)
 591 {
 592         struct pasemi_mac_rxring *rx = rx_ring(mac);
 593         unsigned int i;
 594         struct pasemi_mac_buffer *info;
 595
 596         for (i = 0; i < RX_RING_SIZE; i++) {
 597                 info = &RX_DESC_INFO(rx, i);
 598                 if (info->skb && info->dma) {
 599                         pci_unmap_single(mac->dma_pdev,
 600                                          info->dma,
 601                                          info->skb->len,
 602                                          PCI_DMA_FROMDEVICE);
 603                         dev_kfree_skb_any(info->skb);
 604                 }
 605                 info->dma = 0;
 606                 info->skb = NULL;
 607         }
 608
 609         for (i = 0; i < RX_RING_SIZE; i++)
 610                 RX_BUFF(rx, i) = 0;
 611 }
 612
 613 static void pasemi_mac_free_rx_resources(struct pasemi_mac *mac)
 614 {
 615         pasemi_mac_free_rx_buffers(mac);
 616
 617         dma_free_coherent(&mac->dma_pdev->dev, RX_RING_SIZE * sizeof(u64),
 618                           rx_ring(mac)->buffers, rx_ring(mac)->buf_dma);
 619
 620         kfree(rx_ring(mac)->ring_info);
 621         pasemi_dma_free_chan(&rx_ring(mac)->chan);
 622         mac->rx = NULL;
 623 }
 624
 625 static void pasemi_mac_replenish_rx_ring(const struct net_device *dev,
 626                                          const int limit)
 627 {
 628         const struct pasemi_mac *mac = netdev_priv(dev);
 629         struct pasemi_mac_rxring *rx = rx_ring(mac);
 630         int fill, count;
 631
 632         if (limit <= 0)
 633                 return;
 634
 635         fill = rx_ring(mac)->next_to_fill;
 636         for (count = 0; count < limit; count++) {
 637                 struct pasemi_mac_buffer *info = &RX_DESC_INFO(rx, fill);
 638                 u64 *buff = &RX_BUFF(rx, fill);
 639                 struct sk_buff *skb;
 640                 dma_addr_t dma;
 641
 642                 /* Entry in use? */
 643                 WARN_ON(*buff);
 644
 645                 skb = dev_alloc_skb(mac->bufsz);
 646                 skb_reserve(skb, LOCAL_SKB_ALIGN);
 647
 648                 if (unlikely(!skb))
 649                         break;
 650
 651                 dma = pci_map_single(mac->dma_pdev, skb->data,
 652                                      mac->bufsz - LOCAL_SKB_ALIGN,
 653                                      PCI_DMA_FROMDEVICE);
 654
 655                 if (unlikely(pci_dma_mapping_error(mac->dma_pdev, dma))) {
 656                         dev_kfree_skb_irq(info->skb);
 657                         break;
 658                 }
 659
 660                 info->skb = skb;
 661                 info->dma = dma;
 662                 *buff = XCT_RXB_LEN(mac->bufsz) | XCT_RXB_ADDR(dma);
 663                 fill++;
 664         }
 665
 666         wmb();
 667
 668         write_dma_reg(PAS_DMA_RXINT_INCR(mac->dma_if), count);
 669
 670         rx_ring(mac)->next_to_fill = (rx_ring(mac)->next_to_fill + count) &
 671                                 (RX_RING_SIZE - 1);
 672 }
 673
 674 static void pasemi_mac_restart_rx_intr(const struct pasemi_mac *mac)
 675 {
 676         struct pasemi_mac_rxring *rx = rx_ring(mac);
 677         unsigned int reg, pcnt;
 678         /* Re-enable packet count interrupts: finally
 679          * ack the packet count interrupt we got in rx_intr.
 680          */
 681
 682         pcnt = *rx->chan.status & PAS_STATUS_PCNT_M;
 683
 684         reg = PAS_IOB_DMA_RXCH_RESET_PCNT(pcnt) | PAS_IOB_DMA_RXCH_RESET_PINTC;
 685
 686         if (*rx->chan.status & PAS_STATUS_TIMER)
 687                 reg |= PAS_IOB_DMA_RXCH_RESET_TINTC;
 688
 689         write_iob_reg(PAS_IOB_DMA_RXCH_RESET(mac->rx->chan.chno), reg);
 690 }
 691
 692 static void pasemi_mac_restart_tx_intr(const struct pasemi_mac *mac)
 693 {
 694         unsigned int reg, pcnt;
 695
 696         /* Re-enable packet count interrupts */
 697         pcnt = *tx_ring(mac)->chan.status & PAS_STATUS_PCNT_M;
 698
 699         reg = PAS_IOB_DMA_TXCH_RESET_PCNT(pcnt) | PAS_IOB_DMA_TXCH_RESET_PINTC;
 700
 701         write_iob_reg(PAS_IOB_DMA_TXCH_RESET(tx_ring(mac)->chan.chno), reg);
 702 }
 703
 704
 705 static inline void pasemi_mac_rx_error(const struct pasemi_mac *mac,
 706                                        const u64 macrx)
 707 {
 708         unsigned int rcmdsta, ccmdsta;
 709         struct pasemi_dmachan *chan = &rx_ring(mac)->chan;
 710
 711         if (!netif_msg_rx_err(mac))
 712                 return;
 713
 714         rcmdsta = read_dma_reg(PAS_DMA_RXINT_RCMDSTA(mac->dma_if));
 715         ccmdsta = read_dma_reg(PAS_DMA_RXCHAN_CCMDSTA(chan->chno));
 716
 717         printk(KERN_ERR "pasemi_mac: rx error. macrx %016llx, rx status %llx\n",
 718                 macrx, *chan->status);
 719
 720         printk(KERN_ERR "pasemi_mac: rcmdsta %08x ccmdsta %08x\n",
 721                 rcmdsta, ccmdsta);
 722 }
 723
 724 static inline void pasemi_mac_tx_error(const struct pasemi_mac *mac,
 725                                        const u64 mactx)
 726 {
 727         unsigned int cmdsta;
 728         struct pasemi_dmachan *chan = &tx_ring(mac)->chan;
 729
 730         if (!netif_msg_tx_err(mac))
 731                 return;
 732
 733         cmdsta = read_dma_reg(PAS_DMA_TXCHAN_TCMDSTA(chan->chno));
 734
 735         printk(KERN_ERR "pasemi_mac: tx error. mactx 0x%016llx, "\
 736                 "tx status 0x%016llx\n", mactx, *chan->status);
 737
 738         printk(KERN_ERR "pasemi_mac: tcmdsta 0x%08x\n", cmdsta);
 739 }
 740
 741 static int pasemi_mac_clean_rx(struct pasemi_mac_rxring *rx,
 742                                const int limit)
 743 {
 744         const struct pasemi_dmachan *chan = &rx->chan;
 745         struct pasemi_mac *mac = rx->mac;
 746         struct pci_dev *pdev = mac->dma_pdev;
 747         unsigned int n;
 748         int count, buf_index, tot_bytes, packets;
 749         struct pasemi_mac_buffer *info;
 750         struct sk_buff *skb;
 751         unsigned int len;
 752         u64 macrx, eval;
 753         dma_addr_t dma;
 754
 755         tot_bytes = 0;
 756         packets = 0;
 757
 758         spin_lock(&rx->lock);
 759
 760         n = rx->next_to_clean;
 761
 762         prefetch(&RX_DESC(rx, n));
 763
 764         for (count = 0; count < limit; count++) {
 765                 macrx = RX_DESC(rx, n);
 766                 prefetch(&RX_DESC(rx, n+4));
 767
 768                 if ((macrx & XCT_MACRX_E) ||
 769                     (*chan->status & PAS_STATUS_ERROR))
 770                         pasemi_mac_rx_error(mac, macrx);
 771
 772                 if (!(macrx & XCT_MACRX_O))
 773                         break;
 774
 775                 info = NULL;
 776
 777                 BUG_ON(!(macrx & XCT_MACRX_RR_8BRES));
 778
 779                 eval = (RX_DESC(rx, n+1) & XCT_RXRES_8B_EVAL_M) >>
 780                         XCT_RXRES_8B_EVAL_S;
 781                 buf_index = eval-1;
 782
 783                 dma = (RX_DESC(rx, n+2) & XCT_PTR_ADDR_M);
 784                 info = &RX_DESC_INFO(rx, buf_index);
 785
 786                 skb = info->skb;
 787
 788                 prefetch_skb(skb);
 789
 790                 len = (macrx & XCT_MACRX_LLEN_M) >> XCT_MACRX_LLEN_S;
 791
 792                 pci_unmap_single(pdev, dma, mac->bufsz - LOCAL_SKB_ALIGN,
 793                                  PCI_DMA_FROMDEVICE);
 794
 795                 if (macrx & XCT_MACRX_CRC) {
 796                         /* CRC error flagged */
 797                         mac->netdev->stats.rx_errors++;
 798                         mac->netdev->stats.rx_crc_errors++;
 799                         /* No need to free skb, it'll be reused */
 800                         goto next;
 801                 }
 802
 803                 info->skb = NULL;
 804                 info->dma = 0;
 805
 806                 if (likely((macrx & XCT_MACRX_HTY_M) == XCT_MACRX_HTY_IPV4_OK)) {
 807                         skb->ip_summed = CHECKSUM_UNNECESSARY;
 808                         skb->csum = (macrx & XCT_MACRX_CSUM_M) >>
 809                                            XCT_MACRX_CSUM_S;
 810                 } else
 811                         skb_checksum_none_assert(skb);
 812
 813                 packets++;
 814                 tot_bytes += len;
 815
 816                 /* Don't include CRC */
 817                 skb_put(skb, len-4);
 818
 819                 skb->protocol = eth_type_trans(skb, mac->netdev);
 820                 lro_receive_skb(&mac->lro_mgr, skb, (void *)macrx);
 821
 822 next:
 823                 RX_DESC(rx, n) = 0;
 824                 RX_DESC(rx, n+1) = 0;
 825
 826                 /* Need to zero it out since hardware doesn't, since the
 827                  * replenish loop uses it to tell when it's done.
 828                  */
 829                 RX_BUFF(rx, buf_index) = 0;
 830
 831                 n += 4;
 832         }
 833
 834         if (n > RX_RING_SIZE) {
 835                 /* Errata 5971 workaround: L2 target of headers */
 836                 write_iob_reg(PAS_IOB_COM_PKTHDRCNT, 0);
 837                 n &= (RX_RING_SIZE-1);
 838         }
 839
 840         rx_ring(mac)->next_to_clean = n;
 841
 842         lro_flush_all(&mac->lro_mgr);
 843
 844         /* Increase is in number of 16-byte entries, and since each descriptor
 845          * with an 8BRES takes up 3x8 bytes (padded to 4x8), increase with
 846          * count*2.
 847          */
 848         write_dma_reg(PAS_DMA_RXCHAN_INCR(mac->rx->chan.chno), count << 1);
 849
 850         pasemi_mac_replenish_rx_ring(mac->netdev, count);
 851
 852         mac->netdev->stats.rx_bytes += tot_bytes;
 853         mac->netdev->stats.rx_packets += packets;
 854
 855         spin_unlock(&rx_ring(mac)->lock);
 856
 857         return count;
 858 }
 859
 860 /* Can't make this too large or we blow the kernel stack limits */
 861 #define TX_CLEAN_BATCHSIZE (128/MAX_SKB_FRAGS)
 862
 863 static int pasemi_mac_clean_tx(struct pasemi_mac_txring *txring)
 864 {
 865         struct pasemi_dmachan *chan = &txring->chan;
 866         struct pasemi_mac *mac = txring->mac;
 867         int i, j;
 868         unsigned int start, descr_count, buf_count, batch_limit;
 869         unsigned int ring_limit;
 870         unsigned int total_count;
 871         unsigned long flags;
 872         struct sk_buff *skbs[TX_CLEAN_BATCHSIZE];
 873         dma_addr_t dmas[TX_CLEAN_BATCHSIZE][MAX_SKB_FRAGS+1];
 874         int nf[TX_CLEAN_BATCHSIZE];
 875         int nr_frags;
 876
 877         total_count = 0;
 878         batch_limit = TX_CLEAN_BATCHSIZE;
 879 restart:
 880         spin_lock_irqsave(&txring->lock, flags);
 881
 882         start = txring->next_to_clean;
 883         ring_limit = txring->next_to_fill;
 884
 885         prefetch(&TX_DESC_INFO(txring, start+1).skb);
 886
 887         /* Compensate for when fill has wrapped but clean has not */
 888         if (start > ring_limit)
 889                 ring_limit += TX_RING_SIZE;
 890
 891         buf_count = 0;
 892         descr_count = 0;
 893
 894         for (i = start;
 895              descr_count < batch_limit && i < ring_limit;
 896              i += buf_count) {
 897                 u64 mactx = TX_DESC(txring, i);
 898                 struct sk_buff *skb;
 899
 900                 if ((mactx  & XCT_MACTX_E) ||
 901                     (*chan->status & PAS_STATUS_ERROR))
 902                         pasemi_mac_tx_error(mac, mactx);
 903
 904                 /* Skip over control descriptors */
 905                 if (!(mactx & XCT_MACTX_LLEN_M)) {
 906                         TX_DESC(txring, i) = 0;
 907                         TX_DESC(txring, i+1) = 0;
 908                         buf_count = 2;
 909                         continue;
 910                 }
 911
 912                 skb = TX_DESC_INFO(txring, i+1).skb;
 913                 nr_frags = TX_DESC_INFO(txring, i).dma;
 914
 915                 if (unlikely(mactx & XCT_MACTX_O))
 916                         /* Not yet transmitted */
 917                         break;
 918
 919                 buf_count = 2 + nr_frags;
 920                 /* Since we always fill with an even number of entries, make
 921                  * sure we skip any unused one at the end as well.
 922                  */
 923                 if (buf_count & 1)
 924                         buf_count++;
 925
 926                 for (j = 0; j <= nr_frags; j++)
 927                         dmas[descr_count][j] = TX_DESC_INFO(txring, i+1+j).dma;
 928
 929                 skbs[descr_count] = skb;
 930                 nf[descr_count] = nr_frags;
 931
 932                 TX_DESC(txring, i) = 0;
 933                 TX_DESC(txring, i+1) = 0;
 934
 935                 descr_count++;
 936         }
 937         txring->next_to_clean = i & (TX_RING_SIZE-1);
 938
 939         spin_unlock_irqrestore(&txring->lock, flags);
 940         netif_wake_queue(mac->netdev);
 941
 942         for (i = 0; i < descr_count; i++)
 943                 pasemi_mac_unmap_tx_skb(mac, nf[i], skbs[i], dmas[i]);
 944
 945         total_count += descr_count;
 946
 947         /* If the batch was full, try to clean more */
 948         if (descr_count == batch_limit)
 949                 goto restart;
 950
 951         return total_count;
 952 }
 953
 954
 955 static irqreturn_t pasemi_mac_rx_intr(int irq, void *data)
 956 {
 957         const struct pasemi_mac_rxring *rxring = data;
 958         struct pasemi_mac *mac = rxring->mac;
 959         const struct pasemi_dmachan *chan = &rxring->chan;
 960         unsigned int reg;
 961
 962         if (!(*chan->status & PAS_STATUS_CAUSE_M))
 963                 return IRQ_NONE;
 964
 965         /* Don't reset packet count so it won't fire again but clear
 966          * all others.
 967          */
 968
 969         reg = 0;
 970         if (*chan->status & PAS_STATUS_SOFT)
 971                 reg |= PAS_IOB_DMA_RXCH_RESET_SINTC;
 972         if (*chan->status & PAS_STATUS_ERROR)
 973                 reg |= PAS_IOB_DMA_RXCH_RESET_DINTC;
 974
 975         napi_schedule(&mac->napi);
 976
 977         write_iob_reg(PAS_IOB_DMA_RXCH_RESET(chan->chno), reg);
 978
 979         return IRQ_HANDLED;
 980 }
 981
 982 #define TX_CLEAN_INTERVAL HZ
 983
 984 static void pasemi_mac_tx_timer(unsigned long data)
 985 {
 986         struct pasemi_mac_txring *txring = (struct pasemi_mac_txring *)data;
 987         struct pasemi_mac *mac = txring->mac;
 988
 989         pasemi_mac_clean_tx(txring);
 990
 991         mod_timer(&txring->clean_timer, jiffies + TX_CLEAN_INTERVAL);
 992
 993         pasemi_mac_restart_tx_intr(mac);
 994 }
 995
 996 static irqreturn_t pasemi_mac_tx_intr(int irq, void *data)
 997 {
 998         struct pasemi_mac_txring *txring = data;
 999         const struct pasemi_dmachan *chan = &txring->chan;
1000         struct pasemi_mac *mac = txring->mac;
1001         unsigned int reg;
1002
1003         if (!(*chan->status & PAS_STATUS_CAUSE_M))
1004                 return IRQ_NONE;
1005
1006         reg = 0;
1007
1008         if (*chan->status & PAS_STATUS_SOFT)
1009                 reg |= PAS_IOB_DMA_TXCH_RESET_SINTC;
1010         if (*chan->status & PAS_STATUS_ERROR)
1011                 reg |= PAS_IOB_DMA_TXCH_RESET_DINTC;
1012
1013         mod_timer(&txring->clean_timer, jiffies + (TX_CLEAN_INTERVAL)*2);
1014
1015         napi_schedule(&mac->napi);
1016
1017         if (reg)
1018                 write_iob_reg(PAS_IOB_DMA_TXCH_RESET(chan->chno), reg);
1019
1020         return IRQ_HANDLED;
1021 }
1022
1023 static void pasemi_adjust_link(struct net_device *dev)
1024 {
1025         struct pasemi_mac *mac = netdev_priv(dev);
1026         int msg;
1027         unsigned int flags;
1028         unsigned int new_flags;
1029
1030         if (!mac->phydev->link) {
1031                 /* If no link, MAC speed settings don't matter. Just report
1032                  * link down and return.
1033                  */
1034                 if (mac->link && netif_msg_link(mac))
1035                         printk(KERN_INFO "%s: Link is down.\n", dev->name);
1036
1037                 netif_carrier_off(dev);
1038                 pasemi_mac_intf_disable(mac);
1039                 mac->link = 0;
1040
1041                 return;
1042         } else {
1043                 pasemi_mac_intf_enable(mac);
1044                 netif_carrier_on(dev);
1045         }
1046
1047         flags = read_mac_reg(mac, PAS_MAC_CFG_PCFG);
1048         new_flags = flags & ~(PAS_MAC_CFG_PCFG_HD | PAS_MAC_CFG_PCFG_SPD_M |
1049                               PAS_MAC_CFG_PCFG_TSR_M);
1050
1051         if (!mac->phydev->duplex)
1052                 new_flags |= PAS_MAC_CFG_PCFG_HD;
1053
1054         switch (mac->phydev->speed) {
1055         case 1000:
1056                 new_flags |= PAS_MAC_CFG_PCFG_SPD_1G |
1057                              PAS_MAC_CFG_PCFG_TSR_1G;
1058                 break;
1059         case 100:
1060                 new_flags |= PAS_MAC_CFG_PCFG_SPD_100M |
1061                              PAS_MAC_CFG_PCFG_TSR_100M;
1062                 break;
1063         case 10:
1064                 new_flags |= PAS_MAC_CFG_PCFG_SPD_10M |
1065                              PAS_MAC_CFG_PCFG_TSR_10M;
1066                 break;
1067         default:
1068                 printk("Unsupported speed %d\n", mac->phydev->speed);
1069         }
1070
1071         /* Print on link or speed/duplex change */
1072         msg = mac->link != mac->phydev->link || flags != new_flags;
1073
1074         mac->duplex = mac->phydev->duplex;
1075         mac->speed = mac->phydev->speed;
1076         mac->link = mac->phydev->link;
1077
1078         if (new_flags != flags)
1079                 write_mac_reg(mac, PAS_MAC_CFG_PCFG, new_flags);
1080
1081         if (msg && netif_msg_link(mac))
1082                 printk(KERN_INFO "%s: Link is up at %d Mbps, %s duplex.\n",
1083                        dev->name, mac->speed, mac->duplex ? "full" : "half");
1084 }
1085
1086 static int pasemi_mac_phy_init(struct net_device *dev)
1087 {
1088         struct pasemi_mac *mac = netdev_priv(dev);
1089         struct device_node *dn, *phy_dn;
1090         struct phy_device *phydev;
1091
1092         dn = pci_device_to_OF_node(mac->pdev);
1093         phy_dn = of_parse_phandle(dn, "phy-handle", 0);
1094         of_node_put(phy_dn);
1095
1096         mac->link = 0;
1097         mac->speed = 0;
1098         mac->duplex = -1;
1099
1100         phydev = of_phy_connect(dev, phy_dn, &pasemi_adjust_link, 0,
1101                                 PHY_INTERFACE_MODE_SGMII);
1102
1103         if (IS_ERR(phydev)) {
1104                 printk(KERN_ERR "%s: Could not attach to phy\n", dev->name);
1105                 return PTR_ERR(phydev);
1106         }
1107
1108         mac->phydev = phydev;
1109
1110         return 0;
1111 }
1112
1113
1114 static int pasemi_mac_open(struct net_device *dev)
1115 {
1116         struct pasemi_mac *mac = netdev_priv(dev);
1117         unsigned int flags;
1118         int i, ret;
1119
1120         flags = PAS_MAC_CFG_TXP_FCE | PAS_MAC_CFG_TXP_FPC(3) |
1121                 PAS_MAC_CFG_TXP_SL(3) | PAS_MAC_CFG_TXP_COB(0xf) |
1122                 PAS_MAC_CFG_TXP_TIFT(8) | PAS_MAC_CFG_TXP_TIFG(12);
1123
1124         write_mac_reg(mac, PAS_MAC_CFG_TXP, flags);
1125
1126         ret = pasemi_mac_setup_rx_resources(dev);
1127         if (ret)
1128                 goto out_rx_resources;
1129
1130         mac->tx = pasemi_mac_setup_tx_resources(dev);
1131
1132         if (!mac->tx)
1133                 goto out_tx_ring;
1134
1135         /* We might already have allocated rings in case mtu was changed
1136          * before interface was brought up.
1137          */
1138         if (dev->mtu > 1500 && !mac->num_cs) {
1139                 pasemi_mac_setup_csrings(mac);
1140                 if (!mac->num_cs)
1141                         goto out_tx_ring;
1142         }
1143
1144         /* Zero out rmon counters */
1145         for (i = 0; i < 32; i++)
1146                 write_mac_reg(mac, PAS_MAC_RMON(i), 0);
1147
1148         /* 0x3ff with 33MHz clock is about 31us */
1149         write_iob_reg(PAS_IOB_DMA_COM_TIMEOUTCFG,
1150                       PAS_IOB_DMA_COM_TIMEOUTCFG_TCNT(0x3ff));
1151
1152         write_iob_reg(PAS_IOB_DMA_RXCH_CFG(mac->rx->chan.chno),
1153                       PAS_IOB_DMA_RXCH_CFG_CNTTH(256));
1154
1155         write_iob_reg(PAS_IOB_DMA_TXCH_CFG(mac->tx->chan.chno),
1156                       PAS_IOB_DMA_TXCH_CFG_CNTTH(32));
1157
1158         write_mac_reg(mac, PAS_MAC_IPC_CHNL,
1159                       PAS_MAC_IPC_CHNL_DCHNO(mac->rx->chan.chno) |
1160                       PAS_MAC_IPC_CHNL_BCH(mac->rx->chan.chno));
1161
1162         /* enable rx if */
1163         write_dma_reg(PAS_DMA_RXINT_RCMDSTA(mac->dma_if),
1164                       PAS_DMA_RXINT_RCMDSTA_EN |
1165                       PAS_DMA_RXINT_RCMDSTA_DROPS_M |
1166                       PAS_DMA_RXINT_RCMDSTA_BP |
1167                       PAS_DMA_RXINT_RCMDSTA_OO |
1168                       PAS_DMA_RXINT_RCMDSTA_BT);
1169
1170         /* enable rx channel */
1171         pasemi_dma_start_chan(&rx_ring(mac)->chan, PAS_DMA_RXCHAN_CCMDSTA_DU |
1172                                                    PAS_DMA_RXCHAN_CCMDSTA_OD |
1173                                                    PAS_DMA_RXCHAN_CCMDSTA_FD |
1174                                                    PAS_DMA_RXCHAN_CCMDSTA_DT);
1175
1176         /* enable tx channel */
1177         pasemi_dma_start_chan(&tx_ring(mac)->chan, PAS_DMA_TXCHAN_TCMDSTA_SZ |
1178                                                    PAS_DMA_TXCHAN_TCMDSTA_DB |
1179                                                    PAS_DMA_TXCHAN_TCMDSTA_DE |
1180                                                    PAS_DMA_TXCHAN_TCMDSTA_DA);
1181
1182         pasemi_mac_replenish_rx_ring(dev, RX_RING_SIZE);
1183
1184         write_dma_reg(PAS_DMA_RXCHAN_INCR(rx_ring(mac)->chan.chno),
1185                       RX_RING_SIZE>>1);
1186
1187         /* Clear out any residual packet count state from firmware */
1188         pasemi_mac_restart_rx_intr(mac);
1189         pasemi_mac_restart_tx_intr(mac);
1190
1191         flags = PAS_MAC_CFG_PCFG_S1 | PAS_MAC_CFG_PCFG_PR | PAS_MAC_CFG_PCFG_CE;
1192
1193         if (mac->type == MAC_TYPE_GMAC)
1194                 flags |= PAS_MAC_CFG_PCFG_TSR_1G | PAS_MAC_CFG_PCFG_SPD_1G;
1195         else
1196                 flags |= PAS_MAC_CFG_PCFG_TSR_10G | PAS_MAC_CFG_PCFG_SPD_10G;
1197
1198         /* Enable interface in MAC */
1199         write_mac_reg(mac, PAS_MAC_CFG_PCFG, flags);
1200
1201         ret = pasemi_mac_phy_init(dev);
1202         if (ret) {
1203                 /* Since we won't get link notification, just enable RX */
1204                 pasemi_mac_intf_enable(mac);
1205                 if (mac->type == MAC_TYPE_GMAC) {
1206                         /* Warn for missing PHY on SGMII (1Gig) ports */
1207                         dev_warn(&mac->pdev->dev,
1208                                  "PHY init failed: %d.\n", ret);
1209                         dev_warn(&mac->pdev->dev,
1210                                  "Defaulting to 1Gbit full duplex\n");
1211                 }
1212         }
1213
1214         netif_start_queue(dev);
1215         napi_enable(&mac->napi);
1216
1217         snprintf(mac->tx_irq_name, sizeof(mac->tx_irq_name), "%s tx",
1218                  dev->name);
1219
1220         ret = request_irq(mac->tx->chan.irq, pasemi_mac_tx_intr, IRQF_DISABLED,
1221                           mac->tx_irq_name, mac->tx);
1222         if (ret) {
1223                 dev_err(&mac->pdev->dev, "request_irq of irq %d failed: %d\n",
1224                         mac->tx->chan.irq, ret);
1225                 goto out_tx_int;
1226         }
1227
1228         snprintf(mac->rx_irq_name, sizeof(mac->rx_irq_name), "%s rx",
1229                  dev->name);
1230
1231         ret = request_irq(mac->rx->chan.irq, pasemi_mac_rx_intr, IRQF_DISABLED,
1232                           mac->rx_irq_name, mac->rx);
1233         if (ret) {
1234                 dev_err(&mac->pdev->dev, "request_irq of irq %d failed: %d\n",
1235                         mac->rx->chan.irq, ret);
1236                 goto out_rx_int;
1237         }
1238
1239         if (mac->phydev)
1240                 phy_start(mac->phydev);
1241
1242         init_timer(&mac->tx->clean_timer);
1243         mac->tx->clean_timer.function = pasemi_mac_tx_timer;
1244         mac->tx->clean_timer.data = (unsigned long)mac->tx;
1245         mac->tx->clean_timer.expires = jiffies+HZ;
1246         add_timer(&mac->tx->clean_timer);
1247
1248         return 0;
1249
1250 out_rx_int:
1251         free_irq(mac->tx->chan.irq, mac->tx);
1252 out_tx_int:
1253         napi_disable(&mac->napi);
1254         netif_stop_queue(dev);
1255 out_tx_ring:
1256         if (mac->tx)
1257                 pasemi_mac_free_tx_resources(mac);
1258         pasemi_mac_free_rx_resources(mac);
1259 out_rx_resources:
1260
1261         return ret;
1262 }
1263
1264 #define MAX_RETRIES 5000
1265
1266 static void pasemi_mac_pause_txchan(struct pasemi_mac *mac)
1267 {
1268         unsigned int sta, retries;
1269         int txch = tx_ring(mac)->chan.chno;
1270
1271         write_dma_reg(PAS_DMA_TXCHAN_TCMDSTA(txch),
1272                       PAS_DMA_TXCHAN_TCMDSTA_ST);
1273
1274         for (retries = 0; retries < MAX_RETRIES; retries++) {
1275                 sta = read_dma_reg(PAS_DMA_TXCHAN_TCMDSTA(txch));
1276                 if (!(sta & PAS_DMA_TXCHAN_TCMDSTA_ACT))
1277                         break;
1278                 cond_resched();
1279         }
1280
1281         if (sta & PAS_DMA_TXCHAN_TCMDSTA_ACT)
1282                 dev_err(&mac->dma_pdev->dev,
1283                         "Failed to stop tx channel, tcmdsta %08x\n", sta);
1284
1285         write_dma_reg(PAS_DMA_TXCHAN_TCMDSTA(txch), 0);
1286 }
1287
1288 static void pasemi_mac_pause_rxchan(struct pasemi_mac *mac)
1289 {
1290         unsigned int sta, retries;
1291         int rxch = rx_ring(mac)->chan.chno;
1292
1293         write_dma_reg(PAS_DMA_RXCHAN_CCMDSTA(rxch),
1294                       PAS_DMA_RXCHAN_CCMDSTA_ST);
1295         for (retries = 0; retries < MAX_RETRIES; retries++) {
1296                 sta = read_dma_reg(PAS_DMA_RXCHAN_CCMDSTA(rxch));
1297                 if (!(sta & PAS_DMA_RXCHAN_CCMDSTA_ACT))
1298                         break;
1299                 cond_resched();
1300         }
1301
1302         if (sta & PAS_DMA_RXCHAN_CCMDSTA_ACT)
1303                 dev_err(&mac->dma_pdev->dev,
1304                         "Failed to stop rx channel, ccmdsta 08%x\n", sta);
1305         write_dma_reg(PAS_DMA_RXCHAN_CCMDSTA(rxch), 0);
1306 }
1307
1308 static void pasemi_mac_pause_rxint(struct pasemi_mac *mac)
1309 {
1310         unsigned int sta, retries;
1311
1312         write_dma_reg(PAS_DMA_RXINT_RCMDSTA(mac->dma_if),
1313                       PAS_DMA_RXINT_RCMDSTA_ST);
1314         for (retries = 0; retries < MAX_RETRIES; retries++) {
1315                 sta = read_dma_reg(PAS_DMA_RXINT_RCMDSTA(mac->dma_if));
1316                 if (!(sta & PAS_DMA_RXINT_RCMDSTA_ACT))
1317                         break;
1318                 cond_resched();
1319         }
1320
1321         if (sta & PAS_DMA_RXINT_RCMDSTA_ACT)
1322                 dev_err(&mac->dma_pdev->dev,
1323                         "Failed to stop rx interface, rcmdsta %08x\n", sta);
1324         write_dma_reg(PAS_DMA_RXINT_RCMDSTA(mac->dma_if), 0);
1325 }
1326
1327 static int pasemi_mac_close(struct net_device *dev)
1328 {
1329         struct pasemi_mac *mac = netdev_priv(dev);
1330         unsigned int sta;
1331         int rxch, txch, i;
1332
1333         rxch = rx_ring(mac)->chan.chno;
1334         txch = tx_ring(mac)->chan.chno;
1335
1336         if (mac->phydev) {
1337                 phy_stop(mac->phydev);
1338                 phy_disconnect(mac->phydev);
1339         }
1340
1341         del_timer_sync(&mac->tx->clean_timer);
1342
1343         netif_stop_queue(dev);
1344         napi_disable(&mac->napi);
1345
1346         sta = read_dma_reg(PAS_DMA_RXINT_RCMDSTA(mac->dma_if));
1347         if (sta & (PAS_DMA_RXINT_RCMDSTA_BP |
1348                       PAS_DMA_RXINT_RCMDSTA_OO |
1349                       PAS_DMA_RXINT_RCMDSTA_BT))
1350                 printk(KERN_DEBUG "pasemi_mac: rcmdsta error: 0x%08x\n", sta);
1351
1352         sta = read_dma_reg(PAS_DMA_RXCHAN_CCMDSTA(rxch));
1353         if (sta & (PAS_DMA_RXCHAN_CCMDSTA_DU |
1354                      PAS_DMA_RXCHAN_CCMDSTA_OD |
1355                      PAS_DMA_RXCHAN_CCMDSTA_FD |
1356                      PAS_DMA_RXCHAN_CCMDSTA_DT))
1357                 printk(KERN_DEBUG "pasemi_mac: ccmdsta error: 0x%08x\n", sta);
1358
1359         sta = read_dma_reg(PAS_DMA_TXCHAN_TCMDSTA(txch));
1360         if (sta & (PAS_DMA_TXCHAN_TCMDSTA_SZ | PAS_DMA_TXCHAN_TCMDSTA_DB |
1361                       PAS_DMA_TXCHAN_TCMDSTA_DE | PAS_DMA_TXCHAN_TCMDSTA_DA))
1362                 printk(KERN_DEBUG "pasemi_mac: tcmdsta error: 0x%08x\n", sta);
1363
1364         /* Clean out any pending buffers */
1365         pasemi_mac_clean_tx(tx_ring(mac));
1366         pasemi_mac_clean_rx(rx_ring(mac), RX_RING_SIZE);
1367
1368         pasemi_mac_pause_txchan(mac);
1369         pasemi_mac_pause_rxint(mac);
1370         pasemi_mac_pause_rxchan(mac);
1371         pasemi_mac_intf_disable(mac);
1372
1373         free_irq(mac->tx->chan.irq, mac->tx);
1374         free_irq(mac->rx->chan.irq, mac->rx);
1375
1376         for (i = 0; i < mac->num_cs; i++) {
1377                 pasemi_mac_free_csring(mac->cs[i]);
1378                 mac->cs[i] = NULL;
1379         }
1380
1381         mac->num_cs = 0;
1382
1383         /* Free resources */
1384         pasemi_mac_free_rx_resources(mac);
1385         pasemi_mac_free_tx_resources(mac);
1386
1387         return 0;
1388 }
1389
1390 static void pasemi_mac_queue_csdesc(const struct sk_buff *skb,
1391                                     const dma_addr_t *map,
1392                                     const unsigned int *map_size,
1393                                     struct pasemi_mac_txring *txring,
1394                                     struct pasemi_mac_csring *csring)
1395 {
1396         u64 fund;
1397         dma_addr_t cs_dest;
1398         const int nh_off = skb_network_offset(skb);
1399         const int nh_len = skb_network_header_len(skb);
1400         const int nfrags = skb_shinfo(skb)->nr_frags;
1401         int cs_size, i, fill, hdr, cpyhdr, evt;
1402         dma_addr_t csdma;
1403
1404         fund = XCT_FUN_ST | XCT_FUN_RR_8BRES |
1405                XCT_FUN_O | XCT_FUN_FUN(csring->fun) |
1406                XCT_FUN_CRM_SIG | XCT_FUN_LLEN(skb->len - nh_off) |
1407                XCT_FUN_SHL(nh_len >> 2) | XCT_FUN_SE;
1408
1409         switch (ip_hdr(skb)->protocol) {
1410         case IPPROTO_TCP:
1411                 fund |= XCT_FUN_SIG_TCP4;
1412                 /* TCP checksum is 16 bytes into the header */
1413                 cs_dest = map[0] + skb_transport_offset(skb) + 16;
1414                 break;
1415         case IPPROTO_UDP:
1416                 fund |= XCT_FUN_SIG_UDP4;
1417                 /* UDP checksum is 6 bytes into the header */
1418                 cs_dest = map[0] + skb_transport_offset(skb) + 6;
1419                 break;
1420         default:
1421                 BUG();
1422         }
1423
1424         /* Do the checksum offloaded */
1425         fill = csring->next_to_fill;
1426         hdr = fill;
1427
1428         CS_DESC(csring, fill++) = fund;
1429         /* Room for 8BRES. Checksum result is really 2 bytes into it */
1430         csdma = csring->chan.ring_dma + (fill & (CS_RING_SIZE-1)) * 8 + 2;
1431         CS_DESC(csring, fill++) = 0;
1432
1433         CS_DESC(csring, fill) = XCT_PTR_LEN(map_size[0]-nh_off) | XCT_PTR_ADDR(map[0]+nh_off);
1434         for (i = 1; i <= nfrags; i++)
1435                 CS_DESC(csring, fill+i) = XCT_PTR_LEN(map_size[i]) | XCT_PTR_ADDR(map[i]);
1436
1437         fill += i;
1438         if (fill & 1)
1439                 fill++;
1440
1441         /* Copy the result into the TCP packet */
1442         cpyhdr = fill;
1443         CS_DESC(csring, fill++) = XCT_FUN_O | XCT_FUN_FUN(csring->fun) |
1444                                   XCT_FUN_LLEN(2) | XCT_FUN_SE;
1445         CS_DESC(csring, fill++) = XCT_PTR_LEN(2) | XCT_PTR_ADDR(cs_dest) | XCT_PTR_T;
1446         CS_DESC(csring, fill++) = XCT_PTR_LEN(2) | XCT_PTR_ADDR(csdma);
1447         fill++;
1448
1449         evt = !csring->last_event;
1450         csring->last_event = evt;
1451
1452         /* Event handshaking with MAC TX */
1453         CS_DESC(csring, fill++) = CTRL_CMD_T | CTRL_CMD_META_EVT | CTRL_CMD_O |
1454                                   CTRL_CMD_ETYPE_SET | CTRL_CMD_REG(csring->events[evt]);
1455         CS_DESC(csring, fill++) = 0;
1456         CS_DESC(csring, fill++) = CTRL_CMD_T | CTRL_CMD_META_EVT | CTRL_CMD_O |
1457                                   CTRL_CMD_ETYPE_WCLR | CTRL_CMD_REG(csring->events[!evt]);
1458         CS_DESC(csring, fill++) = 0;
1459         csring->next_to_fill = fill & (CS_RING_SIZE-1);
1460
1461         cs_size = fill - hdr;
1462         write_dma_reg(PAS_DMA_TXCHAN_INCR(csring->chan.chno), (cs_size) >> 1);
1463
1464         /* TX-side event handshaking */
1465         fill = txring->next_to_fill;
1466         TX_DESC(txring, fill++) = CTRL_CMD_T | CTRL_CMD_META_EVT | CTRL_CMD_O |
1467                                   CTRL_CMD_ETYPE_WSET | CTRL_CMD_REG(csring->events[evt]);
1468         TX_DESC(txring, fill++) = 0;
1469         TX_DESC(txring, fill++) = CTRL_CMD_T | CTRL_CMD_META_EVT | CTRL_CMD_O |
1470                                   CTRL_CMD_ETYPE_CLR | CTRL_CMD_REG(csring->events[!evt]);
1471         TX_DESC(txring, fill++) = 0;
1472         txring->next_to_fill = fill;
1473
1474         write_dma_reg(PAS_DMA_TXCHAN_INCR(txring->chan.chno), 2);
1475 }
1476
1477 static int pasemi_mac_start_tx(struct sk_buff *skb, struct net_device *dev)
1478 {
1479         struct pasemi_mac * const mac = netdev_priv(dev);
1480         struct pasemi_mac_txring * const txring = tx_ring(mac);
1481         struct pasemi_mac_csring *csring;
1482         u64 dflags = 0;
1483         u64 mactx;
1484         dma_addr_t map[MAX_SKB_FRAGS+1];
1485         unsigned int map_size[MAX_SKB_FRAGS+1];
1486         unsigned long flags;
1487         int i, nfrags;
1488         int fill;
1489         const int nh_off = skb_network_offset(skb);
1490         const int nh_len = skb_network_header_len(skb);
1491
1492         prefetch(&txring->ring_info);
1493
1494         dflags = XCT_MACTX_O | XCT_MACTX_ST | XCT_MACTX_CRC_PAD;
1495
1496         nfrags = skb_shinfo(skb)->nr_frags;
1497
1498         map[0] = pci_map_single(mac->dma_pdev, skb->data, skb_headlen(skb),
1499                                 PCI_DMA_TODEVICE);
1500         map_size[0] = skb_headlen(skb);
1501         if (pci_dma_mapping_error(mac->dma_pdev, map[0]))
1502                 goto out_err_nolock;
1503
1504         for (i = 0; i < nfrags; i++) {
1505                 skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
1506
1507                 map[i+1] = pci_map_page(mac->dma_pdev, frag->page,
1508                                         frag->page_offset, frag->size,
1509                                         PCI_DMA_TODEVICE);
1510                 map_size[i+1] = frag->size;
1511                 if (pci_dma_mapping_error(mac->dma_pdev, map[i+1])) {
1512                         nfrags = i;
1513                         goto out_err_nolock;
1514                 }
1515         }
1516
1517         if (skb->ip_summed == CHECKSUM_PARTIAL && skb->len <= 1540) {
1518                 switch (ip_hdr(skb)->protocol) {
1519                 case IPPROTO_TCP:
1520                         dflags |= XCT_MACTX_CSUM_TCP;
1521                         dflags |= XCT_MACTX_IPH(nh_len >> 2);
1522                         dflags |= XCT_MACTX_IPO(nh_off);
1523                         break;
1524                 case IPPROTO_UDP:
1525                         dflags |= XCT_MACTX_CSUM_UDP;
1526                         dflags |= XCT_MACTX_IPH(nh_len >> 2);
1527                         dflags |= XCT_MACTX_IPO(nh_off);
1528                         break;
1529                 default:
1530                         WARN_ON(1);
1531                 }
1532         }
1533
1534         mactx = dflags | XCT_MACTX_LLEN(skb->len);
1535
1536         spin_lock_irqsave(&txring->lock, flags);
1537
1538         /* Avoid stepping on the same cache line that the DMA controller
1539          * is currently about to send, so leave at least 8 words available.
1540          * Total free space needed is mactx + fragments + 8
1541          */
1542         if (RING_AVAIL(txring) < nfrags + 14) {
1543                 /* no room -- stop the queue and wait for tx intr */
1544                 netif_stop_queue(dev);
1545                 goto out_err;
1546         }
1547
1548         /* Queue up checksum + event descriptors, if needed */
1549         if (mac->num_cs && skb->ip_summed == CHECKSUM_PARTIAL && skb->len > 1540) {
1550                 csring = mac->cs[mac->last_cs];
1551                 mac->last_cs = (mac->last_cs + 1) % mac->num_cs;
1552
1553                 pasemi_mac_queue_csdesc(skb, map, map_size, txring, csring);
1554         }
1555
1556         fill = txring->next_to_fill;
1557         TX_DESC(txring, fill) = mactx;
1558         TX_DESC_INFO(txring, fill).dma = nfrags;
1559         fill++;
1560         TX_DESC_INFO(txring, fill).skb = skb;
1561         for (i = 0; i <= nfrags; i++) {
1562                 TX_DESC(txring, fill+i) =
1563                         XCT_PTR_LEN(map_size[i]) | XCT_PTR_ADDR(map[i]);
1564                 TX_DESC_INFO(txring, fill+i).dma = map[i];
1565         }
1566
1567         /* We have to add an even number of 8-byte entries to the ring
1568          * even if the last one is unused. That means always an odd number
1569          * of pointers + one mactx descriptor.
1570          */
1571         if (nfrags & 1)
1572                 nfrags++;
1573
1574         txring->next_to_fill = (fill + nfrags + 1) & (TX_RING_SIZE-1);
1575
1576         dev->stats.tx_packets++;
1577         dev->stats.tx_bytes += skb->len;
1578
1579         spin_unlock_irqrestore(&txring->lock, flags);
1580
1581         write_dma_reg(PAS_DMA_TXCHAN_INCR(txring->chan.chno), (nfrags+2) >> 1);
1582
1583         return NETDEV_TX_OK;
1584
1585 out_err:
1586         spin_unlock_irqrestore(&txring->lock, flags);
1587 out_err_nolock:
1588         while (nfrags--)
1589                 pci_unmap_single(mac->dma_pdev, map[nfrags], map_size[nfrags],
1590                                  PCI_DMA_TODEVICE);
1591
1592         return NETDEV_TX_BUSY;
1593 }
1594
1595 static void pasemi_mac_set_rx_mode(struct net_device *dev)
1596 {
1597         const struct pasemi_mac *mac = netdev_priv(dev);
1598         unsigned int flags;
1599
1600         flags = read_mac_reg(mac, PAS_MAC_CFG_PCFG);
1601
1602         /* Set promiscuous */
1603         if (dev->flags & IFF_PROMISC)
1604                 flags |= PAS_MAC_CFG_PCFG_PR;
1605         else
1606                 flags &= ~PAS_MAC_CFG_PCFG_PR;
1607
1608         write_mac_reg(mac, PAS_MAC_CFG_PCFG, flags);
1609 }
1610
1611
1612 static int pasemi_mac_poll(struct napi_struct *napi, int budget)
1613 {
1614         struct pasemi_mac *mac = container_of(napi, struct pasemi_mac, napi);
1615         int pkts;
1616
1617         pasemi_mac_clean_tx(tx_ring(mac));
1618         pkts = pasemi_mac_clean_rx(rx_ring(mac), budget);
1619         if (pkts < budget) {
1620                 /* all done, no more packets present */
1621                 napi_complete(napi);
1622
1623                 pasemi_mac_restart_rx_intr(mac);
1624                 pasemi_mac_restart_tx_intr(mac);
1625         }
1626         return pkts;
1627 }
1628
1629 #ifdef CONFIG_NET_POLL_CONTROLLER
1630 /*
1631  * Polling 'interrupt' - used by things like netconsole to send skbs
1632  * without having to re-enable interrupts. It's not called while
1633  * the interrupt routine is executing.
1634  */
1635 static void pasemi_mac_netpoll(struct net_device *dev)
1636 {
1637         const struct pasemi_mac *mac = netdev_priv(dev);
1638
1639         disable_irq(mac->tx->chan.irq);
1640         pasemi_mac_tx_intr(mac->tx->chan.irq, mac->tx);
1641         enable_irq(mac->tx->chan.irq);
1642
1643         disable_irq(mac->rx->chan.irq);
1644         pasemi_mac_rx_intr(mac->rx->chan.irq, mac->rx);
1645         enable_irq(mac->rx->chan.irq);
1646 }
1647 #endif
1648
1649 static int pasemi_mac_change_mtu(struct net_device *dev, int new_mtu)
1650 {
1651         struct pasemi_mac *mac = netdev_priv(dev);
1652         unsigned int reg;
1653         unsigned int rcmdsta = 0;
1654         int running;
1655         int ret = 0;
1656
1657         if (new_mtu < PE_MIN_MTU || new_mtu > PE_MAX_MTU)
1658                 return -EINVAL;
1659
1660         running = netif_running(dev);
1661
1662         if (running) {
1663                 /* Need to stop the interface, clean out all already
1664                  * received buffers, free all unused buffers on the RX
1665                  * interface ring, then finally re-fill the rx ring with
1666                  * the new-size buffers and restart.
1667                  */
1668
1669                 napi_disable(&mac->napi);
1670                 netif_tx_disable(dev);
1671                 pasemi_mac_intf_disable(mac);
1672
1673                 rcmdsta = read_dma_reg(PAS_DMA_RXINT_RCMDSTA(mac->dma_if));
1674                 pasemi_mac_pause_rxint(mac);
1675                 pasemi_mac_clean_rx(rx_ring(mac), RX_RING_SIZE);
1676                 pasemi_mac_free_rx_buffers(mac);
1677
1678         }
1679
1680         /* Setup checksum channels if large MTU and none already allocated */
1681         if (new_mtu > 1500 && !mac->num_cs) {
1682                 pasemi_mac_setup_csrings(mac);
1683                 if (!mac->num_cs) {
1684                         ret = -ENOMEM;
1685                         goto out;
1686                 }
1687         }
1688
1689         /* Change maxf, i.e. what size frames are accepted.
1690          * Need room for ethernet header and CRC word
1691          */
1692         reg = read_mac_reg(mac, PAS_MAC_CFG_MACCFG);
1693         reg &= ~PAS_MAC_CFG_MACCFG_MAXF_M;
1694         reg |= PAS_MAC_CFG_MACCFG_MAXF(new_mtu + ETH_HLEN + 4);
1695         write_mac_reg(mac, PAS_MAC_CFG_MACCFG, reg);
1696
1697         dev->mtu = new_mtu;
1698         /* MTU + ETH_HLEN + VLAN_HLEN + 2 64B cachelines */
1699         mac->bufsz = new_mtu + ETH_HLEN + ETH_FCS_LEN + LOCAL_SKB_ALIGN + 128;
1700
1701 out:
1702         if (running) {
1703                 write_dma_reg(PAS_DMA_RXINT_RCMDSTA(mac->dma_if),
1704                               rcmdsta | PAS_DMA_RXINT_RCMDSTA_EN);
1705
1706                 rx_ring(mac)->next_to_fill = 0;
1707                 pasemi_mac_replenish_rx_ring(dev, RX_RING_SIZE-1);
1708
1709                 napi_enable(&mac->napi);
1710                 netif_start_queue(dev);
1711                 pasemi_mac_intf_enable(mac);
1712         }
1713
1714         return ret;
1715 }
1716
1717 static const struct net_device_ops pasemi_netdev_ops = {
1718         .ndo_open               = pasemi_mac_open,
1719         .ndo_stop               = pasemi_mac_close,
1720         .ndo_start_xmit         = pasemi_mac_start_tx,
1721         .ndo_set_multicast_list = pasemi_mac_set_rx_mode,
1722         .ndo_set_mac_address    = pasemi_mac_set_mac_addr,
1723         .ndo_change_mtu         = pasemi_mac_change_mtu,
1724         .ndo_validate_addr      = eth_validate_addr,
1725 #ifdef CONFIG_NET_POLL_CONTROLLER
1726         .ndo_poll_controller    = pasemi_mac_netpoll,
1727 #endif
1728 };
1729
1730 static int __devinit
1731 pasemi_mac_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
1732 {
1733         struct net_device *dev;
1734         struct pasemi_mac *mac;
1735         int err, ret;
1736
1737         err = pci_enable_device(pdev);
1738         if (err)
1739                 return err;
1740
1741         dev = alloc_etherdev(sizeof(struct pasemi_mac));
1742         if (dev == NULL) {
1743                 dev_err(&pdev->dev,
1744                         "pasemi_mac: Could not allocate ethernet device.\n");
1745                 err = -ENOMEM;
1746                 goto out_disable_device;
1747         }
1748
1749         pci_set_drvdata(pdev, dev);
1750         SET_NETDEV_DEV(dev, &pdev->dev);
1751
1752         mac = netdev_priv(dev);
1753
1754         mac->pdev = pdev;
1755         mac->netdev = dev;
1756
1757         netif_napi_add(dev, &mac->napi, pasemi_mac_poll, 64);
1758
1759         dev->features = NETIF_F_IP_CSUM | NETIF_F_LLTX | NETIF_F_SG |
1760                         NETIF_F_HIGHDMA | NETIF_F_GSO;
1761
1762         mac->lro_mgr.max_aggr = LRO_MAX_AGGR;
1763         mac->lro_mgr.max_desc = MAX_LRO_DESCRIPTORS;
1764         mac->lro_mgr.lro_arr = mac->lro_desc;
1765         mac->lro_mgr.get_skb_header = get_skb_hdr;
1766         mac->lro_mgr.features = LRO_F_NAPI | LRO_F_EXTRACT_VLAN_ID;
1767         mac->lro_mgr.dev = mac->netdev;
1768         mac->lro_mgr.ip_summed = CHECKSUM_UNNECESSARY;
1769         mac->lro_mgr.ip_summed_aggr = CHECKSUM_UNNECESSARY;
1770
1771
1772         mac->dma_pdev = pci_get_device(PCI_VENDOR_ID_PASEMI, 0xa007, NULL);
1773         if (!mac->dma_pdev) {
1774                 dev_err(&mac->pdev->dev, "Can't find DMA Controller\n");
1775                 err = -ENODEV;
1776                 goto out;
1777         }
1778
1779         mac->iob_pdev = pci_get_device(PCI_VENDOR_ID_PASEMI, 0xa001, NULL);
1780         if (!mac->iob_pdev) {
1781                 dev_err(&mac->pdev->dev, "Can't find I/O Bridge\n");
1782                 err = -ENODEV;
1783                 goto out;
1784         }
1785
1786         /* get mac addr from device tree */
1787         if (pasemi_get_mac_addr(mac) || !is_valid_ether_addr(mac->mac_addr)) {
1788                 err = -ENODEV;
1789                 goto out;
1790         }
1791         memcpy(dev->dev_addr, mac->mac_addr, sizeof(mac->mac_addr));
1792
1793         ret = mac_to_intf(mac);
1794         if (ret < 0) {
1795                 dev_err(&mac->pdev->dev, "Can't map DMA interface\n");
1796                 err = -ENODEV;
1797                 goto out;
1798         }
1799         mac->dma_if = ret;
1800
1801         switch (pdev->device) {
1802         case 0xa005:
1803                 mac->type = MAC_TYPE_GMAC;
1804                 break;
1805         case 0xa006:
1806                 mac->type = MAC_TYPE_XAUI;
1807                 break;
1808         default:
1809                 err = -ENODEV;
1810                 goto out;
1811         }
1812
1813         dev->netdev_ops = &pasemi_netdev_ops;
1814         dev->mtu = PE_DEF_MTU;
1815         /* 1500 MTU + ETH_HLEN + VLAN_HLEN + 2 64B cachelines */
1816         mac->bufsz = dev->mtu + ETH_HLEN + ETH_FCS_LEN + LOCAL_SKB_ALIGN + 128;
1817
1818         dev->ethtool_ops = &pasemi_mac_ethtool_ops;
1819
1820         if (err)
1821                 goto out;
1822
1823         mac->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
1824
1825         /* Enable most messages by default */
1826         mac->msg_enable = (NETIF_MSG_IFUP << 1 ) - 1;
1827
1828         err = register_netdev(dev);
1829
1830         if (err) {
1831                 dev_err(&mac->pdev->dev, "register_netdev failed with error %d\n",
1832                         err);
1833                 goto out;
1834         } else if netif_msg_probe(mac)
1835                 printk(KERN_INFO "%s: PA Semi %s: intf %d, hw addr %pM\n",
1836                        dev->name, mac->type == MAC_TYPE_GMAC ? "GMAC" : "XAUI",
1837                        mac->dma_if, dev->dev_addr);
1838
1839         return err;
1840
1841 out:
1842         if (mac->iob_pdev)
1843                 pci_dev_put(mac->iob_pdev);
1844         if (mac->dma_pdev)
1845                 pci_dev_put(mac->dma_pdev);
1846
1847         free_netdev(dev);
1848 out_disable_device:
1849         pci_disable_device(pdev);
1850         return err;
1851
1852 }
1853
1854 static void __devexit pasemi_mac_remove(struct pci_dev *pdev)
1855 {
1856         struct net_device *netdev = pci_get_drvdata(pdev);
1857         struct pasemi_mac *mac;
1858
1859         if (!netdev)
1860                 return;
1861
1862         mac = netdev_priv(netdev);
1863
1864         unregister_netdev(netdev);
1865
1866         pci_disable_device(pdev);
1867         pci_dev_put(mac->dma_pdev);
1868         pci_dev_put(mac->iob_pdev);
1869
1870         pasemi_dma_free_chan(&mac->tx->chan);
1871         pasemi_dma_free_chan(&mac->rx->chan);
1872
1873         pci_set_drvdata(pdev, NULL);
1874         free_netdev(netdev);
1875 }
1876
1877 static DEFINE_PCI_DEVICE_TABLE(pasemi_mac_pci_tbl) = {
1878         { PCI_DEVICE(PCI_VENDOR_ID_PASEMI, 0xa005) },
1879         { PCI_DEVICE(PCI_VENDOR_ID_PASEMI, 0xa006) },
1880         { },
1881 };
1882
1883 MODULE_DEVICE_TABLE(pci, pasemi_mac_pci_tbl);
1884
1885 static struct pci_driver pasemi_mac_driver = {
1886         .name           = "pasemi_mac",
1887         .id_table       = pasemi_mac_pci_tbl,
1888         .probe          = pasemi_mac_probe,
1889         .remove         = __devexit_p(pasemi_mac_remove),
1890 };
1891
1892 static void __exit pasemi_mac_cleanup_module(void)
1893 {
1894         pci_unregister_driver(&pasemi_mac_driver);
1895 }
1896
1897 int pasemi_mac_init_module(void)
1898 {
1899         int err;
1900
1901         err = pasemi_dma_init();
1902         if (err)
1903                 return err;
1904
1905         return pci_register_driver(&pasemi_mac_driver);
1906 }
1907
1908 module_init(pasemi_mac_init_module);
1909 module_exit(pasemi_mac_cleanup_module);