2 * Copyright (C) 2003 - 2009 NetXen, Inc.
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version 2
8 * of the License, or (at your option) any later version.
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place - Suite 330, Boston,
20 * The full GNU General Public License is included in this distribution
21 * in the file called LICENSE.
23 * Contact Information:
27 * Cupertino, CA 95014-0701
31 #include "netxen_nic_hw.h"
32 #include "netxen_nic.h"
33 #include "netxen_nic_phan_reg.h"
35 #define NXHAL_VERSION 1
38 netxen_api_lock(struct netxen_adapter *adapter)
40 u32 done = 0, timeout = 0;
43 /* Acquire PCIE HW semaphore5 */
44 netxen_nic_read_w0(adapter,
45 NETXEN_PCIE_REG(PCIE_SEM5_LOCK), &done);
50 if (++timeout >= NX_OS_CRB_RETRY_COUNT) {
51 printk(KERN_ERR "%s: lock timeout.\n", __func__);
59 netxen_nic_write_w1(adapter,
60 NETXEN_API_LOCK_ID, NX_OS_API_LOCK_DRIVER);
66 netxen_api_unlock(struct netxen_adapter *adapter)
70 /* Release PCIE HW semaphore5 */
71 netxen_nic_read_w0(adapter,
72 NETXEN_PCIE_REG(PCIE_SEM5_UNLOCK), &val);
77 netxen_poll_rsp(struct netxen_adapter *adapter)
79 u32 rsp = NX_CDRP_RSP_OK;
83 /* give atleast 1ms for firmware to respond */
86 if (++timeout > NX_OS_CRB_RETRY_COUNT)
87 return NX_CDRP_RSP_TIMEOUT;
89 netxen_nic_read_w1(adapter, NX_CDRP_CRB_OFFSET, &rsp);
90 } while (!NX_CDRP_IS_RSP(rsp));
96 netxen_issue_cmd(struct netxen_adapter *adapter,
97 u32 pci_fn, u32 version, u32 arg1, u32 arg2, u32 arg3, u32 cmd)
101 u32 rcode = NX_RCODE_SUCCESS;
103 signature = NX_CDRP_SIGNATURE_MAKE(pci_fn, version);
105 /* Acquire semaphore before accessing CRB */
106 if (netxen_api_lock(adapter))
107 return NX_RCODE_TIMEOUT;
109 netxen_nic_write_w1(adapter, NX_SIGN_CRB_OFFSET, signature);
111 netxen_nic_write_w1(adapter, NX_ARG1_CRB_OFFSET, arg1);
113 netxen_nic_write_w1(adapter, NX_ARG2_CRB_OFFSET, arg2);
115 netxen_nic_write_w1(adapter, NX_ARG3_CRB_OFFSET, arg3);
117 netxen_nic_write_w1(adapter, NX_CDRP_CRB_OFFSET,
118 NX_CDRP_FORM_CMD(cmd));
120 rsp = netxen_poll_rsp(adapter);
122 if (rsp == NX_CDRP_RSP_TIMEOUT) {
123 printk(KERN_ERR "%s: card response timeout.\n",
124 netxen_nic_driver_name);
126 rcode = NX_RCODE_TIMEOUT;
127 } else if (rsp == NX_CDRP_RSP_FAIL) {
128 netxen_nic_read_w1(adapter, NX_ARG1_CRB_OFFSET, &rcode);
130 printk(KERN_ERR "%s: failed card response code:0x%x\n",
131 netxen_nic_driver_name, rcode);
134 /* Release semaphore */
135 netxen_api_unlock(adapter);
141 nx_fw_cmd_set_mtu(struct netxen_adapter *adapter, int mtu)
143 u32 rcode = NX_RCODE_SUCCESS;
144 struct netxen_recv_context *recv_ctx = &adapter->recv_ctx;
146 if (recv_ctx->state == NX_HOST_CTX_STATE_ACTIVE)
147 rcode = netxen_issue_cmd(adapter,
148 adapter->ahw.pci_func,
150 recv_ctx->context_id,
153 NX_CDRP_CMD_SET_MTU);
155 if (rcode != NX_RCODE_SUCCESS)
162 nx_fw_cmd_create_rx_ctx(struct netxen_adapter *adapter)
165 nx_hostrq_rx_ctx_t *prq;
166 nx_cardrsp_rx_ctx_t *prsp;
167 nx_hostrq_rds_ring_t *prq_rds;
168 nx_hostrq_sds_ring_t *prq_sds;
169 nx_cardrsp_rds_ring_t *prsp_rds;
170 nx_cardrsp_sds_ring_t *prsp_sds;
171 struct nx_host_rds_ring *rds_ring;
172 struct nx_host_sds_ring *sds_ring;
174 dma_addr_t hostrq_phys_addr, cardrsp_phys_addr;
177 int i, nrds_rings, nsds_rings;
178 size_t rq_size, rsp_size;
183 struct netxen_recv_context *recv_ctx = &adapter->recv_ctx;
185 nrds_rings = adapter->max_rds_rings;
186 nsds_rings = adapter->max_sds_rings;
189 SIZEOF_HOSTRQ_RX(nx_hostrq_rx_ctx_t, nrds_rings, nsds_rings);
191 SIZEOF_CARDRSP_RX(nx_cardrsp_rx_ctx_t, nrds_rings, nsds_rings);
193 addr = pci_alloc_consistent(adapter->pdev,
194 rq_size, &hostrq_phys_addr);
197 prq = (nx_hostrq_rx_ctx_t *)addr;
199 addr = pci_alloc_consistent(adapter->pdev,
200 rsp_size, &cardrsp_phys_addr);
205 prsp = (nx_cardrsp_rx_ctx_t *)addr;
207 prq->host_rsp_dma_addr = cpu_to_le64(cardrsp_phys_addr);
209 cap = (NX_CAP0_LEGACY_CONTEXT | NX_CAP0_LEGACY_MN);
210 cap |= (NX_CAP0_JUMBO_CONTIGUOUS | NX_CAP0_LRO_CONTIGUOUS);
212 prq->capabilities[0] = cpu_to_le32(cap);
213 prq->host_int_crb_mode =
214 cpu_to_le32(NX_HOST_INT_CRB_MODE_SHARED);
215 prq->host_rds_crb_mode =
216 cpu_to_le32(NX_HOST_RDS_CRB_MODE_UNIQUE);
218 prq->num_rds_rings = cpu_to_le16(nrds_rings);
219 prq->num_sds_rings = cpu_to_le16(nsds_rings);
220 prq->rds_ring_offset = cpu_to_le32(0);
222 val = le32_to_cpu(prq->rds_ring_offset) +
223 (sizeof(nx_hostrq_rds_ring_t) * nrds_rings);
224 prq->sds_ring_offset = cpu_to_le32(val);
226 prq_rds = (nx_hostrq_rds_ring_t *)(prq->data +
227 le32_to_cpu(prq->rds_ring_offset));
229 for (i = 0; i < nrds_rings; i++) {
231 rds_ring = &recv_ctx->rds_rings[i];
233 prq_rds[i].host_phys_addr = cpu_to_le64(rds_ring->phys_addr);
234 prq_rds[i].ring_size = cpu_to_le32(rds_ring->num_desc);
235 prq_rds[i].ring_kind = cpu_to_le32(i);
236 prq_rds[i].buff_size = cpu_to_le64(rds_ring->dma_size);
239 prq_sds = (nx_hostrq_sds_ring_t *)(prq->data +
240 le32_to_cpu(prq->sds_ring_offset));
242 for (i = 0; i < nsds_rings; i++) {
244 sds_ring = &recv_ctx->sds_rings[i];
246 prq_sds[i].host_phys_addr = cpu_to_le64(sds_ring->phys_addr);
247 prq_sds[i].ring_size = cpu_to_le32(sds_ring->num_desc);
248 prq_sds[i].msi_index = cpu_to_le16(i);
251 phys_addr = hostrq_phys_addr;
252 err = netxen_issue_cmd(adapter,
253 adapter->ahw.pci_func,
255 (u32)(phys_addr >> 32),
256 (u32)(phys_addr & 0xffffffff),
258 NX_CDRP_CMD_CREATE_RX_CTX);
261 "Failed to create rx ctx in firmware%d\n", err);
266 prsp_rds = ((nx_cardrsp_rds_ring_t *)
267 &prsp->data[le32_to_cpu(prsp->rds_ring_offset)]);
269 for (i = 0; i < le16_to_cpu(prsp->num_rds_rings); i++) {
270 rds_ring = &recv_ctx->rds_rings[i];
272 reg = le32_to_cpu(prsp_rds[i].host_producer_crb);
273 rds_ring->crb_rcv_producer = NETXEN_NIC_REG(reg - 0x200);
276 prsp_sds = ((nx_cardrsp_sds_ring_t *)
277 &prsp->data[le32_to_cpu(prsp->sds_ring_offset)]);
279 for (i = 0; i < le16_to_cpu(prsp->num_sds_rings); i++) {
280 sds_ring = &recv_ctx->sds_rings[i];
282 reg = le32_to_cpu(prsp_sds[i].host_consumer_crb);
283 sds_ring->crb_sts_consumer = NETXEN_NIC_REG(reg - 0x200);
285 reg = le32_to_cpu(prsp_sds[i].interrupt_crb);
286 sds_ring->crb_intr_mask = NETXEN_NIC_REG(reg - 0x200);
289 recv_ctx->state = le32_to_cpu(prsp->host_ctx_state);
290 recv_ctx->context_id = le16_to_cpu(prsp->context_id);
291 recv_ctx->virt_port = prsp->virt_port;
294 pci_free_consistent(adapter->pdev, rsp_size, prsp, cardrsp_phys_addr);
296 pci_free_consistent(adapter->pdev, rq_size, prq, hostrq_phys_addr);
301 nx_fw_cmd_destroy_rx_ctx(struct netxen_adapter *adapter)
303 struct netxen_recv_context *recv_ctx = &adapter->recv_ctx;
305 if (netxen_issue_cmd(adapter,
306 adapter->ahw.pci_func,
308 recv_ctx->context_id,
309 NX_DESTROY_CTX_RESET,
311 NX_CDRP_CMD_DESTROY_RX_CTX)) {
314 "%s: Failed to destroy rx ctx in firmware\n",
315 netxen_nic_driver_name);
320 nx_fw_cmd_create_tx_ctx(struct netxen_adapter *adapter)
322 nx_hostrq_tx_ctx_t *prq;
323 nx_hostrq_cds_ring_t *prq_cds;
324 nx_cardrsp_tx_ctx_t *prsp;
325 void *rq_addr, *rsp_addr;
326 size_t rq_size, rsp_size;
329 u64 offset, phys_addr;
330 dma_addr_t rq_phys_addr, rsp_phys_addr;
332 rq_size = SIZEOF_HOSTRQ_TX(nx_hostrq_tx_ctx_t);
333 rq_addr = pci_alloc_consistent(adapter->pdev,
334 rq_size, &rq_phys_addr);
338 rsp_size = SIZEOF_CARDRSP_TX(nx_cardrsp_tx_ctx_t);
339 rsp_addr = pci_alloc_consistent(adapter->pdev,
340 rsp_size, &rsp_phys_addr);
346 memset(rq_addr, 0, rq_size);
347 prq = (nx_hostrq_tx_ctx_t *)rq_addr;
349 memset(rsp_addr, 0, rsp_size);
350 prsp = (nx_cardrsp_tx_ctx_t *)rsp_addr;
352 prq->host_rsp_dma_addr = cpu_to_le64(rsp_phys_addr);
354 temp = (NX_CAP0_LEGACY_CONTEXT | NX_CAP0_LEGACY_MN | NX_CAP0_LSO);
355 prq->capabilities[0] = cpu_to_le32(temp);
357 prq->host_int_crb_mode =
358 cpu_to_le32(NX_HOST_INT_CRB_MODE_SHARED);
360 prq->interrupt_ctl = 0;
363 prq->dummy_dma_addr = cpu_to_le64(adapter->dummy_dma.phys_addr);
365 offset = adapter->ctx_desc_phys_addr+sizeof(struct netxen_ring_ctx);
366 prq->cmd_cons_dma_addr = cpu_to_le64(offset);
368 prq_cds = &prq->cds_ring;
370 prq_cds->host_phys_addr =
371 cpu_to_le64(adapter->ahw.cmd_desc_phys_addr);
373 prq_cds->ring_size = cpu_to_le32(adapter->num_txd);
375 phys_addr = rq_phys_addr;
376 err = netxen_issue_cmd(adapter,
377 adapter->ahw.pci_func,
379 (u32)(phys_addr >> 32),
380 ((u32)phys_addr & 0xffffffff),
382 NX_CDRP_CMD_CREATE_TX_CTX);
384 if (err == NX_RCODE_SUCCESS) {
385 temp = le32_to_cpu(prsp->cds_ring.host_producer_crb);
386 adapter->crb_addr_cmd_producer =
387 NETXEN_NIC_REG(temp - 0x200);
390 le32_to_cpu(prsp->host_ctx_state);
392 adapter->tx_context_id =
393 le16_to_cpu(prsp->context_id);
396 "Failed to create tx ctx in firmware%d\n", err);
400 pci_free_consistent(adapter->pdev, rsp_size, rsp_addr, rsp_phys_addr);
403 pci_free_consistent(adapter->pdev, rq_size, rq_addr, rq_phys_addr);
409 nx_fw_cmd_destroy_tx_ctx(struct netxen_adapter *adapter)
411 if (netxen_issue_cmd(adapter,
412 adapter->ahw.pci_func,
414 adapter->tx_context_id,
415 NX_DESTROY_CTX_RESET,
417 NX_CDRP_CMD_DESTROY_TX_CTX)) {
420 "%s: Failed to destroy tx ctx in firmware\n",
421 netxen_nic_driver_name);
425 static u64 ctx_addr_sig_regs[][3] = {
426 {NETXEN_NIC_REG(0x188), NETXEN_NIC_REG(0x18c), NETXEN_NIC_REG(0x1c0)},
427 {NETXEN_NIC_REG(0x190), NETXEN_NIC_REG(0x194), NETXEN_NIC_REG(0x1c4)},
428 {NETXEN_NIC_REG(0x198), NETXEN_NIC_REG(0x19c), NETXEN_NIC_REG(0x1c8)},
429 {NETXEN_NIC_REG(0x1a0), NETXEN_NIC_REG(0x1a4), NETXEN_NIC_REG(0x1cc)}
432 #define CRB_CTX_ADDR_REG_LO(FUNC_ID) (ctx_addr_sig_regs[FUNC_ID][0])
433 #define CRB_CTX_ADDR_REG_HI(FUNC_ID) (ctx_addr_sig_regs[FUNC_ID][2])
434 #define CRB_CTX_SIGNATURE_REG(FUNC_ID) (ctx_addr_sig_regs[FUNC_ID][1])
436 #define lower32(x) ((u32)((x) & 0xffffffff))
437 #define upper32(x) ((u32)(((u64)(x) >> 32) & 0xffffffff))
439 static struct netxen_recv_crb recv_crb_registers[] = {
442 /* crb_rcv_producer: */
444 NETXEN_NIC_REG(0x100),
446 NETXEN_NIC_REG(0x110),
448 NETXEN_NIC_REG(0x120)
450 /* crb_sts_consumer: */
451 NETXEN_NIC_REG(0x138),
455 /* crb_rcv_producer: */
457 NETXEN_NIC_REG(0x144),
459 NETXEN_NIC_REG(0x154),
461 NETXEN_NIC_REG(0x164)
463 /* crb_sts_consumer: */
464 NETXEN_NIC_REG(0x17c),
468 /* crb_rcv_producer: */
470 NETXEN_NIC_REG(0x1d8),
472 NETXEN_NIC_REG(0x1f8),
474 NETXEN_NIC_REG(0x208)
476 /* crb_sts_consumer: */
477 NETXEN_NIC_REG(0x220),
481 /* crb_rcv_producer: */
483 NETXEN_NIC_REG(0x22c),
485 NETXEN_NIC_REG(0x23c),
487 NETXEN_NIC_REG(0x24c)
489 /* crb_sts_consumer: */
490 NETXEN_NIC_REG(0x264),
495 netxen_init_old_ctx(struct netxen_adapter *adapter)
497 struct netxen_recv_context *recv_ctx;
498 struct nx_host_rds_ring *rds_ring;
499 struct nx_host_sds_ring *sds_ring;
501 int func_id = adapter->portnum;
503 adapter->ctx_desc->cmd_ring_addr =
504 cpu_to_le64(adapter->ahw.cmd_desc_phys_addr);
505 adapter->ctx_desc->cmd_ring_size =
506 cpu_to_le32(adapter->num_txd);
508 recv_ctx = &adapter->recv_ctx;
510 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
511 rds_ring = &recv_ctx->rds_rings[ring];
513 adapter->ctx_desc->rcv_ctx[ring].rcv_ring_addr =
514 cpu_to_le64(rds_ring->phys_addr);
515 adapter->ctx_desc->rcv_ctx[ring].rcv_ring_size =
516 cpu_to_le32(rds_ring->num_desc);
518 sds_ring = &recv_ctx->sds_rings[0];
519 adapter->ctx_desc->sts_ring_addr = cpu_to_le64(sds_ring->phys_addr);
520 adapter->ctx_desc->sts_ring_size = cpu_to_le32(sds_ring->num_desc);
522 adapter->pci_write_normalize(adapter, CRB_CTX_ADDR_REG_LO(func_id),
523 lower32(adapter->ctx_desc_phys_addr));
524 adapter->pci_write_normalize(adapter, CRB_CTX_ADDR_REG_HI(func_id),
525 upper32(adapter->ctx_desc_phys_addr));
526 adapter->pci_write_normalize(adapter, CRB_CTX_SIGNATURE_REG(func_id),
527 NETXEN_CTX_SIGNATURE | func_id);
531 static uint32_t sw_int_mask[4] = {
532 CRB_SW_INT_MASK_0, CRB_SW_INT_MASK_1,
533 CRB_SW_INT_MASK_2, CRB_SW_INT_MASK_3
536 int netxen_alloc_hw_resources(struct netxen_adapter *adapter)
538 struct netxen_hardware_context *hw = &adapter->ahw;
543 struct netxen_recv_context *recv_ctx;
544 struct nx_host_rds_ring *rds_ring;
545 struct nx_host_sds_ring *sds_ring;
547 struct pci_dev *pdev = adapter->pdev;
548 struct net_device *netdev = adapter->netdev;
550 err = netxen_receive_peg_ready(adapter);
552 printk(KERN_ERR "Rcv Peg initialization not complete:%x.\n",
557 addr = pci_alloc_consistent(pdev,
558 sizeof(struct netxen_ring_ctx) + sizeof(uint32_t),
559 &adapter->ctx_desc_phys_addr);
562 dev_err(&pdev->dev, "failed to allocate hw context\n");
565 memset(addr, 0, sizeof(struct netxen_ring_ctx));
566 adapter->ctx_desc = (struct netxen_ring_ctx *)addr;
567 adapter->ctx_desc->ctx_id = cpu_to_le32(adapter->portnum);
568 adapter->ctx_desc->cmd_consumer_offset =
569 cpu_to_le64(adapter->ctx_desc_phys_addr +
570 sizeof(struct netxen_ring_ctx));
571 adapter->cmd_consumer =
572 (__le32 *)(((char *)addr) + sizeof(struct netxen_ring_ctx));
575 addr = pci_alloc_consistent(pdev,
576 TX_DESC_RINGSIZE(adapter),
577 &hw->cmd_desc_phys_addr);
580 dev_err(&pdev->dev, "%s: failed to allocate tx desc ring\n",
585 hw->cmd_desc_head = (struct cmd_desc_type0 *)addr;
587 recv_ctx = &adapter->recv_ctx;
589 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
590 rds_ring = &recv_ctx->rds_rings[ring];
591 addr = pci_alloc_consistent(adapter->pdev,
592 RCV_DESC_RINGSIZE(rds_ring),
593 &rds_ring->phys_addr);
596 "%s: failed to allocate rds ring [%d]\n",
601 rds_ring->desc_head = (struct rcv_desc *)addr;
603 if (adapter->fw_major < 4)
604 rds_ring->crb_rcv_producer =
605 recv_crb_registers[adapter->portnum].
606 crb_rcv_producer[ring];
609 for (ring = 0; ring < adapter->max_sds_rings; ring++) {
610 sds_ring = &recv_ctx->sds_rings[ring];
612 addr = pci_alloc_consistent(adapter->pdev,
613 STATUS_DESC_RINGSIZE(sds_ring),
614 &sds_ring->phys_addr);
617 "%s: failed to allocate sds ring [%d]\n",
622 sds_ring->desc_head = (struct status_desc *)addr;
626 if (adapter->fw_major >= 4) {
627 err = nx_fw_cmd_create_rx_ctx(adapter);
630 err = nx_fw_cmd_create_tx_ctx(adapter);
634 sds_ring = &recv_ctx->sds_rings[0];
635 sds_ring->crb_sts_consumer =
636 recv_crb_registers[adapter->portnum].crb_sts_consumer;
638 recv_ctx->sds_rings[0].crb_intr_mask =
639 sw_int_mask[adapter->portnum];
641 err = netxen_init_old_ctx(adapter);
643 netxen_free_hw_resources(adapter);
652 netxen_free_hw_resources(adapter);
656 void netxen_free_hw_resources(struct netxen_adapter *adapter)
658 struct netxen_recv_context *recv_ctx;
659 struct nx_host_rds_ring *rds_ring;
660 struct nx_host_sds_ring *sds_ring;
663 if (adapter->fw_major >= 4) {
664 nx_fw_cmd_destroy_tx_ctx(adapter);
665 nx_fw_cmd_destroy_rx_ctx(adapter);
668 if (adapter->ctx_desc != NULL) {
669 pci_free_consistent(adapter->pdev,
670 sizeof(struct netxen_ring_ctx) +
673 adapter->ctx_desc_phys_addr);
674 adapter->ctx_desc = NULL;
677 if (adapter->ahw.cmd_desc_head != NULL) {
678 pci_free_consistent(adapter->pdev,
679 sizeof(struct cmd_desc_type0) *
681 adapter->ahw.cmd_desc_head,
682 adapter->ahw.cmd_desc_phys_addr);
683 adapter->ahw.cmd_desc_head = NULL;
686 recv_ctx = &adapter->recv_ctx;
687 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
688 rds_ring = &recv_ctx->rds_rings[ring];
690 if (rds_ring->desc_head != NULL) {
691 pci_free_consistent(adapter->pdev,
692 RCV_DESC_RINGSIZE(rds_ring),
694 rds_ring->phys_addr);
695 rds_ring->desc_head = NULL;
699 for (ring = 0; ring < adapter->max_sds_rings; ring++) {
700 sds_ring = &recv_ctx->sds_rings[ring];
702 if (sds_ring->desc_head != NULL) {
703 pci_free_consistent(adapter->pdev,
704 STATUS_DESC_RINGSIZE(sds_ring),
706 sds_ring->phys_addr);
707 sds_ring->desc_head = NULL;