2 * Copyright (C) 2003 - 2009 NetXen, Inc.
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version 2
8 * of the License, or (at your option) any later version.
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place - Suite 330, Boston,
20 * The full GNU General Public License is included in this distribution
21 * in the file called LICENSE.
23 * Contact Information:
27 * Cupertino, CA 95014-0701
31 #include "netxen_nic_hw.h"
32 #include "netxen_nic.h"
33 #include "netxen_nic_phan_reg.h"
35 #define NXHAL_VERSION 1
38 netxen_api_lock(struct netxen_adapter *adapter)
40 u32 done = 0, timeout = 0;
43 /* Acquire PCIE HW semaphore5 */
44 done = NXRD32(adapter, NETXEN_PCIE_REG(PCIE_SEM5_LOCK));
49 if (++timeout >= NX_OS_CRB_RETRY_COUNT) {
50 printk(KERN_ERR "%s: lock timeout.\n", __func__);
59 NETXEN_API_LOCK_ID, NX_OS_API_LOCK_DRIVER);
65 netxen_api_unlock(struct netxen_adapter *adapter)
67 /* Release PCIE HW semaphore5 */
68 NXRD32(adapter, NETXEN_PCIE_REG(PCIE_SEM5_UNLOCK));
73 netxen_poll_rsp(struct netxen_adapter *adapter)
75 u32 rsp = NX_CDRP_RSP_OK;
79 /* give atleast 1ms for firmware to respond */
82 if (++timeout > NX_OS_CRB_RETRY_COUNT)
83 return NX_CDRP_RSP_TIMEOUT;
85 rsp = NXRD32(adapter, NX_CDRP_CRB_OFFSET);
86 } while (!NX_CDRP_IS_RSP(rsp));
92 netxen_issue_cmd(struct netxen_adapter *adapter,
93 u32 pci_fn, u32 version, u32 arg1, u32 arg2, u32 arg3, u32 cmd)
97 u32 rcode = NX_RCODE_SUCCESS;
99 signature = NX_CDRP_SIGNATURE_MAKE(pci_fn, version);
101 /* Acquire semaphore before accessing CRB */
102 if (netxen_api_lock(adapter))
103 return NX_RCODE_TIMEOUT;
105 NXWR32(adapter, NX_SIGN_CRB_OFFSET, signature);
107 NXWR32(adapter, NX_ARG1_CRB_OFFSET, arg1);
109 NXWR32(adapter, NX_ARG2_CRB_OFFSET, arg2);
111 NXWR32(adapter, NX_ARG3_CRB_OFFSET, arg3);
113 NXWR32(adapter, NX_CDRP_CRB_OFFSET, NX_CDRP_FORM_CMD(cmd));
115 rsp = netxen_poll_rsp(adapter);
117 if (rsp == NX_CDRP_RSP_TIMEOUT) {
118 printk(KERN_ERR "%s: card response timeout.\n",
119 netxen_nic_driver_name);
121 rcode = NX_RCODE_TIMEOUT;
122 } else if (rsp == NX_CDRP_RSP_FAIL) {
123 rcode = NXRD32(adapter, NX_ARG1_CRB_OFFSET);
125 printk(KERN_ERR "%s: failed card response code:0x%x\n",
126 netxen_nic_driver_name, rcode);
129 /* Release semaphore */
130 netxen_api_unlock(adapter);
136 nx_fw_cmd_set_mtu(struct netxen_adapter *adapter, int mtu)
138 u32 rcode = NX_RCODE_SUCCESS;
139 struct netxen_recv_context *recv_ctx = &adapter->recv_ctx;
141 if (recv_ctx->state == NX_HOST_CTX_STATE_ACTIVE)
142 rcode = netxen_issue_cmd(adapter,
143 adapter->ahw.pci_func,
145 recv_ctx->context_id,
148 NX_CDRP_CMD_SET_MTU);
150 if (rcode != NX_RCODE_SUCCESS)
157 nx_fw_cmd_create_rx_ctx(struct netxen_adapter *adapter)
160 nx_hostrq_rx_ctx_t *prq;
161 nx_cardrsp_rx_ctx_t *prsp;
162 nx_hostrq_rds_ring_t *prq_rds;
163 nx_hostrq_sds_ring_t *prq_sds;
164 nx_cardrsp_rds_ring_t *prsp_rds;
165 nx_cardrsp_sds_ring_t *prsp_sds;
166 struct nx_host_rds_ring *rds_ring;
167 struct nx_host_sds_ring *sds_ring;
169 dma_addr_t hostrq_phys_addr, cardrsp_phys_addr;
172 int i, nrds_rings, nsds_rings;
173 size_t rq_size, rsp_size;
178 struct netxen_recv_context *recv_ctx = &adapter->recv_ctx;
180 nrds_rings = adapter->max_rds_rings;
181 nsds_rings = adapter->max_sds_rings;
184 SIZEOF_HOSTRQ_RX(nx_hostrq_rx_ctx_t, nrds_rings, nsds_rings);
186 SIZEOF_CARDRSP_RX(nx_cardrsp_rx_ctx_t, nrds_rings, nsds_rings);
188 addr = pci_alloc_consistent(adapter->pdev,
189 rq_size, &hostrq_phys_addr);
192 prq = (nx_hostrq_rx_ctx_t *)addr;
194 addr = pci_alloc_consistent(adapter->pdev,
195 rsp_size, &cardrsp_phys_addr);
200 prsp = (nx_cardrsp_rx_ctx_t *)addr;
202 prq->host_rsp_dma_addr = cpu_to_le64(cardrsp_phys_addr);
204 cap = (NX_CAP0_LEGACY_CONTEXT | NX_CAP0_LEGACY_MN);
205 cap |= (NX_CAP0_JUMBO_CONTIGUOUS | NX_CAP0_LRO_CONTIGUOUS);
206 if (adapter->capabilities & NX_FW_CAPABILITY_HW_LRO)
207 cap |= NX_CAP0_HW_LRO;
209 prq->capabilities[0] = cpu_to_le32(cap);
210 prq->host_int_crb_mode =
211 cpu_to_le32(NX_HOST_INT_CRB_MODE_SHARED);
212 prq->host_rds_crb_mode =
213 cpu_to_le32(NX_HOST_RDS_CRB_MODE_UNIQUE);
215 prq->num_rds_rings = cpu_to_le16(nrds_rings);
216 prq->num_sds_rings = cpu_to_le16(nsds_rings);
217 prq->rds_ring_offset = cpu_to_le32(0);
219 val = le32_to_cpu(prq->rds_ring_offset) +
220 (sizeof(nx_hostrq_rds_ring_t) * nrds_rings);
221 prq->sds_ring_offset = cpu_to_le32(val);
223 prq_rds = (nx_hostrq_rds_ring_t *)(prq->data +
224 le32_to_cpu(prq->rds_ring_offset));
226 for (i = 0; i < nrds_rings; i++) {
228 rds_ring = &recv_ctx->rds_rings[i];
230 prq_rds[i].host_phys_addr = cpu_to_le64(rds_ring->phys_addr);
231 prq_rds[i].ring_size = cpu_to_le32(rds_ring->num_desc);
232 prq_rds[i].ring_kind = cpu_to_le32(i);
233 prq_rds[i].buff_size = cpu_to_le64(rds_ring->dma_size);
236 prq_sds = (nx_hostrq_sds_ring_t *)(prq->data +
237 le32_to_cpu(prq->sds_ring_offset));
239 for (i = 0; i < nsds_rings; i++) {
241 sds_ring = &recv_ctx->sds_rings[i];
243 prq_sds[i].host_phys_addr = cpu_to_le64(sds_ring->phys_addr);
244 prq_sds[i].ring_size = cpu_to_le32(sds_ring->num_desc);
245 prq_sds[i].msi_index = cpu_to_le16(i);
248 phys_addr = hostrq_phys_addr;
249 err = netxen_issue_cmd(adapter,
250 adapter->ahw.pci_func,
252 (u32)(phys_addr >> 32),
253 (u32)(phys_addr & 0xffffffff),
255 NX_CDRP_CMD_CREATE_RX_CTX);
258 "Failed to create rx ctx in firmware%d\n", err);
263 prsp_rds = ((nx_cardrsp_rds_ring_t *)
264 &prsp->data[le32_to_cpu(prsp->rds_ring_offset)]);
266 for (i = 0; i < le16_to_cpu(prsp->num_rds_rings); i++) {
267 rds_ring = &recv_ctx->rds_rings[i];
269 reg = le32_to_cpu(prsp_rds[i].host_producer_crb);
270 rds_ring->crb_rcv_producer = NETXEN_NIC_REG(reg - 0x200);
273 prsp_sds = ((nx_cardrsp_sds_ring_t *)
274 &prsp->data[le32_to_cpu(prsp->sds_ring_offset)]);
276 for (i = 0; i < le16_to_cpu(prsp->num_sds_rings); i++) {
277 sds_ring = &recv_ctx->sds_rings[i];
279 reg = le32_to_cpu(prsp_sds[i].host_consumer_crb);
280 sds_ring->crb_sts_consumer = NETXEN_NIC_REG(reg - 0x200);
282 reg = le32_to_cpu(prsp_sds[i].interrupt_crb);
283 sds_ring->crb_intr_mask = NETXEN_NIC_REG(reg - 0x200);
286 recv_ctx->state = le32_to_cpu(prsp->host_ctx_state);
287 recv_ctx->context_id = le16_to_cpu(prsp->context_id);
288 recv_ctx->virt_port = prsp->virt_port;
291 pci_free_consistent(adapter->pdev, rsp_size, prsp, cardrsp_phys_addr);
293 pci_free_consistent(adapter->pdev, rq_size, prq, hostrq_phys_addr);
298 nx_fw_cmd_destroy_rx_ctx(struct netxen_adapter *adapter)
300 struct netxen_recv_context *recv_ctx = &adapter->recv_ctx;
302 if (netxen_issue_cmd(adapter,
303 adapter->ahw.pci_func,
305 recv_ctx->context_id,
306 NX_DESTROY_CTX_RESET,
308 NX_CDRP_CMD_DESTROY_RX_CTX)) {
311 "%s: Failed to destroy rx ctx in firmware\n",
312 netxen_nic_driver_name);
317 nx_fw_cmd_create_tx_ctx(struct netxen_adapter *adapter)
319 nx_hostrq_tx_ctx_t *prq;
320 nx_hostrq_cds_ring_t *prq_cds;
321 nx_cardrsp_tx_ctx_t *prsp;
322 void *rq_addr, *rsp_addr;
323 size_t rq_size, rsp_size;
326 u64 offset, phys_addr;
327 dma_addr_t rq_phys_addr, rsp_phys_addr;
328 struct nx_host_tx_ring *tx_ring = adapter->tx_ring;
329 struct netxen_recv_context *recv_ctx = &adapter->recv_ctx;
331 rq_size = SIZEOF_HOSTRQ_TX(nx_hostrq_tx_ctx_t);
332 rq_addr = pci_alloc_consistent(adapter->pdev,
333 rq_size, &rq_phys_addr);
337 rsp_size = SIZEOF_CARDRSP_TX(nx_cardrsp_tx_ctx_t);
338 rsp_addr = pci_alloc_consistent(adapter->pdev,
339 rsp_size, &rsp_phys_addr);
345 memset(rq_addr, 0, rq_size);
346 prq = (nx_hostrq_tx_ctx_t *)rq_addr;
348 memset(rsp_addr, 0, rsp_size);
349 prsp = (nx_cardrsp_tx_ctx_t *)rsp_addr;
351 prq->host_rsp_dma_addr = cpu_to_le64(rsp_phys_addr);
353 temp = (NX_CAP0_LEGACY_CONTEXT | NX_CAP0_LEGACY_MN | NX_CAP0_LSO);
354 prq->capabilities[0] = cpu_to_le32(temp);
356 prq->host_int_crb_mode =
357 cpu_to_le32(NX_HOST_INT_CRB_MODE_SHARED);
359 prq->interrupt_ctl = 0;
362 prq->dummy_dma_addr = cpu_to_le64(adapter->dummy_dma.phys_addr);
364 offset = recv_ctx->phys_addr + sizeof(struct netxen_ring_ctx);
365 prq->cmd_cons_dma_addr = cpu_to_le64(offset);
367 prq_cds = &prq->cds_ring;
369 prq_cds->host_phys_addr = cpu_to_le64(tx_ring->phys_addr);
370 prq_cds->ring_size = cpu_to_le32(tx_ring->num_desc);
372 phys_addr = rq_phys_addr;
373 err = netxen_issue_cmd(adapter,
374 adapter->ahw.pci_func,
376 (u32)(phys_addr >> 32),
377 ((u32)phys_addr & 0xffffffff),
379 NX_CDRP_CMD_CREATE_TX_CTX);
381 if (err == NX_RCODE_SUCCESS) {
382 temp = le32_to_cpu(prsp->cds_ring.host_producer_crb);
383 tx_ring->crb_cmd_producer = NETXEN_NIC_REG(temp - 0x200);
386 le32_to_cpu(prsp->host_ctx_state);
388 adapter->tx_context_id =
389 le16_to_cpu(prsp->context_id);
392 "Failed to create tx ctx in firmware%d\n", err);
396 pci_free_consistent(adapter->pdev, rsp_size, rsp_addr, rsp_phys_addr);
399 pci_free_consistent(adapter->pdev, rq_size, rq_addr, rq_phys_addr);
405 nx_fw_cmd_destroy_tx_ctx(struct netxen_adapter *adapter)
407 if (netxen_issue_cmd(adapter,
408 adapter->ahw.pci_func,
410 adapter->tx_context_id,
411 NX_DESTROY_CTX_RESET,
413 NX_CDRP_CMD_DESTROY_TX_CTX)) {
416 "%s: Failed to destroy tx ctx in firmware\n",
417 netxen_nic_driver_name);
421 static u64 ctx_addr_sig_regs[][3] = {
422 {NETXEN_NIC_REG(0x188), NETXEN_NIC_REG(0x18c), NETXEN_NIC_REG(0x1c0)},
423 {NETXEN_NIC_REG(0x190), NETXEN_NIC_REG(0x194), NETXEN_NIC_REG(0x1c4)},
424 {NETXEN_NIC_REG(0x198), NETXEN_NIC_REG(0x19c), NETXEN_NIC_REG(0x1c8)},
425 {NETXEN_NIC_REG(0x1a0), NETXEN_NIC_REG(0x1a4), NETXEN_NIC_REG(0x1cc)}
428 #define CRB_CTX_ADDR_REG_LO(FUNC_ID) (ctx_addr_sig_regs[FUNC_ID][0])
429 #define CRB_CTX_ADDR_REG_HI(FUNC_ID) (ctx_addr_sig_regs[FUNC_ID][2])
430 #define CRB_CTX_SIGNATURE_REG(FUNC_ID) (ctx_addr_sig_regs[FUNC_ID][1])
432 #define lower32(x) ((u32)((x) & 0xffffffff))
433 #define upper32(x) ((u32)(((u64)(x) >> 32) & 0xffffffff))
435 static struct netxen_recv_crb recv_crb_registers[] = {
438 /* crb_rcv_producer: */
440 NETXEN_NIC_REG(0x100),
442 NETXEN_NIC_REG(0x110),
444 NETXEN_NIC_REG(0x120)
446 /* crb_sts_consumer: */
448 NETXEN_NIC_REG(0x138),
449 NETXEN_NIC_REG_2(0x000),
450 NETXEN_NIC_REG_2(0x004),
451 NETXEN_NIC_REG_2(0x008),
456 NETXEN_NIC_REG_2(0x044),
457 NETXEN_NIC_REG_2(0x048),
458 NETXEN_NIC_REG_2(0x04c),
463 /* crb_rcv_producer: */
465 NETXEN_NIC_REG(0x144),
467 NETXEN_NIC_REG(0x154),
469 NETXEN_NIC_REG(0x164)
471 /* crb_sts_consumer: */
473 NETXEN_NIC_REG(0x17c),
474 NETXEN_NIC_REG_2(0x020),
475 NETXEN_NIC_REG_2(0x024),
476 NETXEN_NIC_REG_2(0x028),
481 NETXEN_NIC_REG_2(0x064),
482 NETXEN_NIC_REG_2(0x068),
483 NETXEN_NIC_REG_2(0x06c),
488 /* crb_rcv_producer: */
490 NETXEN_NIC_REG(0x1d8),
492 NETXEN_NIC_REG(0x1f8),
494 NETXEN_NIC_REG(0x208)
496 /* crb_sts_consumer: */
498 NETXEN_NIC_REG(0x220),
499 NETXEN_NIC_REG_2(0x03c),
500 NETXEN_NIC_REG_2(0x03c),
501 NETXEN_NIC_REG_2(0x03c),
506 NETXEN_NIC_REG_2(0x03c),
507 NETXEN_NIC_REG_2(0x03c),
508 NETXEN_NIC_REG_2(0x03c),
513 /* crb_rcv_producer: */
515 NETXEN_NIC_REG(0x22c),
517 NETXEN_NIC_REG(0x23c),
519 NETXEN_NIC_REG(0x24c)
521 /* crb_sts_consumer: */
523 NETXEN_NIC_REG(0x264),
524 NETXEN_NIC_REG_2(0x03c),
525 NETXEN_NIC_REG_2(0x03c),
526 NETXEN_NIC_REG_2(0x03c),
531 NETXEN_NIC_REG_2(0x03c),
532 NETXEN_NIC_REG_2(0x03c),
533 NETXEN_NIC_REG_2(0x03c),
539 netxen_init_old_ctx(struct netxen_adapter *adapter)
541 struct netxen_recv_context *recv_ctx;
542 struct nx_host_rds_ring *rds_ring;
543 struct nx_host_sds_ring *sds_ring;
544 struct nx_host_tx_ring *tx_ring;
546 int port = adapter->portnum;
547 struct netxen_ring_ctx *hwctx;
550 tx_ring = adapter->tx_ring;
551 recv_ctx = &adapter->recv_ctx;
552 hwctx = recv_ctx->hwctx;
554 hwctx->cmd_ring_addr = cpu_to_le64(tx_ring->phys_addr);
555 hwctx->cmd_ring_size = cpu_to_le32(tx_ring->num_desc);
558 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
559 rds_ring = &recv_ctx->rds_rings[ring];
561 hwctx->rcv_rings[ring].addr =
562 cpu_to_le64(rds_ring->phys_addr);
563 hwctx->rcv_rings[ring].size =
564 cpu_to_le32(rds_ring->num_desc);
567 for (ring = 0; ring < adapter->max_sds_rings; ring++) {
568 sds_ring = &recv_ctx->sds_rings[ring];
571 hwctx->sts_ring_addr = cpu_to_le64(sds_ring->phys_addr);
572 hwctx->sts_ring_size = cpu_to_le32(sds_ring->num_desc);
574 hwctx->sts_rings[ring].addr = cpu_to_le64(sds_ring->phys_addr);
575 hwctx->sts_rings[ring].size = cpu_to_le32(sds_ring->num_desc);
576 hwctx->sts_rings[ring].msi_index = cpu_to_le16(ring);
578 hwctx->sts_ring_count = cpu_to_le32(adapter->max_sds_rings);
580 signature = (adapter->max_sds_rings > 1) ?
581 NETXEN_CTX_SIGNATURE_V2 : NETXEN_CTX_SIGNATURE;
583 NXWR32(adapter, CRB_CTX_ADDR_REG_LO(port),
584 lower32(recv_ctx->phys_addr));
585 NXWR32(adapter, CRB_CTX_ADDR_REG_HI(port),
586 upper32(recv_ctx->phys_addr));
587 NXWR32(adapter, CRB_CTX_SIGNATURE_REG(port),
592 int netxen_alloc_hw_resources(struct netxen_adapter *adapter)
597 struct netxen_recv_context *recv_ctx;
598 struct nx_host_rds_ring *rds_ring;
599 struct nx_host_sds_ring *sds_ring;
600 struct nx_host_tx_ring *tx_ring;
602 struct pci_dev *pdev = adapter->pdev;
603 struct net_device *netdev = adapter->netdev;
604 int port = adapter->portnum;
606 recv_ctx = &adapter->recv_ctx;
607 tx_ring = adapter->tx_ring;
609 addr = pci_alloc_consistent(pdev,
610 sizeof(struct netxen_ring_ctx) + sizeof(uint32_t),
611 &recv_ctx->phys_addr);
613 dev_err(&pdev->dev, "failed to allocate hw context\n");
617 memset(addr, 0, sizeof(struct netxen_ring_ctx));
618 recv_ctx->hwctx = (struct netxen_ring_ctx *)addr;
619 recv_ctx->hwctx->ctx_id = cpu_to_le32(port);
620 recv_ctx->hwctx->cmd_consumer_offset =
621 cpu_to_le64(recv_ctx->phys_addr +
622 sizeof(struct netxen_ring_ctx));
623 tx_ring->hw_consumer =
624 (__le32 *)(((char *)addr) + sizeof(struct netxen_ring_ctx));
627 addr = pci_alloc_consistent(pdev, TX_DESC_RINGSIZE(tx_ring),
628 &tx_ring->phys_addr);
631 dev_err(&pdev->dev, "%s: failed to allocate tx desc ring\n",
636 tx_ring->desc_head = (struct cmd_desc_type0 *)addr;
638 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
639 rds_ring = &recv_ctx->rds_rings[ring];
640 addr = pci_alloc_consistent(adapter->pdev,
641 RCV_DESC_RINGSIZE(rds_ring),
642 &rds_ring->phys_addr);
645 "%s: failed to allocate rds ring [%d]\n",
650 rds_ring->desc_head = (struct rcv_desc *)addr;
652 if (NX_IS_REVISION_P2(adapter->ahw.revision_id))
653 rds_ring->crb_rcv_producer =
654 recv_crb_registers[port].crb_rcv_producer[ring];
657 for (ring = 0; ring < adapter->max_sds_rings; ring++) {
658 sds_ring = &recv_ctx->sds_rings[ring];
660 addr = pci_alloc_consistent(adapter->pdev,
661 STATUS_DESC_RINGSIZE(sds_ring),
662 &sds_ring->phys_addr);
665 "%s: failed to allocate sds ring [%d]\n",
670 sds_ring->desc_head = (struct status_desc *)addr;
672 sds_ring->crb_sts_consumer =
673 recv_crb_registers[port].crb_sts_consumer[ring];
675 sds_ring->crb_intr_mask =
676 recv_crb_registers[port].sw_int_mask[ring];
680 if (!NX_IS_REVISION_P2(adapter->ahw.revision_id)) {
681 err = nx_fw_cmd_create_rx_ctx(adapter);
684 err = nx_fw_cmd_create_tx_ctx(adapter);
688 err = netxen_init_old_ctx(adapter);
696 netxen_free_hw_resources(adapter);
700 void netxen_free_hw_resources(struct netxen_adapter *adapter)
702 struct netxen_recv_context *recv_ctx;
703 struct nx_host_rds_ring *rds_ring;
704 struct nx_host_sds_ring *sds_ring;
705 struct nx_host_tx_ring *tx_ring;
708 int port = adapter->portnum;
710 if (!NX_IS_REVISION_P2(adapter->ahw.revision_id)) {
711 nx_fw_cmd_destroy_rx_ctx(adapter);
712 nx_fw_cmd_destroy_tx_ctx(adapter);
714 netxen_api_lock(adapter);
715 NXWR32(adapter, CRB_CTX_SIGNATURE_REG(port),
716 NETXEN_CTX_D3_RESET | port);
717 netxen_api_unlock(adapter);
720 /* Allow dma queues to drain after context reset */
723 recv_ctx = &adapter->recv_ctx;
725 if (recv_ctx->hwctx != NULL) {
726 pci_free_consistent(adapter->pdev,
727 sizeof(struct netxen_ring_ctx) +
730 recv_ctx->phys_addr);
731 recv_ctx->hwctx = NULL;
734 tx_ring = adapter->tx_ring;
735 if (tx_ring->desc_head != NULL) {
736 pci_free_consistent(adapter->pdev,
737 TX_DESC_RINGSIZE(tx_ring),
738 tx_ring->desc_head, tx_ring->phys_addr);
739 tx_ring->desc_head = NULL;
742 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
743 rds_ring = &recv_ctx->rds_rings[ring];
745 if (rds_ring->desc_head != NULL) {
746 pci_free_consistent(adapter->pdev,
747 RCV_DESC_RINGSIZE(rds_ring),
749 rds_ring->phys_addr);
750 rds_ring->desc_head = NULL;
754 for (ring = 0; ring < adapter->max_sds_rings; ring++) {
755 sds_ring = &recv_ctx->sds_rings[ring];
757 if (sds_ring->desc_head != NULL) {
758 pci_free_consistent(adapter->pdev,
759 STATUS_DESC_RINGSIZE(sds_ring),
761 sds_ring->phys_addr);
762 sds_ring->desc_head = NULL;