1 /* myri_sbus.c: MyriCOM MyriNET SBUS card driver.
3 * Copyright (C) 1996, 1999, 2006 David S. Miller (davem@davemloft.net)
6 static char version[] =
7 "myri_sbus.c:v2.0 June 23, 2006 David S. Miller (davem@davemloft.net)\n";
9 #include <linux/module.h>
10 #include <linux/errno.h>
11 #include <linux/kernel.h>
12 #include <linux/types.h>
13 #include <linux/fcntl.h>
14 #include <linux/interrupt.h>
15 #include <linux/ioport.h>
17 #include <linux/slab.h>
18 #include <linux/string.h>
19 #include <linux/delay.h>
20 #include <linux/init.h>
21 #include <linux/netdevice.h>
22 #include <linux/etherdevice.h>
23 #include <linux/skbuff.h>
24 #include <linux/bitops.h>
31 #include <asm/system.h>
34 #include <asm/byteorder.h>
35 #include <asm/idprom.h>
37 #include <asm/openprom.h>
38 #include <asm/oplib.h>
39 #include <asm/auxio.h>
40 #include <asm/pgtable.h>
43 #include "myri_sbus.h"
44 #include "myri_code.h"
46 /* #define DEBUG_DETECT */
47 /* #define DEBUG_IRQ */
48 /* #define DEBUG_TRANSMIT */
49 /* #define DEBUG_RECEIVE */
50 /* #define DEBUG_HEADER */
53 #define DET(x) printk x
59 #define DIRQ(x) printk x
65 #define DTX(x) printk x
71 #define DRX(x) printk x
77 #define DHDR(x) printk x
82 static void myri_reset_off(void __iomem *lp, void __iomem *cregs)
85 sbus_writel(0, lp + LANAI_EIMASK);
87 /* Turn RESET function off. */
88 sbus_writel(CONTROL_ROFF, cregs + MYRICTRL_CTRL);
91 static void myri_reset_on(void __iomem *cregs)
93 /* Enable RESET function. */
94 sbus_writel(CONTROL_RON, cregs + MYRICTRL_CTRL);
97 sbus_writel(CONTROL_DIRQ, cregs + MYRICTRL_CTRL);
100 static void myri_disable_irq(void __iomem *lp, void __iomem *cregs)
102 sbus_writel(CONTROL_DIRQ, cregs + MYRICTRL_CTRL);
103 sbus_writel(0, lp + LANAI_EIMASK);
104 sbus_writel(ISTAT_HOST, lp + LANAI_ISTAT);
107 static void myri_enable_irq(void __iomem *lp, void __iomem *cregs)
109 sbus_writel(CONTROL_EIRQ, cregs + MYRICTRL_CTRL);
110 sbus_writel(ISTAT_HOST, lp + LANAI_EIMASK);
113 static inline void bang_the_chip(struct myri_eth *mp)
115 struct myri_shmem __iomem *shmem = mp->shmem;
116 void __iomem *cregs = mp->cregs;
118 sbus_writel(1, &shmem->send);
119 sbus_writel(CONTROL_WON, cregs + MYRICTRL_CTRL);
122 static int myri_do_handshake(struct myri_eth *mp)
124 struct myri_shmem __iomem *shmem = mp->shmem;
125 void __iomem *cregs = mp->cregs;
126 struct myri_channel __iomem *chan = &shmem->channel;
129 DET(("myri_do_handshake: "));
130 if (sbus_readl(&chan->state) == STATE_READY) {
131 DET(("Already STATE_READY, failed.\n"));
132 return -1; /* We're hosed... */
135 myri_disable_irq(mp->lregs, cregs);
137 while (tick++ <= 25) {
141 DET(("shakedown, CONTROL_WON, "));
142 sbus_writel(1, &shmem->shakedown);
143 sbus_writel(CONTROL_WON, cregs + MYRICTRL_CTRL);
145 softstate = sbus_readl(&chan->state);
146 DET(("chanstate[%08x] ", softstate));
147 if (softstate == STATE_READY) {
148 DET(("wakeup successful, "));
152 if (softstate != STATE_WFN) {
153 DET(("not WFN setting that, "));
154 sbus_writel(STATE_WFN, &chan->state);
160 myri_enable_irq(mp->lregs, cregs);
163 DET(("25 ticks we lose, failure.\n"));
170 static int __devinit myri_load_lanai(struct myri_eth *mp)
172 struct net_device *dev = mp->dev;
173 struct myri_shmem __iomem *shmem = mp->shmem;
177 myri_disable_irq(mp->lregs, mp->cregs);
178 myri_reset_on(mp->cregs);
181 for (i = 0; i < mp->eeprom.ramsz; i++)
182 sbus_writeb(0, rptr + i);
184 if (mp->eeprom.cpuvers >= CPUVERS_3_0)
185 sbus_writel(mp->eeprom.cval, mp->lregs + LANAI_CVAL);
187 /* Load executable code. */
188 for (i = 0; i < sizeof(lanai4_code); i++)
189 sbus_writeb(lanai4_code[i], rptr + (lanai4_code_off * 2) + i);
191 /* Load data segment. */
192 for (i = 0; i < sizeof(lanai4_data); i++)
193 sbus_writeb(lanai4_data[i], rptr + (lanai4_data_off * 2) + i);
195 /* Set device address. */
196 sbus_writeb(0, &shmem->addr[0]);
197 sbus_writeb(0, &shmem->addr[1]);
198 for (i = 0; i < 6; i++)
199 sbus_writeb(dev->dev_addr[i],
200 &shmem->addr[i + 2]);
202 /* Set SBUS bursts and interrupt mask. */
203 sbus_writel(((mp->myri_bursts & 0xf8) >> 3), &shmem->burst);
204 sbus_writel(SHMEM_IMASK_RX, &shmem->imask);
206 /* Release the LANAI. */
207 myri_disable_irq(mp->lregs, mp->cregs);
208 myri_reset_off(mp->lregs, mp->cregs);
209 myri_disable_irq(mp->lregs, mp->cregs);
211 /* Wait for the reset to complete. */
212 for (i = 0; i < 5000; i++) {
213 if (sbus_readl(&shmem->channel.state) != STATE_READY)
220 printk(KERN_ERR "myricom: Chip would not reset after firmware load.\n");
222 i = myri_do_handshake(mp);
224 printk(KERN_ERR "myricom: Handshake with LANAI failed.\n");
226 if (mp->eeprom.cpuvers == CPUVERS_4_0)
227 sbus_writel(0, mp->lregs + LANAI_VERS);
232 static void myri_clean_rings(struct myri_eth *mp)
234 struct sendq __iomem *sq = mp->sq;
235 struct recvq __iomem *rq = mp->rq;
238 sbus_writel(0, &rq->tail);
239 sbus_writel(0, &rq->head);
240 for (i = 0; i < (RX_RING_SIZE+1); i++) {
241 if (mp->rx_skbs[i] != NULL) {
242 struct myri_rxd __iomem *rxd = &rq->myri_rxd[i];
245 dma_addr = sbus_readl(&rxd->myri_scatters[0].addr);
246 sbus_unmap_single(mp->myri_sdev, dma_addr, RX_ALLOC_SIZE, SBUS_DMA_FROMDEVICE);
247 dev_kfree_skb(mp->rx_skbs[i]);
248 mp->rx_skbs[i] = NULL;
253 sbus_writel(0, &sq->tail);
254 sbus_writel(0, &sq->head);
255 for (i = 0; i < TX_RING_SIZE; i++) {
256 if (mp->tx_skbs[i] != NULL) {
257 struct sk_buff *skb = mp->tx_skbs[i];
258 struct myri_txd __iomem *txd = &sq->myri_txd[i];
261 dma_addr = sbus_readl(&txd->myri_gathers[0].addr);
262 sbus_unmap_single(mp->myri_sdev, dma_addr, (skb->len + 3) & ~3, SBUS_DMA_TODEVICE);
263 dev_kfree_skb(mp->tx_skbs[i]);
264 mp->tx_skbs[i] = NULL;
269 static void myri_init_rings(struct myri_eth *mp, int from_irq)
271 struct recvq __iomem *rq = mp->rq;
272 struct myri_rxd __iomem *rxd = &rq->myri_rxd[0];
273 struct net_device *dev = mp->dev;
274 gfp_t gfp_flags = GFP_KERNEL;
277 if (from_irq || in_interrupt())
278 gfp_flags = GFP_ATOMIC;
280 myri_clean_rings(mp);
281 for (i = 0; i < RX_RING_SIZE; i++) {
282 struct sk_buff *skb = myri_alloc_skb(RX_ALLOC_SIZE, gfp_flags);
287 mp->rx_skbs[i] = skb;
289 skb_put(skb, RX_ALLOC_SIZE);
291 dma_addr = sbus_map_single(mp->myri_sdev, skb->data, RX_ALLOC_SIZE, SBUS_DMA_FROMDEVICE);
292 sbus_writel(dma_addr, &rxd[i].myri_scatters[0].addr);
293 sbus_writel(RX_ALLOC_SIZE, &rxd[i].myri_scatters[0].len);
294 sbus_writel(i, &rxd[i].ctx);
295 sbus_writel(1, &rxd[i].num_sg);
297 sbus_writel(0, &rq->head);
298 sbus_writel(RX_RING_SIZE, &rq->tail);
301 static int myri_init(struct myri_eth *mp, int from_irq)
303 myri_init_rings(mp, from_irq);
307 static void myri_is_not_so_happy(struct myri_eth *mp)
312 static void dump_ehdr(struct ethhdr *ehdr)
314 printk("ehdr[h_dst(%02x:%02x:%02x:%02x:%02x:%02x)"
315 "h_source(%02x:%02x:%02x:%02x:%02x:%02x)h_proto(%04x)]\n",
316 ehdr->h_dest[0], ehdr->h_dest[1], ehdr->h_dest[2],
317 ehdr->h_dest[3], ehdr->h_dest[4], ehdr->h_dest[4],
318 ehdr->h_source[0], ehdr->h_source[1], ehdr->h_source[2],
319 ehdr->h_source[3], ehdr->h_source[4], ehdr->h_source[4],
323 static void dump_ehdr_and_myripad(unsigned char *stuff)
325 struct ethhdr *ehdr = (struct ethhdr *) (stuff + 2);
327 printk("pad[%02x:%02x]", stuff[0], stuff[1]);
328 printk("ehdr[h_dst(%02x:%02x:%02x:%02x:%02x:%02x)"
329 "h_source(%02x:%02x:%02x:%02x:%02x:%02x)h_proto(%04x)]\n",
330 ehdr->h_dest[0], ehdr->h_dest[1], ehdr->h_dest[2],
331 ehdr->h_dest[3], ehdr->h_dest[4], ehdr->h_dest[4],
332 ehdr->h_source[0], ehdr->h_source[1], ehdr->h_source[2],
333 ehdr->h_source[3], ehdr->h_source[4], ehdr->h_source[4],
338 static void myri_tx(struct myri_eth *mp, struct net_device *dev)
340 struct sendq __iomem *sq= mp->sq;
341 int entry = mp->tx_old;
342 int limit = sbus_readl(&sq->head);
344 DTX(("entry[%d] limit[%d] ", entry, limit));
347 while (entry != limit) {
348 struct sk_buff *skb = mp->tx_skbs[entry];
351 DTX(("SKB[%d] ", entry));
352 dma_addr = sbus_readl(&sq->myri_txd[entry].myri_gathers[0].addr);
353 sbus_unmap_single(mp->myri_sdev, dma_addr, skb->len, SBUS_DMA_TODEVICE);
355 mp->tx_skbs[entry] = NULL;
356 mp->enet_stats.tx_packets++;
357 entry = NEXT_TX(entry);
362 /* Determine the packet's protocol ID. The rule here is that we
363 * assume 802.3 if the type field is short enough to be a length.
364 * This is normal practice and works for any 'now in use' protocol.
366 static __be16 myri_type_trans(struct sk_buff *skb, struct net_device *dev)
371 skb->mac.raw = (((unsigned char *)skb->data) + MYRI_PAD_LEN);
372 skb_pull(skb, dev->hard_header_len);
376 DHDR(("myri_type_trans: "));
379 if (*eth->h_dest & 1) {
380 if (memcmp(eth->h_dest, dev->broadcast, ETH_ALEN)==0)
381 skb->pkt_type = PACKET_BROADCAST;
383 skb->pkt_type = PACKET_MULTICAST;
384 } else if (dev->flags & (IFF_PROMISC|IFF_ALLMULTI)) {
385 if (memcmp(eth->h_dest, dev->dev_addr, ETH_ALEN))
386 skb->pkt_type = PACKET_OTHERHOST;
389 if (ntohs(eth->h_proto) >= 1536)
394 /* This is a magic hack to spot IPX packets. Older Novell breaks
395 * the protocol design and runs IPX over 802.3 without an 802.2 LLC
396 * layer. We look for FFFF which isn't a used 802.2 SSAP/DSAP. This
397 * won't work for fault tolerant netware but does for the rest.
399 if (*(unsigned short *)rawp == 0xFFFF)
400 return htons(ETH_P_802_3);
403 return htons(ETH_P_802_2);
406 static void myri_rx(struct myri_eth *mp, struct net_device *dev)
408 struct recvq __iomem *rq = mp->rq;
409 struct recvq __iomem *rqa = mp->rqack;
410 int entry = sbus_readl(&rqa->head);
411 int limit = sbus_readl(&rqa->tail);
414 DRX(("entry[%d] limit[%d] ", entry, limit));
419 while (entry != limit) {
420 struct myri_rxd __iomem *rxdack = &rqa->myri_rxd[entry];
421 u32 csum = sbus_readl(&rxdack->csum);
422 int len = sbus_readl(&rxdack->myri_scatters[0].len);
423 int index = sbus_readl(&rxdack->ctx);
424 struct myri_rxd __iomem *rxd = &rq->myri_rxd[sbus_readl(&rq->tail)];
425 struct sk_buff *skb = mp->rx_skbs[index];
428 sbus_writel(NEXT_RX(entry), &rqa->head);
430 /* Check for errors. */
431 DRX(("rxd[%d]: %p len[%d] csum[%08x] ", entry, rxd, len, csum));
432 sbus_dma_sync_single_for_cpu(mp->myri_sdev,
433 sbus_readl(&rxd->myri_scatters[0].addr),
434 RX_ALLOC_SIZE, SBUS_DMA_FROMDEVICE);
435 if (len < (ETH_HLEN + MYRI_PAD_LEN) || (skb->data[0] != MYRI_PAD_LEN)) {
437 mp->enet_stats.rx_errors++;
438 if (len < (ETH_HLEN + MYRI_PAD_LEN)) {
439 DRX(("BAD_LENGTH] "));
440 mp->enet_stats.rx_length_errors++;
442 DRX(("NO_PADDING] "));
443 mp->enet_stats.rx_frame_errors++;
446 /* Return it to the LANAI. */
450 mp->enet_stats.rx_dropped++;
451 sbus_dma_sync_single_for_device(mp->myri_sdev,
452 sbus_readl(&rxd->myri_scatters[0].addr),
454 SBUS_DMA_FROMDEVICE);
455 sbus_writel(RX_ALLOC_SIZE, &rxd->myri_scatters[0].len);
456 sbus_writel(index, &rxd->ctx);
457 sbus_writel(1, &rxd->num_sg);
458 sbus_writel(NEXT_RX(sbus_readl(&rq->tail)), &rq->tail);
462 DRX(("len[%d] ", len));
463 if (len > RX_COPY_THRESHOLD) {
464 struct sk_buff *new_skb;
468 new_skb = myri_alloc_skb(RX_ALLOC_SIZE, GFP_ATOMIC);
469 if (new_skb == NULL) {
470 DRX(("skb_alloc(FAILED) "));
473 sbus_unmap_single(mp->myri_sdev,
474 sbus_readl(&rxd->myri_scatters[0].addr),
476 SBUS_DMA_FROMDEVICE);
477 mp->rx_skbs[index] = new_skb;
479 skb_put(new_skb, RX_ALLOC_SIZE);
480 dma_addr = sbus_map_single(mp->myri_sdev,
483 SBUS_DMA_FROMDEVICE);
484 sbus_writel(dma_addr, &rxd->myri_scatters[0].addr);
485 sbus_writel(RX_ALLOC_SIZE, &rxd->myri_scatters[0].len);
486 sbus_writel(index, &rxd->ctx);
487 sbus_writel(1, &rxd->num_sg);
488 sbus_writel(NEXT_RX(sbus_readl(&rq->tail)), &rq->tail);
490 /* Trim the original skb for the netif. */
491 DRX(("trim(%d) ", len));
494 struct sk_buff *copy_skb = dev_alloc_skb(len);
497 if (copy_skb == NULL) {
498 DRX(("dev_alloc_skb(FAILED) "));
501 /* DMA sync already done above. */
503 DRX(("resv_and_put "));
504 skb_put(copy_skb, len);
505 memcpy(copy_skb->data, skb->data, len);
507 /* Reuse original ring buffer. */
509 sbus_dma_sync_single_for_device(mp->myri_sdev,
510 sbus_readl(&rxd->myri_scatters[0].addr),
512 SBUS_DMA_FROMDEVICE);
513 sbus_writel(RX_ALLOC_SIZE, &rxd->myri_scatters[0].len);
514 sbus_writel(index, &rxd->ctx);
515 sbus_writel(1, &rxd->num_sg);
516 sbus_writel(NEXT_RX(sbus_readl(&rq->tail)), &rq->tail);
521 /* Just like the happy meal we get checksums from this card. */
523 skb->ip_summed = CHECKSUM_UNNECESSARY; /* XXX */
525 skb->protocol = myri_type_trans(skb, dev);
526 DRX(("prot[%04x] netif_rx ", skb->protocol));
529 dev->last_rx = jiffies;
530 mp->enet_stats.rx_packets++;
531 mp->enet_stats.rx_bytes += len;
534 entry = NEXT_RX(entry);
538 static irqreturn_t myri_interrupt(int irq, void *dev_id)
540 struct net_device *dev = (struct net_device *) dev_id;
541 struct myri_eth *mp = (struct myri_eth *) dev->priv;
542 void __iomem *lregs = mp->lregs;
543 struct myri_channel __iomem *chan = &mp->shmem->channel;
548 spin_lock_irqsave(&mp->irq_lock, flags);
550 status = sbus_readl(lregs + LANAI_ISTAT);
551 DIRQ(("myri_interrupt: status[%08x] ", status));
552 if (status & ISTAT_HOST) {
556 DIRQ(("IRQ_DISAB "));
557 myri_disable_irq(lregs, mp->cregs);
558 softstate = sbus_readl(&chan->state);
559 DIRQ(("state[%08x] ", softstate));
560 if (softstate != STATE_READY) {
561 DIRQ(("myri_not_so_happy "));
562 myri_is_not_so_happy(mp);
564 DIRQ(("\nmyri_rx: "));
566 DIRQ(("\nistat=ISTAT_HOST "));
567 sbus_writel(ISTAT_HOST, lregs + LANAI_ISTAT);
569 myri_enable_irq(lregs, mp->cregs);
573 spin_unlock_irqrestore(&mp->irq_lock, flags);
575 return IRQ_RETVAL(handled);
578 static int myri_open(struct net_device *dev)
580 struct myri_eth *mp = (struct myri_eth *) dev->priv;
582 return myri_init(mp, in_interrupt());
585 static int myri_close(struct net_device *dev)
587 struct myri_eth *mp = (struct myri_eth *) dev->priv;
589 myri_clean_rings(mp);
593 static void myri_tx_timeout(struct net_device *dev)
595 struct myri_eth *mp = (struct myri_eth *) dev->priv;
597 printk(KERN_ERR "%s: transmit timed out, resetting\n", dev->name);
599 mp->enet_stats.tx_errors++;
601 netif_wake_queue(dev);
604 static int myri_start_xmit(struct sk_buff *skb, struct net_device *dev)
606 struct myri_eth *mp = (struct myri_eth *) dev->priv;
607 struct sendq __iomem *sq = mp->sq;
608 struct myri_txd __iomem *txd;
610 unsigned int head, tail;
614 DTX(("myri_start_xmit: "));
618 netif_stop_queue(dev);
620 /* This is just to prevent multiple PIO reads for TX_BUFFS_AVAIL. */
621 head = sbus_readl(&sq->head);
622 tail = sbus_readl(&sq->tail);
624 if (!TX_BUFFS_AVAIL(head, tail)) {
625 DTX(("no buffs available, returning 1\n"));
629 spin_lock_irqsave(&mp->irq_lock, flags);
631 DHDR(("xmit[skbdata(%p)]\n", skb->data));
633 dump_ehdr_and_myripad(((unsigned char *) skb->data));
636 /* XXX Maybe this can go as well. */
640 len = (len + 4) & (~3);
643 entry = sbus_readl(&sq->tail);
645 txd = &sq->myri_txd[entry];
646 mp->tx_skbs[entry] = skb;
648 /* Must do this before we sbus map it. */
649 if (skb->data[MYRI_PAD_LEN] & 0x1) {
650 sbus_writew(0xffff, &txd->addr[0]);
651 sbus_writew(0xffff, &txd->addr[1]);
652 sbus_writew(0xffff, &txd->addr[2]);
653 sbus_writew(0xffff, &txd->addr[3]);
655 sbus_writew(0xffff, &txd->addr[0]);
656 sbus_writew((skb->data[0] << 8) | skb->data[1], &txd->addr[1]);
657 sbus_writew((skb->data[2] << 8) | skb->data[3], &txd->addr[2]);
658 sbus_writew((skb->data[4] << 8) | skb->data[5], &txd->addr[3]);
661 dma_addr = sbus_map_single(mp->myri_sdev, skb->data, len, SBUS_DMA_TODEVICE);
662 sbus_writel(dma_addr, &txd->myri_gathers[0].addr);
663 sbus_writel(len, &txd->myri_gathers[0].len);
664 sbus_writel(1, &txd->num_sg);
665 sbus_writel(KERNEL_CHANNEL, &txd->chan);
666 sbus_writel(len, &txd->len);
667 sbus_writel((u32)-1, &txd->csum_off);
668 sbus_writel(0, &txd->csum_field);
670 sbus_writel(NEXT_TX(entry), &sq->tail);
671 DTX(("BangTheChip "));
674 DTX(("tbusy=0, returning 0\n"));
675 netif_start_queue(dev);
676 spin_unlock_irqrestore(&mp->irq_lock, flags);
680 /* Create the MyriNet MAC header for an arbitrary protocol layer
682 * saddr=NULL means use device source address
683 * daddr=NULL means leave destination address (eg unresolved arp)
685 static int myri_header(struct sk_buff *skb, struct net_device *dev, unsigned short type,
686 void *daddr, void *saddr, unsigned len)
688 struct ethhdr *eth = (struct ethhdr *) skb_push(skb, ETH_HLEN);
689 unsigned char *pad = (unsigned char *) skb_push(skb, MYRI_PAD_LEN);
692 DHDR(("myri_header: pad[%02x,%02x] ", pad[0], pad[1]));
696 /* Set the MyriNET padding identifier. */
697 pad[0] = MYRI_PAD_LEN;
700 /* Set the protocol type. For a packet of type ETH_P_802_3 we put the length
701 * in here instead. It is up to the 802.2 layer to carry protocol information.
703 if (type != ETH_P_802_3)
704 eth->h_proto = htons(type);
706 eth->h_proto = htons(len);
708 /* Set the source hardware address. */
710 memcpy(eth->h_source, saddr, dev->addr_len);
712 memcpy(eth->h_source, dev->dev_addr, dev->addr_len);
714 /* Anyway, the loopback-device should never use this function... */
715 if (dev->flags & IFF_LOOPBACK) {
717 for (i = 0; i < dev->addr_len; i++)
719 return(dev->hard_header_len);
723 memcpy(eth->h_dest, daddr, dev->addr_len);
724 return dev->hard_header_len;
726 return -dev->hard_header_len;
729 /* Rebuild the MyriNet MAC header. This is called after an ARP
730 * (or in future other address resolution) has completed on this
731 * sk_buff. We now let ARP fill in the other fields.
733 static int myri_rebuild_header(struct sk_buff *skb)
735 unsigned char *pad = (unsigned char *) skb->data;
736 struct ethhdr *eth = (struct ethhdr *) (pad + MYRI_PAD_LEN);
737 struct net_device *dev = skb->dev;
740 DHDR(("myri_rebuild_header: pad[%02x,%02x] ", pad[0], pad[1]));
744 /* Refill MyriNet padding identifiers, this is just being anal. */
745 pad[0] = MYRI_PAD_LEN;
748 switch (eth->h_proto)
751 case __constant_htons(ETH_P_IP):
752 return arp_find(eth->h_dest, skb);
757 "%s: unable to resolve type %X addresses.\n",
758 dev->name, (int)eth->h_proto);
760 memcpy(eth->h_source, dev->dev_addr, dev->addr_len);
768 int myri_header_cache(struct neighbour *neigh, struct hh_cache *hh)
770 unsigned short type = hh->hh_type;
773 struct net_device *dev = neigh->dev;
775 pad = ((unsigned char *) hh->hh_data) +
776 HH_DATA_OFF(sizeof(*eth) + MYRI_PAD_LEN);
777 eth = (struct ethhdr *) (pad + MYRI_PAD_LEN);
779 if (type == __constant_htons(ETH_P_802_3))
782 /* Refill MyriNet padding identifiers, this is just being anal. */
783 pad[0] = MYRI_PAD_LEN;
787 memcpy(eth->h_source, dev->dev_addr, dev->addr_len);
788 memcpy(eth->h_dest, neigh->ha, dev->addr_len);
794 /* Called by Address Resolution module to notify changes in address. */
795 void myri_header_cache_update(struct hh_cache *hh, struct net_device *dev, unsigned char * haddr)
797 memcpy(((u8*)hh->hh_data) + HH_DATA_OFF(sizeof(struct ethhdr)),
798 haddr, dev->addr_len);
801 static int myri_change_mtu(struct net_device *dev, int new_mtu)
803 if ((new_mtu < (ETH_HLEN + MYRI_PAD_LEN)) || (new_mtu > MYRINET_MTU))
809 static struct net_device_stats *myri_get_stats(struct net_device *dev)
810 { return &(((struct myri_eth *)dev->priv)->enet_stats); }
812 static void myri_set_multicast(struct net_device *dev)
814 /* Do nothing, all MyriCOM nodes transmit multicast frames
815 * as broadcast packets...
819 static inline void set_boardid_from_idprom(struct myri_eth *mp, int num)
821 mp->eeprom.id[0] = 0;
822 mp->eeprom.id[1] = idprom->id_machtype;
823 mp->eeprom.id[2] = (idprom->id_sernum >> 16) & 0xff;
824 mp->eeprom.id[3] = (idprom->id_sernum >> 8) & 0xff;
825 mp->eeprom.id[4] = (idprom->id_sernum >> 0) & 0xff;
826 mp->eeprom.id[5] = num;
829 static inline void determine_reg_space_size(struct myri_eth *mp)
831 switch(mp->eeprom.cpuvers) {
836 mp->reg_size = (3 * 128 * 1024) + 4096;
841 mp->reg_size = ((4096<<1) + mp->eeprom.ramsz);
847 printk("myricom: AIEEE weird cpu version %04x assuming pre4.0\n",
849 mp->reg_size = (3 * 128 * 1024) + 4096;
854 static void dump_eeprom(struct myri_eth *mp)
856 printk("EEPROM: clockval[%08x] cpuvers[%04x] "
857 "id[%02x,%02x,%02x,%02x,%02x,%02x]\n",
858 mp->eeprom.cval, mp->eeprom.cpuvers,
859 mp->eeprom.id[0], mp->eeprom.id[1], mp->eeprom.id[2],
860 mp->eeprom.id[3], mp->eeprom.id[4], mp->eeprom.id[5]);
861 printk("EEPROM: ramsz[%08x]\n", mp->eeprom.ramsz);
862 printk("EEPROM: fvers[%02x,%02x,%02x,%02x,%02x,%02x,%02x,%02x\n",
863 mp->eeprom.fvers[0], mp->eeprom.fvers[1], mp->eeprom.fvers[2],
864 mp->eeprom.fvers[3], mp->eeprom.fvers[4], mp->eeprom.fvers[5],
865 mp->eeprom.fvers[6], mp->eeprom.fvers[7]);
866 printk("EEPROM: %02x,%02x,%02x,%02x,%02x,%02x,%02x,%02x\n",
867 mp->eeprom.fvers[8], mp->eeprom.fvers[9], mp->eeprom.fvers[10],
868 mp->eeprom.fvers[11], mp->eeprom.fvers[12], mp->eeprom.fvers[13],
869 mp->eeprom.fvers[14], mp->eeprom.fvers[15]);
870 printk("EEPROM: %02x,%02x,%02x,%02x,%02x,%02x,%02x,%02x\n",
871 mp->eeprom.fvers[16], mp->eeprom.fvers[17], mp->eeprom.fvers[18],
872 mp->eeprom.fvers[19], mp->eeprom.fvers[20], mp->eeprom.fvers[21],
873 mp->eeprom.fvers[22], mp->eeprom.fvers[23]);
874 printk("EEPROM: %02x,%02x,%02x,%02x,%02x,%02x,%02x,%02x]\n",
875 mp->eeprom.fvers[24], mp->eeprom.fvers[25], mp->eeprom.fvers[26],
876 mp->eeprom.fvers[27], mp->eeprom.fvers[28], mp->eeprom.fvers[29],
877 mp->eeprom.fvers[30], mp->eeprom.fvers[31]);
878 printk("EEPROM: mvers[%02x,%02x,%02x,%02x,%02x,%02x,%02x,%02x\n",
879 mp->eeprom.mvers[0], mp->eeprom.mvers[1], mp->eeprom.mvers[2],
880 mp->eeprom.mvers[3], mp->eeprom.mvers[4], mp->eeprom.mvers[5],
881 mp->eeprom.mvers[6], mp->eeprom.mvers[7]);
882 printk("EEPROM: %02x,%02x,%02x,%02x,%02x,%02x,%02x,%02x]\n",
883 mp->eeprom.mvers[8], mp->eeprom.mvers[9], mp->eeprom.mvers[10],
884 mp->eeprom.mvers[11], mp->eeprom.mvers[12], mp->eeprom.mvers[13],
885 mp->eeprom.mvers[14], mp->eeprom.mvers[15]);
886 printk("EEPROM: dlval[%04x] brd_type[%04x] bus_type[%04x] prod_code[%04x]\n",
887 mp->eeprom.dlval, mp->eeprom.brd_type, mp->eeprom.bus_type,
888 mp->eeprom.prod_code);
889 printk("EEPROM: serial_num[%08x]\n", mp->eeprom.serial_num);
893 static int __devinit myri_ether_init(struct sbus_dev *sdev)
896 static unsigned version_printed;
897 struct net_device *dev;
899 unsigned char prop_buf[32];
902 DET(("myri_ether_init(%p,%d):\n", sdev, num));
903 dev = alloc_etherdev(sizeof(struct myri_eth));
908 if (version_printed++ == 0)
911 SET_MODULE_OWNER(dev);
912 SET_NETDEV_DEV(dev, &sdev->ofdev.dev);
914 mp = (struct myri_eth *) dev->priv;
915 spin_lock_init(&mp->irq_lock);
916 mp->myri_sdev = sdev;
918 /* Clean out skb arrays. */
919 for (i = 0; i < (RX_RING_SIZE + 1); i++)
920 mp->rx_skbs[i] = NULL;
922 for (i = 0; i < TX_RING_SIZE; i++)
923 mp->tx_skbs[i] = NULL;
925 /* First check for EEPROM information. */
926 i = prom_getproperty(sdev->prom_node, "myrinet-eeprom-info",
927 (char *)&mp->eeprom, sizeof(struct myri_eeprom));
928 DET(("prom_getprop(myrinet-eeprom-info) returns %d\n", i));
929 if (i == 0 || i == -1) {
930 /* No eeprom property, must cook up the values ourselves. */
931 DET(("No EEPROM: "));
932 mp->eeprom.bus_type = BUS_TYPE_SBUS;
933 mp->eeprom.cpuvers = prom_getintdefault(sdev->prom_node,"cpu_version",0);
934 mp->eeprom.cval = prom_getintdefault(sdev->prom_node,"clock_value",0);
935 mp->eeprom.ramsz = prom_getintdefault(sdev->prom_node,"sram_size",0);
936 DET(("cpuvers[%d] cval[%d] ramsz[%d]\n", mp->eeprom.cpuvers,
937 mp->eeprom.cval, mp->eeprom.ramsz));
938 if (mp->eeprom.cpuvers == 0) {
939 DET(("EEPROM: cpuvers was zero, setting to %04x\n",CPUVERS_2_3));
940 mp->eeprom.cpuvers = CPUVERS_2_3;
942 if (mp->eeprom.cpuvers < CPUVERS_3_0) {
943 DET(("EEPROM: cpuvers < CPUVERS_3_0, clockval set to zero.\n"));
946 if (mp->eeprom.ramsz == 0) {
947 DET(("EEPROM: ramsz == 0, setting to 128k\n"));
948 mp->eeprom.ramsz = (128 * 1024);
950 i = prom_getproperty(sdev->prom_node, "myrinet-board-id",
952 DET(("EEPROM: prom_getprop(myrinet-board-id) returns %d\n", i));
953 if ((i != 0) && (i != -1))
954 memcpy(&mp->eeprom.id[0], &prop_buf[0], 6);
956 set_boardid_from_idprom(mp, num);
957 i = prom_getproperty(sdev->prom_node, "fpga_version",
958 &mp->eeprom.fvers[0], 32);
959 DET(("EEPROM: prom_getprop(fpga_version) returns %d\n", i));
960 if (i == 0 || i == -1)
961 memset(&mp->eeprom.fvers[0], 0, 32);
963 if (mp->eeprom.cpuvers == CPUVERS_4_1) {
964 DET(("EEPROM: cpuvers CPUVERS_4_1, "));
965 if (mp->eeprom.ramsz == (128 * 1024)) {
966 DET(("ramsize 128k, setting to 256k, "));
967 mp->eeprom.ramsz = (256 * 1024);
969 if ((mp->eeprom.cval==0x40414041)||(mp->eeprom.cval==0x90449044)){
970 DET(("changing cval from %08x to %08x ",
971 mp->eeprom.cval, 0x50e450e4));
972 mp->eeprom.cval = 0x50e450e4;
981 for (i = 0; i < 6; i++)
982 dev->dev_addr[i] = mp->eeprom.id[i];
984 determine_reg_space_size(mp);
986 /* Map in the MyriCOM register/localram set. */
987 if (mp->eeprom.cpuvers < CPUVERS_4_0) {
988 /* XXX Makes no sense, if control reg is non-existant this
989 * XXX driver cannot function at all... maybe pre-4.0 is
990 * XXX only a valid version for PCI cards? Ask feldy...
992 DET(("Mapping regs for cpuvers < CPUVERS_4_0\n"));
993 mp->regs = sbus_ioremap(&sdev->resource[0], 0,
994 mp->reg_size, "MyriCOM Regs");
996 printk("MyriCOM: Cannot map MyriCOM registers.\n");
999 mp->lanai = mp->regs + (256 * 1024);
1000 mp->lregs = mp->lanai + (0x10000 * 2);
1002 DET(("Mapping regs for cpuvers >= CPUVERS_4_0\n"));
1003 mp->cregs = sbus_ioremap(&sdev->resource[0], 0,
1004 PAGE_SIZE, "MyriCOM Control Regs");
1005 mp->lregs = sbus_ioremap(&sdev->resource[0], (256 * 1024),
1006 PAGE_SIZE, "MyriCOM LANAI Regs");
1008 sbus_ioremap(&sdev->resource[0], (512 * 1024),
1009 mp->eeprom.ramsz, "MyriCOM SRAM");
1011 DET(("Registers mapped: cregs[%p] lregs[%p] lanai[%p]\n",
1012 mp->cregs, mp->lregs, mp->lanai));
1014 if (mp->eeprom.cpuvers >= CPUVERS_4_0)
1015 mp->shmem_base = 0xf000;
1017 mp->shmem_base = 0x8000;
1019 DET(("Shared memory base is %04x, ", mp->shmem_base));
1021 mp->shmem = (struct myri_shmem __iomem *)
1022 (mp->lanai + (mp->shmem_base * 2));
1023 DET(("shmem mapped at %p\n", mp->shmem));
1025 mp->rqack = &mp->shmem->channel.recvqa;
1026 mp->rq = &mp->shmem->channel.recvq;
1027 mp->sq = &mp->shmem->channel.sendq;
1029 /* Reset the board. */
1030 DET(("Resetting LANAI\n"));
1031 myri_reset_off(mp->lregs, mp->cregs);
1032 myri_reset_on(mp->cregs);
1034 /* Turn IRQ's off. */
1035 myri_disable_irq(mp->lregs, mp->cregs);
1037 /* Reset once more. */
1038 myri_reset_on(mp->cregs);
1040 /* Get the supported DVMA burst sizes from our SBUS. */
1041 mp->myri_bursts = prom_getintdefault(mp->myri_sdev->bus->prom_node,
1042 "burst-sizes", 0x00);
1044 if (!sbus_can_burst64(sdev))
1045 mp->myri_bursts &= ~(DMA_BURST64);
1047 DET(("MYRI bursts %02x\n", mp->myri_bursts));
1049 /* Encode SBUS interrupt level in second control register. */
1050 i = prom_getint(sdev->prom_node, "interrupts");
1053 DET(("prom_getint(interrupts)==%d, irqlvl set to %04x\n",
1056 sbus_writel((1 << i), mp->cregs + MYRICTRL_IRQLVL);
1059 dev->open = &myri_open;
1060 dev->stop = &myri_close;
1061 dev->hard_start_xmit = &myri_start_xmit;
1062 dev->tx_timeout = &myri_tx_timeout;
1063 dev->watchdog_timeo = 5*HZ;
1064 dev->get_stats = &myri_get_stats;
1065 dev->set_multicast_list = &myri_set_multicast;
1066 dev->irq = sdev->irqs[0];
1068 /* Register interrupt handler now. */
1069 DET(("Requesting MYRIcom IRQ line.\n"));
1070 if (request_irq(dev->irq, &myri_interrupt,
1071 IRQF_SHARED, "MyriCOM Ethernet", (void *) dev)) {
1072 printk("MyriCOM: Cannot register interrupt handler.\n");
1076 dev->mtu = MYRINET_MTU;
1077 dev->change_mtu = myri_change_mtu;
1078 dev->hard_header = myri_header;
1079 dev->rebuild_header = myri_rebuild_header;
1080 dev->hard_header_len = (ETH_HLEN + MYRI_PAD_LEN);
1081 dev->hard_header_cache = myri_header_cache;
1082 dev->header_cache_update= myri_header_cache_update;
1084 /* Load code onto the LANai. */
1085 DET(("Loading LANAI firmware\n"));
1086 myri_load_lanai(mp);
1088 if (register_netdev(dev)) {
1089 printk("MyriCOM: Cannot register device.\n");
1093 dev_set_drvdata(&sdev->ofdev.dev, mp);
1097 printk("%s: MyriCOM MyriNET Ethernet ", dev->name);
1099 for (i = 0; i < 6; i++)
1100 printk("%2.2x%c", dev->dev_addr[i],
1101 i == 5 ? ' ' : ':');
1107 free_irq(dev->irq, dev);
1109 /* This will also free the co-allocated 'dev->priv' */
1115 static int __devinit myri_sbus_probe(struct of_device *dev, const struct of_device_id *match)
1117 struct sbus_dev *sdev = to_sbus_device(&dev->dev);
1119 return myri_ether_init(sdev);
1122 static int __devexit myri_sbus_remove(struct of_device *dev)
1124 struct myri_eth *mp = dev_get_drvdata(&dev->dev);
1125 struct net_device *net_dev = mp->dev;
1127 unregister_netdevice(net_dev);
1129 free_irq(net_dev->irq, net_dev);
1131 if (mp->eeprom.cpuvers < CPUVERS_4_0) {
1132 sbus_iounmap(mp->regs, mp->reg_size);
1134 sbus_iounmap(mp->cregs, PAGE_SIZE);
1135 sbus_iounmap(mp->lregs, (256 * 1024));
1136 sbus_iounmap(mp->lanai, (512 * 1024));
1139 free_netdev(net_dev);
1141 dev_set_drvdata(&dev->dev, NULL);
1146 static struct of_device_id myri_sbus_match[] = {
1148 .name = "MYRICOM,mlanai",
1156 MODULE_DEVICE_TABLE(of, myri_sbus_match);
1158 static struct of_platform_driver myri_sbus_driver = {
1160 .match_table = myri_sbus_match,
1161 .probe = myri_sbus_probe,
1162 .remove = __devexit_p(myri_sbus_remove),
1165 static int __init myri_sbus_init(void)
1167 return of_register_driver(&myri_sbus_driver, &sbus_bus_type);
1170 static void __exit myri_sbus_exit(void)
1172 of_unregister_driver(&myri_sbus_driver);
1175 module_init(myri_sbus_init);
1176 module_exit(myri_sbus_exit);
1178 MODULE_LICENSE("GPL");