2 * Driver for Xilinx TEMAC Ethernet device
4 * Copyright (c) 2008 Nissin Systems Co., Ltd., Yoshio Kashiwagi
5 * Copyright (c) 2005-2008 DLA Systems, David H. Lynch Jr. <dhlii@dlasys.net>
6 * Copyright (c) 2008-2009 Secret Lab Technologies Ltd.
8 * This is a driver for the Xilinx ll_temac ipcore which is often used
9 * in the Virtex and Spartan series of chips.
12 * - The ll_temac hardware uses indirect access for many of the TEMAC
13 * registers, include the MDIO bus. However, indirect access to MDIO
14 * registers take considerably more clock cycles than to TEMAC registers.
15 * MDIO accesses are long, so threads doing them should probably sleep
16 * rather than busywait. However, since only one indirect access can be
17 * in progress at any given time, that means that *all* indirect accesses
18 * could end up sleeping (to wait for an MDIO access to complete).
19 * Fortunately none of the indirect accesses are on the 'hot' path for tx
20 * or rx, so this should be okay.
23 * - Fix driver to work on more than just Virtex5. Right now the driver
24 * assumes that the locallink DMA registers are accessed via DCR
26 * - Factor out locallink DMA code into separate driver
27 * - Fix multicast assignment.
28 * - Fix support for hardware checksumming.
29 * - Testing. Lots and lots of testing.
33 #include <linux/delay.h>
34 #include <linux/etherdevice.h>
35 #include <linux/init.h>
36 #include <linux/mii.h>
37 #include <linux/module.h>
38 #include <linux/mutex.h>
39 #include <linux/netdevice.h>
41 #include <linux/of_device.h>
42 #include <linux/of_mdio.h>
43 #include <linux/of_platform.h>
44 #include <linux/skbuff.h>
45 #include <linux/spinlock.h>
46 #include <linux/tcp.h> /* needed for sizeof(tcphdr) */
47 #include <linux/udp.h> /* needed for sizeof(udphdr) */
48 #include <linux/phy.h>
58 /* ---------------------------------------------------------------------
59 * Low level register access functions
62 u32 temac_ior(struct temac_local *lp, int offset)
64 return in_be32((u32 *)(lp->regs + offset));
67 void temac_iow(struct temac_local *lp, int offset, u32 value)
69 out_be32((u32 *) (lp->regs + offset), value);
72 int temac_indirect_busywait(struct temac_local *lp)
74 long end = jiffies + 2;
76 while (!(temac_ior(lp, XTE_RDY0_OFFSET) & XTE_RDY0_HARD_ACS_RDY_MASK)) {
77 if (end - jiffies <= 0) {
89 * lp->indirect_mutex must be held when calling this function
91 u32 temac_indirect_in32(struct temac_local *lp, int reg)
95 if (temac_indirect_busywait(lp))
97 temac_iow(lp, XTE_CTL0_OFFSET, reg);
98 if (temac_indirect_busywait(lp))
100 val = temac_ior(lp, XTE_LSW0_OFFSET);
106 * temac_indirect_out32
108 * lp->indirect_mutex must be held when calling this function
110 void temac_indirect_out32(struct temac_local *lp, int reg, u32 value)
112 if (temac_indirect_busywait(lp))
114 temac_iow(lp, XTE_LSW0_OFFSET, value);
115 temac_iow(lp, XTE_CTL0_OFFSET, CNTLREG_WRITE_ENABLE_MASK | reg);
118 static u32 temac_dma_in32(struct temac_local *lp, int reg)
120 return dcr_read(lp->sdma_dcrs, reg);
123 static void temac_dma_out32(struct temac_local *lp, int reg, u32 value)
125 dcr_write(lp->sdma_dcrs, reg, value);
129 * temac_dma_bd_init - Setup buffer descriptor rings
131 static int temac_dma_bd_init(struct net_device *ndev)
133 struct temac_local *lp = netdev_priv(ndev);
137 lp->rx_skb = kzalloc(sizeof(*lp->rx_skb) * RX_BD_NUM, GFP_KERNEL);
138 /* allocate the tx and rx ring buffer descriptors. */
139 /* returns a virtual addres and a physical address. */
140 lp->tx_bd_v = dma_alloc_coherent(ndev->dev.parent,
141 sizeof(*lp->tx_bd_v) * TX_BD_NUM,
142 &lp->tx_bd_p, GFP_KERNEL);
143 lp->rx_bd_v = dma_alloc_coherent(ndev->dev.parent,
144 sizeof(*lp->rx_bd_v) * RX_BD_NUM,
145 &lp->rx_bd_p, GFP_KERNEL);
147 memset(lp->tx_bd_v, 0, sizeof(*lp->tx_bd_v) * TX_BD_NUM);
148 for (i = 0; i < TX_BD_NUM; i++) {
149 lp->tx_bd_v[i].next = lp->tx_bd_p +
150 sizeof(*lp->tx_bd_v) * ((i + 1) % TX_BD_NUM);
153 memset(lp->rx_bd_v, 0, sizeof(*lp->rx_bd_v) * RX_BD_NUM);
154 for (i = 0; i < RX_BD_NUM; i++) {
155 lp->rx_bd_v[i].next = lp->rx_bd_p +
156 sizeof(*lp->rx_bd_v) * ((i + 1) % RX_BD_NUM);
158 skb = alloc_skb(XTE_MAX_JUMBO_FRAME_SIZE
159 + XTE_ALIGN, GFP_ATOMIC);
161 dev_err(&ndev->dev, "alloc_skb error %d\n", i);
165 skb_reserve(skb, BUFFER_ALIGN(skb->data));
166 /* returns physical address of skb->data */
167 lp->rx_bd_v[i].phys = dma_map_single(ndev->dev.parent,
169 XTE_MAX_JUMBO_FRAME_SIZE,
171 lp->rx_bd_v[i].len = XTE_MAX_JUMBO_FRAME_SIZE;
172 lp->rx_bd_v[i].app0 = STS_CTRL_APP0_IRQONEND;
175 temac_dma_out32(lp, TX_CHNL_CTRL, 0x10220400 |
177 CHNL_CTRL_IRQ_DLY_EN |
178 CHNL_CTRL_IRQ_COAL_EN);
181 temac_dma_out32(lp, RX_CHNL_CTRL, 0xff010000 |
183 CHNL_CTRL_IRQ_DLY_EN |
184 CHNL_CTRL_IRQ_COAL_EN |
188 temac_dma_out32(lp, RX_CURDESC_PTR, lp->rx_bd_p);
189 temac_dma_out32(lp, RX_TAILDESC_PTR,
190 lp->rx_bd_p + (sizeof(*lp->rx_bd_v) * (RX_BD_NUM - 1)));
191 temac_dma_out32(lp, TX_CURDESC_PTR, lp->tx_bd_p);
196 /* ---------------------------------------------------------------------
200 static int temac_set_mac_address(struct net_device *ndev, void *address)
202 struct temac_local *lp = netdev_priv(ndev);
205 memcpy(ndev->dev_addr, address, ETH_ALEN);
207 if (!is_valid_ether_addr(ndev->dev_addr))
208 random_ether_addr(ndev->dev_addr);
210 /* set up unicast MAC address filter set its mac address */
211 mutex_lock(&lp->indirect_mutex);
212 temac_indirect_out32(lp, XTE_UAW0_OFFSET,
213 (ndev->dev_addr[0]) |
214 (ndev->dev_addr[1] << 8) |
215 (ndev->dev_addr[2] << 16) |
216 (ndev->dev_addr[3] << 24));
217 /* There are reserved bits in EUAW1
218 * so don't affect them Set MAC bits [47:32] in EUAW1 */
219 temac_indirect_out32(lp, XTE_UAW1_OFFSET,
220 (ndev->dev_addr[4] & 0x000000ff) |
221 (ndev->dev_addr[5] << 8));
222 mutex_unlock(&lp->indirect_mutex);
227 static int netdev_set_mac_address(struct net_device *ndev, void *p)
229 struct sockaddr *addr = p;
231 return temac_set_mac_address(ndev, addr->sa_data);
234 static void temac_set_multicast_list(struct net_device *ndev)
236 struct temac_local *lp = netdev_priv(ndev);
237 u32 multi_addr_msw, multi_addr_lsw, val;
240 mutex_lock(&lp->indirect_mutex);
241 if (ndev->flags & (IFF_ALLMULTI | IFF_PROMISC) ||
242 netdev_mc_count(ndev) > MULTICAST_CAM_TABLE_NUM) {
244 * We must make the kernel realise we had to move
245 * into promisc mode or we start all out war on
246 * the cable. If it was a promisc request the
247 * flag is already set. If not we assert it.
249 ndev->flags |= IFF_PROMISC;
250 temac_indirect_out32(lp, XTE_AFM_OFFSET, XTE_AFM_EPPRM_MASK);
251 dev_info(&ndev->dev, "Promiscuous mode enabled.\n");
252 } else if (!netdev_mc_empty(ndev)) {
253 struct dev_mc_list *mclist = ndev->mc_list;
254 for (i = 0; mclist && i < netdev_mc_count(ndev); i++) {
256 if (i >= MULTICAST_CAM_TABLE_NUM)
258 multi_addr_msw = ((mclist->dmi_addr[3] << 24) |
259 (mclist->dmi_addr[2] << 16) |
260 (mclist->dmi_addr[1] << 8) |
261 (mclist->dmi_addr[0]));
262 temac_indirect_out32(lp, XTE_MAW0_OFFSET,
264 multi_addr_lsw = ((mclist->dmi_addr[5] << 8) |
265 (mclist->dmi_addr[4]) | (i << 16));
266 temac_indirect_out32(lp, XTE_MAW1_OFFSET,
268 mclist = mclist->next;
271 val = temac_indirect_in32(lp, XTE_AFM_OFFSET);
272 temac_indirect_out32(lp, XTE_AFM_OFFSET,
273 val & ~XTE_AFM_EPPRM_MASK);
274 temac_indirect_out32(lp, XTE_MAW0_OFFSET, 0);
275 temac_indirect_out32(lp, XTE_MAW1_OFFSET, 0);
276 dev_info(&ndev->dev, "Promiscuous mode disabled.\n");
278 mutex_unlock(&lp->indirect_mutex);
281 struct temac_option {
287 } temac_options[] = {
288 /* Turn on jumbo packet support for both Rx and Tx */
290 .opt = XTE_OPTION_JUMBO,
291 .reg = XTE_TXC_OFFSET,
292 .m_or = XTE_TXC_TXJMBO_MASK,
295 .opt = XTE_OPTION_JUMBO,
296 .reg = XTE_RXC1_OFFSET,
297 .m_or =XTE_RXC1_RXJMBO_MASK,
299 /* Turn on VLAN packet support for both Rx and Tx */
301 .opt = XTE_OPTION_VLAN,
302 .reg = XTE_TXC_OFFSET,
303 .m_or =XTE_TXC_TXVLAN_MASK,
306 .opt = XTE_OPTION_VLAN,
307 .reg = XTE_RXC1_OFFSET,
308 .m_or =XTE_RXC1_RXVLAN_MASK,
310 /* Turn on FCS stripping on receive packets */
312 .opt = XTE_OPTION_FCS_STRIP,
313 .reg = XTE_RXC1_OFFSET,
314 .m_or =XTE_RXC1_RXFCS_MASK,
316 /* Turn on FCS insertion on transmit packets */
318 .opt = XTE_OPTION_FCS_INSERT,
319 .reg = XTE_TXC_OFFSET,
320 .m_or =XTE_TXC_TXFCS_MASK,
322 /* Turn on length/type field checking on receive packets */
324 .opt = XTE_OPTION_LENTYPE_ERR,
325 .reg = XTE_RXC1_OFFSET,
326 .m_or =XTE_RXC1_RXLT_MASK,
328 /* Turn on flow control */
330 .opt = XTE_OPTION_FLOW_CONTROL,
331 .reg = XTE_FCC_OFFSET,
332 .m_or =XTE_FCC_RXFLO_MASK,
334 /* Turn on flow control */
336 .opt = XTE_OPTION_FLOW_CONTROL,
337 .reg = XTE_FCC_OFFSET,
338 .m_or =XTE_FCC_TXFLO_MASK,
340 /* Turn on promiscuous frame filtering (all frames are received ) */
342 .opt = XTE_OPTION_PROMISC,
343 .reg = XTE_AFM_OFFSET,
344 .m_or =XTE_AFM_EPPRM_MASK,
346 /* Enable transmitter if not already enabled */
348 .opt = XTE_OPTION_TXEN,
349 .reg = XTE_TXC_OFFSET,
350 .m_or =XTE_TXC_TXEN_MASK,
352 /* Enable receiver? */
354 .opt = XTE_OPTION_RXEN,
355 .reg = XTE_RXC1_OFFSET,
356 .m_or =XTE_RXC1_RXEN_MASK,
364 static u32 temac_setoptions(struct net_device *ndev, u32 options)
366 struct temac_local *lp = netdev_priv(ndev);
367 struct temac_option *tp = &temac_options[0];
370 mutex_lock(&lp->indirect_mutex);
372 reg = temac_indirect_in32(lp, tp->reg) & ~tp->m_or;
373 if (options & tp->opt)
375 temac_indirect_out32(lp, tp->reg, reg);
378 lp->options |= options;
379 mutex_unlock(&lp->indirect_mutex);
384 /* Initilize temac */
385 static void temac_device_reset(struct net_device *ndev)
387 struct temac_local *lp = netdev_priv(ndev);
391 /* Perform a software reset */
393 /* 0x300 host enable bit ? */
394 /* reset PHY through control register ?:1 */
396 dev_dbg(&ndev->dev, "%s()\n", __func__);
398 mutex_lock(&lp->indirect_mutex);
399 /* Reset the receiver and wait for it to finish reset */
400 temac_indirect_out32(lp, XTE_RXC1_OFFSET, XTE_RXC1_RXRST_MASK);
402 while (temac_indirect_in32(lp, XTE_RXC1_OFFSET) & XTE_RXC1_RXRST_MASK) {
404 if (--timeout == 0) {
406 "temac_device_reset RX reset timeout!!\n");
411 /* Reset the transmitter and wait for it to finish reset */
412 temac_indirect_out32(lp, XTE_TXC_OFFSET, XTE_TXC_TXRST_MASK);
414 while (temac_indirect_in32(lp, XTE_TXC_OFFSET) & XTE_TXC_TXRST_MASK) {
416 if (--timeout == 0) {
418 "temac_device_reset TX reset timeout!!\n");
423 /* Disable the receiver */
424 val = temac_indirect_in32(lp, XTE_RXC1_OFFSET);
425 temac_indirect_out32(lp, XTE_RXC1_OFFSET, val & ~XTE_RXC1_RXEN_MASK);
427 /* Reset Local Link (DMA) */
428 temac_dma_out32(lp, DMA_CONTROL_REG, DMA_CONTROL_RST);
430 while (temac_dma_in32(lp, DMA_CONTROL_REG) & DMA_CONTROL_RST) {
432 if (--timeout == 0) {
434 "temac_device_reset DMA reset timeout!!\n");
438 temac_dma_out32(lp, DMA_CONTROL_REG, DMA_TAIL_ENABLE);
440 temac_dma_bd_init(ndev);
442 temac_indirect_out32(lp, XTE_RXC0_OFFSET, 0);
443 temac_indirect_out32(lp, XTE_RXC1_OFFSET, 0);
444 temac_indirect_out32(lp, XTE_TXC_OFFSET, 0);
445 temac_indirect_out32(lp, XTE_FCC_OFFSET, XTE_FCC_RXFLO_MASK);
447 mutex_unlock(&lp->indirect_mutex);
449 /* Sync default options with HW
450 * but leave receiver and transmitter disabled. */
451 temac_setoptions(ndev,
452 lp->options & ~(XTE_OPTION_TXEN | XTE_OPTION_RXEN));
454 temac_set_mac_address(ndev, NULL);
456 /* Set address filter table */
457 temac_set_multicast_list(ndev);
458 if (temac_setoptions(ndev, lp->options))
459 dev_err(&ndev->dev, "Error setting TEMAC options\n");
461 /* Init Driver variable */
462 ndev->trans_start = 0;
465 void temac_adjust_link(struct net_device *ndev)
467 struct temac_local *lp = netdev_priv(ndev);
468 struct phy_device *phy = lp->phy_dev;
472 /* hash together the state values to decide if something has changed */
473 link_state = phy->speed | (phy->duplex << 1) | phy->link;
475 mutex_lock(&lp->indirect_mutex);
476 if (lp->last_link != link_state) {
477 mii_speed = temac_indirect_in32(lp, XTE_EMCFG_OFFSET);
478 mii_speed &= ~XTE_EMCFG_LINKSPD_MASK;
480 switch (phy->speed) {
481 case SPEED_1000: mii_speed |= XTE_EMCFG_LINKSPD_1000; break;
482 case SPEED_100: mii_speed |= XTE_EMCFG_LINKSPD_100; break;
483 case SPEED_10: mii_speed |= XTE_EMCFG_LINKSPD_10; break;
486 /* Write new speed setting out to TEMAC */
487 temac_indirect_out32(lp, XTE_EMCFG_OFFSET, mii_speed);
488 lp->last_link = link_state;
489 phy_print_status(phy);
491 mutex_unlock(&lp->indirect_mutex);
494 static void temac_start_xmit_done(struct net_device *ndev)
496 struct temac_local *lp = netdev_priv(ndev);
497 struct cdmac_bd *cur_p;
498 unsigned int stat = 0;
500 cur_p = &lp->tx_bd_v[lp->tx_bd_ci];
503 while (stat & STS_CTRL_APP0_CMPLT) {
504 dma_unmap_single(ndev->dev.parent, cur_p->phys, cur_p->len,
507 dev_kfree_skb_irq((struct sk_buff *)cur_p->app4);
510 ndev->stats.tx_packets++;
511 ndev->stats.tx_bytes += cur_p->len;
514 if (lp->tx_bd_ci >= TX_BD_NUM)
517 cur_p = &lp->tx_bd_v[lp->tx_bd_ci];
521 netif_wake_queue(ndev);
524 static int temac_start_xmit(struct sk_buff *skb, struct net_device *ndev)
526 struct temac_local *lp = netdev_priv(ndev);
527 struct cdmac_bd *cur_p;
528 dma_addr_t start_p, tail_p;
530 unsigned long num_frag;
533 num_frag = skb_shinfo(skb)->nr_frags;
534 frag = &skb_shinfo(skb)->frags[0];
535 start_p = lp->tx_bd_p + sizeof(*lp->tx_bd_v) * lp->tx_bd_tail;
536 cur_p = &lp->tx_bd_v[lp->tx_bd_tail];
538 if (cur_p->app0 & STS_CTRL_APP0_CMPLT) {
539 if (!netif_queue_stopped(ndev)) {
540 netif_stop_queue(ndev);
541 return NETDEV_TX_BUSY;
543 return NETDEV_TX_BUSY;
547 if (skb->ip_summed == CHECKSUM_PARTIAL) {
548 const struct iphdr *ip = ip_hdr(skb);
549 int length = 0, start = 0, insert = 0;
551 switch (ip->protocol) {
553 start = sizeof(struct iphdr) + ETH_HLEN;
554 insert = sizeof(struct iphdr) + ETH_HLEN + 16;
555 length = ip->tot_len - sizeof(struct iphdr);
558 start = sizeof(struct iphdr) + ETH_HLEN;
559 insert = sizeof(struct iphdr) + ETH_HLEN + 6;
560 length = ip->tot_len - sizeof(struct iphdr);
565 cur_p->app1 = ((start << 16) | insert);
566 cur_p->app2 = csum_tcpudp_magic(ip->saddr, ip->daddr,
567 length, ip->protocol, 0);
568 skb->data[insert] = 0;
569 skb->data[insert + 1] = 0;
571 cur_p->app0 |= STS_CTRL_APP0_SOP;
572 cur_p->len = skb_headlen(skb);
573 cur_p->phys = dma_map_single(ndev->dev.parent, skb->data, skb->len,
575 cur_p->app4 = (unsigned long)skb;
577 for (ii = 0; ii < num_frag; ii++) {
579 if (lp->tx_bd_tail >= TX_BD_NUM)
582 cur_p = &lp->tx_bd_v[lp->tx_bd_tail];
583 cur_p->phys = dma_map_single(ndev->dev.parent,
584 (void *)page_address(frag->page) +
586 frag->size, DMA_TO_DEVICE);
587 cur_p->len = frag->size;
591 cur_p->app0 |= STS_CTRL_APP0_EOP;
593 tail_p = lp->tx_bd_p + sizeof(*lp->tx_bd_v) * lp->tx_bd_tail;
595 if (lp->tx_bd_tail >= TX_BD_NUM)
598 /* Kick off the transfer */
599 temac_dma_out32(lp, TX_TAILDESC_PTR, tail_p); /* DMA start */
605 static void ll_temac_recv(struct net_device *ndev)
607 struct temac_local *lp = netdev_priv(ndev);
608 struct sk_buff *skb, *new_skb;
610 struct cdmac_bd *cur_p;
613 unsigned long skb_vaddr;
616 spin_lock_irqsave(&lp->rx_lock, flags);
618 tail_p = lp->rx_bd_p + sizeof(*lp->rx_bd_v) * lp->rx_bd_ci;
619 cur_p = &lp->rx_bd_v[lp->rx_bd_ci];
621 bdstat = cur_p->app0;
622 while ((bdstat & STS_CTRL_APP0_CMPLT)) {
624 skb = lp->rx_skb[lp->rx_bd_ci];
625 length = cur_p->app4 & 0x3FFF;
627 skb_vaddr = virt_to_bus(skb->data);
628 dma_unmap_single(ndev->dev.parent, skb_vaddr, length,
631 skb_put(skb, length);
633 skb->protocol = eth_type_trans(skb, ndev);
634 skb->ip_summed = CHECKSUM_NONE;
638 ndev->stats.rx_packets++;
639 ndev->stats.rx_bytes += length;
641 new_skb = alloc_skb(XTE_MAX_JUMBO_FRAME_SIZE + XTE_ALIGN,
644 dev_err(&ndev->dev, "no memory for new sk_buff\n");
645 spin_unlock_irqrestore(&lp->rx_lock, flags);
649 skb_reserve(new_skb, BUFFER_ALIGN(new_skb->data));
651 cur_p->app0 = STS_CTRL_APP0_IRQONEND;
652 cur_p->phys = dma_map_single(ndev->dev.parent, new_skb->data,
653 XTE_MAX_JUMBO_FRAME_SIZE,
655 cur_p->len = XTE_MAX_JUMBO_FRAME_SIZE;
656 lp->rx_skb[lp->rx_bd_ci] = new_skb;
659 if (lp->rx_bd_ci >= RX_BD_NUM)
662 cur_p = &lp->rx_bd_v[lp->rx_bd_ci];
663 bdstat = cur_p->app0;
665 temac_dma_out32(lp, RX_TAILDESC_PTR, tail_p);
667 spin_unlock_irqrestore(&lp->rx_lock, flags);
670 static irqreturn_t ll_temac_tx_irq(int irq, void *_ndev)
672 struct net_device *ndev = _ndev;
673 struct temac_local *lp = netdev_priv(ndev);
676 status = temac_dma_in32(lp, TX_IRQ_REG);
677 temac_dma_out32(lp, TX_IRQ_REG, status);
679 if (status & (IRQ_COAL | IRQ_DLY))
680 temac_start_xmit_done(lp->ndev);
682 dev_err(&ndev->dev, "DMA error 0x%x\n", status);
687 static irqreturn_t ll_temac_rx_irq(int irq, void *_ndev)
689 struct net_device *ndev = _ndev;
690 struct temac_local *lp = netdev_priv(ndev);
693 /* Read and clear the status registers */
694 status = temac_dma_in32(lp, RX_IRQ_REG);
695 temac_dma_out32(lp, RX_IRQ_REG, status);
697 if (status & (IRQ_COAL | IRQ_DLY))
698 ll_temac_recv(lp->ndev);
703 static int temac_open(struct net_device *ndev)
705 struct temac_local *lp = netdev_priv(ndev);
708 dev_dbg(&ndev->dev, "temac_open()\n");
711 lp->phy_dev = of_phy_connect(lp->ndev, lp->phy_node,
712 temac_adjust_link, 0, 0);
714 dev_err(lp->dev, "of_phy_connect() failed\n");
718 phy_start(lp->phy_dev);
721 rc = request_irq(lp->tx_irq, ll_temac_tx_irq, 0, ndev->name, ndev);
724 rc = request_irq(lp->rx_irq, ll_temac_rx_irq, 0, ndev->name, ndev);
728 temac_device_reset(ndev);
732 free_irq(lp->tx_irq, ndev);
735 phy_disconnect(lp->phy_dev);
737 dev_err(lp->dev, "request_irq() failed\n");
741 static int temac_stop(struct net_device *ndev)
743 struct temac_local *lp = netdev_priv(ndev);
745 dev_dbg(&ndev->dev, "temac_close()\n");
747 free_irq(lp->tx_irq, ndev);
748 free_irq(lp->rx_irq, ndev);
751 phy_disconnect(lp->phy_dev);
757 #ifdef CONFIG_NET_POLL_CONTROLLER
759 temac_poll_controller(struct net_device *ndev)
761 struct temac_local *lp = netdev_priv(ndev);
763 disable_irq(lp->tx_irq);
764 disable_irq(lp->rx_irq);
766 ll_temac_rx_irq(lp->tx_irq, lp);
767 ll_temac_tx_irq(lp->rx_irq, lp);
769 enable_irq(lp->tx_irq);
770 enable_irq(lp->rx_irq);
774 static const struct net_device_ops temac_netdev_ops = {
775 .ndo_open = temac_open,
776 .ndo_stop = temac_stop,
777 .ndo_start_xmit = temac_start_xmit,
778 .ndo_set_mac_address = netdev_set_mac_address,
779 //.ndo_set_multicast_list = temac_set_multicast_list,
780 #ifdef CONFIG_NET_POLL_CONTROLLER
781 .ndo_poll_controller = temac_poll_controller,
785 /* ---------------------------------------------------------------------
786 * SYSFS device attributes
788 static ssize_t temac_show_llink_regs(struct device *dev,
789 struct device_attribute *attr, char *buf)
791 struct net_device *ndev = dev_get_drvdata(dev);
792 struct temac_local *lp = netdev_priv(ndev);
795 for (i = 0; i < 0x11; i++)
796 len += sprintf(buf + len, "%.8x%s", temac_dma_in32(lp, i),
797 (i % 8) == 7 ? "\n" : " ");
798 len += sprintf(buf + len, "\n");
803 static DEVICE_ATTR(llink_regs, 0440, temac_show_llink_regs, NULL);
805 static struct attribute *temac_device_attrs[] = {
806 &dev_attr_llink_regs.attr,
810 static const struct attribute_group temac_attr_group = {
811 .attrs = temac_device_attrs,
815 temac_of_probe(struct of_device *op, const struct of_device_id *match)
817 struct device_node *np;
818 struct temac_local *lp;
819 struct net_device *ndev;
824 /* Init network device structure */
825 ndev = alloc_etherdev(sizeof(*lp));
827 dev_err(&op->dev, "could not allocate device.\n");
831 dev_set_drvdata(&op->dev, ndev);
832 SET_NETDEV_DEV(ndev, &op->dev);
833 ndev->flags &= ~IFF_MULTICAST; /* clear multicast */
834 ndev->features = NETIF_F_SG | NETIF_F_FRAGLIST;
835 ndev->netdev_ops = &temac_netdev_ops;
837 ndev->features |= NETIF_F_IP_CSUM; /* Can checksum TCP/UDP over IPv4. */
838 ndev->features |= NETIF_F_HW_CSUM; /* Can checksum all the packets. */
839 ndev->features |= NETIF_F_IPV6_CSUM; /* Can checksum IPV6 TCP/UDP */
840 ndev->features |= NETIF_F_HIGHDMA; /* Can DMA to high memory. */
841 ndev->features |= NETIF_F_HW_VLAN_TX; /* Transmit VLAN hw accel */
842 ndev->features |= NETIF_F_HW_VLAN_RX; /* Receive VLAN hw acceleration */
843 ndev->features |= NETIF_F_HW_VLAN_FILTER; /* Receive VLAN filtering */
844 ndev->features |= NETIF_F_VLAN_CHALLENGED; /* cannot handle VLAN pkts */
845 ndev->features |= NETIF_F_GSO; /* Enable software GSO. */
846 ndev->features |= NETIF_F_MULTI_QUEUE; /* Has multiple TX/RX queues */
847 ndev->features |= NETIF_F_LRO; /* large receive offload */
850 /* setup temac private info structure */
851 lp = netdev_priv(ndev);
854 lp->options = XTE_OPTION_DEFAULTS;
855 spin_lock_init(&lp->rx_lock);
856 mutex_init(&lp->indirect_mutex);
858 /* map device registers */
859 lp->regs = of_iomap(op->node, 0);
861 dev_err(&op->dev, "could not map temac regs.\n");
865 /* Find the DMA node, map the DMA registers, and decode the DMA IRQs */
866 np = of_parse_phandle(op->node, "llink-connected", 0);
868 dev_err(&op->dev, "could not find DMA node\n");
872 dcrs = dcr_resource_start(np, 0);
874 dev_err(&op->dev, "could not get DMA register address\n");
877 lp->sdma_dcrs = dcr_map(np, dcrs, dcr_resource_len(np, 0));
878 dev_dbg(&op->dev, "DCR base: %x\n", dcrs);
880 lp->rx_irq = irq_of_parse_and_map(np, 0);
881 lp->tx_irq = irq_of_parse_and_map(np, 1);
882 if (!lp->rx_irq || !lp->tx_irq) {
883 dev_err(&op->dev, "could not determine irqs\n");
888 of_node_put(np); /* Finished with the DMA node; drop the reference */
890 /* Retrieve the MAC address */
891 addr = of_get_property(op->node, "local-mac-address", &size);
892 if ((!addr) || (size != 6)) {
893 dev_err(&op->dev, "could not find MAC address\n");
897 temac_set_mac_address(ndev, (void *)addr);
899 rc = temac_mdio_setup(lp, op->node);
901 dev_warn(&op->dev, "error registering MDIO bus\n");
903 lp->phy_node = of_parse_phandle(op->node, "phy-handle", 0);
905 dev_dbg(lp->dev, "using PHY node %s (%p)\n", np->full_name, np);
907 /* Add the device attributes */
908 rc = sysfs_create_group(&lp->dev->kobj, &temac_attr_group);
910 dev_err(lp->dev, "Error creating sysfs files\n");
914 rc = register_netdev(lp->ndev);
916 dev_err(lp->dev, "register_netdev() error (%i)\n", rc);
917 goto err_register_ndev;
923 sysfs_remove_group(&lp->dev->kobj, &temac_attr_group);
930 static int __devexit temac_of_remove(struct of_device *op)
932 struct net_device *ndev = dev_get_drvdata(&op->dev);
933 struct temac_local *lp = netdev_priv(ndev);
935 temac_mdio_teardown(lp);
936 unregister_netdev(ndev);
937 sysfs_remove_group(&lp->dev->kobj, &temac_attr_group);
939 of_node_put(lp->phy_node);
941 dev_set_drvdata(&op->dev, NULL);
946 static struct of_device_id temac_of_match[] __devinitdata = {
947 { .compatible = "xlnx,xps-ll-temac-1.01.b", },
948 { .compatible = "xlnx,xps-ll-temac-2.00.a", },
949 { .compatible = "xlnx,xps-ll-temac-2.02.a", },
950 { .compatible = "xlnx,xps-ll-temac-2.03.a", },
953 MODULE_DEVICE_TABLE(of, temac_of_match);
955 static struct of_platform_driver temac_of_driver = {
956 .match_table = temac_of_match,
957 .probe = temac_of_probe,
958 .remove = __devexit_p(temac_of_remove),
960 .owner = THIS_MODULE,
961 .name = "xilinx_temac",
965 static int __init temac_init(void)
967 return of_register_platform_driver(&temac_of_driver);
969 module_init(temac_init);
971 static void __exit temac_exit(void)
973 of_unregister_platform_driver(&temac_of_driver);
975 module_exit(temac_exit);
977 MODULE_DESCRIPTION("Xilinx LL_TEMAC Ethernet driver");
978 MODULE_AUTHOR("Yoshio Kashiwagi");
979 MODULE_LICENSE("GPL");