1 /*******************************************************************************
3 Intel 10 Gigabit PCI Express Linux driver
4 Copyright(c) 1999 - 2009 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26 *******************************************************************************/
31 #include <linux/types.h>
32 #include <linux/pci.h>
33 #include <linux/netdevice.h>
34 #include <linux/aer.h>
36 #include "ixgbe_type.h"
37 #include "ixgbe_common.h"
38 #include "ixgbe_dcb.h"
39 #if defined(CONFIG_FCOE) || defined(CONFIG_FCOE_MODULE)
41 #include "ixgbe_fcoe.h"
42 #endif /* CONFIG_FCOE or CONFIG_FCOE_MODULE */
43 #ifdef CONFIG_IXGBE_DCA
44 #include <linux/dca.h>
48 #define DPRINTK(nlevel, klevel, fmt, args...) \
49 ((void)((NETIF_MSG_##nlevel & adapter->msg_enable) && \
50 printk(KERN_##klevel PFX "%s: %s: " fmt, adapter->netdev->name, \
53 /* TX/RX descriptor defines */
54 #define IXGBE_DEFAULT_TXD 1024
55 #define IXGBE_MAX_TXD 4096
56 #define IXGBE_MIN_TXD 64
58 #define IXGBE_DEFAULT_RXD 1024
59 #define IXGBE_MAX_RXD 4096
60 #define IXGBE_MIN_RXD 64
63 #define IXGBE_DEFAULT_FCRTL 0x10000
64 #define IXGBE_MIN_FCRTL 0x40
65 #define IXGBE_MAX_FCRTL 0x7FF80
66 #define IXGBE_DEFAULT_FCRTH 0x20000
67 #define IXGBE_MIN_FCRTH 0x600
68 #define IXGBE_MAX_FCRTH 0x7FFF0
69 #define IXGBE_DEFAULT_FCPAUSE 0xFFFF
70 #define IXGBE_MIN_FCPAUSE 0
71 #define IXGBE_MAX_FCPAUSE 0xFFFF
73 /* Supported Rx Buffer Sizes */
74 #define IXGBE_RXBUFFER_64 64 /* Used for packet split */
75 #define IXGBE_RXBUFFER_128 128 /* Used for packet split */
76 #define IXGBE_RXBUFFER_256 256 /* Used for packet split */
77 #define IXGBE_RXBUFFER_2048 2048
78 #define IXGBE_RXBUFFER_4096 4096
79 #define IXGBE_RXBUFFER_8192 8192
80 #define IXGBE_MAX_RXBUFFER 16384 /* largest size for a single descriptor */
82 #define IXGBE_RX_HDR_SIZE IXGBE_RXBUFFER_256
84 #define MAXIMUM_ETHERNET_VLAN_SIZE (ETH_FRAME_LEN + ETH_FCS_LEN + VLAN_HLEN)
86 /* How many Rx Buffers do we bundle into one write to the hardware ? */
87 #define IXGBE_RX_BUFFER_WRITE 16 /* Must be power of 2 */
89 #define IXGBE_TX_FLAGS_CSUM (u32)(1)
90 #define IXGBE_TX_FLAGS_VLAN (u32)(1 << 1)
91 #define IXGBE_TX_FLAGS_TSO (u32)(1 << 2)
92 #define IXGBE_TX_FLAGS_IPV4 (u32)(1 << 3)
93 #define IXGBE_TX_FLAGS_FCOE (u32)(1 << 4)
94 #define IXGBE_TX_FLAGS_FSO (u32)(1 << 5)
95 #define IXGBE_TX_FLAGS_VLAN_MASK 0xffff0000
96 #define IXGBE_TX_FLAGS_VLAN_PRIO_MASK 0x0000e000
97 #define IXGBE_TX_FLAGS_VLAN_SHIFT 16
99 #define IXGBE_MAX_RSC_INT_RATE 162760
101 /* wrapper around a pointer to a socket buffer,
102 * so a DMA handle can be stored along with the buffer */
103 struct ixgbe_tx_buffer {
106 unsigned long time_stamp;
111 struct ixgbe_rx_buffer {
116 unsigned int page_offset;
119 struct ixgbe_queue_stats {
125 void *desc; /* descriptor ring memory */
127 struct ixgbe_tx_buffer *tx_buffer_info;
128 struct ixgbe_rx_buffer *rx_buffer_info;
132 u16 count; /* amount of descriptors */
137 u8 queue_index; /* needed for multiqueue queue management */
142 unsigned int total_bytes;
143 unsigned int total_packets;
145 #ifdef CONFIG_IXGBE_DCA
146 /* cpu for tx queue */
150 u16 work_limit; /* max work per interrupt */
151 u16 reg_idx; /* holds the special value that gets
152 * the hardware register offset
153 * associated with this ring, which is
154 * different for DCB and RSS modes
157 struct ixgbe_queue_stats stats;
158 unsigned long reinit_state;
159 u64 rsc_count; /* stat for coalesced packets */
161 unsigned int size; /* length in bytes */
162 dma_addr_t dma; /* phys. address of descriptor ring */
165 enum ixgbe_ring_f_enum {
173 #endif /* IXGBE_FCOE */
175 RING_F_ARRAY_SIZE /* must be last in enum set */
178 #define IXGBE_MAX_DCB_INDICES 8
179 #define IXGBE_MAX_RSS_INDICES 16
180 #define IXGBE_MAX_VMDQ_INDICES 16
181 #define IXGBE_MAX_FDIR_INDICES 64
183 #define IXGBE_MAX_FCOE_INDICES 8
184 #endif /* IXGBE_FCOE */
185 struct ixgbe_ring_feature {
190 #define MAX_RX_QUEUES 128
191 #define MAX_TX_QUEUES 128
193 #define MAX_RX_PACKET_BUFFERS ((adapter->flags & IXGBE_FLAG_DCB_ENABLED) \
195 #define MAX_TX_PACKET_BUFFERS MAX_RX_PACKET_BUFFERS
197 /* MAX_MSIX_Q_VECTORS of these are allocated,
198 * but we only use one per queue-specific vector.
200 struct ixgbe_q_vector {
201 struct ixgbe_adapter *adapter;
202 unsigned int v_idx; /* index of q_vector within array, also used for
203 * finding the bit in EICR and friends that
204 * represents the vector for this ring */
205 struct napi_struct napi;
206 DECLARE_BITMAP(rxr_idx, MAX_RX_QUEUES); /* Rx ring indices */
207 DECLARE_BITMAP(txr_idx, MAX_TX_QUEUES); /* Tx ring indices */
208 u8 rxr_count; /* Rx ring count assigned to this vector */
209 u8 txr_count; /* Tx ring count assigned to this vector */
215 /* Helper macros to switch between ints/sec and what the register uses.
216 * And yes, it's the same math going both ways. The lowest value
217 * supported by all of the ixgbe hardware is 8.
219 #define EITR_INTS_PER_SEC_TO_REG(_eitr) \
220 ((_eitr) ? (1000000000 / ((_eitr) * 256)) : 8)
221 #define EITR_REG_TO_INTS_PER_SEC EITR_INTS_PER_SEC_TO_REG
223 #define IXGBE_DESC_UNUSED(R) \
224 ((((R)->next_to_clean > (R)->next_to_use) ? 0 : (R)->count) + \
225 (R)->next_to_clean - (R)->next_to_use - 1)
227 #define IXGBE_RX_DESC_ADV(R, i) \
228 (&(((union ixgbe_adv_rx_desc *)((R).desc))[i]))
229 #define IXGBE_TX_DESC_ADV(R, i) \
230 (&(((union ixgbe_adv_tx_desc *)((R).desc))[i]))
231 #define IXGBE_TX_CTXTDESC_ADV(R, i) \
232 (&(((struct ixgbe_adv_tx_context_desc *)((R).desc))[i]))
234 #define IXGBE_GET_DESC(R, i, type) (&(((struct type *)((R).desc))[i]))
235 #define IXGBE_TX_DESC(R, i) IXGBE_GET_DESC(R, i, ixgbe_legacy_tx_desc)
236 #define IXGBE_RX_DESC(R, i) IXGBE_GET_DESC(R, i, ixgbe_legacy_rx_desc)
238 #define IXGBE_MAX_JUMBO_FRAME_SIZE 16128
240 /* Use 3K as the baby jumbo frame size for FCoE */
241 #define IXGBE_FCOE_JUMBO_FRAME_SIZE 3072
242 #endif /* IXGBE_FCOE */
244 #define OTHER_VECTOR 1
245 #define NON_Q_VECTORS (OTHER_VECTOR)
247 #define MAX_MSIX_VECTORS_82599 64
248 #define MAX_MSIX_Q_VECTORS_82599 64
249 #define MAX_MSIX_VECTORS_82598 18
250 #define MAX_MSIX_Q_VECTORS_82598 16
252 #define MAX_MSIX_Q_VECTORS MAX_MSIX_Q_VECTORS_82599
253 #define MAX_MSIX_COUNT MAX_MSIX_VECTORS_82599
255 #define MIN_MSIX_Q_VECTORS 2
256 #define MIN_MSIX_COUNT (MIN_MSIX_Q_VECTORS + NON_Q_VECTORS)
258 /* board specific private data structure */
259 struct ixgbe_adapter {
260 struct timer_list watchdog_timer;
261 struct vlan_group *vlgrp;
263 struct work_struct reset_task;
264 struct ixgbe_q_vector *q_vector[MAX_MSIX_Q_VECTORS];
265 char name[MAX_MSIX_COUNT][IFNAMSIZ + 9];
266 struct ixgbe_dcb_config dcb_cfg;
267 struct ixgbe_dcb_config temp_dcb_cfg;
269 enum ixgbe_fc_mode last_lfc_mode;
271 /* Interrupt Throttle Rate */
277 struct ixgbe_ring *tx_ring; /* One per active queue */
284 u32 tx_timeout_count;
288 struct ixgbe_ring *rx_ring; /* One per active queue */
290 u64 hw_csum_rx_error;
291 u64 hw_rx_no_dma_resources;
294 int num_msix_vectors;
295 int max_msix_q_vectors; /* true count of q_vectors for device */
296 struct ixgbe_ring_feature ring_feature[RING_F_ARRAY_SIZE];
297 struct msix_entry *msix_entries;
300 u32 alloc_rx_page_failed;
301 u32 alloc_rx_buff_failed;
303 /* Some features need tri-state capability,
304 * thus the additional *_CAPABLE flags.
307 #define IXGBE_FLAG_RX_CSUM_ENABLED (u32)(1)
308 #define IXGBE_FLAG_MSI_CAPABLE (u32)(1 << 1)
309 #define IXGBE_FLAG_MSI_ENABLED (u32)(1 << 2)
310 #define IXGBE_FLAG_MSIX_CAPABLE (u32)(1 << 3)
311 #define IXGBE_FLAG_MSIX_ENABLED (u32)(1 << 4)
312 #define IXGBE_FLAG_RX_1BUF_CAPABLE (u32)(1 << 6)
313 #define IXGBE_FLAG_RX_PS_CAPABLE (u32)(1 << 7)
314 #define IXGBE_FLAG_RX_PS_ENABLED (u32)(1 << 8)
315 #define IXGBE_FLAG_IN_NETPOLL (u32)(1 << 9)
316 #define IXGBE_FLAG_DCA_ENABLED (u32)(1 << 10)
317 #define IXGBE_FLAG_DCA_CAPABLE (u32)(1 << 11)
318 #define IXGBE_FLAG_IMIR_ENABLED (u32)(1 << 12)
319 #define IXGBE_FLAG_MQ_CAPABLE (u32)(1 << 13)
320 #define IXGBE_FLAG_DCB_ENABLED (u32)(1 << 14)
321 #define IXGBE_FLAG_RSS_ENABLED (u32)(1 << 16)
322 #define IXGBE_FLAG_RSS_CAPABLE (u32)(1 << 17)
323 #define IXGBE_FLAG_VMDQ_CAPABLE (u32)(1 << 18)
324 #define IXGBE_FLAG_VMDQ_ENABLED (u32)(1 << 19)
325 #define IXGBE_FLAG_FAN_FAIL_CAPABLE (u32)(1 << 20)
326 #define IXGBE_FLAG_NEED_LINK_UPDATE (u32)(1 << 22)
327 #define IXGBE_FLAG_IN_WATCHDOG_TASK (u32)(1 << 23)
328 #define IXGBE_FLAG_IN_SFP_LINK_TASK (u32)(1 << 24)
329 #define IXGBE_FLAG_IN_SFP_MOD_TASK (u32)(1 << 25)
330 #define IXGBE_FLAG_FDIR_HASH_CAPABLE (u32)(1 << 26)
331 #define IXGBE_FLAG_FDIR_PERFECT_CAPABLE (u32)(1 << 27)
332 #define IXGBE_FLAG_FCOE_CAPABLE (u32)(1 << 28)
333 #define IXGBE_FLAG_FCOE_ENABLED (u32)(1 << 29)
336 #define IXGBE_FLAG2_RSC_CAPABLE (u32)(1)
337 #define IXGBE_FLAG2_RSC_ENABLED (u32)(1 << 1)
338 /* default to trying for four seconds */
339 #define IXGBE_TRY_LINK_TIMEOUT (4 * HZ)
341 /* OS defined structs */
342 struct net_device *netdev;
343 struct pci_dev *pdev;
344 struct net_device_stats net_stats;
347 struct ixgbe_ring test_tx_ring;
348 struct ixgbe_ring test_rx_ring;
350 /* structs defined in ixgbe_hw.h */
353 struct ixgbe_hw_stats stats;
355 /* Interrupt Throttle Rate */
360 unsigned int tx_ring_count;
361 unsigned int rx_ring_count;
365 unsigned long link_check_timeout;
367 struct work_struct watchdog_task;
368 struct work_struct sfp_task;
369 struct timer_list sfp_timer;
370 struct work_struct multispeed_fiber_task;
371 struct work_struct sfp_config_module_task;
374 spinlock_t fdir_perfect_lock;
375 struct work_struct fdir_reinit_task;
377 struct ixgbe_fcoe fcoe;
378 #endif /* IXGBE_FCOE */
388 __IXGBE_FDIR_INIT_DONE,
389 __IXGBE_SFP_MODULE_NOT_FOUND
397 extern struct ixgbe_info ixgbe_82598_info;
398 extern struct ixgbe_info ixgbe_82599_info;
399 #ifdef CONFIG_IXGBE_DCB
400 extern struct dcbnl_rtnl_ops dcbnl_ops;
401 extern int ixgbe_copy_dcb_cfg(struct ixgbe_dcb_config *src_dcb_cfg,
402 struct ixgbe_dcb_config *dst_dcb_cfg,
406 extern char ixgbe_driver_name[];
407 extern const char ixgbe_driver_version[];
409 extern int ixgbe_up(struct ixgbe_adapter *adapter);
410 extern void ixgbe_down(struct ixgbe_adapter *adapter);
411 extern void ixgbe_reinit_locked(struct ixgbe_adapter *adapter);
412 extern void ixgbe_reset(struct ixgbe_adapter *adapter);
413 extern void ixgbe_set_ethtool_ops(struct net_device *netdev);
414 extern int ixgbe_setup_rx_resources(struct ixgbe_adapter *, struct ixgbe_ring *);
415 extern int ixgbe_setup_tx_resources(struct ixgbe_adapter *, struct ixgbe_ring *);
416 extern void ixgbe_free_rx_resources(struct ixgbe_adapter *, struct ixgbe_ring *);
417 extern void ixgbe_free_tx_resources(struct ixgbe_adapter *, struct ixgbe_ring *);
418 extern void ixgbe_update_stats(struct ixgbe_adapter *adapter);
419 extern int ixgbe_init_interrupt_scheme(struct ixgbe_adapter *adapter);
420 extern void ixgbe_clear_interrupt_scheme(struct ixgbe_adapter *adapter);
421 extern void ixgbe_write_eitr(struct ixgbe_q_vector *);
422 extern int ethtool_ioctl(struct ifreq *ifr);
423 extern s32 ixgbe_reinit_fdir_tables_82599(struct ixgbe_hw *hw);
424 extern s32 ixgbe_init_fdir_signature_82599(struct ixgbe_hw *hw, u32 pballoc);
425 extern s32 ixgbe_init_fdir_perfect_82599(struct ixgbe_hw *hw, u32 pballoc);
426 extern s32 ixgbe_fdir_add_signature_filter_82599(struct ixgbe_hw *hw,
427 struct ixgbe_atr_input *input,
429 extern s32 ixgbe_fdir_add_perfect_filter_82599(struct ixgbe_hw *hw,
430 struct ixgbe_atr_input *input,
433 extern u16 ixgbe_atr_compute_hash_82599(struct ixgbe_atr_input *input, u32 key);
434 extern s32 ixgbe_atr_set_vlan_id_82599(struct ixgbe_atr_input *input,
436 extern s32 ixgbe_atr_set_src_ipv4_82599(struct ixgbe_atr_input *input,
438 extern s32 ixgbe_atr_set_dst_ipv4_82599(struct ixgbe_atr_input *input,
440 extern s32 ixgbe_atr_set_src_ipv6_82599(struct ixgbe_atr_input *input,
441 u32 src_addr_1, u32 src_addr_2,
442 u32 src_addr_3, u32 src_addr_4);
443 extern s32 ixgbe_atr_set_dst_ipv6_82599(struct ixgbe_atr_input *input,
444 u32 dst_addr_1, u32 dst_addr_2,
445 u32 dst_addr_3, u32 dst_addr_4);
446 extern s32 ixgbe_atr_set_src_port_82599(struct ixgbe_atr_input *input,
448 extern s32 ixgbe_atr_set_dst_port_82599(struct ixgbe_atr_input *input,
450 extern s32 ixgbe_atr_set_flex_byte_82599(struct ixgbe_atr_input *input,
452 extern s32 ixgbe_atr_set_vm_pool_82599(struct ixgbe_atr_input *input,
454 extern s32 ixgbe_atr_set_l4type_82599(struct ixgbe_atr_input *input,
456 extern s32 ixgbe_atr_get_vlan_id_82599(struct ixgbe_atr_input *input,
458 extern s32 ixgbe_atr_get_src_ipv4_82599(struct ixgbe_atr_input *input,
460 extern s32 ixgbe_atr_get_dst_ipv4_82599(struct ixgbe_atr_input *input,
462 extern s32 ixgbe_atr_get_src_ipv6_82599(struct ixgbe_atr_input *input,
463 u32 *src_addr_1, u32 *src_addr_2,
464 u32 *src_addr_3, u32 *src_addr_4);
465 extern s32 ixgbe_atr_get_dst_ipv6_82599(struct ixgbe_atr_input *input,
466 u32 *dst_addr_1, u32 *dst_addr_2,
467 u32 *dst_addr_3, u32 *dst_addr_4);
468 extern s32 ixgbe_atr_get_src_port_82599(struct ixgbe_atr_input *input,
470 extern s32 ixgbe_atr_get_dst_port_82599(struct ixgbe_atr_input *input,
472 extern s32 ixgbe_atr_get_flex_byte_82599(struct ixgbe_atr_input *input,
474 extern s32 ixgbe_atr_get_vm_pool_82599(struct ixgbe_atr_input *input,
476 extern s32 ixgbe_atr_get_l4type_82599(struct ixgbe_atr_input *input,
479 extern void ixgbe_configure_fcoe(struct ixgbe_adapter *adapter);
480 extern int ixgbe_fso(struct ixgbe_adapter *adapter,
481 struct ixgbe_ring *tx_ring, struct sk_buff *skb,
482 u32 tx_flags, u8 *hdr_len);
483 extern void ixgbe_cleanup_fcoe(struct ixgbe_adapter *adapter);
484 extern int ixgbe_fcoe_ddp(struct ixgbe_adapter *adapter,
485 union ixgbe_adv_rx_desc *rx_desc,
486 struct sk_buff *skb);
487 extern int ixgbe_fcoe_ddp_get(struct net_device *netdev, u16 xid,
488 struct scatterlist *sgl, unsigned int sgc);
489 extern int ixgbe_fcoe_ddp_put(struct net_device *netdev, u16 xid);
490 #endif /* IXGBE_FCOE */
492 #endif /* _IXGBE_H_ */