drivers/net/igb/igb_ethtool.c

   1 /*******************************************************************************
   2
   3   Intel(R) Gigabit Ethernet Linux driver
   4   Copyright(c) 2007-2009 Intel Corporation.
   5
   6   This program is free software; you can redistribute it and/or modify it
   7   under the terms and conditions of the GNU General Public License,
   8   version 2, as published by the Free Software Foundation.
   9
  10   This program is distributed in the hope it will be useful, but WITHOUT
  11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13   more details.
  14
  15   You should have received a copy of the GNU General Public License along with
  16   this program; if not, write to the Free Software Foundation, Inc.,
  17   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  18
  19   The full GNU General Public License is included in this distribution in
  20   the file called "COPYING".
  21
  22   Contact Information:
  23   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  24   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  25
  26 *******************************************************************************/
  27
  28 /* ethtool support for igb */
  29
  30 #include <linux/vmalloc.h>
  31 #include <linux/netdevice.h>
  32 #include <linux/pci.h>
  33 #include <linux/delay.h>
  34 #include <linux/interrupt.h>
  35 #include <linux/if_ether.h>
  36 #include <linux/ethtool.h>
  37
  38 #include "igb.h"
  39
  40 enum {NETDEV_STATS, IGB_STATS};
  41
  42 struct igb_stats {
  43         char stat_string[ETH_GSTRING_LEN];
  44         int type;
  45         int sizeof_stat;
  46         int stat_offset;
  47 };
  48
  49 #define IGB_STAT(m)             IGB_STATS, \
  50                                 FIELD_SIZEOF(struct igb_adapter, m), \
  51                                 offsetof(struct igb_adapter, m)
  52 #define IGB_NETDEV_STAT(m)      NETDEV_STATS, \
  53                                 FIELD_SIZEOF(struct net_device, m), \
  54                                 offsetof(struct net_device, m)
  55
  56 static const struct igb_stats igb_gstrings_stats[] = {
  57         { "rx_packets", IGB_STAT(stats.gprc) },
  58         { "tx_packets", IGB_STAT(stats.gptc) },
  59         { "rx_bytes", IGB_STAT(stats.gorc) },
  60         { "tx_bytes", IGB_STAT(stats.gotc) },
  61         { "rx_broadcast", IGB_STAT(stats.bprc) },
  62         { "tx_broadcast", IGB_STAT(stats.bptc) },
  63         { "rx_multicast", IGB_STAT(stats.mprc) },
  64         { "tx_multicast", IGB_STAT(stats.mptc) },
  65         { "rx_errors", IGB_NETDEV_STAT(stats.rx_errors) },
  66         { "tx_errors", IGB_NETDEV_STAT(stats.tx_errors) },
  67         { "tx_dropped", IGB_NETDEV_STAT(stats.tx_dropped) },
  68         { "multicast", IGB_STAT(stats.mprc) },
  69         { "collisions", IGB_STAT(stats.colc) },
  70         { "rx_length_errors", IGB_NETDEV_STAT(stats.rx_length_errors) },
  71         { "rx_over_errors", IGB_NETDEV_STAT(stats.rx_over_errors) },
  72         { "rx_crc_errors", IGB_STAT(stats.crcerrs) },
  73         { "rx_frame_errors", IGB_NETDEV_STAT(stats.rx_frame_errors) },
  74         { "rx_no_buffer_count", IGB_STAT(stats.rnbc) },
  75         { "rx_queue_drop_packet_count", IGB_NETDEV_STAT(stats.rx_fifo_errors) },
  76         { "rx_missed_errors", IGB_STAT(stats.mpc) },
  77         { "tx_aborted_errors", IGB_STAT(stats.ecol) },
  78         { "tx_carrier_errors", IGB_STAT(stats.tncrs) },
  79         { "tx_fifo_errors", IGB_NETDEV_STAT(stats.tx_fifo_errors) },
  80         { "tx_heartbeat_errors", IGB_NETDEV_STAT(stats.tx_heartbeat_errors) },
  81         { "tx_window_errors", IGB_STAT(stats.latecol) },
  82         { "tx_abort_late_coll", IGB_STAT(stats.latecol) },
  83         { "tx_deferred_ok", IGB_STAT(stats.dc) },
  84         { "tx_single_coll_ok", IGB_STAT(stats.scc) },
  85         { "tx_multi_coll_ok", IGB_STAT(stats.mcc) },
  86         { "tx_timeout_count", IGB_STAT(tx_timeout_count) },
  87         { "rx_long_length_errors", IGB_STAT(stats.roc) },
  88         { "rx_short_length_errors", IGB_STAT(stats.ruc) },
  89         { "rx_align_errors", IGB_STAT(stats.algnerrc) },
  90         { "tx_tcp_seg_good", IGB_STAT(stats.tsctc) },
  91         { "tx_tcp_seg_failed", IGB_STAT(stats.tsctfc) },
  92         { "rx_flow_control_xon", IGB_STAT(stats.xonrxc) },
  93         { "rx_flow_control_xoff", IGB_STAT(stats.xoffrxc) },
  94         { "tx_flow_control_xon", IGB_STAT(stats.xontxc) },
  95         { "tx_flow_control_xoff", IGB_STAT(stats.xofftxc) },
  96         { "rx_long_byte_count", IGB_STAT(stats.gorc) },
  97         { "tx_dma_out_of_sync", IGB_STAT(stats.doosync) },
  98         { "tx_smbus", IGB_STAT(stats.mgptc) },
  99         { "rx_smbus", IGB_STAT(stats.mgprc) },
 100         { "dropped_smbus", IGB_STAT(stats.mgpdc) },
 101 };
 102
 103 #define IGB_QUEUE_STATS_LEN \
 104         (((((struct igb_adapter *)netdev_priv(netdev))->num_rx_queues)* \
 105           (sizeof(struct igb_rx_queue_stats) / sizeof(u64))) + \
 106          ((((struct igb_adapter *)netdev_priv(netdev))->num_tx_queues) * \
 107           (sizeof(struct igb_tx_queue_stats) / sizeof(u64))))
 108 #define IGB_GLOBAL_STATS_LEN    \
 109         sizeof(igb_gstrings_stats) / sizeof(struct igb_stats)
 110 #define IGB_STATS_LEN (IGB_GLOBAL_STATS_LEN + IGB_QUEUE_STATS_LEN)
 111 static const char igb_gstrings_test[][ETH_GSTRING_LEN] = {
 112         "Register test  (offline)", "Eeprom test    (offline)",
 113         "Interrupt test (offline)", "Loopback test  (offline)",
 114         "Link test   (on/offline)"
 115 };
 116 #define IGB_TEST_LEN sizeof(igb_gstrings_test) / ETH_GSTRING_LEN
 117
 118 static int igb_get_settings(struct net_device *netdev, struct ethtool_cmd *ecmd)
 119 {
 120         struct igb_adapter *adapter = netdev_priv(netdev);
 121         struct e1000_hw *hw = &adapter->hw;
 122
 123         if (hw->phy.media_type == e1000_media_type_copper) {
 124
 125                 ecmd->supported = (SUPPORTED_10baseT_Half |
 126                                    SUPPORTED_10baseT_Full |
 127                                    SUPPORTED_100baseT_Half |
 128                                    SUPPORTED_100baseT_Full |
 129                                    SUPPORTED_1000baseT_Full|
 130                                    SUPPORTED_Autoneg |
 131                                    SUPPORTED_TP);
 132                 ecmd->advertising = ADVERTISED_TP;
 133
 134                 if (hw->mac.autoneg == 1) {
 135                         ecmd->advertising |= ADVERTISED_Autoneg;
 136                         /* the e1000 autoneg seems to match ethtool nicely */
 137                         ecmd->advertising |= hw->phy.autoneg_advertised;
 138                 }
 139
 140                 ecmd->port = PORT_TP;
 141                 ecmd->phy_address = hw->phy.addr;
 142         } else {
 143                 ecmd->supported   = (SUPPORTED_1000baseT_Full |
 144                                      SUPPORTED_FIBRE |
 145                                      SUPPORTED_Autoneg);
 146
 147                 ecmd->advertising = (ADVERTISED_1000baseT_Full |
 148                                      ADVERTISED_FIBRE |
 149                                      ADVERTISED_Autoneg);
 150
 151                 ecmd->port = PORT_FIBRE;
 152         }
 153
 154         ecmd->transceiver = XCVR_INTERNAL;
 155
 156         if (rd32(E1000_STATUS) & E1000_STATUS_LU) {
 157
 158                 adapter->hw.mac.ops.get_speed_and_duplex(hw,
 159                                         &adapter->link_speed,
 160                                         &adapter->link_duplex);
 161                 ecmd->speed = adapter->link_speed;
 162
 163                 /* unfortunately FULL_DUPLEX != DUPLEX_FULL
 164                  *          and HALF_DUPLEX != DUPLEX_HALF */
 165
 166                 if (adapter->link_duplex == FULL_DUPLEX)
 167                         ecmd->duplex = DUPLEX_FULL;
 168                 else
 169                         ecmd->duplex = DUPLEX_HALF;
 170         } else {
 171                 ecmd->speed = -1;
 172                 ecmd->duplex = -1;
 173         }
 174
 175         ecmd->autoneg = hw->mac.autoneg ? AUTONEG_ENABLE : AUTONEG_DISABLE;
 176         return 0;
 177 }
 178
 179 static int igb_set_settings(struct net_device *netdev, struct ethtool_cmd *ecmd)
 180 {
 181         struct igb_adapter *adapter = netdev_priv(netdev);
 182         struct e1000_hw *hw = &adapter->hw;
 183
 184         /* When SoL/IDER sessions are active, autoneg/speed/duplex
 185          * cannot be changed */
 186         if (igb_check_reset_block(hw)) {
 187                 dev_err(&adapter->pdev->dev, "Cannot change link "
 188                         "characteristics when SoL/IDER is active.\n");
 189                 return -EINVAL;
 190         }
 191
 192         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
 193                 msleep(1);
 194
 195         if (ecmd->autoneg == AUTONEG_ENABLE) {
 196                 hw->mac.autoneg = 1;
 197                 hw->phy.autoneg_advertised = ecmd->advertising |
 198                                              ADVERTISED_TP |
 199                                              ADVERTISED_Autoneg;
 200                 ecmd->advertising = hw->phy.autoneg_advertised;
 201                 if (adapter->fc_autoneg)
 202                         hw->fc.requested_mode = e1000_fc_default;
 203         } else {
 204                 if (igb_set_spd_dplx(adapter, ecmd->speed + ecmd->duplex)) {
 205                         clear_bit(__IGB_RESETTING, &adapter->state);
 206                         return -EINVAL;
 207                 }
 208         }
 209
 210         /* reset the link */
 211         if (netif_running(adapter->netdev)) {
 212                 igb_down(adapter);
 213                 igb_up(adapter);
 214         } else
 215                 igb_reset(adapter);
 216
 217         clear_bit(__IGB_RESETTING, &adapter->state);
 218         return 0;
 219 }
 220
 221 static void igb_get_pauseparam(struct net_device *netdev,
 222                                struct ethtool_pauseparam *pause)
 223 {
 224         struct igb_adapter *adapter = netdev_priv(netdev);
 225         struct e1000_hw *hw = &adapter->hw;
 226
 227         pause->autoneg =
 228                 (adapter->fc_autoneg ? AUTONEG_ENABLE : AUTONEG_DISABLE);
 229
 230         if (hw->fc.current_mode == e1000_fc_rx_pause)
 231                 pause->rx_pause = 1;
 232         else if (hw->fc.current_mode == e1000_fc_tx_pause)
 233                 pause->tx_pause = 1;
 234         else if (hw->fc.current_mode == e1000_fc_full) {
 235                 pause->rx_pause = 1;
 236                 pause->tx_pause = 1;
 237         }
 238 }
 239
 240 static int igb_set_pauseparam(struct net_device *netdev,
 241                               struct ethtool_pauseparam *pause)
 242 {
 243         struct igb_adapter *adapter = netdev_priv(netdev);
 244         struct e1000_hw *hw = &adapter->hw;
 245         int retval = 0;
 246
 247         adapter->fc_autoneg = pause->autoneg;
 248
 249         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
 250                 msleep(1);
 251
 252         if (adapter->fc_autoneg == AUTONEG_ENABLE) {
 253                 hw->fc.requested_mode = e1000_fc_default;
 254                 if (netif_running(adapter->netdev)) {
 255                         igb_down(adapter);
 256                         igb_up(adapter);
 257                 } else
 258                         igb_reset(adapter);
 259         } else {
 260                 if (pause->rx_pause && pause->tx_pause)
 261                         hw->fc.requested_mode = e1000_fc_full;
 262                 else if (pause->rx_pause && !pause->tx_pause)
 263                         hw->fc.requested_mode = e1000_fc_rx_pause;
 264                 else if (!pause->rx_pause && pause->tx_pause)
 265                         hw->fc.requested_mode = e1000_fc_tx_pause;
 266                 else if (!pause->rx_pause && !pause->tx_pause)
 267                         hw->fc.requested_mode = e1000_fc_none;
 268
 269                 hw->fc.current_mode = hw->fc.requested_mode;
 270
 271                 retval = ((hw->phy.media_type == e1000_media_type_copper) ?
 272                           igb_force_mac_fc(hw) : igb_setup_link(hw));
 273         }
 274
 275         clear_bit(__IGB_RESETTING, &adapter->state);
 276         return retval;
 277 }
 278
 279 static u32 igb_get_rx_csum(struct net_device *netdev)
 280 {
 281         struct igb_adapter *adapter = netdev_priv(netdev);
 282         return !!(adapter->rx_ring[0].flags & IGB_RING_FLAG_RX_CSUM);
 283 }
 284
 285 static int igb_set_rx_csum(struct net_device *netdev, u32 data)
 286 {
 287         struct igb_adapter *adapter = netdev_priv(netdev);
 288         int i;
 289
 290         for (i = 0; i < adapter->num_rx_queues; i++) {
 291                 if (data)
 292                         adapter->rx_ring[i].flags |= IGB_RING_FLAG_RX_CSUM;
 293                 else
 294                         adapter->rx_ring[i].flags &= ~IGB_RING_FLAG_RX_CSUM;
 295         }
 296
 297         return 0;
 298 }
 299
 300 static u32 igb_get_tx_csum(struct net_device *netdev)
 301 {
 302         return (netdev->features & NETIF_F_IP_CSUM) != 0;
 303 }
 304
 305 static int igb_set_tx_csum(struct net_device *netdev, u32 data)
 306 {
 307         struct igb_adapter *adapter = netdev_priv(netdev);
 308
 309         if (data) {
 310                 netdev->features |= (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM);
 311                 if (adapter->hw.mac.type == e1000_82576)
 312                         netdev->features |= NETIF_F_SCTP_CSUM;
 313         } else {
 314                 netdev->features &= ~(NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
 315                                       NETIF_F_SCTP_CSUM);
 316         }
 317
 318         return 0;
 319 }
 320
 321 static int igb_set_tso(struct net_device *netdev, u32 data)
 322 {
 323         struct igb_adapter *adapter = netdev_priv(netdev);
 324
 325         if (data) {
 326                 netdev->features |= NETIF_F_TSO;
 327                 netdev->features |= NETIF_F_TSO6;
 328         } else {
 329                 netdev->features &= ~NETIF_F_TSO;
 330                 netdev->features &= ~NETIF_F_TSO6;
 331         }
 332
 333         dev_info(&adapter->pdev->dev, "TSO is %s\n",
 334                  data ? "Enabled" : "Disabled");
 335         return 0;
 336 }
 337
 338 static u32 igb_get_msglevel(struct net_device *netdev)
 339 {
 340         struct igb_adapter *adapter = netdev_priv(netdev);
 341         return adapter->msg_enable;
 342 }
 343
 344 static void igb_set_msglevel(struct net_device *netdev, u32 data)
 345 {
 346         struct igb_adapter *adapter = netdev_priv(netdev);
 347         adapter->msg_enable = data;
 348 }
 349
 350 static int igb_get_regs_len(struct net_device *netdev)
 351 {
 352 #define IGB_REGS_LEN 551
 353         return IGB_REGS_LEN * sizeof(u32);
 354 }
 355
 356 static void igb_get_regs(struct net_device *netdev,
 357                          struct ethtool_regs *regs, void *p)
 358 {
 359         struct igb_adapter *adapter = netdev_priv(netdev);
 360         struct e1000_hw *hw = &adapter->hw;
 361         u32 *regs_buff = p;
 362         u8 i;
 363
 364         memset(p, 0, IGB_REGS_LEN * sizeof(u32));
 365
 366         regs->version = (1 << 24) | (hw->revision_id << 16) | hw->device_id;
 367
 368         /* General Registers */
 369         regs_buff[0] = rd32(E1000_CTRL);
 370         regs_buff[1] = rd32(E1000_STATUS);
 371         regs_buff[2] = rd32(E1000_CTRL_EXT);
 372         regs_buff[3] = rd32(E1000_MDIC);
 373         regs_buff[4] = rd32(E1000_SCTL);
 374         regs_buff[5] = rd32(E1000_CONNSW);
 375         regs_buff[6] = rd32(E1000_VET);
 376         regs_buff[7] = rd32(E1000_LEDCTL);
 377         regs_buff[8] = rd32(E1000_PBA);
 378         regs_buff[9] = rd32(E1000_PBS);
 379         regs_buff[10] = rd32(E1000_FRTIMER);
 380         regs_buff[11] = rd32(E1000_TCPTIMER);
 381
 382         /* NVM Register */
 383         regs_buff[12] = rd32(E1000_EECD);
 384
 385         /* Interrupt */
 386         /* Reading EICS for EICR because they read the
 387          * same but EICS does not clear on read */
 388         regs_buff[13] = rd32(E1000_EICS);
 389         regs_buff[14] = rd32(E1000_EICS);
 390         regs_buff[15] = rd32(E1000_EIMS);
 391         regs_buff[16] = rd32(E1000_EIMC);
 392         regs_buff[17] = rd32(E1000_EIAC);
 393         regs_buff[18] = rd32(E1000_EIAM);
 394         /* Reading ICS for ICR because they read the
 395          * same but ICS does not clear on read */
 396         regs_buff[19] = rd32(E1000_ICS);
 397         regs_buff[20] = rd32(E1000_ICS);
 398         regs_buff[21] = rd32(E1000_IMS);
 399         regs_buff[22] = rd32(E1000_IMC);
 400         regs_buff[23] = rd32(E1000_IAC);
 401         regs_buff[24] = rd32(E1000_IAM);
 402         regs_buff[25] = rd32(E1000_IMIRVP);
 403
 404         /* Flow Control */
 405         regs_buff[26] = rd32(E1000_FCAL);
 406         regs_buff[27] = rd32(E1000_FCAH);
 407         regs_buff[28] = rd32(E1000_FCTTV);
 408         regs_buff[29] = rd32(E1000_FCRTL);
 409         regs_buff[30] = rd32(E1000_FCRTH);
 410         regs_buff[31] = rd32(E1000_FCRTV);
 411
 412         /* Receive */
 413         regs_buff[32] = rd32(E1000_RCTL);
 414         regs_buff[33] = rd32(E1000_RXCSUM);
 415         regs_buff[34] = rd32(E1000_RLPML);
 416         regs_buff[35] = rd32(E1000_RFCTL);
 417         regs_buff[36] = rd32(E1000_MRQC);
 418         regs_buff[37] = rd32(E1000_VT_CTL);
 419
 420         /* Transmit */
 421         regs_buff[38] = rd32(E1000_TCTL);
 422         regs_buff[39] = rd32(E1000_TCTL_EXT);
 423         regs_buff[40] = rd32(E1000_TIPG);
 424         regs_buff[41] = rd32(E1000_DTXCTL);
 425
 426         /* Wake Up */
 427         regs_buff[42] = rd32(E1000_WUC);
 428         regs_buff[43] = rd32(E1000_WUFC);
 429         regs_buff[44] = rd32(E1000_WUS);
 430         regs_buff[45] = rd32(E1000_IPAV);
 431         regs_buff[46] = rd32(E1000_WUPL);
 432
 433         /* MAC */
 434         regs_buff[47] = rd32(E1000_PCS_CFG0);
 435         regs_buff[48] = rd32(E1000_PCS_LCTL);
 436         regs_buff[49] = rd32(E1000_PCS_LSTAT);
 437         regs_buff[50] = rd32(E1000_PCS_ANADV);
 438         regs_buff[51] = rd32(E1000_PCS_LPAB);
 439         regs_buff[52] = rd32(E1000_PCS_NPTX);
 440         regs_buff[53] = rd32(E1000_PCS_LPABNP);
 441
 442         /* Statistics */
 443         regs_buff[54] = adapter->stats.crcerrs;
 444         regs_buff[55] = adapter->stats.algnerrc;
 445         regs_buff[56] = adapter->stats.symerrs;
 446         regs_buff[57] = adapter->stats.rxerrc;
 447         regs_buff[58] = adapter->stats.mpc;
 448         regs_buff[59] = adapter->stats.scc;
 449         regs_buff[60] = adapter->stats.ecol;
 450         regs_buff[61] = adapter->stats.mcc;
 451         regs_buff[62] = adapter->stats.latecol;
 452         regs_buff[63] = adapter->stats.colc;
 453         regs_buff[64] = adapter->stats.dc;
 454         regs_buff[65] = adapter->stats.tncrs;
 455         regs_buff[66] = adapter->stats.sec;
 456         regs_buff[67] = adapter->stats.htdpmc;
 457         regs_buff[68] = adapter->stats.rlec;
 458         regs_buff[69] = adapter->stats.xonrxc;
 459         regs_buff[70] = adapter->stats.xontxc;
 460         regs_buff[71] = adapter->stats.xoffrxc;
 461         regs_buff[72] = adapter->stats.xofftxc;
 462         regs_buff[73] = adapter->stats.fcruc;
 463         regs_buff[74] = adapter->stats.prc64;
 464         regs_buff[75] = adapter->stats.prc127;
 465         regs_buff[76] = adapter->stats.prc255;
 466         regs_buff[77] = adapter->stats.prc511;
 467         regs_buff[78] = adapter->stats.prc1023;
 468         regs_buff[79] = adapter->stats.prc1522;
 469         regs_buff[80] = adapter->stats.gprc;
 470         regs_buff[81] = adapter->stats.bprc;
 471         regs_buff[82] = adapter->stats.mprc;
 472         regs_buff[83] = adapter->stats.gptc;
 473         regs_buff[84] = adapter->stats.gorc;
 474         regs_buff[86] = adapter->stats.gotc;
 475         regs_buff[88] = adapter->stats.rnbc;
 476         regs_buff[89] = adapter->stats.ruc;
 477         regs_buff[90] = adapter->stats.rfc;
 478         regs_buff[91] = adapter->stats.roc;
 479         regs_buff[92] = adapter->stats.rjc;
 480         regs_buff[93] = adapter->stats.mgprc;
 481         regs_buff[94] = adapter->stats.mgpdc;
 482         regs_buff[95] = adapter->stats.mgptc;
 483         regs_buff[96] = adapter->stats.tor;
 484         regs_buff[98] = adapter->stats.tot;
 485         regs_buff[100] = adapter->stats.tpr;
 486         regs_buff[101] = adapter->stats.tpt;
 487         regs_buff[102] = adapter->stats.ptc64;
 488         regs_buff[103] = adapter->stats.ptc127;
 489         regs_buff[104] = adapter->stats.ptc255;
 490         regs_buff[105] = adapter->stats.ptc511;
 491         regs_buff[106] = adapter->stats.ptc1023;
 492         regs_buff[107] = adapter->stats.ptc1522;
 493         regs_buff[108] = adapter->stats.mptc;
 494         regs_buff[109] = adapter->stats.bptc;
 495         regs_buff[110] = adapter->stats.tsctc;
 496         regs_buff[111] = adapter->stats.iac;
 497         regs_buff[112] = adapter->stats.rpthc;
 498         regs_buff[113] = adapter->stats.hgptc;
 499         regs_buff[114] = adapter->stats.hgorc;
 500         regs_buff[116] = adapter->stats.hgotc;
 501         regs_buff[118] = adapter->stats.lenerrs;
 502         regs_buff[119] = adapter->stats.scvpc;
 503         regs_buff[120] = adapter->stats.hrmpc;
 504
 505         /* These should probably be added to e1000_regs.h instead */
 506         #define E1000_PSRTYPE_REG(_i) (0x05480 + ((_i) * 4))
 507         #define E1000_IP4AT_REG(_i)   (0x05840 + ((_i) * 8))
 508         #define E1000_IP6AT_REG(_i)   (0x05880 + ((_i) * 4))
 509         #define E1000_WUPM_REG(_i)    (0x05A00 + ((_i) * 4))
 510         #define E1000_FFMT_REG(_i)    (0x09000 + ((_i) * 8))
 511         #define E1000_FFVT_REG(_i)    (0x09800 + ((_i) * 8))
 512         #define E1000_FFLT_REG(_i)    (0x05F00 + ((_i) * 8))
 513
 514         for (i = 0; i < 4; i++)
 515                 regs_buff[121 + i] = rd32(E1000_SRRCTL(i));
 516         for (i = 0; i < 4; i++)
 517                 regs_buff[125 + i] = rd32(E1000_PSRTYPE_REG(i));
 518         for (i = 0; i < 4; i++)
 519                 regs_buff[129 + i] = rd32(E1000_RDBAL(i));
 520         for (i = 0; i < 4; i++)
 521                 regs_buff[133 + i] = rd32(E1000_RDBAH(i));
 522         for (i = 0; i < 4; i++)
 523                 regs_buff[137 + i] = rd32(E1000_RDLEN(i));
 524         for (i = 0; i < 4; i++)
 525                 regs_buff[141 + i] = rd32(E1000_RDH(i));
 526         for (i = 0; i < 4; i++)
 527                 regs_buff[145 + i] = rd32(E1000_RDT(i));
 528         for (i = 0; i < 4; i++)
 529                 regs_buff[149 + i] = rd32(E1000_RXDCTL(i));
 530
 531         for (i = 0; i < 10; i++)
 532                 regs_buff[153 + i] = rd32(E1000_EITR(i));
 533         for (i = 0; i < 8; i++)
 534                 regs_buff[163 + i] = rd32(E1000_IMIR(i));
 535         for (i = 0; i < 8; i++)
 536                 regs_buff[171 + i] = rd32(E1000_IMIREXT(i));
 537         for (i = 0; i < 16; i++)
 538                 regs_buff[179 + i] = rd32(E1000_RAL(i));
 539         for (i = 0; i < 16; i++)
 540                 regs_buff[195 + i] = rd32(E1000_RAH(i));
 541
 542         for (i = 0; i < 4; i++)
 543                 regs_buff[211 + i] = rd32(E1000_TDBAL(i));
 544         for (i = 0; i < 4; i++)
 545                 regs_buff[215 + i] = rd32(E1000_TDBAH(i));
 546         for (i = 0; i < 4; i++)
 547                 regs_buff[219 + i] = rd32(E1000_TDLEN(i));
 548         for (i = 0; i < 4; i++)
 549                 regs_buff[223 + i] = rd32(E1000_TDH(i));
 550         for (i = 0; i < 4; i++)
 551                 regs_buff[227 + i] = rd32(E1000_TDT(i));
 552         for (i = 0; i < 4; i++)
 553                 regs_buff[231 + i] = rd32(E1000_TXDCTL(i));
 554         for (i = 0; i < 4; i++)
 555                 regs_buff[235 + i] = rd32(E1000_TDWBAL(i));
 556         for (i = 0; i < 4; i++)
 557                 regs_buff[239 + i] = rd32(E1000_TDWBAH(i));
 558         for (i = 0; i < 4; i++)
 559                 regs_buff[243 + i] = rd32(E1000_DCA_TXCTRL(i));
 560
 561         for (i = 0; i < 4; i++)
 562                 regs_buff[247 + i] = rd32(E1000_IP4AT_REG(i));
 563         for (i = 0; i < 4; i++)
 564                 regs_buff[251 + i] = rd32(E1000_IP6AT_REG(i));
 565         for (i = 0; i < 32; i++)
 566                 regs_buff[255 + i] = rd32(E1000_WUPM_REG(i));
 567         for (i = 0; i < 128; i++)
 568                 regs_buff[287 + i] = rd32(E1000_FFMT_REG(i));
 569         for (i = 0; i < 128; i++)
 570                 regs_buff[415 + i] = rd32(E1000_FFVT_REG(i));
 571         for (i = 0; i < 4; i++)
 572                 regs_buff[543 + i] = rd32(E1000_FFLT_REG(i));
 573
 574         regs_buff[547] = rd32(E1000_TDFH);
 575         regs_buff[548] = rd32(E1000_TDFT);
 576         regs_buff[549] = rd32(E1000_TDFHS);
 577         regs_buff[550] = rd32(E1000_TDFPC);
 578
 579 }
 580
 581 static int igb_get_eeprom_len(struct net_device *netdev)
 582 {
 583         struct igb_adapter *adapter = netdev_priv(netdev);
 584         return adapter->hw.nvm.word_size * 2;
 585 }
 586
 587 static int igb_get_eeprom(struct net_device *netdev,
 588                           struct ethtool_eeprom *eeprom, u8 *bytes)
 589 {
 590         struct igb_adapter *adapter = netdev_priv(netdev);
 591         struct e1000_hw *hw = &adapter->hw;
 592         u16 *eeprom_buff;
 593         int first_word, last_word;
 594         int ret_val = 0;
 595         u16 i;
 596
 597         if (eeprom->len == 0)
 598                 return -EINVAL;
 599
 600         eeprom->magic = hw->vendor_id | (hw->device_id << 16);
 601
 602         first_word = eeprom->offset >> 1;
 603         last_word = (eeprom->offset + eeprom->len - 1) >> 1;
 604
 605         eeprom_buff = kmalloc(sizeof(u16) *
 606                         (last_word - first_word + 1), GFP_KERNEL);
 607         if (!eeprom_buff)
 608                 return -ENOMEM;
 609
 610         if (hw->nvm.type == e1000_nvm_eeprom_spi)
 611                 ret_val = hw->nvm.ops.read(hw, first_word,
 612                                             last_word - first_word + 1,
 613                                             eeprom_buff);
 614         else {
 615                 for (i = 0; i < last_word - first_word + 1; i++) {
 616                         ret_val = hw->nvm.ops.read(hw, first_word + i, 1,
 617                                                     &eeprom_buff[i]);
 618                         if (ret_val)
 619                                 break;
 620                 }
 621         }
 622
 623         /* Device's eeprom is always little-endian, word addressable */
 624         for (i = 0; i < last_word - first_word + 1; i++)
 625                 le16_to_cpus(&eeprom_buff[i]);
 626
 627         memcpy(bytes, (u8 *)eeprom_buff + (eeprom->offset & 1),
 628                         eeprom->len);
 629         kfree(eeprom_buff);
 630
 631         return ret_val;
 632 }
 633
 634 static int igb_set_eeprom(struct net_device *netdev,
 635                           struct ethtool_eeprom *eeprom, u8 *bytes)
 636 {
 637         struct igb_adapter *adapter = netdev_priv(netdev);
 638         struct e1000_hw *hw = &adapter->hw;
 639         u16 *eeprom_buff;
 640         void *ptr;
 641         int max_len, first_word, last_word, ret_val = 0;
 642         u16 i;
 643
 644         if (eeprom->len == 0)
 645                 return -EOPNOTSUPP;
 646
 647         if (eeprom->magic != (hw->vendor_id | (hw->device_id << 16)))
 648                 return -EFAULT;
 649
 650         max_len = hw->nvm.word_size * 2;
 651
 652         first_word = eeprom->offset >> 1;
 653         last_word = (eeprom->offset + eeprom->len - 1) >> 1;
 654         eeprom_buff = kmalloc(max_len, GFP_KERNEL);
 655         if (!eeprom_buff)
 656                 return -ENOMEM;
 657
 658         ptr = (void *)eeprom_buff;
 659
 660         if (eeprom->offset & 1) {
 661                 /* need read/modify/write of first changed EEPROM word */
 662                 /* only the second byte of the word is being modified */
 663                 ret_val = hw->nvm.ops.read(hw, first_word, 1,
 664                                             &eeprom_buff[0]);
 665                 ptr++;
 666         }
 667         if (((eeprom->offset + eeprom->len) & 1) && (ret_val == 0)) {
 668                 /* need read/modify/write of last changed EEPROM word */
 669                 /* only the first byte of the word is being modified */
 670                 ret_val = hw->nvm.ops.read(hw, last_word, 1,
 671                                    &eeprom_buff[last_word - first_word]);
 672         }
 673
 674         /* Device's eeprom is always little-endian, word addressable */
 675         for (i = 0; i < last_word - first_word + 1; i++)
 676                 le16_to_cpus(&eeprom_buff[i]);
 677
 678         memcpy(ptr, bytes, eeprom->len);
 679
 680         for (i = 0; i < last_word - first_word + 1; i++)
 681                 eeprom_buff[i] = cpu_to_le16(eeprom_buff[i]);
 682
 683         ret_val = hw->nvm.ops.write(hw, first_word,
 684                                      last_word - first_word + 1, eeprom_buff);
 685
 686         /* Update the checksum over the first part of the EEPROM if needed
 687          * and flush shadow RAM for 82573 controllers */
 688         if ((ret_val == 0) && ((first_word <= NVM_CHECKSUM_REG)))
 689                 igb_update_nvm_checksum(hw);
 690
 691         kfree(eeprom_buff);
 692         return ret_val;
 693 }
 694
 695 static void igb_get_drvinfo(struct net_device *netdev,
 696                             struct ethtool_drvinfo *drvinfo)
 697 {
 698         struct igb_adapter *adapter = netdev_priv(netdev);
 699         char firmware_version[32];
 700         u16 eeprom_data;
 701
 702         strncpy(drvinfo->driver,  igb_driver_name, 32);
 703         strncpy(drvinfo->version, igb_driver_version, 32);
 704
 705         /* EEPROM image version # is reported as firmware version # for
 706          * 82575 controllers */
 707         adapter->hw.nvm.ops.read(&adapter->hw, 5, 1, &eeprom_data);
 708         sprintf(firmware_version, "%d.%d-%d",
 709                 (eeprom_data & 0xF000) >> 12,
 710                 (eeprom_data & 0x0FF0) >> 4,
 711                 eeprom_data & 0x000F);
 712
 713         strncpy(drvinfo->fw_version, firmware_version, 32);
 714         strncpy(drvinfo->bus_info, pci_name(adapter->pdev), 32);
 715         drvinfo->n_stats = IGB_STATS_LEN;
 716         drvinfo->testinfo_len = IGB_TEST_LEN;
 717         drvinfo->regdump_len = igb_get_regs_len(netdev);
 718         drvinfo->eedump_len = igb_get_eeprom_len(netdev);
 719 }
 720
 721 static void igb_get_ringparam(struct net_device *netdev,
 722                               struct ethtool_ringparam *ring)
 723 {
 724         struct igb_adapter *adapter = netdev_priv(netdev);
 725
 726         ring->rx_max_pending = IGB_MAX_RXD;
 727         ring->tx_max_pending = IGB_MAX_TXD;
 728         ring->rx_mini_max_pending = 0;
 729         ring->rx_jumbo_max_pending = 0;
 730         ring->rx_pending = adapter->rx_ring_count;
 731         ring->tx_pending = adapter->tx_ring_count;
 732         ring->rx_mini_pending = 0;
 733         ring->rx_jumbo_pending = 0;
 734 }
 735
 736 static int igb_set_ringparam(struct net_device *netdev,
 737                              struct ethtool_ringparam *ring)
 738 {
 739         struct igb_adapter *adapter = netdev_priv(netdev);
 740         struct igb_ring *temp_ring;
 741         int i, err = 0;
 742         u32 new_rx_count, new_tx_count;
 743
 744         if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
 745                 return -EINVAL;
 746
 747         new_rx_count = max(ring->rx_pending, (u32)IGB_MIN_RXD);
 748         new_rx_count = min(new_rx_count, (u32)IGB_MAX_RXD);
 749         new_rx_count = ALIGN(new_rx_count, REQ_RX_DESCRIPTOR_MULTIPLE);
 750
 751         new_tx_count = max(ring->tx_pending, (u32)IGB_MIN_TXD);
 752         new_tx_count = min(new_tx_count, (u32)IGB_MAX_TXD);
 753         new_tx_count = ALIGN(new_tx_count, REQ_TX_DESCRIPTOR_MULTIPLE);
 754
 755         if ((new_tx_count == adapter->tx_ring_count) &&
 756             (new_rx_count == adapter->rx_ring_count)) {
 757                 /* nothing to do */
 758                 return 0;
 759         }
 760
 761         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
 762                 msleep(1);
 763
 764         if (!netif_running(adapter->netdev)) {
 765                 for (i = 0; i < adapter->num_tx_queues; i++)
 766                         adapter->tx_ring[i].count = new_tx_count;
 767                 for (i = 0; i < adapter->num_rx_queues; i++)
 768                         adapter->rx_ring[i].count = new_rx_count;
 769                 adapter->tx_ring_count = new_tx_count;
 770                 adapter->rx_ring_count = new_rx_count;
 771                 goto clear_reset;
 772         }
 773
 774         if (adapter->num_tx_queues > adapter->num_rx_queues)
 775                 temp_ring = vmalloc(adapter->num_tx_queues * sizeof(struct igb_ring));
 776         else
 777                 temp_ring = vmalloc(adapter->num_rx_queues * sizeof(struct igb_ring));
 778
 779         if (!temp_ring) {
 780                 err = -ENOMEM;
 781                 goto clear_reset;
 782         }
 783
 784         igb_down(adapter);
 785
 786         /*
 787          * We can't just free everything and then setup again,
 788          * because the ISRs in MSI-X mode get passed pointers
 789          * to the tx and rx ring structs.
 790          */
 791         if (new_tx_count != adapter->tx_ring_count) {
 792                 memcpy(temp_ring, adapter->tx_ring,
 793                        adapter->num_tx_queues * sizeof(struct igb_ring));
 794
 795                 for (i = 0; i < adapter->num_tx_queues; i++) {
 796                         temp_ring[i].count = new_tx_count;
 797                         err = igb_setup_tx_resources(&temp_ring[i]);
 798                         if (err) {
 799                                 while (i) {
 800                                         i--;
 801                                         igb_free_tx_resources(&temp_ring[i]);
 802                                 }
 803                                 goto err_setup;
 804                         }
 805                 }
 806
 807                 for (i = 0; i < adapter->num_tx_queues; i++)
 808                         igb_free_tx_resources(&adapter->tx_ring[i]);
 809
 810                 memcpy(adapter->tx_ring, temp_ring,
 811                        adapter->num_tx_queues * sizeof(struct igb_ring));
 812
 813                 adapter->tx_ring_count = new_tx_count;
 814         }
 815
 816         if (new_rx_count != adapter->rx_ring->count) {
 817                 memcpy(temp_ring, adapter->rx_ring,
 818                        adapter->num_rx_queues * sizeof(struct igb_ring));
 819
 820                 for (i = 0; i < adapter->num_rx_queues; i++) {
 821                         temp_ring[i].count = new_rx_count;
 822                         err = igb_setup_rx_resources(&temp_ring[i]);
 823                         if (err) {
 824                                 while (i) {
 825                                         i--;
 826                                         igb_free_rx_resources(&temp_ring[i]);
 827                                 }
 828                                 goto err_setup;
 829                         }
 830
 831                 }
 832
 833                 for (i = 0; i < adapter->num_rx_queues; i++)
 834                         igb_free_rx_resources(&adapter->rx_ring[i]);
 835
 836                 memcpy(adapter->rx_ring, temp_ring,
 837                        adapter->num_rx_queues * sizeof(struct igb_ring));
 838
 839                 adapter->rx_ring_count = new_rx_count;
 840         }
 841 err_setup:
 842         igb_up(adapter);
 843         vfree(temp_ring);
 844 clear_reset:
 845         clear_bit(__IGB_RESETTING, &adapter->state);
 846         return err;
 847 }
 848
 849 /* ethtool register test data */
 850 struct igb_reg_test {
 851         u16 reg;
 852         u16 reg_offset;
 853         u16 array_len;
 854         u16 test_type;
 855         u32 mask;
 856         u32 write;
 857 };
 858
 859 /* In the hardware, registers are laid out either singly, in arrays
 860  * spaced 0x100 bytes apart, or in contiguous tables.  We assume
 861  * most tests take place on arrays or single registers (handled
 862  * as a single-element array) and special-case the tables.
 863  * Table tests are always pattern tests.
 864  *
 865  * We also make provision for some required setup steps by specifying
 866  * registers to be written without any read-back testing.
 867  */
 868
 869 #define PATTERN_TEST    1
 870 #define SET_READ_TEST   2
 871 #define WRITE_NO_TEST   3
 872 #define TABLE32_TEST    4
 873 #define TABLE64_TEST_LO 5
 874 #define TABLE64_TEST_HI 6
 875
 876 /* 82576 reg test */
 877 static struct igb_reg_test reg_test_82576[] = {
 878         { E1000_FCAL,      0x100, 1,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
 879         { E1000_FCAH,      0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
 880         { E1000_FCT,       0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
 881         { E1000_VET,       0x100, 1,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
 882         { E1000_RDBAL(0),  0x100, 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
 883         { E1000_RDBAH(0),  0x100, 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
 884         { E1000_RDLEN(0),  0x100, 4, PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
 885         { E1000_RDBAL(4),  0x40, 12, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
 886         { E1000_RDBAH(4),  0x40, 12, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
 887         { E1000_RDLEN(4),  0x40, 12, PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
 888         /* Enable all RX queues before testing. */
 889         { E1000_RXDCTL(0), 0x100, 4,  WRITE_NO_TEST, 0, E1000_RXDCTL_QUEUE_ENABLE },
 890         { E1000_RXDCTL(4), 0x40, 12,  WRITE_NO_TEST, 0, E1000_RXDCTL_QUEUE_ENABLE },
 891         /* RDH is read-only for 82576, only test RDT. */
 892         { E1000_RDT(0),    0x100, 4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
 893         { E1000_RDT(4),    0x40, 12,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
 894         { E1000_RXDCTL(0), 0x100, 4,  WRITE_NO_TEST, 0, 0 },
 895         { E1000_RXDCTL(4), 0x40, 12,  WRITE_NO_TEST, 0, 0 },
 896         { E1000_FCRTH,     0x100, 1,  PATTERN_TEST, 0x0000FFF0, 0x0000FFF0 },
 897         { E1000_FCTTV,     0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
 898         { E1000_TIPG,      0x100, 1,  PATTERN_TEST, 0x3FFFFFFF, 0x3FFFFFFF },
 899         { E1000_TDBAL(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
 900         { E1000_TDBAH(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
 901         { E1000_TDLEN(0),  0x100, 4,  PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
 902         { E1000_TDBAL(4),  0x40, 12,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
 903         { E1000_TDBAH(4),  0x40, 12,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
 904         { E1000_TDLEN(4),  0x40, 12,  PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
 905         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
 906         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0x003FFFFB },
 907         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0xFFFFFFFF },
 908         { E1000_TCTL,      0x100, 1,  SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
 909         { E1000_RA,        0, 16, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF },
 910         { E1000_RA,        0, 16, TABLE64_TEST_HI, 0x83FFFFFF, 0xFFFFFFFF },
 911         { E1000_RA2,       0, 8, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF },
 912         { E1000_RA2,       0, 8, TABLE64_TEST_HI, 0x83FFFFFF, 0xFFFFFFFF },
 913         { E1000_MTA,       0, 128,TABLE32_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
 914         { 0, 0, 0, 0 }
 915 };
 916
 917 /* 82575 register test */
 918 static struct igb_reg_test reg_test_82575[] = {
 919         { E1000_FCAL,      0x100, 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
 920         { E1000_FCAH,      0x100, 1, PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
 921         { E1000_FCT,       0x100, 1, PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
 922         { E1000_VET,       0x100, 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
 923         { E1000_RDBAL(0),  0x100, 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
 924         { E1000_RDBAH(0),  0x100, 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
 925         { E1000_RDLEN(0),  0x100, 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
 926         /* Enable all four RX queues before testing. */
 927         { E1000_RXDCTL(0), 0x100, 4, WRITE_NO_TEST, 0, E1000_RXDCTL_QUEUE_ENABLE },
 928         /* RDH is read-only for 82575, only test RDT. */
 929         { E1000_RDT(0),    0x100, 4, PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
 930         { E1000_RXDCTL(0), 0x100, 4, WRITE_NO_TEST, 0, 0 },
 931         { E1000_FCRTH,     0x100, 1, PATTERN_TEST, 0x0000FFF0, 0x0000FFF0 },
 932         { E1000_FCTTV,     0x100, 1, PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
 933         { E1000_TIPG,      0x100, 1, PATTERN_TEST, 0x3FFFFFFF, 0x3FFFFFFF },
 934         { E1000_TDBAL(0),  0x100, 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
 935         { E1000_TDBAH(0),  0x100, 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
 936         { E1000_TDLEN(0),  0x100, 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
 937         { E1000_RCTL,      0x100, 1, SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
 938         { E1000_RCTL,      0x100, 1, SET_READ_TEST, 0x04CFB3FE, 0x003FFFFB },
 939         { E1000_RCTL,      0x100, 1, SET_READ_TEST, 0x04CFB3FE, 0xFFFFFFFF },
 940         { E1000_TCTL,      0x100, 1, SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
 941         { E1000_TXCW,      0x100, 1, PATTERN_TEST, 0xC000FFFF, 0x0000FFFF },
 942         { E1000_RA,        0, 16, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF },
 943         { E1000_RA,        0, 16, TABLE64_TEST_HI, 0x800FFFFF, 0xFFFFFFFF },
 944         { E1000_MTA,       0, 128, TABLE32_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
 945         { 0, 0, 0, 0 }
 946 };
 947
 948 static bool reg_pattern_test(struct igb_adapter *adapter, u64 *data,
 949                              int reg, u32 mask, u32 write)
 950 {
 951         struct e1000_hw *hw = &adapter->hw;
 952         u32 pat, val;
 953         u32 _test[] =
 954                 {0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF};
 955         for (pat = 0; pat < ARRAY_SIZE(_test); pat++) {
 956                 wr32(reg, (_test[pat] & write));
 957                 val = rd32(reg);
 958                 if (val != (_test[pat] & write & mask)) {
 959                         dev_err(&adapter->pdev->dev, "pattern test reg %04X "
 960                                 "failed: got 0x%08X expected 0x%08X\n",
 961                                 reg, val, (_test[pat] & write & mask));
 962                         *data = reg;
 963                         return 1;
 964                 }
 965         }
 966         return 0;
 967 }
 968
 969 static bool reg_set_and_check(struct igb_adapter *adapter, u64 *data,
 970                               int reg, u32 mask, u32 write)
 971 {
 972         struct e1000_hw *hw = &adapter->hw;
 973         u32 val;
 974         wr32(reg, write & mask);
 975         val = rd32(reg);
 976         if ((write & mask) != (val & mask)) {
 977                 dev_err(&adapter->pdev->dev, "set/check reg %04X test failed:"
 978                         " got 0x%08X expected 0x%08X\n", reg,
 979                         (val & mask), (write & mask));
 980                 *data = reg;
 981                 return 1;
 982         }
 983         return 0;
 984 }
 985
 986 #define REG_PATTERN_TEST(reg, mask, write) \
 987         do { \
 988                 if (reg_pattern_test(adapter, data, reg, mask, write)) \
 989                         return 1; \
 990         } while (0)
 991
 992 #define REG_SET_AND_CHECK(reg, mask, write) \
 993         do { \
 994                 if (reg_set_and_check(adapter, data, reg, mask, write)) \
 995                         return 1; \
 996         } while (0)
 997
 998 static int igb_reg_test(struct igb_adapter *adapter, u64 *data)
 999 {
1000         struct e1000_hw *hw = &adapter->hw;
1001         struct igb_reg_test *test;
1002         u32 value, before, after;
1003         u32 i, toggle;
1004
1005         toggle = 0x7FFFF3FF;
1006
1007         switch (adapter->hw.mac.type) {
1008         case e1000_82576:
1009                 test = reg_test_82576;
1010                 break;
1011         default:
1012                 test = reg_test_82575;
1013                 break;
1014         }
1015
1016         /* Because the status register is such a special case,
1017          * we handle it separately from the rest of the register
1018          * tests.  Some bits are read-only, some toggle, and some
1019          * are writable on newer MACs.
1020          */
1021         before = rd32(E1000_STATUS);
1022         value = (rd32(E1000_STATUS) & toggle);
1023         wr32(E1000_STATUS, toggle);
1024         after = rd32(E1000_STATUS) & toggle;
1025         if (value != after) {
1026                 dev_err(&adapter->pdev->dev, "failed STATUS register test "
1027                         "got: 0x%08X expected: 0x%08X\n", after, value);
1028                 *data = 1;
1029                 return 1;
1030         }
1031         /* restore previous status */
1032         wr32(E1000_STATUS, before);
1033
1034         /* Perform the remainder of the register test, looping through
1035          * the test table until we either fail or reach the null entry.
1036          */
1037         while (test->reg) {
1038                 for (i = 0; i < test->array_len; i++) {
1039                         switch (test->test_type) {
1040                         case PATTERN_TEST:
1041                                 REG_PATTERN_TEST(test->reg +
1042                                                 (i * test->reg_offset),
1043                                                 test->mask,
1044                                                 test->write);
1045                                 break;
1046                         case SET_READ_TEST:
1047                                 REG_SET_AND_CHECK(test->reg +
1048                                                 (i * test->reg_offset),
1049                                                 test->mask,
1050                                                 test->write);
1051                                 break;
1052                         case WRITE_NO_TEST:
1053                                 writel(test->write,
1054                                     (adapter->hw.hw_addr + test->reg)
1055                                         + (i * test->reg_offset));
1056                                 break;
1057                         case TABLE32_TEST:
1058                                 REG_PATTERN_TEST(test->reg + (i * 4),
1059                                                 test->mask,
1060                                                 test->write);
1061                                 break;
1062                         case TABLE64_TEST_LO:
1063                                 REG_PATTERN_TEST(test->reg + (i * 8),
1064                                                 test->mask,
1065                                                 test->write);
1066                                 break;
1067                         case TABLE64_TEST_HI:
1068                                 REG_PATTERN_TEST((test->reg + 4) + (i * 8),
1069                                                 test->mask,
1070                                                 test->write);
1071                                 break;
1072                         }
1073                 }
1074                 test++;
1075         }
1076
1077         *data = 0;
1078         return 0;
1079 }
1080
1081 static int igb_eeprom_test(struct igb_adapter *adapter, u64 *data)
1082 {
1083         u16 temp;
1084         u16 checksum = 0;
1085         u16 i;
1086
1087         *data = 0;
1088         /* Read and add up the contents of the EEPROM */
1089         for (i = 0; i < (NVM_CHECKSUM_REG + 1); i++) {
1090                 if ((adapter->hw.nvm.ops.read(&adapter->hw, i, 1, &temp))
1091                     < 0) {
1092                         *data = 1;
1093                         break;
1094                 }
1095                 checksum += temp;
1096         }
1097
1098         /* If Checksum is not Correct return error else test passed */
1099         if ((checksum != (u16) NVM_SUM) && !(*data))
1100                 *data = 2;
1101
1102         return *data;
1103 }
1104
1105 static irqreturn_t igb_test_intr(int irq, void *data)
1106 {
1107         struct net_device *netdev = (struct net_device *) data;
1108         struct igb_adapter *adapter = netdev_priv(netdev);
1109         struct e1000_hw *hw = &adapter->hw;
1110
1111         adapter->test_icr |= rd32(E1000_ICR);
1112
1113         return IRQ_HANDLED;
1114 }
1115
1116 static int igb_intr_test(struct igb_adapter *adapter, u64 *data)
1117 {
1118         struct e1000_hw *hw = &adapter->hw;
1119         struct net_device *netdev = adapter->netdev;
1120         u32 mask, ics_mask, i = 0, shared_int = true;
1121         u32 irq = adapter->pdev->irq;
1122
1123         *data = 0;
1124
1125         /* Hook up test interrupt handler just for this test */
1126         if (adapter->msix_entries) {
1127                 if (request_irq(adapter->msix_entries[0].vector,
1128                                 &igb_test_intr, 0, netdev->name, adapter)) {
1129                         *data = 1;
1130                         return -1;
1131                 }
1132
1133         } else if (adapter->flags & IGB_FLAG_HAS_MSI) {
1134                 shared_int = false;
1135                 if (request_irq(irq,
1136                                 &igb_test_intr, 0, netdev->name, adapter)) {
1137                         *data = 1;
1138                         return -1;
1139                 }
1140         } else if (!request_irq(irq, &igb_test_intr, IRQF_PROBE_SHARED,
1141                                 netdev->name, adapter)) {
1142                 shared_int = false;
1143         } else if (request_irq(irq, &igb_test_intr, IRQF_SHARED,
1144                  netdev->name, adapter)) {
1145                 *data = 1;
1146                 return -1;
1147         }
1148         dev_info(&adapter->pdev->dev, "testing %s interrupt\n",
1149                 (shared_int ? "shared" : "unshared"));
1150         /* Disable all the interrupts */
1151         wr32(E1000_IMC, ~0);
1152         msleep(10);
1153
1154         /* Define all writable bits for ICS */
1155         switch (hw->mac.type) {
1156         case e1000_82575:
1157                 ics_mask = 0x37F47EDD;
1158                 break;
1159         case e1000_82576:
1160                 ics_mask = 0x77D4FBFD;
1161                 break;
1162         default:
1163                 ics_mask = 0x7FFFFFFF;
1164                 break;
1165         }
1166
1167         /* Test each interrupt */
1168         for (; i < 31; i++) {
1169                 /* Interrupt to test */
1170                 mask = 1 << i;
1171
1172                 if (!(mask & ics_mask))
1173                         continue;
1174
1175                 if (!shared_int) {
1176                         /* Disable the interrupt to be reported in
1177                          * the cause register and then force the same
1178                          * interrupt and see if one gets posted.  If
1179                          * an interrupt was posted to the bus, the
1180                          * test failed.
1181                          */
1182                         adapter->test_icr = 0;
1183
1184                         /* Flush any pending interrupts */
1185                         wr32(E1000_ICR, ~0);
1186
1187                         wr32(E1000_IMC, mask);
1188                         wr32(E1000_ICS, mask);
1189                         msleep(10);
1190
1191                         if (adapter->test_icr & mask) {
1192                                 *data = 3;
1193                                 break;
1194                         }
1195                 }
1196
1197                 /* Enable the interrupt to be reported in
1198                  * the cause register and then force the same
1199                  * interrupt and see if one gets posted.  If
1200                  * an interrupt was not posted to the bus, the
1201                  * test failed.
1202                  */
1203                 adapter->test_icr = 0;
1204
1205                 /* Flush any pending interrupts */
1206                 wr32(E1000_ICR, ~0);
1207
1208                 wr32(E1000_IMS, mask);
1209                 wr32(E1000_ICS, mask);
1210                 msleep(10);
1211
1212                 if (!(adapter->test_icr & mask)) {
1213                         *data = 4;
1214                         break;
1215                 }
1216
1217                 if (!shared_int) {
1218                         /* Disable the other interrupts to be reported in
1219                          * the cause register and then force the other
1220                          * interrupts and see if any get posted.  If
1221                          * an interrupt was posted to the bus, the
1222                          * test failed.
1223                          */
1224                         adapter->test_icr = 0;
1225
1226                         /* Flush any pending interrupts */
1227                         wr32(E1000_ICR, ~0);
1228
1229                         wr32(E1000_IMC, ~mask);
1230                         wr32(E1000_ICS, ~mask);
1231                         msleep(10);
1232
1233                         if (adapter->test_icr & mask) {
1234                                 *data = 5;
1235                                 break;
1236                         }
1237                 }
1238         }
1239
1240         /* Disable all the interrupts */
1241         wr32(E1000_IMC, ~0);
1242         msleep(10);
1243
1244         /* Unhook test interrupt handler */
1245         if (adapter->msix_entries)
1246                 free_irq(adapter->msix_entries[0].vector, adapter);
1247         else
1248                 free_irq(irq, adapter);
1249
1250         return *data;
1251 }
1252
1253 static void igb_free_desc_rings(struct igb_adapter *adapter)
1254 {
1255         igb_free_tx_resources(&adapter->test_tx_ring);
1256         igb_free_rx_resources(&adapter->test_rx_ring);
1257 }
1258
1259 static int igb_setup_desc_rings(struct igb_adapter *adapter)
1260 {
1261         struct igb_ring *tx_ring = &adapter->test_tx_ring;
1262         struct igb_ring *rx_ring = &adapter->test_rx_ring;
1263         struct e1000_hw *hw = &adapter->hw;
1264         int ret_val;
1265
1266         /* Setup Tx descriptor ring and Tx buffers */
1267         tx_ring->count = IGB_DEFAULT_TXD;
1268         tx_ring->pdev = adapter->pdev;
1269         tx_ring->netdev = adapter->netdev;
1270         tx_ring->reg_idx = adapter->vfs_allocated_count;
1271
1272         if (igb_setup_tx_resources(tx_ring)) {
1273                 ret_val = 1;
1274                 goto err_nomem;
1275         }
1276
1277         igb_setup_tctl(adapter);
1278         igb_configure_tx_ring(adapter, tx_ring);
1279
1280         /* Setup Rx descriptor ring and Rx buffers */
1281         rx_ring->count = IGB_DEFAULT_RXD;
1282         rx_ring->pdev = adapter->pdev;
1283         rx_ring->netdev = adapter->netdev;
1284         rx_ring->rx_buffer_len = IGB_RXBUFFER_2048;
1285         rx_ring->reg_idx = adapter->vfs_allocated_count;
1286
1287         if (igb_setup_rx_resources(rx_ring)) {
1288                 ret_val = 3;
1289                 goto err_nomem;
1290         }
1291
1292         /* set the default queue to queue 0 of PF */
1293         wr32(E1000_MRQC, adapter->vfs_allocated_count << 3);
1294
1295         /* enable receive ring */
1296         igb_setup_rctl(adapter);
1297         igb_configure_rx_ring(adapter, rx_ring);
1298
1299         igb_alloc_rx_buffers_adv(rx_ring, igb_desc_unused(rx_ring));
1300
1301         return 0;
1302
1303 err_nomem:
1304         igb_free_desc_rings(adapter);
1305         return ret_val;
1306 }
1307
1308 static void igb_phy_disable_receiver(struct igb_adapter *adapter)
1309 {
1310         struct e1000_hw *hw = &adapter->hw;
1311
1312         /* Write out to PHY registers 29 and 30 to disable the Receiver. */
1313         igb_write_phy_reg(hw, 29, 0x001F);
1314         igb_write_phy_reg(hw, 30, 0x8FFC);
1315         igb_write_phy_reg(hw, 29, 0x001A);
1316         igb_write_phy_reg(hw, 30, 0x8FF0);
1317 }
1318
1319 static int igb_integrated_phy_loopback(struct igb_adapter *adapter)
1320 {
1321         struct e1000_hw *hw = &adapter->hw;
1322         u32 ctrl_reg = 0;
1323
1324         hw->mac.autoneg = false;
1325
1326         if (hw->phy.type == e1000_phy_m88) {
1327                 /* Auto-MDI/MDIX Off */
1328                 igb_write_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, 0x0808);
1329                 /* reset to update Auto-MDI/MDIX */
1330                 igb_write_phy_reg(hw, PHY_CONTROL, 0x9140);
1331                 /* autoneg off */
1332                 igb_write_phy_reg(hw, PHY_CONTROL, 0x8140);
1333         }
1334
1335         ctrl_reg = rd32(E1000_CTRL);
1336
1337         /* force 1000, set loopback */
1338         igb_write_phy_reg(hw, PHY_CONTROL, 0x4140);
1339
1340         /* Now set up the MAC to the same speed/duplex as the PHY. */
1341         ctrl_reg = rd32(E1000_CTRL);
1342         ctrl_reg &= ~E1000_CTRL_SPD_SEL; /* Clear the speed sel bits */
1343         ctrl_reg |= (E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
1344                      E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
1345                      E1000_CTRL_SPD_1000 |/* Force Speed to 1000 */
1346                      E1000_CTRL_FD |     /* Force Duplex to FULL */
1347                      E1000_CTRL_SLU);    /* Set link up enable bit */
1348
1349         if (hw->phy.type == e1000_phy_m88)
1350                 ctrl_reg |= E1000_CTRL_ILOS; /* Invert Loss of Signal */
1351
1352         wr32(E1000_CTRL, ctrl_reg);
1353
1354         /* Disable the receiver on the PHY so when a cable is plugged in, the
1355          * PHY does not begin to autoneg when a cable is reconnected to the NIC.
1356          */
1357         if (hw->phy.type == e1000_phy_m88)
1358                 igb_phy_disable_receiver(adapter);
1359
1360         udelay(500);
1361
1362         return 0;
1363 }
1364
1365 static int igb_set_phy_loopback(struct igb_adapter *adapter)
1366 {
1367         return igb_integrated_phy_loopback(adapter);
1368 }
1369
1370 static int igb_setup_loopback_test(struct igb_adapter *adapter)
1371 {
1372         struct e1000_hw *hw = &adapter->hw;
1373         u32 reg;
1374
1375         if (hw->phy.media_type == e1000_media_type_internal_serdes) {
1376                 reg = rd32(E1000_RCTL);
1377                 reg |= E1000_RCTL_LBM_TCVR;
1378                 wr32(E1000_RCTL, reg);
1379
1380                 wr32(E1000_SCTL, E1000_ENABLE_SERDES_LOOPBACK);
1381
1382                 reg = rd32(E1000_CTRL);
1383                 reg &= ~(E1000_CTRL_RFCE |
1384                          E1000_CTRL_TFCE |
1385                          E1000_CTRL_LRST);
1386                 reg |= E1000_CTRL_SLU |
1387                        E1000_CTRL_FD;
1388                 wr32(E1000_CTRL, reg);
1389
1390                 /* Unset switch control to serdes energy detect */
1391                 reg = rd32(E1000_CONNSW);
1392                 reg &= ~E1000_CONNSW_ENRGSRC;
1393                 wr32(E1000_CONNSW, reg);
1394
1395                 /* Set PCS register for forced speed */
1396                 reg = rd32(E1000_PCS_LCTL);
1397                 reg &= ~E1000_PCS_LCTL_AN_ENABLE;     /* Disable Autoneg*/
1398                 reg |= E1000_PCS_LCTL_FLV_LINK_UP |   /* Force link up */
1399                        E1000_PCS_LCTL_FSV_1000 |      /* Force 1000    */
1400                        E1000_PCS_LCTL_FDV_FULL |      /* SerDes Full duplex */
1401                        E1000_PCS_LCTL_FSD |           /* Force Speed */
1402                        E1000_PCS_LCTL_FORCE_LINK;     /* Force Link */
1403                 wr32(E1000_PCS_LCTL, reg);
1404
1405                 return 0;
1406         } else if (hw->phy.media_type == e1000_media_type_copper) {
1407                 return igb_set_phy_loopback(adapter);
1408         }
1409
1410         return 7;
1411 }
1412
1413 static void igb_loopback_cleanup(struct igb_adapter *adapter)
1414 {
1415         struct e1000_hw *hw = &adapter->hw;
1416         u32 rctl;
1417         u16 phy_reg;
1418
1419         rctl = rd32(E1000_RCTL);
1420         rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
1421         wr32(E1000_RCTL, rctl);
1422
1423         hw->mac.autoneg = true;
1424         igb_read_phy_reg(hw, PHY_CONTROL, &phy_reg);
1425         if (phy_reg & MII_CR_LOOPBACK) {
1426                 phy_reg &= ~MII_CR_LOOPBACK;
1427                 igb_write_phy_reg(hw, PHY_CONTROL, phy_reg);
1428                 igb_phy_sw_reset(hw);
1429         }
1430 }
1431
1432 static void igb_create_lbtest_frame(struct sk_buff *skb,
1433                                     unsigned int frame_size)
1434 {
1435         memset(skb->data, 0xFF, frame_size);
1436         frame_size &= ~1;
1437         memset(&skb->data[frame_size / 2], 0xAA, frame_size / 2 - 1);
1438         memset(&skb->data[frame_size / 2 + 10], 0xBE, 1);
1439         memset(&skb->data[frame_size / 2 + 12], 0xAF, 1);
1440 }
1441
1442 static int igb_check_lbtest_frame(struct sk_buff *skb, unsigned int frame_size)
1443 {
1444         frame_size &= ~1;
1445         if (*(skb->data + 3) == 0xFF)
1446                 if ((*(skb->data + frame_size / 2 + 10) == 0xBE) &&
1447                    (*(skb->data + frame_size / 2 + 12) == 0xAF))
1448                         return 0;
1449         return 13;
1450 }
1451
1452 static int igb_clean_test_rings(struct igb_ring *rx_ring,
1453                                 struct igb_ring *tx_ring,
1454                                 unsigned int size)
1455 {
1456         union e1000_adv_rx_desc *rx_desc;
1457         struct igb_buffer *buffer_info;
1458         int rx_ntc, tx_ntc, count = 0;
1459         u32 staterr;
1460
1461         /* initialize next to clean and descriptor values */
1462         rx_ntc = rx_ring->next_to_clean;
1463         tx_ntc = tx_ring->next_to_clean;
1464         rx_desc = E1000_RX_DESC_ADV(*rx_ring, rx_ntc);
1465         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1466
1467         while (staterr & E1000_RXD_STAT_DD) {
1468                 /* check rx buffer */
1469                 buffer_info = &rx_ring->buffer_info[rx_ntc];
1470
1471                 /* unmap rx buffer, will be remapped by alloc_rx_buffers */
1472                 pci_unmap_single(rx_ring->pdev,
1473                                  buffer_info->dma,
1474                                  rx_ring->rx_buffer_len,
1475                                  PCI_DMA_FROMDEVICE);
1476                 buffer_info->dma = 0;
1477
1478                 /* verify contents of skb */
1479                 if (!igb_check_lbtest_frame(buffer_info->skb, size))
1480                         count++;
1481
1482                 /* unmap buffer on tx side */
1483                 buffer_info = &tx_ring->buffer_info[tx_ntc];
1484                 igb_unmap_and_free_tx_resource(tx_ring, buffer_info);
1485
1486                 /* increment rx/tx next to clean counters */
1487                 rx_ntc++;
1488                 if (rx_ntc == rx_ring->count)
1489                         rx_ntc = 0;
1490                 tx_ntc++;
1491                 if (tx_ntc == tx_ring->count)
1492                         tx_ntc = 0;
1493
1494                 /* fetch next descriptor */
1495                 rx_desc = E1000_RX_DESC_ADV(*rx_ring, rx_ntc);
1496                 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1497         }
1498
1499         /* re-map buffers to ring, store next to clean values */
1500         igb_alloc_rx_buffers_adv(rx_ring, count);
1501         rx_ring->next_to_clean = rx_ntc;
1502         tx_ring->next_to_clean = tx_ntc;
1503
1504         return count;
1505 }
1506
1507 static int igb_run_loopback_test(struct igb_adapter *adapter)
1508 {
1509         struct igb_ring *tx_ring = &adapter->test_tx_ring;
1510         struct igb_ring *rx_ring = &adapter->test_rx_ring;
1511         int i, j, lc, good_cnt, ret_val = 0;
1512         unsigned int size = 1024;
1513         netdev_tx_t tx_ret_val;
1514         struct sk_buff *skb;
1515
1516         /* allocate test skb */
1517         skb = alloc_skb(size, GFP_KERNEL);
1518         if (!skb)
1519                 return 11;
1520
1521         /* place data into test skb */
1522         igb_create_lbtest_frame(skb, size);
1523         skb_put(skb, size);
1524
1525         /* Calculate the loop count based on the largest descriptor ring
1526          * The idea is to wrap the largest ring a number of times using 64
1527          * send/receive pairs during each loop
1528          */
1529
1530         if (rx_ring->count <= tx_ring->count)
1531                 lc = ((tx_ring->count / 64) * 2) + 1;
1532         else
1533                 lc = ((rx_ring->count / 64) * 2) + 1;
1534
1535         for (j = 0; j <= lc; j++) { /* loop count loop */
1536                 /* reset count of good packets */
1537                 good_cnt = 0;
1538
1539                 /* place 64 packets on the transmit queue*/
1540                 for (i = 0; i < 64; i++) {
1541                         skb_get(skb);
1542                         tx_ret_val = igb_xmit_frame_ring_adv(skb, tx_ring);
1543                         if (tx_ret_val == NETDEV_TX_OK)
1544                                 good_cnt++;
1545                 }
1546
1547                 if (good_cnt != 64) {
1548                         ret_val = 12;
1549                         break;
1550                 }
1551
1552                 /* allow 200 milliseconds for packets to go from tx to rx */
1553                 msleep(200);
1554
1555                 good_cnt = igb_clean_test_rings(rx_ring, tx_ring, size);
1556                 if (good_cnt != 64) {
1557                         ret_val = 13;
1558                         break;
1559                 }
1560         } /* end loop count loop */
1561
1562         /* free the original skb */
1563         kfree_skb(skb);
1564
1565         return ret_val;
1566 }
1567
1568 static int igb_loopback_test(struct igb_adapter *adapter, u64 *data)
1569 {
1570         /* PHY loopback cannot be performed if SoL/IDER
1571          * sessions are active */
1572         if (igb_check_reset_block(&adapter->hw)) {
1573                 dev_err(&adapter->pdev->dev,
1574                         "Cannot do PHY loopback test "
1575                         "when SoL/IDER is active.\n");
1576                 *data = 0;
1577                 goto out;
1578         }
1579         *data = igb_setup_desc_rings(adapter);
1580         if (*data)
1581                 goto out;
1582         *data = igb_setup_loopback_test(adapter);
1583         if (*data)
1584                 goto err_loopback;
1585         *data = igb_run_loopback_test(adapter);
1586         igb_loopback_cleanup(adapter);
1587
1588 err_loopback:
1589         igb_free_desc_rings(adapter);
1590 out:
1591         return *data;
1592 }
1593
1594 static int igb_link_test(struct igb_adapter *adapter, u64 *data)
1595 {
1596         struct e1000_hw *hw = &adapter->hw;
1597         *data = 0;
1598         if (hw->phy.media_type == e1000_media_type_internal_serdes) {
1599                 int i = 0;
1600                 hw->mac.serdes_has_link = false;
1601
1602                 /* On some blade server designs, link establishment
1603                  * could take as long as 2-3 minutes */
1604                 do {
1605                         hw->mac.ops.check_for_link(&adapter->hw);
1606                         if (hw->mac.serdes_has_link)
1607                                 return *data;
1608                         msleep(20);
1609                 } while (i++ < 3750);
1610
1611                 *data = 1;
1612         } else {
1613                 hw->mac.ops.check_for_link(&adapter->hw);
1614                 if (hw->mac.autoneg)
1615                         msleep(4000);
1616
1617                 if (!(rd32(E1000_STATUS) &
1618                       E1000_STATUS_LU))
1619                         *data = 1;
1620         }
1621         return *data;
1622 }
1623
1624 static void igb_diag_test(struct net_device *netdev,
1625                           struct ethtool_test *eth_test, u64 *data)
1626 {
1627         struct igb_adapter *adapter = netdev_priv(netdev);
1628         u16 autoneg_advertised;
1629         u8 forced_speed_duplex, autoneg;
1630         bool if_running = netif_running(netdev);
1631
1632         set_bit(__IGB_TESTING, &adapter->state);
1633         if (eth_test->flags == ETH_TEST_FL_OFFLINE) {
1634                 /* Offline tests */
1635
1636                 /* save speed, duplex, autoneg settings */
1637                 autoneg_advertised = adapter->hw.phy.autoneg_advertised;
1638                 forced_speed_duplex = adapter->hw.mac.forced_speed_duplex;
1639                 autoneg = adapter->hw.mac.autoneg;
1640
1641                 dev_info(&adapter->pdev->dev, "offline testing starting\n");
1642
1643                 /* Link test performed before hardware reset so autoneg doesn't
1644                  * interfere with test result */
1645                 if (igb_link_test(adapter, &data[4]))
1646                         eth_test->flags |= ETH_TEST_FL_FAILED;
1647
1648                 if (if_running)
1649                         /* indicate we're in test mode */
1650                         dev_close(netdev);
1651                 else
1652                         igb_reset(adapter);
1653
1654                 if (igb_reg_test(adapter, &data[0]))
1655                         eth_test->flags |= ETH_TEST_FL_FAILED;
1656
1657                 igb_reset(adapter);
1658                 if (igb_eeprom_test(adapter, &data[1]))
1659                         eth_test->flags |= ETH_TEST_FL_FAILED;
1660
1661                 igb_reset(adapter);
1662                 if (igb_intr_test(adapter, &data[2]))
1663                         eth_test->flags |= ETH_TEST_FL_FAILED;
1664
1665                 igb_reset(adapter);
1666                 if (igb_loopback_test(adapter, &data[3]))
1667                         eth_test->flags |= ETH_TEST_FL_FAILED;
1668
1669                 /* restore speed, duplex, autoneg settings */
1670                 adapter->hw.phy.autoneg_advertised = autoneg_advertised;
1671                 adapter->hw.mac.forced_speed_duplex = forced_speed_duplex;
1672                 adapter->hw.mac.autoneg = autoneg;
1673
1674                 /* force this routine to wait until autoneg complete/timeout */
1675                 adapter->hw.phy.autoneg_wait_to_complete = true;
1676                 igb_reset(adapter);
1677                 adapter->hw.phy.autoneg_wait_to_complete = false;
1678
1679                 clear_bit(__IGB_TESTING, &adapter->state);
1680                 if (if_running)
1681                         dev_open(netdev);
1682         } else {
1683                 dev_info(&adapter->pdev->dev, "online testing starting\n");
1684                 /* Online tests */
1685                 if (igb_link_test(adapter, &data[4]))
1686                         eth_test->flags |= ETH_TEST_FL_FAILED;
1687
1688                 /* Online tests aren't run; pass by default */
1689                 data[0] = 0;
1690                 data[1] = 0;
1691                 data[2] = 0;
1692                 data[3] = 0;
1693
1694                 clear_bit(__IGB_TESTING, &adapter->state);
1695         }
1696         msleep_interruptible(4 * 1000);
1697 }
1698
1699 static int igb_wol_exclusion(struct igb_adapter *adapter,
1700                              struct ethtool_wolinfo *wol)
1701 {
1702         struct e1000_hw *hw = &adapter->hw;
1703         int retval = 1; /* fail by default */
1704
1705         switch (hw->device_id) {
1706         case E1000_DEV_ID_82575GB_QUAD_COPPER:
1707                 /* WoL not supported */
1708                 wol->supported = 0;
1709                 break;
1710         case E1000_DEV_ID_82575EB_FIBER_SERDES:
1711         case E1000_DEV_ID_82576_FIBER:
1712         case E1000_DEV_ID_82576_SERDES:
1713                 /* Wake events not supported on port B */
1714                 if (rd32(E1000_STATUS) & E1000_STATUS_FUNC_1) {
1715                         wol->supported = 0;
1716                         break;
1717                 }
1718                 /* return success for non excluded adapter ports */
1719                 retval = 0;
1720                 break;
1721         case E1000_DEV_ID_82576_QUAD_COPPER:
1722                 /* quad port adapters only support WoL on port A */
1723                 if (!(adapter->flags & IGB_FLAG_QUAD_PORT_A)) {
1724                         wol->supported = 0;
1725                         break;
1726                 }
1727                 /* return success for non excluded adapter ports */
1728                 retval = 0;
1729                 break;
1730         default:
1731                 /* dual port cards only support WoL on port A from now on
1732                  * unless it was enabled in the eeprom for port B
1733                  * so exclude FUNC_1 ports from having WoL enabled */
1734                 if (rd32(E1000_STATUS) & E1000_STATUS_FUNC_1 &&
1735                     !adapter->eeprom_wol) {
1736                         wol->supported = 0;
1737                         break;
1738                 }
1739
1740                 retval = 0;
1741         }
1742
1743         return retval;
1744 }
1745
1746 static void igb_get_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
1747 {
1748         struct igb_adapter *adapter = netdev_priv(netdev);
1749
1750         wol->supported = WAKE_UCAST | WAKE_MCAST |
1751                          WAKE_BCAST | WAKE_MAGIC;
1752         wol->wolopts = 0;
1753
1754         /* this function will set ->supported = 0 and return 1 if wol is not
1755          * supported by this hardware */
1756         if (igb_wol_exclusion(adapter, wol) ||
1757             !device_can_wakeup(&adapter->pdev->dev))
1758                 return;
1759
1760         /* apply any specific unsupported masks here */
1761         switch (adapter->hw.device_id) {
1762         default:
1763                 break;
1764         }
1765
1766         if (adapter->wol & E1000_WUFC_EX)
1767                 wol->wolopts |= WAKE_UCAST;
1768         if (adapter->wol & E1000_WUFC_MC)
1769                 wol->wolopts |= WAKE_MCAST;
1770         if (adapter->wol & E1000_WUFC_BC)
1771                 wol->wolopts |= WAKE_BCAST;
1772         if (adapter->wol & E1000_WUFC_MAG)
1773                 wol->wolopts |= WAKE_MAGIC;
1774
1775         return;
1776 }
1777
1778 static int igb_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
1779 {
1780         struct igb_adapter *adapter = netdev_priv(netdev);
1781
1782         if (wol->wolopts & (WAKE_PHY | WAKE_ARP | WAKE_MAGICSECURE))
1783                 return -EOPNOTSUPP;
1784
1785         if (igb_wol_exclusion(adapter, wol) ||
1786             !device_can_wakeup(&adapter->pdev->dev))
1787                 return wol->wolopts ? -EOPNOTSUPP : 0;
1788
1789         /* these settings will always override what we currently have */
1790         adapter->wol = 0;
1791
1792         if (wol->wolopts & WAKE_UCAST)
1793                 adapter->wol |= E1000_WUFC_EX;
1794         if (wol->wolopts & WAKE_MCAST)
1795                 adapter->wol |= E1000_WUFC_MC;
1796         if (wol->wolopts & WAKE_BCAST)
1797                 adapter->wol |= E1000_WUFC_BC;
1798         if (wol->wolopts & WAKE_MAGIC)
1799                 adapter->wol |= E1000_WUFC_MAG;
1800
1801         device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
1802
1803         return 0;
1804 }
1805
1806 /* bit defines for adapter->led_status */
1807 #define IGB_LED_ON              0
1808
1809 static int igb_phys_id(struct net_device *netdev, u32 data)
1810 {
1811         struct igb_adapter *adapter = netdev_priv(netdev);
1812         struct e1000_hw *hw = &adapter->hw;
1813
1814         if (!data || data > (u32)(MAX_SCHEDULE_TIMEOUT / HZ))
1815                 data = (u32)(MAX_SCHEDULE_TIMEOUT / HZ);
1816
1817         igb_blink_led(hw);
1818         msleep_interruptible(data * 1000);
1819
1820         igb_led_off(hw);
1821         clear_bit(IGB_LED_ON, &adapter->led_status);
1822         igb_cleanup_led(hw);
1823
1824         return 0;
1825 }
1826
1827 static int igb_set_coalesce(struct net_device *netdev,
1828                             struct ethtool_coalesce *ec)
1829 {
1830         struct igb_adapter *adapter = netdev_priv(netdev);
1831         int i;
1832
1833         if ((ec->rx_coalesce_usecs > IGB_MAX_ITR_USECS) ||
1834             ((ec->rx_coalesce_usecs > 3) &&
1835              (ec->rx_coalesce_usecs < IGB_MIN_ITR_USECS)) ||
1836             (ec->rx_coalesce_usecs == 2))
1837                 return -EINVAL;
1838
1839         /* convert to rate of irq's per second */
1840         if (ec->rx_coalesce_usecs && ec->rx_coalesce_usecs <= 3) {
1841                 adapter->itr_setting = ec->rx_coalesce_usecs;
1842                 adapter->itr = IGB_START_ITR;
1843         } else {
1844                 adapter->itr_setting = ec->rx_coalesce_usecs << 2;
1845                 adapter->itr = adapter->itr_setting;
1846         }
1847
1848         for (i = 0; i < adapter->num_q_vectors; i++) {
1849                 struct igb_q_vector *q_vector = adapter->q_vector[i];
1850                 q_vector->itr_val = adapter->itr;
1851                 q_vector->set_itr = 1;
1852         }
1853
1854         return 0;
1855 }
1856
1857 static int igb_get_coalesce(struct net_device *netdev,
1858                             struct ethtool_coalesce *ec)
1859 {
1860         struct igb_adapter *adapter = netdev_priv(netdev);
1861
1862         if (adapter->itr_setting <= 3)
1863                 ec->rx_coalesce_usecs = adapter->itr_setting;
1864         else
1865                 ec->rx_coalesce_usecs = adapter->itr_setting >> 2;
1866
1867         return 0;
1868 }
1869
1870
1871 static int igb_nway_reset(struct net_device *netdev)
1872 {
1873         struct igb_adapter *adapter = netdev_priv(netdev);
1874         if (netif_running(netdev))
1875                 igb_reinit_locked(adapter);
1876         return 0;
1877 }
1878
1879 static int igb_get_sset_count(struct net_device *netdev, int sset)
1880 {
1881         switch (sset) {
1882         case ETH_SS_STATS:
1883                 return IGB_STATS_LEN;
1884         case ETH_SS_TEST:
1885                 return IGB_TEST_LEN;
1886         default:
1887                 return -ENOTSUPP;
1888         }
1889 }
1890
1891 static void igb_get_ethtool_stats(struct net_device *netdev,
1892                                   struct ethtool_stats *stats, u64 *data)
1893 {
1894         struct igb_adapter *adapter = netdev_priv(netdev);
1895         u64 *queue_stat;
1896         int stat_count_tx = sizeof(struct igb_tx_queue_stats) / sizeof(u64);
1897         int stat_count_rx = sizeof(struct igb_rx_queue_stats) / sizeof(u64);
1898         int j;
1899         int i;
1900         char *p = NULL;
1901
1902         igb_update_stats(adapter);
1903         for (i = 0; i < IGB_GLOBAL_STATS_LEN; i++) {
1904                 switch (igb_gstrings_stats[i].type) {
1905                 case NETDEV_STATS:
1906                         p = (char *) netdev +
1907                                         igb_gstrings_stats[i].stat_offset;
1908                         break;
1909                 case IGB_STATS:
1910                         p = (char *) adapter +
1911                                         igb_gstrings_stats[i].stat_offset;
1912                         break;
1913                 }
1914
1915                 data[i] = (igb_gstrings_stats[i].sizeof_stat ==
1916                         sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
1917         }
1918         for (j = 0; j < adapter->num_tx_queues; j++) {
1919                 int k;
1920                 queue_stat = (u64 *)&adapter->tx_ring[j].tx_stats;
1921                 for (k = 0; k < stat_count_tx; k++)
1922                         data[i + k] = queue_stat[k];
1923                 i += k;
1924         }
1925         for (j = 0; j < adapter->num_rx_queues; j++) {
1926                 int k;
1927                 queue_stat = (u64 *)&adapter->rx_ring[j].rx_stats;
1928                 for (k = 0; k < stat_count_rx; k++)
1929                         data[i + k] = queue_stat[k];
1930                 i += k;
1931         }
1932 }
1933
1934 static void igb_get_strings(struct net_device *netdev, u32 stringset, u8 *data)
1935 {
1936         struct igb_adapter *adapter = netdev_priv(netdev);
1937         u8 *p = data;
1938         int i;
1939
1940         switch (stringset) {
1941         case ETH_SS_TEST:
1942                 memcpy(data, *igb_gstrings_test,
1943                         IGB_TEST_LEN*ETH_GSTRING_LEN);
1944                 break;
1945         case ETH_SS_STATS:
1946                 for (i = 0; i < IGB_GLOBAL_STATS_LEN; i++) {
1947                         memcpy(p, igb_gstrings_stats[i].stat_string,
1948                                ETH_GSTRING_LEN);
1949                         p += ETH_GSTRING_LEN;
1950                 }
1951                 for (i = 0; i < adapter->num_tx_queues; i++) {
1952                         sprintf(p, "tx_queue_%u_packets", i);
1953                         p += ETH_GSTRING_LEN;
1954                         sprintf(p, "tx_queue_%u_bytes", i);
1955                         p += ETH_GSTRING_LEN;
1956                         sprintf(p, "tx_queue_%u_restart", i);
1957                         p += ETH_GSTRING_LEN;
1958                 }
1959                 for (i = 0; i < adapter->num_rx_queues; i++) {
1960                         sprintf(p, "rx_queue_%u_packets", i);
1961                         p += ETH_GSTRING_LEN;
1962                         sprintf(p, "rx_queue_%u_bytes", i);
1963                         p += ETH_GSTRING_LEN;
1964                         sprintf(p, "rx_queue_%u_drops", i);
1965                         p += ETH_GSTRING_LEN;
1966                         sprintf(p, "rx_queue_%u_csum_err", i);
1967                         p += ETH_GSTRING_LEN;
1968                         sprintf(p, "rx_queue_%u_alloc_failed", i);
1969                         p += ETH_GSTRING_LEN;
1970                 }
1971 /*              BUG_ON(p - data != IGB_STATS_LEN * ETH_GSTRING_LEN); */
1972                 break;
1973         }
1974 }
1975
1976 static const struct ethtool_ops igb_ethtool_ops = {
1977         .get_settings           = igb_get_settings,
1978         .set_settings           = igb_set_settings,
1979         .get_drvinfo            = igb_get_drvinfo,
1980         .get_regs_len           = igb_get_regs_len,
1981         .get_regs               = igb_get_regs,
1982         .get_wol                = igb_get_wol,
1983         .set_wol                = igb_set_wol,
1984         .get_msglevel           = igb_get_msglevel,
1985         .set_msglevel           = igb_set_msglevel,
1986         .nway_reset             = igb_nway_reset,
1987         .get_link               = ethtool_op_get_link,
1988         .get_eeprom_len         = igb_get_eeprom_len,
1989         .get_eeprom             = igb_get_eeprom,
1990         .set_eeprom             = igb_set_eeprom,
1991         .get_ringparam          = igb_get_ringparam,
1992         .set_ringparam          = igb_set_ringparam,
1993         .get_pauseparam         = igb_get_pauseparam,
1994         .set_pauseparam         = igb_set_pauseparam,
1995         .get_rx_csum            = igb_get_rx_csum,
1996         .set_rx_csum            = igb_set_rx_csum,
1997         .get_tx_csum            = igb_get_tx_csum,
1998         .set_tx_csum            = igb_set_tx_csum,
1999         .get_sg                 = ethtool_op_get_sg,
2000         .set_sg                 = ethtool_op_set_sg,
2001         .get_tso                = ethtool_op_get_tso,
2002         .set_tso                = igb_set_tso,
2003         .self_test              = igb_diag_test,
2004         .get_strings            = igb_get_strings,
2005         .phys_id                = igb_phys_id,
2006         .get_sset_count         = igb_get_sset_count,
2007         .get_ethtool_stats      = igb_get_ethtool_stats,
2008         .get_coalesce           = igb_get_coalesce,
2009         .set_coalesce           = igb_set_coalesce,
2010 };
2011
2012 void igb_set_ethtool_ops(struct net_device *netdev)
2013 {
2014         SET_ETHTOOL_OPS(netdev, &igb_ethtool_ops);
2015 }