2 * drivers/net/gianfar_mii.c
4 * Gianfar Ethernet Driver -- MIIM bus implementation
5 * Provides Bus interface for MIIM regs
8 * Maintainer: Kumar Gala
10 * Copyright (c) 2002-2004 Freescale Semiconductor, Inc.
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License as published by the
14 * Free Software Foundation; either version 2 of the License, or (at your
15 * option) any later version.
19 #include <linux/kernel.h>
20 #include <linux/string.h>
21 #include <linux/errno.h>
22 #include <linux/unistd.h>
23 #include <linux/slab.h>
24 #include <linux/interrupt.h>
25 #include <linux/init.h>
26 #include <linux/delay.h>
27 #include <linux/netdevice.h>
28 #include <linux/etherdevice.h>
29 #include <linux/skbuff.h>
30 #include <linux/spinlock.h>
32 #include <linux/module.h>
33 #include <linux/platform_device.h>
34 #include <linux/crc32.h>
35 #include <linux/mii.h>
36 #include <linux/phy.h>
40 #include <asm/uaccess.h>
43 #include "gianfar_mii.h"
46 * Write value to the PHY at mii_id at register regnum,
47 * on the bus attached to the local interface, which may be different from the
48 * generic mdio bus (tied to a single interface), waiting until the write is
49 * done before returning. This is helpful in programming interfaces like
50 * the TBI which control interfaces like onchip SERDES and are always tied to
51 * the local mdio pins, which may not be the same as system mdio bus, used for
52 * controlling the external PHYs, for example.
54 int gfar_local_mdio_write(struct gfar_mii __iomem *regs, int mii_id,
55 int regnum, u16 value)
57 /* Set the PHY address and the register address we want to write */
58 gfar_write(®s->miimadd, (mii_id << 8) | regnum);
60 /* Write out the value we want */
61 gfar_write(®s->miimcon, value);
63 /* Wait for the transaction to finish */
64 while (gfar_read(®s->miimind) & MIIMIND_BUSY)
71 * Read the bus for PHY at addr mii_id, register regnum, and
72 * return the value. Clears miimcom first. All PHY operation
73 * done on the bus attached to the local interface,
74 * which may be different from the generic mdio bus
75 * This is helpful in programming interfaces like
76 * the TBI which, inturn, control interfaces like onchip SERDES
77 * and are always tied to the local mdio pins, which may not be the
78 * same as system mdio bus, used for controlling the external PHYs, for eg.
80 int gfar_local_mdio_read(struct gfar_mii __iomem *regs, int mii_id, int regnum)
84 /* Set the PHY address and the register address we want to read */
85 gfar_write(®s->miimadd, (mii_id << 8) | regnum);
87 /* Clear miimcom, and then initiate a read */
88 gfar_write(®s->miimcom, 0);
89 gfar_write(®s->miimcom, MII_READ_COMMAND);
91 /* Wait for the transaction to finish */
92 while (gfar_read(®s->miimind) & (MIIMIND_NOTVALID | MIIMIND_BUSY))
95 /* Grab the value of the register from miimstat */
96 value = gfar_read(®s->miimstat);
101 /* Write value to the PHY at mii_id at register regnum,
102 * on the bus, waiting until the write is done before returning.
103 * All PHY configuration is done through the TSEC1 MIIM regs */
104 int gfar_mdio_write(struct mii_bus *bus, int mii_id, int regnum, u16 value)
106 struct gfar_mii __iomem *regs = (void __iomem *)bus->priv;
108 /* Write to the local MII regs */
109 return(gfar_local_mdio_write(regs, mii_id, regnum, value));
112 /* Read the bus for PHY at addr mii_id, register regnum, and
113 * return the value. Clears miimcom first. All PHY
114 * configuration has to be done through the TSEC1 MIIM regs */
115 int gfar_mdio_read(struct mii_bus *bus, int mii_id, int regnum)
117 struct gfar_mii __iomem *regs = (void __iomem *)bus->priv;
119 /* Read the local MII regs */
120 return(gfar_local_mdio_read(regs, mii_id, regnum));
123 /* Reset the MIIM registers, and wait for the bus to free */
124 static int gfar_mdio_reset(struct mii_bus *bus)
126 struct gfar_mii __iomem *regs = (void __iomem *)bus->priv;
127 unsigned int timeout = PHY_INIT_TIMEOUT;
129 mutex_lock(&bus->mdio_lock);
131 /* Reset the management interface */
132 gfar_write(®s->miimcfg, MIIMCFG_RESET);
134 /* Setup the MII Mgmt clock speed */
135 gfar_write(®s->miimcfg, MIIMCFG_INIT_VALUE);
137 /* Wait until the bus is free */
138 while ((gfar_read(®s->miimind) & MIIMIND_BUSY) &&
142 mutex_unlock(&bus->mdio_lock);
145 printk(KERN_ERR "%s: The MII Bus is stuck!\n",
154 static int gfar_mdio_probe(struct device *dev)
156 struct platform_device *pdev = to_platform_device(dev);
157 struct gianfar_mdio_data *pdata;
158 struct gfar_mii __iomem *regs;
159 struct gfar __iomem *enet_regs;
160 struct mii_bus *new_bus;
167 new_bus = mdiobus_alloc();
171 new_bus->name = "Gianfar MII Bus",
172 new_bus->read = &gfar_mdio_read,
173 new_bus->write = &gfar_mdio_write,
174 new_bus->reset = &gfar_mdio_reset,
175 snprintf(new_bus->id, MII_BUS_ID_SIZE, "%x", pdev->id);
177 pdata = (struct gianfar_mdio_data *)pdev->dev.platform_data;
180 printk(KERN_ERR "gfar mdio %d: Missing platform data!\n", pdev->id);
184 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
186 /* Set the PHY base address */
187 regs = ioremap(r->start, sizeof (struct gfar_mii));
194 new_bus->priv = (void __force *)regs;
196 new_bus->irq = pdata->irq;
198 new_bus->parent = dev;
199 dev_set_drvdata(dev, new_bus);
202 * This is mildly evil, but so is our hardware for doing this.
203 * Also, we have to cast back to struct gfar_mii because of
204 * definition weirdness done in gianfar.h.
206 enet_regs = (struct gfar __iomem *)
207 ((char *)regs - offsetof(struct gfar, gfar_mii_regs));
209 /* Scan the bus, looking for an empty spot for TBIPA */
210 gfar_write(&enet_regs->tbipa, 0);
211 for (i = PHY_MAX_ADDR; i > 0; i--) {
214 err = get_phy_id(new_bus, i, &phy_id);
216 goto bus_register_fail;
218 if (phy_id == 0xffffffff)
222 /* The bus is full. We don't support using 31 PHYs, sorry */
226 goto bus_register_fail;
229 gfar_write(&enet_regs->tbipa, i);
231 err = mdiobus_register(new_bus);
234 printk (KERN_ERR "%s: Cannot register as MDIO bus\n",
236 goto bus_register_fail;
244 mdiobus_free(new_bus);
250 static int gfar_mdio_remove(struct device *dev)
252 struct mii_bus *bus = dev_get_drvdata(dev);
254 mdiobus_unregister(bus);
256 dev_set_drvdata(dev, NULL);
258 iounmap((void __iomem *)bus->priv);
265 static struct device_driver gianfar_mdio_driver = {
266 .name = "fsl-gianfar_mdio",
267 .bus = &platform_bus_type,
268 .probe = gfar_mdio_probe,
269 .remove = gfar_mdio_remove,
272 int __init gfar_mdio_init(void)
274 return driver_register(&gianfar_mdio_driver);
277 void gfar_mdio_exit(void)
279 driver_unregister(&gianfar_mdio_driver);