1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2014 Freescale Semiconductor, Inc.
5 * Copyright 2017-2018 NXP
10 #include <linux/bug.h>
12 #include <linux/libfdt.h>
14 #include <fdt_support.h>
15 #include <fsl-mc/fsl_mc.h>
16 #include <fsl-mc/fsl_mc_sys.h>
17 #include <fsl-mc/fsl_mc_private.h>
18 #include <fsl-mc/fsl_dpmng.h>
19 #include <fsl-mc/fsl_dprc.h>
20 #include <fsl-mc/fsl_dpio.h>
21 #include <fsl-mc/fsl_dpni.h>
22 #include <fsl-mc/fsl_qbman_portal.h>
23 #include <fsl-mc/ldpaa_wriop.h>
25 #define MC_RAM_BASE_ADDR_ALIGNMENT (512UL * 1024 * 1024)
26 #define MC_RAM_BASE_ADDR_ALIGNMENT_MASK (~(MC_RAM_BASE_ADDR_ALIGNMENT - 1))
27 #define MC_RAM_SIZE_ALIGNMENT (256UL * 1024 * 1024)
29 #define MC_MEM_SIZE_ENV_VAR "mcmemsize"
30 #define MC_BOOT_TIMEOUT_ENV_VAR "mcboottimeout"
31 #define MC_BOOT_ENV_VAR "mcinitcmd"
32 #define MC_DRAM_BLOCK_DEFAULT_SIZE (512UL * 1024 * 1024)
34 DECLARE_GLOBAL_DATA_PTR;
35 static int mc_memset_resv_ram;
36 static int mc_boot_status = -1;
37 static int mc_dpl_applied = -1;
38 #ifdef CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET
39 static int mc_aiop_applied = -1;
41 struct fsl_mc_io *root_mc_io = NULL;
42 struct fsl_mc_io *dflt_mc_io = NULL; /* child container */
43 uint16_t root_dprc_handle = 0;
44 uint16_t dflt_dprc_handle = 0;
46 struct fsl_dpbp_obj *dflt_dpbp = NULL;
47 struct fsl_dpio_obj *dflt_dpio = NULL;
48 struct fsl_dpni_obj *dflt_dpni = NULL;
49 static u64 mc_lazy_dpl_addr;
52 void dump_ram_words(const char *title, void *addr)
55 uint32_t *words = addr;
57 printf("Dumping beginning of %s (%p):\n", title, addr);
58 for (i = 0; i < 16; i++)
59 printf("%#x ", words[i]);
64 void dump_mc_ccsr_regs(struct mc_ccsr_registers __iomem *mc_ccsr_regs)
66 printf("MC CCSR registers:\n"
76 mc_ccsr_regs->reg_gcr1,
77 mc_ccsr_regs->reg_gsr,
78 mc_ccsr_regs->reg_sicbalr,
79 mc_ccsr_regs->reg_sicbahr,
80 mc_ccsr_regs->reg_sicapr,
81 mc_ccsr_regs->reg_mcfbalr,
82 mc_ccsr_regs->reg_mcfbahr,
83 mc_ccsr_regs->reg_mcfapr,
84 mc_ccsr_regs->reg_psr);
88 #define dump_ram_words(title, addr)
89 #define dump_mc_ccsr_regs(mc_ccsr_regs)
93 #ifndef CONFIG_SYS_LS_MC_FW_IN_DDR
95 * Copying MC firmware or DPL image to DDR
97 static int mc_copy_image(const char *title,
98 u64 image_addr, u32 image_size, u64 mc_ram_addr)
100 debug("%s copied to address %p\n", title, (void *)mc_ram_addr);
101 memcpy((void *)mc_ram_addr, (void *)image_addr, image_size);
102 flush_dcache_range(mc_ram_addr, mc_ram_addr + image_size);
107 * MC firmware FIT image parser checks if the image is in FIT
108 * format, verifies integrity of the image and calculates
109 * raw image address and size values.
110 * Returns 0 on success and a negative errno on error.
113 int parse_mc_firmware_fit_image(u64 mc_fw_addr,
114 const void **raw_image_addr,
115 size_t *raw_image_size)
122 const char *uname = "firmware";
124 fit_hdr = (void *)mc_fw_addr;
126 /* Check if Image is in FIT format */
127 format = genimg_get_format(fit_hdr);
129 if (format != IMAGE_FORMAT_FIT) {
130 printf("fsl-mc: ERR: Bad firmware image (not a FIT image)\n");
134 if (!fit_check_format(fit_hdr)) {
135 printf("fsl-mc: ERR: Bad firmware image (bad FIT header)\n");
139 node_offset = fit_image_get_node(fit_hdr, uname);
141 if (node_offset < 0) {
142 printf("fsl-mc: ERR: Bad firmware image (missing subimage)\n");
146 /* Verify MC firmware image */
147 if (!(fit_image_verify(fit_hdr, node_offset))) {
148 printf("fsl-mc: ERR: Bad firmware image (bad CRC)\n");
152 /* Get address and size of raw image */
153 fit_image_get_data(fit_hdr, node_offset, &data, &size);
155 *raw_image_addr = data;
156 *raw_image_size = size;
162 #define MC_DT_INCREASE_SIZE 64
169 static int mc_fixup_mac_addr(void *blob, int nodeoffset,
170 const char *propname, struct eth_device *eth_dev,
171 enum mc_fixup_type type)
173 int err = 0, len = 0, size, i;
174 unsigned char env_enetaddr[ARP_HLEN];
175 unsigned int enetaddr_32[ARP_HLEN];
180 /* DPL likes its addresses on 32 * ARP_HLEN bits */
181 for (i = 0; i < ARP_HLEN; i++)
182 enetaddr_32[i] = cpu_to_fdt32(eth_dev->enetaddr[i]);
184 len = sizeof(enetaddr_32);
188 val = eth_dev->enetaddr;
193 /* MAC address property present */
194 if (fdt_get_property(blob, nodeoffset, propname, NULL)) {
195 /* u-boot MAC addr randomly assigned - leave the present one */
196 if (!eth_env_get_enetaddr_by_index("eth", eth_dev->index,
200 size = MC_DT_INCREASE_SIZE + strlen(propname) + len;
201 /* make room for mac address property */
202 err = fdt_increase_size(blob, size);
204 printf("fdt_increase_size: err=%s\n",
210 err = fdt_setprop(blob, nodeoffset, propname, val, len);
212 printf("fdt_setprop: err=%s\n", fdt_strerror(err));
219 #define is_dpni(s) (s != NULL ? !strncmp(s, "dpni@", 5) : 0)
221 const char *dpl_get_connection_endpoint(void *blob, char *endpoint)
223 int connoffset = fdt_path_offset(blob, "/connections"), off;
226 for (off = fdt_first_subnode(blob, connoffset);
228 off = fdt_next_subnode(blob, off)) {
229 s1 = fdt_stringlist_get(blob, off, "endpoint1", 0, NULL);
230 s2 = fdt_stringlist_get(blob, off, "endpoint2", 0, NULL);
235 if (strcmp(endpoint, s1) == 0)
238 if (strcmp(endpoint, s2) == 0)
245 static int mc_fixup_dpl_mac_addr(void *blob, int dpmac_id,
246 struct eth_device *eth_dev)
248 int objoff = fdt_path_offset(blob, "/objects");
249 int dpmacoff = -1, dpnioff = -1;
250 const char *endpoint;
254 sprintf(mac_name, "dpmac@%d", dpmac_id);
255 dpmacoff = fdt_subnode_offset(blob, objoff, mac_name);
257 /* dpmac not defined in DPL, so skip it. */
260 err = mc_fixup_mac_addr(blob, dpmacoff, "mac_addr", eth_dev,
263 printf("Error fixing up dpmac mac_addr in DPL\n");
267 /* now we need to figure out if there is any
268 * DPNI connected to this MAC, so we walk the
271 endpoint = dpl_get_connection_endpoint(blob, mac_name);
272 if (!is_dpni(endpoint))
275 /* let's see if we can fixup the DPNI as well */
276 dpnioff = fdt_subnode_offset(blob, objoff, endpoint);
278 /* DPNI not defined in DPL in the objects area */
281 return mc_fixup_mac_addr(blob, dpnioff, "mac_addr", eth_dev,
285 void fdt_fixup_mc_ddr(u64 *base, u64 *size)
287 u64 mc_size = mc_get_dram_block_size();
289 if (mc_size < MC_DRAM_BLOCK_DEFAULT_SIZE) {
290 *base = mc_get_dram_addr() + mc_size;
291 *size = MC_DRAM_BLOCK_DEFAULT_SIZE - mc_size;
295 void fdt_fsl_mc_fixup_iommu_map_entry(void *blob)
302 /* find fsl-mc node */
303 offset = fdt_path_offset(blob, "/soc/fsl-mc");
305 offset = fdt_path_offset(blob, "/fsl-mc");
307 printf("%s: fsl-mc: ERR: fsl-mc node not found in DT, err %d\n",
312 prop = fdt_getprop_w(blob, offset, "iommu-map", &lenp);
314 debug("%s: fsl-mc: ERR: missing iommu-map in fsl-mc bus node\n",
319 iommu_map[0] = cpu_to_fdt32(FSL_DPAA2_STREAM_ID_START);
320 iommu_map[1] = *++prop;
321 iommu_map[2] = cpu_to_fdt32(FSL_DPAA2_STREAM_ID_START);
322 iommu_map[3] = cpu_to_fdt32(FSL_DPAA2_STREAM_ID_END -
323 FSL_DPAA2_STREAM_ID_START + 1);
325 fdt_setprop_inplace(blob, offset, "iommu-map",
326 iommu_map, sizeof(iommu_map));
329 static int mc_fixup_dpc_mac_addr(void *blob, int dpmac_id,
330 struct eth_device *eth_dev)
332 int nodeoffset = fdt_path_offset(blob, "/board_info/ports"), noff;
335 const char link_type_mode[] = "MAC_LINK_TYPE_FIXED";
337 sprintf(mac_name, "mac@%d", dpmac_id);
339 /* node not found - create it */
340 noff = fdt_subnode_offset(blob, nodeoffset, (const char *)mac_name);
342 err = fdt_increase_size(blob, 200);
344 printf("fdt_increase_size: err=%s\n",
349 noff = fdt_add_subnode(blob, nodeoffset, mac_name);
351 printf("fdt_add_subnode: err=%s\n",
356 /* add default property of fixed link */
357 err = fdt_appendprop_string(blob, noff,
358 "link_type", link_type_mode);
360 printf("fdt_appendprop_string: err=%s\n",
366 return mc_fixup_mac_addr(blob, noff, "port_mac_address", eth_dev,
370 static int mc_fixup_mac_addrs(void *blob, enum mc_fixup_type type)
372 int i, err = 0, ret = 0;
373 char ethname[ETH_NAME_LEN];
374 struct eth_device *eth_dev;
376 for (i = WRIOP1_DPMAC1; i < NUM_WRIOP_PORTS; i++) {
377 /* port not enabled */
378 if (wriop_is_enabled_dpmac(i) != 1)
381 snprintf(ethname, ETH_NAME_LEN, "DPMAC%d@%s", i,
382 phy_interface_strings[wriop_get_enet_if(i)]);
384 eth_dev = eth_get_dev_by_name(ethname);
390 err = mc_fixup_dpl_mac_addr(blob, i, eth_dev);
393 err = mc_fixup_dpc_mac_addr(blob, i, eth_dev);
400 printf("fsl-mc: ERROR fixing mac address for %s\n",
408 static int mc_fixup_dpc(u64 dpc_addr)
410 void *blob = (void *)dpc_addr;
411 int nodeoffset, err = 0;
413 /* delete any existing ICID pools */
414 nodeoffset = fdt_path_offset(blob, "/resources/icid_pools");
415 if (fdt_del_node(blob, nodeoffset) < 0)
416 printf("\nfsl-mc: WARNING: could not delete ICID pool\n");
419 nodeoffset = fdt_path_offset(blob, "/resources");
420 if (nodeoffset < 0) {
421 printf("\nfsl-mc: ERROR: DPC is missing /resources\n");
424 nodeoffset = fdt_add_subnode(blob, nodeoffset, "icid_pools");
425 nodeoffset = fdt_add_subnode(blob, nodeoffset, "icid_pool@0");
426 do_fixup_by_path_u32(blob, "/resources/icid_pools/icid_pool@0",
427 "base_icid", FSL_DPAA2_STREAM_ID_START, 1);
428 do_fixup_by_path_u32(blob, "/resources/icid_pools/icid_pool@0",
430 FSL_DPAA2_STREAM_ID_END -
431 FSL_DPAA2_STREAM_ID_START + 1, 1);
433 /* fixup MAC addresses for dpmac ports */
434 nodeoffset = fdt_path_offset(blob, "/board_info/ports");
438 err = mc_fixup_mac_addrs(blob, MC_FIXUP_DPC);
441 flush_dcache_range(dpc_addr, dpc_addr + fdt_totalsize(blob));
446 static int load_mc_dpc(u64 mc_ram_addr, size_t mc_ram_size, u64 mc_dpc_addr)
449 #ifndef CONFIG_SYS_LS_MC_DPC_IN_DDR
455 #ifdef CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET
456 BUILD_BUG_ON((CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET & 0x3) != 0 ||
457 CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET > 0xffffffff);
459 mc_dpc_offset = CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET;
461 #error "CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET not defined"
465 * Load the MC DPC blob in the MC private DRAM block:
467 #ifdef CONFIG_SYS_LS_MC_DPC_IN_DDR
468 printf("MC DPC is preloaded to %#llx\n", mc_ram_addr + mc_dpc_offset);
471 * Get address and size of the DPC blob stored in flash:
473 dpc_fdt_hdr = (void *)mc_dpc_addr;
475 error = fdt_check_header(dpc_fdt_hdr);
478 * Don't return with error here, since the MC firmware can
479 * still boot without a DPC
481 printf("\nfsl-mc: WARNING: No DPC image found");
485 dpc_size = fdt_totalsize(dpc_fdt_hdr);
486 if (dpc_size > CONFIG_SYS_LS_MC_DPC_MAX_LENGTH) {
487 printf("\nfsl-mc: ERROR: Bad DPC image (too large: %d)\n",
492 mc_copy_image("MC DPC blob",
493 (u64)dpc_fdt_hdr, dpc_size, mc_ram_addr + mc_dpc_offset);
494 #endif /* not defined CONFIG_SYS_LS_MC_DPC_IN_DDR */
496 if (mc_fixup_dpc(mc_ram_addr + mc_dpc_offset))
499 dump_ram_words("DPC", (void *)(mc_ram_addr + mc_dpc_offset));
504 static int mc_fixup_dpl(u64 dpl_addr)
506 void *blob = (void *)dpl_addr;
507 u32 ver = fdt_getprop_u32_default(blob, "/", "dpl-version", 0);
510 /* The DPL fixup for mac addresses is only relevant
516 err = mc_fixup_mac_addrs(blob, MC_FIXUP_DPL);
517 flush_dcache_range(dpl_addr, dpl_addr + fdt_totalsize(blob));
522 static int load_mc_dpl(u64 mc_ram_addr, size_t mc_ram_size, u64 mc_dpl_addr)
525 #ifndef CONFIG_SYS_LS_MC_DPL_IN_DDR
531 #ifdef CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET
532 BUILD_BUG_ON((CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET & 0x3) != 0 ||
533 CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET > 0xffffffff);
535 mc_dpl_offset = CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET;
537 #error "CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET not defined"
541 * Load the MC DPL blob in the MC private DRAM block:
543 #ifdef CONFIG_SYS_LS_MC_DPL_IN_DDR
544 printf("MC DPL is preloaded to %#llx\n", mc_ram_addr + mc_dpl_offset);
547 * Get address and size of the DPL blob stored in flash:
549 dpl_fdt_hdr = (void *)mc_dpl_addr;
551 error = fdt_check_header(dpl_fdt_hdr);
553 printf("\nfsl-mc: ERROR: Bad DPL image (bad header)\n");
557 dpl_size = fdt_totalsize(dpl_fdt_hdr);
558 if (dpl_size > CONFIG_SYS_LS_MC_DPL_MAX_LENGTH) {
559 printf("\nfsl-mc: ERROR: Bad DPL image (too large: %d)\n",
564 mc_copy_image("MC DPL blob",
565 (u64)dpl_fdt_hdr, dpl_size, mc_ram_addr + mc_dpl_offset);
566 #endif /* not defined CONFIG_SYS_LS_MC_DPL_IN_DDR */
568 if (mc_fixup_dpl(mc_ram_addr + mc_dpl_offset))
570 dump_ram_words("DPL", (void *)(mc_ram_addr + mc_dpl_offset));
575 * Return the MC boot timeout value in milliseconds
577 static unsigned long get_mc_boot_timeout_ms(void)
579 unsigned long timeout_ms = CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS;
581 char *timeout_ms_env_var = env_get(MC_BOOT_TIMEOUT_ENV_VAR);
583 if (timeout_ms_env_var) {
584 timeout_ms = simple_strtoul(timeout_ms_env_var, NULL, 10);
585 if (timeout_ms == 0) {
586 printf("fsl-mc: WARNING: Invalid value for \'"
587 MC_BOOT_TIMEOUT_ENV_VAR
588 "\' environment variable: %lu\n",
591 timeout_ms = CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS;
598 #ifdef CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET
600 __weak bool soc_has_aiop(void)
605 static int load_mc_aiop_img(u64 aiop_fw_addr)
607 u64 mc_ram_addr = mc_get_dram_addr();
608 #ifndef CONFIG_SYS_LS_MC_DPC_IN_DDR
612 /* Check if AIOP is available */
616 * Load the MC AIOP image in the MC private DRAM block:
619 #ifdef CONFIG_SYS_LS_MC_DPC_IN_DDR
620 printf("MC AIOP is preloaded to %#llx\n", mc_ram_addr +
621 CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET);
623 aiop_img = (void *)aiop_fw_addr;
624 mc_copy_image("MC AIOP image",
625 (u64)aiop_img, CONFIG_SYS_LS_MC_AIOP_IMG_MAX_LENGTH,
626 mc_ram_addr + CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET);
634 static int wait_for_mc(bool booting_mc, u32 *final_reg_gsr)
637 u32 mc_fw_boot_status;
638 unsigned long timeout_ms = get_mc_boot_timeout_ms();
639 struct mc_ccsr_registers __iomem *mc_ccsr_regs = MC_CCSR_BASE_ADDR;
642 assert(timeout_ms > 0);
644 udelay(1000); /* throttle polling */
645 reg_gsr = in_le32(&mc_ccsr_regs->reg_gsr);
646 mc_fw_boot_status = (reg_gsr & GSR_FS_MASK);
647 if (mc_fw_boot_status & 0x1)
655 if (timeout_ms == 0) {
656 printf("ERROR: timeout\n");
658 /* TODO: Get an error status from an MC CCSR register */
662 if (mc_fw_boot_status != 0x1) {
664 * TODO: Identify critical errors from the GSR register's FS
665 * field and for those errors, set error to -ENODEV or other
666 * appropriate errno, so that the status property is set to
667 * failure in the fsl,dprc device tree node.
669 printf("WARNING: Firmware returned an error (GSR: %#x)\n",
676 *final_reg_gsr = reg_gsr;
680 int mc_init(u64 mc_fw_addr, u64 mc_dpc_addr)
684 struct mc_ccsr_registers __iomem *mc_ccsr_regs = MC_CCSR_BASE_ADDR;
685 u64 mc_ram_addr = mc_get_dram_addr();
688 #ifndef CONFIG_SYS_LS_MC_FW_IN_DDR
689 const void *raw_image_addr;
690 size_t raw_image_size = 0;
692 struct mc_version mc_ver_info;
693 u8 mc_ram_num_256mb_blocks;
694 size_t mc_ram_size = mc_get_dram_block_size();
696 mc_ram_num_256mb_blocks = mc_ram_size / MC_RAM_SIZE_ALIGNMENT;
698 if (mc_ram_num_256mb_blocks >= 0xff) {
700 printf("fsl-mc: ERROR: invalid MC private RAM size (%lu)\n",
706 * To support 128 MB DDR Size for MC
708 if (mc_ram_num_256mb_blocks == 0)
709 mc_ram_num_256mb_blocks = 0xFF;
712 * Management Complex cores should be held at reset out of POR.
713 * U-Boot should be the first software to touch MC. To be safe,
714 * we reset all cores again by setting GCR1 to 0. It doesn't do
715 * anything if they are held at reset. After we setup the firmware
716 * we kick off MC by deasserting the reset bit for core 0, and
717 * deasserting the reset bits for Command Portal Managers.
718 * The stop bits are not touched here. They are used to stop the
719 * cores when they are active. Setting stop bits doesn't stop the
720 * cores from fetching instructions when they are released from
723 out_le32(&mc_ccsr_regs->reg_gcr1, 0);
726 #ifdef CONFIG_SYS_LS_MC_FW_IN_DDR
727 printf("MC firmware is preloaded to %#llx\n", mc_ram_addr);
729 error = parse_mc_firmware_fit_image(mc_fw_addr, &raw_image_addr,
734 * Load the MC FW at the beginning of the MC private DRAM block:
736 mc_copy_image("MC Firmware",
737 (u64)raw_image_addr, raw_image_size, mc_ram_addr);
739 dump_ram_words("firmware", (void *)mc_ram_addr);
741 error = load_mc_dpc(mc_ram_addr, mc_ram_size, mc_dpc_addr);
745 debug("mc_ccsr_regs %p\n", mc_ccsr_regs);
746 dump_mc_ccsr_regs(mc_ccsr_regs);
749 * Tell MC what is the address range of the DRAM block assigned to it:
751 if (mc_ram_num_256mb_blocks < 0xFF) {
752 reg_mcfbalr = (u32)mc_ram_addr |
753 (mc_ram_num_256mb_blocks - 1);
755 reg_mcfbalr = (u32)mc_ram_addr |
756 (mc_ram_num_256mb_blocks);
759 out_le32(&mc_ccsr_regs->reg_mcfbalr, reg_mcfbalr);
760 out_le32(&mc_ccsr_regs->reg_mcfbahr,
761 (u32)(mc_ram_addr >> 32));
762 out_le32(&mc_ccsr_regs->reg_mcfapr, FSL_BYPASS_AMQ);
765 * Tell the MC that we want delayed DPL deployment.
767 out_le32(&mc_ccsr_regs->reg_gsr, 0xDD00);
769 printf("\nfsl-mc: Booting Management Complex ... ");
772 * Deassert reset and release MC core 0 to run
774 out_le32(&mc_ccsr_regs->reg_gcr1, GCR1_P1_DE_RST | GCR1_M_ALL_DE_RST);
775 error = wait_for_mc(true, ®_gsr);
780 * TODO: need to obtain the portal_id for the root container from the
786 * Initialize the global default MC portal
787 * And check that the MC firmware is responding portal commands:
789 root_mc_io = (struct fsl_mc_io *)calloc(sizeof(struct fsl_mc_io), 1);
791 printf(" No memory: calloc() failed\n");
795 root_mc_io->mmio_regs = SOC_MC_PORTAL_ADDR(portal_id);
796 debug("Checking access to MC portal of root DPRC container (portal_id %d, portal physical addr %p)\n",
797 portal_id, root_mc_io->mmio_regs);
799 error = mc_get_version(root_mc_io, MC_CMD_NO_FLAGS, &mc_ver_info);
801 printf("fsl-mc: ERROR: Firmware version check failed (error: %d)\n",
806 printf("fsl-mc: Management Complex booted (version: %d.%d.%d, boot status: %#x)\n",
807 mc_ver_info.major, mc_ver_info.minor, mc_ver_info.revision,
808 reg_gsr & GSR_FS_MASK);
812 mc_boot_status = error;
819 int mc_apply_dpl(u64 mc_dpl_addr)
821 struct mc_ccsr_registers __iomem *mc_ccsr_regs = MC_CCSR_BASE_ADDR;
824 u64 mc_ram_addr = mc_get_dram_addr();
825 size_t mc_ram_size = mc_get_dram_block_size();
830 error = load_mc_dpl(mc_ram_addr, mc_ram_size, mc_dpl_addr);
835 * Tell the MC to deploy the DPL:
837 out_le32(&mc_ccsr_regs->reg_gsr, 0x0);
838 printf("fsl-mc: Deploying data path layout ... ");
839 error = wait_for_mc(false, ®_gsr);
847 int get_mc_boot_status(void)
849 return mc_boot_status;
852 #ifdef CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET
853 int get_aiop_apply_status(void)
855 return mc_aiop_applied;
859 int get_dpl_apply_status(void)
861 return mc_dpl_applied;
864 int is_lazy_dpl_addr_valid(void)
866 return !!mc_lazy_dpl_addr;
870 * Return the MC address of private DRAM block.
871 * As per MC design document, MC initial base address
872 * should be least significant 512MB address of MC private
873 * memory, i.e. address should point to end address masked
874 * with 512MB offset in private DRAM block.
876 u64 mc_get_dram_addr(void)
878 size_t mc_ram_size = mc_get_dram_block_size();
880 if (!mc_memset_resv_ram || (get_mc_boot_status() < 0)) {
881 mc_memset_resv_ram = 1;
882 memset((void *)gd->arch.resv_ram, 0, mc_ram_size);
885 return (gd->arch.resv_ram + mc_ram_size - 1) &
886 MC_RAM_BASE_ADDR_ALIGNMENT_MASK;
890 * Return the actual size of the MC private DRAM block.
892 unsigned long mc_get_dram_block_size(void)
894 unsigned long dram_block_size = CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE;
896 char *dram_block_size_env_var = env_get(MC_MEM_SIZE_ENV_VAR);
898 if (dram_block_size_env_var) {
899 dram_block_size = simple_strtoul(dram_block_size_env_var, NULL,
902 if (dram_block_size < CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE) {
903 printf("fsl-mc: WARNING: Invalid value for \'"
905 "\' environment variable: %lu\n",
908 dram_block_size = MC_DRAM_BLOCK_DEFAULT_SIZE;
912 return dram_block_size;
915 int fsl_mc_ldpaa_init(bd_t *bis)
919 for (i = WRIOP1_DPMAC1; i < NUM_WRIOP_PORTS; i++)
920 if (wriop_is_enabled_dpmac(i) == 1)
921 ldpaa_eth_init(i, wriop_get_enet_if(i));
925 static int dprc_version_check(struct fsl_mc_io *mc_io, uint16_t handle)
928 uint16_t major_ver, minor_ver;
930 error = dprc_get_api_version(mc_io, 0,
934 printf("dprc_get_api_version() failed: %d\n", error);
938 if (major_ver < DPRC_VER_MAJOR || (major_ver == DPRC_VER_MAJOR &&
939 minor_ver < DPRC_VER_MINOR)) {
940 printf("DPRC version mismatch found %u.%u,",
941 major_ver, minor_ver);
942 printf("supported version is %u.%u\n",
943 DPRC_VER_MAJOR, DPRC_VER_MINOR);
949 static int dpio_init(void)
951 struct qbman_swp_desc p_des;
952 struct dpio_attr attr;
953 struct dpio_cfg dpio_cfg;
955 uint16_t major_ver, minor_ver;
957 dflt_dpio = (struct fsl_dpio_obj *)calloc(
958 sizeof(struct fsl_dpio_obj), 1);
960 printf("No memory: calloc() failed\n");
964 dpio_cfg.channel_mode = DPIO_LOCAL_CHANNEL;
965 dpio_cfg.num_priorities = 8;
967 err = dpio_create(dflt_mc_io,
971 &dflt_dpio->dpio_id);
973 printf("dpio_create() failed: %d\n", err);
978 err = dpio_get_api_version(dflt_mc_io, 0,
982 printf("dpio_get_api_version() failed: %d\n", err);
983 goto err_get_api_ver;
986 if (major_ver < DPIO_VER_MAJOR || (major_ver == DPIO_VER_MAJOR &&
987 minor_ver < DPIO_VER_MINOR)) {
988 printf("DPRC version mismatch found %u.%u,",
993 err = dpio_open(dflt_mc_io,
996 &dflt_dpio->dpio_handle);
998 printf("dpio_open() failed\n");
1002 memset(&attr, 0, sizeof(struct dpio_attr));
1003 err = dpio_get_attributes(dflt_mc_io, MC_CMD_NO_FLAGS,
1004 dflt_dpio->dpio_handle, &attr);
1006 printf("dpio_get_attributes() failed: %d\n", err);
1010 if (dflt_dpio->dpio_id != attr.id) {
1011 printf("dnpi object id and attribute id are not same\n");
1012 goto err_attr_not_same;
1016 printf("Init: DPIO id=0x%d\n", dflt_dpio->dpio_id);
1018 err = dpio_enable(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpio->dpio_handle);
1020 printf("dpio_enable() failed %d\n", err);
1021 goto err_get_enable;
1023 debug("ce_offset=0x%llx, ci_offset=0x%llx, portalid=%d, prios=%d\n",
1024 attr.qbman_portal_ce_offset,
1025 attr.qbman_portal_ci_offset,
1026 attr.qbman_portal_id,
1027 attr.num_priorities);
1029 p_des.cena_bar = (void *)(SOC_QBMAN_PORTALS_BASE_ADDR
1030 + attr.qbman_portal_ce_offset);
1031 p_des.cinh_bar = (void *)(SOC_QBMAN_PORTALS_BASE_ADDR
1032 + attr.qbman_portal_ci_offset);
1034 dflt_dpio->sw_portal = qbman_swp_init(&p_des);
1035 if (dflt_dpio->sw_portal == NULL) {
1036 printf("qbman_swp_init() failed\n");
1037 goto err_get_swp_init;
1042 dpio_disable(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpio->dpio_handle);
1046 dpio_close(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpio->dpio_handle);
1049 dpio_destroy(dflt_mc_io,
1052 dflt_dpio->dpio_id);
1059 static int dpio_exit(void)
1063 err = dpio_disable(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpio->dpio_handle);
1065 printf("dpio_disable() failed: %d\n", err);
1069 dpio_close(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpio->dpio_handle);
1071 printf("dpio_close() failed: %d\n", err);
1075 err = dpio_destroy(dflt_mc_io,
1078 dflt_dpio->dpio_id);
1080 printf("dpio_destroy() failed: %d\n", err);
1085 printf("Exit: DPIO id=0x%d\n", dflt_dpio->dpio_id);
1096 static int dprc_init(void)
1098 int err, child_portal_id, container_id;
1099 struct dprc_cfg cfg;
1100 uint64_t mc_portal_offset;
1102 /* Open root container */
1103 err = dprc_get_container_id(root_mc_io, MC_CMD_NO_FLAGS, &container_id);
1105 printf("dprc_get_container_id(): Root failed: %d\n", err);
1106 goto err_root_container_id;
1110 printf("Root container id = %d\n", container_id);
1112 err = dprc_open(root_mc_io, MC_CMD_NO_FLAGS, container_id,
1115 printf("dprc_open(): Root Container failed: %d\n", err);
1119 if (!root_dprc_handle) {
1120 printf("dprc_open(): Root Container Handle is not valid\n");
1124 err = dprc_version_check(root_mc_io, root_dprc_handle);
1126 printf("dprc_version_check() failed: %d\n", err);
1130 memset(&cfg, 0, sizeof(struct dprc_cfg));
1131 cfg.options = DPRC_CFG_OPT_TOPOLOGY_CHANGES_ALLOWED |
1132 DPRC_CFG_OPT_OBJ_CREATE_ALLOWED |
1133 DPRC_CFG_OPT_ALLOC_ALLOWED;
1134 cfg.icid = DPRC_GET_ICID_FROM_POOL;
1135 cfg.portal_id = DPRC_GET_PORTAL_ID_FROM_POOL;
1136 err = dprc_create_container(root_mc_io, MC_CMD_NO_FLAGS,
1142 printf("dprc_create_container() failed: %d\n", err);
1146 dflt_mc_io = (struct fsl_mc_io *)calloc(sizeof(struct fsl_mc_io), 1);
1149 printf(" No memory: calloc() failed\n");
1153 child_portal_id = MC_PORTAL_OFFSET_TO_PORTAL_ID(mc_portal_offset);
1154 dflt_mc_io->mmio_regs = SOC_MC_PORTAL_ADDR(child_portal_id);
1157 printf("MC portal of child DPRC container: %d, physical addr %p)\n",
1158 child_dprc_id, dflt_mc_io->mmio_regs);
1161 err = dprc_open(dflt_mc_io, MC_CMD_NO_FLAGS, child_dprc_id,
1164 printf("dprc_open(): Child container failed: %d\n", err);
1165 goto err_child_open;
1168 if (!dflt_dprc_handle) {
1169 printf("dprc_open(): Child container Handle is not valid\n");
1170 goto err_child_open;
1177 dprc_destroy_container(root_mc_io, MC_CMD_NO_FLAGS,
1178 root_dprc_handle, child_dprc_id);
1180 dprc_close(root_mc_io, MC_CMD_NO_FLAGS, root_dprc_handle);
1182 err_root_container_id:
1186 static int dprc_exit(void)
1190 err = dprc_close(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dprc_handle);
1192 printf("dprc_close(): Child failed: %d\n", err);
1196 err = dprc_destroy_container(root_mc_io, MC_CMD_NO_FLAGS,
1197 root_dprc_handle, child_dprc_id);
1199 printf("dprc_destroy_container() failed: %d\n", err);
1203 err = dprc_close(root_mc_io, MC_CMD_NO_FLAGS, root_dprc_handle);
1205 printf("dprc_close(): Root failed: %d\n", err);
1221 static int dpbp_init(void)
1224 struct dpbp_attr dpbp_attr;
1225 struct dpbp_cfg dpbp_cfg;
1226 uint16_t major_ver, minor_ver;
1228 dflt_dpbp = (struct fsl_dpbp_obj *)calloc(
1229 sizeof(struct fsl_dpbp_obj), 1);
1231 printf("No memory: calloc() failed\n");
1236 dpbp_cfg.options = 512;
1238 err = dpbp_create(dflt_mc_io,
1242 &dflt_dpbp->dpbp_id);
1246 printf("dpbp_create() failed: %d\n", err);
1250 err = dpbp_get_api_version(dflt_mc_io, 0,
1254 printf("dpbp_get_api_version() failed: %d\n", err);
1255 goto err_get_api_ver;
1258 if (major_ver < DPBP_VER_MAJOR || (major_ver == DPBP_VER_MAJOR &&
1259 minor_ver < DPBP_VER_MINOR)) {
1260 printf("DPBP version mismatch found %u.%u,",
1261 major_ver, minor_ver);
1262 printf("supported version is %u.%u\n",
1263 DPBP_VER_MAJOR, DPBP_VER_MINOR);
1266 err = dpbp_open(dflt_mc_io,
1269 &dflt_dpbp->dpbp_handle);
1271 printf("dpbp_open() failed\n");
1275 memset(&dpbp_attr, 0, sizeof(struct dpbp_attr));
1276 err = dpbp_get_attributes(dflt_mc_io, MC_CMD_NO_FLAGS,
1277 dflt_dpbp->dpbp_handle,
1280 printf("dpbp_get_attributes() failed: %d\n", err);
1284 if (dflt_dpbp->dpbp_id != dpbp_attr.id) {
1285 printf("dpbp object id and attribute id are not same\n");
1286 goto err_attr_not_same;
1290 printf("Init: DPBP id=0x%x\n", dflt_dpbp->dpbp_attr.id);
1293 err = dpbp_close(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpbp->dpbp_handle);
1295 printf("dpbp_close() failed: %d\n", err);
1303 dpbp_close(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpbp->dpbp_handle);
1304 dpbp_destroy(dflt_mc_io,
1307 dflt_dpbp->dpbp_id);
1317 static int dpbp_exit(void)
1321 err = dpbp_destroy(dflt_mc_io, dflt_dprc_handle, MC_CMD_NO_FLAGS,
1322 dflt_dpbp->dpbp_id);
1324 printf("dpbp_destroy() failed: %d\n", err);
1329 printf("Exit: DPBP id=0x%d\n", dflt_dpbp->dpbp_attr.id);
1340 static int dpni_init(void)
1343 uint8_t cfg_buf[256] = {0};
1344 struct dpni_cfg dpni_cfg;
1345 uint16_t major_ver, minor_ver;
1347 dflt_dpni = (struct fsl_dpni_obj *)calloc(
1348 sizeof(struct fsl_dpni_obj), 1);
1350 printf("No memory: calloc() failed\n");
1355 memset(&dpni_cfg, 0, sizeof(dpni_cfg));
1356 err = dpni_prepare_cfg(&dpni_cfg, &cfg_buf[0]);
1359 printf("dpni_prepare_cfg() failed: %d\n", err);
1360 goto err_prepare_cfg;
1363 err = dpni_create(dflt_mc_io,
1367 &dflt_dpni->dpni_id);
1370 printf("dpni create() failed: %d\n", err);
1374 err = dpni_get_api_version(dflt_mc_io, 0,
1378 printf("dpni_get_api_version() failed: %d\n", err);
1379 goto err_get_version;
1382 if (major_ver < DPNI_VER_MAJOR || (major_ver == DPNI_VER_MAJOR &&
1383 minor_ver < DPNI_VER_MINOR)) {
1384 printf("DPNI version mismatch found %u.%u,",
1385 major_ver, minor_ver);
1386 printf("supported version is %u.%u\n",
1387 DPNI_VER_MAJOR, DPNI_VER_MINOR);
1390 err = dpni_open(dflt_mc_io,
1393 &dflt_dpni->dpni_handle);
1395 printf("dpni_open() failed\n");
1400 printf("Init: DPNI id=0x%d\n", dflt_dpni->dpni_id);
1402 err = dpni_close(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpni->dpni_handle);
1404 printf("dpni_close() failed: %d\n", err);
1411 dpni_close(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpni->dpni_handle);
1414 dpni_destroy(dflt_mc_io,
1417 dflt_dpni->dpni_id);
1425 static int dpni_exit(void)
1429 err = dpni_destroy(dflt_mc_io, dflt_dprc_handle, MC_CMD_NO_FLAGS,
1430 dflt_dpni->dpni_id);
1432 printf("dpni_destroy() failed: %d\n", err);
1437 printf("Exit: DPNI id=0x%d\n", dflt_dpni->dpni_id);
1448 static int mc_init_object(void)
1454 printf("dprc_init() failed: %d\n", err);
1460 printf("dpbp_init() failed: %d\n", err);
1466 printf("dpio_init() failed: %d\n", err);
1472 printf("dpni_init() failed: %d\n", err);
1481 int fsl_mc_ldpaa_exit(bd_t *bd)
1484 bool is_dpl_apply_status = false;
1485 bool mc_boot_status = false;
1487 if (bd && mc_lazy_dpl_addr && !fsl_mc_ldpaa_exit(NULL)) {
1488 err = mc_apply_dpl(mc_lazy_dpl_addr);
1490 fdt_fixup_board_enet(working_fdt);
1491 mc_lazy_dpl_addr = 0;
1494 if (!get_mc_boot_status())
1495 mc_boot_status = true;
1497 /* MC is not loaded intentionally, So return success. */
1498 if (bd && !mc_boot_status)
1501 /* If DPL is deployed, set is_dpl_apply_status as TRUE. */
1502 if (!get_dpl_apply_status())
1503 is_dpl_apply_status = true;
1506 * For case MC is loaded but DPL is not deployed, return success and
1507 * print message on console. Else FDT fix-up code execution hanged.
1509 if (bd && mc_boot_status && !is_dpl_apply_status) {
1510 printf("fsl-mc: DPL not deployed, DPAA2 ethernet not work\n");
1511 goto mc_obj_cleanup;
1514 if (bd && mc_boot_status && is_dpl_apply_status)
1520 printf("dpbp_exit() failed: %d\n", err);
1526 printf("dpio_exit() failed: %d\n", err);
1532 printf("dpni_exit() failed: %d\n", err);
1538 printf("dprc_exit() failed: %d\n", err);
1547 static int do_fsl_mc(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
1553 switch (argv[1][0]) {
1556 u64 mc_fw_addr, mc_dpc_addr;
1557 #ifdef CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET
1561 sub_cmd = argv[2][0];
1568 if (get_mc_boot_status() == 0) {
1569 printf("fsl-mc: MC is already booted");
1573 mc_fw_addr = simple_strtoull(argv[3], NULL, 16);
1574 mc_dpc_addr = simple_strtoull(argv[4], NULL,
1577 if (!mc_init(mc_fw_addr, mc_dpc_addr))
1578 err = mc_init_object();
1581 #ifdef CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET
1585 if (get_aiop_apply_status() == 0) {
1586 printf("fsl-mc: AIOP FW is already");
1587 printf(" applied\n");
1591 aiop_fw_addr = simple_strtoull(argv[3], NULL,
1594 /* if SoC doesn't have AIOP, err = -ENODEV */
1595 err = load_mc_aiop_img(aiop_fw_addr);
1597 printf("fsl-mc: AIOP FW applied\n");
1601 printf("Invalid option: %s\n", argv[2]);
1616 if (get_dpl_apply_status() == 0) {
1617 printf("fsl-mc: DPL already applied\n");
1621 mc_dpl_addr = simple_strtoull(argv[3], NULL,
1624 if (get_mc_boot_status() != 0) {
1625 printf("fsl-mc: Deploying data path layout ..");
1626 printf("ERROR (MC is not booted)\n");
1630 if (argv[1][0] == 'l') {
1632 * We will do the actual dpaa exit and dpl apply
1633 * later from announce_and_cleanup().
1635 mc_lazy_dpl_addr = mc_dpl_addr;
1637 /* The user wants it applied now */
1638 if (!fsl_mc_ldpaa_exit(NULL))
1639 err = mc_apply_dpl(mc_dpl_addr);
1644 printf("Invalid option: %s\n", argv[1]);
1650 return CMD_RET_USAGE;
1654 fsl_mc, CONFIG_SYS_MAXARGS, 1, do_fsl_mc,
1655 "DPAA2 command to manage Management Complex (MC)",
1656 "start mc [FW_addr] [DPC_addr] - Start Management Complex\n"
1657 "fsl_mc apply DPL [DPL_addr] - Apply DPL file\n"
1658 "fsl_mc lazyapply DPL [DPL_addr] - Apply DPL file on exit\n"
1659 "fsl_mc start aiop [FW_addr] - Start AIOP\n"
1662 void mc_env_boot(void)
1664 #if defined(CONFIG_FSL_MC_ENET)
1665 char *mc_boot_env_var;
1666 /* The MC may only be initialized in the reset PHY function
1667 * because otherwise U-Boot has not yet set up all the MAC
1668 * address info properly. Without MAC addresses, the MC code
1669 * can not properly initialize the DPC.
1671 mc_boot_env_var = env_get(MC_BOOT_ENV_VAR);
1672 if (mc_boot_env_var)
1673 run_command_list(mc_boot_env_var, -1, 0);
1674 #endif /* CONFIG_FSL_MC_ENET */