3 * This is a driver for SMSC's LAN911{5,6,7,8} single-chip Ethernet devices.
5 * Copyright (C) 2005 Sensoria Corp
6 * Derived from the unified SMC91x driver by Nicolas Pitre
7 * and the smsc911x.c reference driver by SMSC
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
24 * watchdog = TX watchdog timeout
25 * tx_fifo_kb = Size of TX FIFO in KB
28 * 04/16/05 Dustin McIntire Initial version
30 static const char version[] =
31 "smc911x.c: v1.0 04-16-2005 by Dustin McIntire <dustin@sensoria.com>\n";
33 /* Debugging options */
34 #define ENABLE_SMC_DEBUG_RX 0
35 #define ENABLE_SMC_DEBUG_TX 0
36 #define ENABLE_SMC_DEBUG_DMA 0
37 #define ENABLE_SMC_DEBUG_PKTS 0
38 #define ENABLE_SMC_DEBUG_MISC 0
39 #define ENABLE_SMC_DEBUG_FUNC 0
41 #define SMC_DEBUG_RX ((ENABLE_SMC_DEBUG_RX ? 1 : 0) << 0)
42 #define SMC_DEBUG_TX ((ENABLE_SMC_DEBUG_TX ? 1 : 0) << 1)
43 #define SMC_DEBUG_DMA ((ENABLE_SMC_DEBUG_DMA ? 1 : 0) << 2)
44 #define SMC_DEBUG_PKTS ((ENABLE_SMC_DEBUG_PKTS ? 1 : 0) << 3)
45 #define SMC_DEBUG_MISC ((ENABLE_SMC_DEBUG_MISC ? 1 : 0) << 4)
46 #define SMC_DEBUG_FUNC ((ENABLE_SMC_DEBUG_FUNC ? 1 : 0) << 5)
49 #define SMC_DEBUG ( SMC_DEBUG_RX | \
58 #include <linux/init.h>
59 #include <linux/module.h>
60 #include <linux/kernel.h>
61 #include <linux/sched.h>
62 #include <linux/delay.h>
63 #include <linux/interrupt.h>
64 #include <linux/errno.h>
65 #include <linux/ioport.h>
66 #include <linux/crc32.h>
67 #include <linux/device.h>
68 #include <linux/platform_device.h>
69 #include <linux/spinlock.h>
70 #include <linux/ethtool.h>
71 #include <linux/mii.h>
72 #include <linux/workqueue.h>
74 #include <linux/netdevice.h>
75 #include <linux/etherdevice.h>
76 #include <linux/skbuff.h>
83 * Transmit timeout, default 5 seconds.
85 static int watchdog = 5000;
86 module_param(watchdog, int, 0400);
87 MODULE_PARM_DESC(watchdog, "transmit timeout in milliseconds");
89 static int tx_fifo_kb=8;
90 module_param(tx_fifo_kb, int, 0400);
91 MODULE_PARM_DESC(tx_fifo_kb,"transmit FIFO size in KB (1<x<15)(default=8)");
93 MODULE_LICENSE("GPL");
94 MODULE_ALIAS("platform:smc911x");
97 * The internal workings of the driver. If you are changing anything
98 * here with the SMC stuff, you should have the datasheet and know
101 #define CARDNAME "smc911x"
104 * Use power-down feature of the chip
109 #define DBG(n, dev, args...) \
111 if (SMC_DEBUG & (n)) \
112 netdev_dbg(dev, args); \
115 #define PRINTK(dev, args...) netdev_info(dev, args)
117 #define DBG(n, dev, args...) do { } while (0)
118 #define PRINTK(dev, args...) netdev_dbg(dev, args)
121 #if SMC_DEBUG_PKTS > 0
122 static void PRINT_PKT(u_char *buf, int length)
129 remainder = length % 16;
131 for (i = 0; i < lines ; i ++) {
134 for (cur = 0; cur < 8; cur++) {
138 pr_cont("%02x%02x ", a, b);
143 for (i = 0; i < remainder/2 ; i++) {
147 pr_cont("%02x%02x ", a, b);
152 #define PRINT_PKT(x...) do { } while (0)
156 /* this enables an interrupt in the interrupt mask register */
157 #define SMC_ENABLE_INT(lp, x) do { \
158 unsigned int __mask; \
159 __mask = SMC_GET_INT_EN((lp)); \
161 SMC_SET_INT_EN((lp), __mask); \
164 /* this disables an interrupt from the interrupt mask register */
165 #define SMC_DISABLE_INT(lp, x) do { \
166 unsigned int __mask; \
167 __mask = SMC_GET_INT_EN((lp)); \
169 SMC_SET_INT_EN((lp), __mask); \
173 * this does a soft reset on the device
175 static void smc911x_reset(struct net_device *dev)
177 struct smc911x_local *lp = netdev_priv(dev);
178 unsigned int reg, timeout=0, resets=1, irq_cfg;
181 DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
183 /* Take out of PM setting first */
184 if ((SMC_GET_PMT_CTRL(lp) & PMT_CTRL_READY_) == 0) {
185 /* Write to the bytetest will take out of powerdown */
186 SMC_SET_BYTE_TEST(lp, 0);
190 reg = SMC_GET_PMT_CTRL(lp) & PMT_CTRL_READY_;
191 } while (--timeout && !reg);
193 PRINTK(dev, "smc911x_reset timeout waiting for PM restore\n");
198 /* Disable all interrupts */
199 spin_lock_irqsave(&lp->lock, flags);
200 SMC_SET_INT_EN(lp, 0);
201 spin_unlock_irqrestore(&lp->lock, flags);
204 SMC_SET_HW_CFG(lp, HW_CFG_SRST_);
208 reg = SMC_GET_HW_CFG(lp);
209 /* If chip indicates reset timeout then try again */
210 if (reg & HW_CFG_SRST_TO_) {
211 PRINTK(dev, "chip reset timeout, retrying...\n");
215 } while (--timeout && (reg & HW_CFG_SRST_));
218 PRINTK(dev, "smc911x_reset timeout waiting for reset\n");
222 /* make sure EEPROM has finished loading before setting GPIO_CFG */
224 while (--timeout && (SMC_GET_E2P_CMD(lp) & E2P_CMD_EPC_BUSY_))
228 PRINTK(dev, "smc911x_reset timeout waiting for EEPROM busy\n");
232 /* Initialize interrupts */
233 SMC_SET_INT_EN(lp, 0);
236 /* Reset the FIFO level and flow control settings */
237 SMC_SET_HW_CFG(lp, (lp->tx_fifo_kb & 0xF) << 16);
238 //TODO: Figure out what appropriate pause time is
239 SMC_SET_FLOW(lp, FLOW_FCPT_ | FLOW_FCEN_);
240 SMC_SET_AFC_CFG(lp, lp->afc_cfg);
243 /* Set to LED outputs */
244 SMC_SET_GPIO_CFG(lp, 0x70070000);
247 * Deassert IRQ for 1*10us for edge type interrupts
248 * and drive IRQ pin push-pull
250 irq_cfg = (1 << 24) | INT_CFG_IRQ_EN_ | INT_CFG_IRQ_TYPE_;
251 #ifdef SMC_DYNAMIC_BUS_CONFIG
252 if (lp->cfg.irq_polarity)
253 irq_cfg |= INT_CFG_IRQ_POL_;
255 SMC_SET_IRQ_CFG(lp, irq_cfg);
257 /* clear anything saved */
258 if (lp->pending_tx_skb != NULL) {
259 dev_kfree_skb (lp->pending_tx_skb);
260 lp->pending_tx_skb = NULL;
261 dev->stats.tx_errors++;
262 dev->stats.tx_aborted_errors++;
267 * Enable Interrupts, Receive, and Transmit
269 static void smc911x_enable(struct net_device *dev)
271 struct smc911x_local *lp = netdev_priv(dev);
272 unsigned mask, cfg, cr;
275 DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
277 spin_lock_irqsave(&lp->lock, flags);
279 SMC_SET_MAC_ADDR(lp, dev->dev_addr);
282 cfg = SMC_GET_HW_CFG(lp);
283 cfg &= HW_CFG_TX_FIF_SZ_ | 0xFFF;
285 SMC_SET_HW_CFG(lp, cfg);
286 SMC_SET_FIFO_TDA(lp, 0xFF);
287 /* Update TX stats on every 64 packets received or every 1 sec */
288 SMC_SET_FIFO_TSL(lp, 64);
289 SMC_SET_GPT_CFG(lp, GPT_CFG_TIMER_EN_ | 10000);
291 SMC_GET_MAC_CR(lp, cr);
292 cr |= MAC_CR_TXEN_ | MAC_CR_HBDIS_;
293 SMC_SET_MAC_CR(lp, cr);
294 SMC_SET_TX_CFG(lp, TX_CFG_TX_ON_);
296 /* Add 2 byte padding to start of packets */
297 SMC_SET_RX_CFG(lp, (2<<8) & RX_CFG_RXDOFF_);
299 /* Turn on receiver and enable RX */
300 if (cr & MAC_CR_RXEN_)
301 DBG(SMC_DEBUG_RX, dev, "Receiver already enabled\n");
303 SMC_SET_MAC_CR(lp, cr | MAC_CR_RXEN_);
305 /* Interrupt on every received packet */
306 SMC_SET_FIFO_RSA(lp, 0x01);
307 SMC_SET_FIFO_RSL(lp, 0x00);
309 /* now, enable interrupts */
310 mask = INT_EN_TDFA_EN_ | INT_EN_TSFL_EN_ | INT_EN_RSFL_EN_ |
311 INT_EN_GPT_INT_EN_ | INT_EN_RXDFH_INT_EN_ | INT_EN_RXE_EN_ |
313 if (IS_REV_A(lp->revision))
314 mask|=INT_EN_RDFL_EN_;
316 mask|=INT_EN_RDFO_EN_;
318 SMC_ENABLE_INT(lp, mask);
320 spin_unlock_irqrestore(&lp->lock, flags);
324 * this puts the device in an inactive state
326 static void smc911x_shutdown(struct net_device *dev)
328 struct smc911x_local *lp = netdev_priv(dev);
332 DBG(SMC_DEBUG_FUNC, dev, "%s: --> %s\n", CARDNAME, __func__);
335 SMC_SET_INT_EN(lp, 0);
337 /* Turn of Rx and TX */
338 spin_lock_irqsave(&lp->lock, flags);
339 SMC_GET_MAC_CR(lp, cr);
340 cr &= ~(MAC_CR_TXEN_ | MAC_CR_RXEN_ | MAC_CR_HBDIS_);
341 SMC_SET_MAC_CR(lp, cr);
342 SMC_SET_TX_CFG(lp, TX_CFG_STOP_TX_);
343 spin_unlock_irqrestore(&lp->lock, flags);
346 static inline void smc911x_drop_pkt(struct net_device *dev)
348 struct smc911x_local *lp = netdev_priv(dev);
349 unsigned int fifo_count, timeout, reg;
351 DBG(SMC_DEBUG_FUNC | SMC_DEBUG_RX, dev, "%s: --> %s\n",
353 fifo_count = SMC_GET_RX_FIFO_INF(lp) & 0xFFFF;
354 if (fifo_count <= 4) {
355 /* Manually dump the packet data */
359 /* Fast forward through the bad packet */
360 SMC_SET_RX_DP_CTRL(lp, RX_DP_CTRL_FFWD_BUSY_);
364 reg = SMC_GET_RX_DP_CTRL(lp) & RX_DP_CTRL_FFWD_BUSY_;
365 } while (--timeout && reg);
367 PRINTK(dev, "timeout waiting for RX fast forward\n");
373 * This is the procedure to handle the receipt of a packet.
374 * It should be called after checking for packet presence in
375 * the RX status FIFO. It must be called with the spin lock
378 static inline void smc911x_rcv(struct net_device *dev)
380 struct smc911x_local *lp = netdev_priv(dev);
381 unsigned int pkt_len, status;
385 DBG(SMC_DEBUG_FUNC | SMC_DEBUG_RX, dev, "--> %s\n",
387 status = SMC_GET_RX_STS_FIFO(lp);
388 DBG(SMC_DEBUG_RX, dev, "Rx pkt len %d status 0x%08x\n",
389 (status & 0x3fff0000) >> 16, status & 0xc000ffff);
390 pkt_len = (status & RX_STS_PKT_LEN_) >> 16;
391 if (status & RX_STS_ES_) {
392 /* Deal with a bad packet */
393 dev->stats.rx_errors++;
394 if (status & RX_STS_CRC_ERR_)
395 dev->stats.rx_crc_errors++;
397 if (status & RX_STS_LEN_ERR_)
398 dev->stats.rx_length_errors++;
399 if (status & RX_STS_MCAST_)
400 dev->stats.multicast++;
402 /* Remove the bad packet data from the RX FIFO */
403 smc911x_drop_pkt(dev);
405 /* Receive a valid packet */
406 /* Alloc a buffer with extra room for DMA alignment */
407 skb = netdev_alloc_skb(dev, pkt_len+32);
408 if (unlikely(skb == NULL)) {
409 PRINTK(dev, "Low memory, rcvd packet dropped.\n");
410 dev->stats.rx_dropped++;
411 smc911x_drop_pkt(dev);
414 /* Align IP header to 32 bits
415 * Note that the device is configured to add a 2
416 * byte padding to the packet start, so we really
417 * want to write to the orignal data pointer */
420 skb_put(skb,pkt_len-4);
424 /* Lower the FIFO threshold if possible */
425 fifo = SMC_GET_FIFO_INT(lp);
426 if (fifo & 0xFF) fifo--;
427 DBG(SMC_DEBUG_RX, dev, "Setting RX stat FIFO threshold to %d\n",
429 SMC_SET_FIFO_INT(lp, fifo);
431 SMC_SET_RX_CFG(lp, RX_CFG_RX_END_ALGN16_ | ((2<<8) & RX_CFG_RXDOFF_));
432 lp->rxdma_active = 1;
433 lp->current_rx_skb = skb;
434 SMC_PULL_DATA(lp, data, (pkt_len+2+15) & ~15);
435 /* Packet processing deferred to DMA RX interrupt */
438 SMC_SET_RX_CFG(lp, RX_CFG_RX_END_ALGN4_ | ((2<<8) & RX_CFG_RXDOFF_));
439 SMC_PULL_DATA(lp, data, pkt_len+2+3);
441 DBG(SMC_DEBUG_PKTS, dev, "Received packet\n");
442 PRINT_PKT(data, ((pkt_len - 4) <= 64) ? pkt_len - 4 : 64);
443 skb->protocol = eth_type_trans(skb, dev);
445 dev->stats.rx_packets++;
446 dev->stats.rx_bytes += pkt_len-4;
452 * This is called to actually send a packet to the chip.
454 static void smc911x_hardware_send_pkt(struct net_device *dev)
456 struct smc911x_local *lp = netdev_priv(dev);
458 unsigned int cmdA, cmdB, len;
461 DBG(SMC_DEBUG_FUNC | SMC_DEBUG_TX, dev, "--> %s\n", __func__);
462 BUG_ON(lp->pending_tx_skb == NULL);
464 skb = lp->pending_tx_skb;
465 lp->pending_tx_skb = NULL;
467 /* cmdA {25:24] data alignment [20:16] start offset [10:0] buffer length */
468 /* cmdB {31:16] pkt tag [10:0] length */
470 /* 16 byte buffer alignment mode */
471 buf = (char*)((u32)(skb->data) & ~0xF);
472 len = (skb->len + 0xF + ((u32)skb->data & 0xF)) & ~0xF;
473 cmdA = (1<<24) | (((u32)skb->data & 0xF)<<16) |
474 TX_CMD_A_INT_FIRST_SEG_ | TX_CMD_A_INT_LAST_SEG_ |
477 buf = (char*)((u32)skb->data & ~0x3);
478 len = (skb->len + 3 + ((u32)skb->data & 3)) & ~0x3;
479 cmdA = (((u32)skb->data & 0x3) << 16) |
480 TX_CMD_A_INT_FIRST_SEG_ | TX_CMD_A_INT_LAST_SEG_ |
483 /* tag is packet length so we can use this in stats update later */
484 cmdB = (skb->len << 16) | (skb->len & 0x7FF);
486 DBG(SMC_DEBUG_TX, dev, "TX PKT LENGTH 0x%04x (%d) BUF 0x%p CMDA 0x%08x CMDB 0x%08x\n",
487 len, len, buf, cmdA, cmdB);
488 SMC_SET_TX_FIFO(lp, cmdA);
489 SMC_SET_TX_FIFO(lp, cmdB);
491 DBG(SMC_DEBUG_PKTS, dev, "Transmitted packet\n");
492 PRINT_PKT(buf, len <= 64 ? len : 64);
494 /* Send pkt via PIO or DMA */
496 lp->current_tx_skb = skb;
497 SMC_PUSH_DATA(lp, buf, len);
498 /* DMA complete IRQ will free buffer and set jiffies */
500 SMC_PUSH_DATA(lp, buf, len);
501 dev->trans_start = jiffies;
502 dev_kfree_skb_irq(skb);
504 if (!lp->tx_throttle) {
505 netif_wake_queue(dev);
507 SMC_ENABLE_INT(lp, INT_EN_TDFA_EN_ | INT_EN_TSFL_EN_);
511 * Since I am not sure if I will have enough room in the chip's ram
512 * to store the packet, I call this routine which either sends it
513 * now, or set the card to generates an interrupt when ready
516 static int smc911x_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
518 struct smc911x_local *lp = netdev_priv(dev);
522 DBG(SMC_DEBUG_FUNC | SMC_DEBUG_TX, dev, "--> %s\n",
525 spin_lock_irqsave(&lp->lock, flags);
527 BUG_ON(lp->pending_tx_skb != NULL);
529 free = SMC_GET_TX_FIFO_INF(lp) & TX_FIFO_INF_TDFREE_;
530 DBG(SMC_DEBUG_TX, dev, "TX free space %d\n", free);
532 /* Turn off the flow when running out of space in FIFO */
533 if (free <= SMC911X_TX_FIFO_LOW_THRESHOLD) {
534 DBG(SMC_DEBUG_TX, dev, "Disabling data flow due to low FIFO space (%d)\n",
536 /* Reenable when at least 1 packet of size MTU present */
537 SMC_SET_FIFO_TDA(lp, (SMC911X_TX_FIFO_LOW_THRESHOLD)/64);
539 netif_stop_queue(dev);
542 /* Drop packets when we run out of space in TX FIFO
543 * Account for overhead required for:
545 * Tx command words 8 bytes
546 * Start offset 15 bytes
547 * End padding 15 bytes
549 if (unlikely(free < (skb->len + 8 + 15 + 15))) {
550 netdev_warn(dev, "No Tx free space %d < %d\n",
552 lp->pending_tx_skb = NULL;
553 dev->stats.tx_errors++;
554 dev->stats.tx_dropped++;
555 spin_unlock_irqrestore(&lp->lock, flags);
562 /* If the DMA is already running then defer this packet Tx until
563 * the DMA IRQ starts it
565 if (lp->txdma_active) {
566 DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, dev, "Tx DMA running, deferring packet\n");
567 lp->pending_tx_skb = skb;
568 netif_stop_queue(dev);
569 spin_unlock_irqrestore(&lp->lock, flags);
572 DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, dev, "Activating Tx DMA\n");
573 lp->txdma_active = 1;
577 lp->pending_tx_skb = skb;
578 smc911x_hardware_send_pkt(dev);
579 spin_unlock_irqrestore(&lp->lock, flags);
585 * This handles a TX status interrupt, which is only called when:
586 * - a TX error occurred, or
587 * - TX of a packet completed.
589 static void smc911x_tx(struct net_device *dev)
591 struct smc911x_local *lp = netdev_priv(dev);
592 unsigned int tx_status;
594 DBG(SMC_DEBUG_FUNC | SMC_DEBUG_TX, dev, "--> %s\n",
597 /* Collect the TX status */
598 while (((SMC_GET_TX_FIFO_INF(lp) & TX_FIFO_INF_TSUSED_) >> 16) != 0) {
599 DBG(SMC_DEBUG_TX, dev, "Tx stat FIFO used 0x%04x\n",
600 (SMC_GET_TX_FIFO_INF(lp) & TX_FIFO_INF_TSUSED_) >> 16);
601 tx_status = SMC_GET_TX_STS_FIFO(lp);
602 dev->stats.tx_packets++;
603 dev->stats.tx_bytes+=tx_status>>16;
604 DBG(SMC_DEBUG_TX, dev, "Tx FIFO tag 0x%04x status 0x%04x\n",
605 (tx_status & 0xffff0000) >> 16,
606 tx_status & 0x0000ffff);
607 /* count Tx errors, but ignore lost carrier errors when in
608 * full-duplex mode */
609 if ((tx_status & TX_STS_ES_) && !(lp->ctl_rfduplx &&
610 !(tx_status & 0x00000306))) {
611 dev->stats.tx_errors++;
613 if (tx_status & TX_STS_MANY_COLL_) {
614 dev->stats.collisions+=16;
615 dev->stats.tx_aborted_errors++;
617 dev->stats.collisions+=(tx_status & TX_STS_COLL_CNT_) >> 3;
619 /* carrier error only has meaning for half-duplex communication */
620 if ((tx_status & (TX_STS_LOC_ | TX_STS_NO_CARR_)) &&
622 dev->stats.tx_carrier_errors++;
624 if (tx_status & TX_STS_LATE_COLL_) {
625 dev->stats.collisions++;
626 dev->stats.tx_aborted_errors++;
632 /*---PHY CONTROL AND CONFIGURATION-----------------------------------------*/
634 * Reads a register from the MII Management serial interface
637 static int smc911x_phy_read(struct net_device *dev, int phyaddr, int phyreg)
639 struct smc911x_local *lp = netdev_priv(dev);
640 unsigned int phydata;
642 SMC_GET_MII(lp, phyreg, phyaddr, phydata);
644 DBG(SMC_DEBUG_MISC, dev, "%s: phyaddr=0x%x, phyreg=0x%02x, phydata=0x%04x\n",
645 __func__, phyaddr, phyreg, phydata);
651 * Writes a register to the MII Management serial interface
653 static void smc911x_phy_write(struct net_device *dev, int phyaddr, int phyreg,
656 struct smc911x_local *lp = netdev_priv(dev);
658 DBG(SMC_DEBUG_MISC, dev, "%s: phyaddr=0x%x, phyreg=0x%x, phydata=0x%x\n",
659 __func__, phyaddr, phyreg, phydata);
661 SMC_SET_MII(lp, phyreg, phyaddr, phydata);
665 * Finds and reports the PHY address (115 and 117 have external
666 * PHY interface 118 has internal only
668 static void smc911x_phy_detect(struct net_device *dev)
670 struct smc911x_local *lp = netdev_priv(dev);
672 unsigned int cfg, id1, id2;
674 DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
679 * Scan all 32 PHY addresses if necessary, starting at
680 * PHY#1 to PHY#31, and then PHY#0 last.
682 switch(lp->version) {
687 cfg = SMC_GET_HW_CFG(lp);
688 if (cfg & HW_CFG_EXT_PHY_DET_) {
689 cfg &= ~HW_CFG_PHY_CLK_SEL_;
690 cfg |= HW_CFG_PHY_CLK_SEL_CLK_DIS_;
691 SMC_SET_HW_CFG(lp, cfg);
692 udelay(10); /* Wait for clocks to stop */
694 cfg |= HW_CFG_EXT_PHY_EN_;
695 SMC_SET_HW_CFG(lp, cfg);
696 udelay(10); /* Wait for clocks to stop */
698 cfg &= ~HW_CFG_PHY_CLK_SEL_;
699 cfg |= HW_CFG_PHY_CLK_SEL_EXT_PHY_;
700 SMC_SET_HW_CFG(lp, cfg);
701 udelay(10); /* Wait for clocks to stop */
703 cfg |= HW_CFG_SMI_SEL_;
704 SMC_SET_HW_CFG(lp, cfg);
706 for (phyaddr = 1; phyaddr < 32; ++phyaddr) {
708 /* Read the PHY identifiers */
709 SMC_GET_PHY_ID1(lp, phyaddr & 31, id1);
710 SMC_GET_PHY_ID2(lp, phyaddr & 31, id2);
712 /* Make sure it is a valid identifier */
713 if (id1 != 0x0000 && id1 != 0xffff &&
714 id1 != 0x8000 && id2 != 0x0000 &&
715 id2 != 0xffff && id2 != 0x8000) {
716 /* Save the PHY's address */
717 lp->mii.phy_id = phyaddr & 31;
718 lp->phy_type = id1 << 16 | id2;
723 /* Found an external PHY */
727 /* Internal media only */
728 SMC_GET_PHY_ID1(lp, 1, id1);
729 SMC_GET_PHY_ID2(lp, 1, id2);
730 /* Save the PHY's address */
732 lp->phy_type = id1 << 16 | id2;
735 DBG(SMC_DEBUG_MISC, dev, "phy_id1=0x%x, phy_id2=0x%x phyaddr=0x%d\n",
736 id1, id2, lp->mii.phy_id);
740 * Sets the PHY to a configuration as determined by the user.
741 * Called with spin_lock held.
743 static int smc911x_phy_fixed(struct net_device *dev)
745 struct smc911x_local *lp = netdev_priv(dev);
746 int phyaddr = lp->mii.phy_id;
749 DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
751 /* Enter Link Disable state */
752 SMC_GET_PHY_BMCR(lp, phyaddr, bmcr);
754 SMC_SET_PHY_BMCR(lp, phyaddr, bmcr);
757 * Set our fixed capabilities
758 * Disable auto-negotiation
760 bmcr &= ~BMCR_ANENABLE;
762 bmcr |= BMCR_FULLDPLX;
764 if (lp->ctl_rspeed == 100)
765 bmcr |= BMCR_SPEED100;
767 /* Write our capabilities to the phy control register */
768 SMC_SET_PHY_BMCR(lp, phyaddr, bmcr);
770 /* Re-Configure the Receive/Phy Control register */
772 SMC_SET_PHY_BMCR(lp, phyaddr, bmcr);
778 * smc911x_phy_reset - reset the phy
782 * Issue a software reset for the specified PHY and
783 * wait up to 100ms for the reset to complete. We should
784 * not access the PHY for 50ms after issuing the reset.
786 * The time to wait appears to be dependent on the PHY.
789 static int smc911x_phy_reset(struct net_device *dev, int phy)
791 struct smc911x_local *lp = netdev_priv(dev);
796 DBG(SMC_DEBUG_FUNC, dev, "--> %s()\n", __func__);
798 spin_lock_irqsave(&lp->lock, flags);
799 reg = SMC_GET_PMT_CTRL(lp);
801 reg |= PMT_CTRL_PHY_RST_;
802 SMC_SET_PMT_CTRL(lp, reg);
803 spin_unlock_irqrestore(&lp->lock, flags);
804 for (timeout = 2; timeout; timeout--) {
806 spin_lock_irqsave(&lp->lock, flags);
807 reg = SMC_GET_PMT_CTRL(lp);
808 spin_unlock_irqrestore(&lp->lock, flags);
809 if (!(reg & PMT_CTRL_PHY_RST_)) {
810 /* extra delay required because the phy may
811 * not be completed with its reset
812 * when PHY_BCR_RESET_ is cleared. 256us
813 * should suffice, but use 500us to be safe
820 return reg & PMT_CTRL_PHY_RST_;
824 * smc911x_phy_powerdown - powerdown phy
828 * Power down the specified PHY
830 static void smc911x_phy_powerdown(struct net_device *dev, int phy)
832 struct smc911x_local *lp = netdev_priv(dev);
835 /* Enter Link Disable state */
836 SMC_GET_PHY_BMCR(lp, phy, bmcr);
838 SMC_SET_PHY_BMCR(lp, phy, bmcr);
842 * smc911x_phy_check_media - check the media status and adjust BMCR
844 * @init: set true for initialisation
846 * Select duplex mode depending on negotiation state. This
847 * also updates our carrier state.
849 static void smc911x_phy_check_media(struct net_device *dev, int init)
851 struct smc911x_local *lp = netdev_priv(dev);
852 int phyaddr = lp->mii.phy_id;
853 unsigned int bmcr, cr;
855 DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
857 if (mii_check_media(&lp->mii, netif_msg_link(lp), init)) {
858 /* duplex state has changed */
859 SMC_GET_PHY_BMCR(lp, phyaddr, bmcr);
860 SMC_GET_MAC_CR(lp, cr);
861 if (lp->mii.full_duplex) {
862 DBG(SMC_DEBUG_MISC, dev, "Configuring for full-duplex mode\n");
863 bmcr |= BMCR_FULLDPLX;
864 cr |= MAC_CR_RCVOWN_;
866 DBG(SMC_DEBUG_MISC, dev, "Configuring for half-duplex mode\n");
867 bmcr &= ~BMCR_FULLDPLX;
868 cr &= ~MAC_CR_RCVOWN_;
870 SMC_SET_PHY_BMCR(lp, phyaddr, bmcr);
871 SMC_SET_MAC_CR(lp, cr);
876 * Configures the specified PHY through the MII management interface
877 * using Autonegotiation.
878 * Calls smc911x_phy_fixed() if the user has requested a certain config.
879 * If RPC ANEG bit is set, the media selection is dependent purely on
880 * the selection by the MII (either in the MII BMCR reg or the result
881 * of autonegotiation.) If the RPC ANEG bit is cleared, the selection
882 * is controlled by the RPC SPEED and RPC DPLX bits.
884 static void smc911x_phy_configure(struct work_struct *work)
886 struct smc911x_local *lp = container_of(work, struct smc911x_local,
888 struct net_device *dev = lp->netdev;
889 int phyaddr = lp->mii.phy_id;
890 int my_phy_caps; /* My PHY capabilities */
891 int my_ad_caps; /* My Advertised capabilities */
895 DBG(SMC_DEBUG_FUNC, dev, "--> %s()\n", __func__);
898 * We should not be called if phy_type is zero.
900 if (lp->phy_type == 0)
903 if (smc911x_phy_reset(dev, phyaddr)) {
904 netdev_info(dev, "PHY reset timed out\n");
907 spin_lock_irqsave(&lp->lock, flags);
910 * Enable PHY Interrupts (for register 18)
911 * Interrupts listed here are enabled
913 SMC_SET_PHY_INT_MASK(lp, phyaddr, PHY_INT_MASK_ENERGY_ON_ |
914 PHY_INT_MASK_ANEG_COMP_ | PHY_INT_MASK_REMOTE_FAULT_ |
915 PHY_INT_MASK_LINK_DOWN_);
917 /* If the user requested no auto neg, then go set his request */
918 if (lp->mii.force_media) {
919 smc911x_phy_fixed(dev);
920 goto smc911x_phy_configure_exit;
923 /* Copy our capabilities from MII_BMSR to MII_ADVERTISE */
924 SMC_GET_PHY_BMSR(lp, phyaddr, my_phy_caps);
925 if (!(my_phy_caps & BMSR_ANEGCAPABLE)) {
926 netdev_info(dev, "Auto negotiation NOT supported\n");
927 smc911x_phy_fixed(dev);
928 goto smc911x_phy_configure_exit;
931 /* CSMA capable w/ both pauses */
932 my_ad_caps = ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
934 if (my_phy_caps & BMSR_100BASE4)
935 my_ad_caps |= ADVERTISE_100BASE4;
936 if (my_phy_caps & BMSR_100FULL)
937 my_ad_caps |= ADVERTISE_100FULL;
938 if (my_phy_caps & BMSR_100HALF)
939 my_ad_caps |= ADVERTISE_100HALF;
940 if (my_phy_caps & BMSR_10FULL)
941 my_ad_caps |= ADVERTISE_10FULL;
942 if (my_phy_caps & BMSR_10HALF)
943 my_ad_caps |= ADVERTISE_10HALF;
945 /* Disable capabilities not selected by our user */
946 if (lp->ctl_rspeed != 100)
947 my_ad_caps &= ~(ADVERTISE_100BASE4|ADVERTISE_100FULL|ADVERTISE_100HALF);
949 if (!lp->ctl_rfduplx)
950 my_ad_caps &= ~(ADVERTISE_100FULL|ADVERTISE_10FULL);
952 /* Update our Auto-Neg Advertisement Register */
953 SMC_SET_PHY_MII_ADV(lp, phyaddr, my_ad_caps);
954 lp->mii.advertising = my_ad_caps;
957 * Read the register back. Without this, it appears that when
958 * auto-negotiation is restarted, sometimes it isn't ready and
959 * the link does not come up.
962 SMC_GET_PHY_MII_ADV(lp, phyaddr, status);
964 DBG(SMC_DEBUG_MISC, dev, "phy caps=0x%04x\n", my_phy_caps);
965 DBG(SMC_DEBUG_MISC, dev, "phy advertised caps=0x%04x\n", my_ad_caps);
967 /* Restart auto-negotiation process in order to advertise my caps */
968 SMC_SET_PHY_BMCR(lp, phyaddr, BMCR_ANENABLE | BMCR_ANRESTART);
970 smc911x_phy_check_media(dev, 1);
972 smc911x_phy_configure_exit:
973 spin_unlock_irqrestore(&lp->lock, flags);
977 * smc911x_phy_interrupt
979 * Purpose: Handle interrupts relating to PHY register 18. This is
980 * called from the "hard" interrupt handler under our private spinlock.
982 static void smc911x_phy_interrupt(struct net_device *dev)
984 struct smc911x_local *lp = netdev_priv(dev);
985 int phyaddr = lp->mii.phy_id;
988 DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
990 if (lp->phy_type == 0)
993 smc911x_phy_check_media(dev, 0);
994 /* read to clear status bits */
995 SMC_GET_PHY_INT_SRC(lp, phyaddr,status);
996 DBG(SMC_DEBUG_MISC, dev, "PHY interrupt status 0x%04x\n",
998 DBG(SMC_DEBUG_MISC, dev, "AFC_CFG 0x%08x\n",
999 SMC_GET_AFC_CFG(lp));
1002 /*--- END PHY CONTROL AND CONFIGURATION-------------------------------------*/
1005 * This is the main routine of the driver, to handle the device when
1006 * it needs some attention.
1008 static irqreturn_t smc911x_interrupt(int irq, void *dev_id)
1010 struct net_device *dev = dev_id;
1011 struct smc911x_local *lp = netdev_priv(dev);
1012 unsigned int status, mask, timeout;
1013 unsigned int rx_overrun=0, cr, pkts;
1014 unsigned long flags;
1016 DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
1018 spin_lock_irqsave(&lp->lock, flags);
1020 /* Spurious interrupt check */
1021 if ((SMC_GET_IRQ_CFG(lp) & (INT_CFG_IRQ_INT_ | INT_CFG_IRQ_EN_)) !=
1022 (INT_CFG_IRQ_INT_ | INT_CFG_IRQ_EN_)) {
1023 spin_unlock_irqrestore(&lp->lock, flags);
1027 mask = SMC_GET_INT_EN(lp);
1028 SMC_SET_INT_EN(lp, 0);
1030 /* set a timeout value, so I don't stay here forever */
1035 status = SMC_GET_INT(lp);
1037 DBG(SMC_DEBUG_MISC, dev, "INT 0x%08x MASK 0x%08x OUTSIDE MASK 0x%08x\n",
1038 status, mask, status & ~mask);
1044 /* Handle SW interrupt condition */
1045 if (status & INT_STS_SW_INT_) {
1046 SMC_ACK_INT(lp, INT_STS_SW_INT_);
1047 mask &= ~INT_EN_SW_INT_EN_;
1049 /* Handle various error conditions */
1050 if (status & INT_STS_RXE_) {
1051 SMC_ACK_INT(lp, INT_STS_RXE_);
1052 dev->stats.rx_errors++;
1054 if (status & INT_STS_RXDFH_INT_) {
1055 SMC_ACK_INT(lp, INT_STS_RXDFH_INT_);
1056 dev->stats.rx_dropped+=SMC_GET_RX_DROP(lp);
1058 /* Undocumented interrupt-what is the right thing to do here? */
1059 if (status & INT_STS_RXDF_INT_) {
1060 SMC_ACK_INT(lp, INT_STS_RXDF_INT_);
1063 /* Rx Data FIFO exceeds set level */
1064 if (status & INT_STS_RDFL_) {
1065 if (IS_REV_A(lp->revision)) {
1067 SMC_GET_MAC_CR(lp, cr);
1068 cr &= ~MAC_CR_RXEN_;
1069 SMC_SET_MAC_CR(lp, cr);
1070 DBG(SMC_DEBUG_RX, dev, "RX overrun\n");
1071 dev->stats.rx_errors++;
1072 dev->stats.rx_fifo_errors++;
1074 SMC_ACK_INT(lp, INT_STS_RDFL_);
1076 if (status & INT_STS_RDFO_) {
1077 if (!IS_REV_A(lp->revision)) {
1078 SMC_GET_MAC_CR(lp, cr);
1079 cr &= ~MAC_CR_RXEN_;
1080 SMC_SET_MAC_CR(lp, cr);
1082 DBG(SMC_DEBUG_RX, dev, "RX overrun\n");
1083 dev->stats.rx_errors++;
1084 dev->stats.rx_fifo_errors++;
1086 SMC_ACK_INT(lp, INT_STS_RDFO_);
1088 /* Handle receive condition */
1089 if ((status & INT_STS_RSFL_) || rx_overrun) {
1091 DBG(SMC_DEBUG_RX, dev, "RX irq\n");
1092 fifo = SMC_GET_RX_FIFO_INF(lp);
1093 pkts = (fifo & RX_FIFO_INF_RXSUSED_) >> 16;
1094 DBG(SMC_DEBUG_RX, dev, "Rx FIFO pkts %d, bytes %d\n",
1095 pkts, fifo & 0xFFFF);
1099 if (lp->rxdma_active){
1100 DBG(SMC_DEBUG_RX | SMC_DEBUG_DMA, dev,
1102 /* The DMA is already running so up the IRQ threshold */
1103 fifo = SMC_GET_FIFO_INT(lp) & ~0xFF;
1104 fifo |= pkts & 0xFF;
1105 DBG(SMC_DEBUG_RX, dev,
1106 "Setting RX stat FIFO threshold to %d\n",
1108 SMC_SET_FIFO_INT(lp, fifo);
1113 SMC_ACK_INT(lp, INT_STS_RSFL_);
1115 /* Handle transmit FIFO available */
1116 if (status & INT_STS_TDFA_) {
1117 DBG(SMC_DEBUG_TX, dev, "TX data FIFO space available irq\n");
1118 SMC_SET_FIFO_TDA(lp, 0xFF);
1119 lp->tx_throttle = 0;
1121 if (!lp->txdma_active)
1123 netif_wake_queue(dev);
1124 SMC_ACK_INT(lp, INT_STS_TDFA_);
1126 /* Handle transmit done condition */
1128 if (status & (INT_STS_TSFL_ | INT_STS_GPT_INT_)) {
1129 DBG(SMC_DEBUG_TX | SMC_DEBUG_MISC, dev,
1130 "Tx stat FIFO limit (%d) /GPT irq\n",
1131 (SMC_GET_FIFO_INT(lp) & 0x00ff0000) >> 16);
1133 SMC_SET_GPT_CFG(lp, GPT_CFG_TIMER_EN_ | 10000);
1134 SMC_ACK_INT(lp, INT_STS_TSFL_);
1135 SMC_ACK_INT(lp, INT_STS_TSFL_ | INT_STS_GPT_INT_);
1138 if (status & INT_STS_TSFL_) {
1139 DBG(SMC_DEBUG_TX, dev, "TX status FIFO limit (%d) irq\n", ?);
1141 SMC_ACK_INT(lp, INT_STS_TSFL_);
1144 if (status & INT_STS_GPT_INT_) {
1145 DBG(SMC_DEBUG_RX, dev, "IRQ_CFG 0x%08x FIFO_INT 0x%08x RX_CFG 0x%08x\n",
1146 SMC_GET_IRQ_CFG(lp),
1147 SMC_GET_FIFO_INT(lp),
1148 SMC_GET_RX_CFG(lp));
1149 DBG(SMC_DEBUG_RX, dev, "Rx Stat FIFO Used 0x%02x Data FIFO Used 0x%04x Stat FIFO 0x%08x\n",
1150 (SMC_GET_RX_FIFO_INF(lp) & 0x00ff0000) >> 16,
1151 SMC_GET_RX_FIFO_INF(lp) & 0xffff,
1152 SMC_GET_RX_STS_FIFO_PEEK(lp));
1153 SMC_SET_GPT_CFG(lp, GPT_CFG_TIMER_EN_ | 10000);
1154 SMC_ACK_INT(lp, INT_STS_GPT_INT_);
1158 /* Handle PHY interrupt condition */
1159 if (status & INT_STS_PHY_INT_) {
1160 DBG(SMC_DEBUG_MISC, dev, "PHY irq\n");
1161 smc911x_phy_interrupt(dev);
1162 SMC_ACK_INT(lp, INT_STS_PHY_INT_);
1164 } while (--timeout);
1166 /* restore mask state */
1167 SMC_SET_INT_EN(lp, mask);
1169 DBG(SMC_DEBUG_MISC, dev, "Interrupt done (%d loops)\n",
1172 spin_unlock_irqrestore(&lp->lock, flags);
1179 smc911x_tx_dma_irq(int dma, void *data)
1181 struct net_device *dev = (struct net_device *)data;
1182 struct smc911x_local *lp = netdev_priv(dev);
1183 struct sk_buff *skb = lp->current_tx_skb;
1184 unsigned long flags;
1186 DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
1188 DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, dev, "TX DMA irq handler\n");
1189 /* Clear the DMA interrupt sources */
1190 SMC_DMA_ACK_IRQ(dev, dma);
1191 BUG_ON(skb == NULL);
1192 dma_unmap_single(NULL, tx_dmabuf, tx_dmalen, DMA_TO_DEVICE);
1193 dev->trans_start = jiffies;
1194 dev_kfree_skb_irq(skb);
1195 lp->current_tx_skb = NULL;
1196 if (lp->pending_tx_skb != NULL)
1197 smc911x_hardware_send_pkt(dev);
1199 DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, dev,
1200 "No pending Tx packets. DMA disabled\n");
1201 spin_lock_irqsave(&lp->lock, flags);
1202 lp->txdma_active = 0;
1203 if (!lp->tx_throttle) {
1204 netif_wake_queue(dev);
1206 spin_unlock_irqrestore(&lp->lock, flags);
1209 DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, dev,
1210 "TX DMA irq completed\n");
1213 smc911x_rx_dma_irq(int dma, void *data)
1215 struct net_device *dev = (struct net_device *)data;
1216 unsigned long ioaddr = dev->base_addr;
1217 struct smc911x_local *lp = netdev_priv(dev);
1218 struct sk_buff *skb = lp->current_rx_skb;
1219 unsigned long flags;
1222 DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
1223 DBG(SMC_DEBUG_RX | SMC_DEBUG_DMA, dev, "RX DMA irq handler\n");
1224 /* Clear the DMA interrupt sources */
1225 SMC_DMA_ACK_IRQ(dev, dma);
1226 dma_unmap_single(NULL, rx_dmabuf, rx_dmalen, DMA_FROM_DEVICE);
1227 BUG_ON(skb == NULL);
1228 lp->current_rx_skb = NULL;
1229 PRINT_PKT(skb->data, skb->len);
1230 skb->protocol = eth_type_trans(skb, dev);
1231 dev->stats.rx_packets++;
1232 dev->stats.rx_bytes += skb->len;
1235 spin_lock_irqsave(&lp->lock, flags);
1236 pkts = (SMC_GET_RX_FIFO_INF(lp) & RX_FIFO_INF_RXSUSED_) >> 16;
1240 lp->rxdma_active = 0;
1242 spin_unlock_irqrestore(&lp->lock, flags);
1243 DBG(SMC_DEBUG_RX | SMC_DEBUG_DMA, dev,
1244 "RX DMA irq completed. DMA RX FIFO PKTS %d\n",
1247 #endif /* SMC_USE_DMA */
1249 #ifdef CONFIG_NET_POLL_CONTROLLER
1251 * Polling receive - used by netconsole and other diagnostic tools
1252 * to allow network i/o with interrupts disabled.
1254 static void smc911x_poll_controller(struct net_device *dev)
1256 disable_irq(dev->irq);
1257 smc911x_interrupt(dev->irq, dev);
1258 enable_irq(dev->irq);
1262 /* Our watchdog timed out. Called by the networking layer */
1263 static void smc911x_timeout(struct net_device *dev)
1265 struct smc911x_local *lp = netdev_priv(dev);
1267 unsigned long flags;
1269 DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
1271 spin_lock_irqsave(&lp->lock, flags);
1272 status = SMC_GET_INT(lp);
1273 mask = SMC_GET_INT_EN(lp);
1274 spin_unlock_irqrestore(&lp->lock, flags);
1275 DBG(SMC_DEBUG_MISC, dev, "INT 0x%02x MASK 0x%02x\n",
1278 /* Dump the current TX FIFO contents and restart */
1279 mask = SMC_GET_TX_CFG(lp);
1280 SMC_SET_TX_CFG(lp, mask | TX_CFG_TXS_DUMP_ | TX_CFG_TXD_DUMP_);
1282 * Reconfiguring the PHY doesn't seem like a bad idea here, but
1283 * smc911x_phy_configure() calls msleep() which calls schedule_timeout()
1284 * which calls schedule(). Hence we use a work queue.
1286 if (lp->phy_type != 0)
1287 schedule_work(&lp->phy_configure);
1289 /* We can accept TX packets again */
1290 dev->trans_start = jiffies; /* prevent tx timeout */
1291 netif_wake_queue(dev);
1295 * This routine will, depending on the values passed to it,
1296 * either make it accept multicast packets, go into
1297 * promiscuous mode (for TCPDUMP and cousins) or accept
1298 * a select set of multicast packets
1300 static void smc911x_set_multicast_list(struct net_device *dev)
1302 struct smc911x_local *lp = netdev_priv(dev);
1303 unsigned int multicast_table[2];
1304 unsigned int mcr, update_multicast = 0;
1305 unsigned long flags;
1307 DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
1309 spin_lock_irqsave(&lp->lock, flags);
1310 SMC_GET_MAC_CR(lp, mcr);
1311 spin_unlock_irqrestore(&lp->lock, flags);
1313 if (dev->flags & IFF_PROMISC) {
1315 DBG(SMC_DEBUG_MISC, dev, "RCR_PRMS\n");
1316 mcr |= MAC_CR_PRMS_;
1319 * Here, I am setting this to accept all multicast packets.
1320 * I don't need to zero the multicast table, because the flag is
1321 * checked before the table is
1323 else if (dev->flags & IFF_ALLMULTI || netdev_mc_count(dev) > 16) {
1324 DBG(SMC_DEBUG_MISC, dev, "RCR_ALMUL\n");
1325 mcr |= MAC_CR_MCPAS_;
1329 * This sets the internal hardware table to filter out unwanted
1330 * multicast packets before they take up memory.
1332 * The SMC chip uses a hash table where the high 6 bits of the CRC of
1333 * address are the offset into the table. If that bit is 1, then the
1334 * multicast packet is accepted. Otherwise, it's dropped silently.
1336 * To use the 6 bits as an offset into the table, the high 1 bit is
1337 * the number of the 32 bit register, while the low 5 bits are the bit
1338 * within that register.
1340 else if (!netdev_mc_empty(dev)) {
1341 struct netdev_hw_addr *ha;
1343 /* Set the Hash perfec mode */
1344 mcr |= MAC_CR_HPFILT_;
1346 /* start with a table of all zeros: reject all */
1347 memset(multicast_table, 0, sizeof(multicast_table));
1349 netdev_for_each_mc_addr(ha, dev) {
1352 /* upper 6 bits are used as hash index */
1353 position = ether_crc(ETH_ALEN, ha->addr)>>26;
1355 multicast_table[position>>5] |= 1 << (position&0x1f);
1358 /* be sure I get rid of flags I might have set */
1359 mcr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_);
1361 /* now, the table can be loaded into the chipset */
1362 update_multicast = 1;
1364 DBG(SMC_DEBUG_MISC, dev, "~(MAC_CR_PRMS_|MAC_CR_MCPAS_)\n");
1365 mcr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_);
1368 * since I'm disabling all multicast entirely, I need to
1369 * clear the multicast list
1371 memset(multicast_table, 0, sizeof(multicast_table));
1372 update_multicast = 1;
1375 spin_lock_irqsave(&lp->lock, flags);
1376 SMC_SET_MAC_CR(lp, mcr);
1377 if (update_multicast) {
1378 DBG(SMC_DEBUG_MISC, dev,
1379 "update mcast hash table 0x%08x 0x%08x\n",
1380 multicast_table[0], multicast_table[1]);
1381 SMC_SET_HASHL(lp, multicast_table[0]);
1382 SMC_SET_HASHH(lp, multicast_table[1]);
1384 spin_unlock_irqrestore(&lp->lock, flags);
1389 * Open and Initialize the board
1391 * Set up everything, reset the card, etc..
1394 smc911x_open(struct net_device *dev)
1396 struct smc911x_local *lp = netdev_priv(dev);
1398 DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
1400 /* reset the hardware */
1403 /* Configure the PHY, initialize the link state */
1404 smc911x_phy_configure(&lp->phy_configure);
1406 /* Turn on Tx + Rx */
1407 smc911x_enable(dev);
1409 netif_start_queue(dev);
1417 * this makes the board clean up everything that it can
1418 * and not talk to the outside world. Caused by
1419 * an 'ifconfig ethX down'
1421 static int smc911x_close(struct net_device *dev)
1423 struct smc911x_local *lp = netdev_priv(dev);
1425 DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
1427 netif_stop_queue(dev);
1428 netif_carrier_off(dev);
1430 /* clear everything */
1431 smc911x_shutdown(dev);
1433 if (lp->phy_type != 0) {
1434 /* We need to ensure that no calls to
1435 * smc911x_phy_configure are pending.
1437 cancel_work_sync(&lp->phy_configure);
1438 smc911x_phy_powerdown(dev, lp->mii.phy_id);
1441 if (lp->pending_tx_skb) {
1442 dev_kfree_skb(lp->pending_tx_skb);
1443 lp->pending_tx_skb = NULL;
1453 smc911x_ethtool_getsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1455 struct smc911x_local *lp = netdev_priv(dev);
1457 unsigned long flags;
1459 DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
1463 if (lp->phy_type != 0) {
1464 spin_lock_irqsave(&lp->lock, flags);
1465 ret = mii_ethtool_gset(&lp->mii, cmd);
1466 spin_unlock_irqrestore(&lp->lock, flags);
1468 cmd->supported = SUPPORTED_10baseT_Half |
1469 SUPPORTED_10baseT_Full |
1470 SUPPORTED_TP | SUPPORTED_AUI;
1472 if (lp->ctl_rspeed == 10)
1473 ethtool_cmd_speed_set(cmd, SPEED_10);
1474 else if (lp->ctl_rspeed == 100)
1475 ethtool_cmd_speed_set(cmd, SPEED_100);
1477 cmd->autoneg = AUTONEG_DISABLE;
1478 if (lp->mii.phy_id==1)
1479 cmd->transceiver = XCVR_INTERNAL;
1481 cmd->transceiver = XCVR_EXTERNAL;
1483 SMC_GET_PHY_SPECIAL(lp, lp->mii.phy_id, status);
1485 (status & (PHY_SPECIAL_SPD_10FULL_ | PHY_SPECIAL_SPD_100FULL_)) ?
1486 DUPLEX_FULL : DUPLEX_HALF;
1494 smc911x_ethtool_setsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1496 struct smc911x_local *lp = netdev_priv(dev);
1498 unsigned long flags;
1500 if (lp->phy_type != 0) {
1501 spin_lock_irqsave(&lp->lock, flags);
1502 ret = mii_ethtool_sset(&lp->mii, cmd);
1503 spin_unlock_irqrestore(&lp->lock, flags);
1505 if (cmd->autoneg != AUTONEG_DISABLE ||
1506 cmd->speed != SPEED_10 ||
1507 (cmd->duplex != DUPLEX_HALF && cmd->duplex != DUPLEX_FULL) ||
1508 (cmd->port != PORT_TP && cmd->port != PORT_AUI))
1511 lp->ctl_rfduplx = cmd->duplex == DUPLEX_FULL;
1520 smc911x_ethtool_getdrvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
1522 strlcpy(info->driver, CARDNAME, sizeof(info->driver));
1523 strlcpy(info->version, version, sizeof(info->version));
1524 strlcpy(info->bus_info, dev_name(dev->dev.parent),
1525 sizeof(info->bus_info));
1528 static int smc911x_ethtool_nwayreset(struct net_device *dev)
1530 struct smc911x_local *lp = netdev_priv(dev);
1532 unsigned long flags;
1534 if (lp->phy_type != 0) {
1535 spin_lock_irqsave(&lp->lock, flags);
1536 ret = mii_nway_restart(&lp->mii);
1537 spin_unlock_irqrestore(&lp->lock, flags);
1543 static u32 smc911x_ethtool_getmsglevel(struct net_device *dev)
1545 struct smc911x_local *lp = netdev_priv(dev);
1546 return lp->msg_enable;
1549 static void smc911x_ethtool_setmsglevel(struct net_device *dev, u32 level)
1551 struct smc911x_local *lp = netdev_priv(dev);
1552 lp->msg_enable = level;
1555 static int smc911x_ethtool_getregslen(struct net_device *dev)
1557 /* System regs + MAC regs + PHY regs */
1558 return (((E2P_CMD - ID_REV)/4 + 1) +
1559 (WUCSR - MAC_CR)+1 + 32) * sizeof(u32);
1562 static void smc911x_ethtool_getregs(struct net_device *dev,
1563 struct ethtool_regs* regs, void *buf)
1565 struct smc911x_local *lp = netdev_priv(dev);
1566 unsigned long flags;
1568 u32 *data = (u32*)buf;
1570 regs->version = lp->version;
1571 for(i=ID_REV;i<=E2P_CMD;i+=4) {
1572 data[j++] = SMC_inl(lp, i);
1574 for(i=MAC_CR;i<=WUCSR;i++) {
1575 spin_lock_irqsave(&lp->lock, flags);
1576 SMC_GET_MAC_CSR(lp, i, reg);
1577 spin_unlock_irqrestore(&lp->lock, flags);
1580 for(i=0;i<=31;i++) {
1581 spin_lock_irqsave(&lp->lock, flags);
1582 SMC_GET_MII(lp, i, lp->mii.phy_id, reg);
1583 spin_unlock_irqrestore(&lp->lock, flags);
1584 data[j++] = reg & 0xFFFF;
1588 static int smc911x_ethtool_wait_eeprom_ready(struct net_device *dev)
1590 struct smc911x_local *lp = netdev_priv(dev);
1591 unsigned int timeout;
1594 e2p_cmd = SMC_GET_E2P_CMD(lp);
1595 for(timeout=10;(e2p_cmd & E2P_CMD_EPC_BUSY_) && timeout; timeout--) {
1596 if (e2p_cmd & E2P_CMD_EPC_TIMEOUT_) {
1597 PRINTK(dev, "%s timeout waiting for EEPROM to respond\n",
1602 e2p_cmd = SMC_GET_E2P_CMD(lp);
1605 PRINTK(dev, "%s timeout waiting for EEPROM CMD not busy\n",
1612 static inline int smc911x_ethtool_write_eeprom_cmd(struct net_device *dev,
1615 struct smc911x_local *lp = netdev_priv(dev);
1618 if ((ret = smc911x_ethtool_wait_eeprom_ready(dev))!=0)
1620 SMC_SET_E2P_CMD(lp, E2P_CMD_EPC_BUSY_ |
1621 ((cmd) & (0x7<<28)) |
1626 static inline int smc911x_ethtool_read_eeprom_byte(struct net_device *dev,
1629 struct smc911x_local *lp = netdev_priv(dev);
1632 if ((ret = smc911x_ethtool_wait_eeprom_ready(dev))!=0)
1634 *data = SMC_GET_E2P_DATA(lp);
1638 static inline int smc911x_ethtool_write_eeprom_byte(struct net_device *dev,
1641 struct smc911x_local *lp = netdev_priv(dev);
1644 if ((ret = smc911x_ethtool_wait_eeprom_ready(dev))!=0)
1646 SMC_SET_E2P_DATA(lp, data);
1650 static int smc911x_ethtool_geteeprom(struct net_device *dev,
1651 struct ethtool_eeprom *eeprom, u8 *data)
1653 u8 eebuf[SMC911X_EEPROM_LEN];
1656 for(i=0;i<SMC911X_EEPROM_LEN;i++) {
1657 if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_READ_, i ))!=0)
1659 if ((ret=smc911x_ethtool_read_eeprom_byte(dev, &eebuf[i]))!=0)
1662 memcpy(data, eebuf+eeprom->offset, eeprom->len);
1666 static int smc911x_ethtool_seteeprom(struct net_device *dev,
1667 struct ethtool_eeprom *eeprom, u8 *data)
1672 if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_EWEN_, 0 ))!=0)
1674 for(i=eeprom->offset;i<(eeprom->offset+eeprom->len);i++) {
1676 if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_ERASE_, i ))!=0)
1679 if ((ret=smc911x_ethtool_write_eeprom_byte(dev, *data))!=0)
1681 if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_WRITE_, i ))!=0)
1687 static int smc911x_ethtool_geteeprom_len(struct net_device *dev)
1689 return SMC911X_EEPROM_LEN;
1692 static const struct ethtool_ops smc911x_ethtool_ops = {
1693 .get_settings = smc911x_ethtool_getsettings,
1694 .set_settings = smc911x_ethtool_setsettings,
1695 .get_drvinfo = smc911x_ethtool_getdrvinfo,
1696 .get_msglevel = smc911x_ethtool_getmsglevel,
1697 .set_msglevel = smc911x_ethtool_setmsglevel,
1698 .nway_reset = smc911x_ethtool_nwayreset,
1699 .get_link = ethtool_op_get_link,
1700 .get_regs_len = smc911x_ethtool_getregslen,
1701 .get_regs = smc911x_ethtool_getregs,
1702 .get_eeprom_len = smc911x_ethtool_geteeprom_len,
1703 .get_eeprom = smc911x_ethtool_geteeprom,
1704 .set_eeprom = smc911x_ethtool_seteeprom,
1710 * This routine has a simple purpose -- make the SMC chip generate an
1711 * interrupt, so an auto-detect routine can detect it, and find the IRQ,
1713 static int smc911x_findirq(struct net_device *dev)
1715 struct smc911x_local *lp = netdev_priv(dev);
1717 unsigned long cookie;
1719 DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
1721 cookie = probe_irq_on();
1724 * Force a SW interrupt
1727 SMC_SET_INT_EN(lp, INT_EN_SW_INT_EN_);
1730 * Wait until positive that the interrupt has been generated
1735 int_status = SMC_GET_INT_EN(lp);
1736 if (int_status & INT_EN_SW_INT_EN_)
1737 break; /* got the interrupt */
1738 } while (--timeout);
1741 * there is really nothing that I can do here if timeout fails,
1742 * as autoirq_report will return a 0 anyway, which is what I
1743 * want in this case. Plus, the clean up is needed in both
1747 /* and disable all interrupts again */
1748 SMC_SET_INT_EN(lp, 0);
1750 /* and return what I found */
1751 return probe_irq_off(cookie);
1754 static const struct net_device_ops smc911x_netdev_ops = {
1755 .ndo_open = smc911x_open,
1756 .ndo_stop = smc911x_close,
1757 .ndo_start_xmit = smc911x_hard_start_xmit,
1758 .ndo_tx_timeout = smc911x_timeout,
1759 .ndo_set_rx_mode = smc911x_set_multicast_list,
1760 .ndo_change_mtu = eth_change_mtu,
1761 .ndo_validate_addr = eth_validate_addr,
1762 .ndo_set_mac_address = eth_mac_addr,
1763 #ifdef CONFIG_NET_POLL_CONTROLLER
1764 .ndo_poll_controller = smc911x_poll_controller,
1769 * Function: smc911x_probe(unsigned long ioaddr)
1772 * Tests to see if a given ioaddr points to an SMC911x chip.
1773 * Returns a 0 on success
1776 * (1) see if the endian word is OK
1777 * (1) see if I recognize the chip ID in the appropriate register
1779 * Here I do typical initialization tasks.
1781 * o Initialize the structure if needed
1782 * o print out my vanity message if not done so already
1783 * o print out what type of hardware is detected
1784 * o print out the ethernet address
1786 * o set up my private data
1787 * o configure the dev structure with my subroutines
1788 * o actually GRAB the irq.
1791 static int smc911x_probe(struct net_device *dev)
1793 struct smc911x_local *lp = netdev_priv(dev);
1795 unsigned int val, chip_id, revision;
1796 const char *version_string;
1797 unsigned long irq_flags;
1799 DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
1801 /* First, see if the endian word is recognized */
1802 val = SMC_GET_BYTE_TEST(lp);
1803 DBG(SMC_DEBUG_MISC, dev, "%s: endian probe returned 0x%04x\n",
1805 if (val != 0x87654321) {
1806 netdev_err(dev, "Invalid chip endian 0x%08x\n", val);
1812 * check if the revision register is something that I
1813 * recognize. These might need to be added to later,
1814 * as future revisions could be added.
1816 chip_id = SMC_GET_PN(lp);
1817 DBG(SMC_DEBUG_MISC, dev, "%s: id probe returned 0x%04x\n",
1819 for(i=0;chip_ids[i].id != 0; i++) {
1820 if (chip_ids[i].id == chip_id) break;
1822 if (!chip_ids[i].id) {
1823 netdev_err(dev, "Unknown chip ID %04x\n", chip_id);
1827 version_string = chip_ids[i].name;
1829 revision = SMC_GET_REV(lp);
1830 DBG(SMC_DEBUG_MISC, dev, "%s: revision = 0x%04x\n", CARDNAME, revision);
1832 /* At this point I'll assume that the chip is an SMC911x. */
1833 DBG(SMC_DEBUG_MISC, dev, "%s: Found a %s\n",
1834 CARDNAME, chip_ids[i].name);
1836 /* Validate the TX FIFO size requested */
1837 if ((tx_fifo_kb < 2) || (tx_fifo_kb > 14)) {
1838 netdev_err(dev, "Invalid TX FIFO size requested %d\n",
1844 /* fill in some of the fields */
1845 lp->version = chip_ids[i].id;
1846 lp->revision = revision;
1847 lp->tx_fifo_kb = tx_fifo_kb;
1848 /* Reverse calculate the RX FIFO size from the TX */
1849 lp->tx_fifo_size=(lp->tx_fifo_kb<<10) - 512;
1850 lp->rx_fifo_size= ((0x4000 - 512 - lp->tx_fifo_size) / 16) * 15;
1852 /* Set the automatic flow control values */
1853 switch(lp->tx_fifo_kb) {
1855 * AFC_HI is about ((Rx Data Fifo Size)*2/3)/64
1856 * AFC_LO is AFC_HI/2
1857 * BACK_DUR is about 5uS*(AFC_LO) rounded down
1859 case 2:/* 13440 Rx Data Fifo Size */
1860 lp->afc_cfg=0x008C46AF;break;
1861 case 3:/* 12480 Rx Data Fifo Size */
1862 lp->afc_cfg=0x0082419F;break;
1863 case 4:/* 11520 Rx Data Fifo Size */
1864 lp->afc_cfg=0x00783C9F;break;
1865 case 5:/* 10560 Rx Data Fifo Size */
1866 lp->afc_cfg=0x006E374F;break;
1867 case 6:/* 9600 Rx Data Fifo Size */
1868 lp->afc_cfg=0x0064328F;break;
1869 case 7:/* 8640 Rx Data Fifo Size */
1870 lp->afc_cfg=0x005A2D7F;break;
1871 case 8:/* 7680 Rx Data Fifo Size */
1872 lp->afc_cfg=0x0050287F;break;
1873 case 9:/* 6720 Rx Data Fifo Size */
1874 lp->afc_cfg=0x0046236F;break;
1875 case 10:/* 5760 Rx Data Fifo Size */
1876 lp->afc_cfg=0x003C1E6F;break;
1877 case 11:/* 4800 Rx Data Fifo Size */
1878 lp->afc_cfg=0x0032195F;break;
1880 * AFC_HI is ~1520 bytes less than RX Data Fifo Size
1881 * AFC_LO is AFC_HI/2
1882 * BACK_DUR is about 5uS*(AFC_LO) rounded down
1884 case 12:/* 3840 Rx Data Fifo Size */
1885 lp->afc_cfg=0x0024124F;break;
1886 case 13:/* 2880 Rx Data Fifo Size */
1887 lp->afc_cfg=0x0015073F;break;
1888 case 14:/* 1920 Rx Data Fifo Size */
1889 lp->afc_cfg=0x0006032F;break;
1891 PRINTK(dev, "ERROR -- no AFC_CFG setting found");
1895 DBG(SMC_DEBUG_MISC | SMC_DEBUG_TX | SMC_DEBUG_RX, dev,
1896 "%s: tx_fifo %d rx_fifo %d afc_cfg 0x%08x\n", CARDNAME,
1897 lp->tx_fifo_size, lp->rx_fifo_size, lp->afc_cfg);
1899 spin_lock_init(&lp->lock);
1901 /* Get the MAC address */
1902 SMC_GET_MAC_ADDR(lp, dev->dev_addr);
1904 /* now, reset the chip, and put it into a known state */
1908 * If dev->irq is 0, then the device has to be banged on to see
1911 * Specifying an IRQ is done with the assumption that the user knows
1912 * what (s)he is doing. No checking is done!!!!
1919 dev->irq = smc911x_findirq(dev);
1922 /* kick the card and try again */
1926 if (dev->irq == 0) {
1927 netdev_warn(dev, "Couldn't autodetect your IRQ. Use irq=xx.\n");
1931 dev->irq = irq_canonicalize(dev->irq);
1933 /* Fill in the fields of the device structure with ethernet values. */
1936 dev->netdev_ops = &smc911x_netdev_ops;
1937 dev->watchdog_timeo = msecs_to_jiffies(watchdog);
1938 dev->ethtool_ops = &smc911x_ethtool_ops;
1940 INIT_WORK(&lp->phy_configure, smc911x_phy_configure);
1941 lp->mii.phy_id_mask = 0x1f;
1942 lp->mii.reg_num_mask = 0x1f;
1943 lp->mii.force_media = 0;
1944 lp->mii.full_duplex = 0;
1946 lp->mii.mdio_read = smc911x_phy_read;
1947 lp->mii.mdio_write = smc911x_phy_write;
1950 * Locate the phy, if any.
1952 smc911x_phy_detect(dev);
1954 /* Set default parameters */
1955 lp->msg_enable = NETIF_MSG_LINK;
1956 lp->ctl_rfduplx = 1;
1957 lp->ctl_rspeed = 100;
1959 #ifdef SMC_DYNAMIC_BUS_CONFIG
1960 irq_flags = lp->cfg.irq_flags;
1962 irq_flags = IRQF_SHARED | SMC_IRQ_SENSE;
1966 retval = request_irq(dev->irq, smc911x_interrupt,
1967 irq_flags, dev->name, dev);
1972 lp->rxdma = SMC_DMA_REQUEST(dev, smc911x_rx_dma_irq);
1973 lp->txdma = SMC_DMA_REQUEST(dev, smc911x_tx_dma_irq);
1974 lp->rxdma_active = 0;
1975 lp->txdma_active = 0;
1976 dev->dma = lp->rxdma;
1979 retval = register_netdev(dev);
1981 /* now, print out the card info, in a short format.. */
1982 netdev_info(dev, "%s (rev %d) at %#lx IRQ %d",
1983 version_string, lp->revision,
1984 dev->base_addr, dev->irq);
1987 if (lp->rxdma != -1)
1988 pr_cont(" RXDMA %d", lp->rxdma);
1990 if (lp->txdma != -1)
1991 pr_cont(" TXDMA %d", lp->txdma);
1994 if (!is_valid_ether_addr(dev->dev_addr)) {
1995 netdev_warn(dev, "Invalid ethernet MAC address. Please set using ifconfig\n");
1997 /* Print the Ethernet address */
1998 netdev_info(dev, "Ethernet addr: %pM\n",
2002 if (lp->phy_type == 0) {
2003 PRINTK(dev, "No PHY found\n");
2004 } else if ((lp->phy_type & ~0xff) == LAN911X_INTERNAL_PHY_ID) {
2005 PRINTK(dev, "LAN911x Internal PHY\n");
2007 PRINTK(dev, "External PHY 0x%08x\n", lp->phy_type);
2014 if (lp->rxdma != -1) {
2015 SMC_DMA_FREE(dev, lp->rxdma);
2017 if (lp->txdma != -1) {
2018 SMC_DMA_FREE(dev, lp->txdma);
2026 * smc911x_drv_probe(void)
2029 * 0 --> there is a device
2030 * anything else, error
2032 static int smc911x_drv_probe(struct platform_device *pdev)
2034 struct net_device *ndev;
2035 struct resource *res;
2036 struct smc911x_local *lp;
2040 /* ndev is not valid yet, so avoid passing it in. */
2041 DBG(SMC_DEBUG_FUNC, "--> %s\n", __func__);
2042 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2049 * Request the regions.
2051 if (!request_mem_region(res->start, SMC911X_IO_EXTENT, CARDNAME)) {
2056 ndev = alloc_etherdev(sizeof(struct smc911x_local));
2061 SET_NETDEV_DEV(ndev, &pdev->dev);
2063 ndev->dma = (unsigned char)-1;
2064 ndev->irq = platform_get_irq(pdev, 0);
2065 lp = netdev_priv(ndev);
2067 #ifdef SMC_DYNAMIC_BUS_CONFIG
2069 struct smc911x_platdata *pd = dev_get_platdata(&pdev->dev);
2074 memcpy(&lp->cfg, pd, sizeof(lp->cfg));
2078 addr = ioremap(res->start, SMC911X_IO_EXTENT);
2084 platform_set_drvdata(pdev, ndev);
2086 ndev->base_addr = res->start;
2087 ret = smc911x_probe(ndev);
2093 release_mem_region(res->start, SMC911X_IO_EXTENT);
2095 pr_info("%s: not found (%d).\n", CARDNAME, ret);
2099 lp->physaddr = res->start;
2100 lp->dev = &pdev->dev;
2107 static int smc911x_drv_remove(struct platform_device *pdev)
2109 struct net_device *ndev = platform_get_drvdata(pdev);
2110 struct smc911x_local *lp = netdev_priv(ndev);
2111 struct resource *res;
2113 DBG(SMC_DEBUG_FUNC, ndev, "--> %s\n", __func__);
2115 unregister_netdev(ndev);
2117 free_irq(ndev->irq, ndev);
2121 if (lp->rxdma != -1) {
2122 SMC_DMA_FREE(dev, lp->rxdma);
2124 if (lp->txdma != -1) {
2125 SMC_DMA_FREE(dev, lp->txdma);
2130 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2131 release_mem_region(res->start, SMC911X_IO_EXTENT);
2137 static int smc911x_drv_suspend(struct platform_device *dev, pm_message_t state)
2139 struct net_device *ndev = platform_get_drvdata(dev);
2140 struct smc911x_local *lp = netdev_priv(ndev);
2142 DBG(SMC_DEBUG_FUNC, ndev, "--> %s\n", __func__);
2144 if (netif_running(ndev)) {
2145 netif_device_detach(ndev);
2146 smc911x_shutdown(ndev);
2148 /* Set D2 - Energy detect only setting */
2149 SMC_SET_PMT_CTRL(lp, 2<<12);
2156 static int smc911x_drv_resume(struct platform_device *dev)
2158 struct net_device *ndev = platform_get_drvdata(dev);
2160 DBG(SMC_DEBUG_FUNC, ndev, "--> %s\n", __func__);
2162 struct smc911x_local *lp = netdev_priv(ndev);
2164 if (netif_running(ndev)) {
2165 smc911x_reset(ndev);
2166 if (lp->phy_type != 0)
2167 smc911x_phy_configure(&lp->phy_configure);
2168 smc911x_enable(ndev);
2169 netif_device_attach(ndev);
2175 static struct platform_driver smc911x_driver = {
2176 .probe = smc911x_drv_probe,
2177 .remove = smc911x_drv_remove,
2178 .suspend = smc911x_drv_suspend,
2179 .resume = smc911x_drv_resume,
2182 .owner = THIS_MODULE,
2186 module_platform_driver(smc911x_driver);