1 #ifndef __QLCNIC_83XX_HW_H
2 #define __QLCNIC_83XX_HW_H
4 #include <linux/types.h>
5 #include <linux/etherdevice.h>
8 /* Directly mapped registers */
9 #define QLC_83XX_CRB_WIN_BASE 0x3800
10 #define QLC_83XX_CRB_WIN_FUNC(f) (QLC_83XX_CRB_WIN_BASE+((f)*4))
11 #define QLC_83XX_SEM_LOCK_BASE 0x3840
12 #define QLC_83XX_SEM_UNLOCK_BASE 0x3844
13 #define QLC_83XX_SEM_LOCK_FUNC(f) (QLC_83XX_SEM_LOCK_BASE+((f)*8))
14 #define QLC_83XX_SEM_UNLOCK_FUNC(f) (QLC_83XX_SEM_UNLOCK_BASE+((f)*8))
15 #define QLC_83XX_LINK_STATE(f) (0x3698+((f) > 7 ? 4 : 0))
16 #define QLC_83XX_LINK_SPEED(f) (0x36E0+(((f) >> 2) * 4))
17 #define QLC_83XX_LINK_SPEED_FACTOR 10
18 #define QLC_83xx_FUNC_VAL(v, f) ((v) & (1 << (f * 4)))
19 #define QLC_83XX_INTX_PTR 0x38C0
20 #define QLC_83XX_INTX_TRGR 0x38C4
21 #define QLC_83XX_INTX_MASK 0x38C8
23 #define QLC_83XX_DRV_LOCK_WAIT_COUNTER 100
24 #define QLC_83XX_DRV_LOCK_WAIT_DELAY 20
25 #define QLC_83XX_NEED_DRV_LOCK_RECOVERY 1
26 #define QLC_83XX_DRV_LOCK_RECOVERY_IN_PROGRESS 2
27 #define QLC_83XX_MAX_DRV_LOCK_RECOVERY_ATTEMPT 3
28 #define QLC_83XX_DRV_LOCK_RECOVERY_DELAY 200
29 #define QLC_83XX_DRV_LOCK_RECOVERY_STATUS_MASK 0x3
31 #define QLC_83XX_NO_NIC_RESOURCE 0x5
32 #define QLC_83XX_MAC_PRESENT 0xC
33 #define QLC_83XX_MAC_ABSENT 0xD
36 #define QLC_83XX_FLASH_SECTOR_SIZE (64 * 1024)
38 /* PEG status definitions */
39 #define QLC_83XX_CMDPEG_COMPLETE 0xff01
40 #define QLC_83XX_VALID_INTX_BIT30(val) ((val) & BIT_30)
41 #define QLC_83XX_VALID_INTX_BIT31(val) ((val) & BIT_31)
42 #define QLC_83XX_INTX_FUNC(val) ((val) & 0xFF)
43 #define QLC_83XX_LEGACY_INTX_MAX_RETRY 100
44 #define QLC_83XX_LEGACY_INTX_DELAY 4
45 #define QLC_83XX_REG_DESC 1
46 #define QLC_83XX_LRO_DESC 2
47 #define QLC_83XX_CTRL_DESC 3
48 #define QLC_83XX_FW_CAPABILITY_TSO BIT_6
49 #define QLC_83XX_FW_CAP_LRO_MSS BIT_17
50 #define QLC_83XX_HOST_RDS_MODE_UNIQUE 0
51 #define QLC_83XX_HOST_SDS_MBX_IDX 8
53 #define QLCNIC_HOST_RDS_MBX_IDX 88
54 #define QLCNIC_MAX_RING_SETS 8
56 struct qlcnic_intrpt_config {
63 struct qlcnic_macvlan_mbx {
69 /* Mailbox process AEN count */
70 #define QLC_83XX_IDC_COMP_AEN 3
71 #define QLC_83XX_MBX_AEN_CNT 5
72 #define QLC_83XX_MODULE_LOADED 1
73 #define QLC_83XX_MBX_READY 2
74 #define QLC_83XX_MBX_AEN_ACK 3
75 #define QLC_83XX_SFP_PRESENT(data) ((data) & 3)
76 #define QLC_83XX_SFP_ERR(data) (((data) >> 2) & 3)
77 #define QLC_83XX_SFP_MODULE_TYPE(data) (((data) >> 4) & 0x1F)
78 #define QLC_83XX_SFP_CU_LENGTH(data) (LSB((data) >> 16))
79 #define QLC_83XX_SFP_TX_FAULT(data) ((data) & BIT_10)
80 #define QLC_83XX_SFP_10G_CAPABLE(data) ((data) & BIT_11)
81 #define QLC_83XX_LINK_STATS(data) ((data) & BIT_0)
82 #define QLC_83XX_CURRENT_LINK_SPEED(data) (((data) >> 3) & 7)
83 #define QLC_83XX_LINK_PAUSE(data) (((data) >> 6) & 3)
84 #define QLC_83XX_LINK_LB(data) (((data) >> 8) & 7)
85 #define QLC_83XX_LINK_FEC(data) ((data) & BIT_12)
86 #define QLC_83XX_LINK_EEE(data) ((data) & BIT_13)
87 #define QLC_83XX_DCBX(data) (((data) >> 28) & 7)
88 #define QLC_83XX_AUTONEG(data) ((data) & BIT_15)
89 #define QLC_83XX_CFG_STD_PAUSE (1 << 5)
90 #define QLC_83XX_CFG_STD_TX_PAUSE (1 << 20)
91 #define QLC_83XX_CFG_STD_RX_PAUSE (2 << 20)
92 #define QLC_83XX_CFG_STD_TX_RX_PAUSE (3 << 20)
93 #define QLC_83XX_ENABLE_AUTONEG (1 << 15)
94 #define QLC_83XX_CFG_LOOPBACK_HSS (2 << 1)
95 #define QLC_83XX_CFG_LOOPBACK_PHY (3 << 1)
96 #define QLC_83XX_CFG_LOOPBACK_EXT (4 << 1)
98 /* LED configuration settings */
99 #define QLC_83XX_ENABLE_BEACON 0xe
100 #define QLC_83XX_LED_RATE 0xff
101 #define QLC_83XX_LED_ACT (1 << 10)
102 #define QLC_83XX_LED_MOD (0 << 13)
103 #define QLC_83XX_LED_CONFIG (QLC_83XX_LED_RATE | QLC_83XX_LED_ACT | \
106 #define QLC_83XX_10M_LINK 1
107 #define QLC_83XX_100M_LINK 2
108 #define QLC_83XX_1G_LINK 3
109 #define QLC_83XX_10G_LINK 4
110 #define QLC_83XX_STAT_TX 3
111 #define QLC_83XX_STAT_RX 2
112 #define QLC_83XX_STAT_MAC 1
113 #define QLC_83XX_TX_STAT_REGS 14
114 #define QLC_83XX_RX_STAT_REGS 40
115 #define QLC_83XX_MAC_STAT_REGS 80
117 #define QLC_83XX_GET_FUNC_PRIVILEGE(VAL, FN) (0x3 & ((VAL) >> (FN * 2)))
118 #define QLC_83XX_SET_FUNC_OPMODE(VAL, FN) ((VAL) << (FN * 2))
119 #define QLC_83XX_DEFAULT_OPMODE 0x55555555
120 #define QLC_83XX_PRIVLEGED_FUNC 0x1
121 #define QLC_83XX_VIRTUAL_FUNC 0x2
123 #define QLC_83XX_LB_MAX_FILTERS 2048
124 #define QLC_83XX_LB_BUCKET_SIZE 256
125 #define QLC_83XX_MINIMUM_VECTOR 3
127 #define QLC_83XX_GET_FUNC_MODE_FROM_NPAR_INFO(val) (val & 0x80000000)
128 #define QLC_83XX_GET_LRO_CAPABILITY(val) (val & 0x20)
129 #define QLC_83XX_GET_LSO_CAPABILITY(val) (val & 0x40)
130 #define QLC_83XX_GET_LSO_CAPABILITY(val) (val & 0x40)
131 #define QLC_83XX_GET_HW_LRO_CAPABILITY(val) (val & 0x400)
132 #define QLC_83XX_GET_VLAN_ALIGN_CAPABILITY(val) (val & 0x4000)
133 #define QLC_83XX_VIRTUAL_NIC_MODE 0xFF
134 #define QLC_83XX_DEFAULT_MODE 0x0
135 #define QLCNIC_BRDTYPE_83XX_10G 0x0083
137 #define QLC_83XX_FLASH_SPI_STATUS 0x2808E010
138 #define QLC_83XX_FLASH_SPI_CONTROL 0x2808E014
139 #define QLC_83XX_FLASH_STATUS 0x42100004
140 #define QLC_83XX_FLASH_CONTROL 0x42110004
141 #define QLC_83XX_FLASH_ADDR 0x42110008
142 #define QLC_83XX_FLASH_WRDATA 0x4211000C
143 #define QLC_83XX_FLASH_RDDATA 0x42110018
144 #define QLC_83XX_FLASH_DIRECT_WINDOW 0x42110030
145 #define QLC_83XX_FLASH_DIRECT_DATA(DATA) (0x42150000 | (0x0000FFFF&DATA))
146 #define QLC_83XX_FLASH_SECTOR_ERASE_CMD 0xdeadbeef
147 #define QLC_83XX_FLASH_WRITE_CMD 0xdacdacda
148 #define QLC_83XX_FLASH_BULK_WRITE_CMD 0xcadcadca
149 #define QLC_83XX_FLASH_READ_RETRY_COUNT 5000
150 #define QLC_83XX_FLASH_STATUS_READY 0x6
151 #define QLC_83XX_FLASH_BULK_WRITE_MIN 2
152 #define QLC_83XX_FLASH_BULK_WRITE_MAX 64
153 #define QLC_83XX_FLASH_STATUS_REG_POLL_DELAY 1
154 #define QLC_83XX_ERASE_MODE 1
155 #define QLC_83XX_WRITE_MODE 2
156 #define QLC_83XX_BULK_WRITE_MODE 3
157 #define QLC_83XX_FLASH_FDT_WRITE_DEF_SIG 0xFD0100
158 #define QLC_83XX_FLASH_FDT_ERASE_DEF_SIG 0xFD0300
159 #define QLC_83XX_FLASH_FDT_READ_MFG_ID_VAL 0xFD009F
160 #define QLC_83XX_FLASH_OEM_ERASE_SIG 0xFD03D8
161 #define QLC_83XX_FLASH_OEM_WRITE_SIG 0xFD0101
162 #define QLC_83XX_FLASH_OEM_READ_SIG 0xFD0005
163 #define QLC_83XX_FLASH_ADDR_TEMP_VAL 0x00800000
164 #define QLC_83XX_FLASH_ADDR_SECOND_TEMP_VAL 0x00800001
165 #define QLC_83XX_FLASH_WRDATA_DEF 0x0
166 #define QLC_83XX_FLASH_READ_CTRL 0x3F
167 #define QLC_83XX_FLASH_SPI_CTRL 0x4
168 #define QLC_83XX_FLASH_FIRST_ERASE_MS_VAL 0x2
169 #define QLC_83XX_FLASH_SECOND_ERASE_MS_VAL 0x5
170 #define QLC_83XX_FLASH_LAST_ERASE_MS_VAL 0x3D
171 #define QLC_83XX_FLASH_FIRST_MS_PATTERN 0x43
172 #define QLC_83XX_FLASH_SECOND_MS_PATTERN 0x7F
173 #define QLC_83XX_FLASH_LAST_MS_PATTERN 0x7D
174 #define QLC_83xx_FLASH_MAX_WAIT_USEC 100
175 #define QLC_83XX_FLASH_LOCK_TIMEOUT 10000
177 /* Additional registers in 83xx */
178 enum qlc_83xx_ext_regs {
179 QLCNIC_GLOBAL_RESET = 0,
182 QLCNIC_HOST_MBX_CTRL,
184 QLCNIC_BOOTLOADER_ADDR,
185 QLCNIC_BOOTLOADER_SIZE,
186 QLCNIC_FW_IMAGE_ADDR,
187 QLCNIC_MBX_INTR_ENBL,
190 QLC_83XX_IDC_MAJ_VERSION,
191 QLC_83XX_IDC_DEV_STATE,
192 QLC_83XX_IDC_DRV_PRESENCE,
193 QLC_83XX_IDC_DRV_ACK,
195 QLC_83XX_IDC_DRV_AUDIT,
196 QLC_83XX_IDC_MIN_VERSION,
197 QLC_83XX_RECOVER_DRV_LOCK,
214 QLC_83XX_IDC_DEV_PARTITION_INFO_1,
215 QLC_83XX_IDC_DEV_PARTITION_INFO_2,
216 QLC_83XX_DRV_OP_MODE,
220 QLC_83XX_DRV_LOCK_ID,
225 int qlcnic_83xx_get_fw_version(struct qlcnic_adapter *);
226 int qlcnic_83xx_mbx_op(struct qlcnic_adapter *, struct qlcnic_cmd_args *);
227 int qlcnic_83xx_setup_intr(struct qlcnic_adapter *, u8);
228 void qlcnic_83xx_get_func_no(struct qlcnic_adapter *);
229 int qlcnic_83xx_cam_lock(struct qlcnic_adapter *);
230 void qlcnic_83xx_cam_unlock(struct qlcnic_adapter *);
231 int qlcnic_send_ctrl_op(struct qlcnic_adapter *, struct qlcnic_cmd_args *, u32);
232 void qlcnic_83xx_add_sysfs(struct qlcnic_adapter *);
233 void qlcnic_83xx_remove_sysfs(struct qlcnic_adapter *);
234 void qlcnic_83xx_write_crb(struct qlcnic_adapter *, char *, loff_t, size_t);
235 void qlcnic_83xx_read_crb(struct qlcnic_adapter *, char *, loff_t, size_t);
236 int qlcnic_83xx_rd_reg_indirect(struct qlcnic_adapter *, ulong);
237 int qlcnic_83xx_wrt_reg_indirect(struct qlcnic_adapter *, ulong, u32);
238 void qlcnic_83xx_process_rcv_diag(struct qlcnic_adapter *, int, u64 []);
239 int qlcnic_83xx_nic_set_promisc(struct qlcnic_adapter *, u32);
240 int qlcnic_83xx_set_lb_mode(struct qlcnic_adapter *, u8);
241 int qlcnic_83xx_clear_lb_mode(struct qlcnic_adapter *, u8);
242 int qlcnic_83xx_config_hw_lro(struct qlcnic_adapter *, int);
243 int qlcnic_83xx_config_rss(struct qlcnic_adapter *, int);
244 int qlcnic_83xx_config_intr_coalesce(struct qlcnic_adapter *);
245 void qlcnic_83xx_change_l2_filter(struct qlcnic_adapter *, u64 *, __le16);
246 int qlcnic_83xx_get_pci_info(struct qlcnic_adapter *, struct qlcnic_pci_info *);
247 int qlcnic_83xx_set_nic_info(struct qlcnic_adapter *, struct qlcnic_info *);
248 void qlcnic_83xx_register_nic_idc_func(struct qlcnic_adapter *, int);
250 int qlcnic_83xx_napi_add(struct qlcnic_adapter *, struct net_device *);
251 void qlcnic_83xx_napi_del(struct qlcnic_adapter *);
252 void qlcnic_83xx_napi_enable(struct qlcnic_adapter *);
253 void qlcnic_83xx_napi_disable(struct qlcnic_adapter *);
254 int qlcnic_83xx_config_led(struct qlcnic_adapter *, u32, u32);
255 void qlcnic_ind_wr(struct qlcnic_adapter *, u32, u32);
256 int qlcnic_ind_rd(struct qlcnic_adapter *, u32);
257 void qlcnic_83xx_get_stats(struct qlcnic_adapter *,
258 struct ethtool_stats *, u64 *);
259 int qlcnic_83xx_create_rx_ctx(struct qlcnic_adapter *);
260 int qlcnic_83xx_create_tx_ctx(struct qlcnic_adapter *,
261 struct qlcnic_host_tx_ring *, int);
262 int qlcnic_83xx_get_nic_info(struct qlcnic_adapter *, struct qlcnic_info *, u8);
263 int qlcnic_83xx_setup_link_event(struct qlcnic_adapter *, int);
264 void qlcnic_83xx_process_rcv_ring_diag(struct qlcnic_host_sds_ring *);
265 int qlcnic_83xx_config_intrpt(struct qlcnic_adapter *, bool);
266 int qlcnic_83xx_sre_macaddr_change(struct qlcnic_adapter *, u8 *, __le16, u8);
267 int qlcnic_83xx_get_mac_address(struct qlcnic_adapter *, u8 *);
268 void qlcnic_83xx_configure_mac(struct qlcnic_adapter *, u8 *, u8,
269 struct qlcnic_cmd_args *);
270 int qlcnic_83xx_alloc_mbx_args(struct qlcnic_cmd_args *,
271 struct qlcnic_adapter *, u32);
272 void qlcnic_free_mbx_args(struct qlcnic_cmd_args *);
273 void qlcnic_set_npar_data(struct qlcnic_adapter *, const struct qlcnic_info *,
274 struct qlcnic_info *);
275 void qlcnic_83xx_config_intr_coal(struct qlcnic_adapter *);
276 irqreturn_t qlcnic_83xx_handle_aen(int, void *);
277 int qlcnic_83xx_get_port_info(struct qlcnic_adapter *);
278 void qlcnic_83xx_enable_mbx_intrpt(struct qlcnic_adapter *);
279 irqreturn_t qlcnic_83xx_clear_legacy_intr(struct qlcnic_adapter *);
280 irqreturn_t qlcnic_83xx_tmp_intr(int, void *);
281 void qlcnic_83xx_enable_intr(struct qlcnic_adapter *,
282 struct qlcnic_host_sds_ring *);
283 void qlcnic_83xx_check_vf(struct qlcnic_adapter *,
284 const struct pci_device_id *);
285 void qlcnic_83xx_process_aen(struct qlcnic_adapter *);
286 int qlcnic_83xx_get_port_config(struct qlcnic_adapter *);
287 int qlcnic_83xx_set_port_config(struct qlcnic_adapter *);
288 int qlcnic_enable_eswitch(struct qlcnic_adapter *, u8, u8);
289 int qlcnic_83xx_get_nic_configuration(struct qlcnic_adapter *);
290 int qlcnic_83xx_config_default_opmode(struct qlcnic_adapter *);
291 int qlcnic_83xx_setup_mbx_intr(struct qlcnic_adapter *);
292 void qlcnic_83xx_free_mbx_intr(struct qlcnic_adapter *);
293 void qlcnic_83xx_register_map(struct qlcnic_hardware_context *);
294 void qlcnic_83xx_idc_aen_work(struct work_struct *);
295 void qlcnic_83xx_config_ipaddr(struct qlcnic_adapter *, __be32, int);
297 int qlcnic_83xx_erase_flash_sector(struct qlcnic_adapter *, u32);
298 int qlcnic_83xx_flash_bulk_write(struct qlcnic_adapter *, u32, u32 *, int);
299 int qlcnic_83xx_flash_write32(struct qlcnic_adapter *, u32, u32 *);
300 int qlcnic_83xx_lock_flash(struct qlcnic_adapter *);
301 void qlcnic_83xx_unlock_flash(struct qlcnic_adapter *);
302 int qlcnic_83xx_save_flash_status(struct qlcnic_adapter *);
303 int qlcnic_83xx_restore_flash_status(struct qlcnic_adapter *, int);
304 int qlcnic_83xx_read_flash_mfg_id(struct qlcnic_adapter *);
305 int qlcnic_83xx_read_flash_descriptor_table(struct qlcnic_adapter *);