drivers/net/ethernet/intel/ixgbe/ixgbe_main.c

   1 /*******************************************************************************
   2
   3   Intel 10 Gigabit PCI Express Linux driver
   4   Copyright(c) 1999 - 2014 Intel Corporation.
   5
   6   This program is free software; you can redistribute it and/or modify it
   7   under the terms and conditions of the GNU General Public License,
   8   version 2, as published by the Free Software Foundation.
   9
  10   This program is distributed in the hope it will be useful, but WITHOUT
  11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13   more details.
  14
  15   You should have received a copy of the GNU General Public License along with
  16   this program; if not, write to the Free Software Foundation, Inc.,
  17   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  18
  19   The full GNU General Public License is included in this distribution in
  20   the file called "COPYING".
  21
  22   Contact Information:
  23   Linux NICS <linux.nics@intel.com>
  24   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  25   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  26
  27 *******************************************************************************/
  28
  29 #include <linux/types.h>
  30 #include <linux/module.h>
  31 #include <linux/pci.h>
  32 #include <linux/netdevice.h>
  33 #include <linux/vmalloc.h>
  34 #include <linux/string.h>
  35 #include <linux/in.h>
  36 #include <linux/interrupt.h>
  37 #include <linux/ip.h>
  38 #include <linux/tcp.h>
  39 #include <linux/sctp.h>
  40 #include <linux/pkt_sched.h>
  41 #include <linux/ipv6.h>
  42 #include <linux/slab.h>
  43 #include <net/checksum.h>
  44 #include <net/ip6_checksum.h>
  45 #include <linux/etherdevice.h>
  46 #include <linux/ethtool.h>
  47 #include <linux/if.h>
  48 #include <linux/if_vlan.h>
  49 #include <linux/if_macvlan.h>
  50 #include <linux/if_bridge.h>
  51 #include <linux/prefetch.h>
  52 #include <scsi/fc/fc_fcoe.h>
  53 #include <net/vxlan.h>
  54
  55 #ifdef CONFIG_OF
  56 #include <linux/of_net.h>
  57 #endif
  58
  59 #ifdef CONFIG_SPARC
  60 #include <asm/idprom.h>
  61 #include <asm/prom.h>
  62 #endif
  63
  64 #include "ixgbe.h"
  65 #include "ixgbe_common.h"
  66 #include "ixgbe_dcb_82599.h"
  67 #include "ixgbe_sriov.h"
  68
  69 char ixgbe_driver_name[] = "ixgbe";
  70 static const char ixgbe_driver_string[] =
  71                               "Intel(R) 10 Gigabit PCI Express Network Driver";
  72 #ifdef IXGBE_FCOE
  73 char ixgbe_default_device_descr[] =
  74                               "Intel(R) 10 Gigabit Network Connection";
  75 #else
  76 static char ixgbe_default_device_descr[] =
  77                               "Intel(R) 10 Gigabit Network Connection";
  78 #endif
  79 #define DRV_VERSION "4.0.1-k"
  80 const char ixgbe_driver_version[] = DRV_VERSION;
  81 static const char ixgbe_copyright[] =
  82                                 "Copyright (c) 1999-2014 Intel Corporation.";
  83
  84 static const char ixgbe_overheat_msg[] = "Network adapter has been stopped because it has over heated. Restart the computer. If the problem persists, power off the system and replace the adapter";
  85
  86 static const struct ixgbe_info *ixgbe_info_tbl[] = {
  87         [board_82598]           = &ixgbe_82598_info,
  88         [board_82599]           = &ixgbe_82599_info,
  89         [board_X540]            = &ixgbe_X540_info,
  90         [board_X550]            = &ixgbe_X550_info,
  91         [board_X550EM_x]        = &ixgbe_X550EM_x_info,
  92 };
  93
  94 /* ixgbe_pci_tbl - PCI Device ID Table
  95  *
  96  * Wildcard entries (PCI_ANY_ID) should come last
  97  * Last entry must be all 0s
  98  *
  99  * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
 100  *   Class, Class Mask, private data (not used) }
 101  */
 102 static const struct pci_device_id ixgbe_pci_tbl[] = {
 103         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598), board_82598 },
 104         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_DUAL_PORT), board_82598 },
 105         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_SINGLE_PORT), board_82598 },
 106         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT), board_82598 },
 107         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT2), board_82598 },
 108         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_CX4), board_82598 },
 109         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_CX4_DUAL_PORT), board_82598 },
 110         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_DA_DUAL_PORT), board_82598 },
 111         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM), board_82598 },
 112         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_XF_LR), board_82598 },
 113         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_SFP_LOM), board_82598 },
 114         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_BX), board_82598 },
 115         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4), board_82599 },
 116         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_XAUI_LOM), board_82599 },
 117         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KR), board_82599 },
 118         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP), board_82599 },
 119         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_EM), board_82599 },
 120         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4_MEZZ), board_82599 },
 121         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_CX4), board_82599 },
 122         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_BACKPLANE_FCOE), board_82599 },
 123         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_FCOE), board_82599 },
 124         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_T3_LOM), board_82599 },
 125         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_COMBO_BACKPLANE), board_82599 },
 126         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540T), board_X540 },
 127         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_SF2), board_82599 },
 128         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_LS), board_82599 },
 129         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_QSFP_SF_QP), board_82599 },
 130         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599EN_SFP), board_82599 },
 131         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_SF_QP), board_82599 },
 132         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540T1), board_X540 },
 133         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550T), board_X550},
 134         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_KX4), board_X550EM_x},
 135         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_KR), board_X550EM_x},
 136         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_10G_T), board_X550EM_x},
 137         /* required last entry */
 138         {0, }
 139 };
 140 MODULE_DEVICE_TABLE(pci, ixgbe_pci_tbl);
 141
 142 #ifdef CONFIG_IXGBE_DCA
 143 static int ixgbe_notify_dca(struct notifier_block *, unsigned long event,
 144                             void *p);
 145 static struct notifier_block dca_notifier = {
 146         .notifier_call = ixgbe_notify_dca,
 147         .next          = NULL,
 148         .priority      = 0
 149 };
 150 #endif
 151
 152 #ifdef CONFIG_PCI_IOV
 153 static unsigned int max_vfs;
 154 module_param(max_vfs, uint, 0);
 155 MODULE_PARM_DESC(max_vfs,
 156                  "Maximum number of virtual functions to allocate per physical function - default is zero and maximum value is 63. (Deprecated)");
 157 #endif /* CONFIG_PCI_IOV */
 158
 159 static unsigned int allow_unsupported_sfp;
 160 module_param(allow_unsupported_sfp, uint, 0);
 161 MODULE_PARM_DESC(allow_unsupported_sfp,
 162                  "Allow unsupported and untested SFP+ modules on 82599-based adapters");
 163
 164 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
 165 static int debug = -1;
 166 module_param(debug, int, 0);
 167 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
 168
 169 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
 170 MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver");
 171 MODULE_LICENSE("GPL");
 172 MODULE_VERSION(DRV_VERSION);
 173
 174 static bool ixgbe_check_cfg_remove(struct ixgbe_hw *hw, struct pci_dev *pdev);
 175
 176 static int ixgbe_read_pci_cfg_word_parent(struct ixgbe_adapter *adapter,
 177                                           u32 reg, u16 *value)
 178 {
 179         struct pci_dev *parent_dev;
 180         struct pci_bus *parent_bus;
 181
 182         parent_bus = adapter->pdev->bus->parent;
 183         if (!parent_bus)
 184                 return -1;
 185
 186         parent_dev = parent_bus->self;
 187         if (!parent_dev)
 188                 return -1;
 189
 190         if (!pci_is_pcie(parent_dev))
 191                 return -1;
 192
 193         pcie_capability_read_word(parent_dev, reg, value);
 194         if (*value == IXGBE_FAILED_READ_CFG_WORD &&
 195             ixgbe_check_cfg_remove(&adapter->hw, parent_dev))
 196                 return -1;
 197         return 0;
 198 }
 199
 200 static s32 ixgbe_get_parent_bus_info(struct ixgbe_adapter *adapter)
 201 {
 202         struct ixgbe_hw *hw = &adapter->hw;
 203         u16 link_status = 0;
 204         int err;
 205
 206         hw->bus.type = ixgbe_bus_type_pci_express;
 207
 208         /* Get the negotiated link width and speed from PCI config space of the
 209          * parent, as this device is behind a switch
 210          */
 211         err = ixgbe_read_pci_cfg_word_parent(adapter, 18, &link_status);
 212
 213         /* assume caller will handle error case */
 214         if (err)
 215                 return err;
 216
 217         hw->bus.width = ixgbe_convert_bus_width(link_status);
 218         hw->bus.speed = ixgbe_convert_bus_speed(link_status);
 219
 220         return 0;
 221 }
 222
 223 /**
 224  * ixgbe_check_from_parent - Determine whether PCIe info should come from parent
 225  * @hw: hw specific details
 226  *
 227  * This function is used by probe to determine whether a device's PCI-Express
 228  * bandwidth details should be gathered from the parent bus instead of from the
 229  * device. Used to ensure that various locations all have the correct device ID
 230  * checks.
 231  */
 232 static inline bool ixgbe_pcie_from_parent(struct ixgbe_hw *hw)
 233 {
 234         switch (hw->device_id) {
 235         case IXGBE_DEV_ID_82599_SFP_SF_QP:
 236         case IXGBE_DEV_ID_82599_QSFP_SF_QP:
 237                 return true;
 238         default:
 239                 return false;
 240         }
 241 }
 242
 243 static void ixgbe_check_minimum_link(struct ixgbe_adapter *adapter,
 244                                      int expected_gts)
 245 {
 246         int max_gts = 0;
 247         enum pci_bus_speed speed = PCI_SPEED_UNKNOWN;
 248         enum pcie_link_width width = PCIE_LNK_WIDTH_UNKNOWN;
 249         struct pci_dev *pdev;
 250
 251         /* determine whether to use the parent device */
 252         if (ixgbe_pcie_from_parent(&adapter->hw))
 253                 pdev = adapter->pdev->bus->parent->self;
 254         else
 255                 pdev = adapter->pdev;
 256
 257         if (pcie_get_minimum_link(pdev, &speed, &width) ||
 258             speed == PCI_SPEED_UNKNOWN || width == PCIE_LNK_WIDTH_UNKNOWN) {
 259                 e_dev_warn("Unable to determine PCI Express bandwidth.\n");
 260                 return;
 261         }
 262
 263         switch (speed) {
 264         case PCIE_SPEED_2_5GT:
 265                 /* 8b/10b encoding reduces max throughput by 20% */
 266                 max_gts = 2 * width;
 267                 break;
 268         case PCIE_SPEED_5_0GT:
 269                 /* 8b/10b encoding reduces max throughput by 20% */
 270                 max_gts = 4 * width;
 271                 break;
 272         case PCIE_SPEED_8_0GT:
 273                 /* 128b/130b encoding reduces throughput by less than 2% */
 274                 max_gts = 8 * width;
 275                 break;
 276         default:
 277                 e_dev_warn("Unable to determine PCI Express bandwidth.\n");
 278                 return;
 279         }
 280
 281         e_dev_info("PCI Express bandwidth of %dGT/s available\n",
 282                    max_gts);
 283         e_dev_info("(Speed:%s, Width: x%d, Encoding Loss:%s)\n",
 284                    (speed == PCIE_SPEED_8_0GT ? "8.0GT/s" :
 285                     speed == PCIE_SPEED_5_0GT ? "5.0GT/s" :
 286                     speed == PCIE_SPEED_2_5GT ? "2.5GT/s" :
 287                     "Unknown"),
 288                    width,
 289                    (speed == PCIE_SPEED_2_5GT ? "20%" :
 290                     speed == PCIE_SPEED_5_0GT ? "20%" :
 291                     speed == PCIE_SPEED_8_0GT ? "<2%" :
 292                     "Unknown"));
 293
 294         if (max_gts < expected_gts) {
 295                 e_dev_warn("This is not sufficient for optimal performance of this card.\n");
 296                 e_dev_warn("For optimal performance, at least %dGT/s of bandwidth is required.\n",
 297                         expected_gts);
 298                 e_dev_warn("A slot with more lanes and/or higher speed is suggested.\n");
 299         }
 300 }
 301
 302 static void ixgbe_service_event_schedule(struct ixgbe_adapter *adapter)
 303 {
 304         if (!test_bit(__IXGBE_DOWN, &adapter->state) &&
 305             !test_bit(__IXGBE_REMOVING, &adapter->state) &&
 306             !test_and_set_bit(__IXGBE_SERVICE_SCHED, &adapter->state))
 307                 schedule_work(&adapter->service_task);
 308 }
 309
 310 static void ixgbe_remove_adapter(struct ixgbe_hw *hw)
 311 {
 312         struct ixgbe_adapter *adapter = hw->back;
 313
 314         if (!hw->hw_addr)
 315                 return;
 316         hw->hw_addr = NULL;
 317         e_dev_err("Adapter removed\n");
 318         if (test_bit(__IXGBE_SERVICE_INITED, &adapter->state))
 319                 ixgbe_service_event_schedule(adapter);
 320 }
 321
 322 static void ixgbe_check_remove(struct ixgbe_hw *hw, u32 reg)
 323 {
 324         u32 value;
 325
 326         /* The following check not only optimizes a bit by not
 327          * performing a read on the status register when the
 328          * register just read was a status register read that
 329          * returned IXGBE_FAILED_READ_REG. It also blocks any
 330          * potential recursion.
 331          */
 332         if (reg == IXGBE_STATUS) {
 333                 ixgbe_remove_adapter(hw);
 334                 return;
 335         }
 336         value = ixgbe_read_reg(hw, IXGBE_STATUS);
 337         if (value == IXGBE_FAILED_READ_REG)
 338                 ixgbe_remove_adapter(hw);
 339 }
 340
 341 /**
 342  * ixgbe_read_reg - Read from device register
 343  * @hw: hw specific details
 344  * @reg: offset of register to read
 345  *
 346  * Returns : value read or IXGBE_FAILED_READ_REG if removed
 347  *
 348  * This function is used to read device registers. It checks for device
 349  * removal by confirming any read that returns all ones by checking the
 350  * status register value for all ones. This function avoids reading from
 351  * the hardware if a removal was previously detected in which case it
 352  * returns IXGBE_FAILED_READ_REG (all ones).
 353  */
 354 u32 ixgbe_read_reg(struct ixgbe_hw *hw, u32 reg)
 355 {
 356         u8 __iomem *reg_addr = ACCESS_ONCE(hw->hw_addr);
 357         u32 value;
 358
 359         if (ixgbe_removed(reg_addr))
 360                 return IXGBE_FAILED_READ_REG;
 361         value = readl(reg_addr + reg);
 362         if (unlikely(value == IXGBE_FAILED_READ_REG))
 363                 ixgbe_check_remove(hw, reg);
 364         return value;
 365 }
 366
 367 static bool ixgbe_check_cfg_remove(struct ixgbe_hw *hw, struct pci_dev *pdev)
 368 {
 369         u16 value;
 370
 371         pci_read_config_word(pdev, PCI_VENDOR_ID, &value);
 372         if (value == IXGBE_FAILED_READ_CFG_WORD) {
 373                 ixgbe_remove_adapter(hw);
 374                 return true;
 375         }
 376         return false;
 377 }
 378
 379 u16 ixgbe_read_pci_cfg_word(struct ixgbe_hw *hw, u32 reg)
 380 {
 381         struct ixgbe_adapter *adapter = hw->back;
 382         u16 value;
 383
 384         if (ixgbe_removed(hw->hw_addr))
 385                 return IXGBE_FAILED_READ_CFG_WORD;
 386         pci_read_config_word(adapter->pdev, reg, &value);
 387         if (value == IXGBE_FAILED_READ_CFG_WORD &&
 388             ixgbe_check_cfg_remove(hw, adapter->pdev))
 389                 return IXGBE_FAILED_READ_CFG_WORD;
 390         return value;
 391 }
 392
 393 #ifdef CONFIG_PCI_IOV
 394 static u32 ixgbe_read_pci_cfg_dword(struct ixgbe_hw *hw, u32 reg)
 395 {
 396         struct ixgbe_adapter *adapter = hw->back;
 397         u32 value;
 398
 399         if (ixgbe_removed(hw->hw_addr))
 400                 return IXGBE_FAILED_READ_CFG_DWORD;
 401         pci_read_config_dword(adapter->pdev, reg, &value);
 402         if (value == IXGBE_FAILED_READ_CFG_DWORD &&
 403             ixgbe_check_cfg_remove(hw, adapter->pdev))
 404                 return IXGBE_FAILED_READ_CFG_DWORD;
 405         return value;
 406 }
 407 #endif /* CONFIG_PCI_IOV */
 408
 409 void ixgbe_write_pci_cfg_word(struct ixgbe_hw *hw, u32 reg, u16 value)
 410 {
 411         struct ixgbe_adapter *adapter = hw->back;
 412
 413         if (ixgbe_removed(hw->hw_addr))
 414                 return;
 415         pci_write_config_word(adapter->pdev, reg, value);
 416 }
 417
 418 static void ixgbe_service_event_complete(struct ixgbe_adapter *adapter)
 419 {
 420         BUG_ON(!test_bit(__IXGBE_SERVICE_SCHED, &adapter->state));
 421
 422         /* flush memory to make sure state is correct before next watchdog */
 423         smp_mb__before_atomic();
 424         clear_bit(__IXGBE_SERVICE_SCHED, &adapter->state);
 425 }
 426
 427 struct ixgbe_reg_info {
 428         u32 ofs;
 429         char *name;
 430 };
 431
 432 static const struct ixgbe_reg_info ixgbe_reg_info_tbl[] = {
 433
 434         /* General Registers */
 435         {IXGBE_CTRL, "CTRL"},
 436         {IXGBE_STATUS, "STATUS"},
 437         {IXGBE_CTRL_EXT, "CTRL_EXT"},
 438
 439         /* Interrupt Registers */
 440         {IXGBE_EICR, "EICR"},
 441
 442         /* RX Registers */
 443         {IXGBE_SRRCTL(0), "SRRCTL"},
 444         {IXGBE_DCA_RXCTRL(0), "DRXCTL"},
 445         {IXGBE_RDLEN(0), "RDLEN"},
 446         {IXGBE_RDH(0), "RDH"},
 447         {IXGBE_RDT(0), "RDT"},
 448         {IXGBE_RXDCTL(0), "RXDCTL"},
 449         {IXGBE_RDBAL(0), "RDBAL"},
 450         {IXGBE_RDBAH(0), "RDBAH"},
 451
 452         /* TX Registers */
 453         {IXGBE_TDBAL(0), "TDBAL"},
 454         {IXGBE_TDBAH(0), "TDBAH"},
 455         {IXGBE_TDLEN(0), "TDLEN"},
 456         {IXGBE_TDH(0), "TDH"},
 457         {IXGBE_TDT(0), "TDT"},
 458         {IXGBE_TXDCTL(0), "TXDCTL"},
 459
 460         /* List Terminator */
 461         { .name = NULL }
 462 };
 463
 464
 465 /*
 466  * ixgbe_regdump - register printout routine
 467  */
 468 static void ixgbe_regdump(struct ixgbe_hw *hw, struct ixgbe_reg_info *reginfo)
 469 {
 470         int i = 0, j = 0;
 471         char rname[16];
 472         u32 regs[64];
 473
 474         switch (reginfo->ofs) {
 475         case IXGBE_SRRCTL(0):
 476                 for (i = 0; i < 64; i++)
 477                         regs[i] = IXGBE_READ_REG(hw, IXGBE_SRRCTL(i));
 478                 break;
 479         case IXGBE_DCA_RXCTRL(0):
 480                 for (i = 0; i < 64; i++)
 481                         regs[i] = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i));
 482                 break;
 483         case IXGBE_RDLEN(0):
 484                 for (i = 0; i < 64; i++)
 485                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDLEN(i));
 486                 break;
 487         case IXGBE_RDH(0):
 488                 for (i = 0; i < 64; i++)
 489                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDH(i));
 490                 break;
 491         case IXGBE_RDT(0):
 492                 for (i = 0; i < 64; i++)
 493                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDT(i));
 494                 break;
 495         case IXGBE_RXDCTL(0):
 496                 for (i = 0; i < 64; i++)
 497                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RXDCTL(i));
 498                 break;
 499         case IXGBE_RDBAL(0):
 500                 for (i = 0; i < 64; i++)
 501                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAL(i));
 502                 break;
 503         case IXGBE_RDBAH(0):
 504                 for (i = 0; i < 64; i++)
 505                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAH(i));
 506                 break;
 507         case IXGBE_TDBAL(0):
 508                 for (i = 0; i < 64; i++)
 509                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAL(i));
 510                 break;
 511         case IXGBE_TDBAH(0):
 512                 for (i = 0; i < 64; i++)
 513                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAH(i));
 514                 break;
 515         case IXGBE_TDLEN(0):
 516                 for (i = 0; i < 64; i++)
 517                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDLEN(i));
 518                 break;
 519         case IXGBE_TDH(0):
 520                 for (i = 0; i < 64; i++)
 521                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDH(i));
 522                 break;
 523         case IXGBE_TDT(0):
 524                 for (i = 0; i < 64; i++)
 525                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDT(i));
 526                 break;
 527         case IXGBE_TXDCTL(0):
 528                 for (i = 0; i < 64; i++)
 529                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TXDCTL(i));
 530                 break;
 531         default:
 532                 pr_info("%-15s %08x\n", reginfo->name,
 533                         IXGBE_READ_REG(hw, reginfo->ofs));
 534                 return;
 535         }
 536
 537         for (i = 0; i < 8; i++) {
 538                 snprintf(rname, 16, "%s[%d-%d]", reginfo->name, i*8, i*8+7);
 539                 pr_err("%-15s", rname);
 540                 for (j = 0; j < 8; j++)
 541                         pr_cont(" %08x", regs[i*8+j]);
 542                 pr_cont("\n");
 543         }
 544
 545 }
 546
 547 /*
 548  * ixgbe_dump - Print registers, tx-rings and rx-rings
 549  */
 550 static void ixgbe_dump(struct ixgbe_adapter *adapter)
 551 {
 552         struct net_device *netdev = adapter->netdev;
 553         struct ixgbe_hw *hw = &adapter->hw;
 554         struct ixgbe_reg_info *reginfo;
 555         int n = 0;
 556         struct ixgbe_ring *tx_ring;
 557         struct ixgbe_tx_buffer *tx_buffer;
 558         union ixgbe_adv_tx_desc *tx_desc;
 559         struct my_u0 { u64 a; u64 b; } *u0;
 560         struct ixgbe_ring *rx_ring;
 561         union ixgbe_adv_rx_desc *rx_desc;
 562         struct ixgbe_rx_buffer *rx_buffer_info;
 563         u32 staterr;
 564         int i = 0;
 565
 566         if (!netif_msg_hw(adapter))
 567                 return;
 568
 569         /* Print netdevice Info */
 570         if (netdev) {
 571                 dev_info(&adapter->pdev->dev, "Net device Info\n");
 572                 pr_info("Device Name     state            "
 573                         "trans_start      last_rx\n");
 574                 pr_info("%-15s %016lX %016lX %016lX\n",
 575                         netdev->name,
 576                         netdev->state,
 577                         netdev->trans_start,
 578                         netdev->last_rx);
 579         }
 580
 581         /* Print Registers */
 582         dev_info(&adapter->pdev->dev, "Register Dump\n");
 583         pr_info(" Register Name   Value\n");
 584         for (reginfo = (struct ixgbe_reg_info *)ixgbe_reg_info_tbl;
 585              reginfo->name; reginfo++) {
 586                 ixgbe_regdump(hw, reginfo);
 587         }
 588
 589         /* Print TX Ring Summary */
 590         if (!netdev || !netif_running(netdev))
 591                 return;
 592
 593         dev_info(&adapter->pdev->dev, "TX Rings Summary\n");
 594         pr_info(" %s     %s              %s        %s\n",
 595                 "Queue [NTU] [NTC] [bi(ntc)->dma  ]",
 596                 "leng", "ntw", "timestamp");
 597         for (n = 0; n < adapter->num_tx_queues; n++) {
 598                 tx_ring = adapter->tx_ring[n];
 599                 tx_buffer = &tx_ring->tx_buffer_info[tx_ring->next_to_clean];
 600                 pr_info(" %5d %5X %5X %016llX %08X %p %016llX\n",
 601                            n, tx_ring->next_to_use, tx_ring->next_to_clean,
 602                            (u64)dma_unmap_addr(tx_buffer, dma),
 603                            dma_unmap_len(tx_buffer, len),
 604                            tx_buffer->next_to_watch,
 605                            (u64)tx_buffer->time_stamp);
 606         }
 607
 608         /* Print TX Rings */
 609         if (!netif_msg_tx_done(adapter))
 610                 goto rx_ring_summary;
 611
 612         dev_info(&adapter->pdev->dev, "TX Rings Dump\n");
 613
 614         /* Transmit Descriptor Formats
 615          *
 616          * 82598 Advanced Transmit Descriptor
 617          *   +--------------------------------------------------------------+
 618          * 0 |         Buffer Address [63:0]                                |
 619          *   +--------------------------------------------------------------+
 620          * 8 |  PAYLEN  | POPTS  | IDX | STA | DCMD  |DTYP |  RSV |  DTALEN |
 621          *   +--------------------------------------------------------------+
 622          *   63       46 45    40 39 36 35 32 31   24 23 20 19              0
 623          *
 624          * 82598 Advanced Transmit Descriptor (Write-Back Format)
 625          *   +--------------------------------------------------------------+
 626          * 0 |                          RSV [63:0]                          |
 627          *   +--------------------------------------------------------------+
 628          * 8 |            RSV           |  STA  |          NXTSEQ           |
 629          *   +--------------------------------------------------------------+
 630          *   63                       36 35   32 31                         0
 631          *
 632          * 82599+ Advanced Transmit Descriptor
 633          *   +--------------------------------------------------------------+
 634          * 0 |         Buffer Address [63:0]                                |
 635          *   +--------------------------------------------------------------+
 636          * 8 |PAYLEN  |POPTS|CC|IDX  |STA  |DCMD  |DTYP |MAC  |RSV  |DTALEN |
 637          *   +--------------------------------------------------------------+
 638          *   63     46 45 40 39 38 36 35 32 31  24 23 20 19 18 17 16 15     0
 639          *
 640          * 82599+ Advanced Transmit Descriptor (Write-Back Format)
 641          *   +--------------------------------------------------------------+
 642          * 0 |                          RSV [63:0]                          |
 643          *   +--------------------------------------------------------------+
 644          * 8 |            RSV           |  STA  |           RSV             |
 645          *   +--------------------------------------------------------------+
 646          *   63                       36 35   32 31                         0
 647          */
 648
 649         for (n = 0; n < adapter->num_tx_queues; n++) {
 650                 tx_ring = adapter->tx_ring[n];
 651                 pr_info("------------------------------------\n");
 652                 pr_info("TX QUEUE INDEX = %d\n", tx_ring->queue_index);
 653                 pr_info("------------------------------------\n");
 654                 pr_info("%s%s    %s              %s        %s          %s\n",
 655                         "T [desc]     [address 63:0  ] ",
 656                         "[PlPOIdStDDt Ln] [bi->dma       ] ",
 657                         "leng", "ntw", "timestamp", "bi->skb");
 658
 659                 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
 660                         tx_desc = IXGBE_TX_DESC(tx_ring, i);
 661                         tx_buffer = &tx_ring->tx_buffer_info[i];
 662                         u0 = (struct my_u0 *)tx_desc;
 663                         if (dma_unmap_len(tx_buffer, len) > 0) {
 664                                 pr_info("T [0x%03X]    %016llX %016llX %016llX %08X %p %016llX %p",
 665                                         i,
 666                                         le64_to_cpu(u0->a),
 667                                         le64_to_cpu(u0->b),
 668                                         (u64)dma_unmap_addr(tx_buffer, dma),
 669                                         dma_unmap_len(tx_buffer, len),
 670                                         tx_buffer->next_to_watch,
 671                                         (u64)tx_buffer->time_stamp,
 672                                         tx_buffer->skb);
 673                                 if (i == tx_ring->next_to_use &&
 674                                         i == tx_ring->next_to_clean)
 675                                         pr_cont(" NTC/U\n");
 676                                 else if (i == tx_ring->next_to_use)
 677                                         pr_cont(" NTU\n");
 678                                 else if (i == tx_ring->next_to_clean)
 679                                         pr_cont(" NTC\n");
 680                                 else
 681                                         pr_cont("\n");
 682
 683                                 if (netif_msg_pktdata(adapter) &&
 684                                     tx_buffer->skb)
 685                                         print_hex_dump(KERN_INFO, "",
 686                                                 DUMP_PREFIX_ADDRESS, 16, 1,
 687                                                 tx_buffer->skb->data,
 688                                                 dma_unmap_len(tx_buffer, len),
 689                                                 true);
 690                         }
 691                 }
 692         }
 693
 694         /* Print RX Rings Summary */
 695 rx_ring_summary:
 696         dev_info(&adapter->pdev->dev, "RX Rings Summary\n");
 697         pr_info("Queue [NTU] [NTC]\n");
 698         for (n = 0; n < adapter->num_rx_queues; n++) {
 699                 rx_ring = adapter->rx_ring[n];
 700                 pr_info("%5d %5X %5X\n",
 701                         n, rx_ring->next_to_use, rx_ring->next_to_clean);
 702         }
 703
 704         /* Print RX Rings */
 705         if (!netif_msg_rx_status(adapter))
 706                 return;
 707
 708         dev_info(&adapter->pdev->dev, "RX Rings Dump\n");
 709
 710         /* Receive Descriptor Formats
 711          *
 712          * 82598 Advanced Receive Descriptor (Read) Format
 713          *    63                                           1        0
 714          *    +-----------------------------------------------------+
 715          *  0 |       Packet Buffer Address [63:1]           |A0/NSE|
 716          *    +----------------------------------------------+------+
 717          *  8 |       Header Buffer Address [63:1]           |  DD  |
 718          *    +-----------------------------------------------------+
 719          *
 720          *
 721          * 82598 Advanced Receive Descriptor (Write-Back) Format
 722          *
 723          *   63       48 47    32 31  30      21 20 16 15   4 3     0
 724          *   +------------------------------------------------------+
 725          * 0 |       RSS Hash /  |SPH| HDR_LEN  | RSV |Packet|  RSS |
 726          *   | Packet   | IP     |   |          |     | Type | Type |
 727          *   | Checksum | Ident  |   |          |     |      |      |
 728          *   +------------------------------------------------------+
 729          * 8 | VLAN Tag | Length | Extended Error | Extended Status |
 730          *   +------------------------------------------------------+
 731          *   63       48 47    32 31            20 19               0
 732          *
 733          * 82599+ Advanced Receive Descriptor (Read) Format
 734          *    63                                           1        0
 735          *    +-----------------------------------------------------+
 736          *  0 |       Packet Buffer Address [63:1]           |A0/NSE|
 737          *    +----------------------------------------------+------+
 738          *  8 |       Header Buffer Address [63:1]           |  DD  |
 739          *    +-----------------------------------------------------+
 740          *
 741          *
 742          * 82599+ Advanced Receive Descriptor (Write-Back) Format
 743          *
 744          *   63       48 47    32 31  30      21 20 17 16   4 3     0
 745          *   +------------------------------------------------------+
 746          * 0 |RSS / Frag Checksum|SPH| HDR_LEN  |RSC- |Packet|  RSS |
 747          *   |/ RTT / PCoE_PARAM |   |          | CNT | Type | Type |
 748          *   |/ Flow Dir Flt ID  |   |          |     |      |      |
 749          *   +------------------------------------------------------+
 750          * 8 | VLAN Tag | Length |Extended Error| Xtnd Status/NEXTP |
 751          *   +------------------------------------------------------+
 752          *   63       48 47    32 31          20 19                 0
 753          */
 754
 755         for (n = 0; n < adapter->num_rx_queues; n++) {
 756                 rx_ring = adapter->rx_ring[n];
 757                 pr_info("------------------------------------\n");
 758                 pr_info("RX QUEUE INDEX = %d\n", rx_ring->queue_index);
 759                 pr_info("------------------------------------\n");
 760                 pr_info("%s%s%s",
 761                         "R  [desc]      [ PktBuf     A0] ",
 762                         "[  HeadBuf   DD] [bi->dma       ] [bi->skb       ] ",
 763                         "<-- Adv Rx Read format\n");
 764                 pr_info("%s%s%s",
 765                         "RWB[desc]      [PcsmIpSHl PtRs] ",
 766                         "[vl er S cks ln] ---------------- [bi->skb       ] ",
 767                         "<-- Adv Rx Write-Back format\n");
 768
 769                 for (i = 0; i < rx_ring->count; i++) {
 770                         rx_buffer_info = &rx_ring->rx_buffer_info[i];
 771                         rx_desc = IXGBE_RX_DESC(rx_ring, i);
 772                         u0 = (struct my_u0 *)rx_desc;
 773                         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
 774                         if (staterr & IXGBE_RXD_STAT_DD) {
 775                                 /* Descriptor Done */
 776                                 pr_info("RWB[0x%03X]     %016llX "
 777                                         "%016llX ---------------- %p", i,
 778                                         le64_to_cpu(u0->a),
 779                                         le64_to_cpu(u0->b),
 780                                         rx_buffer_info->skb);
 781                         } else {
 782                                 pr_info("R  [0x%03X]     %016llX "
 783                                         "%016llX %016llX %p", i,
 784                                         le64_to_cpu(u0->a),
 785                                         le64_to_cpu(u0->b),
 786                                         (u64)rx_buffer_info->dma,
 787                                         rx_buffer_info->skb);
 788
 789                                 if (netif_msg_pktdata(adapter) &&
 790                                     rx_buffer_info->dma) {
 791                                         print_hex_dump(KERN_INFO, "",
 792                                            DUMP_PREFIX_ADDRESS, 16, 1,
 793                                            page_address(rx_buffer_info->page) +
 794                                                     rx_buffer_info->page_offset,
 795                                            ixgbe_rx_bufsz(rx_ring), true);
 796                                 }
 797                         }
 798
 799                         if (i == rx_ring->next_to_use)
 800                                 pr_cont(" NTU\n");
 801                         else if (i == rx_ring->next_to_clean)
 802                                 pr_cont(" NTC\n");
 803                         else
 804                                 pr_cont("\n");
 805
 806                 }
 807         }
 808 }
 809
 810 static void ixgbe_release_hw_control(struct ixgbe_adapter *adapter)
 811 {
 812         u32 ctrl_ext;
 813
 814         /* Let firmware take over control of h/w */
 815         ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
 816         IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
 817                         ctrl_ext & ~IXGBE_CTRL_EXT_DRV_LOAD);
 818 }
 819
 820 static void ixgbe_get_hw_control(struct ixgbe_adapter *adapter)
 821 {
 822         u32 ctrl_ext;
 823
 824         /* Let firmware know the driver has taken over */
 825         ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
 826         IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
 827                         ctrl_ext | IXGBE_CTRL_EXT_DRV_LOAD);
 828 }
 829
 830 /**
 831  * ixgbe_set_ivar - set the IVAR registers, mapping interrupt causes to vectors
 832  * @adapter: pointer to adapter struct
 833  * @direction: 0 for Rx, 1 for Tx, -1 for other causes
 834  * @queue: queue to map the corresponding interrupt to
 835  * @msix_vector: the vector to map to the corresponding queue
 836  *
 837  */
 838 static void ixgbe_set_ivar(struct ixgbe_adapter *adapter, s8 direction,
 839                            u8 queue, u8 msix_vector)
 840 {
 841         u32 ivar, index;
 842         struct ixgbe_hw *hw = &adapter->hw;
 843         switch (hw->mac.type) {
 844         case ixgbe_mac_82598EB:
 845                 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
 846                 if (direction == -1)
 847                         direction = 0;
 848                 index = (((direction * 64) + queue) >> 2) & 0x1F;
 849                 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(index));
 850                 ivar &= ~(0xFF << (8 * (queue & 0x3)));
 851                 ivar |= (msix_vector << (8 * (queue & 0x3)));
 852                 IXGBE_WRITE_REG(hw, IXGBE_IVAR(index), ivar);
 853                 break;
 854         case ixgbe_mac_82599EB:
 855         case ixgbe_mac_X540:
 856         case ixgbe_mac_X550:
 857         case ixgbe_mac_X550EM_x:
 858                 if (direction == -1) {
 859                         /* other causes */
 860                         msix_vector |= IXGBE_IVAR_ALLOC_VAL;
 861                         index = ((queue & 1) * 8);
 862                         ivar = IXGBE_READ_REG(&adapter->hw, IXGBE_IVAR_MISC);
 863                         ivar &= ~(0xFF << index);
 864                         ivar |= (msix_vector << index);
 865                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_IVAR_MISC, ivar);
 866                         break;
 867                 } else {
 868                         /* tx or rx causes */
 869                         msix_vector |= IXGBE_IVAR_ALLOC_VAL;
 870                         index = ((16 * (queue & 1)) + (8 * direction));
 871                         ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(queue >> 1));
 872                         ivar &= ~(0xFF << index);
 873                         ivar |= (msix_vector << index);
 874                         IXGBE_WRITE_REG(hw, IXGBE_IVAR(queue >> 1), ivar);
 875                         break;
 876                 }
 877         default:
 878                 break;
 879         }
 880 }
 881
 882 static inline void ixgbe_irq_rearm_queues(struct ixgbe_adapter *adapter,
 883                                           u64 qmask)
 884 {
 885         u32 mask;
 886
 887         switch (adapter->hw.mac.type) {
 888         case ixgbe_mac_82598EB:
 889                 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
 890                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, mask);
 891                 break;
 892         case ixgbe_mac_82599EB:
 893         case ixgbe_mac_X540:
 894         case ixgbe_mac_X550:
 895         case ixgbe_mac_X550EM_x:
 896                 mask = (qmask & 0xFFFFFFFF);
 897                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(0), mask);
 898                 mask = (qmask >> 32);
 899                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(1), mask);
 900                 break;
 901         default:
 902                 break;
 903         }
 904 }
 905
 906 void ixgbe_unmap_and_free_tx_resource(struct ixgbe_ring *ring,
 907                                       struct ixgbe_tx_buffer *tx_buffer)
 908 {
 909         if (tx_buffer->skb) {
 910                 dev_kfree_skb_any(tx_buffer->skb);
 911                 if (dma_unmap_len(tx_buffer, len))
 912                         dma_unmap_single(ring->dev,
 913                                          dma_unmap_addr(tx_buffer, dma),
 914                                          dma_unmap_len(tx_buffer, len),
 915                                          DMA_TO_DEVICE);
 916         } else if (dma_unmap_len(tx_buffer, len)) {
 917                 dma_unmap_page(ring->dev,
 918                                dma_unmap_addr(tx_buffer, dma),
 919                                dma_unmap_len(tx_buffer, len),
 920                                DMA_TO_DEVICE);
 921         }
 922         tx_buffer->next_to_watch = NULL;
 923         tx_buffer->skb = NULL;
 924         dma_unmap_len_set(tx_buffer, len, 0);
 925         /* tx_buffer must be completely set up in the transmit path */
 926 }
 927
 928 static void ixgbe_update_xoff_rx_lfc(struct ixgbe_adapter *adapter)
 929 {
 930         struct ixgbe_hw *hw = &adapter->hw;
 931         struct ixgbe_hw_stats *hwstats = &adapter->stats;
 932         int i;
 933         u32 data;
 934
 935         if ((hw->fc.current_mode != ixgbe_fc_full) &&
 936             (hw->fc.current_mode != ixgbe_fc_rx_pause))
 937                 return;
 938
 939         switch (hw->mac.type) {
 940         case ixgbe_mac_82598EB:
 941                 data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXC);
 942                 break;
 943         default:
 944                 data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXCNT);
 945         }
 946         hwstats->lxoffrxc += data;
 947
 948         /* refill credits (no tx hang) if we received xoff */
 949         if (!data)
 950                 return;
 951
 952         for (i = 0; i < adapter->num_tx_queues; i++)
 953                 clear_bit(__IXGBE_HANG_CHECK_ARMED,
 954                           &adapter->tx_ring[i]->state);
 955 }
 956
 957 static void ixgbe_update_xoff_received(struct ixgbe_adapter *adapter)
 958 {
 959         struct ixgbe_hw *hw = &adapter->hw;
 960         struct ixgbe_hw_stats *hwstats = &adapter->stats;
 961         u32 xoff[8] = {0};
 962         u8 tc;
 963         int i;
 964         bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
 965
 966         if (adapter->ixgbe_ieee_pfc)
 967                 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
 968
 969         if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED) || !pfc_en) {
 970                 ixgbe_update_xoff_rx_lfc(adapter);
 971                 return;
 972         }
 973
 974         /* update stats for each tc, only valid with PFC enabled */
 975         for (i = 0; i < MAX_TX_PACKET_BUFFERS; i++) {
 976                 u32 pxoffrxc;
 977
 978                 switch (hw->mac.type) {
 979                 case ixgbe_mac_82598EB:
 980                         pxoffrxc = IXGBE_READ_REG(hw, IXGBE_PXOFFRXC(i));
 981                         break;
 982                 default:
 983                         pxoffrxc = IXGBE_READ_REG(hw, IXGBE_PXOFFRXCNT(i));
 984                 }
 985                 hwstats->pxoffrxc[i] += pxoffrxc;
 986                 /* Get the TC for given UP */
 987                 tc = netdev_get_prio_tc_map(adapter->netdev, i);
 988                 xoff[tc] += pxoffrxc;
 989         }
 990
 991         /* disarm tx queues that have received xoff frames */
 992         for (i = 0; i < adapter->num_tx_queues; i++) {
 993                 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
 994
 995                 tc = tx_ring->dcb_tc;
 996                 if (xoff[tc])
 997                         clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state);
 998         }
 999 }
1000
1001 static u64 ixgbe_get_tx_completed(struct ixgbe_ring *ring)
1002 {
1003         return ring->stats.packets;
1004 }
1005
1006 static u64 ixgbe_get_tx_pending(struct ixgbe_ring *ring)
1007 {
1008         struct ixgbe_adapter *adapter;
1009         struct ixgbe_hw *hw;
1010         u32 head, tail;
1011
1012         if (ring->l2_accel_priv)
1013                 adapter = ring->l2_accel_priv->real_adapter;
1014         else
1015                 adapter = netdev_priv(ring->netdev);
1016
1017         hw = &adapter->hw;
1018         head = IXGBE_READ_REG(hw, IXGBE_TDH(ring->reg_idx));
1019         tail = IXGBE_READ_REG(hw, IXGBE_TDT(ring->reg_idx));
1020
1021         if (head != tail)
1022                 return (head < tail) ?
1023                         tail - head : (tail + ring->count - head);
1024
1025         return 0;
1026 }
1027
1028 static inline bool ixgbe_check_tx_hang(struct ixgbe_ring *tx_ring)
1029 {
1030         u32 tx_done = ixgbe_get_tx_completed(tx_ring);
1031         u32 tx_done_old = tx_ring->tx_stats.tx_done_old;
1032         u32 tx_pending = ixgbe_get_tx_pending(tx_ring);
1033
1034         clear_check_for_tx_hang(tx_ring);
1035
1036         /*
1037          * Check for a hung queue, but be thorough. This verifies
1038          * that a transmit has been completed since the previous
1039          * check AND there is at least one packet pending. The
1040          * ARMED bit is set to indicate a potential hang. The
1041          * bit is cleared if a pause frame is received to remove
1042          * false hang detection due to PFC or 802.3x frames. By
1043          * requiring this to fail twice we avoid races with
1044          * pfc clearing the ARMED bit and conditions where we
1045          * run the check_tx_hang logic with a transmit completion
1046          * pending but without time to complete it yet.
1047          */
1048         if (tx_done_old == tx_done && tx_pending)
1049                 /* make sure it is true for two checks in a row */
1050                 return test_and_set_bit(__IXGBE_HANG_CHECK_ARMED,
1051                                         &tx_ring->state);
1052         /* update completed stats and continue */
1053         tx_ring->tx_stats.tx_done_old = tx_done;
1054         /* reset the countdown */
1055         clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state);
1056
1057         return false;
1058 }
1059
1060 /**
1061  * ixgbe_tx_timeout_reset - initiate reset due to Tx timeout
1062  * @adapter: driver private struct
1063  **/
1064 static void ixgbe_tx_timeout_reset(struct ixgbe_adapter *adapter)
1065 {
1066
1067         /* Do the reset outside of interrupt context */
1068         if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
1069                 adapter->flags2 |= IXGBE_FLAG2_RESET_REQUESTED;
1070                 e_warn(drv, "initiating reset due to tx timeout\n");
1071                 ixgbe_service_event_schedule(adapter);
1072         }
1073 }
1074
1075 /**
1076  * ixgbe_clean_tx_irq - Reclaim resources after transmit completes
1077  * @q_vector: structure containing interrupt and ring information
1078  * @tx_ring: tx ring to clean
1079  **/
1080 static bool ixgbe_clean_tx_irq(struct ixgbe_q_vector *q_vector,
1081                                struct ixgbe_ring *tx_ring)
1082 {
1083         struct ixgbe_adapter *adapter = q_vector->adapter;
1084         struct ixgbe_tx_buffer *tx_buffer;
1085         union ixgbe_adv_tx_desc *tx_desc;
1086         unsigned int total_bytes = 0, total_packets = 0;
1087         unsigned int budget = q_vector->tx.work_limit;
1088         unsigned int i = tx_ring->next_to_clean;
1089
1090         if (test_bit(__IXGBE_DOWN, &adapter->state))
1091                 return true;
1092
1093         tx_buffer = &tx_ring->tx_buffer_info[i];
1094         tx_desc = IXGBE_TX_DESC(tx_ring, i);
1095         i -= tx_ring->count;
1096
1097         do {
1098                 union ixgbe_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
1099
1100                 /* if next_to_watch is not set then there is no work pending */
1101                 if (!eop_desc)
1102                         break;
1103
1104                 /* prevent any other reads prior to eop_desc */
1105                 read_barrier_depends();
1106
1107                 /* if DD is not set pending work has not been completed */
1108                 if (!(eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)))
1109                         break;
1110
1111                 /* clear next_to_watch to prevent false hangs */
1112                 tx_buffer->next_to_watch = NULL;
1113
1114                 /* update the statistics for this packet */
1115                 total_bytes += tx_buffer->bytecount;
1116                 total_packets += tx_buffer->gso_segs;
1117
1118                 /* free the skb */
1119                 dev_consume_skb_any(tx_buffer->skb);
1120
1121                 /* unmap skb header data */
1122                 dma_unmap_single(tx_ring->dev,
1123                                  dma_unmap_addr(tx_buffer, dma),
1124                                  dma_unmap_len(tx_buffer, len),
1125                                  DMA_TO_DEVICE);
1126
1127                 /* clear tx_buffer data */
1128                 tx_buffer->skb = NULL;
1129                 dma_unmap_len_set(tx_buffer, len, 0);
1130
1131                 /* unmap remaining buffers */
1132                 while (tx_desc != eop_desc) {
1133                         tx_buffer++;
1134                         tx_desc++;
1135                         i++;
1136                         if (unlikely(!i)) {
1137                                 i -= tx_ring->count;
1138                                 tx_buffer = tx_ring->tx_buffer_info;
1139                                 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
1140                         }
1141
1142                         /* unmap any remaining paged data */
1143                         if (dma_unmap_len(tx_buffer, len)) {
1144                                 dma_unmap_page(tx_ring->dev,
1145                                                dma_unmap_addr(tx_buffer, dma),
1146                                                dma_unmap_len(tx_buffer, len),
1147                                                DMA_TO_DEVICE);
1148                                 dma_unmap_len_set(tx_buffer, len, 0);
1149                         }
1150                 }
1151
1152                 /* move us one more past the eop_desc for start of next pkt */
1153                 tx_buffer++;
1154                 tx_desc++;
1155                 i++;
1156                 if (unlikely(!i)) {
1157                         i -= tx_ring->count;
1158                         tx_buffer = tx_ring->tx_buffer_info;
1159                         tx_desc = IXGBE_TX_DESC(tx_ring, 0);
1160                 }
1161
1162                 /* issue prefetch for next Tx descriptor */
1163                 prefetch(tx_desc);
1164
1165                 /* update budget accounting */
1166                 budget--;
1167         } while (likely(budget));
1168
1169         i += tx_ring->count;
1170         tx_ring->next_to_clean = i;
1171         u64_stats_update_begin(&tx_ring->syncp);
1172         tx_ring->stats.bytes += total_bytes;
1173         tx_ring->stats.packets += total_packets;
1174         u64_stats_update_end(&tx_ring->syncp);
1175         q_vector->tx.total_bytes += total_bytes;
1176         q_vector->tx.total_packets += total_packets;
1177
1178         if (check_for_tx_hang(tx_ring) && ixgbe_check_tx_hang(tx_ring)) {
1179                 /* schedule immediate reset if we believe we hung */
1180                 struct ixgbe_hw *hw = &adapter->hw;
1181                 e_err(drv, "Detected Tx Unit Hang\n"
1182                         "  Tx Queue             <%d>\n"
1183                         "  TDH, TDT             <%x>, <%x>\n"
1184                         "  next_to_use          <%x>\n"
1185                         "  next_to_clean        <%x>\n"
1186                         "tx_buffer_info[next_to_clean]\n"
1187                         "  time_stamp           <%lx>\n"
1188                         "  jiffies              <%lx>\n",
1189                         tx_ring->queue_index,
1190                         IXGBE_READ_REG(hw, IXGBE_TDH(tx_ring->reg_idx)),
1191                         IXGBE_READ_REG(hw, IXGBE_TDT(tx_ring->reg_idx)),
1192                         tx_ring->next_to_use, i,
1193                         tx_ring->tx_buffer_info[i].time_stamp, jiffies);
1194
1195                 netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
1196
1197                 e_info(probe,
1198                        "tx hang %d detected on queue %d, resetting adapter\n",
1199                         adapter->tx_timeout_count + 1, tx_ring->queue_index);
1200
1201                 /* schedule immediate reset if we believe we hung */
1202                 ixgbe_tx_timeout_reset(adapter);
1203
1204                 /* the adapter is about to reset, no point in enabling stuff */
1205                 return true;
1206         }
1207
1208         netdev_tx_completed_queue(txring_txq(tx_ring),
1209                                   total_packets, total_bytes);
1210
1211 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
1212         if (unlikely(total_packets && netif_carrier_ok(tx_ring->netdev) &&
1213                      (ixgbe_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD))) {
1214                 /* Make sure that anybody stopping the queue after this
1215                  * sees the new next_to_clean.
1216                  */
1217                 smp_mb();
1218                 if (__netif_subqueue_stopped(tx_ring->netdev,
1219                                              tx_ring->queue_index)
1220                     && !test_bit(__IXGBE_DOWN, &adapter->state)) {
1221                         netif_wake_subqueue(tx_ring->netdev,
1222                                             tx_ring->queue_index);
1223                         ++tx_ring->tx_stats.restart_queue;
1224                 }
1225         }
1226
1227         return !!budget;
1228 }
1229
1230 #ifdef CONFIG_IXGBE_DCA
1231 static void ixgbe_update_tx_dca(struct ixgbe_adapter *adapter,
1232                                 struct ixgbe_ring *tx_ring,
1233                                 int cpu)
1234 {
1235         struct ixgbe_hw *hw = &adapter->hw;
1236         u32 txctrl = dca3_get_tag(tx_ring->dev, cpu);
1237         u16 reg_offset;
1238
1239         switch (hw->mac.type) {
1240         case ixgbe_mac_82598EB:
1241                 reg_offset = IXGBE_DCA_TXCTRL(tx_ring->reg_idx);
1242                 break;
1243         case ixgbe_mac_82599EB:
1244         case ixgbe_mac_X540:
1245                 reg_offset = IXGBE_DCA_TXCTRL_82599(tx_ring->reg_idx);
1246                 txctrl <<= IXGBE_DCA_TXCTRL_CPUID_SHIFT_82599;
1247                 break;
1248         default:
1249                 /* for unknown hardware do not write register */
1250                 return;
1251         }
1252
1253         /*
1254          * We can enable relaxed ordering for reads, but not writes when
1255          * DCA is enabled.  This is due to a known issue in some chipsets
1256          * which will cause the DCA tag to be cleared.
1257          */
1258         txctrl |= IXGBE_DCA_TXCTRL_DESC_RRO_EN |
1259                   IXGBE_DCA_TXCTRL_DATA_RRO_EN |
1260                   IXGBE_DCA_TXCTRL_DESC_DCA_EN;
1261
1262         IXGBE_WRITE_REG(hw, reg_offset, txctrl);
1263 }
1264
1265 static void ixgbe_update_rx_dca(struct ixgbe_adapter *adapter,
1266                                 struct ixgbe_ring *rx_ring,
1267                                 int cpu)
1268 {
1269         struct ixgbe_hw *hw = &adapter->hw;
1270         u32 rxctrl = dca3_get_tag(rx_ring->dev, cpu);
1271         u8 reg_idx = rx_ring->reg_idx;
1272
1273
1274         switch (hw->mac.type) {
1275         case ixgbe_mac_82599EB:
1276         case ixgbe_mac_X540:
1277                 rxctrl <<= IXGBE_DCA_RXCTRL_CPUID_SHIFT_82599;
1278                 break;
1279         default:
1280                 break;
1281         }
1282
1283         /*
1284          * We can enable relaxed ordering for reads, but not writes when
1285          * DCA is enabled.  This is due to a known issue in some chipsets
1286          * which will cause the DCA tag to be cleared.
1287          */
1288         rxctrl |= IXGBE_DCA_RXCTRL_DESC_RRO_EN |
1289                   IXGBE_DCA_RXCTRL_DESC_DCA_EN;
1290
1291         IXGBE_WRITE_REG(hw, IXGBE_DCA_RXCTRL(reg_idx), rxctrl);
1292 }
1293
1294 static void ixgbe_update_dca(struct ixgbe_q_vector *q_vector)
1295 {
1296         struct ixgbe_adapter *adapter = q_vector->adapter;
1297         struct ixgbe_ring *ring;
1298         int cpu = get_cpu();
1299
1300         if (q_vector->cpu == cpu)
1301                 goto out_no_update;
1302
1303         ixgbe_for_each_ring(ring, q_vector->tx)
1304                 ixgbe_update_tx_dca(adapter, ring, cpu);
1305
1306         ixgbe_for_each_ring(ring, q_vector->rx)
1307                 ixgbe_update_rx_dca(adapter, ring, cpu);
1308
1309         q_vector->cpu = cpu;
1310 out_no_update:
1311         put_cpu();
1312 }
1313
1314 static void ixgbe_setup_dca(struct ixgbe_adapter *adapter)
1315 {
1316         int i;
1317
1318         if (!(adapter->flags & IXGBE_FLAG_DCA_ENABLED))
1319                 return;
1320
1321         /* always use CB2 mode, difference is masked in the CB driver */
1322         IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 2);
1323
1324         for (i = 0; i < adapter->num_q_vectors; i++) {
1325                 adapter->q_vector[i]->cpu = -1;
1326                 ixgbe_update_dca(adapter->q_vector[i]);
1327         }
1328 }
1329
1330 static int __ixgbe_notify_dca(struct device *dev, void *data)
1331 {
1332         struct ixgbe_adapter *adapter = dev_get_drvdata(dev);
1333         unsigned long event = *(unsigned long *)data;
1334
1335         if (!(adapter->flags & IXGBE_FLAG_DCA_CAPABLE))
1336                 return 0;
1337
1338         switch (event) {
1339         case DCA_PROVIDER_ADD:
1340                 /* if we're already enabled, don't do it again */
1341                 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1342                         break;
1343                 if (dca_add_requester(dev) == 0) {
1344                         adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
1345                         ixgbe_setup_dca(adapter);
1346                         break;
1347                 }
1348                 /* Fall Through since DCA is disabled. */
1349         case DCA_PROVIDER_REMOVE:
1350                 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
1351                         dca_remove_requester(dev);
1352                         adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
1353                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 1);
1354                 }
1355                 break;
1356         }
1357
1358         return 0;
1359 }
1360
1361 #endif /* CONFIG_IXGBE_DCA */
1362
1363 #define IXGBE_RSS_L4_TYPES_MASK \
1364         ((1ul << IXGBE_RXDADV_RSSTYPE_IPV4_TCP) | \
1365          (1ul << IXGBE_RXDADV_RSSTYPE_IPV4_UDP) | \
1366          (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_TCP) | \
1367          (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_UDP))
1368
1369 static inline void ixgbe_rx_hash(struct ixgbe_ring *ring,
1370                                  union ixgbe_adv_rx_desc *rx_desc,
1371                                  struct sk_buff *skb)
1372 {
1373         u16 rss_type;
1374
1375         if (!(ring->netdev->features & NETIF_F_RXHASH))
1376                 return;
1377
1378         rss_type = le16_to_cpu(rx_desc->wb.lower.lo_dword.hs_rss.pkt_info) &
1379                    IXGBE_RXDADV_RSSTYPE_MASK;
1380
1381         if (!rss_type)
1382                 return;
1383
1384         skb_set_hash(skb, le32_to_cpu(rx_desc->wb.lower.hi_dword.rss),
1385                      (IXGBE_RSS_L4_TYPES_MASK & (1ul << rss_type)) ?
1386                      PKT_HASH_TYPE_L4 : PKT_HASH_TYPE_L3);
1387 }
1388
1389 #ifdef IXGBE_FCOE
1390 /**
1391  * ixgbe_rx_is_fcoe - check the rx desc for incoming pkt type
1392  * @ring: structure containing ring specific data
1393  * @rx_desc: advanced rx descriptor
1394  *
1395  * Returns : true if it is FCoE pkt
1396  */
1397 static inline bool ixgbe_rx_is_fcoe(struct ixgbe_ring *ring,
1398                                     union ixgbe_adv_rx_desc *rx_desc)
1399 {
1400         __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
1401
1402         return test_bit(__IXGBE_RX_FCOE, &ring->state) &&
1403                ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_ETQF_MASK)) ==
1404                 (cpu_to_le16(IXGBE_ETQF_FILTER_FCOE <<
1405                              IXGBE_RXDADV_PKTTYPE_ETQF_SHIFT)));
1406 }
1407
1408 #endif /* IXGBE_FCOE */
1409 /**
1410  * ixgbe_rx_checksum - indicate in skb if hw indicated a good cksum
1411  * @ring: structure containing ring specific data
1412  * @rx_desc: current Rx descriptor being processed
1413  * @skb: skb currently being received and modified
1414  **/
1415 static inline void ixgbe_rx_checksum(struct ixgbe_ring *ring,
1416                                      union ixgbe_adv_rx_desc *rx_desc,
1417                                      struct sk_buff *skb)
1418 {
1419         __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
1420         __le16 hdr_info = rx_desc->wb.lower.lo_dword.hs_rss.hdr_info;
1421         bool encap_pkt = false;
1422
1423         skb_checksum_none_assert(skb);
1424
1425         /* Rx csum disabled */
1426         if (!(ring->netdev->features & NETIF_F_RXCSUM))
1427                 return;
1428
1429         if ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_VXLAN)) &&
1430             (hdr_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_TUNNEL >> 16))) {
1431                 encap_pkt = true;
1432                 skb->encapsulation = 1;
1433                 skb->ip_summed = CHECKSUM_NONE;
1434         }
1435
1436         /* if IP and error */
1437         if (ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_IPCS) &&
1438             ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_IPE)) {
1439                 ring->rx_stats.csum_err++;
1440                 return;
1441         }
1442
1443         if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_L4CS))
1444                 return;
1445
1446         if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_TCPE)) {
1447                 /*
1448                  * 82599 errata, UDP frames with a 0 checksum can be marked as
1449                  * checksum errors.
1450                  */
1451                 if ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_UDP)) &&
1452                     test_bit(__IXGBE_RX_CSUM_UDP_ZERO_ERR, &ring->state))
1453                         return;
1454
1455                 ring->rx_stats.csum_err++;
1456                 return;
1457         }
1458
1459         /* It must be a TCP or UDP packet with a valid checksum */
1460         skb->ip_summed = CHECKSUM_UNNECESSARY;
1461         if (encap_pkt) {
1462                 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_OUTERIPCS))
1463                         return;
1464
1465                 if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_OUTERIPER)) {
1466                         ring->rx_stats.csum_err++;
1467                         return;
1468                 }
1469                 /* If we checked the outer header let the stack know */
1470                 skb->csum_level = 1;
1471         }
1472 }
1473
1474 static bool ixgbe_alloc_mapped_page(struct ixgbe_ring *rx_ring,
1475                                     struct ixgbe_rx_buffer *bi)
1476 {
1477         struct page *page = bi->page;
1478         dma_addr_t dma;
1479
1480         /* since we are recycling buffers we should seldom need to alloc */
1481         if (likely(page))
1482                 return true;
1483
1484         /* alloc new page for storage */
1485         page = dev_alloc_pages(ixgbe_rx_pg_order(rx_ring));
1486         if (unlikely(!page)) {
1487                 rx_ring->rx_stats.alloc_rx_page_failed++;
1488                 return false;
1489         }
1490
1491         /* map page for use */
1492         dma = dma_map_page(rx_ring->dev, page, 0,
1493                            ixgbe_rx_pg_size(rx_ring), DMA_FROM_DEVICE);
1494
1495         /*
1496          * if mapping failed free memory back to system since
1497          * there isn't much point in holding memory we can't use
1498          */
1499         if (dma_mapping_error(rx_ring->dev, dma)) {
1500                 __free_pages(page, ixgbe_rx_pg_order(rx_ring));
1501
1502                 rx_ring->rx_stats.alloc_rx_page_failed++;
1503                 return false;
1504         }
1505
1506         bi->dma = dma;
1507         bi->page = page;
1508         bi->page_offset = 0;
1509
1510         return true;
1511 }
1512
1513 /**
1514  * ixgbe_alloc_rx_buffers - Replace used receive buffers
1515  * @rx_ring: ring to place buffers on
1516  * @cleaned_count: number of buffers to replace
1517  **/
1518 void ixgbe_alloc_rx_buffers(struct ixgbe_ring *rx_ring, u16 cleaned_count)
1519 {
1520         union ixgbe_adv_rx_desc *rx_desc;
1521         struct ixgbe_rx_buffer *bi;
1522         u16 i = rx_ring->next_to_use;
1523
1524         /* nothing to do */
1525         if (!cleaned_count)
1526                 return;
1527
1528         rx_desc = IXGBE_RX_DESC(rx_ring, i);
1529         bi = &rx_ring->rx_buffer_info[i];
1530         i -= rx_ring->count;
1531
1532         do {
1533                 if (!ixgbe_alloc_mapped_page(rx_ring, bi))
1534                         break;
1535
1536                 /*
1537                  * Refresh the desc even if buffer_addrs didn't change
1538                  * because each write-back erases this info.
1539                  */
1540                 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
1541
1542                 rx_desc++;
1543                 bi++;
1544                 i++;
1545                 if (unlikely(!i)) {
1546                         rx_desc = IXGBE_RX_DESC(rx_ring, 0);
1547                         bi = rx_ring->rx_buffer_info;
1548                         i -= rx_ring->count;
1549                 }
1550
1551                 /* clear the status bits for the next_to_use descriptor */
1552                 rx_desc->wb.upper.status_error = 0;
1553
1554                 cleaned_count--;
1555         } while (cleaned_count);
1556
1557         i += rx_ring->count;
1558
1559         if (rx_ring->next_to_use != i) {
1560                 rx_ring->next_to_use = i;
1561
1562                 /* update next to alloc since we have filled the ring */
1563                 rx_ring->next_to_alloc = i;
1564
1565                 /* Force memory writes to complete before letting h/w
1566                  * know there are new descriptors to fetch.  (Only
1567                  * applicable for weak-ordered memory model archs,
1568                  * such as IA-64).
1569                  */
1570                 wmb();
1571                 writel(i, rx_ring->tail);
1572         }
1573 }
1574
1575 static void ixgbe_set_rsc_gso_size(struct ixgbe_ring *ring,
1576                                    struct sk_buff *skb)
1577 {
1578         u16 hdr_len = skb_headlen(skb);
1579
1580         /* set gso_size to avoid messing up TCP MSS */
1581         skb_shinfo(skb)->gso_size = DIV_ROUND_UP((skb->len - hdr_len),
1582                                                  IXGBE_CB(skb)->append_cnt);
1583         skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4;
1584 }
1585
1586 static void ixgbe_update_rsc_stats(struct ixgbe_ring *rx_ring,
1587                                    struct sk_buff *skb)
1588 {
1589         /* if append_cnt is 0 then frame is not RSC */
1590         if (!IXGBE_CB(skb)->append_cnt)
1591                 return;
1592
1593         rx_ring->rx_stats.rsc_count += IXGBE_CB(skb)->append_cnt;
1594         rx_ring->rx_stats.rsc_flush++;
1595
1596         ixgbe_set_rsc_gso_size(rx_ring, skb);
1597
1598         /* gso_size is computed using append_cnt so always clear it last */
1599         IXGBE_CB(skb)->append_cnt = 0;
1600 }
1601
1602 /**
1603  * ixgbe_process_skb_fields - Populate skb header fields from Rx descriptor
1604  * @rx_ring: rx descriptor ring packet is being transacted on
1605  * @rx_desc: pointer to the EOP Rx descriptor
1606  * @skb: pointer to current skb being populated
1607  *
1608  * This function checks the ring, descriptor, and packet information in
1609  * order to populate the hash, checksum, VLAN, timestamp, protocol, and
1610  * other fields within the skb.
1611  **/
1612 static void ixgbe_process_skb_fields(struct ixgbe_ring *rx_ring,
1613                                      union ixgbe_adv_rx_desc *rx_desc,
1614                                      struct sk_buff *skb)
1615 {
1616         struct net_device *dev = rx_ring->netdev;
1617
1618         ixgbe_update_rsc_stats(rx_ring, skb);
1619
1620         ixgbe_rx_hash(rx_ring, rx_desc, skb);
1621
1622         ixgbe_rx_checksum(rx_ring, rx_desc, skb);
1623
1624         if (unlikely(ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_STAT_TS)))
1625                 ixgbe_ptp_rx_hwtstamp(rx_ring->q_vector->adapter, skb);
1626
1627         if ((dev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
1628             ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_VP)) {
1629                 u16 vid = le16_to_cpu(rx_desc->wb.upper.vlan);
1630                 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
1631         }
1632
1633         skb_record_rx_queue(skb, rx_ring->queue_index);
1634
1635         skb->protocol = eth_type_trans(skb, dev);
1636 }
1637
1638 static void ixgbe_rx_skb(struct ixgbe_q_vector *q_vector,
1639                          struct sk_buff *skb)
1640 {
1641         if (ixgbe_qv_busy_polling(q_vector))
1642                 netif_receive_skb(skb);
1643         else
1644                 napi_gro_receive(&q_vector->napi, skb);
1645 }
1646
1647 /**
1648  * ixgbe_is_non_eop - process handling of non-EOP buffers
1649  * @rx_ring: Rx ring being processed
1650  * @rx_desc: Rx descriptor for current buffer
1651  * @skb: Current socket buffer containing buffer in progress
1652  *
1653  * This function updates next to clean.  If the buffer is an EOP buffer
1654  * this function exits returning false, otherwise it will place the
1655  * sk_buff in the next buffer to be chained and return true indicating
1656  * that this is in fact a non-EOP buffer.
1657  **/
1658 static bool ixgbe_is_non_eop(struct ixgbe_ring *rx_ring,
1659                              union ixgbe_adv_rx_desc *rx_desc,
1660                              struct sk_buff *skb)
1661 {
1662         u32 ntc = rx_ring->next_to_clean + 1;
1663
1664         /* fetch, update, and store next to clean */
1665         ntc = (ntc < rx_ring->count) ? ntc : 0;
1666         rx_ring->next_to_clean = ntc;
1667
1668         prefetch(IXGBE_RX_DESC(rx_ring, ntc));
1669
1670         /* update RSC append count if present */
1671         if (ring_is_rsc_enabled(rx_ring)) {
1672                 __le32 rsc_enabled = rx_desc->wb.lower.lo_dword.data &
1673                                      cpu_to_le32(IXGBE_RXDADV_RSCCNT_MASK);
1674
1675                 if (unlikely(rsc_enabled)) {
1676                         u32 rsc_cnt = le32_to_cpu(rsc_enabled);
1677
1678                         rsc_cnt >>= IXGBE_RXDADV_RSCCNT_SHIFT;
1679                         IXGBE_CB(skb)->append_cnt += rsc_cnt - 1;
1680
1681                         /* update ntc based on RSC value */
1682                         ntc = le32_to_cpu(rx_desc->wb.upper.status_error);
1683                         ntc &= IXGBE_RXDADV_NEXTP_MASK;
1684                         ntc >>= IXGBE_RXDADV_NEXTP_SHIFT;
1685                 }
1686         }
1687
1688         /* if we are the last buffer then there is nothing else to do */
1689         if (likely(ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)))
1690                 return false;
1691
1692         /* place skb in next buffer to be received */
1693         rx_ring->rx_buffer_info[ntc].skb = skb;
1694         rx_ring->rx_stats.non_eop_descs++;
1695
1696         return true;
1697 }
1698
1699 /**
1700  * ixgbe_pull_tail - ixgbe specific version of skb_pull_tail
1701  * @rx_ring: rx descriptor ring packet is being transacted on
1702  * @skb: pointer to current skb being adjusted
1703  *
1704  * This function is an ixgbe specific version of __pskb_pull_tail.  The
1705  * main difference between this version and the original function is that
1706  * this function can make several assumptions about the state of things
1707  * that allow for significant optimizations versus the standard function.
1708  * As a result we can do things like drop a frag and maintain an accurate
1709  * truesize for the skb.
1710  */
1711 static void ixgbe_pull_tail(struct ixgbe_ring *rx_ring,
1712                             struct sk_buff *skb)
1713 {
1714         struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
1715         unsigned char *va;
1716         unsigned int pull_len;
1717
1718         /*
1719          * it is valid to use page_address instead of kmap since we are
1720          * working with pages allocated out of the lomem pool per
1721          * alloc_page(GFP_ATOMIC)
1722          */
1723         va = skb_frag_address(frag);
1724
1725         /*
1726          * we need the header to contain the greater of either ETH_HLEN or
1727          * 60 bytes if the skb->len is less than 60 for skb_pad.
1728          */
1729         pull_len = eth_get_headlen(va, IXGBE_RX_HDR_SIZE);
1730
1731         /* align pull length to size of long to optimize memcpy performance */
1732         skb_copy_to_linear_data(skb, va, ALIGN(pull_len, sizeof(long)));
1733
1734         /* update all of the pointers */
1735         skb_frag_size_sub(frag, pull_len);
1736         frag->page_offset += pull_len;
1737         skb->data_len -= pull_len;
1738         skb->tail += pull_len;
1739 }
1740
1741 /**
1742  * ixgbe_dma_sync_frag - perform DMA sync for first frag of SKB
1743  * @rx_ring: rx descriptor ring packet is being transacted on
1744  * @skb: pointer to current skb being updated
1745  *
1746  * This function provides a basic DMA sync up for the first fragment of an
1747  * skb.  The reason for doing this is that the first fragment cannot be
1748  * unmapped until we have reached the end of packet descriptor for a buffer
1749  * chain.
1750  */
1751 static void ixgbe_dma_sync_frag(struct ixgbe_ring *rx_ring,
1752                                 struct sk_buff *skb)
1753 {
1754         /* if the page was released unmap it, else just sync our portion */
1755         if (unlikely(IXGBE_CB(skb)->page_released)) {
1756                 dma_unmap_page(rx_ring->dev, IXGBE_CB(skb)->dma,
1757                                ixgbe_rx_pg_size(rx_ring), DMA_FROM_DEVICE);
1758                 IXGBE_CB(skb)->page_released = false;
1759         } else {
1760                 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
1761
1762                 dma_sync_single_range_for_cpu(rx_ring->dev,
1763                                               IXGBE_CB(skb)->dma,
1764                                               frag->page_offset,
1765                                               ixgbe_rx_bufsz(rx_ring),
1766                                               DMA_FROM_DEVICE);
1767         }
1768         IXGBE_CB(skb)->dma = 0;
1769 }
1770
1771 /**
1772  * ixgbe_cleanup_headers - Correct corrupted or empty headers
1773  * @rx_ring: rx descriptor ring packet is being transacted on
1774  * @rx_desc: pointer to the EOP Rx descriptor
1775  * @skb: pointer to current skb being fixed
1776  *
1777  * Check for corrupted packet headers caused by senders on the local L2
1778  * embedded NIC switch not setting up their Tx Descriptors right.  These
1779  * should be very rare.
1780  *
1781  * Also address the case where we are pulling data in on pages only
1782  * and as such no data is present in the skb header.
1783  *
1784  * In addition if skb is not at least 60 bytes we need to pad it so that
1785  * it is large enough to qualify as a valid Ethernet frame.
1786  *
1787  * Returns true if an error was encountered and skb was freed.
1788  **/
1789 static bool ixgbe_cleanup_headers(struct ixgbe_ring *rx_ring,
1790                                   union ixgbe_adv_rx_desc *rx_desc,
1791                                   struct sk_buff *skb)
1792 {
1793         struct net_device *netdev = rx_ring->netdev;
1794
1795         /* verify that the packet does not have any known errors */
1796         if (unlikely(ixgbe_test_staterr(rx_desc,
1797                                         IXGBE_RXDADV_ERR_FRAME_ERR_MASK) &&
1798             !(netdev->features & NETIF_F_RXALL))) {
1799                 dev_kfree_skb_any(skb);
1800                 return true;
1801         }
1802
1803         /* place header in linear portion of buffer */
1804         if (skb_is_nonlinear(skb))
1805                 ixgbe_pull_tail(rx_ring, skb);
1806
1807 #ifdef IXGBE_FCOE
1808         /* do not attempt to pad FCoE Frames as this will disrupt DDP */
1809         if (ixgbe_rx_is_fcoe(rx_ring, rx_desc))
1810                 return false;
1811
1812 #endif
1813         /* if eth_skb_pad returns an error the skb was freed */
1814         if (eth_skb_pad(skb))
1815                 return true;
1816
1817         return false;
1818 }
1819
1820 /**
1821  * ixgbe_reuse_rx_page - page flip buffer and store it back on the ring
1822  * @rx_ring: rx descriptor ring to store buffers on
1823  * @old_buff: donor buffer to have page reused
1824  *
1825  * Synchronizes page for reuse by the adapter
1826  **/
1827 static void ixgbe_reuse_rx_page(struct ixgbe_ring *rx_ring,
1828                                 struct ixgbe_rx_buffer *old_buff)
1829 {
1830         struct ixgbe_rx_buffer *new_buff;
1831         u16 nta = rx_ring->next_to_alloc;
1832
1833         new_buff = &rx_ring->rx_buffer_info[nta];
1834
1835         /* update, and store next to alloc */
1836         nta++;
1837         rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
1838
1839         /* transfer page from old buffer to new buffer */
1840         *new_buff = *old_buff;
1841
1842         /* sync the buffer for use by the device */
1843         dma_sync_single_range_for_device(rx_ring->dev, new_buff->dma,
1844                                          new_buff->page_offset,
1845                                          ixgbe_rx_bufsz(rx_ring),
1846                                          DMA_FROM_DEVICE);
1847 }
1848
1849 static inline bool ixgbe_page_is_reserved(struct page *page)
1850 {
1851         return (page_to_nid(page) != numa_mem_id()) || page_is_pfmemalloc(page);
1852 }
1853
1854 /**
1855  * ixgbe_add_rx_frag - Add contents of Rx buffer to sk_buff
1856  * @rx_ring: rx descriptor ring to transact packets on
1857  * @rx_buffer: buffer containing page to add
1858  * @rx_desc: descriptor containing length of buffer written by hardware
1859  * @skb: sk_buff to place the data into
1860  *
1861  * This function will add the data contained in rx_buffer->page to the skb.
1862  * This is done either through a direct copy if the data in the buffer is
1863  * less than the skb header size, otherwise it will just attach the page as
1864  * a frag to the skb.
1865  *
1866  * The function will then update the page offset if necessary and return
1867  * true if the buffer can be reused by the adapter.
1868  **/
1869 static bool ixgbe_add_rx_frag(struct ixgbe_ring *rx_ring,
1870                               struct ixgbe_rx_buffer *rx_buffer,
1871                               union ixgbe_adv_rx_desc *rx_desc,
1872                               struct sk_buff *skb)
1873 {
1874         struct page *page = rx_buffer->page;
1875         unsigned int size = le16_to_cpu(rx_desc->wb.upper.length);
1876 #if (PAGE_SIZE < 8192)
1877         unsigned int truesize = ixgbe_rx_bufsz(rx_ring);
1878 #else
1879         unsigned int truesize = ALIGN(size, L1_CACHE_BYTES);
1880         unsigned int last_offset = ixgbe_rx_pg_size(rx_ring) -
1881                                    ixgbe_rx_bufsz(rx_ring);
1882 #endif
1883
1884         if ((size <= IXGBE_RX_HDR_SIZE) && !skb_is_nonlinear(skb)) {
1885                 unsigned char *va = page_address(page) + rx_buffer->page_offset;
1886
1887                 memcpy(__skb_put(skb, size), va, ALIGN(size, sizeof(long)));
1888
1889                 /* page is not reserved, we can reuse buffer as-is */
1890                 if (likely(!ixgbe_page_is_reserved(page)))
1891                         return true;
1892
1893                 /* this page cannot be reused so discard it */
1894                 __free_pages(page, ixgbe_rx_pg_order(rx_ring));
1895                 return false;
1896         }
1897
1898         skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, page,
1899                         rx_buffer->page_offset, size, truesize);
1900
1901         /* avoid re-using remote pages */
1902         if (unlikely(ixgbe_page_is_reserved(page)))
1903                 return false;
1904
1905 #if (PAGE_SIZE < 8192)
1906         /* if we are only owner of page we can reuse it */
1907         if (unlikely(page_count(page) != 1))
1908                 return false;
1909
1910         /* flip page offset to other buffer */
1911         rx_buffer->page_offset ^= truesize;
1912 #else
1913         /* move offset up to the next cache line */
1914         rx_buffer->page_offset += truesize;
1915
1916         if (rx_buffer->page_offset > last_offset)
1917                 return false;
1918 #endif
1919
1920         /* Even if we own the page, we are not allowed to use atomic_set()
1921          * This would break get_page_unless_zero() users.
1922          */
1923         atomic_inc(&page->_count);
1924
1925         return true;
1926 }
1927
1928 static struct sk_buff *ixgbe_fetch_rx_buffer(struct ixgbe_ring *rx_ring,
1929                                              union ixgbe_adv_rx_desc *rx_desc)
1930 {
1931         struct ixgbe_rx_buffer *rx_buffer;
1932         struct sk_buff *skb;
1933         struct page *page;
1934
1935         rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
1936         page = rx_buffer->page;
1937         prefetchw(page);
1938
1939         skb = rx_buffer->skb;
1940
1941         if (likely(!skb)) {
1942                 void *page_addr = page_address(page) +
1943                                   rx_buffer->page_offset;
1944
1945                 /* prefetch first cache line of first page */
1946                 prefetch(page_addr);
1947 #if L1_CACHE_BYTES < 128
1948                 prefetch(page_addr + L1_CACHE_BYTES);
1949 #endif
1950
1951                 /* allocate a skb to store the frags */
1952                 skb = napi_alloc_skb(&rx_ring->q_vector->napi,
1953                                      IXGBE_RX_HDR_SIZE);
1954                 if (unlikely(!skb)) {
1955                         rx_ring->rx_stats.alloc_rx_buff_failed++;
1956                         return NULL;
1957                 }
1958
1959                 /*
1960                  * we will be copying header into skb->data in
1961                  * pskb_may_pull so it is in our interest to prefetch
1962                  * it now to avoid a possible cache miss
1963                  */
1964                 prefetchw(skb->data);
1965
1966                 /*
1967                  * Delay unmapping of the first packet. It carries the
1968                  * header information, HW may still access the header
1969                  * after the writeback.  Only unmap it when EOP is
1970                  * reached
1971                  */
1972                 if (likely(ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)))
1973                         goto dma_sync;
1974
1975                 IXGBE_CB(skb)->dma = rx_buffer->dma;
1976         } else {
1977                 if (ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP))
1978                         ixgbe_dma_sync_frag(rx_ring, skb);
1979
1980 dma_sync:
1981                 /* we are reusing so sync this buffer for CPU use */
1982                 dma_sync_single_range_for_cpu(rx_ring->dev,
1983                                               rx_buffer->dma,
1984                                               rx_buffer->page_offset,
1985                                               ixgbe_rx_bufsz(rx_ring),
1986                                               DMA_FROM_DEVICE);
1987
1988                 rx_buffer->skb = NULL;
1989         }
1990
1991         /* pull page into skb */
1992         if (ixgbe_add_rx_frag(rx_ring, rx_buffer, rx_desc, skb)) {
1993                 /* hand second half of page back to the ring */
1994                 ixgbe_reuse_rx_page(rx_ring, rx_buffer);
1995         } else if (IXGBE_CB(skb)->dma == rx_buffer->dma) {
1996                 /* the page has been released from the ring */
1997                 IXGBE_CB(skb)->page_released = true;
1998         } else {
1999                 /* we are not reusing the buffer so unmap it */
2000                 dma_unmap_page(rx_ring->dev, rx_buffer->dma,
2001                                ixgbe_rx_pg_size(rx_ring),
2002                                DMA_FROM_DEVICE);
2003         }
2004
2005         /* clear contents of buffer_info */
2006         rx_buffer->page = NULL;
2007
2008         return skb;
2009 }
2010
2011 /**
2012  * ixgbe_clean_rx_irq - Clean completed descriptors from Rx ring - bounce buf
2013  * @q_vector: structure containing interrupt and ring information
2014  * @rx_ring: rx descriptor ring to transact packets on
2015  * @budget: Total limit on number of packets to process
2016  *
2017  * This function provides a "bounce buffer" approach to Rx interrupt
2018  * processing.  The advantage to this is that on systems that have
2019  * expensive overhead for IOMMU access this provides a means of avoiding
2020  * it by maintaining the mapping of the page to the syste.
2021  *
2022  * Returns amount of work completed
2023  **/
2024 static int ixgbe_clean_rx_irq(struct ixgbe_q_vector *q_vector,
2025                                struct ixgbe_ring *rx_ring,
2026                                const int budget)
2027 {
2028         unsigned int total_rx_bytes = 0, total_rx_packets = 0;
2029 #ifdef IXGBE_FCOE
2030         struct ixgbe_adapter *adapter = q_vector->adapter;
2031         int ddp_bytes;
2032         unsigned int mss = 0;
2033 #endif /* IXGBE_FCOE */
2034         u16 cleaned_count = ixgbe_desc_unused(rx_ring);
2035
2036         while (likely(total_rx_packets < budget)) {
2037                 union ixgbe_adv_rx_desc *rx_desc;
2038                 struct sk_buff *skb;
2039
2040                 /* return some buffers to hardware, one at a time is too slow */
2041                 if (cleaned_count >= IXGBE_RX_BUFFER_WRITE) {
2042                         ixgbe_alloc_rx_buffers(rx_ring, cleaned_count);
2043                         cleaned_count = 0;
2044                 }
2045
2046                 rx_desc = IXGBE_RX_DESC(rx_ring, rx_ring->next_to_clean);
2047
2048                 if (!rx_desc->wb.upper.status_error)
2049                         break;
2050
2051                 /* This memory barrier is needed to keep us from reading
2052                  * any other fields out of the rx_desc until we know the
2053                  * descriptor has been written back
2054                  */
2055                 dma_rmb();
2056
2057                 /* retrieve a buffer from the ring */
2058                 skb = ixgbe_fetch_rx_buffer(rx_ring, rx_desc);
2059
2060                 /* exit if we failed to retrieve a buffer */
2061                 if (!skb)
2062                         break;
2063
2064                 cleaned_count++;
2065
2066                 /* place incomplete frames back on ring for completion */
2067                 if (ixgbe_is_non_eop(rx_ring, rx_desc, skb))
2068                         continue;
2069
2070                 /* verify the packet layout is correct */
2071                 if (ixgbe_cleanup_headers(rx_ring, rx_desc, skb))
2072                         continue;
2073
2074                 /* probably a little skewed due to removing CRC */
2075                 total_rx_bytes += skb->len;
2076
2077                 /* populate checksum, timestamp, VLAN, and protocol */
2078                 ixgbe_process_skb_fields(rx_ring, rx_desc, skb);
2079
2080 #ifdef IXGBE_FCOE
2081                 /* if ddp, not passing to ULD unless for FCP_RSP or error */
2082                 if (ixgbe_rx_is_fcoe(rx_ring, rx_desc)) {
2083                         ddp_bytes = ixgbe_fcoe_ddp(adapter, rx_desc, skb);
2084                         /* include DDPed FCoE data */
2085                         if (ddp_bytes > 0) {
2086                                 if (!mss) {
2087                                         mss = rx_ring->netdev->mtu -
2088                                                 sizeof(struct fcoe_hdr) -
2089                                                 sizeof(struct fc_frame_header) -
2090                                                 sizeof(struct fcoe_crc_eof);
2091                                         if (mss > 512)
2092                                                 mss &= ~511;
2093                                 }
2094                                 total_rx_bytes += ddp_bytes;
2095                                 total_rx_packets += DIV_ROUND_UP(ddp_bytes,
2096                                                                  mss);
2097                         }
2098                         if (!ddp_bytes) {
2099                                 dev_kfree_skb_any(skb);
2100                                 continue;
2101                         }
2102                 }
2103
2104 #endif /* IXGBE_FCOE */
2105                 skb_mark_napi_id(skb, &q_vector->napi);
2106                 ixgbe_rx_skb(q_vector, skb);
2107
2108                 /* update budget accounting */
2109                 total_rx_packets++;
2110         }
2111
2112         u64_stats_update_begin(&rx_ring->syncp);
2113         rx_ring->stats.packets += total_rx_packets;
2114         rx_ring->stats.bytes += total_rx_bytes;
2115         u64_stats_update_end(&rx_ring->syncp);
2116         q_vector->rx.total_packets += total_rx_packets;
2117         q_vector->rx.total_bytes += total_rx_bytes;
2118
2119         return total_rx_packets;
2120 }
2121
2122 #ifdef CONFIG_NET_RX_BUSY_POLL
2123 /* must be called with local_bh_disable()d */
2124 static int ixgbe_low_latency_recv(struct napi_struct *napi)
2125 {
2126         struct ixgbe_q_vector *q_vector =
2127                         container_of(napi, struct ixgbe_q_vector, napi);
2128         struct ixgbe_adapter *adapter = q_vector->adapter;
2129         struct ixgbe_ring  *ring;
2130         int found = 0;
2131
2132         if (test_bit(__IXGBE_DOWN, &adapter->state))
2133                 return LL_FLUSH_FAILED;
2134
2135         if (!ixgbe_qv_lock_poll(q_vector))
2136                 return LL_FLUSH_BUSY;
2137
2138         ixgbe_for_each_ring(ring, q_vector->rx) {
2139                 found = ixgbe_clean_rx_irq(q_vector, ring, 4);
2140 #ifdef BP_EXTENDED_STATS
2141                 if (found)
2142                         ring->stats.cleaned += found;
2143                 else
2144                         ring->stats.misses++;
2145 #endif
2146                 if (found)
2147                         break;
2148         }
2149
2150         ixgbe_qv_unlock_poll(q_vector);
2151
2152         return found;
2153 }
2154 #endif  /* CONFIG_NET_RX_BUSY_POLL */
2155
2156 /**
2157  * ixgbe_configure_msix - Configure MSI-X hardware
2158  * @adapter: board private structure
2159  *
2160  * ixgbe_configure_msix sets up the hardware to properly generate MSI-X
2161  * interrupts.
2162  **/
2163 static void ixgbe_configure_msix(struct ixgbe_adapter *adapter)
2164 {
2165         struct ixgbe_q_vector *q_vector;
2166         int v_idx;
2167         u32 mask;
2168
2169         /* Populate MSIX to EITR Select */
2170         if (adapter->num_vfs > 32) {
2171                 u32 eitrsel = (1 << (adapter->num_vfs - 32)) - 1;
2172                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, eitrsel);
2173         }
2174
2175         /*
2176          * Populate the IVAR table and set the ITR values to the
2177          * corresponding register.
2178          */
2179         for (v_idx = 0; v_idx < adapter->num_q_vectors; v_idx++) {
2180                 struct ixgbe_ring *ring;
2181                 q_vector = adapter->q_vector[v_idx];
2182
2183                 ixgbe_for_each_ring(ring, q_vector->rx)
2184                         ixgbe_set_ivar(adapter, 0, ring->reg_idx, v_idx);
2185
2186                 ixgbe_for_each_ring(ring, q_vector->tx)
2187                         ixgbe_set_ivar(adapter, 1, ring->reg_idx, v_idx);
2188
2189                 ixgbe_write_eitr(q_vector);
2190         }
2191
2192         switch (adapter->hw.mac.type) {
2193         case ixgbe_mac_82598EB:
2194                 ixgbe_set_ivar(adapter, -1, IXGBE_IVAR_OTHER_CAUSES_INDEX,
2195                                v_idx);
2196                 break;
2197         case ixgbe_mac_82599EB:
2198         case ixgbe_mac_X540:
2199         case ixgbe_mac_X550:
2200         case ixgbe_mac_X550EM_x:
2201                 ixgbe_set_ivar(adapter, -1, 1, v_idx);
2202                 break;
2203         default:
2204                 break;
2205         }
2206         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(v_idx), 1950);
2207
2208         /* set up to autoclear timer, and the vectors */
2209         mask = IXGBE_EIMS_ENABLE_MASK;
2210         mask &= ~(IXGBE_EIMS_OTHER |
2211                   IXGBE_EIMS_MAILBOX |
2212                   IXGBE_EIMS_LSC);
2213
2214         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIAC, mask);
2215 }
2216
2217 enum latency_range {
2218         lowest_latency = 0,
2219         low_latency = 1,
2220         bulk_latency = 2,
2221         latency_invalid = 255
2222 };
2223
2224 /**
2225  * ixgbe_update_itr - update the dynamic ITR value based on statistics
2226  * @q_vector: structure containing interrupt and ring information
2227  * @ring_container: structure containing ring performance data
2228  *
2229  *      Stores a new ITR value based on packets and byte
2230  *      counts during the last interrupt.  The advantage of per interrupt
2231  *      computation is faster updates and more accurate ITR for the current
2232  *      traffic pattern.  Constants in this function were computed
2233  *      based on theoretical maximum wire speed and thresholds were set based
2234  *      on testing data as well as attempting to minimize response time
2235  *      while increasing bulk throughput.
2236  *      this functionality is controlled by the InterruptThrottleRate module
2237  *      parameter (see ixgbe_param.c)
2238  **/
2239 static void ixgbe_update_itr(struct ixgbe_q_vector *q_vector,
2240                              struct ixgbe_ring_container *ring_container)
2241 {
2242         int bytes = ring_container->total_bytes;
2243         int packets = ring_container->total_packets;
2244         u32 timepassed_us;
2245         u64 bytes_perint;
2246         u8 itr_setting = ring_container->itr;
2247
2248         if (packets == 0)
2249                 return;
2250
2251         /* simple throttlerate management
2252          *   0-10MB/s   lowest (100000 ints/s)
2253          *  10-20MB/s   low    (20000 ints/s)
2254          *  20-1249MB/s bulk   (8000 ints/s)
2255          */
2256         /* what was last interrupt timeslice? */
2257         timepassed_us = q_vector->itr >> 2;
2258         if (timepassed_us == 0)
2259                 return;
2260
2261         bytes_perint = bytes / timepassed_us; /* bytes/usec */
2262
2263         switch (itr_setting) {
2264         case lowest_latency:
2265                 if (bytes_perint > 10)
2266                         itr_setting = low_latency;
2267                 break;
2268         case low_latency:
2269                 if (bytes_perint > 20)
2270                         itr_setting = bulk_latency;
2271                 else if (bytes_perint <= 10)
2272                         itr_setting = lowest_latency;
2273                 break;
2274         case bulk_latency:
2275                 if (bytes_perint <= 20)
2276                         itr_setting = low_latency;
2277                 break;
2278         }
2279
2280         /* clear work counters since we have the values we need */
2281         ring_container->total_bytes = 0;
2282         ring_container->total_packets = 0;
2283
2284         /* write updated itr to ring container */
2285         ring_container->itr = itr_setting;
2286 }
2287
2288 /**
2289  * ixgbe_write_eitr - write EITR register in hardware specific way
2290  * @q_vector: structure containing interrupt and ring information
2291  *
2292  * This function is made to be called by ethtool and by the driver
2293  * when it needs to update EITR registers at runtime.  Hardware
2294  * specific quirks/differences are taken care of here.
2295  */
2296 void ixgbe_write_eitr(struct ixgbe_q_vector *q_vector)
2297 {
2298         struct ixgbe_adapter *adapter = q_vector->adapter;
2299         struct ixgbe_hw *hw = &adapter->hw;
2300         int v_idx = q_vector->v_idx;
2301         u32 itr_reg = q_vector->itr & IXGBE_MAX_EITR;
2302
2303         switch (adapter->hw.mac.type) {
2304         case ixgbe_mac_82598EB:
2305                 /* must write high and low 16 bits to reset counter */
2306                 itr_reg |= (itr_reg << 16);
2307                 break;
2308         case ixgbe_mac_82599EB:
2309         case ixgbe_mac_X540:
2310         case ixgbe_mac_X550:
2311         case ixgbe_mac_X550EM_x:
2312                 /*
2313                  * set the WDIS bit to not clear the timer bits and cause an
2314                  * immediate assertion of the interrupt
2315                  */
2316                 itr_reg |= IXGBE_EITR_CNT_WDIS;
2317                 break;
2318         default:
2319                 break;
2320         }
2321         IXGBE_WRITE_REG(hw, IXGBE_EITR(v_idx), itr_reg);
2322 }
2323
2324 static void ixgbe_set_itr(struct ixgbe_q_vector *q_vector)
2325 {
2326         u32 new_itr = q_vector->itr;
2327         u8 current_itr;
2328
2329         ixgbe_update_itr(q_vector, &q_vector->tx);
2330         ixgbe_update_itr(q_vector, &q_vector->rx);
2331
2332         current_itr = max(q_vector->rx.itr, q_vector->tx.itr);
2333
2334         switch (current_itr) {
2335         /* counts and packets in update_itr are dependent on these numbers */
2336         case lowest_latency:
2337                 new_itr = IXGBE_100K_ITR;
2338                 break;
2339         case low_latency:
2340                 new_itr = IXGBE_20K_ITR;
2341                 break;
2342         case bulk_latency:
2343                 new_itr = IXGBE_8K_ITR;
2344                 break;
2345         default:
2346                 break;
2347         }
2348
2349         if (new_itr != q_vector->itr) {
2350                 /* do an exponential smoothing */
2351                 new_itr = (10 * new_itr * q_vector->itr) /
2352                           ((9 * new_itr) + q_vector->itr);
2353
2354                 /* save the algorithm value here */
2355                 q_vector->itr = new_itr;
2356
2357                 ixgbe_write_eitr(q_vector);
2358         }
2359 }
2360
2361 /**
2362  * ixgbe_check_overtemp_subtask - check for over temperature
2363  * @adapter: pointer to adapter
2364  **/
2365 static void ixgbe_check_overtemp_subtask(struct ixgbe_adapter *adapter)
2366 {
2367         struct ixgbe_hw *hw = &adapter->hw;
2368         u32 eicr = adapter->interrupt_event;
2369
2370         if (test_bit(__IXGBE_DOWN, &adapter->state))
2371                 return;
2372
2373         if (!(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE) &&
2374             !(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_EVENT))
2375                 return;
2376
2377         adapter->flags2 &= ~IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2378
2379         switch (hw->device_id) {
2380         case IXGBE_DEV_ID_82599_T3_LOM:
2381                 /*
2382                  * Since the warning interrupt is for both ports
2383                  * we don't have to check if:
2384                  *  - This interrupt wasn't for our port.
2385                  *  - We may have missed the interrupt so always have to
2386                  *    check if we  got a LSC
2387                  */
2388                 if (!(eicr & IXGBE_EICR_GPI_SDP0_8259X) &&
2389                     !(eicr & IXGBE_EICR_LSC))
2390                         return;
2391
2392                 if (!(eicr & IXGBE_EICR_LSC) && hw->mac.ops.check_link) {
2393                         u32 speed;
2394                         bool link_up = false;
2395
2396                         hw->mac.ops.check_link(hw, &speed, &link_up, false);
2397
2398                         if (link_up)
2399                                 return;
2400                 }
2401
2402                 /* Check if this is not due to overtemp */
2403                 if (hw->phy.ops.check_overtemp(hw) != IXGBE_ERR_OVERTEMP)
2404                         return;
2405
2406                 break;
2407         default:
2408                 if (adapter->hw.mac.type >= ixgbe_mac_X540)
2409                         return;
2410                 if (!(eicr & IXGBE_EICR_GPI_SDP0(hw)))
2411                         return;
2412                 break;
2413         }
2414         e_crit(drv, "%s\n", ixgbe_overheat_msg);
2415
2416         adapter->interrupt_event = 0;
2417 }
2418
2419 static void ixgbe_check_fan_failure(struct ixgbe_adapter *adapter, u32 eicr)
2420 {
2421         struct ixgbe_hw *hw = &adapter->hw;
2422
2423         if ((adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) &&
2424             (eicr & IXGBE_EICR_GPI_SDP1(hw))) {
2425                 e_crit(probe, "Fan has stopped, replace the adapter\n");
2426                 /* write to clear the interrupt */
2427                 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1(hw));
2428         }
2429 }
2430
2431 static void ixgbe_check_overtemp_event(struct ixgbe_adapter *adapter, u32 eicr)
2432 {
2433         struct ixgbe_hw *hw = &adapter->hw;
2434
2435         if (!(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE))
2436                 return;
2437
2438         switch (adapter->hw.mac.type) {
2439         case ixgbe_mac_82599EB:
2440                 /*
2441                  * Need to check link state so complete overtemp check
2442                  * on service task
2443                  */
2444                 if (((eicr & IXGBE_EICR_GPI_SDP0(hw)) ||
2445                      (eicr & IXGBE_EICR_LSC)) &&
2446                     (!test_bit(__IXGBE_DOWN, &adapter->state))) {
2447                         adapter->interrupt_event = eicr;
2448                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2449                         ixgbe_service_event_schedule(adapter);
2450                         return;
2451                 }
2452                 return;
2453         case ixgbe_mac_X540:
2454                 if (!(eicr & IXGBE_EICR_TS))
2455                         return;
2456                 break;
2457         default:
2458                 return;
2459         }
2460
2461         e_crit(drv, "%s\n", ixgbe_overheat_msg);
2462 }
2463
2464 static inline bool ixgbe_is_sfp(struct ixgbe_hw *hw)
2465 {
2466         switch (hw->mac.type) {
2467         case ixgbe_mac_82598EB:
2468                 if (hw->phy.type == ixgbe_phy_nl)
2469                         return true;
2470                 return false;
2471         case ixgbe_mac_82599EB:
2472         case ixgbe_mac_X550EM_x:
2473                 switch (hw->mac.ops.get_media_type(hw)) {
2474                 case ixgbe_media_type_fiber:
2475                 case ixgbe_media_type_fiber_qsfp:
2476                         return true;
2477                 default:
2478                         return false;
2479                 }
2480         default:
2481                 return false;
2482         }
2483 }
2484
2485 static void ixgbe_check_sfp_event(struct ixgbe_adapter *adapter, u32 eicr)
2486 {
2487         struct ixgbe_hw *hw = &adapter->hw;
2488
2489         if (eicr & IXGBE_EICR_GPI_SDP2(hw)) {
2490                 /* Clear the interrupt */
2491                 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP2(hw));
2492                 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2493                         adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
2494                         ixgbe_service_event_schedule(adapter);
2495                 }
2496         }
2497
2498         if (eicr & IXGBE_EICR_GPI_SDP1(hw)) {
2499                 /* Clear the interrupt */
2500                 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1(hw));
2501                 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2502                         adapter->flags |= IXGBE_FLAG_NEED_LINK_CONFIG;
2503                         ixgbe_service_event_schedule(adapter);
2504                 }
2505         }
2506 }
2507
2508 static void ixgbe_check_lsc(struct ixgbe_adapter *adapter)
2509 {
2510         struct ixgbe_hw *hw = &adapter->hw;
2511
2512         adapter->lsc_int++;
2513         adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
2514         adapter->link_check_timeout = jiffies;
2515         if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2516                 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_LSC);
2517                 IXGBE_WRITE_FLUSH(hw);
2518                 ixgbe_service_event_schedule(adapter);
2519         }
2520 }
2521
2522 static inline void ixgbe_irq_enable_queues(struct ixgbe_adapter *adapter,
2523                                            u64 qmask)
2524 {
2525         u32 mask;
2526         struct ixgbe_hw *hw = &adapter->hw;
2527
2528         switch (hw->mac.type) {
2529         case ixgbe_mac_82598EB:
2530                 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
2531                 IXGBE_WRITE_REG(hw, IXGBE_EIMS, mask);
2532                 break;
2533         case ixgbe_mac_82599EB:
2534         case ixgbe_mac_X540:
2535         case ixgbe_mac_X550:
2536         case ixgbe_mac_X550EM_x:
2537                 mask = (qmask & 0xFFFFFFFF);
2538                 if (mask)
2539                         IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(0), mask);
2540                 mask = (qmask >> 32);
2541                 if (mask)
2542                         IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(1), mask);
2543                 break;
2544         default:
2545                 break;
2546         }
2547         /* skip the flush */
2548 }
2549
2550 static inline void ixgbe_irq_disable_queues(struct ixgbe_adapter *adapter,
2551                                             u64 qmask)
2552 {
2553         u32 mask;
2554         struct ixgbe_hw *hw = &adapter->hw;
2555
2556         switch (hw->mac.type) {
2557         case ixgbe_mac_82598EB:
2558                 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
2559                 IXGBE_WRITE_REG(hw, IXGBE_EIMC, mask);
2560                 break;
2561         case ixgbe_mac_82599EB:
2562         case ixgbe_mac_X540:
2563         case ixgbe_mac_X550:
2564         case ixgbe_mac_X550EM_x:
2565                 mask = (qmask & 0xFFFFFFFF);
2566                 if (mask)
2567                         IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(0), mask);
2568                 mask = (qmask >> 32);
2569                 if (mask)
2570                         IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(1), mask);
2571                 break;
2572         default:
2573                 break;
2574         }
2575         /* skip the flush */
2576 }
2577
2578 /**
2579  * ixgbe_irq_enable - Enable default interrupt generation settings
2580  * @adapter: board private structure
2581  **/
2582 static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter, bool queues,
2583                                     bool flush)
2584 {
2585         struct ixgbe_hw *hw = &adapter->hw;
2586         u32 mask = (IXGBE_EIMS_ENABLE_MASK & ~IXGBE_EIMS_RTX_QUEUE);
2587
2588         /* don't reenable LSC while waiting for link */
2589         if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE)
2590                 mask &= ~IXGBE_EIMS_LSC;
2591
2592         if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE)
2593                 switch (adapter->hw.mac.type) {
2594                 case ixgbe_mac_82599EB:
2595                         mask |= IXGBE_EIMS_GPI_SDP0(hw);
2596                         break;
2597                 case ixgbe_mac_X540:
2598                 case ixgbe_mac_X550:
2599                 case ixgbe_mac_X550EM_x:
2600                         mask |= IXGBE_EIMS_TS;
2601                         break;
2602                 default:
2603                         break;
2604                 }
2605         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
2606                 mask |= IXGBE_EIMS_GPI_SDP1(hw);
2607         switch (adapter->hw.mac.type) {
2608         case ixgbe_mac_82599EB:
2609                 mask |= IXGBE_EIMS_GPI_SDP1(hw);
2610                 mask |= IXGBE_EIMS_GPI_SDP2(hw);
2611                 /* fall through */
2612         case ixgbe_mac_X540:
2613         case ixgbe_mac_X550:
2614         case ixgbe_mac_X550EM_x:
2615                 if (adapter->hw.phy.type == ixgbe_phy_x550em_ext_t)
2616                         mask |= IXGBE_EICR_GPI_SDP0_X540;
2617                 mask |= IXGBE_EIMS_ECC;
2618                 mask |= IXGBE_EIMS_MAILBOX;
2619                 break;
2620         default:
2621                 break;
2622         }
2623
2624         if ((adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) &&
2625             !(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT))
2626                 mask |= IXGBE_EIMS_FLOW_DIR;
2627
2628         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask);
2629         if (queues)
2630                 ixgbe_irq_enable_queues(adapter, ~0);
2631         if (flush)
2632                 IXGBE_WRITE_FLUSH(&adapter->hw);
2633 }
2634
2635 static irqreturn_t ixgbe_msix_other(int irq, void *data)
2636 {
2637         struct ixgbe_adapter *adapter = data;
2638         struct ixgbe_hw *hw = &adapter->hw;
2639         u32 eicr;
2640
2641         /*
2642          * Workaround for Silicon errata.  Use clear-by-write instead
2643          * of clear-by-read.  Reading with EICS will return the
2644          * interrupt causes without clearing, which later be done
2645          * with the write to EICR.
2646          */
2647         eicr = IXGBE_READ_REG(hw, IXGBE_EICS);
2648
2649         /* The lower 16bits of the EICR register are for the queue interrupts
2650          * which should be masked here in order to not accidentally clear them if
2651          * the bits are high when ixgbe_msix_other is called. There is a race
2652          * condition otherwise which results in possible performance loss
2653          * especially if the ixgbe_msix_other interrupt is triggering
2654          * consistently (as it would when PPS is turned on for the X540 device)
2655          */
2656         eicr &= 0xFFFF0000;
2657
2658         IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr);
2659
2660         if (eicr & IXGBE_EICR_LSC)
2661                 ixgbe_check_lsc(adapter);
2662
2663         if (eicr & IXGBE_EICR_MAILBOX)
2664                 ixgbe_msg_task(adapter);
2665
2666         switch (hw->mac.type) {
2667         case ixgbe_mac_82599EB:
2668         case ixgbe_mac_X540:
2669         case ixgbe_mac_X550:
2670         case ixgbe_mac_X550EM_x:
2671                 if (hw->phy.type == ixgbe_phy_x550em_ext_t &&
2672                     (eicr & IXGBE_EICR_GPI_SDP0_X540)) {
2673                         adapter->flags2 |= IXGBE_FLAG2_PHY_INTERRUPT;
2674                         ixgbe_service_event_schedule(adapter);
2675                         IXGBE_WRITE_REG(hw, IXGBE_EICR,
2676                                         IXGBE_EICR_GPI_SDP0_X540);
2677                 }
2678                 if (eicr & IXGBE_EICR_ECC) {
2679                         e_info(link, "Received ECC Err, initiating reset\n");
2680                         adapter->flags2 |= IXGBE_FLAG2_RESET_REQUESTED;
2681                         ixgbe_service_event_schedule(adapter);
2682                         IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_ECC);
2683                 }
2684                 /* Handle Flow Director Full threshold interrupt */
2685                 if (eicr & IXGBE_EICR_FLOW_DIR) {
2686                         int reinit_count = 0;
2687                         int i;
2688                         for (i = 0; i < adapter->num_tx_queues; i++) {
2689                                 struct ixgbe_ring *ring = adapter->tx_ring[i];
2690                                 if (test_and_clear_bit(__IXGBE_TX_FDIR_INIT_DONE,
2691                                                        &ring->state))
2692                                         reinit_count++;
2693                         }
2694                         if (reinit_count) {
2695                                 /* no more flow director interrupts until after init */
2696                                 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_FLOW_DIR);
2697                                 adapter->flags2 |= IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
2698                                 ixgbe_service_event_schedule(adapter);
2699                         }
2700                 }
2701                 ixgbe_check_sfp_event(adapter, eicr);
2702                 ixgbe_check_overtemp_event(adapter, eicr);
2703                 break;
2704         default:
2705                 break;
2706         }
2707
2708         ixgbe_check_fan_failure(adapter, eicr);
2709
2710         if (unlikely(eicr & IXGBE_EICR_TIMESYNC))
2711                 ixgbe_ptp_check_pps_event(adapter, eicr);
2712
2713         /* re-enable the original interrupt state, no lsc, no queues */
2714         if (!test_bit(__IXGBE_DOWN, &adapter->state))
2715                 ixgbe_irq_enable(adapter, false, false);
2716
2717         return IRQ_HANDLED;
2718 }
2719
2720 static irqreturn_t ixgbe_msix_clean_rings(int irq, void *data)
2721 {
2722         struct ixgbe_q_vector *q_vector = data;
2723
2724         /* EIAM disabled interrupts (on this vector) for us */
2725
2726         if (q_vector->rx.ring || q_vector->tx.ring)
2727                 napi_schedule(&q_vector->napi);
2728
2729         return IRQ_HANDLED;
2730 }
2731
2732 /**
2733  * ixgbe_poll - NAPI Rx polling callback
2734  * @napi: structure for representing this polling device
2735  * @budget: how many packets driver is allowed to clean
2736  *
2737  * This function is used for legacy and MSI, NAPI mode
2738  **/
2739 int ixgbe_poll(struct napi_struct *napi, int budget)
2740 {
2741         struct ixgbe_q_vector *q_vector =
2742                                 container_of(napi, struct ixgbe_q_vector, napi);
2743         struct ixgbe_adapter *adapter = q_vector->adapter;
2744         struct ixgbe_ring *ring;
2745         int per_ring_budget;
2746         bool clean_complete = true;
2747
2748 #ifdef CONFIG_IXGBE_DCA
2749         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
2750                 ixgbe_update_dca(q_vector);
2751 #endif
2752
2753         ixgbe_for_each_ring(ring, q_vector->tx)
2754                 clean_complete &= !!ixgbe_clean_tx_irq(q_vector, ring);
2755
2756         if (!ixgbe_qv_lock_napi(q_vector))
2757                 return budget;
2758
2759         /* attempt to distribute budget to each queue fairly, but don't allow
2760          * the budget to go below 1 because we'll exit polling */
2761         if (q_vector->rx.count > 1)
2762                 per_ring_budget = max(budget/q_vector->rx.count, 1);
2763         else
2764                 per_ring_budget = budget;
2765
2766         ixgbe_for_each_ring(ring, q_vector->rx)
2767                 clean_complete &= (ixgbe_clean_rx_irq(q_vector, ring,
2768                                    per_ring_budget) < per_ring_budget);
2769
2770         ixgbe_qv_unlock_napi(q_vector);
2771         /* If all work not completed, return budget and keep polling */
2772         if (!clean_complete)
2773                 return budget;
2774
2775         /* all work done, exit the polling mode */
2776         napi_complete(napi);
2777         if (adapter->rx_itr_setting & 1)
2778                 ixgbe_set_itr(q_vector);
2779         if (!test_bit(__IXGBE_DOWN, &adapter->state))
2780                 ixgbe_irq_enable_queues(adapter, ((u64)1 << q_vector->v_idx));
2781
2782         return 0;
2783 }
2784
2785 /**
2786  * ixgbe_request_msix_irqs - Initialize MSI-X interrupts
2787  * @adapter: board private structure
2788  *
2789  * ixgbe_request_msix_irqs allocates MSI-X vectors and requests
2790  * interrupts from the kernel.
2791  **/
2792 static int ixgbe_request_msix_irqs(struct ixgbe_adapter *adapter)
2793 {
2794         struct net_device *netdev = adapter->netdev;
2795         int vector, err;
2796         int ri = 0, ti = 0;
2797
2798         for (vector = 0; vector < adapter->num_q_vectors; vector++) {
2799                 struct ixgbe_q_vector *q_vector = adapter->q_vector[vector];
2800                 struct msix_entry *entry = &adapter->msix_entries[vector];
2801
2802                 if (q_vector->tx.ring && q_vector->rx.ring) {
2803                         snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2804                                  "%s-%s-%d", netdev->name, "TxRx", ri++);
2805                         ti++;
2806                 } else if (q_vector->rx.ring) {
2807                         snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2808                                  "%s-%s-%d", netdev->name, "rx", ri++);
2809                 } else if (q_vector->tx.ring) {
2810                         snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2811                                  "%s-%s-%d", netdev->name, "tx", ti++);
2812                 } else {
2813                         /* skip this unused q_vector */
2814                         continue;
2815                 }
2816                 err = request_irq(entry->vector, &ixgbe_msix_clean_rings, 0,
2817                                   q_vector->name, q_vector);
2818                 if (err) {
2819                         e_err(probe, "request_irq failed for MSIX interrupt "
2820                               "Error: %d\n", err);
2821                         goto free_queue_irqs;
2822                 }
2823                 /* If Flow Director is enabled, set interrupt affinity */
2824                 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
2825                         /* assign the mask for this irq */
2826                         irq_set_affinity_hint(entry->vector,
2827                                               &q_vector->affinity_mask);
2828                 }
2829         }
2830
2831         err = request_irq(adapter->msix_entries[vector].vector,
2832                           ixgbe_msix_other, 0, netdev->name, adapter);
2833         if (err) {
2834                 e_err(probe, "request_irq for msix_other failed: %d\n", err);
2835                 goto free_queue_irqs;
2836         }
2837
2838         return 0;
2839
2840 free_queue_irqs:
2841         while (vector) {
2842                 vector--;
2843                 irq_set_affinity_hint(adapter->msix_entries[vector].vector,
2844                                       NULL);
2845                 free_irq(adapter->msix_entries[vector].vector,
2846                          adapter->q_vector[vector]);
2847         }
2848         adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
2849         pci_disable_msix(adapter->pdev);
2850         kfree(adapter->msix_entries);
2851         adapter->msix_entries = NULL;
2852         return err;
2853 }
2854
2855 /**
2856  * ixgbe_intr - legacy mode Interrupt Handler
2857  * @irq: interrupt number
2858  * @data: pointer to a network interface device structure
2859  **/
2860 static irqreturn_t ixgbe_intr(int irq, void *data)
2861 {
2862         struct ixgbe_adapter *adapter = data;
2863         struct ixgbe_hw *hw = &adapter->hw;
2864         struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
2865         u32 eicr;
2866
2867         /*
2868          * Workaround for silicon errata #26 on 82598.  Mask the interrupt
2869          * before the read of EICR.
2870          */
2871         IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_IRQ_CLEAR_MASK);
2872
2873         /* for NAPI, using EIAM to auto-mask tx/rx interrupt bits on read
2874          * therefore no explicit interrupt disable is necessary */
2875         eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
2876         if (!eicr) {
2877                 /*
2878                  * shared interrupt alert!
2879                  * make sure interrupts are enabled because the read will
2880                  * have disabled interrupts due to EIAM
2881                  * finish the workaround of silicon errata on 82598.  Unmask
2882                  * the interrupt that we masked before the EICR read.
2883                  */
2884                 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2885                         ixgbe_irq_enable(adapter, true, true);
2886                 return IRQ_NONE;        /* Not our interrupt */
2887         }
2888
2889         if (eicr & IXGBE_EICR_LSC)
2890                 ixgbe_check_lsc(adapter);
2891
2892         switch (hw->mac.type) {
2893         case ixgbe_mac_82599EB:
2894                 ixgbe_check_sfp_event(adapter, eicr);
2895                 /* Fall through */
2896         case ixgbe_mac_X540:
2897         case ixgbe_mac_X550:
2898         case ixgbe_mac_X550EM_x:
2899                 if (eicr & IXGBE_EICR_ECC) {
2900                         e_info(link, "Received ECC Err, initiating reset\n");
2901                         adapter->flags2 |= IXGBE_FLAG2_RESET_REQUESTED;
2902                         ixgbe_service_event_schedule(adapter);
2903                         IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_ECC);
2904                 }
2905                 ixgbe_check_overtemp_event(adapter, eicr);
2906                 break;
2907         default:
2908                 break;
2909         }
2910
2911         ixgbe_check_fan_failure(adapter, eicr);
2912         if (unlikely(eicr & IXGBE_EICR_TIMESYNC))
2913                 ixgbe_ptp_check_pps_event(adapter, eicr);
2914
2915         /* would disable interrupts here but EIAM disabled it */
2916         napi_schedule(&q_vector->napi);
2917
2918         /*
2919          * re-enable link(maybe) and non-queue interrupts, no flush.
2920          * ixgbe_poll will re-enable the queue interrupts
2921          */
2922         if (!test_bit(__IXGBE_DOWN, &adapter->state))
2923                 ixgbe_irq_enable(adapter, false, false);
2924
2925         return IRQ_HANDLED;
2926 }
2927
2928 /**
2929  * ixgbe_request_irq - initialize interrupts
2930  * @adapter: board private structure
2931  *
2932  * Attempts to configure interrupts using the best available
2933  * capabilities of the hardware and kernel.
2934  **/
2935 static int ixgbe_request_irq(struct ixgbe_adapter *adapter)
2936 {
2937         struct net_device *netdev = adapter->netdev;
2938         int err;
2939
2940         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
2941                 err = ixgbe_request_msix_irqs(adapter);
2942         else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED)
2943                 err = request_irq(adapter->pdev->irq, ixgbe_intr, 0,
2944                                   netdev->name, adapter);
2945         else
2946                 err = request_irq(adapter->pdev->irq, ixgbe_intr, IRQF_SHARED,
2947                                   netdev->name, adapter);
2948
2949         if (err)
2950                 e_err(probe, "request_irq failed, Error %d\n", err);
2951
2952         return err;
2953 }
2954
2955 static void ixgbe_free_irq(struct ixgbe_adapter *adapter)
2956 {
2957         int vector;
2958
2959         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
2960                 free_irq(adapter->pdev->irq, adapter);
2961                 return;
2962         }
2963
2964         for (vector = 0; vector < adapter->num_q_vectors; vector++) {
2965                 struct ixgbe_q_vector *q_vector = adapter->q_vector[vector];
2966                 struct msix_entry *entry = &adapter->msix_entries[vector];
2967
2968                 /* free only the irqs that were actually requested */
2969                 if (!q_vector->rx.ring && !q_vector->tx.ring)
2970                         continue;
2971
2972                 /* clear the affinity_mask in the IRQ descriptor */
2973                 irq_set_affinity_hint(entry->vector, NULL);
2974
2975                 free_irq(entry->vector, q_vector);
2976         }
2977
2978         free_irq(adapter->msix_entries[vector++].vector, adapter);
2979 }
2980
2981 /**
2982  * ixgbe_irq_disable - Mask off interrupt generation on the NIC
2983  * @adapter: board private structure
2984  **/
2985 static inline void ixgbe_irq_disable(struct ixgbe_adapter *adapter)
2986 {
2987         switch (adapter->hw.mac.type) {
2988         case ixgbe_mac_82598EB:
2989                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, ~0);
2990                 break;
2991         case ixgbe_mac_82599EB:
2992         case ixgbe_mac_X540:
2993         case ixgbe_mac_X550:
2994         case ixgbe_mac_X550EM_x:
2995                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFF0000);
2996                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(0), ~0);
2997                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(1), ~0);
2998                 break;
2999         default:
3000                 break;
3001         }
3002         IXGBE_WRITE_FLUSH(&adapter->hw);
3003         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
3004                 int vector;
3005
3006                 for (vector = 0; vector < adapter->num_q_vectors; vector++)
3007                         synchronize_irq(adapter->msix_entries[vector].vector);
3008
3009                 synchronize_irq(adapter->msix_entries[vector++].vector);
3010         } else {
3011                 synchronize_irq(adapter->pdev->irq);
3012         }
3013 }
3014
3015 /**
3016  * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts
3017  *
3018  **/
3019 static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter *adapter)
3020 {
3021         struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
3022
3023         ixgbe_write_eitr(q_vector);
3024
3025         ixgbe_set_ivar(adapter, 0, 0, 0);
3026         ixgbe_set_ivar(adapter, 1, 0, 0);
3027
3028         e_info(hw, "Legacy interrupt IVAR setup done\n");
3029 }
3030
3031 /**
3032  * ixgbe_configure_tx_ring - Configure 8259x Tx ring after Reset
3033  * @adapter: board private structure
3034  * @ring: structure containing ring specific data
3035  *
3036  * Configure the Tx descriptor ring after a reset.
3037  **/
3038 void ixgbe_configure_tx_ring(struct ixgbe_adapter *adapter,
3039                              struct ixgbe_ring *ring)
3040 {
3041         struct ixgbe_hw *hw = &adapter->hw;
3042         u64 tdba = ring->dma;
3043         int wait_loop = 10;
3044         u32 txdctl = IXGBE_TXDCTL_ENABLE;
3045         u8 reg_idx = ring->reg_idx;
3046
3047         /* disable queue to avoid issues while updating state */
3048         IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), 0);
3049         IXGBE_WRITE_FLUSH(hw);
3050
3051         IXGBE_WRITE_REG(hw, IXGBE_TDBAL(reg_idx),
3052                         (tdba & DMA_BIT_MASK(32)));
3053         IXGBE_WRITE_REG(hw, IXGBE_TDBAH(reg_idx), (tdba >> 32));
3054         IXGBE_WRITE_REG(hw, IXGBE_TDLEN(reg_idx),
3055                         ring->count * sizeof(union ixgbe_adv_tx_desc));
3056         IXGBE_WRITE_REG(hw, IXGBE_TDH(reg_idx), 0);
3057         IXGBE_WRITE_REG(hw, IXGBE_TDT(reg_idx), 0);
3058         ring->tail = adapter->io_addr + IXGBE_TDT(reg_idx);
3059
3060         /*
3061          * set WTHRESH to encourage burst writeback, it should not be set
3062          * higher than 1 when:
3063          * - ITR is 0 as it could cause false TX hangs
3064          * - ITR is set to > 100k int/sec and BQL is enabled
3065          *
3066          * In order to avoid issues WTHRESH + PTHRESH should always be equal
3067          * to or less than the number of on chip descriptors, which is
3068          * currently 40.
3069          */
3070         if (!ring->q_vector || (ring->q_vector->itr < IXGBE_100K_ITR))
3071                 txdctl |= (1 << 16);    /* WTHRESH = 1 */
3072         else
3073                 txdctl |= (8 << 16);    /* WTHRESH = 8 */
3074
3075         /*
3076          * Setting PTHRESH to 32 both improves performance
3077          * and avoids a TX hang with DFP enabled
3078          */
3079         txdctl |= (1 << 8) |    /* HTHRESH = 1 */
3080                    32;          /* PTHRESH = 32 */
3081
3082         /* reinitialize flowdirector state */
3083         if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
3084                 ring->atr_sample_rate = adapter->atr_sample_rate;
3085                 ring->atr_count = 0;
3086                 set_bit(__IXGBE_TX_FDIR_INIT_DONE, &ring->state);
3087         } else {
3088                 ring->atr_sample_rate = 0;
3089         }
3090
3091         /* initialize XPS */
3092         if (!test_and_set_bit(__IXGBE_TX_XPS_INIT_DONE, &ring->state)) {
3093                 struct ixgbe_q_vector *q_vector = ring->q_vector;
3094
3095                 if (q_vector)
3096                         netif_set_xps_queue(ring->netdev,
3097                                             &q_vector->affinity_mask,
3098                                             ring->queue_index);
3099         }
3100
3101         clear_bit(__IXGBE_HANG_CHECK_ARMED, &ring->state);
3102
3103         /* enable queue */
3104         IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), txdctl);
3105
3106         /* TXDCTL.EN will return 0 on 82598 if link is down, so skip it */
3107         if (hw->mac.type == ixgbe_mac_82598EB &&
3108             !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
3109                 return;
3110
3111         /* poll to verify queue is enabled */
3112         do {
3113                 usleep_range(1000, 2000);
3114                 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(reg_idx));
3115         } while (--wait_loop && !(txdctl & IXGBE_TXDCTL_ENABLE));
3116         if (!wait_loop)
3117                 e_err(drv, "Could not enable Tx Queue %d\n", reg_idx);
3118 }
3119
3120 static void ixgbe_setup_mtqc(struct ixgbe_adapter *adapter)
3121 {
3122         struct ixgbe_hw *hw = &adapter->hw;
3123         u32 rttdcs, mtqc;
3124         u8 tcs = netdev_get_num_tc(adapter->netdev);
3125
3126         if (hw->mac.type == ixgbe_mac_82598EB)
3127                 return;
3128
3129         /* disable the arbiter while setting MTQC */
3130         rttdcs = IXGBE_READ_REG(hw, IXGBE_RTTDCS);
3131         rttdcs |= IXGBE_RTTDCS_ARBDIS;
3132         IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
3133
3134         /* set transmit pool layout */
3135         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
3136                 mtqc = IXGBE_MTQC_VT_ENA;
3137                 if (tcs > 4)
3138                         mtqc |= IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ;
3139                 else if (tcs > 1)
3140                         mtqc |= IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;
3141                 else if (adapter->ring_feature[RING_F_RSS].indices == 4)
3142                         mtqc |= IXGBE_MTQC_32VF;
3143                 else
3144                         mtqc |= IXGBE_MTQC_64VF;
3145         } else {
3146                 if (tcs > 4)
3147                         mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ;
3148                 else if (tcs > 1)
3149                         mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;
3150                 else
3151                         mtqc = IXGBE_MTQC_64Q_1PB;
3152         }
3153
3154         IXGBE_WRITE_REG(hw, IXGBE_MTQC, mtqc);
3155
3156         /* Enable Security TX Buffer IFG for multiple pb */
3157         if (tcs) {
3158                 u32 sectx = IXGBE_READ_REG(hw, IXGBE_SECTXMINIFG);
3159                 sectx |= IXGBE_SECTX_DCB;
3160                 IXGBE_WRITE_REG(hw, IXGBE_SECTXMINIFG, sectx);
3161         }
3162
3163         /* re-enable the arbiter */
3164         rttdcs &= ~IXGBE_RTTDCS_ARBDIS;
3165         IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
3166 }
3167
3168 /**
3169  * ixgbe_configure_tx - Configure 8259x Transmit Unit after Reset
3170  * @adapter: board private structure
3171  *
3172  * Configure the Tx unit of the MAC after a reset.
3173  **/
3174 static void ixgbe_configure_tx(struct ixgbe_adapter *adapter)
3175 {
3176         struct ixgbe_hw *hw = &adapter->hw;
3177         u32 dmatxctl;
3178         u32 i;
3179
3180         ixgbe_setup_mtqc(adapter);
3181
3182         if (hw->mac.type != ixgbe_mac_82598EB) {
3183                 /* DMATXCTL.EN must be before Tx queues are enabled */
3184                 dmatxctl = IXGBE_READ_REG(hw, IXGBE_DMATXCTL);
3185                 dmatxctl |= IXGBE_DMATXCTL_TE;
3186                 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, dmatxctl);
3187         }
3188
3189         /* Setup the HW Tx Head and Tail descriptor pointers */
3190         for (i = 0; i < adapter->num_tx_queues; i++)
3191                 ixgbe_configure_tx_ring(adapter, adapter->tx_ring[i]);
3192 }
3193
3194 static void ixgbe_enable_rx_drop(struct ixgbe_adapter *adapter,
3195                                  struct ixgbe_ring *ring)
3196 {
3197         struct ixgbe_hw *hw = &adapter->hw;
3198         u8 reg_idx = ring->reg_idx;
3199         u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(reg_idx));
3200
3201         srrctl |= IXGBE_SRRCTL_DROP_EN;
3202
3203         IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3204 }
3205
3206 static void ixgbe_disable_rx_drop(struct ixgbe_adapter *adapter,
3207                                   struct ixgbe_ring *ring)
3208 {
3209         struct ixgbe_hw *hw = &adapter->hw;
3210         u8 reg_idx = ring->reg_idx;
3211         u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(reg_idx));
3212
3213         srrctl &= ~IXGBE_SRRCTL_DROP_EN;
3214
3215         IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3216 }
3217
3218 #ifdef CONFIG_IXGBE_DCB
3219 void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter)
3220 #else
3221 static void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter)
3222 #endif
3223 {
3224         int i;
3225         bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
3226
3227         if (adapter->ixgbe_ieee_pfc)
3228                 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
3229
3230         /*
3231          * We should set the drop enable bit if:
3232          *  SR-IOV is enabled
3233          *   or
3234          *  Number of Rx queues > 1 and flow control is disabled
3235          *
3236          *  This allows us to avoid head of line blocking for security
3237          *  and performance reasons.
3238          */
3239         if (adapter->num_vfs || (adapter->num_rx_queues > 1 &&
3240             !(adapter->hw.fc.current_mode & ixgbe_fc_tx_pause) && !pfc_en)) {
3241                 for (i = 0; i < adapter->num_rx_queues; i++)
3242                         ixgbe_enable_rx_drop(adapter, adapter->rx_ring[i]);
3243         } else {
3244                 for (i = 0; i < adapter->num_rx_queues; i++)
3245                         ixgbe_disable_rx_drop(adapter, adapter->rx_ring[i]);
3246         }
3247 }
3248
3249 #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
3250
3251 static void ixgbe_configure_srrctl(struct ixgbe_adapter *adapter,
3252                                    struct ixgbe_ring *rx_ring)
3253 {
3254         struct ixgbe_hw *hw = &adapter->hw;
3255         u32 srrctl;
3256         u8 reg_idx = rx_ring->reg_idx;
3257
3258         if (hw->mac.type == ixgbe_mac_82598EB) {
3259                 u16 mask = adapter->ring_feature[RING_F_RSS].mask;
3260
3261                 /*
3262                  * if VMDq is not active we must program one srrctl register
3263                  * per RSS queue since we have enabled RDRXCTL.MVMEN
3264                  */
3265                 reg_idx &= mask;
3266         }
3267
3268         /* configure header buffer length, needed for RSC */
3269         srrctl = IXGBE_RX_HDR_SIZE << IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT;
3270
3271         /* configure the packet buffer length */
3272         srrctl |= ixgbe_rx_bufsz(rx_ring) >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
3273
3274         /* configure descriptor type */
3275         srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
3276
3277         IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3278 }
3279
3280 /**
3281  * Return a number of entries in the RSS indirection table
3282  *
3283  * @adapter: device handle
3284  *
3285  *  - 82598/82599/X540:     128
3286  *  - X550(non-SRIOV mode): 512
3287  *  - X550(SRIOV mode):     64
3288  */
3289 u32 ixgbe_rss_indir_tbl_entries(struct ixgbe_adapter *adapter)
3290 {
3291         if (adapter->hw.mac.type < ixgbe_mac_X550)
3292                 return 128;
3293         else if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
3294                 return 64;
3295         else
3296                 return 512;
3297 }
3298
3299 /**
3300  * Write the RETA table to HW
3301  *
3302  * @adapter: device handle
3303  *
3304  * Write the RSS redirection table stored in adapter.rss_indir_tbl[] to HW.
3305  */
3306 static void ixgbe_store_reta(struct ixgbe_adapter *adapter)
3307 {
3308         u32 i, reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3309         struct ixgbe_hw *hw = &adapter->hw;
3310         u32 reta = 0;
3311         u32 indices_multi;
3312         u8 *indir_tbl = adapter->rss_indir_tbl;
3313
3314         /* Fill out the redirection table as follows:
3315          *  - 82598:      8 bit wide entries containing pair of 4 bit RSS
3316          *    indices.
3317          *  - 82599/X540: 8 bit wide entries containing 4 bit RSS index
3318          *  - X550:       8 bit wide entries containing 6 bit RSS index
3319          */
3320         if (adapter->hw.mac.type == ixgbe_mac_82598EB)
3321                 indices_multi = 0x11;
3322         else
3323                 indices_multi = 0x1;
3324
3325         /* Write redirection table to HW */
3326         for (i = 0; i < reta_entries; i++) {
3327                 reta |= indices_multi * indir_tbl[i] << (i & 0x3) * 8;
3328                 if ((i & 3) == 3) {
3329                         if (i < 128)
3330                                 IXGBE_WRITE_REG(hw, IXGBE_RETA(i >> 2), reta);
3331                         else
3332                                 IXGBE_WRITE_REG(hw, IXGBE_ERETA((i >> 2) - 32),
3333                                                 reta);
3334                         reta = 0;
3335                 }
3336         }
3337 }
3338
3339 /**
3340  * Write the RETA table to HW (for x550 devices in SRIOV mode)
3341  *
3342  * @adapter: device handle
3343  *
3344  * Write the RSS redirection table stored in adapter.rss_indir_tbl[] to HW.
3345  */
3346 static void ixgbe_store_vfreta(struct ixgbe_adapter *adapter)
3347 {
3348         u32 i, reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3349         struct ixgbe_hw *hw = &adapter->hw;
3350         u32 vfreta = 0;
3351         unsigned int pf_pool = adapter->num_vfs;
3352
3353         /* Write redirection table to HW */
3354         for (i = 0; i < reta_entries; i++) {
3355                 vfreta |= (u32)adapter->rss_indir_tbl[i] << (i & 0x3) * 8;
3356                 if ((i & 3) == 3) {
3357                         IXGBE_WRITE_REG(hw, IXGBE_PFVFRETA(i >> 2, pf_pool),
3358                                         vfreta);
3359                         vfreta = 0;
3360                 }
3361         }
3362 }
3363
3364 static void ixgbe_setup_reta(struct ixgbe_adapter *adapter)
3365 {
3366         struct ixgbe_hw *hw = &adapter->hw;
3367         u32 i, j;
3368         u32 reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3369         u16 rss_i = adapter->ring_feature[RING_F_RSS].indices;
3370
3371         /* Program table for at least 2 queues w/ SR-IOV so that VFs can
3372          * make full use of any rings they may have.  We will use the
3373          * PSRTYPE register to control how many rings we use within the PF.
3374          */
3375         if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) && (rss_i < 2))
3376                 rss_i = 2;
3377
3378         /* Fill out hash function seeds */
3379         for (i = 0; i < 10; i++)
3380                 IXGBE_WRITE_REG(hw, IXGBE_RSSRK(i), adapter->rss_key[i]);
3381
3382         /* Fill out redirection table */
3383         memset(adapter->rss_indir_tbl, 0, sizeof(adapter->rss_indir_tbl));
3384
3385         for (i = 0, j = 0; i < reta_entries; i++, j++) {
3386                 if (j == rss_i)
3387                         j = 0;
3388
3389                 adapter->rss_indir_tbl[i] = j;
3390         }
3391
3392         ixgbe_store_reta(adapter);
3393 }
3394
3395 static void ixgbe_setup_vfreta(struct ixgbe_adapter *adapter)
3396 {
3397         struct ixgbe_hw *hw = &adapter->hw;
3398         u16 rss_i = adapter->ring_feature[RING_F_RSS].indices;
3399         unsigned int pf_pool = adapter->num_vfs;
3400         int i, j;
3401
3402         /* Fill out hash function seeds */
3403         for (i = 0; i < 10; i++)
3404                 IXGBE_WRITE_REG(hw, IXGBE_PFVFRSSRK(i, pf_pool),
3405                                 adapter->rss_key[i]);
3406
3407         /* Fill out the redirection table */
3408         for (i = 0, j = 0; i < 64; i++, j++) {
3409                 if (j == rss_i)
3410                         j = 0;
3411
3412                 adapter->rss_indir_tbl[i] = j;
3413         }
3414
3415         ixgbe_store_vfreta(adapter);
3416 }
3417
3418 static void ixgbe_setup_mrqc(struct ixgbe_adapter *adapter)
3419 {
3420         struct ixgbe_hw *hw = &adapter->hw;
3421         u32 mrqc = 0, rss_field = 0, vfmrqc = 0;
3422         u32 rxcsum;
3423
3424         /* Disable indicating checksum in descriptor, enables RSS hash */
3425         rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
3426         rxcsum |= IXGBE_RXCSUM_PCSD;
3427         IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum);
3428
3429         if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
3430                 if (adapter->ring_feature[RING_F_RSS].mask)
3431                         mrqc = IXGBE_MRQC_RSSEN;
3432         } else {
3433                 u8 tcs = netdev_get_num_tc(adapter->netdev);
3434
3435                 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
3436                         if (tcs > 4)
3437                                 mrqc = IXGBE_MRQC_VMDQRT8TCEN;  /* 8 TCs */
3438                         else if (tcs > 1)
3439                                 mrqc = IXGBE_MRQC_VMDQRT4TCEN;  /* 4 TCs */
3440                         else if (adapter->ring_feature[RING_F_RSS].indices == 4)
3441                                 mrqc = IXGBE_MRQC_VMDQRSS32EN;
3442                         else
3443                                 mrqc = IXGBE_MRQC_VMDQRSS64EN;
3444                 } else {
3445                         if (tcs > 4)
3446                                 mrqc = IXGBE_MRQC_RTRSS8TCEN;
3447                         else if (tcs > 1)
3448                                 mrqc = IXGBE_MRQC_RTRSS4TCEN;
3449                         else
3450                                 mrqc = IXGBE_MRQC_RSSEN;
3451                 }
3452         }
3453
3454         /* Perform hash on these packet types */
3455         rss_field |= IXGBE_MRQC_RSS_FIELD_IPV4 |
3456                      IXGBE_MRQC_RSS_FIELD_IPV4_TCP |
3457                      IXGBE_MRQC_RSS_FIELD_IPV6 |
3458                      IXGBE_MRQC_RSS_FIELD_IPV6_TCP;
3459
3460         if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV4_UDP)
3461                 rss_field |= IXGBE_MRQC_RSS_FIELD_IPV4_UDP;
3462         if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV6_UDP)
3463                 rss_field |= IXGBE_MRQC_RSS_FIELD_IPV6_UDP;
3464
3465         netdev_rss_key_fill(adapter->rss_key, sizeof(adapter->rss_key));
3466         if ((hw->mac.type >= ixgbe_mac_X550) &&
3467             (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)) {
3468                 unsigned int pf_pool = adapter->num_vfs;
3469
3470                 /* Enable VF RSS mode */
3471                 mrqc |= IXGBE_MRQC_MULTIPLE_RSS;
3472                 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
3473
3474                 /* Setup RSS through the VF registers */
3475                 ixgbe_setup_vfreta(adapter);
3476                 vfmrqc = IXGBE_MRQC_RSSEN;
3477                 vfmrqc |= rss_field;
3478                 IXGBE_WRITE_REG(hw, IXGBE_PFVFMRQC(pf_pool), vfmrqc);
3479         } else {
3480                 ixgbe_setup_reta(adapter);
3481                 mrqc |= rss_field;
3482                 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
3483         }
3484 }
3485
3486 /**
3487  * ixgbe_configure_rscctl - enable RSC for the indicated ring
3488  * @adapter:    address of board private structure
3489  * @index:      index of ring to set
3490  **/
3491 static void ixgbe_configure_rscctl(struct ixgbe_adapter *adapter,
3492                                    struct ixgbe_ring *ring)
3493 {
3494         struct ixgbe_hw *hw = &adapter->hw;
3495         u32 rscctrl;
3496         u8 reg_idx = ring->reg_idx;
3497
3498         if (!ring_is_rsc_enabled(ring))
3499                 return;
3500
3501         rscctrl = IXGBE_READ_REG(hw, IXGBE_RSCCTL(reg_idx));
3502         rscctrl |= IXGBE_RSCCTL_RSCEN;
3503         /*
3504          * we must limit the number of descriptors so that the
3505          * total size of max desc * buf_len is not greater
3506          * than 65536
3507          */
3508         rscctrl |= IXGBE_RSCCTL_MAXDESC_16;
3509         IXGBE_WRITE_REG(hw, IXGBE_RSCCTL(reg_idx), rscctrl);
3510 }
3511
3512 #define IXGBE_MAX_RX_DESC_POLL 10
3513 static void ixgbe_rx_desc_queue_enable(struct ixgbe_adapter *adapter,
3514                                        struct ixgbe_ring *ring)
3515 {
3516         struct ixgbe_hw *hw = &adapter->hw;
3517         int wait_loop = IXGBE_MAX_RX_DESC_POLL;
3518         u32 rxdctl;
3519         u8 reg_idx = ring->reg_idx;
3520
3521         if (ixgbe_removed(hw->hw_addr))
3522                 return;
3523         /* RXDCTL.EN will return 0 on 82598 if link is down, so skip it */
3524         if (hw->mac.type == ixgbe_mac_82598EB &&
3525             !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
3526                 return;
3527
3528         do {
3529                 usleep_range(1000, 2000);
3530                 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3531         } while (--wait_loop && !(rxdctl & IXGBE_RXDCTL_ENABLE));
3532
3533         if (!wait_loop) {
3534                 e_err(drv, "RXDCTL.ENABLE on Rx queue %d not set within "
3535                       "the polling period\n", reg_idx);
3536         }
3537 }
3538
3539 void ixgbe_disable_rx_queue(struct ixgbe_adapter *adapter,
3540                             struct ixgbe_ring *ring)
3541 {
3542         struct ixgbe_hw *hw = &adapter->hw;
3543         int wait_loop = IXGBE_MAX_RX_DESC_POLL;
3544         u32 rxdctl;
3545         u8 reg_idx = ring->reg_idx;
3546
3547         if (ixgbe_removed(hw->hw_addr))
3548                 return;
3549         rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3550         rxdctl &= ~IXGBE_RXDCTL_ENABLE;
3551
3552         /* write value back with RXDCTL.ENABLE bit cleared */
3553         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
3554
3555         if (hw->mac.type == ixgbe_mac_82598EB &&
3556             !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
3557                 return;
3558
3559         /* the hardware may take up to 100us to really disable the rx queue */
3560         do {
3561                 udelay(10);
3562                 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3563         } while (--wait_loop && (rxdctl & IXGBE_RXDCTL_ENABLE));
3564
3565         if (!wait_loop) {
3566                 e_err(drv, "RXDCTL.ENABLE on Rx queue %d not cleared within "
3567                       "the polling period\n", reg_idx);
3568         }
3569 }
3570
3571 void ixgbe_configure_rx_ring(struct ixgbe_adapter *adapter,
3572                              struct ixgbe_ring *ring)
3573 {
3574         struct ixgbe_hw *hw = &adapter->hw;
3575         u64 rdba = ring->dma;
3576         u32 rxdctl;
3577         u8 reg_idx = ring->reg_idx;
3578
3579         /* disable queue to avoid issues while updating state */
3580         rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3581         ixgbe_disable_rx_queue(adapter, ring);
3582
3583         IXGBE_WRITE_REG(hw, IXGBE_RDBAL(reg_idx), (rdba & DMA_BIT_MASK(32)));
3584         IXGBE_WRITE_REG(hw, IXGBE_RDBAH(reg_idx), (rdba >> 32));
3585         IXGBE_WRITE_REG(hw, IXGBE_RDLEN(reg_idx),
3586                         ring->count * sizeof(union ixgbe_adv_rx_desc));
3587         IXGBE_WRITE_REG(hw, IXGBE_RDH(reg_idx), 0);
3588         IXGBE_WRITE_REG(hw, IXGBE_RDT(reg_idx), 0);
3589         ring->tail = adapter->io_addr + IXGBE_RDT(reg_idx);
3590
3591         ixgbe_configure_srrctl(adapter, ring);
3592         ixgbe_configure_rscctl(adapter, ring);
3593
3594         if (hw->mac.type == ixgbe_mac_82598EB) {
3595                 /*
3596                  * enable cache line friendly hardware writes:
3597                  * PTHRESH=32 descriptors (half the internal cache),
3598                  * this also removes ugly rx_no_buffer_count increment
3599                  * HTHRESH=4 descriptors (to minimize latency on fetch)
3600                  * WTHRESH=8 burst writeback up to two cache lines
3601                  */
3602                 rxdctl &= ~0x3FFFFF;
3603                 rxdctl |=  0x080420;
3604         }
3605
3606         /* enable receive descriptor ring */
3607         rxdctl |= IXGBE_RXDCTL_ENABLE;
3608         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
3609
3610         ixgbe_rx_desc_queue_enable(adapter, ring);
3611         ixgbe_alloc_rx_buffers(ring, ixgbe_desc_unused(ring));
3612 }
3613
3614 static void ixgbe_setup_psrtype(struct ixgbe_adapter *adapter)
3615 {
3616         struct ixgbe_hw *hw = &adapter->hw;
3617         int rss_i = adapter->ring_feature[RING_F_RSS].indices;
3618         u16 pool;
3619
3620         /* PSRTYPE must be initialized in non 82598 adapters */
3621         u32 psrtype = IXGBE_PSRTYPE_TCPHDR |
3622                       IXGBE_PSRTYPE_UDPHDR |
3623                       IXGBE_PSRTYPE_IPV4HDR |
3624                       IXGBE_PSRTYPE_L2HDR |
3625                       IXGBE_PSRTYPE_IPV6HDR;
3626
3627         if (hw->mac.type == ixgbe_mac_82598EB)
3628                 return;
3629
3630         if (rss_i > 3)
3631                 psrtype |= 2 << 29;
3632         else if (rss_i > 1)
3633                 psrtype |= 1 << 29;
3634
3635         for_each_set_bit(pool, &adapter->fwd_bitmask, 32)
3636                 IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(VMDQ_P(pool)), psrtype);
3637 }
3638
3639 static void ixgbe_configure_virtualization(struct ixgbe_adapter *adapter)
3640 {
3641         struct ixgbe_hw *hw = &adapter->hw;
3642         u32 reg_offset, vf_shift;
3643         u32 gcr_ext, vmdctl;
3644         int i;
3645
3646         if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
3647                 return;
3648
3649         vmdctl = IXGBE_READ_REG(hw, IXGBE_VT_CTL);
3650         vmdctl |= IXGBE_VMD_CTL_VMDQ_EN;
3651         vmdctl &= ~IXGBE_VT_CTL_POOL_MASK;
3652         vmdctl |= VMDQ_P(0) << IXGBE_VT_CTL_POOL_SHIFT;
3653         vmdctl |= IXGBE_VT_CTL_REPLEN;
3654         IXGBE_WRITE_REG(hw, IXGBE_VT_CTL, vmdctl);
3655
3656         vf_shift = VMDQ_P(0) % 32;
3657         reg_offset = (VMDQ_P(0) >= 32) ? 1 : 0;
3658
3659         /* Enable only the PF's pool for Tx/Rx */
3660         IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset), (~0) << vf_shift);
3661         IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset ^ 1), reg_offset - 1);
3662         IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset), (~0) << vf_shift);
3663         IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset ^ 1), reg_offset - 1);
3664         if (adapter->bridge_mode == BRIDGE_MODE_VEB)
3665                 IXGBE_WRITE_REG(hw, IXGBE_PFDTXGSWC, IXGBE_PFDTXGSWC_VT_LBEN);
3666
3667         /* Map PF MAC address in RAR Entry 0 to first pool following VFs */
3668         hw->mac.ops.set_vmdq(hw, 0, VMDQ_P(0));
3669
3670         /*
3671          * Set up VF register offsets for selected VT Mode,
3672          * i.e. 32 or 64 VFs for SR-IOV
3673          */
3674         switch (adapter->ring_feature[RING_F_VMDQ].mask) {
3675         case IXGBE_82599_VMDQ_8Q_MASK:
3676                 gcr_ext = IXGBE_GCR_EXT_VT_MODE_16;
3677                 break;
3678         case IXGBE_82599_VMDQ_4Q_MASK:
3679                 gcr_ext = IXGBE_GCR_EXT_VT_MODE_32;
3680                 break;
3681         default:
3682                 gcr_ext = IXGBE_GCR_EXT_VT_MODE_64;
3683                 break;
3684         }
3685
3686         IXGBE_WRITE_REG(hw, IXGBE_GCR_EXT, gcr_ext);
3687
3688
3689         /* Enable MAC Anti-Spoofing */
3690         hw->mac.ops.set_mac_anti_spoofing(hw, (adapter->num_vfs != 0),
3691                                           adapter->num_vfs);
3692
3693         /* Ensure LLDP is set for Ethertype Antispoofing if we will be
3694          * calling set_ethertype_anti_spoofing for each VF in loop below
3695          */
3696         if (hw->mac.ops.set_ethertype_anti_spoofing)
3697                 IXGBE_WRITE_REG(hw, IXGBE_ETQF(IXGBE_ETQF_FILTER_LLDP),
3698                                 (IXGBE_ETQF_FILTER_EN    | /* enable filter */
3699                                  IXGBE_ETQF_TX_ANTISPOOF | /* tx antispoof */
3700                                  IXGBE_ETH_P_LLDP));       /* LLDP eth type */
3701
3702         /* For VFs that have spoof checking turned off */
3703         for (i = 0; i < adapter->num_vfs; i++) {
3704                 if (!adapter->vfinfo[i].spoofchk_enabled)
3705                         ixgbe_ndo_set_vf_spoofchk(adapter->netdev, i, false);
3706
3707                 /* enable ethertype anti spoofing if hw supports it */
3708                 if (hw->mac.ops.set_ethertype_anti_spoofing)
3709                         hw->mac.ops.set_ethertype_anti_spoofing(hw, true, i);
3710
3711                 /* Enable/Disable RSS query feature  */
3712                 ixgbe_ndo_set_vf_rss_query_en(adapter->netdev, i,
3713                                           adapter->vfinfo[i].rss_query_enabled);
3714         }
3715 }
3716
3717 static void ixgbe_set_rx_buffer_len(struct ixgbe_adapter *adapter)
3718 {
3719         struct ixgbe_hw *hw = &adapter->hw;
3720         struct net_device *netdev = adapter->netdev;
3721         int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
3722         struct ixgbe_ring *rx_ring;
3723         int i;
3724         u32 mhadd, hlreg0;
3725
3726 #ifdef IXGBE_FCOE
3727         /* adjust max frame to be able to do baby jumbo for FCoE */
3728         if ((adapter->flags & IXGBE_FLAG_FCOE_ENABLED) &&
3729             (max_frame < IXGBE_FCOE_JUMBO_FRAME_SIZE))
3730                 max_frame = IXGBE_FCOE_JUMBO_FRAME_SIZE;
3731
3732 #endif /* IXGBE_FCOE */
3733
3734         /* adjust max frame to be at least the size of a standard frame */
3735         if (max_frame < (ETH_FRAME_LEN + ETH_FCS_LEN))
3736                 max_frame = (ETH_FRAME_LEN + ETH_FCS_LEN);
3737
3738         mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD);
3739         if (max_frame != (mhadd >> IXGBE_MHADD_MFS_SHIFT)) {
3740                 mhadd &= ~IXGBE_MHADD_MFS_MASK;
3741                 mhadd |= max_frame << IXGBE_MHADD_MFS_SHIFT;
3742
3743                 IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd);
3744         }
3745
3746         hlreg0 = IXGBE_READ_REG(hw, IXGBE_HLREG0);
3747         /* set jumbo enable since MHADD.MFS is keeping size locked at max_frame */
3748         hlreg0 |= IXGBE_HLREG0_JUMBOEN;
3749         IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0);
3750
3751         /*
3752          * Setup the HW Rx Head and Tail Descriptor Pointers and
3753          * the Base and Length of the Rx Descriptor Ring
3754          */
3755         for (i = 0; i < adapter->num_rx_queues; i++) {
3756                 rx_ring = adapter->rx_ring[i];
3757                 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
3758                         set_ring_rsc_enabled(rx_ring);
3759                 else
3760                         clear_ring_rsc_enabled(rx_ring);
3761         }
3762 }
3763
3764 static void ixgbe_setup_rdrxctl(struct ixgbe_adapter *adapter)
3765 {
3766         struct ixgbe_hw *hw = &adapter->hw;
3767         u32 rdrxctl = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
3768
3769         switch (hw->mac.type) {
3770         case ixgbe_mac_X550:
3771         case ixgbe_mac_X550EM_x:
3772         case ixgbe_mac_82598EB:
3773                 /*
3774                  * For VMDq support of different descriptor types or
3775                  * buffer sizes through the use of multiple SRRCTL
3776                  * registers, RDRXCTL.MVMEN must be set to 1
3777                  *
3778                  * also, the manual doesn't mention it clearly but DCA hints
3779                  * will only use queue 0's tags unless this bit is set.  Side
3780                  * effects of setting this bit are only that SRRCTL must be
3781                  * fully programmed [0..15]
3782                  */
3783                 rdrxctl |= IXGBE_RDRXCTL_MVMEN;
3784                 break;
3785         case ixgbe_mac_82599EB:
3786         case ixgbe_mac_X540:
3787                 /* Disable RSC for ACK packets */
3788                 IXGBE_WRITE_REG(hw, IXGBE_RSCDBU,
3789                    (IXGBE_RSCDBU_RSCACKDIS | IXGBE_READ_REG(hw, IXGBE_RSCDBU)));
3790                 rdrxctl &= ~IXGBE_RDRXCTL_RSCFRSTSIZE;
3791                 /* hardware requires some bits to be set by default */
3792                 rdrxctl |= (IXGBE_RDRXCTL_RSCACKC | IXGBE_RDRXCTL_FCOE_WRFIX);
3793                 rdrxctl |= IXGBE_RDRXCTL_CRCSTRIP;
3794                 break;
3795         default:
3796                 /* We should do nothing since we don't know this hardware */
3797                 return;
3798         }
3799
3800         IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, rdrxctl);
3801 }
3802
3803 /**
3804  * ixgbe_configure_rx - Configure 8259x Receive Unit after Reset
3805  * @adapter: board private structure
3806  *
3807  * Configure the Rx unit of the MAC after a reset.
3808  **/
3809 static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
3810 {
3811         struct ixgbe_hw *hw = &adapter->hw;
3812         int i;
3813         u32 rxctrl, rfctl;
3814
3815         /* disable receives while setting up the descriptors */
3816         hw->mac.ops.disable_rx(hw);
3817
3818         ixgbe_setup_psrtype(adapter);
3819         ixgbe_setup_rdrxctl(adapter);
3820
3821         /* RSC Setup */
3822         rfctl = IXGBE_READ_REG(hw, IXGBE_RFCTL);
3823         rfctl &= ~IXGBE_RFCTL_RSC_DIS;
3824         if (!(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED))
3825                 rfctl |= IXGBE_RFCTL_RSC_DIS;
3826         IXGBE_WRITE_REG(hw, IXGBE_RFCTL, rfctl);
3827
3828         /* Program registers for the distribution of queues */
3829         ixgbe_setup_mrqc(adapter);
3830
3831         /* set_rx_buffer_len must be called before ring initialization */
3832         ixgbe_set_rx_buffer_len(adapter);
3833
3834         /*
3835          * Setup the HW Rx Head and Tail Descriptor Pointers and
3836          * the Base and Length of the Rx Descriptor Ring
3837          */
3838         for (i = 0; i < adapter->num_rx_queues; i++)
3839                 ixgbe_configure_rx_ring(adapter, adapter->rx_ring[i]);
3840
3841         rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
3842         /* disable drop enable for 82598 parts */
3843         if (hw->mac.type == ixgbe_mac_82598EB)
3844                 rxctrl |= IXGBE_RXCTRL_DMBYPS;
3845
3846         /* enable all receives */
3847         rxctrl |= IXGBE_RXCTRL_RXEN;
3848         hw->mac.ops.enable_rx_dma(hw, rxctrl);
3849 }
3850
3851 static int ixgbe_vlan_rx_add_vid(struct net_device *netdev,
3852                                  __be16 proto, u16 vid)
3853 {
3854         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3855         struct ixgbe_hw *hw = &adapter->hw;
3856
3857         /* add VID to filter table */
3858         hw->mac.ops.set_vfta(&adapter->hw, vid, VMDQ_P(0), true);
3859         set_bit(vid, adapter->active_vlans);
3860
3861         return 0;
3862 }
3863
3864 static int ixgbe_vlan_rx_kill_vid(struct net_device *netdev,
3865                                   __be16 proto, u16 vid)
3866 {
3867         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3868         struct ixgbe_hw *hw = &adapter->hw;
3869
3870         /* remove VID from filter table */
3871         hw->mac.ops.set_vfta(&adapter->hw, vid, VMDQ_P(0), false);
3872         clear_bit(vid, adapter->active_vlans);
3873
3874         return 0;
3875 }
3876
3877 /**
3878  * ixgbe_vlan_strip_disable - helper to disable hw vlan stripping
3879  * @adapter: driver data
3880  */
3881 static void ixgbe_vlan_strip_disable(struct ixgbe_adapter *adapter)
3882 {
3883         struct ixgbe_hw *hw = &adapter->hw;
3884         u32 vlnctrl;
3885         int i, j;
3886
3887         switch (hw->mac.type) {
3888         case ixgbe_mac_82598EB:
3889                 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
3890                 vlnctrl &= ~IXGBE_VLNCTRL_VME;
3891                 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
3892                 break;
3893         case ixgbe_mac_82599EB:
3894         case ixgbe_mac_X540:
3895         case ixgbe_mac_X550:
3896         case ixgbe_mac_X550EM_x:
3897                 for (i = 0; i < adapter->num_rx_queues; i++) {
3898                         struct ixgbe_ring *ring = adapter->rx_ring[i];
3899
3900                         if (ring->l2_accel_priv)
3901                                 continue;
3902                         j = ring->reg_idx;
3903                         vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
3904                         vlnctrl &= ~IXGBE_RXDCTL_VME;
3905                         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
3906                 }
3907                 break;
3908         default:
3909                 break;
3910         }
3911 }
3912
3913 /**
3914  * ixgbe_vlan_strip_enable - helper to enable hw vlan stripping
3915  * @adapter: driver data
3916  */
3917 static void ixgbe_vlan_strip_enable(struct ixgbe_adapter *adapter)
3918 {
3919         struct ixgbe_hw *hw = &adapter->hw;
3920         u32 vlnctrl;
3921         int i, j;
3922
3923         switch (hw->mac.type) {
3924         case ixgbe_mac_82598EB:
3925                 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
3926                 vlnctrl |= IXGBE_VLNCTRL_VME;
3927                 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
3928                 break;
3929         case ixgbe_mac_82599EB:
3930         case ixgbe_mac_X540:
3931         case ixgbe_mac_X550:
3932         case ixgbe_mac_X550EM_x:
3933                 for (i = 0; i < adapter->num_rx_queues; i++) {
3934                         struct ixgbe_ring *ring = adapter->rx_ring[i];
3935
3936                         if (ring->l2_accel_priv)
3937                                 continue;
3938                         j = ring->reg_idx;
3939                         vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
3940                         vlnctrl |= IXGBE_RXDCTL_VME;
3941                         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
3942                 }
3943                 break;
3944         default:
3945                 break;
3946         }
3947 }
3948
3949 static void ixgbe_restore_vlan(struct ixgbe_adapter *adapter)
3950 {
3951         u16 vid;
3952
3953         ixgbe_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), 0);
3954
3955         for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
3956                 ixgbe_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);
3957 }
3958
3959 /**
3960  * ixgbe_write_mc_addr_list - write multicast addresses to MTA
3961  * @netdev: network interface device structure
3962  *
3963  * Writes multicast address list to the MTA hash table.
3964  * Returns: -ENOMEM on failure
3965  *                0 on no addresses written
3966  *                X on writing X addresses to MTA
3967  **/
3968 static int ixgbe_write_mc_addr_list(struct net_device *netdev)
3969 {
3970         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3971         struct ixgbe_hw *hw = &adapter->hw;
3972
3973         if (!netif_running(netdev))
3974                 return 0;
3975
3976         if (hw->mac.ops.update_mc_addr_list)
3977                 hw->mac.ops.update_mc_addr_list(hw, netdev);
3978         else
3979                 return -ENOMEM;
3980
3981 #ifdef CONFIG_PCI_IOV
3982         ixgbe_restore_vf_multicasts(adapter);
3983 #endif
3984
3985         return netdev_mc_count(netdev);
3986 }
3987
3988 #ifdef CONFIG_PCI_IOV
3989 void ixgbe_full_sync_mac_table(struct ixgbe_adapter *adapter)
3990 {
3991         struct ixgbe_hw *hw = &adapter->hw;
3992         int i;
3993         for (i = 0; i < hw->mac.num_rar_entries; i++) {
3994                 if (adapter->mac_table[i].state & IXGBE_MAC_STATE_IN_USE)
3995                         hw->mac.ops.set_rar(hw, i, adapter->mac_table[i].addr,
3996                                             adapter->mac_table[i].queue,
3997                                             IXGBE_RAH_AV);
3998                 else
3999                         hw->mac.ops.clear_rar(hw, i);
4000
4001                 adapter->mac_table[i].state &= ~(IXGBE_MAC_STATE_MODIFIED);
4002         }
4003 }
4004 #endif
4005
4006 static void ixgbe_sync_mac_table(struct ixgbe_adapter *adapter)
4007 {
4008         struct ixgbe_hw *hw = &adapter->hw;
4009         int i;
4010         for (i = 0; i < hw->mac.num_rar_entries; i++) {
4011                 if (adapter->mac_table[i].state & IXGBE_MAC_STATE_MODIFIED) {
4012                         if (adapter->mac_table[i].state &
4013                             IXGBE_MAC_STATE_IN_USE)
4014                                 hw->mac.ops.set_rar(hw, i,
4015                                                 adapter->mac_table[i].addr,
4016                                                 adapter->mac_table[i].queue,
4017                                                 IXGBE_RAH_AV);
4018                         else
4019                                 hw->mac.ops.clear_rar(hw, i);
4020
4021                         adapter->mac_table[i].state &=
4022                                                 ~(IXGBE_MAC_STATE_MODIFIED);
4023                 }
4024         }
4025 }
4026
4027 static void ixgbe_flush_sw_mac_table(struct ixgbe_adapter *adapter)
4028 {
4029         int i;
4030         struct ixgbe_hw *hw = &adapter->hw;
4031
4032         for (i = 0; i < hw->mac.num_rar_entries; i++) {
4033                 adapter->mac_table[i].state |= IXGBE_MAC_STATE_MODIFIED;
4034                 adapter->mac_table[i].state &= ~IXGBE_MAC_STATE_IN_USE;
4035                 eth_zero_addr(adapter->mac_table[i].addr);
4036                 adapter->mac_table[i].queue = 0;
4037         }
4038         ixgbe_sync_mac_table(adapter);
4039 }
4040
4041 static int ixgbe_available_rars(struct ixgbe_adapter *adapter)
4042 {
4043         struct ixgbe_hw *hw = &adapter->hw;
4044         int i, count = 0;
4045
4046         for (i = 0; i < hw->mac.num_rar_entries; i++) {
4047                 if (adapter->mac_table[i].state == 0)
4048                         count++;
4049         }
4050         return count;
4051 }
4052
4053 /* this function destroys the first RAR entry */
4054 static void ixgbe_mac_set_default_filter(struct ixgbe_adapter *adapter,
4055                                          u8 *addr)
4056 {
4057         struct ixgbe_hw *hw = &adapter->hw;
4058
4059         memcpy(&adapter->mac_table[0].addr, addr, ETH_ALEN);
4060         adapter->mac_table[0].queue = VMDQ_P(0);
4061         adapter->mac_table[0].state = (IXGBE_MAC_STATE_DEFAULT |
4062                                        IXGBE_MAC_STATE_IN_USE);
4063         hw->mac.ops.set_rar(hw, 0, adapter->mac_table[0].addr,
4064                             adapter->mac_table[0].queue,
4065                             IXGBE_RAH_AV);
4066 }
4067
4068 int ixgbe_add_mac_filter(struct ixgbe_adapter *adapter, u8 *addr, u16 queue)
4069 {
4070         struct ixgbe_hw *hw = &adapter->hw;
4071         int i;
4072
4073         if (is_zero_ether_addr(addr))
4074                 return -EINVAL;
4075
4076         for (i = 0; i < hw->mac.num_rar_entries; i++) {
4077                 if (adapter->mac_table[i].state & IXGBE_MAC_STATE_IN_USE)
4078                         continue;
4079                 adapter->mac_table[i].state |= (IXGBE_MAC_STATE_MODIFIED |
4080                                                 IXGBE_MAC_STATE_IN_USE);
4081                 ether_addr_copy(adapter->mac_table[i].addr, addr);
4082                 adapter->mac_table[i].queue = queue;
4083                 ixgbe_sync_mac_table(adapter);
4084                 return i;
4085         }
4086         return -ENOMEM;
4087 }
4088
4089 int ixgbe_del_mac_filter(struct ixgbe_adapter *adapter, u8 *addr, u16 queue)
4090 {
4091         /* search table for addr, if found, set to 0 and sync */
4092         int i;
4093         struct ixgbe_hw *hw = &adapter->hw;
4094
4095         if (is_zero_ether_addr(addr))
4096                 return -EINVAL;
4097
4098         for (i = 0; i < hw->mac.num_rar_entries; i++) {
4099                 if (ether_addr_equal(addr, adapter->mac_table[i].addr) &&
4100                     adapter->mac_table[i].queue == queue) {
4101                         adapter->mac_table[i].state |= IXGBE_MAC_STATE_MODIFIED;
4102                         adapter->mac_table[i].state &= ~IXGBE_MAC_STATE_IN_USE;
4103                         eth_zero_addr(adapter->mac_table[i].addr);
4104                         adapter->mac_table[i].queue = 0;
4105                         ixgbe_sync_mac_table(adapter);
4106                         return 0;
4107                 }
4108         }
4109         return -ENOMEM;
4110 }
4111 /**
4112  * ixgbe_write_uc_addr_list - write unicast addresses to RAR table
4113  * @netdev: network interface device structure
4114  *
4115  * Writes unicast address list to the RAR table.
4116  * Returns: -ENOMEM on failure/insufficient address space
4117  *                0 on no addresses written
4118  *                X on writing X addresses to the RAR table
4119  **/
4120 static int ixgbe_write_uc_addr_list(struct net_device *netdev, int vfn)
4121 {
4122         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4123         int count = 0;
4124
4125         /* return ENOMEM indicating insufficient memory for addresses */
4126         if (netdev_uc_count(netdev) > ixgbe_available_rars(adapter))
4127                 return -ENOMEM;
4128
4129         if (!netdev_uc_empty(netdev)) {
4130                 struct netdev_hw_addr *ha;
4131                 netdev_for_each_uc_addr(ha, netdev) {
4132                         ixgbe_del_mac_filter(adapter, ha->addr, vfn);
4133                         ixgbe_add_mac_filter(adapter, ha->addr, vfn);
4134                         count++;
4135                 }
4136         }
4137         return count;
4138 }
4139
4140 /**
4141  * ixgbe_set_rx_mode - Unicast, Multicast and Promiscuous mode set
4142  * @netdev: network interface device structure
4143  *
4144  * The set_rx_method entry point is called whenever the unicast/multicast
4145  * address list or the network interface flags are updated.  This routine is
4146  * responsible for configuring the hardware for proper unicast, multicast and
4147  * promiscuous mode.
4148  **/
4149 void ixgbe_set_rx_mode(struct net_device *netdev)
4150 {
4151         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4152         struct ixgbe_hw *hw = &adapter->hw;
4153         u32 fctrl, vmolr = IXGBE_VMOLR_BAM | IXGBE_VMOLR_AUPE;
4154         u32 vlnctrl;
4155         int count;
4156
4157         /* Check for Promiscuous and All Multicast modes */
4158         fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
4159         vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4160
4161         /* set all bits that we expect to always be set */
4162         fctrl &= ~IXGBE_FCTRL_SBP; /* disable store-bad-packets */
4163         fctrl |= IXGBE_FCTRL_BAM;
4164         fctrl |= IXGBE_FCTRL_DPF; /* discard pause frames when FC enabled */
4165         fctrl |= IXGBE_FCTRL_PMCF;
4166
4167         /* clear the bits we are changing the status of */
4168         fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
4169         vlnctrl &= ~(IXGBE_VLNCTRL_VFE | IXGBE_VLNCTRL_CFIEN);
4170         if (netdev->flags & IFF_PROMISC) {
4171                 hw->addr_ctrl.user_set_promisc = true;
4172                 fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
4173                 vmolr |= IXGBE_VMOLR_MPE;
4174                 /* Only disable hardware filter vlans in promiscuous mode
4175                  * if SR-IOV and VMDQ are disabled - otherwise ensure
4176                  * that hardware VLAN filters remain enabled.
4177                  */
4178                 if (adapter->flags & (IXGBE_FLAG_VMDQ_ENABLED |
4179                                       IXGBE_FLAG_SRIOV_ENABLED))
4180                         vlnctrl |= (IXGBE_VLNCTRL_VFE | IXGBE_VLNCTRL_CFIEN);
4181         } else {
4182                 if (netdev->flags & IFF_ALLMULTI) {
4183                         fctrl |= IXGBE_FCTRL_MPE;
4184                         vmolr |= IXGBE_VMOLR_MPE;
4185                 }
4186                 vlnctrl |= IXGBE_VLNCTRL_VFE;
4187                 hw->addr_ctrl.user_set_promisc = false;
4188         }
4189
4190         /*
4191          * Write addresses to available RAR registers, if there is not
4192          * sufficient space to store all the addresses then enable
4193          * unicast promiscuous mode
4194          */
4195         count = ixgbe_write_uc_addr_list(netdev, VMDQ_P(0));
4196         if (count < 0) {
4197                 fctrl |= IXGBE_FCTRL_UPE;
4198                 vmolr |= IXGBE_VMOLR_ROPE;
4199         }
4200
4201         /* Write addresses to the MTA, if the attempt fails
4202          * then we should just turn on promiscuous mode so
4203          * that we can at least receive multicast traffic
4204          */
4205         count = ixgbe_write_mc_addr_list(netdev);
4206         if (count < 0) {
4207                 fctrl |= IXGBE_FCTRL_MPE;
4208                 vmolr |= IXGBE_VMOLR_MPE;
4209         } else if (count) {
4210                 vmolr |= IXGBE_VMOLR_ROMPE;
4211         }
4212
4213         if (hw->mac.type != ixgbe_mac_82598EB) {
4214                 vmolr |= IXGBE_READ_REG(hw, IXGBE_VMOLR(VMDQ_P(0))) &
4215                          ~(IXGBE_VMOLR_MPE | IXGBE_VMOLR_ROMPE |
4216                            IXGBE_VMOLR_ROPE);
4217                 IXGBE_WRITE_REG(hw, IXGBE_VMOLR(VMDQ_P(0)), vmolr);
4218         }
4219
4220         /* This is useful for sniffing bad packets. */
4221         if (adapter->netdev->features & NETIF_F_RXALL) {
4222                 /* UPE and MPE will be handled by normal PROMISC logic
4223                  * in e1000e_set_rx_mode */
4224                 fctrl |= (IXGBE_FCTRL_SBP | /* Receive bad packets */
4225                           IXGBE_FCTRL_BAM | /* RX All Bcast Pkts */
4226                           IXGBE_FCTRL_PMCF); /* RX All MAC Ctrl Pkts */
4227
4228                 fctrl &= ~(IXGBE_FCTRL_DPF);
4229                 /* NOTE:  VLAN filtering is disabled by setting PROMISC */
4230         }
4231
4232         IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4233         IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
4234
4235         if (netdev->features & NETIF_F_HW_VLAN_CTAG_RX)
4236                 ixgbe_vlan_strip_enable(adapter);
4237         else
4238                 ixgbe_vlan_strip_disable(adapter);
4239 }
4240
4241 static void ixgbe_napi_enable_all(struct ixgbe_adapter *adapter)
4242 {
4243         int q_idx;
4244
4245         for (q_idx = 0; q_idx < adapter->num_q_vectors; q_idx++) {
4246                 ixgbe_qv_init_lock(adapter->q_vector[q_idx]);
4247                 napi_enable(&adapter->q_vector[q_idx]->napi);
4248         }
4249 }
4250
4251 static void ixgbe_napi_disable_all(struct ixgbe_adapter *adapter)
4252 {
4253         int q_idx;
4254
4255         for (q_idx = 0; q_idx < adapter->num_q_vectors; q_idx++) {
4256                 napi_disable(&adapter->q_vector[q_idx]->napi);
4257                 while (!ixgbe_qv_disable(adapter->q_vector[q_idx])) {
4258                         pr_info("QV %d locked\n", q_idx);
4259                         usleep_range(1000, 20000);
4260                 }
4261         }
4262 }
4263
4264 #ifdef CONFIG_IXGBE_DCB
4265 /**
4266  * ixgbe_configure_dcb - Configure DCB hardware
4267  * @adapter: ixgbe adapter struct
4268  *
4269  * This is called by the driver on open to configure the DCB hardware.
4270  * This is also called by the gennetlink interface when reconfiguring
4271  * the DCB state.
4272  */
4273 static void ixgbe_configure_dcb(struct ixgbe_adapter *adapter)
4274 {
4275         struct ixgbe_hw *hw = &adapter->hw;
4276         int max_frame = adapter->netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
4277
4278         if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED)) {
4279                 if (hw->mac.type == ixgbe_mac_82598EB)
4280                         netif_set_gso_max_size(adapter->netdev, 65536);
4281                 return;
4282         }
4283
4284         if (hw->mac.type == ixgbe_mac_82598EB)
4285                 netif_set_gso_max_size(adapter->netdev, 32768);
4286
4287 #ifdef IXGBE_FCOE
4288         if (adapter->netdev->features & NETIF_F_FCOE_MTU)
4289                 max_frame = max(max_frame, IXGBE_FCOE_JUMBO_FRAME_SIZE);
4290 #endif
4291
4292         /* reconfigure the hardware */
4293         if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE) {
4294                 ixgbe_dcb_calculate_tc_credits(hw, &adapter->dcb_cfg, max_frame,
4295                                                 DCB_TX_CONFIG);
4296                 ixgbe_dcb_calculate_tc_credits(hw, &adapter->dcb_cfg, max_frame,
4297                                                 DCB_RX_CONFIG);
4298                 ixgbe_dcb_hw_config(hw, &adapter->dcb_cfg);
4299         } else if (adapter->ixgbe_ieee_ets && adapter->ixgbe_ieee_pfc) {
4300                 ixgbe_dcb_hw_ets(&adapter->hw,
4301                                  adapter->ixgbe_ieee_ets,
4302                                  max_frame);
4303                 ixgbe_dcb_hw_pfc_config(&adapter->hw,
4304                                         adapter->ixgbe_ieee_pfc->pfc_en,
4305                                         adapter->ixgbe_ieee_ets->prio_tc);
4306         }
4307
4308         /* Enable RSS Hash per TC */
4309         if (hw->mac.type != ixgbe_mac_82598EB) {
4310                 u32 msb = 0;
4311                 u16 rss_i = adapter->ring_feature[RING_F_RSS].indices - 1;
4312
4313                 while (rss_i) {
4314                         msb++;
4315                         rss_i >>= 1;
4316                 }
4317
4318                 /* write msb to all 8 TCs in one write */
4319                 IXGBE_WRITE_REG(hw, IXGBE_RQTC, msb * 0x11111111);
4320         }
4321 }
4322 #endif
4323
4324 /* Additional bittime to account for IXGBE framing */
4325 #define IXGBE_ETH_FRAMING 20
4326
4327 /**
4328  * ixgbe_hpbthresh - calculate high water mark for flow control
4329  *
4330  * @adapter: board private structure to calculate for
4331  * @pb: packet buffer to calculate
4332  */
4333 static int ixgbe_hpbthresh(struct ixgbe_adapter *adapter, int pb)
4334 {
4335         struct ixgbe_hw *hw = &adapter->hw;
4336         struct net_device *dev = adapter->netdev;
4337         int link, tc, kb, marker;
4338         u32 dv_id, rx_pba;
4339
4340         /* Calculate max LAN frame size */
4341         tc = link = dev->mtu + ETH_HLEN + ETH_FCS_LEN + IXGBE_ETH_FRAMING;
4342
4343 #ifdef IXGBE_FCOE
4344         /* FCoE traffic class uses FCOE jumbo frames */
4345         if ((dev->features & NETIF_F_FCOE_MTU) &&
4346             (tc < IXGBE_FCOE_JUMBO_FRAME_SIZE) &&
4347             (pb == ixgbe_fcoe_get_tc(adapter)))
4348                 tc = IXGBE_FCOE_JUMBO_FRAME_SIZE;
4349 #endif
4350
4351         /* Calculate delay value for device */
4352         switch (hw->mac.type) {
4353         case ixgbe_mac_X540:
4354         case ixgbe_mac_X550:
4355         case ixgbe_mac_X550EM_x:
4356                 dv_id = IXGBE_DV_X540(link, tc);
4357                 break;
4358         default:
4359                 dv_id = IXGBE_DV(link, tc);
4360                 break;
4361         }
4362
4363         /* Loopback switch introduces additional latency */
4364         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
4365                 dv_id += IXGBE_B2BT(tc);
4366
4367         /* Delay value is calculated in bit times convert to KB */
4368         kb = IXGBE_BT2KB(dv_id);
4369         rx_pba = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(pb)) >> 10;
4370
4371         marker = rx_pba - kb;
4372
4373         /* It is possible that the packet buffer is not large enough
4374          * to provide required headroom. In this case throw an error
4375          * to user and a do the best we can.
4376          */
4377         if (marker < 0) {
4378                 e_warn(drv, "Packet Buffer(%i) can not provide enough"
4379                             "headroom to support flow control."
4380                             "Decrease MTU or number of traffic classes\n", pb);
4381                 marker = tc + 1;
4382         }
4383
4384         return marker;
4385 }
4386
4387 /**
4388  * ixgbe_lpbthresh - calculate low water mark for for flow control
4389  *
4390  * @adapter: board private structure to calculate for
4391  * @pb: packet buffer to calculate
4392  */
4393 static int ixgbe_lpbthresh(struct ixgbe_adapter *adapter, int pb)
4394 {
4395         struct ixgbe_hw *hw = &adapter->hw;
4396         struct net_device *dev = adapter->netdev;
4397         int tc;
4398         u32 dv_id;
4399
4400         /* Calculate max LAN frame size */
4401         tc = dev->mtu + ETH_HLEN + ETH_FCS_LEN;
4402
4403 #ifdef IXGBE_FCOE
4404         /* FCoE traffic class uses FCOE jumbo frames */
4405         if ((dev->features & NETIF_F_FCOE_MTU) &&
4406             (tc < IXGBE_FCOE_JUMBO_FRAME_SIZE) &&
4407             (pb == netdev_get_prio_tc_map(dev, adapter->fcoe.up)))
4408                 tc = IXGBE_FCOE_JUMBO_FRAME_SIZE;
4409 #endif
4410
4411         /* Calculate delay value for device */
4412         switch (hw->mac.type) {
4413         case ixgbe_mac_X540:
4414         case ixgbe_mac_X550:
4415         case ixgbe_mac_X550EM_x:
4416                 dv_id = IXGBE_LOW_DV_X540(tc);
4417                 break;
4418         default:
4419                 dv_id = IXGBE_LOW_DV(tc);
4420                 break;
4421         }
4422
4423         /* Delay value is calculated in bit times convert to KB */
4424         return IXGBE_BT2KB(dv_id);
4425 }
4426
4427 /*
4428  * ixgbe_pbthresh_setup - calculate and setup high low water marks
4429  */
4430 static void ixgbe_pbthresh_setup(struct ixgbe_adapter *adapter)
4431 {
4432         struct ixgbe_hw *hw = &adapter->hw;
4433         int num_tc = netdev_get_num_tc(adapter->netdev);
4434         int i;
4435
4436         if (!num_tc)
4437                 num_tc = 1;
4438
4439         for (i = 0; i < num_tc; i++) {
4440                 hw->fc.high_water[i] = ixgbe_hpbthresh(adapter, i);
4441                 hw->fc.low_water[i] = ixgbe_lpbthresh(adapter, i);
4442
4443                 /* Low water marks must not be larger than high water marks */
4444                 if (hw->fc.low_water[i] > hw->fc.high_water[i])
4445                         hw->fc.low_water[i] = 0;
4446         }
4447
4448         for (; i < MAX_TRAFFIC_CLASS; i++)
4449                 hw->fc.high_water[i] = 0;
4450 }
4451
4452 static void ixgbe_configure_pb(struct ixgbe_adapter *adapter)
4453 {
4454         struct ixgbe_hw *hw = &adapter->hw;
4455         int hdrm;
4456         u8 tc = netdev_get_num_tc(adapter->netdev);
4457
4458         if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE ||
4459             adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
4460                 hdrm = 32 << adapter->fdir_pballoc;
4461         else
4462                 hdrm = 0;
4463
4464         hw->mac.ops.set_rxpba(hw, tc, hdrm, PBA_STRATEGY_EQUAL);
4465         ixgbe_pbthresh_setup(adapter);
4466 }
4467
4468 static void ixgbe_fdir_filter_restore(struct ixgbe_adapter *adapter)
4469 {
4470         struct ixgbe_hw *hw = &adapter->hw;
4471         struct hlist_node *node2;
4472         struct ixgbe_fdir_filter *filter;
4473
4474         spin_lock(&adapter->fdir_perfect_lock);
4475
4476         if (!hlist_empty(&adapter->fdir_filter_list))
4477                 ixgbe_fdir_set_input_mask_82599(hw, &adapter->fdir_mask);
4478
4479         hlist_for_each_entry_safe(filter, node2,
4480                                   &adapter->fdir_filter_list, fdir_node) {
4481                 ixgbe_fdir_write_perfect_filter_82599(hw,
4482                                 &filter->filter,
4483                                 filter->sw_idx,
4484                                 (filter->action == IXGBE_FDIR_DROP_QUEUE) ?
4485                                 IXGBE_FDIR_DROP_QUEUE :
4486                                 adapter->rx_ring[filter->action]->reg_idx);
4487         }
4488
4489         spin_unlock(&adapter->fdir_perfect_lock);
4490 }
4491
4492 static void ixgbe_macvlan_set_rx_mode(struct net_device *dev, unsigned int pool,
4493                                       struct ixgbe_adapter *adapter)
4494 {
4495         struct ixgbe_hw *hw = &adapter->hw;
4496         u32 vmolr;
4497
4498         /* No unicast promiscuous support for VMDQ devices. */
4499         vmolr = IXGBE_READ_REG(hw, IXGBE_VMOLR(pool));
4500         vmolr |= (IXGBE_VMOLR_ROMPE | IXGBE_VMOLR_BAM | IXGBE_VMOLR_AUPE);
4501
4502         /* clear the affected bit */
4503         vmolr &= ~IXGBE_VMOLR_MPE;
4504
4505         if (dev->flags & IFF_ALLMULTI) {
4506                 vmolr |= IXGBE_VMOLR_MPE;
4507         } else {
4508                 vmolr |= IXGBE_VMOLR_ROMPE;
4509                 hw->mac.ops.update_mc_addr_list(hw, dev);
4510         }
4511         ixgbe_write_uc_addr_list(adapter->netdev, pool);
4512         IXGBE_WRITE_REG(hw, IXGBE_VMOLR(pool), vmolr);
4513 }
4514
4515 static void ixgbe_fwd_psrtype(struct ixgbe_fwd_adapter *vadapter)
4516 {
4517         struct ixgbe_adapter *adapter = vadapter->real_adapter;
4518         int rss_i = adapter->num_rx_queues_per_pool;
4519         struct ixgbe_hw *hw = &adapter->hw;
4520         u16 pool = vadapter->pool;
4521         u32 psrtype = IXGBE_PSRTYPE_TCPHDR |
4522                       IXGBE_PSRTYPE_UDPHDR |
4523                       IXGBE_PSRTYPE_IPV4HDR |
4524                       IXGBE_PSRTYPE_L2HDR |
4525                       IXGBE_PSRTYPE_IPV6HDR;
4526
4527         if (hw->mac.type == ixgbe_mac_82598EB)
4528                 return;
4529
4530         if (rss_i > 3)
4531                 psrtype |= 2 << 29;
4532         else if (rss_i > 1)
4533                 psrtype |= 1 << 29;
4534
4535         IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(VMDQ_P(pool)), psrtype);
4536 }
4537
4538 /**
4539  * ixgbe_clean_rx_ring - Free Rx Buffers per Queue
4540  * @rx_ring: ring to free buffers from
4541  **/
4542 static void ixgbe_clean_rx_ring(struct ixgbe_ring *rx_ring)
4543 {
4544         struct device *dev = rx_ring->dev;
4545         unsigned long size;
4546         u16 i;
4547
4548         /* ring already cleared, nothing to do */
4549         if (!rx_ring->rx_buffer_info)
4550                 return;
4551
4552         /* Free all the Rx ring sk_buffs */
4553         for (i = 0; i < rx_ring->count; i++) {
4554                 struct ixgbe_rx_buffer *rx_buffer = &rx_ring->rx_buffer_info[i];
4555
4556                 if (rx_buffer->skb) {
4557                         struct sk_buff *skb = rx_buffer->skb;
4558                         if (IXGBE_CB(skb)->page_released)
4559                                 dma_unmap_page(dev,
4560                                                IXGBE_CB(skb)->dma,
4561                                                ixgbe_rx_bufsz(rx_ring),
4562                                                DMA_FROM_DEVICE);
4563                         dev_kfree_skb(skb);
4564                         rx_buffer->skb = NULL;
4565                 }
4566
4567                 if (!rx_buffer->page)
4568                         continue;
4569
4570                 dma_unmap_page(dev, rx_buffer->dma,
4571                                ixgbe_rx_pg_size(rx_ring), DMA_FROM_DEVICE);
4572                 __free_pages(rx_buffer->page, ixgbe_rx_pg_order(rx_ring));
4573
4574                 rx_buffer->page = NULL;
4575         }
4576
4577         size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
4578         memset(rx_ring->rx_buffer_info, 0, size);
4579
4580         /* Zero out the descriptor ring */
4581         memset(rx_ring->desc, 0, rx_ring->size);
4582
4583         rx_ring->next_to_alloc = 0;
4584         rx_ring->next_to_clean = 0;
4585         rx_ring->next_to_use = 0;
4586 }
4587
4588 static void ixgbe_disable_fwd_ring(struct ixgbe_fwd_adapter *vadapter,
4589                                    struct ixgbe_ring *rx_ring)
4590 {
4591         struct ixgbe_adapter *adapter = vadapter->real_adapter;
4592         int index = rx_ring->queue_index + vadapter->rx_base_queue;
4593
4594         /* shutdown specific queue receive and wait for dma to settle */
4595         ixgbe_disable_rx_queue(adapter, rx_ring);
4596         usleep_range(10000, 20000);
4597         ixgbe_irq_disable_queues(adapter, ((u64)1 << index));
4598         ixgbe_clean_rx_ring(rx_ring);
4599         rx_ring->l2_accel_priv = NULL;
4600 }
4601
4602 static int ixgbe_fwd_ring_down(struct net_device *vdev,
4603                                struct ixgbe_fwd_adapter *accel)
4604 {
4605         struct ixgbe_adapter *adapter = accel->real_adapter;
4606         unsigned int rxbase = accel->rx_base_queue;
4607         unsigned int txbase = accel->tx_base_queue;
4608         int i;
4609
4610         netif_tx_stop_all_queues(vdev);
4611
4612         for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
4613                 ixgbe_disable_fwd_ring(accel, adapter->rx_ring[rxbase + i]);
4614                 adapter->rx_ring[rxbase + i]->netdev = adapter->netdev;
4615         }
4616
4617         for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
4618                 adapter->tx_ring[txbase + i]->l2_accel_priv = NULL;
4619                 adapter->tx_ring[txbase + i]->netdev = adapter->netdev;
4620         }
4621
4622
4623         return 0;
4624 }
4625
4626 static int ixgbe_fwd_ring_up(struct net_device *vdev,
4627                              struct ixgbe_fwd_adapter *accel)
4628 {
4629         struct ixgbe_adapter *adapter = accel->real_adapter;
4630         unsigned int rxbase, txbase, queues;
4631         int i, baseq, err = 0;
4632
4633         if (!test_bit(accel->pool, &adapter->fwd_bitmask))
4634                 return 0;
4635
4636         baseq = accel->pool * adapter->num_rx_queues_per_pool;
4637         netdev_dbg(vdev, "pool %i:%i queues %i:%i VSI bitmask %lx\n",
4638                    accel->pool, adapter->num_rx_pools,
4639                    baseq, baseq + adapter->num_rx_queues_per_pool,
4640                    adapter->fwd_bitmask);
4641
4642         accel->netdev = vdev;
4643         accel->rx_base_queue = rxbase = baseq;
4644         accel->tx_base_queue = txbase = baseq;
4645
4646         for (i = 0; i < adapter->num_rx_queues_per_pool; i++)
4647                 ixgbe_disable_fwd_ring(accel, adapter->rx_ring[rxbase + i]);
4648
4649         for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
4650                 adapter->rx_ring[rxbase + i]->netdev = vdev;
4651                 adapter->rx_ring[rxbase + i]->l2_accel_priv = accel;
4652                 ixgbe_configure_rx_ring(adapter, adapter->rx_ring[rxbase + i]);
4653         }
4654
4655         for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
4656                 adapter->tx_ring[txbase + i]->netdev = vdev;
4657                 adapter->tx_ring[txbase + i]->l2_accel_priv = accel;
4658         }
4659
4660         queues = min_t(unsigned int,
4661                        adapter->num_rx_queues_per_pool, vdev->num_tx_queues);
4662         err = netif_set_real_num_tx_queues(vdev, queues);
4663         if (err)
4664                 goto fwd_queue_err;
4665
4666         err = netif_set_real_num_rx_queues(vdev, queues);
4667         if (err)
4668                 goto fwd_queue_err;
4669
4670         if (is_valid_ether_addr(vdev->dev_addr))
4671                 ixgbe_add_mac_filter(adapter, vdev->dev_addr, accel->pool);
4672
4673         ixgbe_fwd_psrtype(accel);
4674         ixgbe_macvlan_set_rx_mode(vdev, accel->pool, adapter);
4675         return err;
4676 fwd_queue_err:
4677         ixgbe_fwd_ring_down(vdev, accel);
4678         return err;
4679 }
4680
4681 static void ixgbe_configure_dfwd(struct ixgbe_adapter *adapter)
4682 {
4683         struct net_device *upper;
4684         struct list_head *iter;
4685         int err;
4686
4687         netdev_for_each_all_upper_dev_rcu(adapter->netdev, upper, iter) {
4688                 if (netif_is_macvlan(upper)) {
4689                         struct macvlan_dev *dfwd = netdev_priv(upper);
4690                         struct ixgbe_fwd_adapter *vadapter = dfwd->fwd_priv;
4691
4692                         if (dfwd->fwd_priv) {
4693                                 err = ixgbe_fwd_ring_up(upper, vadapter);
4694                                 if (err)
4695                                         continue;
4696                         }
4697                 }
4698         }
4699 }
4700
4701 static void ixgbe_configure(struct ixgbe_adapter *adapter)
4702 {
4703         struct ixgbe_hw *hw = &adapter->hw;
4704
4705         ixgbe_configure_pb(adapter);
4706 #ifdef CONFIG_IXGBE_DCB
4707         ixgbe_configure_dcb(adapter);
4708 #endif
4709         /*
4710          * We must restore virtualization before VLANs or else
4711          * the VLVF registers will not be populated
4712          */
4713         ixgbe_configure_virtualization(adapter);
4714
4715         ixgbe_set_rx_mode(adapter->netdev);
4716         ixgbe_restore_vlan(adapter);
4717
4718         switch (hw->mac.type) {
4719         case ixgbe_mac_82599EB:
4720         case ixgbe_mac_X540:
4721                 hw->mac.ops.disable_rx_buff(hw);
4722                 break;
4723         default:
4724                 break;
4725         }
4726
4727         if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
4728                 ixgbe_init_fdir_signature_82599(&adapter->hw,
4729                                                 adapter->fdir_pballoc);
4730         } else if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE) {
4731                 ixgbe_init_fdir_perfect_82599(&adapter->hw,
4732                                               adapter->fdir_pballoc);
4733                 ixgbe_fdir_filter_restore(adapter);
4734         }
4735
4736         switch (hw->mac.type) {
4737         case ixgbe_mac_82599EB:
4738         case ixgbe_mac_X540:
4739                 hw->mac.ops.enable_rx_buff(hw);
4740                 break;
4741         default:
4742                 break;
4743         }
4744
4745 #ifdef IXGBE_FCOE
4746         /* configure FCoE L2 filters, redirection table, and Rx control */
4747         ixgbe_configure_fcoe(adapter);
4748
4749 #endif /* IXGBE_FCOE */
4750         ixgbe_configure_tx(adapter);
4751         ixgbe_configure_rx(adapter);
4752         ixgbe_configure_dfwd(adapter);
4753 }
4754
4755 /**
4756  * ixgbe_sfp_link_config - set up SFP+ link
4757  * @adapter: pointer to private adapter struct
4758  **/
4759 static void ixgbe_sfp_link_config(struct ixgbe_adapter *adapter)
4760 {
4761         /*
4762          * We are assuming the worst case scenario here, and that
4763          * is that an SFP was inserted/removed after the reset
4764          * but before SFP detection was enabled.  As such the best
4765          * solution is to just start searching as soon as we start
4766          */
4767         if (adapter->hw.mac.type == ixgbe_mac_82598EB)
4768                 adapter->flags2 |= IXGBE_FLAG2_SEARCH_FOR_SFP;
4769
4770         adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
4771 }
4772
4773 /**
4774  * ixgbe_non_sfp_link_config - set up non-SFP+ link
4775  * @hw: pointer to private hardware struct
4776  *
4777  * Returns 0 on success, negative on failure
4778  **/
4779 static int ixgbe_non_sfp_link_config(struct ixgbe_hw *hw)
4780 {
4781         u32 speed;
4782         bool autoneg, link_up = false;
4783         int ret = IXGBE_ERR_LINK_SETUP;
4784
4785         if (hw->mac.ops.check_link)
4786                 ret = hw->mac.ops.check_link(hw, &speed, &link_up, false);
4787
4788         if (ret)
4789                 return ret;
4790
4791         speed = hw->phy.autoneg_advertised;
4792         if ((!speed) && (hw->mac.ops.get_link_capabilities))
4793                 ret = hw->mac.ops.get_link_capabilities(hw, &speed,
4794                                                         &autoneg);
4795         if (ret)
4796                 return ret;
4797
4798         if (hw->mac.ops.setup_link)
4799                 ret = hw->mac.ops.setup_link(hw, speed, link_up);
4800
4801         return ret;
4802 }
4803
4804 static void ixgbe_setup_gpie(struct ixgbe_adapter *adapter)
4805 {
4806         struct ixgbe_hw *hw = &adapter->hw;
4807         u32 gpie = 0;
4808
4809         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
4810                 gpie = IXGBE_GPIE_MSIX_MODE | IXGBE_GPIE_PBA_SUPPORT |
4811                        IXGBE_GPIE_OCD;
4812                 gpie |= IXGBE_GPIE_EIAME;
4813                 /*
4814                  * use EIAM to auto-mask when MSI-X interrupt is asserted
4815                  * this saves a register write for every interrupt
4816                  */
4817                 switch (hw->mac.type) {
4818                 case ixgbe_mac_82598EB:
4819                         IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
4820                         break;
4821                 case ixgbe_mac_82599EB:
4822                 case ixgbe_mac_X540:
4823                 case ixgbe_mac_X550:
4824                 case ixgbe_mac_X550EM_x:
4825                 default:
4826                         IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(0), 0xFFFFFFFF);
4827                         IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(1), 0xFFFFFFFF);
4828                         break;
4829                 }
4830         } else {
4831                 /* legacy interrupts, use EIAM to auto-mask when reading EICR,
4832                  * specifically only auto mask tx and rx interrupts */
4833                 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
4834         }
4835
4836         /* XXX: to interrupt immediately for EICS writes, enable this */
4837         /* gpie |= IXGBE_GPIE_EIMEN; */
4838
4839         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
4840                 gpie &= ~IXGBE_GPIE_VTMODE_MASK;
4841
4842                 switch (adapter->ring_feature[RING_F_VMDQ].mask) {
4843                 case IXGBE_82599_VMDQ_8Q_MASK:
4844                         gpie |= IXGBE_GPIE_VTMODE_16;
4845                         break;
4846                 case IXGBE_82599_VMDQ_4Q_MASK:
4847                         gpie |= IXGBE_GPIE_VTMODE_32;
4848                         break;
4849                 default:
4850                         gpie |= IXGBE_GPIE_VTMODE_64;
4851                         break;
4852                 }
4853         }
4854
4855         /* Enable Thermal over heat sensor interrupt */
4856         if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE) {
4857                 switch (adapter->hw.mac.type) {
4858                 case ixgbe_mac_82599EB:
4859                         gpie |= IXGBE_SDP0_GPIEN_8259X;
4860                         break;
4861                 case ixgbe_mac_X540:
4862                         gpie |= IXGBE_EIMS_TS;
4863                         break;
4864                 default:
4865                         break;
4866                 }
4867         }
4868
4869         /* Enable fan failure interrupt */
4870         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
4871                 gpie |= IXGBE_SDP1_GPIEN(hw);
4872
4873         if (hw->mac.type == ixgbe_mac_82599EB) {
4874                 gpie |= IXGBE_SDP1_GPIEN_8259X;
4875                 gpie |= IXGBE_SDP2_GPIEN_8259X;
4876         }
4877
4878         IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);
4879 }
4880
4881 static void ixgbe_up_complete(struct ixgbe_adapter *adapter)
4882 {
4883         struct ixgbe_hw *hw = &adapter->hw;
4884         int err;
4885         u32 ctrl_ext;
4886
4887         ixgbe_get_hw_control(adapter);
4888         ixgbe_setup_gpie(adapter);
4889
4890         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
4891                 ixgbe_configure_msix(adapter);
4892         else
4893                 ixgbe_configure_msi_and_legacy(adapter);
4894
4895         /* enable the optics for 82599 SFP+ fiber */
4896         if (hw->mac.ops.enable_tx_laser)
4897                 hw->mac.ops.enable_tx_laser(hw);
4898
4899         if (hw->phy.ops.set_phy_power)
4900                 hw->phy.ops.set_phy_power(hw, true);
4901
4902         smp_mb__before_atomic();
4903         clear_bit(__IXGBE_DOWN, &adapter->state);
4904         ixgbe_napi_enable_all(adapter);
4905
4906         if (ixgbe_is_sfp(hw)) {
4907                 ixgbe_sfp_link_config(adapter);
4908         } else {
4909                 err = ixgbe_non_sfp_link_config(hw);
4910                 if (err)
4911                         e_err(probe, "link_config FAILED %d\n", err);
4912         }
4913
4914         /* clear any pending interrupts, may auto mask */
4915         IXGBE_READ_REG(hw, IXGBE_EICR);
4916         ixgbe_irq_enable(adapter, true, true);
4917
4918         /*
4919          * If this adapter has a fan, check to see if we had a failure
4920          * before we enabled the interrupt.
4921          */
4922         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
4923                 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
4924                 if (esdp & IXGBE_ESDP_SDP1)
4925                         e_crit(drv, "Fan has stopped, replace the adapter\n");
4926         }
4927
4928         /* bring the link up in the watchdog, this could race with our first
4929          * link up interrupt but shouldn't be a problem */
4930         adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
4931         adapter->link_check_timeout = jiffies;
4932         mod_timer(&adapter->service_timer, jiffies);
4933
4934         /* Set PF Reset Done bit so PF/VF Mail Ops can work */
4935         ctrl_ext = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT);
4936         ctrl_ext |= IXGBE_CTRL_EXT_PFRSTD;
4937         IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, ctrl_ext);
4938 }
4939
4940 void ixgbe_reinit_locked(struct ixgbe_adapter *adapter)
4941 {
4942         WARN_ON(in_interrupt());
4943         /* put off any impending NetWatchDogTimeout */
4944         adapter->netdev->trans_start = jiffies;
4945
4946         while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
4947                 usleep_range(1000, 2000);
4948         ixgbe_down(adapter);
4949         /*
4950          * If SR-IOV enabled then wait a bit before bringing the adapter
4951          * back up to give the VFs time to respond to the reset.  The
4952          * two second wait is based upon the watchdog timer cycle in
4953          * the VF driver.
4954          */
4955         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
4956                 msleep(2000);
4957         ixgbe_up(adapter);
4958         clear_bit(__IXGBE_RESETTING, &adapter->state);
4959 }
4960
4961 void ixgbe_up(struct ixgbe_adapter *adapter)
4962 {
4963         /* hardware has been reset, we need to reload some things */
4964         ixgbe_configure(adapter);
4965
4966         ixgbe_up_complete(adapter);
4967 }
4968
4969 void ixgbe_reset(struct ixgbe_adapter *adapter)
4970 {
4971         struct ixgbe_hw *hw = &adapter->hw;
4972         struct net_device *netdev = adapter->netdev;
4973         int err;
4974         u8 old_addr[ETH_ALEN];
4975
4976         if (ixgbe_removed(hw->hw_addr))
4977                 return;
4978         /* lock SFP init bit to prevent race conditions with the watchdog */
4979         while (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
4980                 usleep_range(1000, 2000);
4981
4982         /* clear all SFP and link config related flags while holding SFP_INIT */
4983         adapter->flags2 &= ~(IXGBE_FLAG2_SEARCH_FOR_SFP |
4984                              IXGBE_FLAG2_SFP_NEEDS_RESET);
4985         adapter->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG;
4986
4987         err = hw->mac.ops.init_hw(hw);
4988         switch (err) {
4989         case 0:
4990         case IXGBE_ERR_SFP_NOT_PRESENT:
4991         case IXGBE_ERR_SFP_NOT_SUPPORTED:
4992                 break;
4993         case IXGBE_ERR_MASTER_REQUESTS_PENDING:
4994                 e_dev_err("master disable timed out\n");
4995                 break;
4996         case IXGBE_ERR_EEPROM_VERSION:
4997                 /* We are running on a pre-production device, log a warning */
4998                 e_dev_warn("This device is a pre-production adapter/LOM. "
4999                            "Please be aware there may be issues associated with "
5000                            "your hardware.  If you are experiencing problems "
5001                            "please contact your Intel or hardware "
5002                            "representative who provided you with this "
5003                            "hardware.\n");
5004                 break;
5005         default:
5006                 e_dev_err("Hardware Error: %d\n", err);
5007         }
5008
5009         clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
5010         /* do not flush user set addresses */
5011         memcpy(old_addr, &adapter->mac_table[0].addr, netdev->addr_len);
5012         ixgbe_flush_sw_mac_table(adapter);
5013         ixgbe_mac_set_default_filter(adapter, old_addr);
5014
5015         /* update SAN MAC vmdq pool selection */
5016         if (hw->mac.san_mac_rar_index)
5017                 hw->mac.ops.set_vmdq_san_mac(hw, VMDQ_P(0));
5018
5019         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
5020                 ixgbe_ptp_reset(adapter);
5021
5022         if (hw->phy.ops.set_phy_power) {
5023                 if (!netif_running(adapter->netdev) && !adapter->wol)
5024                         hw->phy.ops.set_phy_power(hw, false);
5025                 else
5026                         hw->phy.ops.set_phy_power(hw, true);
5027         }
5028 }
5029
5030 /**
5031  * ixgbe_clean_tx_ring - Free Tx Buffers
5032  * @tx_ring: ring to be cleaned
5033  **/
5034 static void ixgbe_clean_tx_ring(struct ixgbe_ring *tx_ring)
5035 {
5036         struct ixgbe_tx_buffer *tx_buffer_info;
5037         unsigned long size;
5038         u16 i;
5039
5040         /* ring already cleared, nothing to do */
5041         if (!tx_ring->tx_buffer_info)
5042                 return;
5043
5044         /* Free all the Tx ring sk_buffs */
5045         for (i = 0; i < tx_ring->count; i++) {
5046                 tx_buffer_info = &tx_ring->tx_buffer_info[i];
5047                 ixgbe_unmap_and_free_tx_resource(tx_ring, tx_buffer_info);
5048         }
5049
5050         netdev_tx_reset_queue(txring_txq(tx_ring));
5051
5052         size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
5053         memset(tx_ring->tx_buffer_info, 0, size);
5054
5055         /* Zero out the descriptor ring */
5056         memset(tx_ring->desc, 0, tx_ring->size);
5057
5058         tx_ring->next_to_use = 0;
5059         tx_ring->next_to_clean = 0;
5060 }
5061
5062 /**
5063  * ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues
5064  * @adapter: board private structure
5065  **/
5066 static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter *adapter)
5067 {
5068         int i;
5069
5070         for (i = 0; i < adapter->num_rx_queues; i++)
5071                 ixgbe_clean_rx_ring(adapter->rx_ring[i]);
5072 }
5073
5074 /**
5075  * ixgbe_clean_all_tx_rings - Free Tx Buffers for all queues
5076  * @adapter: board private structure
5077  **/
5078 static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter *adapter)
5079 {
5080         int i;
5081
5082         for (i = 0; i < adapter->num_tx_queues; i++)
5083                 ixgbe_clean_tx_ring(adapter->tx_ring[i]);
5084 }
5085
5086 static void ixgbe_fdir_filter_exit(struct ixgbe_adapter *adapter)
5087 {
5088         struct hlist_node *node2;
5089         struct ixgbe_fdir_filter *filter;
5090
5091         spin_lock(&adapter->fdir_perfect_lock);
5092
5093         hlist_for_each_entry_safe(filter, node2,
5094                                   &adapter->fdir_filter_list, fdir_node) {
5095                 hlist_del(&filter->fdir_node);
5096                 kfree(filter);
5097         }
5098         adapter->fdir_filter_count = 0;
5099
5100         spin_unlock(&adapter->fdir_perfect_lock);
5101 }
5102
5103 void ixgbe_down(struct ixgbe_adapter *adapter)
5104 {
5105         struct net_device *netdev = adapter->netdev;
5106         struct ixgbe_hw *hw = &adapter->hw;
5107         struct net_device *upper;
5108         struct list_head *iter;
5109         int i;
5110
5111         /* signal that we are down to the interrupt handler */
5112         if (test_and_set_bit(__IXGBE_DOWN, &adapter->state))
5113                 return; /* do nothing if already down */
5114
5115         /* disable receives */
5116         hw->mac.ops.disable_rx(hw);
5117
5118         /* disable all enabled rx queues */
5119         for (i = 0; i < adapter->num_rx_queues; i++)
5120                 /* this call also flushes the previous write */
5121                 ixgbe_disable_rx_queue(adapter, adapter->rx_ring[i]);
5122
5123         usleep_range(10000, 20000);
5124
5125         netif_tx_stop_all_queues(netdev);
5126
5127         /* call carrier off first to avoid false dev_watchdog timeouts */
5128         netif_carrier_off(netdev);
5129         netif_tx_disable(netdev);
5130
5131         /* disable any upper devices */
5132         netdev_for_each_all_upper_dev_rcu(adapter->netdev, upper, iter) {
5133                 if (netif_is_macvlan(upper)) {
5134                         struct macvlan_dev *vlan = netdev_priv(upper);
5135
5136                         if (vlan->fwd_priv) {
5137                                 netif_tx_stop_all_queues(upper);
5138                                 netif_carrier_off(upper);
5139                                 netif_tx_disable(upper);
5140                         }
5141                 }
5142         }
5143
5144         ixgbe_irq_disable(adapter);
5145
5146         ixgbe_napi_disable_all(adapter);
5147
5148         adapter->flags2 &= ~(IXGBE_FLAG2_FDIR_REQUIRES_REINIT |
5149                              IXGBE_FLAG2_RESET_REQUESTED);
5150         adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
5151
5152         del_timer_sync(&adapter->service_timer);
5153
5154         if (adapter->num_vfs) {
5155                 /* Clear EITR Select mapping */
5156                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, 0);
5157
5158                 /* Mark all the VFs as inactive */
5159                 for (i = 0 ; i < adapter->num_vfs; i++)
5160                         adapter->vfinfo[i].clear_to_send = false;
5161
5162                 /* ping all the active vfs to let them know we are going down */
5163                 ixgbe_ping_all_vfs(adapter);
5164
5165                 /* Disable all VFTE/VFRE TX/RX */
5166                 ixgbe_disable_tx_rx(adapter);
5167         }
5168
5169         /* disable transmits in the hardware now that interrupts are off */
5170         for (i = 0; i < adapter->num_tx_queues; i++) {
5171                 u8 reg_idx = adapter->tx_ring[i]->reg_idx;
5172                 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH);
5173         }
5174
5175         /* Disable the Tx DMA engine on 82599 and later MAC */
5176         switch (hw->mac.type) {
5177         case ixgbe_mac_82599EB:
5178         case ixgbe_mac_X540:
5179         case ixgbe_mac_X550:
5180         case ixgbe_mac_X550EM_x:
5181                 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL,
5182                                 (IXGBE_READ_REG(hw, IXGBE_DMATXCTL) &
5183                                  ~IXGBE_DMATXCTL_TE));
5184                 break;
5185         default:
5186                 break;
5187         }
5188
5189         if (!pci_channel_offline(adapter->pdev))
5190                 ixgbe_reset(adapter);
5191
5192         /* power down the optics for 82599 SFP+ fiber */
5193         if (hw->mac.ops.disable_tx_laser)
5194                 hw->mac.ops.disable_tx_laser(hw);
5195
5196         ixgbe_clean_all_tx_rings(adapter);
5197         ixgbe_clean_all_rx_rings(adapter);
5198
5199 #ifdef CONFIG_IXGBE_DCA
5200         /* since we reset the hardware DCA settings were cleared */
5201         ixgbe_setup_dca(adapter);
5202 #endif
5203 }
5204
5205 /**
5206  * ixgbe_tx_timeout - Respond to a Tx Hang
5207  * @netdev: network interface device structure
5208  **/
5209 static void ixgbe_tx_timeout(struct net_device *netdev)
5210 {
5211         struct ixgbe_adapter *adapter = netdev_priv(netdev);
5212
5213         /* Do the reset outside of interrupt context */
5214         ixgbe_tx_timeout_reset(adapter);
5215 }
5216
5217 /**
5218  * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter)
5219  * @adapter: board private structure to initialize
5220  *
5221  * ixgbe_sw_init initializes the Adapter private data structure.
5222  * Fields are initialized based on PCI device information and
5223  * OS network device settings (MTU size).
5224  **/
5225 static int ixgbe_sw_init(struct ixgbe_adapter *adapter)
5226 {
5227         struct ixgbe_hw *hw = &adapter->hw;
5228         struct pci_dev *pdev = adapter->pdev;
5229         unsigned int rss, fdir;
5230         u32 fwsm;
5231 #ifdef CONFIG_IXGBE_DCB
5232         int j;
5233         struct tc_configuration *tc;
5234 #endif
5235
5236         /* PCI config space info */
5237
5238         hw->vendor_id = pdev->vendor;
5239         hw->device_id = pdev->device;
5240         hw->revision_id = pdev->revision;
5241         hw->subsystem_vendor_id = pdev->subsystem_vendor;
5242         hw->subsystem_device_id = pdev->subsystem_device;
5243
5244         /* Set common capability flags and settings */
5245         rss = min_t(int, ixgbe_max_rss_indices(adapter), num_online_cpus());
5246         adapter->ring_feature[RING_F_RSS].limit = rss;
5247         adapter->flags2 |= IXGBE_FLAG2_RSC_CAPABLE;
5248         adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED;
5249         adapter->max_q_vectors = MAX_Q_VECTORS_82599;
5250         adapter->atr_sample_rate = 20;
5251         fdir = min_t(int, IXGBE_MAX_FDIR_INDICES, num_online_cpus());
5252         adapter->ring_feature[RING_F_FDIR].limit = fdir;
5253         adapter->fdir_pballoc = IXGBE_FDIR_PBALLOC_64K;
5254 #ifdef CONFIG_IXGBE_DCA
5255         adapter->flags |= IXGBE_FLAG_DCA_CAPABLE;
5256 #endif
5257 #ifdef IXGBE_FCOE
5258         adapter->flags |= IXGBE_FLAG_FCOE_CAPABLE;
5259         adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
5260 #ifdef CONFIG_IXGBE_DCB
5261         /* Default traffic class to use for FCoE */
5262         adapter->fcoe.up = IXGBE_FCOE_DEFTC;
5263 #endif /* CONFIG_IXGBE_DCB */
5264 #endif /* IXGBE_FCOE */
5265
5266         adapter->mac_table = kzalloc(sizeof(struct ixgbe_mac_addr) *
5267                                      hw->mac.num_rar_entries,
5268                                      GFP_ATOMIC);
5269
5270         /* Set MAC specific capability flags and exceptions */
5271         switch (hw->mac.type) {
5272         case ixgbe_mac_82598EB:
5273                 adapter->flags2 &= ~IXGBE_FLAG2_RSC_CAPABLE;
5274                 adapter->flags2 &= ~IXGBE_FLAG2_RSC_ENABLED;
5275
5276                 if (hw->device_id == IXGBE_DEV_ID_82598AT)
5277                         adapter->flags |= IXGBE_FLAG_FAN_FAIL_CAPABLE;
5278
5279                 adapter->max_q_vectors = MAX_Q_VECTORS_82598;
5280                 adapter->ring_feature[RING_F_FDIR].limit = 0;
5281                 adapter->atr_sample_rate = 0;
5282                 adapter->fdir_pballoc = 0;
5283 #ifdef IXGBE_FCOE
5284                 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
5285                 adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
5286 #ifdef CONFIG_IXGBE_DCB
5287                 adapter->fcoe.up = 0;
5288 #endif /* IXGBE_DCB */
5289 #endif /* IXGBE_FCOE */
5290                 break;
5291         case ixgbe_mac_82599EB:
5292                 if (hw->device_id == IXGBE_DEV_ID_82599_T3_LOM)
5293                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
5294                 break;
5295         case ixgbe_mac_X540:
5296                 fwsm = IXGBE_READ_REG(hw, IXGBE_FWSM(hw));
5297                 if (fwsm & IXGBE_FWSM_TS_ENABLED)
5298                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
5299                 break;
5300         case ixgbe_mac_X550EM_x:
5301         case ixgbe_mac_X550:
5302 #ifdef CONFIG_IXGBE_DCA
5303                 adapter->flags &= ~IXGBE_FLAG_DCA_CAPABLE;
5304 #endif
5305                 break;
5306         default:
5307                 break;
5308         }
5309
5310 #ifdef IXGBE_FCOE
5311         /* FCoE support exists, always init the FCoE lock */
5312         spin_lock_init(&adapter->fcoe.lock);
5313
5314 #endif
5315         /* n-tuple support exists, always init our spinlock */
5316         spin_lock_init(&adapter->fdir_perfect_lock);
5317
5318 #ifdef CONFIG_IXGBE_DCB
5319         switch (hw->mac.type) {
5320         case ixgbe_mac_X540:
5321         case ixgbe_mac_X550:
5322         case ixgbe_mac_X550EM_x:
5323                 adapter->dcb_cfg.num_tcs.pg_tcs = X540_TRAFFIC_CLASS;
5324                 adapter->dcb_cfg.num_tcs.pfc_tcs = X540_TRAFFIC_CLASS;
5325                 break;
5326         default:
5327                 adapter->dcb_cfg.num_tcs.pg_tcs = MAX_TRAFFIC_CLASS;
5328                 adapter->dcb_cfg.num_tcs.pfc_tcs = MAX_TRAFFIC_CLASS;
5329                 break;
5330         }
5331
5332         /* Configure DCB traffic classes */
5333         for (j = 0; j < MAX_TRAFFIC_CLASS; j++) {
5334                 tc = &adapter->dcb_cfg.tc_config[j];
5335                 tc->path[DCB_TX_CONFIG].bwg_id = 0;
5336                 tc->path[DCB_TX_CONFIG].bwg_percent = 12 + (j & 1);
5337                 tc->path[DCB_RX_CONFIG].bwg_id = 0;
5338                 tc->path[DCB_RX_CONFIG].bwg_percent = 12 + (j & 1);
5339                 tc->dcb_pfc = pfc_disabled;
5340         }
5341
5342         /* Initialize default user to priority mapping, UPx->TC0 */
5343         tc = &adapter->dcb_cfg.tc_config[0];
5344         tc->path[DCB_TX_CONFIG].up_to_tc_bitmap = 0xFF;
5345         tc->path[DCB_RX_CONFIG].up_to_tc_bitmap = 0xFF;
5346
5347         adapter->dcb_cfg.bw_percentage[DCB_TX_CONFIG][0] = 100;
5348         adapter->dcb_cfg.bw_percentage[DCB_RX_CONFIG][0] = 100;
5349         adapter->dcb_cfg.pfc_mode_enable = false;
5350         adapter->dcb_set_bitmap = 0x00;
5351         adapter->dcbx_cap = DCB_CAP_DCBX_HOST | DCB_CAP_DCBX_VER_CEE;
5352         memcpy(&adapter->temp_dcb_cfg, &adapter->dcb_cfg,
5353                sizeof(adapter->temp_dcb_cfg));
5354
5355 #endif
5356
5357         /* default flow control settings */
5358         hw->fc.requested_mode = ixgbe_fc_full;
5359         hw->fc.current_mode = ixgbe_fc_full;    /* init for ethtool output */
5360         ixgbe_pbthresh_setup(adapter);
5361         hw->fc.pause_time = IXGBE_DEFAULT_FCPAUSE;
5362         hw->fc.send_xon = true;
5363         hw->fc.disable_fc_autoneg = ixgbe_device_supports_autoneg_fc(hw);
5364
5365 #ifdef CONFIG_PCI_IOV
5366         if (max_vfs > 0)
5367                 e_dev_warn("Enabling SR-IOV VFs using the max_vfs module parameter is deprecated - please use the pci sysfs interface instead.\n");
5368
5369         /* assign number of SR-IOV VFs */
5370         if (hw->mac.type != ixgbe_mac_82598EB) {
5371                 if (max_vfs > IXGBE_MAX_VFS_DRV_LIMIT) {
5372                         adapter->num_vfs = 0;
5373                         e_dev_warn("max_vfs parameter out of range. Not assigning any SR-IOV VFs\n");
5374                 } else {
5375                         adapter->num_vfs = max_vfs;
5376                 }
5377         }
5378 #endif /* CONFIG_PCI_IOV */
5379
5380         /* enable itr by default in dynamic mode */
5381         adapter->rx_itr_setting = 1;
5382         adapter->tx_itr_setting = 1;
5383
5384         /* set default ring sizes */
5385         adapter->tx_ring_count = IXGBE_DEFAULT_TXD;
5386         adapter->rx_ring_count = IXGBE_DEFAULT_RXD;
5387
5388         /* set default work limits */
5389         adapter->tx_work_limit = IXGBE_DEFAULT_TX_WORK;
5390
5391         /* initialize eeprom parameters */
5392         if (ixgbe_init_eeprom_params_generic(hw)) {
5393                 e_dev_err("EEPROM initialization failed\n");
5394                 return -EIO;
5395         }
5396
5397         /* PF holds first pool slot */
5398         set_bit(0, &adapter->fwd_bitmask);
5399         set_bit(__IXGBE_DOWN, &adapter->state);
5400
5401         return 0;
5402 }
5403
5404 /**
5405  * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors)
5406  * @tx_ring:    tx descriptor ring (for a specific queue) to setup
5407  *
5408  * Return 0 on success, negative on failure
5409  **/
5410 int ixgbe_setup_tx_resources(struct ixgbe_ring *tx_ring)
5411 {
5412         struct device *dev = tx_ring->dev;
5413         int orig_node = dev_to_node(dev);
5414         int ring_node = -1;
5415         int size;
5416
5417         size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
5418
5419         if (tx_ring->q_vector)
5420                 ring_node = tx_ring->q_vector->numa_node;
5421
5422         tx_ring->tx_buffer_info = vzalloc_node(size, ring_node);
5423         if (!tx_ring->tx_buffer_info)
5424                 tx_ring->tx_buffer_info = vzalloc(size);
5425         if (!tx_ring->tx_buffer_info)
5426                 goto err;
5427
5428         u64_stats_init(&tx_ring->syncp);
5429
5430         /* round up to nearest 4K */
5431         tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc);
5432         tx_ring->size = ALIGN(tx_ring->size, 4096);
5433
5434         set_dev_node(dev, ring_node);
5435         tx_ring->desc = dma_alloc_coherent(dev,
5436                                            tx_ring->size,
5437                                            &tx_ring->dma,
5438                                            GFP_KERNEL);
5439         set_dev_node(dev, orig_node);
5440         if (!tx_ring->desc)
5441                 tx_ring->desc = dma_alloc_coherent(dev, tx_ring->size,
5442                                                    &tx_ring->dma, GFP_KERNEL);
5443         if (!tx_ring->desc)
5444                 goto err;
5445
5446         tx_ring->next_to_use = 0;
5447         tx_ring->next_to_clean = 0;
5448         return 0;
5449
5450 err:
5451         vfree(tx_ring->tx_buffer_info);
5452         tx_ring->tx_buffer_info = NULL;
5453         dev_err(dev, "Unable to allocate memory for the Tx descriptor ring\n");
5454         return -ENOMEM;
5455 }
5456
5457 /**
5458  * ixgbe_setup_all_tx_resources - allocate all queues Tx resources
5459  * @adapter: board private structure
5460  *
5461  * If this function returns with an error, then it's possible one or
5462  * more of the rings is populated (while the rest are not).  It is the
5463  * callers duty to clean those orphaned rings.
5464  *
5465  * Return 0 on success, negative on failure
5466  **/
5467 static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter *adapter)
5468 {
5469         int i, err = 0;
5470
5471         for (i = 0; i < adapter->num_tx_queues; i++) {
5472                 err = ixgbe_setup_tx_resources(adapter->tx_ring[i]);
5473                 if (!err)
5474                         continue;
5475
5476                 e_err(probe, "Allocation for Tx Queue %u failed\n", i);
5477                 goto err_setup_tx;
5478         }
5479
5480         return 0;
5481 err_setup_tx:
5482         /* rewind the index freeing the rings as we go */
5483         while (i--)
5484                 ixgbe_free_tx_resources(adapter->tx_ring[i]);
5485         return err;
5486 }
5487
5488 /**
5489  * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors)
5490  * @rx_ring:    rx descriptor ring (for a specific queue) to setup
5491  *
5492  * Returns 0 on success, negative on failure
5493  **/
5494 int ixgbe_setup_rx_resources(struct ixgbe_ring *rx_ring)
5495 {
5496         struct device *dev = rx_ring->dev;
5497         int orig_node = dev_to_node(dev);
5498         int ring_node = -1;
5499         int size;
5500
5501         size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
5502
5503         if (rx_ring->q_vector)
5504                 ring_node = rx_ring->q_vector->numa_node;
5505
5506         rx_ring->rx_buffer_info = vzalloc_node(size, ring_node);
5507         if (!rx_ring->rx_buffer_info)
5508                 rx_ring->rx_buffer_info = vzalloc(size);
5509         if (!rx_ring->rx_buffer_info)
5510                 goto err;
5511
5512         u64_stats_init(&rx_ring->syncp);
5513
5514         /* Round up to nearest 4K */
5515         rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc);
5516         rx_ring->size = ALIGN(rx_ring->size, 4096);
5517
5518         set_dev_node(dev, ring_node);
5519         rx_ring->desc = dma_alloc_coherent(dev,
5520                                            rx_ring->size,
5521                                            &rx_ring->dma,
5522                                            GFP_KERNEL);
5523         set_dev_node(dev, orig_node);
5524         if (!rx_ring->desc)
5525                 rx_ring->desc = dma_alloc_coherent(dev, rx_ring->size,
5526                                                    &rx_ring->dma, GFP_KERNEL);
5527         if (!rx_ring->desc)
5528                 goto err;
5529
5530         rx_ring->next_to_clean = 0;
5531         rx_ring->next_to_use = 0;
5532
5533         return 0;
5534 err:
5535         vfree(rx_ring->rx_buffer_info);
5536         rx_ring->rx_buffer_info = NULL;
5537         dev_err(dev, "Unable to allocate memory for the Rx descriptor ring\n");
5538         return -ENOMEM;
5539 }
5540
5541 /**
5542  * ixgbe_setup_all_rx_resources - allocate all queues Rx resources
5543  * @adapter: board private structure
5544  *
5545  * If this function returns with an error, then it's possible one or
5546  * more of the rings is populated (while the rest are not).  It is the
5547  * callers duty to clean those orphaned rings.
5548  *
5549  * Return 0 on success, negative on failure
5550  **/
5551 static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter *adapter)
5552 {
5553         int i, err = 0;
5554
5555         for (i = 0; i < adapter->num_rx_queues; i++) {
5556                 err = ixgbe_setup_rx_resources(adapter->rx_ring[i]);
5557                 if (!err)
5558                         continue;
5559
5560                 e_err(probe, "Allocation for Rx Queue %u failed\n", i);
5561                 goto err_setup_rx;
5562         }
5563
5564 #ifdef IXGBE_FCOE
5565         err = ixgbe_setup_fcoe_ddp_resources(adapter);
5566         if (!err)
5567 #endif
5568                 return 0;
5569 err_setup_rx:
5570         /* rewind the index freeing the rings as we go */
5571         while (i--)
5572                 ixgbe_free_rx_resources(adapter->rx_ring[i]);
5573         return err;
5574 }
5575
5576 /**
5577  * ixgbe_free_tx_resources - Free Tx Resources per Queue
5578  * @tx_ring: Tx descriptor ring for a specific queue
5579  *
5580  * Free all transmit software resources
5581  **/
5582 void ixgbe_free_tx_resources(struct ixgbe_ring *tx_ring)
5583 {
5584         ixgbe_clean_tx_ring(tx_ring);
5585
5586         vfree(tx_ring->tx_buffer_info);
5587         tx_ring->tx_buffer_info = NULL;
5588
5589         /* if not set, then don't free */
5590         if (!tx_ring->desc)
5591                 return;
5592
5593         dma_free_coherent(tx_ring->dev, tx_ring->size,
5594                           tx_ring->desc, tx_ring->dma);
5595
5596         tx_ring->desc = NULL;
5597 }
5598
5599 /**
5600  * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues
5601  * @adapter: board private structure
5602  *
5603  * Free all transmit software resources
5604  **/
5605 static void ixgbe_free_all_tx_resources(struct ixgbe_adapter *adapter)
5606 {
5607         int i;
5608
5609         for (i = 0; i < adapter->num_tx_queues; i++)
5610                 if (adapter->tx_ring[i]->desc)
5611                         ixgbe_free_tx_resources(adapter->tx_ring[i]);
5612 }
5613
5614 /**
5615  * ixgbe_free_rx_resources - Free Rx Resources
5616  * @rx_ring: ring to clean the resources from
5617  *
5618  * Free all receive software resources
5619  **/
5620 void ixgbe_free_rx_resources(struct ixgbe_ring *rx_ring)
5621 {
5622         ixgbe_clean_rx_ring(rx_ring);
5623
5624         vfree(rx_ring->rx_buffer_info);
5625         rx_ring->rx_buffer_info = NULL;
5626
5627         /* if not set, then don't free */
5628         if (!rx_ring->desc)
5629                 return;
5630
5631         dma_free_coherent(rx_ring->dev, rx_ring->size,
5632                           rx_ring->desc, rx_ring->dma);
5633
5634         rx_ring->desc = NULL;
5635 }
5636
5637 /**
5638  * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues
5639  * @adapter: board private structure
5640  *
5641  * Free all receive software resources
5642  **/
5643 static void ixgbe_free_all_rx_resources(struct ixgbe_adapter *adapter)
5644 {
5645         int i;
5646
5647 #ifdef IXGBE_FCOE
5648         ixgbe_free_fcoe_ddp_resources(adapter);
5649
5650 #endif
5651         for (i = 0; i < adapter->num_rx_queues; i++)
5652                 if (adapter->rx_ring[i]->desc)
5653                         ixgbe_free_rx_resources(adapter->rx_ring[i]);
5654 }
5655
5656 /**
5657  * ixgbe_change_mtu - Change the Maximum Transfer Unit
5658  * @netdev: network interface device structure
5659  * @new_mtu: new value for maximum frame size
5660  *
5661  * Returns 0 on success, negative on failure
5662  **/
5663 static int ixgbe_change_mtu(struct net_device *netdev, int new_mtu)
5664 {
5665         struct ixgbe_adapter *adapter = netdev_priv(netdev);
5666         int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
5667
5668         /* MTU < 68 is an error and causes problems on some kernels */
5669         if ((new_mtu < 68) || (max_frame > IXGBE_MAX_JUMBO_FRAME_SIZE))
5670                 return -EINVAL;
5671
5672         /*
5673          * For 82599EB we cannot allow legacy VFs to enable their receive
5674          * paths when MTU greater than 1500 is configured.  So display a
5675          * warning that legacy VFs will be disabled.
5676          */
5677         if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) &&
5678             (adapter->hw.mac.type == ixgbe_mac_82599EB) &&
5679             (max_frame > (ETH_FRAME_LEN + ETH_FCS_LEN)))
5680                 e_warn(probe, "Setting MTU > 1500 will disable legacy VFs\n");
5681
5682         e_info(probe, "changing MTU from %d to %d\n", netdev->mtu, new_mtu);
5683
5684         /* must set new MTU before calling down or up */
5685         netdev->mtu = new_mtu;
5686
5687         if (netif_running(netdev))
5688                 ixgbe_reinit_locked(adapter);
5689
5690         return 0;
5691 }
5692
5693 /**
5694  * ixgbe_open - Called when a network interface is made active
5695  * @netdev: network interface device structure
5696  *
5697  * Returns 0 on success, negative value on failure
5698  *
5699  * The open entry point is called when a network interface is made
5700  * active by the system (IFF_UP).  At this point all resources needed
5701  * for transmit and receive operations are allocated, the interrupt
5702  * handler is registered with the OS, the watchdog timer is started,
5703  * and the stack is notified that the interface is ready.
5704  **/
5705 static int ixgbe_open(struct net_device *netdev)
5706 {
5707         struct ixgbe_adapter *adapter = netdev_priv(netdev);
5708         struct ixgbe_hw *hw = &adapter->hw;
5709         int err, queues;
5710
5711         /* disallow open during test */
5712         if (test_bit(__IXGBE_TESTING, &adapter->state))
5713                 return -EBUSY;
5714
5715         netif_carrier_off(netdev);
5716
5717         /* allocate transmit descriptors */
5718         err = ixgbe_setup_all_tx_resources(adapter);
5719         if (err)
5720                 goto err_setup_tx;
5721
5722         /* allocate receive descriptors */
5723         err = ixgbe_setup_all_rx_resources(adapter);
5724         if (err)
5725                 goto err_setup_rx;
5726
5727         ixgbe_configure(adapter);
5728
5729         err = ixgbe_request_irq(adapter);
5730         if (err)
5731                 goto err_req_irq;
5732
5733         /* Notify the stack of the actual queue counts. */
5734         if (adapter->num_rx_pools > 1)
5735                 queues = adapter->num_rx_queues_per_pool;
5736         else
5737                 queues = adapter->num_tx_queues;
5738
5739         err = netif_set_real_num_tx_queues(netdev, queues);
5740         if (err)
5741                 goto err_set_queues;
5742
5743         if (adapter->num_rx_pools > 1 &&
5744             adapter->num_rx_queues > IXGBE_MAX_L2A_QUEUES)
5745                 queues = IXGBE_MAX_L2A_QUEUES;
5746         else
5747                 queues = adapter->num_rx_queues;
5748         err = netif_set_real_num_rx_queues(netdev, queues);
5749         if (err)
5750                 goto err_set_queues;
5751
5752         ixgbe_ptp_init(adapter);
5753
5754         ixgbe_up_complete(adapter);
5755
5756 #if IS_ENABLED(CONFIG_IXGBE_VXLAN)
5757         vxlan_get_rx_port(netdev);
5758
5759 #endif
5760         return 0;
5761
5762 err_set_queues:
5763         ixgbe_free_irq(adapter);
5764 err_req_irq:
5765         ixgbe_free_all_rx_resources(adapter);
5766         if (hw->phy.ops.set_phy_power && !adapter->wol)
5767                 hw->phy.ops.set_phy_power(&adapter->hw, false);
5768 err_setup_rx:
5769         ixgbe_free_all_tx_resources(adapter);
5770 err_setup_tx:
5771         ixgbe_reset(adapter);
5772
5773         return err;
5774 }
5775
5776 static void ixgbe_close_suspend(struct ixgbe_adapter *adapter)
5777 {
5778         ixgbe_ptp_suspend(adapter);
5779
5780         ixgbe_down(adapter);
5781         ixgbe_free_irq(adapter);
5782
5783         ixgbe_free_all_tx_resources(adapter);
5784         ixgbe_free_all_rx_resources(adapter);
5785 }
5786
5787 /**
5788  * ixgbe_close - Disables a network interface
5789  * @netdev: network interface device structure
5790  *
5791  * Returns 0, this is not allowed to fail
5792  *
5793  * The close entry point is called when an interface is de-activated
5794  * by the OS.  The hardware is still under the drivers control, but
5795  * needs to be disabled.  A global MAC reset is issued to stop the
5796  * hardware, and all transmit and receive resources are freed.
5797  **/
5798 static int ixgbe_close(struct net_device *netdev)
5799 {
5800         struct ixgbe_adapter *adapter = netdev_priv(netdev);
5801
5802         ixgbe_ptp_stop(adapter);
5803
5804         ixgbe_close_suspend(adapter);
5805
5806         ixgbe_fdir_filter_exit(adapter);
5807
5808         ixgbe_release_hw_control(adapter);
5809
5810         return 0;
5811 }
5812
5813 #ifdef CONFIG_PM
5814 static int ixgbe_resume(struct pci_dev *pdev)
5815 {
5816         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
5817         struct net_device *netdev = adapter->netdev;
5818         u32 err;
5819
5820         adapter->hw.hw_addr = adapter->io_addr;
5821         pci_set_power_state(pdev, PCI_D0);
5822         pci_restore_state(pdev);
5823         /*
5824          * pci_restore_state clears dev->state_saved so call
5825          * pci_save_state to restore it.
5826          */
5827         pci_save_state(pdev);
5828
5829         err = pci_enable_device_mem(pdev);
5830         if (err) {
5831                 e_dev_err("Cannot enable PCI device from suspend\n");
5832                 return err;
5833         }
5834         smp_mb__before_atomic();
5835         clear_bit(__IXGBE_DISABLED, &adapter->state);
5836         pci_set_master(pdev);
5837
5838         pci_wake_from_d3(pdev, false);
5839
5840         ixgbe_reset(adapter);
5841
5842         IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
5843
5844         rtnl_lock();
5845         err = ixgbe_init_interrupt_scheme(adapter);
5846         if (!err && netif_running(netdev))
5847                 err = ixgbe_open(netdev);
5848
5849         rtnl_unlock();
5850
5851         if (err)
5852                 return err;
5853
5854         netif_device_attach(netdev);
5855
5856         return 0;
5857 }
5858 #endif /* CONFIG_PM */
5859
5860 static int __ixgbe_shutdown(struct pci_dev *pdev, bool *enable_wake)
5861 {
5862         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
5863         struct net_device *netdev = adapter->netdev;
5864         struct ixgbe_hw *hw = &adapter->hw;
5865         u32 ctrl, fctrl;
5866         u32 wufc = adapter->wol;
5867 #ifdef CONFIG_PM
5868         int retval = 0;
5869 #endif
5870
5871         netif_device_detach(netdev);
5872
5873         rtnl_lock();
5874         if (netif_running(netdev))
5875                 ixgbe_close_suspend(adapter);
5876         rtnl_unlock();
5877
5878         ixgbe_clear_interrupt_scheme(adapter);
5879
5880 #ifdef CONFIG_PM
5881         retval = pci_save_state(pdev);
5882         if (retval)
5883                 return retval;
5884
5885 #endif
5886         if (hw->mac.ops.stop_link_on_d3)
5887                 hw->mac.ops.stop_link_on_d3(hw);
5888
5889         if (wufc) {
5890                 ixgbe_set_rx_mode(netdev);
5891
5892                 /* enable the optics for 82599 SFP+ fiber as we can WoL */
5893                 if (hw->mac.ops.enable_tx_laser)
5894                         hw->mac.ops.enable_tx_laser(hw);
5895
5896                 /* turn on all-multi mode if wake on multicast is enabled */
5897                 if (wufc & IXGBE_WUFC_MC) {
5898                         fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
5899                         fctrl |= IXGBE_FCTRL_MPE;
5900                         IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
5901                 }
5902
5903                 ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL);
5904                 ctrl |= IXGBE_CTRL_GIO_DIS;
5905                 IXGBE_WRITE_REG(hw, IXGBE_CTRL, ctrl);
5906
5907                 IXGBE_WRITE_REG(hw, IXGBE_WUFC, wufc);
5908         } else {
5909                 IXGBE_WRITE_REG(hw, IXGBE_WUC, 0);
5910                 IXGBE_WRITE_REG(hw, IXGBE_WUFC, 0);
5911         }
5912
5913         switch (hw->mac.type) {
5914         case ixgbe_mac_82598EB:
5915                 pci_wake_from_d3(pdev, false);
5916                 break;
5917         case ixgbe_mac_82599EB:
5918         case ixgbe_mac_X540:
5919         case ixgbe_mac_X550:
5920         case ixgbe_mac_X550EM_x:
5921                 pci_wake_from_d3(pdev, !!wufc);
5922                 break;
5923         default:
5924                 break;
5925         }
5926
5927         *enable_wake = !!wufc;
5928         if (hw->phy.ops.set_phy_power && !*enable_wake)
5929                 hw->phy.ops.set_phy_power(hw, false);
5930
5931         ixgbe_release_hw_control(adapter);
5932
5933         if (!test_and_set_bit(__IXGBE_DISABLED, &adapter->state))
5934                 pci_disable_device(pdev);
5935
5936         return 0;
5937 }
5938
5939 #ifdef CONFIG_PM
5940 static int ixgbe_suspend(struct pci_dev *pdev, pm_message_t state)
5941 {
5942         int retval;
5943         bool wake;
5944
5945         retval = __ixgbe_shutdown(pdev, &wake);
5946         if (retval)
5947                 return retval;
5948
5949         if (wake) {
5950                 pci_prepare_to_sleep(pdev);
5951         } else {
5952                 pci_wake_from_d3(pdev, false);
5953                 pci_set_power_state(pdev, PCI_D3hot);
5954         }
5955
5956         return 0;
5957 }
5958 #endif /* CONFIG_PM */
5959
5960 static void ixgbe_shutdown(struct pci_dev *pdev)
5961 {
5962         bool wake;
5963
5964         __ixgbe_shutdown(pdev, &wake);
5965
5966         if (system_state == SYSTEM_POWER_OFF) {
5967                 pci_wake_from_d3(pdev, wake);
5968                 pci_set_power_state(pdev, PCI_D3hot);
5969         }
5970 }
5971
5972 /**
5973  * ixgbe_update_stats - Update the board statistics counters.
5974  * @adapter: board private structure
5975  **/
5976 void ixgbe_update_stats(struct ixgbe_adapter *adapter)
5977 {
5978         struct net_device *netdev = adapter->netdev;
5979         struct ixgbe_hw *hw = &adapter->hw;
5980         struct ixgbe_hw_stats *hwstats = &adapter->stats;
5981         u64 total_mpc = 0;
5982         u32 i, missed_rx = 0, mpc, bprc, lxon, lxoff, xon_off_tot;
5983         u64 non_eop_descs = 0, restart_queue = 0, tx_busy = 0;
5984         u64 alloc_rx_page_failed = 0, alloc_rx_buff_failed = 0;
5985         u64 bytes = 0, packets = 0, hw_csum_rx_error = 0;
5986
5987         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
5988             test_bit(__IXGBE_RESETTING, &adapter->state))
5989                 return;
5990
5991         if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) {
5992                 u64 rsc_count = 0;
5993                 u64 rsc_flush = 0;
5994                 for (i = 0; i < adapter->num_rx_queues; i++) {
5995                         rsc_count += adapter->rx_ring[i]->rx_stats.rsc_count;
5996                         rsc_flush += adapter->rx_ring[i]->rx_stats.rsc_flush;
5997                 }
5998                 adapter->rsc_total_count = rsc_count;
5999                 adapter->rsc_total_flush = rsc_flush;
6000         }
6001
6002         for (i = 0; i < adapter->num_rx_queues; i++) {
6003                 struct ixgbe_ring *rx_ring = adapter->rx_ring[i];
6004                 non_eop_descs += rx_ring->rx_stats.non_eop_descs;
6005                 alloc_rx_page_failed += rx_ring->rx_stats.alloc_rx_page_failed;
6006                 alloc_rx_buff_failed += rx_ring->rx_stats.alloc_rx_buff_failed;
6007                 hw_csum_rx_error += rx_ring->rx_stats.csum_err;
6008                 bytes += rx_ring->stats.bytes;
6009                 packets += rx_ring->stats.packets;
6010         }
6011         adapter->non_eop_descs = non_eop_descs;
6012         adapter->alloc_rx_page_failed = alloc_rx_page_failed;
6013         adapter->alloc_rx_buff_failed = alloc_rx_buff_failed;
6014         adapter->hw_csum_rx_error = hw_csum_rx_error;
6015         netdev->stats.rx_bytes = bytes;
6016         netdev->stats.rx_packets = packets;
6017
6018         bytes = 0;
6019         packets = 0;
6020         /* gather some stats to the adapter struct that are per queue */
6021         for (i = 0; i < adapter->num_tx_queues; i++) {
6022                 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
6023                 restart_queue += tx_ring->tx_stats.restart_queue;
6024                 tx_busy += tx_ring->tx_stats.tx_busy;
6025                 bytes += tx_ring->stats.bytes;
6026                 packets += tx_ring->stats.packets;
6027         }
6028         adapter->restart_queue = restart_queue;
6029         adapter->tx_busy = tx_busy;
6030         netdev->stats.tx_bytes = bytes;
6031         netdev->stats.tx_packets = packets;
6032
6033         hwstats->crcerrs += IXGBE_READ_REG(hw, IXGBE_CRCERRS);
6034
6035         /* 8 register reads */
6036         for (i = 0; i < 8; i++) {
6037                 /* for packet buffers not used, the register should read 0 */
6038                 mpc = IXGBE_READ_REG(hw, IXGBE_MPC(i));
6039                 missed_rx += mpc;
6040                 hwstats->mpc[i] += mpc;
6041                 total_mpc += hwstats->mpc[i];
6042                 hwstats->pxontxc[i] += IXGBE_READ_REG(hw, IXGBE_PXONTXC(i));
6043                 hwstats->pxofftxc[i] += IXGBE_READ_REG(hw, IXGBE_PXOFFTXC(i));
6044                 switch (hw->mac.type) {
6045                 case ixgbe_mac_82598EB:
6046                         hwstats->rnbc[i] += IXGBE_READ_REG(hw, IXGBE_RNBC(i));
6047                         hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC(i));
6048                         hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC(i));
6049                         hwstats->pxonrxc[i] +=
6050                                 IXGBE_READ_REG(hw, IXGBE_PXONRXC(i));
6051                         break;
6052                 case ixgbe_mac_82599EB:
6053                 case ixgbe_mac_X540:
6054                 case ixgbe_mac_X550:
6055                 case ixgbe_mac_X550EM_x:
6056                         hwstats->pxonrxc[i] +=
6057                                 IXGBE_READ_REG(hw, IXGBE_PXONRXCNT(i));
6058                         break;
6059                 default:
6060                         break;
6061                 }
6062         }
6063
6064         /*16 register reads */
6065         for (i = 0; i < 16; i++) {
6066                 hwstats->qptc[i] += IXGBE_READ_REG(hw, IXGBE_QPTC(i));
6067                 hwstats->qprc[i] += IXGBE_READ_REG(hw, IXGBE_QPRC(i));
6068                 if ((hw->mac.type == ixgbe_mac_82599EB) ||
6069                     (hw->mac.type == ixgbe_mac_X540) ||
6070                     (hw->mac.type == ixgbe_mac_X550) ||
6071                     (hw->mac.type == ixgbe_mac_X550EM_x)) {
6072                         hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC_L(i));
6073                         IXGBE_READ_REG(hw, IXGBE_QBTC_H(i)); /* to clear */
6074                         hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC_L(i));
6075                         IXGBE_READ_REG(hw, IXGBE_QBRC_H(i)); /* to clear */
6076                 }
6077         }
6078
6079         hwstats->gprc += IXGBE_READ_REG(hw, IXGBE_GPRC);
6080         /* work around hardware counting issue */
6081         hwstats->gprc -= missed_rx;
6082
6083         ixgbe_update_xoff_received(adapter);
6084
6085         /* 82598 hardware only has a 32 bit counter in the high register */
6086         switch (hw->mac.type) {
6087         case ixgbe_mac_82598EB:
6088                 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXC);
6089                 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCH);
6090                 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCH);
6091                 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORH);
6092                 break;
6093         case ixgbe_mac_X540:
6094         case ixgbe_mac_X550:
6095         case ixgbe_mac_X550EM_x:
6096                 /* OS2BMC stats are X540 and later */
6097                 hwstats->o2bgptc += IXGBE_READ_REG(hw, IXGBE_O2BGPTC);
6098                 hwstats->o2bspc += IXGBE_READ_REG(hw, IXGBE_O2BSPC);
6099                 hwstats->b2ospc += IXGBE_READ_REG(hw, IXGBE_B2OSPC);
6100                 hwstats->b2ogprc += IXGBE_READ_REG(hw, IXGBE_B2OGPRC);
6101         case ixgbe_mac_82599EB:
6102                 for (i = 0; i < 16; i++)
6103                         adapter->hw_rx_no_dma_resources +=
6104                                              IXGBE_READ_REG(hw, IXGBE_QPRDC(i));
6105                 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCL);
6106                 IXGBE_READ_REG(hw, IXGBE_GORCH); /* to clear */
6107                 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCL);
6108                 IXGBE_READ_REG(hw, IXGBE_GOTCH); /* to clear */
6109                 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORL);
6110                 IXGBE_READ_REG(hw, IXGBE_TORH); /* to clear */
6111                 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXCNT);
6112                 hwstats->fdirmatch += IXGBE_READ_REG(hw, IXGBE_FDIRMATCH);
6113                 hwstats->fdirmiss += IXGBE_READ_REG(hw, IXGBE_FDIRMISS);
6114 #ifdef IXGBE_FCOE
6115                 hwstats->fccrc += IXGBE_READ_REG(hw, IXGBE_FCCRC);
6116                 hwstats->fcoerpdc += IXGBE_READ_REG(hw, IXGBE_FCOERPDC);
6117                 hwstats->fcoeprc += IXGBE_READ_REG(hw, IXGBE_FCOEPRC);
6118                 hwstats->fcoeptc += IXGBE_READ_REG(hw, IXGBE_FCOEPTC);
6119                 hwstats->fcoedwrc += IXGBE_READ_REG(hw, IXGBE_FCOEDWRC);
6120                 hwstats->fcoedwtc += IXGBE_READ_REG(hw, IXGBE_FCOEDWTC);
6121                 /* Add up per cpu counters for total ddp aloc fail */
6122                 if (adapter->fcoe.ddp_pool) {
6123                         struct ixgbe_fcoe *fcoe = &adapter->fcoe;
6124                         struct ixgbe_fcoe_ddp_pool *ddp_pool;
6125                         unsigned int cpu;
6126                         u64 noddp = 0, noddp_ext_buff = 0;
6127                         for_each_possible_cpu(cpu) {
6128                                 ddp_pool = per_cpu_ptr(fcoe->ddp_pool, cpu);
6129                                 noddp += ddp_pool->noddp;
6130                                 noddp_ext_buff += ddp_pool->noddp_ext_buff;
6131                         }
6132                         hwstats->fcoe_noddp = noddp;
6133                         hwstats->fcoe_noddp_ext_buff = noddp_ext_buff;
6134                 }
6135 #endif /* IXGBE_FCOE */
6136                 break;
6137         default:
6138                 break;
6139         }
6140         bprc = IXGBE_READ_REG(hw, IXGBE_BPRC);
6141         hwstats->bprc += bprc;
6142         hwstats->mprc += IXGBE_READ_REG(hw, IXGBE_MPRC);
6143         if (hw->mac.type == ixgbe_mac_82598EB)
6144                 hwstats->mprc -= bprc;
6145         hwstats->roc += IXGBE_READ_REG(hw, IXGBE_ROC);
6146         hwstats->prc64 += IXGBE_READ_REG(hw, IXGBE_PRC64);
6147         hwstats->prc127 += IXGBE_READ_REG(hw, IXGBE_PRC127);
6148         hwstats->prc255 += IXGBE_READ_REG(hw, IXGBE_PRC255);
6149         hwstats->prc511 += IXGBE_READ_REG(hw, IXGBE_PRC511);
6150         hwstats->prc1023 += IXGBE_READ_REG(hw, IXGBE_PRC1023);
6151         hwstats->prc1522 += IXGBE_READ_REG(hw, IXGBE_PRC1522);
6152         hwstats->rlec += IXGBE_READ_REG(hw, IXGBE_RLEC);
6153         lxon = IXGBE_READ_REG(hw, IXGBE_LXONTXC);
6154         hwstats->lxontxc += lxon;
6155         lxoff = IXGBE_READ_REG(hw, IXGBE_LXOFFTXC);
6156         hwstats->lxofftxc += lxoff;
6157         hwstats->gptc += IXGBE_READ_REG(hw, IXGBE_GPTC);
6158         hwstats->mptc += IXGBE_READ_REG(hw, IXGBE_MPTC);
6159         /*
6160          * 82598 errata - tx of flow control packets is included in tx counters
6161          */
6162         xon_off_tot = lxon + lxoff;
6163         hwstats->gptc -= xon_off_tot;
6164         hwstats->mptc -= xon_off_tot;
6165         hwstats->gotc -= (xon_off_tot * (ETH_ZLEN + ETH_FCS_LEN));
6166         hwstats->ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
6167         hwstats->rfc += IXGBE_READ_REG(hw, IXGBE_RFC);
6168         hwstats->rjc += IXGBE_READ_REG(hw, IXGBE_RJC);
6169         hwstats->tpr += IXGBE_READ_REG(hw, IXGBE_TPR);
6170         hwstats->ptc64 += IXGBE_READ_REG(hw, IXGBE_PTC64);
6171         hwstats->ptc64 -= xon_off_tot;
6172         hwstats->ptc127 += IXGBE_READ_REG(hw, IXGBE_PTC127);
6173         hwstats->ptc255 += IXGBE_READ_REG(hw, IXGBE_PTC255);
6174         hwstats->ptc511 += IXGBE_READ_REG(hw, IXGBE_PTC511);
6175         hwstats->ptc1023 += IXGBE_READ_REG(hw, IXGBE_PTC1023);
6176         hwstats->ptc1522 += IXGBE_READ_REG(hw, IXGBE_PTC1522);
6177         hwstats->bptc += IXGBE_READ_REG(hw, IXGBE_BPTC);
6178
6179         /* Fill out the OS statistics structure */
6180         netdev->stats.multicast = hwstats->mprc;
6181
6182         /* Rx Errors */
6183         netdev->stats.rx_errors = hwstats->crcerrs + hwstats->rlec;
6184         netdev->stats.rx_dropped = 0;
6185         netdev->stats.rx_length_errors = hwstats->rlec;
6186         netdev->stats.rx_crc_errors = hwstats->crcerrs;
6187         netdev->stats.rx_missed_errors = total_mpc;
6188 }
6189
6190 /**
6191  * ixgbe_fdir_reinit_subtask - worker thread to reinit FDIR filter table
6192  * @adapter: pointer to the device adapter structure
6193  **/
6194 static void ixgbe_fdir_reinit_subtask(struct ixgbe_adapter *adapter)
6195 {
6196         struct ixgbe_hw *hw = &adapter->hw;
6197         int i;
6198
6199         if (!(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT))
6200                 return;
6201
6202         adapter->flags2 &= ~IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
6203
6204         /* if interface is down do nothing */
6205         if (test_bit(__IXGBE_DOWN, &adapter->state))
6206                 return;
6207
6208         /* do nothing if we are not using signature filters */
6209         if (!(adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE))
6210                 return;
6211
6212         adapter->fdir_overflow++;
6213
6214         if (ixgbe_reinit_fdir_tables_82599(hw) == 0) {
6215                 for (i = 0; i < adapter->num_tx_queues; i++)
6216                         set_bit(__IXGBE_TX_FDIR_INIT_DONE,
6217                                 &(adapter->tx_ring[i]->state));
6218                 /* re-enable flow director interrupts */
6219                 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_FLOW_DIR);
6220         } else {
6221                 e_err(probe, "failed to finish FDIR re-initialization, "
6222                       "ignored adding FDIR ATR filters\n");
6223         }
6224 }
6225
6226 /**
6227  * ixgbe_check_hang_subtask - check for hung queues and dropped interrupts
6228  * @adapter: pointer to the device adapter structure
6229  *
6230  * This function serves two purposes.  First it strobes the interrupt lines
6231  * in order to make certain interrupts are occurring.  Secondly it sets the
6232  * bits needed to check for TX hangs.  As a result we should immediately
6233  * determine if a hang has occurred.
6234  */
6235 static void ixgbe_check_hang_subtask(struct ixgbe_adapter *adapter)
6236 {
6237         struct ixgbe_hw *hw = &adapter->hw;
6238         u64 eics = 0;
6239         int i;
6240
6241         /* If we're down, removing or resetting, just bail */
6242         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
6243             test_bit(__IXGBE_REMOVING, &adapter->state) ||
6244             test_bit(__IXGBE_RESETTING, &adapter->state))
6245                 return;
6246
6247         /* Force detection of hung controller */
6248         if (netif_carrier_ok(adapter->netdev)) {
6249                 for (i = 0; i < adapter->num_tx_queues; i++)
6250                         set_check_for_tx_hang(adapter->tx_ring[i]);
6251         }
6252
6253         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
6254                 /*
6255                  * for legacy and MSI interrupts don't set any bits
6256                  * that are enabled for EIAM, because this operation
6257                  * would set *both* EIMS and EICS for any bit in EIAM
6258                  */
6259                 IXGBE_WRITE_REG(hw, IXGBE_EICS,
6260                         (IXGBE_EICS_TCP_TIMER | IXGBE_EICS_OTHER));
6261         } else {
6262                 /* get one bit for every active tx/rx interrupt vector */
6263                 for (i = 0; i < adapter->num_q_vectors; i++) {
6264                         struct ixgbe_q_vector *qv = adapter->q_vector[i];
6265                         if (qv->rx.ring || qv->tx.ring)
6266                                 eics |= ((u64)1 << i);
6267                 }
6268         }
6269
6270         /* Cause software interrupt to ensure rings are cleaned */
6271         ixgbe_irq_rearm_queues(adapter, eics);
6272 }
6273
6274 /**
6275  * ixgbe_watchdog_update_link - update the link status
6276  * @adapter: pointer to the device adapter structure
6277  * @link_speed: pointer to a u32 to store the link_speed
6278  **/
6279 static void ixgbe_watchdog_update_link(struct ixgbe_adapter *adapter)
6280 {
6281         struct ixgbe_hw *hw = &adapter->hw;
6282         u32 link_speed = adapter->link_speed;
6283         bool link_up = adapter->link_up;
6284         bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
6285
6286         if (!(adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE))
6287                 return;
6288
6289         if (hw->mac.ops.check_link) {
6290                 hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
6291         } else {
6292                 /* always assume link is up, if no check link function */
6293                 link_speed = IXGBE_LINK_SPEED_10GB_FULL;
6294                 link_up = true;
6295         }
6296
6297         if (adapter->ixgbe_ieee_pfc)
6298                 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
6299
6300         if (link_up && !((adapter->flags & IXGBE_FLAG_DCB_ENABLED) && pfc_en)) {
6301                 hw->mac.ops.fc_enable(hw);
6302                 ixgbe_set_rx_drop_en(adapter);
6303         }
6304
6305         if (link_up ||
6306             time_after(jiffies, (adapter->link_check_timeout +
6307                                  IXGBE_TRY_LINK_TIMEOUT))) {
6308                 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
6309                 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMC_LSC);
6310                 IXGBE_WRITE_FLUSH(hw);
6311         }
6312
6313         adapter->link_up = link_up;
6314         adapter->link_speed = link_speed;
6315 }
6316
6317 static void ixgbe_update_default_up(struct ixgbe_adapter *adapter)
6318 {
6319 #ifdef CONFIG_IXGBE_DCB
6320         struct net_device *netdev = adapter->netdev;
6321         struct dcb_app app = {
6322                               .selector = IEEE_8021QAZ_APP_SEL_ETHERTYPE,
6323                               .protocol = 0,
6324                              };
6325         u8 up = 0;
6326
6327         if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_IEEE)
6328                 up = dcb_ieee_getapp_mask(netdev, &app);
6329
6330         adapter->default_up = (up > 1) ? (ffs(up) - 1) : 0;
6331 #endif
6332 }
6333
6334 /**
6335  * ixgbe_watchdog_link_is_up - update netif_carrier status and
6336  *                             print link up message
6337  * @adapter: pointer to the device adapter structure
6338  **/
6339 static void ixgbe_watchdog_link_is_up(struct ixgbe_adapter *adapter)
6340 {
6341         struct net_device *netdev = adapter->netdev;
6342         struct ixgbe_hw *hw = &adapter->hw;
6343         struct net_device *upper;
6344         struct list_head *iter;
6345         u32 link_speed = adapter->link_speed;
6346         bool flow_rx, flow_tx;
6347
6348         /* only continue if link was previously down */
6349         if (netif_carrier_ok(netdev))
6350                 return;
6351
6352         adapter->flags2 &= ~IXGBE_FLAG2_SEARCH_FOR_SFP;
6353
6354         switch (hw->mac.type) {
6355         case ixgbe_mac_82598EB: {
6356                 u32 frctl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
6357                 u32 rmcs = IXGBE_READ_REG(hw, IXGBE_RMCS);
6358                 flow_rx = !!(frctl & IXGBE_FCTRL_RFCE);
6359                 flow_tx = !!(rmcs & IXGBE_RMCS_TFCE_802_3X);
6360         }
6361                 break;
6362         case ixgbe_mac_X540:
6363         case ixgbe_mac_X550:
6364         case ixgbe_mac_X550EM_x:
6365         case ixgbe_mac_82599EB: {
6366                 u32 mflcn = IXGBE_READ_REG(hw, IXGBE_MFLCN);
6367                 u32 fccfg = IXGBE_READ_REG(hw, IXGBE_FCCFG);
6368                 flow_rx = !!(mflcn & IXGBE_MFLCN_RFCE);
6369                 flow_tx = !!(fccfg & IXGBE_FCCFG_TFCE_802_3X);
6370         }
6371                 break;
6372         default:
6373                 flow_tx = false;
6374                 flow_rx = false;
6375                 break;
6376         }
6377
6378         adapter->last_rx_ptp_check = jiffies;
6379
6380         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
6381                 ixgbe_ptp_start_cyclecounter(adapter);
6382
6383         e_info(drv, "NIC Link is Up %s, Flow Control: %s\n",
6384                (link_speed == IXGBE_LINK_SPEED_10GB_FULL ?
6385                "10 Gbps" :
6386                (link_speed == IXGBE_LINK_SPEED_1GB_FULL ?
6387                "1 Gbps" :
6388                (link_speed == IXGBE_LINK_SPEED_100_FULL ?
6389                "100 Mbps" :
6390                "unknown speed"))),
6391                ((flow_rx && flow_tx) ? "RX/TX" :
6392                (flow_rx ? "RX" :
6393                (flow_tx ? "TX" : "None"))));
6394
6395         netif_carrier_on(netdev);
6396         ixgbe_check_vf_rate_limit(adapter);
6397
6398         /* enable transmits */
6399         netif_tx_wake_all_queues(adapter->netdev);
6400
6401         /* enable any upper devices */
6402         rtnl_lock();
6403         netdev_for_each_all_upper_dev_rcu(adapter->netdev, upper, iter) {
6404                 if (netif_is_macvlan(upper)) {
6405                         struct macvlan_dev *vlan = netdev_priv(upper);
6406
6407                         if (vlan->fwd_priv)
6408                                 netif_tx_wake_all_queues(upper);
6409                 }
6410         }
6411         rtnl_unlock();
6412
6413         /* update the default user priority for VFs */
6414         ixgbe_update_default_up(adapter);
6415
6416         /* ping all the active vfs to let them know link has changed */
6417         ixgbe_ping_all_vfs(adapter);
6418 }
6419
6420 /**
6421  * ixgbe_watchdog_link_is_down - update netif_carrier status and
6422  *                               print link down message
6423  * @adapter: pointer to the adapter structure
6424  **/
6425 static void ixgbe_watchdog_link_is_down(struct ixgbe_adapter *adapter)
6426 {
6427         struct net_device *netdev = adapter->netdev;
6428         struct ixgbe_hw *hw = &adapter->hw;
6429
6430         adapter->link_up = false;
6431         adapter->link_speed = 0;
6432
6433         /* only continue if link was up previously */
6434         if (!netif_carrier_ok(netdev))
6435                 return;
6436
6437         /* poll for SFP+ cable when link is down */
6438         if (ixgbe_is_sfp(hw) && hw->mac.type == ixgbe_mac_82598EB)
6439                 adapter->flags2 |= IXGBE_FLAG2_SEARCH_FOR_SFP;
6440
6441         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
6442                 ixgbe_ptp_start_cyclecounter(adapter);
6443
6444         e_info(drv, "NIC Link is Down\n");
6445         netif_carrier_off(netdev);
6446
6447         /* ping all the active vfs to let them know link has changed */
6448         ixgbe_ping_all_vfs(adapter);
6449 }
6450
6451 static bool ixgbe_ring_tx_pending(struct ixgbe_adapter *adapter)
6452 {
6453         int i;
6454
6455         for (i = 0; i < adapter->num_tx_queues; i++) {
6456                 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
6457
6458                 if (tx_ring->next_to_use != tx_ring->next_to_clean)
6459                         return true;
6460         }
6461
6462         return false;
6463 }
6464
6465 static bool ixgbe_vf_tx_pending(struct ixgbe_adapter *adapter)
6466 {
6467         struct ixgbe_hw *hw = &adapter->hw;
6468         struct ixgbe_ring_feature *vmdq = &adapter->ring_feature[RING_F_VMDQ];
6469         u32 q_per_pool = __ALIGN_MASK(1, ~vmdq->mask);
6470
6471         int i, j;
6472
6473         if (!adapter->num_vfs)
6474                 return false;
6475
6476         /* resetting the PF is only needed for MAC before X550 */
6477         if (hw->mac.type >= ixgbe_mac_X550)
6478                 return false;
6479
6480         for (i = 0; i < adapter->num_vfs; i++) {
6481                 for (j = 0; j < q_per_pool; j++) {
6482                         u32 h, t;
6483
6484                         h = IXGBE_READ_REG(hw, IXGBE_PVFTDHN(q_per_pool, i, j));
6485                         t = IXGBE_READ_REG(hw, IXGBE_PVFTDTN(q_per_pool, i, j));
6486
6487                         if (h != t)
6488                                 return true;
6489                 }
6490         }
6491
6492         return false;
6493 }
6494
6495 /**
6496  * ixgbe_watchdog_flush_tx - flush queues on link down
6497  * @adapter: pointer to the device adapter structure
6498  **/
6499 static void ixgbe_watchdog_flush_tx(struct ixgbe_adapter *adapter)
6500 {
6501         if (!netif_carrier_ok(adapter->netdev)) {
6502                 if (ixgbe_ring_tx_pending(adapter) ||
6503                     ixgbe_vf_tx_pending(adapter)) {
6504                         /* We've lost link, so the controller stops DMA,
6505                          * but we've got queued Tx work that's never going
6506                          * to get done, so reset controller to flush Tx.
6507                          * (Do the reset outside of interrupt context).
6508                          */
6509                         e_warn(drv, "initiating reset to clear Tx work after link loss\n");
6510                         adapter->flags2 |= IXGBE_FLAG2_RESET_REQUESTED;
6511                 }
6512         }
6513 }
6514
6515 #ifdef CONFIG_PCI_IOV
6516 static inline void ixgbe_issue_vf_flr(struct ixgbe_adapter *adapter,
6517                                       struct pci_dev *vfdev)
6518 {
6519         if (!pci_wait_for_pending_transaction(vfdev))
6520                 e_dev_warn("Issuing VFLR with pending transactions\n");
6521
6522         e_dev_err("Issuing VFLR for VF %s\n", pci_name(vfdev));
6523         pcie_capability_set_word(vfdev, PCI_EXP_DEVCTL, PCI_EXP_DEVCTL_BCR_FLR);
6524
6525         msleep(100);
6526 }
6527
6528 static void ixgbe_check_for_bad_vf(struct ixgbe_adapter *adapter)
6529 {
6530         struct ixgbe_hw *hw = &adapter->hw;
6531         struct pci_dev *pdev = adapter->pdev;
6532         struct pci_dev *vfdev;
6533         u32 gpc;
6534         int pos;
6535         unsigned short vf_id;
6536
6537         if (!(netif_carrier_ok(adapter->netdev)))
6538                 return;
6539
6540         gpc = IXGBE_READ_REG(hw, IXGBE_TXDGPC);
6541         if (gpc) /* If incrementing then no need for the check below */
6542                 return;
6543         /* Check to see if a bad DMA write target from an errant or
6544          * malicious VF has caused a PCIe error.  If so then we can
6545          * issue a VFLR to the offending VF(s) and then resume without
6546          * requesting a full slot reset.
6547          */
6548
6549         if (!pdev)
6550                 return;
6551
6552         pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_SRIOV);
6553         if (!pos)
6554                 return;
6555
6556         /* get the device ID for the VF */
6557         pci_read_config_word(pdev, pos + PCI_SRIOV_VF_DID, &vf_id);
6558
6559         /* check status reg for all VFs owned by this PF */
6560         vfdev = pci_get_device(pdev->vendor, vf_id, NULL);
6561         while (vfdev) {
6562                 if (vfdev->is_virtfn && (vfdev->physfn == pdev)) {
6563                         u16 status_reg;
6564
6565                         pci_read_config_word(vfdev, PCI_STATUS, &status_reg);
6566                         if (status_reg & PCI_STATUS_REC_MASTER_ABORT)
6567                                 /* issue VFLR */
6568                                 ixgbe_issue_vf_flr(adapter, vfdev);
6569                 }
6570
6571                 vfdev = pci_get_device(pdev->vendor, vf_id, vfdev);
6572         }
6573 }
6574
6575 static void ixgbe_spoof_check(struct ixgbe_adapter *adapter)
6576 {
6577         u32 ssvpc;
6578
6579         /* Do not perform spoof check for 82598 or if not in IOV mode */
6580         if (adapter->hw.mac.type == ixgbe_mac_82598EB ||
6581             adapter->num_vfs == 0)
6582                 return;
6583
6584         ssvpc = IXGBE_READ_REG(&adapter->hw, IXGBE_SSVPC);
6585
6586         /*
6587          * ssvpc register is cleared on read, if zero then no
6588          * spoofed packets in the last interval.
6589          */
6590         if (!ssvpc)
6591                 return;
6592
6593         e_warn(drv, "%u Spoofed packets detected\n", ssvpc);
6594 }
6595 #else
6596 static void ixgbe_spoof_check(struct ixgbe_adapter __always_unused *adapter)
6597 {
6598 }
6599
6600 static void
6601 ixgbe_check_for_bad_vf(struct ixgbe_adapter __always_unused *adapter)
6602 {
6603 }
6604 #endif /* CONFIG_PCI_IOV */
6605
6606
6607 /**
6608  * ixgbe_watchdog_subtask - check and bring link up
6609  * @adapter: pointer to the device adapter structure
6610  **/
6611 static void ixgbe_watchdog_subtask(struct ixgbe_adapter *adapter)
6612 {
6613         /* if interface is down, removing or resetting, do nothing */
6614         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
6615             test_bit(__IXGBE_REMOVING, &adapter->state) ||
6616             test_bit(__IXGBE_RESETTING, &adapter->state))
6617                 return;
6618
6619         ixgbe_watchdog_update_link(adapter);
6620
6621         if (adapter->link_up)
6622                 ixgbe_watchdog_link_is_up(adapter);
6623         else
6624                 ixgbe_watchdog_link_is_down(adapter);
6625
6626         ixgbe_check_for_bad_vf(adapter);
6627         ixgbe_spoof_check(adapter);
6628         ixgbe_update_stats(adapter);
6629
6630         ixgbe_watchdog_flush_tx(adapter);
6631 }
6632
6633 /**
6634  * ixgbe_sfp_detection_subtask - poll for SFP+ cable
6635  * @adapter: the ixgbe adapter structure
6636  **/
6637 static void ixgbe_sfp_detection_subtask(struct ixgbe_adapter *adapter)
6638 {
6639         struct ixgbe_hw *hw = &adapter->hw;
6640         s32 err;
6641
6642         /* not searching for SFP so there is nothing to do here */
6643         if (!(adapter->flags2 & IXGBE_FLAG2_SEARCH_FOR_SFP) &&
6644             !(adapter->flags2 & IXGBE_FLAG2_SFP_NEEDS_RESET))
6645                 return;
6646
6647         /* someone else is in init, wait until next service event */
6648         if (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
6649                 return;
6650
6651         err = hw->phy.ops.identify_sfp(hw);
6652         if (err == IXGBE_ERR_SFP_NOT_SUPPORTED)
6653                 goto sfp_out;
6654
6655         if (err == IXGBE_ERR_SFP_NOT_PRESENT) {
6656                 /* If no cable is present, then we need to reset
6657                  * the next time we find a good cable. */
6658                 adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
6659         }
6660
6661         /* exit on error */
6662         if (err)
6663                 goto sfp_out;
6664
6665         /* exit if reset not needed */
6666         if (!(adapter->flags2 & IXGBE_FLAG2_SFP_NEEDS_RESET))
6667                 goto sfp_out;
6668
6669         adapter->flags2 &= ~IXGBE_FLAG2_SFP_NEEDS_RESET;
6670
6671         /*
6672          * A module may be identified correctly, but the EEPROM may not have
6673          * support for that module.  setup_sfp() will fail in that case, so
6674          * we should not allow that module to load.
6675          */
6676         if (hw->mac.type == ixgbe_mac_82598EB)
6677                 err = hw->phy.ops.reset(hw);
6678         else
6679                 err = hw->mac.ops.setup_sfp(hw);
6680
6681         if (err == IXGBE_ERR_SFP_NOT_SUPPORTED)
6682                 goto sfp_out;
6683
6684         adapter->flags |= IXGBE_FLAG_NEED_LINK_CONFIG;
6685         e_info(probe, "detected SFP+: %d\n", hw->phy.sfp_type);
6686
6687 sfp_out:
6688         clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
6689
6690         if ((err == IXGBE_ERR_SFP_NOT_SUPPORTED) &&
6691             (adapter->netdev->reg_state == NETREG_REGISTERED)) {
6692                 e_dev_err("failed to initialize because an unsupported "
6693                           "SFP+ module type was detected.\n");
6694                 e_dev_err("Reload the driver after installing a "
6695                           "supported module.\n");
6696                 unregister_netdev(adapter->netdev);
6697         }
6698 }
6699
6700 /**
6701  * ixgbe_sfp_link_config_subtask - set up link SFP after module install
6702  * @adapter: the ixgbe adapter structure
6703  **/
6704 static void ixgbe_sfp_link_config_subtask(struct ixgbe_adapter *adapter)
6705 {
6706         struct ixgbe_hw *hw = &adapter->hw;
6707         u32 speed;
6708         bool autoneg = false;
6709
6710         if (!(adapter->flags & IXGBE_FLAG_NEED_LINK_CONFIG))
6711                 return;
6712
6713         /* someone else is in init, wait until next service event */
6714         if (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
6715                 return;
6716
6717         adapter->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG;
6718
6719         speed = hw->phy.autoneg_advertised;
6720         if ((!speed) && (hw->mac.ops.get_link_capabilities)) {
6721                 hw->mac.ops.get_link_capabilities(hw, &speed, &autoneg);
6722
6723                 /* setup the highest link when no autoneg */
6724                 if (!autoneg) {
6725                         if (speed & IXGBE_LINK_SPEED_10GB_FULL)
6726                                 speed = IXGBE_LINK_SPEED_10GB_FULL;
6727                 }
6728         }
6729
6730         if (hw->mac.ops.setup_link)
6731                 hw->mac.ops.setup_link(hw, speed, true);
6732
6733         adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
6734         adapter->link_check_timeout = jiffies;
6735         clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
6736 }
6737
6738 /**
6739  * ixgbe_service_timer - Timer Call-back
6740  * @data: pointer to adapter cast into an unsigned long
6741  **/
6742 static void ixgbe_service_timer(unsigned long data)
6743 {
6744         struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data;
6745         unsigned long next_event_offset;
6746
6747         /* poll faster when waiting for link */
6748         if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE)
6749                 next_event_offset = HZ / 10;
6750         else
6751                 next_event_offset = HZ * 2;
6752
6753         /* Reset the timer */
6754         mod_timer(&adapter->service_timer, next_event_offset + jiffies);
6755
6756         ixgbe_service_event_schedule(adapter);
6757 }
6758
6759 static void ixgbe_phy_interrupt_subtask(struct ixgbe_adapter *adapter)
6760 {
6761         struct ixgbe_hw *hw = &adapter->hw;
6762         u32 status;
6763
6764         if (!(adapter->flags2 & IXGBE_FLAG2_PHY_INTERRUPT))
6765                 return;
6766
6767         adapter->flags2 &= ~IXGBE_FLAG2_PHY_INTERRUPT;
6768
6769         if (!hw->phy.ops.handle_lasi)
6770                 return;
6771
6772         status = hw->phy.ops.handle_lasi(&adapter->hw);
6773         if (status != IXGBE_ERR_OVERTEMP)
6774                 return;
6775
6776         e_crit(drv, "%s\n", ixgbe_overheat_msg);
6777 }
6778
6779 static void ixgbe_reset_subtask(struct ixgbe_adapter *adapter)
6780 {
6781         if (!(adapter->flags2 & IXGBE_FLAG2_RESET_REQUESTED))
6782                 return;
6783
6784         adapter->flags2 &= ~IXGBE_FLAG2_RESET_REQUESTED;
6785
6786         /* If we're already down, removing or resetting, just bail */
6787         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
6788             test_bit(__IXGBE_REMOVING, &adapter->state) ||
6789             test_bit(__IXGBE_RESETTING, &adapter->state))
6790                 return;
6791
6792         ixgbe_dump(adapter);
6793         netdev_err(adapter->netdev, "Reset adapter\n");
6794         adapter->tx_timeout_count++;
6795
6796         rtnl_lock();
6797         ixgbe_reinit_locked(adapter);
6798         rtnl_unlock();
6799 }
6800
6801 /**
6802  * ixgbe_service_task - manages and runs subtasks
6803  * @work: pointer to work_struct containing our data
6804  **/
6805 static void ixgbe_service_task(struct work_struct *work)
6806 {
6807         struct ixgbe_adapter *adapter = container_of(work,
6808                                                      struct ixgbe_adapter,
6809                                                      service_task);
6810         if (ixgbe_removed(adapter->hw.hw_addr)) {
6811                 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
6812                         rtnl_lock();
6813                         ixgbe_down(adapter);
6814                         rtnl_unlock();
6815                 }
6816                 ixgbe_service_event_complete(adapter);
6817                 return;
6818         }
6819         ixgbe_reset_subtask(adapter);
6820         ixgbe_phy_interrupt_subtask(adapter);
6821         ixgbe_sfp_detection_subtask(adapter);
6822         ixgbe_sfp_link_config_subtask(adapter);
6823         ixgbe_check_overtemp_subtask(adapter);
6824         ixgbe_watchdog_subtask(adapter);
6825         ixgbe_fdir_reinit_subtask(adapter);
6826         ixgbe_check_hang_subtask(adapter);
6827
6828         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state)) {
6829                 ixgbe_ptp_overflow_check(adapter);
6830                 ixgbe_ptp_rx_hang(adapter);
6831         }
6832
6833         ixgbe_service_event_complete(adapter);
6834 }
6835
6836 static int ixgbe_tso(struct ixgbe_ring *tx_ring,
6837                      struct ixgbe_tx_buffer *first,
6838                      u8 *hdr_len)
6839 {
6840         struct sk_buff *skb = first->skb;
6841         u32 vlan_macip_lens, type_tucmd;
6842         u32 mss_l4len_idx, l4len;
6843         int err;
6844
6845         if (skb->ip_summed != CHECKSUM_PARTIAL)
6846                 return 0;
6847
6848         if (!skb_is_gso(skb))
6849                 return 0;
6850
6851         err = skb_cow_head(skb, 0);
6852         if (err < 0)
6853                 return err;
6854
6855         /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
6856         type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP;
6857
6858         if (first->protocol == htons(ETH_P_IP)) {
6859                 struct iphdr *iph = ip_hdr(skb);
6860                 iph->tot_len = 0;
6861                 iph->check = 0;
6862                 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
6863                                                          iph->daddr, 0,
6864                                                          IPPROTO_TCP,
6865                                                          0);
6866                 type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
6867                 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
6868                                    IXGBE_TX_FLAGS_CSUM |
6869                                    IXGBE_TX_FLAGS_IPV4;
6870         } else if (skb_is_gso_v6(skb)) {
6871                 ipv6_hdr(skb)->payload_len = 0;
6872                 tcp_hdr(skb)->check =
6873                     ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
6874                                      &ipv6_hdr(skb)->daddr,
6875                                      0, IPPROTO_TCP, 0);
6876                 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
6877                                    IXGBE_TX_FLAGS_CSUM;
6878         }
6879
6880         /* compute header lengths */
6881         l4len = tcp_hdrlen(skb);
6882         *hdr_len = skb_transport_offset(skb) + l4len;
6883
6884         /* update gso size and bytecount with header size */
6885         first->gso_segs = skb_shinfo(skb)->gso_segs;
6886         first->bytecount += (first->gso_segs - 1) * *hdr_len;
6887
6888         /* mss_l4len_id: use 0 as index for TSO */
6889         mss_l4len_idx = l4len << IXGBE_ADVTXD_L4LEN_SHIFT;
6890         mss_l4len_idx |= skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT;
6891
6892         /* vlan_macip_lens: HEADLEN, MACLEN, VLAN tag */
6893         vlan_macip_lens = skb_network_header_len(skb);
6894         vlan_macip_lens |= skb_network_offset(skb) << IXGBE_ADVTXD_MACLEN_SHIFT;
6895         vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
6896
6897         ixgbe_tx_ctxtdesc(tx_ring, vlan_macip_lens, 0, type_tucmd,
6898                           mss_l4len_idx);
6899
6900         return 1;
6901 }
6902
6903 static void ixgbe_tx_csum(struct ixgbe_ring *tx_ring,
6904                           struct ixgbe_tx_buffer *first)
6905 {
6906         struct sk_buff *skb = first->skb;
6907         u32 vlan_macip_lens = 0;
6908         u32 mss_l4len_idx = 0;
6909         u32 type_tucmd = 0;
6910
6911         if (skb->ip_summed != CHECKSUM_PARTIAL) {
6912                 if (!(first->tx_flags & IXGBE_TX_FLAGS_HW_VLAN) &&
6913                     !(first->tx_flags & IXGBE_TX_FLAGS_CC))
6914                         return;
6915         } else {
6916                 u8 l4_hdr = 0;
6917                 switch (first->protocol) {
6918                 case htons(ETH_P_IP):
6919                         vlan_macip_lens |= skb_network_header_len(skb);
6920                         type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
6921                         l4_hdr = ip_hdr(skb)->protocol;
6922                         break;
6923                 case htons(ETH_P_IPV6):
6924                         vlan_macip_lens |= skb_network_header_len(skb);
6925                         l4_hdr = ipv6_hdr(skb)->nexthdr;
6926                         break;
6927                 default:
6928                         if (unlikely(net_ratelimit())) {
6929                                 dev_warn(tx_ring->dev,
6930                                  "partial checksum but proto=%x!\n",
6931                                  first->protocol);
6932                         }
6933                         break;
6934                 }
6935
6936                 switch (l4_hdr) {
6937                 case IPPROTO_TCP:
6938                         type_tucmd |= IXGBE_ADVTXD_TUCMD_L4T_TCP;
6939                         mss_l4len_idx = tcp_hdrlen(skb) <<
6940                                         IXGBE_ADVTXD_L4LEN_SHIFT;
6941                         break;
6942                 case IPPROTO_SCTP:
6943                         type_tucmd |= IXGBE_ADVTXD_TUCMD_L4T_SCTP;
6944                         mss_l4len_idx = sizeof(struct sctphdr) <<
6945                                         IXGBE_ADVTXD_L4LEN_SHIFT;
6946                         break;
6947                 case IPPROTO_UDP:
6948                         mss_l4len_idx = sizeof(struct udphdr) <<
6949                                         IXGBE_ADVTXD_L4LEN_SHIFT;
6950                         break;
6951                 default:
6952                         if (unlikely(net_ratelimit())) {
6953                                 dev_warn(tx_ring->dev,
6954                                  "partial checksum but l4 proto=%x!\n",
6955                                  l4_hdr);
6956                         }
6957                         break;
6958                 }
6959
6960                 /* update TX checksum flag */
6961                 first->tx_flags |= IXGBE_TX_FLAGS_CSUM;
6962         }
6963
6964         /* vlan_macip_lens: MACLEN, VLAN tag */
6965         vlan_macip_lens |= skb_network_offset(skb) << IXGBE_ADVTXD_MACLEN_SHIFT;
6966         vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
6967
6968         ixgbe_tx_ctxtdesc(tx_ring, vlan_macip_lens, 0,
6969                           type_tucmd, mss_l4len_idx);
6970 }
6971
6972 #define IXGBE_SET_FLAG(_input, _flag, _result) \
6973         ((_flag <= _result) ? \
6974          ((u32)(_input & _flag) * (_result / _flag)) : \
6975          ((u32)(_input & _flag) / (_flag / _result)))
6976
6977 static u32 ixgbe_tx_cmd_type(struct sk_buff *skb, u32 tx_flags)
6978 {
6979         /* set type for advanced descriptor with frame checksum insertion */
6980         u32 cmd_type = IXGBE_ADVTXD_DTYP_DATA |
6981                        IXGBE_ADVTXD_DCMD_DEXT |
6982                        IXGBE_ADVTXD_DCMD_IFCS;
6983
6984         /* set HW vlan bit if vlan is present */
6985         cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_HW_VLAN,
6986                                    IXGBE_ADVTXD_DCMD_VLE);
6987
6988         /* set segmentation enable bits for TSO/FSO */
6989         cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_TSO,
6990                                    IXGBE_ADVTXD_DCMD_TSE);
6991
6992         /* set timestamp bit if present */
6993         cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_TSTAMP,
6994                                    IXGBE_ADVTXD_MAC_TSTAMP);
6995
6996         /* insert frame checksum */
6997         cmd_type ^= IXGBE_SET_FLAG(skb->no_fcs, 1, IXGBE_ADVTXD_DCMD_IFCS);
6998
6999         return cmd_type;
7000 }
7001
7002 static void ixgbe_tx_olinfo_status(union ixgbe_adv_tx_desc *tx_desc,
7003                                    u32 tx_flags, unsigned int paylen)
7004 {
7005         u32 olinfo_status = paylen << IXGBE_ADVTXD_PAYLEN_SHIFT;
7006
7007         /* enable L4 checksum for TSO and TX checksum offload */
7008         olinfo_status |= IXGBE_SET_FLAG(tx_flags,
7009                                         IXGBE_TX_FLAGS_CSUM,
7010                                         IXGBE_ADVTXD_POPTS_TXSM);
7011
7012         /* enble IPv4 checksum for TSO */
7013         olinfo_status |= IXGBE_SET_FLAG(tx_flags,
7014                                         IXGBE_TX_FLAGS_IPV4,
7015                                         IXGBE_ADVTXD_POPTS_IXSM);
7016
7017         /*
7018          * Check Context must be set if Tx switch is enabled, which it
7019          * always is for case where virtual functions are running
7020          */
7021         olinfo_status |= IXGBE_SET_FLAG(tx_flags,
7022                                         IXGBE_TX_FLAGS_CC,
7023                                         IXGBE_ADVTXD_CC);
7024
7025         tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
7026 }
7027
7028 static int __ixgbe_maybe_stop_tx(struct ixgbe_ring *tx_ring, u16 size)
7029 {
7030         netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
7031
7032         /* Herbert's original patch had:
7033          *  smp_mb__after_netif_stop_queue();
7034          * but since that doesn't exist yet, just open code it.
7035          */
7036         smp_mb();
7037
7038         /* We need to check again in a case another CPU has just
7039          * made room available.
7040          */
7041         if (likely(ixgbe_desc_unused(tx_ring) < size))
7042                 return -EBUSY;
7043
7044         /* A reprieve! - use start_queue because it doesn't call schedule */
7045         netif_start_subqueue(tx_ring->netdev, tx_ring->queue_index);
7046         ++tx_ring->tx_stats.restart_queue;
7047         return 0;
7048 }
7049
7050 static inline int ixgbe_maybe_stop_tx(struct ixgbe_ring *tx_ring, u16 size)
7051 {
7052         if (likely(ixgbe_desc_unused(tx_ring) >= size))
7053                 return 0;
7054
7055         return __ixgbe_maybe_stop_tx(tx_ring, size);
7056 }
7057
7058 #define IXGBE_TXD_CMD (IXGBE_TXD_CMD_EOP | \
7059                        IXGBE_TXD_CMD_RS)
7060
7061 static void ixgbe_tx_map(struct ixgbe_ring *tx_ring,
7062                          struct ixgbe_tx_buffer *first,
7063                          const u8 hdr_len)
7064 {
7065         struct sk_buff *skb = first->skb;
7066         struct ixgbe_tx_buffer *tx_buffer;
7067         union ixgbe_adv_tx_desc *tx_desc;
7068         struct skb_frag_struct *frag;
7069         dma_addr_t dma;
7070         unsigned int data_len, size;
7071         u32 tx_flags = first->tx_flags;
7072         u32 cmd_type = ixgbe_tx_cmd_type(skb, tx_flags);
7073         u16 i = tx_ring->next_to_use;
7074
7075         tx_desc = IXGBE_TX_DESC(tx_ring, i);
7076
7077         ixgbe_tx_olinfo_status(tx_desc, tx_flags, skb->len - hdr_len);
7078
7079         size = skb_headlen(skb);
7080         data_len = skb->data_len;
7081
7082 #ifdef IXGBE_FCOE
7083         if (tx_flags & IXGBE_TX_FLAGS_FCOE) {
7084                 if (data_len < sizeof(struct fcoe_crc_eof)) {
7085                         size -= sizeof(struct fcoe_crc_eof) - data_len;
7086                         data_len = 0;
7087                 } else {
7088                         data_len -= sizeof(struct fcoe_crc_eof);
7089                 }
7090         }
7091
7092 #endif
7093         dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
7094
7095         tx_buffer = first;
7096
7097         for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
7098                 if (dma_mapping_error(tx_ring->dev, dma))
7099                         goto dma_error;
7100
7101                 /* record length, and DMA address */
7102                 dma_unmap_len_set(tx_buffer, len, size);
7103                 dma_unmap_addr_set(tx_buffer, dma, dma);
7104
7105                 tx_desc->read.buffer_addr = cpu_to_le64(dma);
7106
7107                 while (unlikely(size > IXGBE_MAX_DATA_PER_TXD)) {
7108                         tx_desc->read.cmd_type_len =
7109                                 cpu_to_le32(cmd_type ^ IXGBE_MAX_DATA_PER_TXD);
7110
7111                         i++;
7112                         tx_desc++;
7113                         if (i == tx_ring->count) {
7114                                 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
7115                                 i = 0;
7116                         }
7117                         tx_desc->read.olinfo_status = 0;
7118
7119                         dma += IXGBE_MAX_DATA_PER_TXD;
7120                         size -= IXGBE_MAX_DATA_PER_TXD;
7121
7122                         tx_desc->read.buffer_addr = cpu_to_le64(dma);
7123                 }
7124
7125                 if (likely(!data_len))
7126                         break;
7127
7128                 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type ^ size);
7129
7130                 i++;
7131                 tx_desc++;
7132                 if (i == tx_ring->count) {
7133                         tx_desc = IXGBE_TX_DESC(tx_ring, 0);
7134                         i = 0;
7135                 }
7136                 tx_desc->read.olinfo_status = 0;
7137
7138 #ifdef IXGBE_FCOE
7139                 size = min_t(unsigned int, data_len, skb_frag_size(frag));
7140 #else
7141                 size = skb_frag_size(frag);
7142 #endif
7143                 data_len -= size;
7144
7145                 dma = skb_frag_dma_map(tx_ring->dev, frag, 0, size,
7146                                        DMA_TO_DEVICE);
7147
7148                 tx_buffer = &tx_ring->tx_buffer_info[i];
7149         }
7150
7151         /* write last descriptor with RS and EOP bits */
7152         cmd_type |= size | IXGBE_TXD_CMD;
7153         tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
7154
7155         netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount);
7156
7157         /* set the timestamp */
7158         first->time_stamp = jiffies;
7159
7160         /*
7161          * Force memory writes to complete before letting h/w know there
7162          * are new descriptors to fetch.  (Only applicable for weak-ordered
7163          * memory model archs, such as IA-64).
7164          *
7165          * We also need this memory barrier to make certain all of the
7166          * status bits have been updated before next_to_watch is written.
7167          */
7168         wmb();
7169
7170         /* set next_to_watch value indicating a packet is present */
7171         first->next_to_watch = tx_desc;
7172
7173         i++;
7174         if (i == tx_ring->count)
7175                 i = 0;
7176
7177         tx_ring->next_to_use = i;
7178
7179         ixgbe_maybe_stop_tx(tx_ring, DESC_NEEDED);
7180
7181         if (netif_xmit_stopped(txring_txq(tx_ring)) || !skb->xmit_more) {
7182                 writel(i, tx_ring->tail);
7183
7184                 /* we need this if more than one processor can write to our tail
7185                  * at a time, it synchronizes IO on IA64/Altix systems
7186                  */
7187                 mmiowb();
7188         }
7189
7190         return;
7191 dma_error:
7192         dev_err(tx_ring->dev, "TX DMA map failed\n");
7193
7194         /* clear dma mappings for failed tx_buffer_info map */
7195         for (;;) {
7196                 tx_buffer = &tx_ring->tx_buffer_info[i];
7197                 ixgbe_unmap_and_free_tx_resource(tx_ring, tx_buffer);
7198                 if (tx_buffer == first)
7199                         break;
7200                 if (i == 0)
7201                         i = tx_ring->count;
7202                 i--;
7203         }
7204
7205         tx_ring->next_to_use = i;
7206 }
7207
7208 static void ixgbe_atr(struct ixgbe_ring *ring,
7209                       struct ixgbe_tx_buffer *first)
7210 {
7211         struct ixgbe_q_vector *q_vector = ring->q_vector;
7212         union ixgbe_atr_hash_dword input = { .dword = 0 };
7213         union ixgbe_atr_hash_dword common = { .dword = 0 };
7214         union {
7215                 unsigned char *network;
7216                 struct iphdr *ipv4;
7217                 struct ipv6hdr *ipv6;
7218         } hdr;
7219         struct tcphdr *th;
7220         __be16 vlan_id;
7221
7222         /* if ring doesn't have a interrupt vector, cannot perform ATR */
7223         if (!q_vector)
7224                 return;
7225
7226         /* do nothing if sampling is disabled */
7227         if (!ring->atr_sample_rate)
7228                 return;
7229
7230         ring->atr_count++;
7231
7232         /* snag network header to get L4 type and address */
7233         hdr.network = skb_network_header(first->skb);
7234
7235         /* Currently only IPv4/IPv6 with TCP is supported */
7236         if ((first->protocol != htons(ETH_P_IPV6) ||
7237              hdr.ipv6->nexthdr != IPPROTO_TCP) &&
7238             (first->protocol != htons(ETH_P_IP) ||
7239              hdr.ipv4->protocol != IPPROTO_TCP))
7240                 return;
7241
7242         th = tcp_hdr(first->skb);
7243
7244         /* skip this packet since it is invalid or the socket is closing */
7245         if (!th || th->fin)
7246                 return;
7247
7248         /* sample on all syn packets or once every atr sample count */
7249         if (!th->syn && (ring->atr_count < ring->atr_sample_rate))
7250                 return;
7251
7252         /* reset sample count */
7253         ring->atr_count = 0;
7254
7255         vlan_id = htons(first->tx_flags >> IXGBE_TX_FLAGS_VLAN_SHIFT);
7256
7257         /*
7258          * src and dst are inverted, think how the receiver sees them
7259          *
7260          * The input is broken into two sections, a non-compressed section
7261          * containing vm_pool, vlan_id, and flow_type.  The rest of the data
7262          * is XORed together and stored in the compressed dword.
7263          */
7264         input.formatted.vlan_id = vlan_id;
7265
7266         /*
7267          * since src port and flex bytes occupy the same word XOR them together
7268          * and write the value to source port portion of compressed dword
7269          */
7270         if (first->tx_flags & (IXGBE_TX_FLAGS_SW_VLAN | IXGBE_TX_FLAGS_HW_VLAN))
7271                 common.port.src ^= th->dest ^ htons(ETH_P_8021Q);
7272         else
7273                 common.port.src ^= th->dest ^ first->protocol;
7274         common.port.dst ^= th->source;
7275
7276         if (first->protocol == htons(ETH_P_IP)) {
7277                 input.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_TCPV4;
7278                 common.ip ^= hdr.ipv4->saddr ^ hdr.ipv4->daddr;
7279         } else {
7280                 input.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_TCPV6;
7281                 common.ip ^= hdr.ipv6->saddr.s6_addr32[0] ^
7282                              hdr.ipv6->saddr.s6_addr32[1] ^
7283                              hdr.ipv6->saddr.s6_addr32[2] ^
7284                              hdr.ipv6->saddr.s6_addr32[3] ^
7285                              hdr.ipv6->daddr.s6_addr32[0] ^
7286                              hdr.ipv6->daddr.s6_addr32[1] ^
7287                              hdr.ipv6->daddr.s6_addr32[2] ^
7288                              hdr.ipv6->daddr.s6_addr32[3];
7289         }
7290
7291         /* This assumes the Rx queue and Tx queue are bound to the same CPU */
7292         ixgbe_fdir_add_signature_filter_82599(&q_vector->adapter->hw,
7293                                               input, common, ring->queue_index);
7294 }
7295
7296 static u16 ixgbe_select_queue(struct net_device *dev, struct sk_buff *skb,
7297                               void *accel_priv, select_queue_fallback_t fallback)
7298 {
7299         struct ixgbe_fwd_adapter *fwd_adapter = accel_priv;
7300 #ifdef IXGBE_FCOE
7301         struct ixgbe_adapter *adapter;
7302         struct ixgbe_ring_feature *f;
7303         int txq;
7304 #endif
7305
7306         if (fwd_adapter)
7307                 return skb->queue_mapping + fwd_adapter->tx_base_queue;
7308
7309 #ifdef IXGBE_FCOE
7310
7311         /*
7312          * only execute the code below if protocol is FCoE
7313          * or FIP and we have FCoE enabled on the adapter
7314          */
7315         switch (vlan_get_protocol(skb)) {
7316         case htons(ETH_P_FCOE):
7317         case htons(ETH_P_FIP):
7318                 adapter = netdev_priv(dev);
7319
7320                 if (adapter->flags & IXGBE_FLAG_FCOE_ENABLED)
7321                         break;
7322         default:
7323                 return fallback(dev, skb);
7324         }
7325
7326         f = &adapter->ring_feature[RING_F_FCOE];
7327
7328         txq = skb_rx_queue_recorded(skb) ? skb_get_rx_queue(skb) :
7329                                            smp_processor_id();
7330
7331         while (txq >= f->indices)
7332                 txq -= f->indices;
7333
7334         return txq + f->offset;
7335 #else
7336         return fallback(dev, skb);
7337 #endif
7338 }
7339
7340 netdev_tx_t ixgbe_xmit_frame_ring(struct sk_buff *skb,
7341                           struct ixgbe_adapter *adapter,
7342                           struct ixgbe_ring *tx_ring)
7343 {
7344         struct ixgbe_tx_buffer *first;
7345         int tso;
7346         u32 tx_flags = 0;
7347         unsigned short f;
7348         u16 count = TXD_USE_COUNT(skb_headlen(skb));
7349         __be16 protocol = skb->protocol;
7350         u8 hdr_len = 0;
7351
7352         /*
7353          * need: 1 descriptor per page * PAGE_SIZE/IXGBE_MAX_DATA_PER_TXD,
7354          *       + 1 desc for skb_headlen/IXGBE_MAX_DATA_PER_TXD,
7355          *       + 2 desc gap to keep tail from touching head,
7356          *       + 1 desc for context descriptor,
7357          * otherwise try next time
7358          */
7359         for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
7360                 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
7361
7362         if (ixgbe_maybe_stop_tx(tx_ring, count + 3)) {
7363                 tx_ring->tx_stats.tx_busy++;
7364                 return NETDEV_TX_BUSY;
7365         }
7366
7367         /* record the location of the first descriptor for this packet */
7368         first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
7369         first->skb = skb;
7370         first->bytecount = skb->len;
7371         first->gso_segs = 1;
7372
7373         /* if we have a HW VLAN tag being added default to the HW one */
7374         if (skb_vlan_tag_present(skb)) {
7375                 tx_flags |= skb_vlan_tag_get(skb) << IXGBE_TX_FLAGS_VLAN_SHIFT;
7376                 tx_flags |= IXGBE_TX_FLAGS_HW_VLAN;
7377         /* else if it is a SW VLAN check the next protocol and store the tag */
7378         } else if (protocol == htons(ETH_P_8021Q)) {
7379                 struct vlan_hdr *vhdr, _vhdr;
7380                 vhdr = skb_header_pointer(skb, ETH_HLEN, sizeof(_vhdr), &_vhdr);
7381                 if (!vhdr)
7382                         goto out_drop;
7383
7384                 tx_flags |= ntohs(vhdr->h_vlan_TCI) <<
7385                                   IXGBE_TX_FLAGS_VLAN_SHIFT;
7386                 tx_flags |= IXGBE_TX_FLAGS_SW_VLAN;
7387         }
7388         protocol = vlan_get_protocol(skb);
7389
7390         if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) &&
7391             adapter->ptp_clock &&
7392             !test_and_set_bit_lock(__IXGBE_PTP_TX_IN_PROGRESS,
7393                                    &adapter->state)) {
7394                 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
7395                 tx_flags |= IXGBE_TX_FLAGS_TSTAMP;
7396
7397                 /* schedule check for Tx timestamp */
7398                 adapter->ptp_tx_skb = skb_get(skb);
7399                 adapter->ptp_tx_start = jiffies;
7400                 schedule_work(&adapter->ptp_tx_work);
7401         }
7402
7403         skb_tx_timestamp(skb);
7404
7405 #ifdef CONFIG_PCI_IOV
7406         /*
7407          * Use the l2switch_enable flag - would be false if the DMA
7408          * Tx switch had been disabled.
7409          */
7410         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
7411                 tx_flags |= IXGBE_TX_FLAGS_CC;
7412
7413 #endif
7414         /* DCB maps skb priorities 0-7 onto 3 bit PCP of VLAN tag. */
7415         if ((adapter->flags & IXGBE_FLAG_DCB_ENABLED) &&
7416             ((tx_flags & (IXGBE_TX_FLAGS_HW_VLAN | IXGBE_TX_FLAGS_SW_VLAN)) ||
7417              (skb->priority != TC_PRIO_CONTROL))) {
7418                 tx_flags &= ~IXGBE_TX_FLAGS_VLAN_PRIO_MASK;
7419                 tx_flags |= (skb->priority & 0x7) <<
7420                                         IXGBE_TX_FLAGS_VLAN_PRIO_SHIFT;
7421                 if (tx_flags & IXGBE_TX_FLAGS_SW_VLAN) {
7422                         struct vlan_ethhdr *vhdr;
7423
7424                         if (skb_cow_head(skb, 0))
7425                                 goto out_drop;
7426                         vhdr = (struct vlan_ethhdr *)skb->data;
7427                         vhdr->h_vlan_TCI = htons(tx_flags >>
7428                                                  IXGBE_TX_FLAGS_VLAN_SHIFT);
7429                 } else {
7430                         tx_flags |= IXGBE_TX_FLAGS_HW_VLAN;
7431                 }
7432         }
7433
7434         /* record initial flags and protocol */
7435         first->tx_flags = tx_flags;
7436         first->protocol = protocol;
7437
7438 #ifdef IXGBE_FCOE
7439         /* setup tx offload for FCoE */
7440         if ((protocol == htons(ETH_P_FCOE)) &&
7441             (tx_ring->netdev->features & (NETIF_F_FSO | NETIF_F_FCOE_CRC))) {
7442                 tso = ixgbe_fso(tx_ring, first, &hdr_len);
7443                 if (tso < 0)
7444                         goto out_drop;
7445
7446                 goto xmit_fcoe;
7447         }
7448
7449 #endif /* IXGBE_FCOE */
7450         tso = ixgbe_tso(tx_ring, first, &hdr_len);
7451         if (tso < 0)
7452                 goto out_drop;
7453         else if (!tso)
7454                 ixgbe_tx_csum(tx_ring, first);
7455
7456         /* add the ATR filter if ATR is on */
7457         if (test_bit(__IXGBE_TX_FDIR_INIT_DONE, &tx_ring->state))
7458                 ixgbe_atr(tx_ring, first);
7459
7460 #ifdef IXGBE_FCOE
7461 xmit_fcoe:
7462 #endif /* IXGBE_FCOE */
7463         ixgbe_tx_map(tx_ring, first, hdr_len);
7464
7465         return NETDEV_TX_OK;
7466
7467 out_drop:
7468         dev_kfree_skb_any(first->skb);
7469         first->skb = NULL;
7470
7471         return NETDEV_TX_OK;
7472 }
7473
7474 static netdev_tx_t __ixgbe_xmit_frame(struct sk_buff *skb,
7475                                       struct net_device *netdev,
7476                                       struct ixgbe_ring *ring)
7477 {
7478         struct ixgbe_adapter *adapter = netdev_priv(netdev);
7479         struct ixgbe_ring *tx_ring;
7480
7481         /*
7482          * The minimum packet size for olinfo paylen is 17 so pad the skb
7483          * in order to meet this minimum size requirement.
7484          */
7485         if (skb_put_padto(skb, 17))
7486                 return NETDEV_TX_OK;
7487
7488         tx_ring = ring ? ring : adapter->tx_ring[skb->queue_mapping];
7489
7490         return ixgbe_xmit_frame_ring(skb, adapter, tx_ring);
7491 }
7492
7493 static netdev_tx_t ixgbe_xmit_frame(struct sk_buff *skb,
7494                                     struct net_device *netdev)
7495 {
7496         return __ixgbe_xmit_frame(skb, netdev, NULL);
7497 }
7498
7499 /**
7500  * ixgbe_set_mac - Change the Ethernet Address of the NIC
7501  * @netdev: network interface device structure
7502  * @p: pointer to an address structure
7503  *
7504  * Returns 0 on success, negative on failure
7505  **/
7506 static int ixgbe_set_mac(struct net_device *netdev, void *p)
7507 {
7508         struct ixgbe_adapter *adapter = netdev_priv(netdev);
7509         struct ixgbe_hw *hw = &adapter->hw;
7510         struct sockaddr *addr = p;
7511         int ret;
7512
7513         if (!is_valid_ether_addr(addr->sa_data))
7514                 return -EADDRNOTAVAIL;
7515
7516         ixgbe_del_mac_filter(adapter, hw->mac.addr, VMDQ_P(0));
7517         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
7518         memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
7519
7520         ret = ixgbe_add_mac_filter(adapter, hw->mac.addr, VMDQ_P(0));
7521         return ret > 0 ? 0 : ret;
7522 }
7523
7524 static int
7525 ixgbe_mdio_read(struct net_device *netdev, int prtad, int devad, u16 addr)
7526 {
7527         struct ixgbe_adapter *adapter = netdev_priv(netdev);
7528         struct ixgbe_hw *hw = &adapter->hw;
7529         u16 value;
7530         int rc;
7531
7532         if (prtad != hw->phy.mdio.prtad)
7533                 return -EINVAL;
7534         rc = hw->phy.ops.read_reg(hw, addr, devad, &value);
7535         if (!rc)
7536                 rc = value;
7537         return rc;
7538 }
7539
7540 static int ixgbe_mdio_write(struct net_device *netdev, int prtad, int devad,
7541                             u16 addr, u16 value)
7542 {
7543         struct ixgbe_adapter *adapter = netdev_priv(netdev);
7544         struct ixgbe_hw *hw = &adapter->hw;
7545
7546         if (prtad != hw->phy.mdio.prtad)
7547                 return -EINVAL;
7548         return hw->phy.ops.write_reg(hw, addr, devad, value);
7549 }
7550
7551 static int ixgbe_ioctl(struct net_device *netdev, struct ifreq *req, int cmd)
7552 {
7553         struct ixgbe_adapter *adapter = netdev_priv(netdev);
7554
7555         switch (cmd) {
7556         case SIOCSHWTSTAMP:
7557                 return ixgbe_ptp_set_ts_config(adapter, req);
7558         case SIOCGHWTSTAMP:
7559                 return ixgbe_ptp_get_ts_config(adapter, req);
7560         default:
7561                 return mdio_mii_ioctl(&adapter->hw.phy.mdio, if_mii(req), cmd);
7562         }
7563 }
7564
7565 /**
7566  * ixgbe_add_sanmac_netdev - Add the SAN MAC address to the corresponding
7567  * netdev->dev_addrs
7568  * @netdev: network interface device structure
7569  *
7570  * Returns non-zero on failure
7571  **/
7572 static int ixgbe_add_sanmac_netdev(struct net_device *dev)
7573 {
7574         int err = 0;
7575         struct ixgbe_adapter *adapter = netdev_priv(dev);
7576         struct ixgbe_hw *hw = &adapter->hw;
7577
7578         if (is_valid_ether_addr(hw->mac.san_addr)) {
7579                 rtnl_lock();
7580                 err = dev_addr_add(dev, hw->mac.san_addr, NETDEV_HW_ADDR_T_SAN);
7581                 rtnl_unlock();
7582
7583                 /* update SAN MAC vmdq pool selection */
7584                 hw->mac.ops.set_vmdq_san_mac(hw, VMDQ_P(0));
7585         }
7586         return err;
7587 }
7588
7589 /**
7590  * ixgbe_del_sanmac_netdev - Removes the SAN MAC address to the corresponding
7591  * netdev->dev_addrs
7592  * @netdev: network interface device structure
7593  *
7594  * Returns non-zero on failure
7595  **/
7596 static int ixgbe_del_sanmac_netdev(struct net_device *dev)
7597 {
7598         int err = 0;
7599         struct ixgbe_adapter *adapter = netdev_priv(dev);
7600         struct ixgbe_mac_info *mac = &adapter->hw.mac;
7601
7602         if (is_valid_ether_addr(mac->san_addr)) {
7603                 rtnl_lock();
7604                 err = dev_addr_del(dev, mac->san_addr, NETDEV_HW_ADDR_T_SAN);
7605                 rtnl_unlock();
7606         }
7607         return err;
7608 }
7609
7610 #ifdef CONFIG_NET_POLL_CONTROLLER
7611 /*
7612  * Polling 'interrupt' - used by things like netconsole to send skbs
7613  * without having to re-enable interrupts. It's not called while
7614  * the interrupt routine is executing.
7615  */
7616 static void ixgbe_netpoll(struct net_device *netdev)
7617 {
7618         struct ixgbe_adapter *adapter = netdev_priv(netdev);
7619         int i;
7620
7621         /* if interface is down do nothing */
7622         if (test_bit(__IXGBE_DOWN, &adapter->state))
7623                 return;
7624
7625         /* loop through and schedule all active queues */
7626         for (i = 0; i < adapter->num_q_vectors; i++)
7627                 ixgbe_msix_clean_rings(0, adapter->q_vector[i]);
7628 }
7629
7630 #endif
7631 static struct rtnl_link_stats64 *ixgbe_get_stats64(struct net_device *netdev,
7632                                                    struct rtnl_link_stats64 *stats)
7633 {
7634         struct ixgbe_adapter *adapter = netdev_priv(netdev);
7635         int i;
7636
7637         rcu_read_lock();
7638         for (i = 0; i < adapter->num_rx_queues; i++) {
7639                 struct ixgbe_ring *ring = ACCESS_ONCE(adapter->rx_ring[i]);
7640                 u64 bytes, packets;
7641                 unsigned int start;
7642
7643                 if (ring) {
7644                         do {
7645                                 start = u64_stats_fetch_begin_irq(&ring->syncp);
7646                                 packets = ring->stats.packets;
7647                                 bytes   = ring->stats.bytes;
7648                         } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
7649                         stats->rx_packets += packets;
7650                         stats->rx_bytes   += bytes;
7651                 }
7652         }
7653
7654         for (i = 0; i < adapter->num_tx_queues; i++) {
7655                 struct ixgbe_ring *ring = ACCESS_ONCE(adapter->tx_ring[i]);
7656                 u64 bytes, packets;
7657                 unsigned int start;
7658
7659                 if (ring) {
7660                         do {
7661                                 start = u64_stats_fetch_begin_irq(&ring->syncp);
7662                                 packets = ring->stats.packets;
7663                                 bytes   = ring->stats.bytes;
7664                         } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
7665                         stats->tx_packets += packets;
7666                         stats->tx_bytes   += bytes;
7667                 }
7668         }
7669         rcu_read_unlock();
7670         /* following stats updated by ixgbe_watchdog_task() */
7671         stats->multicast        = netdev->stats.multicast;
7672         stats->rx_errors        = netdev->stats.rx_errors;
7673         stats->rx_length_errors = netdev->stats.rx_length_errors;
7674         stats->rx_crc_errors    = netdev->stats.rx_crc_errors;
7675         stats->rx_missed_errors = netdev->stats.rx_missed_errors;
7676         return stats;
7677 }
7678
7679 #ifdef CONFIG_IXGBE_DCB
7680 /**
7681  * ixgbe_validate_rtr - verify 802.1Qp to Rx packet buffer mapping is valid.
7682  * @adapter: pointer to ixgbe_adapter
7683  * @tc: number of traffic classes currently enabled
7684  *
7685  * Configure a valid 802.1Qp to Rx packet buffer mapping ie confirm
7686  * 802.1Q priority maps to a packet buffer that exists.
7687  */
7688 static void ixgbe_validate_rtr(struct ixgbe_adapter *adapter, u8 tc)
7689 {
7690         struct ixgbe_hw *hw = &adapter->hw;
7691         u32 reg, rsave;
7692         int i;
7693
7694         /* 82598 have a static priority to TC mapping that can not
7695          * be changed so no validation is needed.
7696          */
7697         if (hw->mac.type == ixgbe_mac_82598EB)
7698                 return;
7699
7700         reg = IXGBE_READ_REG(hw, IXGBE_RTRUP2TC);
7701         rsave = reg;
7702
7703         for (i = 0; i < MAX_TRAFFIC_CLASS; i++) {
7704                 u8 up2tc = reg >> (i * IXGBE_RTRUP2TC_UP_SHIFT);
7705
7706                 /* If up2tc is out of bounds default to zero */
7707                 if (up2tc > tc)
7708                         reg &= ~(0x7 << IXGBE_RTRUP2TC_UP_SHIFT);
7709         }
7710
7711         if (reg != rsave)
7712                 IXGBE_WRITE_REG(hw, IXGBE_RTRUP2TC, reg);
7713
7714         return;
7715 }
7716
7717 /**
7718  * ixgbe_set_prio_tc_map - Configure netdev prio tc map
7719  * @adapter: Pointer to adapter struct
7720  *
7721  * Populate the netdev user priority to tc map
7722  */
7723 static void ixgbe_set_prio_tc_map(struct ixgbe_adapter *adapter)
7724 {
7725         struct net_device *dev = adapter->netdev;
7726         struct ixgbe_dcb_config *dcb_cfg = &adapter->dcb_cfg;
7727         struct ieee_ets *ets = adapter->ixgbe_ieee_ets;
7728         u8 prio;
7729
7730         for (prio = 0; prio < MAX_USER_PRIORITY; prio++) {
7731                 u8 tc = 0;
7732
7733                 if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE)
7734                         tc = ixgbe_dcb_get_tc_from_up(dcb_cfg, 0, prio);
7735                 else if (ets)
7736                         tc = ets->prio_tc[prio];
7737
7738                 netdev_set_prio_tc_map(dev, prio, tc);
7739         }
7740 }
7741
7742 #endif /* CONFIG_IXGBE_DCB */
7743 /**
7744  * ixgbe_setup_tc - configure net_device for multiple traffic classes
7745  *
7746  * @netdev: net device to configure
7747  * @tc: number of traffic classes to enable
7748  */
7749 int ixgbe_setup_tc(struct net_device *dev, u8 tc)
7750 {
7751         struct ixgbe_adapter *adapter = netdev_priv(dev);
7752         struct ixgbe_hw *hw = &adapter->hw;
7753         bool pools;
7754
7755         /* Hardware supports up to 8 traffic classes */
7756         if (tc > adapter->dcb_cfg.num_tcs.pg_tcs ||
7757             (hw->mac.type == ixgbe_mac_82598EB &&
7758              tc < MAX_TRAFFIC_CLASS))
7759                 return -EINVAL;
7760
7761         pools = (find_first_zero_bit(&adapter->fwd_bitmask, 32) > 1);
7762         if (tc && pools && adapter->num_rx_pools > IXGBE_MAX_DCBMACVLANS)
7763                 return -EBUSY;
7764
7765         /* Hardware has to reinitialize queues and interrupts to
7766          * match packet buffer alignment. Unfortunately, the
7767          * hardware is not flexible enough to do this dynamically.
7768          */
7769         if (netif_running(dev))
7770                 ixgbe_close(dev);
7771         ixgbe_clear_interrupt_scheme(adapter);
7772
7773 #ifdef CONFIG_IXGBE_DCB
7774         if (tc) {
7775                 netdev_set_num_tc(dev, tc);
7776                 ixgbe_set_prio_tc_map(adapter);
7777
7778                 adapter->flags |= IXGBE_FLAG_DCB_ENABLED;
7779
7780                 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
7781                         adapter->last_lfc_mode = adapter->hw.fc.requested_mode;
7782                         adapter->hw.fc.requested_mode = ixgbe_fc_none;
7783                 }
7784         } else {
7785                 netdev_reset_tc(dev);
7786
7787                 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
7788                         adapter->hw.fc.requested_mode = adapter->last_lfc_mode;
7789
7790                 adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
7791
7792                 adapter->temp_dcb_cfg.pfc_mode_enable = false;
7793                 adapter->dcb_cfg.pfc_mode_enable = false;
7794         }
7795
7796         ixgbe_validate_rtr(adapter, tc);
7797
7798 #endif /* CONFIG_IXGBE_DCB */
7799         ixgbe_init_interrupt_scheme(adapter);
7800
7801         if (netif_running(dev))
7802                 return ixgbe_open(dev);
7803
7804         return 0;
7805 }
7806
7807 #ifdef CONFIG_PCI_IOV
7808 void ixgbe_sriov_reinit(struct ixgbe_adapter *adapter)
7809 {
7810         struct net_device *netdev = adapter->netdev;
7811
7812         rtnl_lock();
7813         ixgbe_setup_tc(netdev, netdev_get_num_tc(netdev));
7814         rtnl_unlock();
7815 }
7816
7817 #endif
7818 void ixgbe_do_reset(struct net_device *netdev)
7819 {
7820         struct ixgbe_adapter *adapter = netdev_priv(netdev);
7821
7822         if (netif_running(netdev))
7823                 ixgbe_reinit_locked(adapter);
7824         else
7825                 ixgbe_reset(adapter);
7826 }
7827
7828 static netdev_features_t ixgbe_fix_features(struct net_device *netdev,
7829                                             netdev_features_t features)
7830 {
7831         struct ixgbe_adapter *adapter = netdev_priv(netdev);
7832
7833         /* If Rx checksum is disabled, then RSC/LRO should also be disabled */
7834         if (!(features & NETIF_F_RXCSUM))
7835                 features &= ~NETIF_F_LRO;
7836
7837         /* Turn off LRO if not RSC capable */
7838         if (!(adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE))
7839                 features &= ~NETIF_F_LRO;
7840
7841         return features;
7842 }
7843
7844 static int ixgbe_set_features(struct net_device *netdev,
7845                               netdev_features_t features)
7846 {
7847         struct ixgbe_adapter *adapter = netdev_priv(netdev);
7848         netdev_features_t changed = netdev->features ^ features;
7849         bool need_reset = false;
7850
7851         /* Make sure RSC matches LRO, reset if change */
7852         if (!(features & NETIF_F_LRO)) {
7853                 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
7854                         need_reset = true;
7855                 adapter->flags2 &= ~IXGBE_FLAG2_RSC_ENABLED;
7856         } else if ((adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE) &&
7857                    !(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)) {
7858                 if (adapter->rx_itr_setting == 1 ||
7859                     adapter->rx_itr_setting > IXGBE_MIN_RSC_ITR) {
7860                         adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED;
7861                         need_reset = true;
7862                 } else if ((changed ^ features) & NETIF_F_LRO) {
7863                         e_info(probe, "rx-usecs set too low, "
7864                                "disabling RSC\n");
7865                 }
7866         }
7867
7868         /*
7869          * Check if Flow Director n-tuple support was enabled or disabled.  If
7870          * the state changed, we need to reset.
7871          */
7872         switch (features & NETIF_F_NTUPLE) {
7873         case NETIF_F_NTUPLE:
7874                 /* turn off ATR, enable perfect filters and reset */
7875                 if (!(adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE))
7876                         need_reset = true;
7877
7878                 adapter->flags &= ~IXGBE_FLAG_FDIR_HASH_CAPABLE;
7879                 adapter->flags |= IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
7880                 break;
7881         default:
7882                 /* turn off perfect filters, enable ATR and reset */
7883                 if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
7884                         need_reset = true;
7885
7886                 adapter->flags &= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
7887
7888                 /* We cannot enable ATR if SR-IOV is enabled */
7889                 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
7890                         break;
7891
7892                 /* We cannot enable ATR if we have 2 or more traffic classes */
7893                 if (netdev_get_num_tc(netdev) > 1)
7894                         break;
7895
7896                 /* We cannot enable ATR if RSS is disabled */
7897                 if (adapter->ring_feature[RING_F_RSS].limit <= 1)
7898                         break;
7899
7900                 /* A sample rate of 0 indicates ATR disabled */
7901                 if (!adapter->atr_sample_rate)
7902                         break;
7903
7904                 adapter->flags |= IXGBE_FLAG_FDIR_HASH_CAPABLE;
7905                 break;
7906         }
7907
7908         if (features & NETIF_F_HW_VLAN_CTAG_RX)
7909                 ixgbe_vlan_strip_enable(adapter);
7910         else
7911                 ixgbe_vlan_strip_disable(adapter);
7912
7913         if (changed & NETIF_F_RXALL)
7914                 need_reset = true;
7915
7916         netdev->features = features;
7917         if (need_reset)
7918                 ixgbe_do_reset(netdev);
7919
7920         return 0;
7921 }
7922
7923 /**
7924  * ixgbe_add_vxlan_port - Get notifications about VXLAN ports that come up
7925  * @dev: The port's netdev
7926  * @sa_family: Socket Family that VXLAN is notifiying us about
7927  * @port: New UDP port number that VXLAN started listening to
7928  **/
7929 static void ixgbe_add_vxlan_port(struct net_device *dev, sa_family_t sa_family,
7930                                  __be16 port)
7931 {
7932         struct ixgbe_adapter *adapter = netdev_priv(dev);
7933         struct ixgbe_hw *hw = &adapter->hw;
7934         u16 new_port = ntohs(port);
7935
7936         if (sa_family == AF_INET6)
7937                 return;
7938
7939         if (adapter->vxlan_port == new_port) {
7940                 netdev_info(dev, "Port %d already offloaded\n", new_port);
7941                 return;
7942         }
7943
7944         if (adapter->vxlan_port) {
7945                 netdev_info(dev,
7946                             "Hit Max num of UDP ports, not adding port %d\n",
7947                             new_port);
7948                 return;
7949         }
7950
7951         adapter->vxlan_port = new_port;
7952         IXGBE_WRITE_REG(hw, IXGBE_VXLANCTRL, new_port);
7953 }
7954
7955 /**
7956  * ixgbe_del_vxlan_port - Get notifications about VXLAN ports that go away
7957  * @dev: The port's netdev
7958  * @sa_family: Socket Family that VXLAN is notifying us about
7959  * @port: UDP port number that VXLAN stopped listening to
7960  **/
7961 static void ixgbe_del_vxlan_port(struct net_device *dev, sa_family_t sa_family,
7962                                  __be16 port)
7963 {
7964         struct ixgbe_adapter *adapter = netdev_priv(dev);
7965         struct ixgbe_hw *hw = &adapter->hw;
7966         u16 new_port = ntohs(port);
7967
7968         if (sa_family == AF_INET6)
7969                 return;
7970
7971         if (adapter->vxlan_port != new_port) {
7972                 netdev_info(dev, "Port %d was not found, not deleting\n",
7973                             new_port);
7974                 return;
7975         }
7976
7977         adapter->vxlan_port = 0;
7978         IXGBE_WRITE_REG(hw, IXGBE_VXLANCTRL, 0);
7979 }
7980
7981 static int ixgbe_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
7982                              struct net_device *dev,
7983                              const unsigned char *addr, u16 vid,
7984                              u16 flags)
7985 {
7986         /* guarantee we can provide a unique filter for the unicast address */
7987         if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr)) {
7988                 if (IXGBE_MAX_PF_MACVLANS <= netdev_uc_count(dev))
7989                         return -ENOMEM;
7990         }
7991
7992         return ndo_dflt_fdb_add(ndm, tb, dev, addr, vid, flags);
7993 }
7994
7995 /**
7996  * ixgbe_configure_bridge_mode - set various bridge modes
7997  * @adapter - the private structure
7998  * @mode - requested bridge mode
7999  *
8000  * Configure some settings require for various bridge modes.
8001  **/
8002 static int ixgbe_configure_bridge_mode(struct ixgbe_adapter *adapter,
8003                                        __u16 mode)
8004 {
8005         struct ixgbe_hw *hw = &adapter->hw;
8006         unsigned int p, num_pools;
8007         u32 vmdctl;
8008
8009         switch (mode) {
8010         case BRIDGE_MODE_VEPA:
8011                 /* disable Tx loopback, rely on switch hairpin mode */
8012                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_PFDTXGSWC, 0);
8013
8014                 /* must enable Rx switching replication to allow multicast
8015                  * packet reception on all VFs, and to enable source address
8016                  * pruning.
8017                  */
8018                 vmdctl = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
8019                 vmdctl |= IXGBE_VT_CTL_REPLEN;
8020                 IXGBE_WRITE_REG(hw, IXGBE_VMD_CTL, vmdctl);
8021
8022                 /* enable Rx source address pruning. Note, this requires
8023                  * replication to be enabled or else it does nothing.
8024                  */
8025                 num_pools = adapter->num_vfs + adapter->num_rx_pools;
8026                 for (p = 0; p < num_pools; p++) {
8027                         if (hw->mac.ops.set_source_address_pruning)
8028                                 hw->mac.ops.set_source_address_pruning(hw,
8029                                                                        true,
8030                                                                        p);
8031                 }
8032                 break;
8033         case BRIDGE_MODE_VEB:
8034                 /* enable Tx loopback for internal VF/PF communication */
8035                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_PFDTXGSWC,
8036                                 IXGBE_PFDTXGSWC_VT_LBEN);
8037
8038                 /* disable Rx switching replication unless we have SR-IOV
8039                  * virtual functions
8040                  */
8041                 vmdctl = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
8042                 if (!adapter->num_vfs)
8043                         vmdctl &= ~IXGBE_VT_CTL_REPLEN;
8044                 IXGBE_WRITE_REG(hw, IXGBE_VMD_CTL, vmdctl);
8045
8046                 /* disable Rx source address pruning, since we don't expect to
8047                  * be receiving external loopback of our transmitted frames.
8048                  */
8049                 num_pools = adapter->num_vfs + adapter->num_rx_pools;
8050                 for (p = 0; p < num_pools; p++) {
8051                         if (hw->mac.ops.set_source_address_pruning)
8052                                 hw->mac.ops.set_source_address_pruning(hw,
8053                                                                        false,
8054                                                                        p);
8055                 }
8056                 break;
8057         default:
8058                 return -EINVAL;
8059         }
8060
8061         adapter->bridge_mode = mode;
8062
8063         e_info(drv, "enabling bridge mode: %s\n",
8064                mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
8065
8066         return 0;
8067 }
8068
8069 static int ixgbe_ndo_bridge_setlink(struct net_device *dev,
8070                                     struct nlmsghdr *nlh, u16 flags)
8071 {
8072         struct ixgbe_adapter *adapter = netdev_priv(dev);
8073         struct nlattr *attr, *br_spec;
8074         int rem;
8075
8076         if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
8077                 return -EOPNOTSUPP;
8078
8079         br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
8080         if (!br_spec)
8081                 return -EINVAL;
8082
8083         nla_for_each_nested(attr, br_spec, rem) {
8084                 int status;
8085                 __u16 mode;
8086
8087                 if (nla_type(attr) != IFLA_BRIDGE_MODE)
8088                         continue;
8089
8090                 if (nla_len(attr) < sizeof(mode))
8091                         return -EINVAL;
8092
8093                 mode = nla_get_u16(attr);
8094                 status = ixgbe_configure_bridge_mode(adapter, mode);
8095                 if (status)
8096                         return status;
8097
8098                 break;
8099         }
8100
8101         return 0;
8102 }
8103
8104 static int ixgbe_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
8105                                     struct net_device *dev,
8106                                     u32 filter_mask, int nlflags)
8107 {
8108         struct ixgbe_adapter *adapter = netdev_priv(dev);
8109
8110         if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
8111                 return 0;
8112
8113         return ndo_dflt_bridge_getlink(skb, pid, seq, dev,
8114                                        adapter->bridge_mode, 0, 0, nlflags,
8115                                        filter_mask, NULL);
8116 }
8117
8118 static void *ixgbe_fwd_add(struct net_device *pdev, struct net_device *vdev)
8119 {
8120         struct ixgbe_fwd_adapter *fwd_adapter = NULL;
8121         struct ixgbe_adapter *adapter = netdev_priv(pdev);
8122         int used_pools = adapter->num_vfs + adapter->num_rx_pools;
8123         unsigned int limit;
8124         int pool, err;
8125
8126         /* Hardware has a limited number of available pools. Each VF, and the
8127          * PF require a pool. Check to ensure we don't attempt to use more
8128          * then the available number of pools.
8129          */
8130         if (used_pools >= IXGBE_MAX_VF_FUNCTIONS)
8131                 return ERR_PTR(-EINVAL);
8132
8133 #ifdef CONFIG_RPS
8134         if (vdev->num_rx_queues != vdev->num_tx_queues) {
8135                 netdev_info(pdev, "%s: Only supports a single queue count for TX and RX\n",
8136                             vdev->name);
8137                 return ERR_PTR(-EINVAL);
8138         }
8139 #endif
8140         /* Check for hardware restriction on number of rx/tx queues */
8141         if (vdev->num_tx_queues > IXGBE_MAX_L2A_QUEUES ||
8142             vdev->num_tx_queues == IXGBE_BAD_L2A_QUEUE) {
8143                 netdev_info(pdev,
8144                             "%s: Supports RX/TX Queue counts 1,2, and 4\n",
8145                             pdev->name);
8146                 return ERR_PTR(-EINVAL);
8147         }
8148
8149         if (((adapter->flags & IXGBE_FLAG_DCB_ENABLED) &&
8150               adapter->num_rx_pools > IXGBE_MAX_DCBMACVLANS - 1) ||
8151             (adapter->num_rx_pools > IXGBE_MAX_MACVLANS))
8152                 return ERR_PTR(-EBUSY);
8153
8154         fwd_adapter = kcalloc(1, sizeof(struct ixgbe_fwd_adapter), GFP_KERNEL);
8155         if (!fwd_adapter)
8156                 return ERR_PTR(-ENOMEM);
8157
8158         pool = find_first_zero_bit(&adapter->fwd_bitmask, 32);
8159         adapter->num_rx_pools++;
8160         set_bit(pool, &adapter->fwd_bitmask);
8161         limit = find_last_bit(&adapter->fwd_bitmask, 32);
8162
8163         /* Enable VMDq flag so device will be set in VM mode */
8164         adapter->flags |= IXGBE_FLAG_VMDQ_ENABLED | IXGBE_FLAG_SRIOV_ENABLED;
8165         adapter->ring_feature[RING_F_VMDQ].limit = limit + 1;
8166         adapter->ring_feature[RING_F_RSS].limit = vdev->num_tx_queues;
8167
8168         /* Force reinit of ring allocation with VMDQ enabled */
8169         err = ixgbe_setup_tc(pdev, netdev_get_num_tc(pdev));
8170         if (err)
8171                 goto fwd_add_err;
8172         fwd_adapter->pool = pool;
8173         fwd_adapter->real_adapter = adapter;
8174         err = ixgbe_fwd_ring_up(vdev, fwd_adapter);
8175         if (err)
8176                 goto fwd_add_err;
8177         netif_tx_start_all_queues(vdev);
8178         return fwd_adapter;
8179 fwd_add_err:
8180         /* unwind counter and free adapter struct */
8181         netdev_info(pdev,
8182                     "%s: dfwd hardware acceleration failed\n", vdev->name);
8183         clear_bit(pool, &adapter->fwd_bitmask);
8184         adapter->num_rx_pools--;
8185         kfree(fwd_adapter);
8186         return ERR_PTR(err);
8187 }
8188
8189 static void ixgbe_fwd_del(struct net_device *pdev, void *priv)
8190 {
8191         struct ixgbe_fwd_adapter *fwd_adapter = priv;
8192         struct ixgbe_adapter *adapter = fwd_adapter->real_adapter;
8193         unsigned int limit;
8194
8195         clear_bit(fwd_adapter->pool, &adapter->fwd_bitmask);
8196         adapter->num_rx_pools--;
8197
8198         limit = find_last_bit(&adapter->fwd_bitmask, 32);
8199         adapter->ring_feature[RING_F_VMDQ].limit = limit + 1;
8200         ixgbe_fwd_ring_down(fwd_adapter->netdev, fwd_adapter);
8201         ixgbe_setup_tc(pdev, netdev_get_num_tc(pdev));
8202         netdev_dbg(pdev, "pool %i:%i queues %i:%i VSI bitmask %lx\n",
8203                    fwd_adapter->pool, adapter->num_rx_pools,
8204                    fwd_adapter->rx_base_queue,
8205                    fwd_adapter->rx_base_queue + adapter->num_rx_queues_per_pool,
8206                    adapter->fwd_bitmask);
8207         kfree(fwd_adapter);
8208 }
8209
8210 static const struct net_device_ops ixgbe_netdev_ops = {
8211         .ndo_open               = ixgbe_open,
8212         .ndo_stop               = ixgbe_close,
8213         .ndo_start_xmit         = ixgbe_xmit_frame,
8214         .ndo_select_queue       = ixgbe_select_queue,
8215         .ndo_set_rx_mode        = ixgbe_set_rx_mode,
8216         .ndo_validate_addr      = eth_validate_addr,
8217         .ndo_set_mac_address    = ixgbe_set_mac,
8218         .ndo_change_mtu         = ixgbe_change_mtu,
8219         .ndo_tx_timeout         = ixgbe_tx_timeout,
8220         .ndo_vlan_rx_add_vid    = ixgbe_vlan_rx_add_vid,
8221         .ndo_vlan_rx_kill_vid   = ixgbe_vlan_rx_kill_vid,
8222         .ndo_do_ioctl           = ixgbe_ioctl,
8223         .ndo_set_vf_mac         = ixgbe_ndo_set_vf_mac,
8224         .ndo_set_vf_vlan        = ixgbe_ndo_set_vf_vlan,
8225         .ndo_set_vf_rate        = ixgbe_ndo_set_vf_bw,
8226         .ndo_set_vf_spoofchk    = ixgbe_ndo_set_vf_spoofchk,
8227         .ndo_set_vf_rss_query_en = ixgbe_ndo_set_vf_rss_query_en,
8228         .ndo_get_vf_config      = ixgbe_ndo_get_vf_config,
8229         .ndo_get_stats64        = ixgbe_get_stats64,
8230 #ifdef CONFIG_IXGBE_DCB
8231         .ndo_setup_tc           = ixgbe_setup_tc,
8232 #endif
8233 #ifdef CONFIG_NET_POLL_CONTROLLER
8234         .ndo_poll_controller    = ixgbe_netpoll,
8235 #endif
8236 #ifdef CONFIG_NET_RX_BUSY_POLL
8237         .ndo_busy_poll          = ixgbe_low_latency_recv,
8238 #endif
8239 #ifdef IXGBE_FCOE
8240         .ndo_fcoe_ddp_setup = ixgbe_fcoe_ddp_get,
8241         .ndo_fcoe_ddp_target = ixgbe_fcoe_ddp_target,
8242         .ndo_fcoe_ddp_done = ixgbe_fcoe_ddp_put,
8243         .ndo_fcoe_enable = ixgbe_fcoe_enable,
8244         .ndo_fcoe_disable = ixgbe_fcoe_disable,
8245         .ndo_fcoe_get_wwn = ixgbe_fcoe_get_wwn,
8246         .ndo_fcoe_get_hbainfo = ixgbe_fcoe_get_hbainfo,
8247 #endif /* IXGBE_FCOE */
8248         .ndo_set_features = ixgbe_set_features,
8249         .ndo_fix_features = ixgbe_fix_features,
8250         .ndo_fdb_add            = ixgbe_ndo_fdb_add,
8251         .ndo_bridge_setlink     = ixgbe_ndo_bridge_setlink,
8252         .ndo_bridge_getlink     = ixgbe_ndo_bridge_getlink,
8253         .ndo_dfwd_add_station   = ixgbe_fwd_add,
8254         .ndo_dfwd_del_station   = ixgbe_fwd_del,
8255         .ndo_add_vxlan_port     = ixgbe_add_vxlan_port,
8256         .ndo_del_vxlan_port     = ixgbe_del_vxlan_port,
8257 };
8258
8259 /**
8260  * ixgbe_enumerate_functions - Get the number of ports this device has
8261  * @adapter: adapter structure
8262  *
8263  * This function enumerates the phsyical functions co-located on a single slot,
8264  * in order to determine how many ports a device has. This is most useful in
8265  * determining the required GT/s of PCIe bandwidth necessary for optimal
8266  * performance.
8267  **/
8268 static inline int ixgbe_enumerate_functions(struct ixgbe_adapter *adapter)
8269 {
8270         struct pci_dev *entry, *pdev = adapter->pdev;
8271         int physfns = 0;
8272
8273         /* Some cards can not use the generic count PCIe functions method,
8274          * because they are behind a parent switch, so we hardcode these with
8275          * the correct number of functions.
8276          */
8277         if (ixgbe_pcie_from_parent(&adapter->hw))
8278                 physfns = 4;
8279
8280         list_for_each_entry(entry, &adapter->pdev->bus->devices, bus_list) {
8281                 /* don't count virtual functions */
8282                 if (entry->is_virtfn)
8283                         continue;
8284
8285                 /* When the devices on the bus don't all match our device ID,
8286                  * we can't reliably determine the correct number of
8287                  * functions. This can occur if a function has been direct
8288                  * attached to a virtual machine using VT-d, for example. In
8289                  * this case, simply return -1 to indicate this.
8290                  */
8291                 if ((entry->vendor != pdev->vendor) ||
8292                     (entry->device != pdev->device))
8293                         return -1;
8294
8295                 physfns++;
8296         }
8297
8298         return physfns;
8299 }
8300
8301 /**
8302  * ixgbe_wol_supported - Check whether device supports WoL
8303  * @hw: hw specific details
8304  * @device_id: the device ID
8305  * @subdev_id: the subsystem device ID
8306  *
8307  * This function is used by probe and ethtool to determine
8308  * which devices have WoL support
8309  *
8310  **/
8311 int ixgbe_wol_supported(struct ixgbe_adapter *adapter, u16 device_id,
8312                         u16 subdevice_id)
8313 {
8314         struct ixgbe_hw *hw = &adapter->hw;
8315         u16 wol_cap = adapter->eeprom_cap & IXGBE_DEVICE_CAPS_WOL_MASK;
8316         int is_wol_supported = 0;
8317
8318         switch (device_id) {
8319         case IXGBE_DEV_ID_82599_SFP:
8320                 /* Only these subdevices could supports WOL */
8321                 switch (subdevice_id) {
8322                 case IXGBE_SUBDEV_ID_82599_SFP_WOL0:
8323                 case IXGBE_SUBDEV_ID_82599_560FLR:
8324                         /* only support first port */
8325                         if (hw->bus.func != 0)
8326                                 break;
8327                 case IXGBE_SUBDEV_ID_82599_SP_560FLR:
8328                 case IXGBE_SUBDEV_ID_82599_SFP:
8329                 case IXGBE_SUBDEV_ID_82599_RNDC:
8330                 case IXGBE_SUBDEV_ID_82599_ECNA_DP:
8331                 case IXGBE_SUBDEV_ID_82599_LOM_SFP:
8332                         is_wol_supported = 1;
8333                         break;
8334                 }
8335                 break;
8336         case IXGBE_DEV_ID_82599EN_SFP:
8337                 /* Only this subdevice supports WOL */
8338                 switch (subdevice_id) {
8339                 case IXGBE_SUBDEV_ID_82599EN_SFP_OCP1:
8340                         is_wol_supported = 1;
8341                         break;
8342                 }
8343                 break;
8344         case IXGBE_DEV_ID_82599_COMBO_BACKPLANE:
8345                 /* All except this subdevice support WOL */
8346                 if (subdevice_id != IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ)
8347                         is_wol_supported = 1;
8348                 break;
8349         case IXGBE_DEV_ID_82599_KX4:
8350                 is_wol_supported = 1;
8351                 break;
8352         case IXGBE_DEV_ID_X540T:
8353         case IXGBE_DEV_ID_X540T1:
8354         case IXGBE_DEV_ID_X550T:
8355         case IXGBE_DEV_ID_X550EM_X_KX4:
8356         case IXGBE_DEV_ID_X550EM_X_KR:
8357         case IXGBE_DEV_ID_X550EM_X_10G_T:
8358                 /* check eeprom to see if enabled wol */
8359                 if ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0_1) ||
8360                     ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0) &&
8361                      (hw->bus.func == 0))) {
8362                         is_wol_supported = 1;
8363                 }
8364                 break;
8365         }
8366
8367         return is_wol_supported;
8368 }
8369
8370 /**
8371  * ixgbe_get_platform_mac_addr - Look up MAC address in Open Firmware / IDPROM
8372  * @adapter: Pointer to adapter struct
8373  */
8374 static void ixgbe_get_platform_mac_addr(struct ixgbe_adapter *adapter)
8375 {
8376 #ifdef CONFIG_OF
8377         struct device_node *dp = pci_device_to_OF_node(adapter->pdev);
8378         struct ixgbe_hw *hw = &adapter->hw;
8379         const unsigned char *addr;
8380
8381         addr = of_get_mac_address(dp);
8382         if (addr) {
8383                 ether_addr_copy(hw->mac.perm_addr, addr);
8384                 return;
8385         }
8386 #endif /* CONFIG_OF */
8387
8388 #ifdef CONFIG_SPARC
8389         ether_addr_copy(hw->mac.perm_addr, idprom->id_ethaddr);
8390 #endif /* CONFIG_SPARC */
8391 }
8392
8393 /**
8394  * ixgbe_probe - Device Initialization Routine
8395  * @pdev: PCI device information struct
8396  * @ent: entry in ixgbe_pci_tbl
8397  *
8398  * Returns 0 on success, negative on failure
8399  *
8400  * ixgbe_probe initializes an adapter identified by a pci_dev structure.
8401  * The OS initialization, configuring of the adapter private structure,
8402  * and a hardware reset occur.
8403  **/
8404 static int ixgbe_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
8405 {
8406         struct net_device *netdev;
8407         struct ixgbe_adapter *adapter = NULL;
8408         struct ixgbe_hw *hw;
8409         const struct ixgbe_info *ii = ixgbe_info_tbl[ent->driver_data];
8410         int i, err, pci_using_dac, expected_gts;
8411         unsigned int indices = MAX_TX_QUEUES;
8412         u8 part_str[IXGBE_PBANUM_LENGTH];
8413         bool disable_dev = false;
8414 #ifdef IXGBE_FCOE
8415         u16 device_caps;
8416 #endif
8417         u32 eec;
8418
8419         /* Catch broken hardware that put the wrong VF device ID in
8420          * the PCIe SR-IOV capability.
8421          */
8422         if (pdev->is_virtfn) {
8423                 WARN(1, KERN_ERR "%s (%hx:%hx) should not be a VF!\n",
8424                      pci_name(pdev), pdev->vendor, pdev->device);
8425                 return -EINVAL;
8426         }
8427
8428         err = pci_enable_device_mem(pdev);
8429         if (err)
8430                 return err;
8431
8432         if (!dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64))) {
8433                 pci_using_dac = 1;
8434         } else {
8435                 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
8436                 if (err) {
8437                         dev_err(&pdev->dev,
8438                                 "No usable DMA configuration, aborting\n");
8439                         goto err_dma;
8440                 }
8441                 pci_using_dac = 0;
8442         }
8443
8444         err = pci_request_selected_regions(pdev, pci_select_bars(pdev,
8445                                            IORESOURCE_MEM), ixgbe_driver_name);
8446         if (err) {
8447                 dev_err(&pdev->dev,
8448                         "pci_request_selected_regions failed 0x%x\n", err);
8449                 goto err_pci_reg;
8450         }
8451
8452         pci_enable_pcie_error_reporting(pdev);
8453
8454         pci_set_master(pdev);
8455         pci_save_state(pdev);
8456
8457         if (ii->mac == ixgbe_mac_82598EB) {
8458 #ifdef CONFIG_IXGBE_DCB
8459                 /* 8 TC w/ 4 queues per TC */
8460                 indices = 4 * MAX_TRAFFIC_CLASS;
8461 #else
8462                 indices = IXGBE_MAX_RSS_INDICES;
8463 #endif
8464         }
8465
8466         netdev = alloc_etherdev_mq(sizeof(struct ixgbe_adapter), indices);
8467         if (!netdev) {
8468                 err = -ENOMEM;
8469                 goto err_alloc_etherdev;
8470         }
8471
8472         SET_NETDEV_DEV(netdev, &pdev->dev);
8473
8474         adapter = netdev_priv(netdev);
8475
8476         adapter->netdev = netdev;
8477         adapter->pdev = pdev;
8478         hw = &adapter->hw;
8479         hw->back = adapter;
8480         adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
8481
8482         hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
8483                               pci_resource_len(pdev, 0));
8484         adapter->io_addr = hw->hw_addr;
8485         if (!hw->hw_addr) {
8486                 err = -EIO;
8487                 goto err_ioremap;
8488         }
8489
8490         netdev->netdev_ops = &ixgbe_netdev_ops;
8491         ixgbe_set_ethtool_ops(netdev);
8492         netdev->watchdog_timeo = 5 * HZ;
8493         strlcpy(netdev->name, pci_name(pdev), sizeof(netdev->name));
8494
8495         /* Setup hw api */
8496         memcpy(&hw->mac.ops, ii->mac_ops, sizeof(hw->mac.ops));
8497         hw->mac.type  = ii->mac;
8498         hw->mvals     = ii->mvals;
8499
8500         /* EEPROM */
8501         memcpy(&hw->eeprom.ops, ii->eeprom_ops, sizeof(hw->eeprom.ops));
8502         eec = IXGBE_READ_REG(hw, IXGBE_EEC(hw));
8503         if (ixgbe_removed(hw->hw_addr)) {
8504                 err = -EIO;
8505                 goto err_ioremap;
8506         }
8507         /* If EEPROM is valid (bit 8 = 1), use default otherwise use bit bang */
8508         if (!(eec & (1 << 8)))
8509                 hw->eeprom.ops.read = &ixgbe_read_eeprom_bit_bang_generic;
8510
8511         /* PHY */
8512         memcpy(&hw->phy.ops, ii->phy_ops, sizeof(hw->phy.ops));
8513         hw->phy.sfp_type = ixgbe_sfp_type_unknown;
8514         /* ixgbe_identify_phy_generic will set prtad and mmds properly */
8515         hw->phy.mdio.prtad = MDIO_PRTAD_NONE;
8516         hw->phy.mdio.mmds = 0;
8517         hw->phy.mdio.mode_support = MDIO_SUPPORTS_C45 | MDIO_EMULATE_C22;
8518         hw->phy.mdio.dev = netdev;
8519         hw->phy.mdio.mdio_read = ixgbe_mdio_read;
8520         hw->phy.mdio.mdio_write = ixgbe_mdio_write;
8521
8522         ii->get_invariants(hw);
8523
8524         /* setup the private structure */
8525         err = ixgbe_sw_init(adapter);
8526         if (err)
8527                 goto err_sw_init;
8528
8529         /* Make it possible the adapter to be woken up via WOL */
8530         switch (adapter->hw.mac.type) {
8531         case ixgbe_mac_82599EB:
8532         case ixgbe_mac_X540:
8533         case ixgbe_mac_X550:
8534         case ixgbe_mac_X550EM_x:
8535                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
8536                 break;
8537         default:
8538                 break;
8539         }
8540
8541         /*
8542          * If there is a fan on this device and it has failed log the
8543          * failure.
8544          */
8545         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
8546                 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
8547                 if (esdp & IXGBE_ESDP_SDP1)
8548                         e_crit(probe, "Fan has stopped, replace the adapter\n");
8549         }
8550
8551         if (allow_unsupported_sfp)
8552                 hw->allow_unsupported_sfp = allow_unsupported_sfp;
8553
8554         /* reset_hw fills in the perm_addr as well */
8555         hw->phy.reset_if_overtemp = true;
8556         err = hw->mac.ops.reset_hw(hw);
8557         hw->phy.reset_if_overtemp = false;
8558         if (err == IXGBE_ERR_SFP_NOT_PRESENT &&
8559             hw->mac.type == ixgbe_mac_82598EB) {
8560                 err = 0;
8561         } else if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) {
8562                 e_dev_err("failed to load because an unsupported SFP+ or QSFP module type was detected.\n");
8563                 e_dev_err("Reload the driver after installing a supported module.\n");
8564                 goto err_sw_init;
8565         } else if (err) {
8566                 e_dev_err("HW Init failed: %d\n", err);
8567                 goto err_sw_init;
8568         }
8569
8570 #ifdef CONFIG_PCI_IOV
8571         /* SR-IOV not supported on the 82598 */
8572         if (adapter->hw.mac.type == ixgbe_mac_82598EB)
8573                 goto skip_sriov;
8574         /* Mailbox */
8575         ixgbe_init_mbx_params_pf(hw);
8576         memcpy(&hw->mbx.ops, ii->mbx_ops, sizeof(hw->mbx.ops));
8577         pci_sriov_set_totalvfs(pdev, IXGBE_MAX_VFS_DRV_LIMIT);
8578         ixgbe_enable_sriov(adapter);
8579 skip_sriov:
8580
8581 #endif
8582         netdev->features = NETIF_F_SG |
8583                            NETIF_F_IP_CSUM |
8584                            NETIF_F_IPV6_CSUM |
8585                            NETIF_F_HW_VLAN_CTAG_TX |
8586                            NETIF_F_HW_VLAN_CTAG_RX |
8587                            NETIF_F_TSO |
8588                            NETIF_F_TSO6 |
8589                            NETIF_F_RXHASH |
8590                            NETIF_F_RXCSUM;
8591
8592         netdev->hw_features = netdev->features | NETIF_F_HW_L2FW_DOFFLOAD;
8593
8594         switch (adapter->hw.mac.type) {
8595         case ixgbe_mac_82599EB:
8596         case ixgbe_mac_X540:
8597         case ixgbe_mac_X550:
8598         case ixgbe_mac_X550EM_x:
8599                 netdev->features |= NETIF_F_SCTP_CSUM;
8600                 netdev->hw_features |= NETIF_F_SCTP_CSUM |
8601                                        NETIF_F_NTUPLE;
8602                 break;
8603         default:
8604                 break;
8605         }
8606
8607         netdev->hw_features |= NETIF_F_RXALL;
8608         netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER;
8609
8610         netdev->vlan_features |= NETIF_F_TSO;
8611         netdev->vlan_features |= NETIF_F_TSO6;
8612         netdev->vlan_features |= NETIF_F_IP_CSUM;
8613         netdev->vlan_features |= NETIF_F_IPV6_CSUM;
8614         netdev->vlan_features |= NETIF_F_SG;
8615
8616         netdev->priv_flags |= IFF_UNICAST_FLT;
8617         netdev->priv_flags |= IFF_SUPP_NOFCS;
8618
8619         switch (adapter->hw.mac.type) {
8620         case ixgbe_mac_X550:
8621         case ixgbe_mac_X550EM_x:
8622                 netdev->hw_enc_features |= NETIF_F_RXCSUM;
8623                 break;
8624         default:
8625                 break;
8626         }
8627
8628 #ifdef CONFIG_IXGBE_DCB
8629         netdev->dcbnl_ops = &dcbnl_ops;
8630 #endif
8631
8632 #ifdef IXGBE_FCOE
8633         if (adapter->flags & IXGBE_FLAG_FCOE_CAPABLE) {
8634                 unsigned int fcoe_l;
8635
8636                 if (hw->mac.ops.get_device_caps) {
8637                         hw->mac.ops.get_device_caps(hw, &device_caps);
8638                         if (device_caps & IXGBE_DEVICE_CAPS_FCOE_OFFLOADS)
8639                                 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
8640                 }
8641
8642
8643                 fcoe_l = min_t(int, IXGBE_FCRETA_SIZE, num_online_cpus());
8644                 adapter->ring_feature[RING_F_FCOE].limit = fcoe_l;
8645
8646                 netdev->features |= NETIF_F_FSO |
8647                                     NETIF_F_FCOE_CRC;
8648
8649                 netdev->vlan_features |= NETIF_F_FSO |
8650                                          NETIF_F_FCOE_CRC |
8651                                          NETIF_F_FCOE_MTU;
8652         }
8653 #endif /* IXGBE_FCOE */
8654         if (pci_using_dac) {
8655                 netdev->features |= NETIF_F_HIGHDMA;
8656                 netdev->vlan_features |= NETIF_F_HIGHDMA;
8657         }
8658
8659         if (adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE)
8660                 netdev->hw_features |= NETIF_F_LRO;
8661         if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
8662                 netdev->features |= NETIF_F_LRO;
8663
8664         /* make sure the EEPROM is good */
8665         if (hw->eeprom.ops.validate_checksum(hw, NULL) < 0) {
8666                 e_dev_err("The EEPROM Checksum Is Not Valid\n");
8667                 err = -EIO;
8668                 goto err_sw_init;
8669         }
8670
8671         ixgbe_get_platform_mac_addr(adapter);
8672
8673         memcpy(netdev->dev_addr, hw->mac.perm_addr, netdev->addr_len);
8674
8675         if (!is_valid_ether_addr(netdev->dev_addr)) {
8676                 e_dev_err("invalid MAC address\n");
8677                 err = -EIO;
8678                 goto err_sw_init;
8679         }
8680
8681         ixgbe_mac_set_default_filter(adapter, hw->mac.perm_addr);
8682
8683         setup_timer(&adapter->service_timer, &ixgbe_service_timer,
8684                     (unsigned long) adapter);
8685
8686         if (ixgbe_removed(hw->hw_addr)) {
8687                 err = -EIO;
8688                 goto err_sw_init;
8689         }
8690         INIT_WORK(&adapter->service_task, ixgbe_service_task);
8691         set_bit(__IXGBE_SERVICE_INITED, &adapter->state);
8692         clear_bit(__IXGBE_SERVICE_SCHED, &adapter->state);
8693
8694         err = ixgbe_init_interrupt_scheme(adapter);
8695         if (err)
8696                 goto err_sw_init;
8697
8698         /* WOL not supported for all devices */
8699         adapter->wol = 0;
8700         hw->eeprom.ops.read(hw, 0x2c, &adapter->eeprom_cap);
8701         hw->wol_enabled = ixgbe_wol_supported(adapter, pdev->device,
8702                                                 pdev->subsystem_device);
8703         if (hw->wol_enabled)
8704                 adapter->wol = IXGBE_WUFC_MAG;
8705
8706         device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
8707
8708         /* save off EEPROM version number */
8709         hw->eeprom.ops.read(hw, 0x2e, &adapter->eeprom_verh);
8710         hw->eeprom.ops.read(hw, 0x2d, &adapter->eeprom_verl);
8711
8712         /* pick up the PCI bus settings for reporting later */
8713         hw->mac.ops.get_bus_info(hw);
8714         if (ixgbe_pcie_from_parent(hw))
8715                 ixgbe_get_parent_bus_info(adapter);
8716
8717         /* calculate the expected PCIe bandwidth required for optimal
8718          * performance. Note that some older parts will never have enough
8719          * bandwidth due to being older generation PCIe parts. We clamp these
8720          * parts to ensure no warning is displayed if it can't be fixed.
8721          */
8722         switch (hw->mac.type) {
8723         case ixgbe_mac_82598EB:
8724                 expected_gts = min(ixgbe_enumerate_functions(adapter) * 10, 16);
8725                 break;
8726         default:
8727                 expected_gts = ixgbe_enumerate_functions(adapter) * 10;
8728                 break;
8729         }
8730
8731         /* don't check link if we failed to enumerate functions */
8732         if (expected_gts > 0)
8733                 ixgbe_check_minimum_link(adapter, expected_gts);
8734
8735         err = ixgbe_read_pba_string_generic(hw, part_str, sizeof(part_str));
8736         if (err)
8737                 strlcpy(part_str, "Unknown", sizeof(part_str));
8738         if (ixgbe_is_sfp(hw) && hw->phy.sfp_type != ixgbe_sfp_type_not_present)
8739                 e_dev_info("MAC: %d, PHY: %d, SFP+: %d, PBA No: %s\n",
8740                            hw->mac.type, hw->phy.type, hw->phy.sfp_type,
8741                            part_str);
8742         else
8743                 e_dev_info("MAC: %d, PHY: %d, PBA No: %s\n",
8744                            hw->mac.type, hw->phy.type, part_str);
8745
8746         e_dev_info("%pM\n", netdev->dev_addr);
8747
8748         /* reset the hardware with the new settings */
8749         err = hw->mac.ops.start_hw(hw);
8750         if (err == IXGBE_ERR_EEPROM_VERSION) {
8751                 /* We are running on a pre-production device, log a warning */
8752                 e_dev_warn("This device is a pre-production adapter/LOM. "
8753                            "Please be aware there may be issues associated "
8754                            "with your hardware.  If you are experiencing "
8755                            "problems please contact your Intel or hardware "
8756                            "representative who provided you with this "
8757                            "hardware.\n");
8758         }
8759         strcpy(netdev->name, "eth%d");
8760         err = register_netdev(netdev);
8761         if (err)
8762                 goto err_register;
8763
8764         pci_set_drvdata(pdev, adapter);
8765
8766         /* power down the optics for 82599 SFP+ fiber */
8767         if (hw->mac.ops.disable_tx_laser)
8768                 hw->mac.ops.disable_tx_laser(hw);
8769
8770         /* carrier off reporting is important to ethtool even BEFORE open */
8771         netif_carrier_off(netdev);
8772
8773 #ifdef CONFIG_IXGBE_DCA
8774         if (dca_add_requester(&pdev->dev) == 0) {
8775                 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
8776                 ixgbe_setup_dca(adapter);
8777         }
8778 #endif
8779         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
8780                 e_info(probe, "IOV is enabled with %d VFs\n", adapter->num_vfs);
8781                 for (i = 0; i < adapter->num_vfs; i++)
8782                         ixgbe_vf_configuration(pdev, (i | 0x10000000));
8783         }
8784
8785         /* firmware requires driver version to be 0xFFFFFFFF
8786          * since os does not support feature
8787          */
8788         if (hw->mac.ops.set_fw_drv_ver)
8789                 hw->mac.ops.set_fw_drv_ver(hw, 0xFF, 0xFF, 0xFF,
8790                                            0xFF);
8791
8792         /* add san mac addr to netdev */
8793         ixgbe_add_sanmac_netdev(netdev);
8794
8795         e_dev_info("%s\n", ixgbe_default_device_descr);
8796
8797 #ifdef CONFIG_IXGBE_HWMON
8798         if (ixgbe_sysfs_init(adapter))
8799                 e_err(probe, "failed to allocate sysfs resources\n");
8800 #endif /* CONFIG_IXGBE_HWMON */
8801
8802         ixgbe_dbg_adapter_init(adapter);
8803
8804         /* setup link for SFP devices with MNG FW, else wait for IXGBE_UP */
8805         if (ixgbe_mng_enabled(hw) && ixgbe_is_sfp(hw) && hw->mac.ops.setup_link)
8806                 hw->mac.ops.setup_link(hw,
8807                         IXGBE_LINK_SPEED_10GB_FULL | IXGBE_LINK_SPEED_1GB_FULL,
8808                         true);
8809
8810         return 0;
8811
8812 err_register:
8813         ixgbe_release_hw_control(adapter);
8814         ixgbe_clear_interrupt_scheme(adapter);
8815 err_sw_init:
8816         ixgbe_disable_sriov(adapter);
8817         adapter->flags2 &= ~IXGBE_FLAG2_SEARCH_FOR_SFP;
8818         iounmap(adapter->io_addr);
8819         kfree(adapter->mac_table);
8820 err_ioremap:
8821         disable_dev = !test_and_set_bit(__IXGBE_DISABLED, &adapter->state);
8822         free_netdev(netdev);
8823 err_alloc_etherdev:
8824         pci_release_selected_regions(pdev,
8825                                      pci_select_bars(pdev, IORESOURCE_MEM));
8826 err_pci_reg:
8827 err_dma:
8828         if (!adapter || disable_dev)
8829                 pci_disable_device(pdev);
8830         return err;
8831 }
8832
8833 /**
8834  * ixgbe_remove - Device Removal Routine
8835  * @pdev: PCI device information struct
8836  *
8837  * ixgbe_remove is called by the PCI subsystem to alert the driver
8838  * that it should release a PCI device.  The could be caused by a
8839  * Hot-Plug event, or because the driver is going to be removed from
8840  * memory.
8841  **/
8842 static void ixgbe_remove(struct pci_dev *pdev)
8843 {
8844         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
8845         struct net_device *netdev;
8846         bool disable_dev;
8847
8848         /* if !adapter then we already cleaned up in probe */
8849         if (!adapter)
8850                 return;
8851
8852         netdev  = adapter->netdev;
8853         ixgbe_dbg_adapter_exit(adapter);
8854
8855         set_bit(__IXGBE_REMOVING, &adapter->state);
8856         cancel_work_sync(&adapter->service_task);
8857
8858
8859 #ifdef CONFIG_IXGBE_DCA
8860         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
8861                 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
8862                 dca_remove_requester(&pdev->dev);
8863                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 1);
8864         }
8865
8866 #endif
8867 #ifdef CONFIG_IXGBE_HWMON
8868         ixgbe_sysfs_exit(adapter);
8869 #endif /* CONFIG_IXGBE_HWMON */
8870
8871         /* remove the added san mac */
8872         ixgbe_del_sanmac_netdev(netdev);
8873
8874         if (netdev->reg_state == NETREG_REGISTERED)
8875                 unregister_netdev(netdev);
8876
8877 #ifdef CONFIG_PCI_IOV
8878         /*
8879          * Only disable SR-IOV on unload if the user specified the now
8880          * deprecated max_vfs module parameter.
8881          */
8882         if (max_vfs)
8883                 ixgbe_disable_sriov(adapter);
8884 #endif
8885         ixgbe_clear_interrupt_scheme(adapter);
8886
8887         ixgbe_release_hw_control(adapter);
8888
8889 #ifdef CONFIG_DCB
8890         kfree(adapter->ixgbe_ieee_pfc);
8891         kfree(adapter->ixgbe_ieee_ets);
8892
8893 #endif
8894         iounmap(adapter->io_addr);
8895         pci_release_selected_regions(pdev, pci_select_bars(pdev,
8896                                      IORESOURCE_MEM));
8897
8898         e_dev_info("complete\n");
8899
8900         kfree(adapter->mac_table);
8901         disable_dev = !test_and_set_bit(__IXGBE_DISABLED, &adapter->state);
8902         free_netdev(netdev);
8903
8904         pci_disable_pcie_error_reporting(pdev);
8905
8906         if (disable_dev)
8907                 pci_disable_device(pdev);
8908 }
8909
8910 /**
8911  * ixgbe_io_error_detected - called when PCI error is detected
8912  * @pdev: Pointer to PCI device
8913  * @state: The current pci connection state
8914  *
8915  * This function is called after a PCI bus error affecting
8916  * this device has been detected.
8917  */
8918 static pci_ers_result_t ixgbe_io_error_detected(struct pci_dev *pdev,
8919                                                 pci_channel_state_t state)
8920 {
8921         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
8922         struct net_device *netdev = adapter->netdev;
8923
8924 #ifdef CONFIG_PCI_IOV
8925         struct ixgbe_hw *hw = &adapter->hw;
8926         struct pci_dev *bdev, *vfdev;
8927         u32 dw0, dw1, dw2, dw3;
8928         int vf, pos;
8929         u16 req_id, pf_func;
8930
8931         if (adapter->hw.mac.type == ixgbe_mac_82598EB ||
8932             adapter->num_vfs == 0)
8933                 goto skip_bad_vf_detection;
8934
8935         bdev = pdev->bus->self;
8936         while (bdev && (pci_pcie_type(bdev) != PCI_EXP_TYPE_ROOT_PORT))
8937                 bdev = bdev->bus->self;
8938
8939         if (!bdev)
8940                 goto skip_bad_vf_detection;
8941
8942         pos = pci_find_ext_capability(bdev, PCI_EXT_CAP_ID_ERR);
8943         if (!pos)
8944                 goto skip_bad_vf_detection;
8945
8946         dw0 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG);
8947         dw1 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 4);
8948         dw2 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 8);
8949         dw3 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 12);
8950         if (ixgbe_removed(hw->hw_addr))
8951                 goto skip_bad_vf_detection;
8952
8953         req_id = dw1 >> 16;
8954         /* On the 82599 if bit 7 of the requestor ID is set then it's a VF */
8955         if (!(req_id & 0x0080))
8956                 goto skip_bad_vf_detection;
8957
8958         pf_func = req_id & 0x01;
8959         if ((pf_func & 1) == (pdev->devfn & 1)) {
8960                 unsigned int device_id;
8961
8962                 vf = (req_id & 0x7F) >> 1;
8963                 e_dev_err("VF %d has caused a PCIe error\n", vf);
8964                 e_dev_err("TLP: dw0: %8.8x\tdw1: %8.8x\tdw2: "
8965                                 "%8.8x\tdw3: %8.8x\n",
8966                 dw0, dw1, dw2, dw3);
8967                 switch (adapter->hw.mac.type) {
8968                 case ixgbe_mac_82599EB:
8969                         device_id = IXGBE_82599_VF_DEVICE_ID;
8970                         break;
8971                 case ixgbe_mac_X540:
8972                         device_id = IXGBE_X540_VF_DEVICE_ID;
8973                         break;
8974                 case ixgbe_mac_X550:
8975                         device_id = IXGBE_DEV_ID_X550_VF;
8976                         break;
8977                 case ixgbe_mac_X550EM_x:
8978                         device_id = IXGBE_DEV_ID_X550EM_X_VF;
8979                         break;
8980                 default:
8981                         device_id = 0;
8982                         break;
8983                 }
8984
8985                 /* Find the pci device of the offending VF */
8986                 vfdev = pci_get_device(PCI_VENDOR_ID_INTEL, device_id, NULL);
8987                 while (vfdev) {
8988                         if (vfdev->devfn == (req_id & 0xFF))
8989                                 break;
8990                         vfdev = pci_get_device(PCI_VENDOR_ID_INTEL,
8991                                                device_id, vfdev);
8992                 }
8993                 /*
8994                  * There's a slim chance the VF could have been hot plugged,
8995                  * so if it is no longer present we don't need to issue the
8996                  * VFLR.  Just clean up the AER in that case.
8997                  */
8998                 if (vfdev) {
8999                         ixgbe_issue_vf_flr(adapter, vfdev);
9000                         /* Free device reference count */
9001                         pci_dev_put(vfdev);
9002                 }
9003
9004                 pci_cleanup_aer_uncorrect_error_status(pdev);
9005         }
9006
9007         /*
9008          * Even though the error may have occurred on the other port
9009          * we still need to increment the vf error reference count for
9010          * both ports because the I/O resume function will be called
9011          * for both of them.
9012          */
9013         adapter->vferr_refcount++;
9014
9015         return PCI_ERS_RESULT_RECOVERED;
9016
9017 skip_bad_vf_detection:
9018 #endif /* CONFIG_PCI_IOV */
9019         if (!test_bit(__IXGBE_SERVICE_INITED, &adapter->state))
9020                 return PCI_ERS_RESULT_DISCONNECT;
9021
9022         rtnl_lock();
9023         netif_device_detach(netdev);
9024
9025         if (state == pci_channel_io_perm_failure) {
9026                 rtnl_unlock();
9027                 return PCI_ERS_RESULT_DISCONNECT;
9028         }
9029
9030         if (netif_running(netdev))
9031                 ixgbe_down(adapter);
9032
9033         if (!test_and_set_bit(__IXGBE_DISABLED, &adapter->state))
9034                 pci_disable_device(pdev);
9035         rtnl_unlock();
9036
9037         /* Request a slot reset. */
9038         return PCI_ERS_RESULT_NEED_RESET;
9039 }
9040
9041 /**
9042  * ixgbe_io_slot_reset - called after the pci bus has been reset.
9043  * @pdev: Pointer to PCI device
9044  *
9045  * Restart the card from scratch, as if from a cold-boot.
9046  */
9047 static pci_ers_result_t ixgbe_io_slot_reset(struct pci_dev *pdev)
9048 {
9049         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
9050         pci_ers_result_t result;
9051         int err;
9052
9053         if (pci_enable_device_mem(pdev)) {
9054                 e_err(probe, "Cannot re-enable PCI device after reset.\n");
9055                 result = PCI_ERS_RESULT_DISCONNECT;
9056         } else {
9057                 smp_mb__before_atomic();
9058                 clear_bit(__IXGBE_DISABLED, &adapter->state);
9059                 adapter->hw.hw_addr = adapter->io_addr;
9060                 pci_set_master(pdev);
9061                 pci_restore_state(pdev);
9062                 pci_save_state(pdev);
9063
9064                 pci_wake_from_d3(pdev, false);
9065
9066                 ixgbe_reset(adapter);
9067                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
9068                 result = PCI_ERS_RESULT_RECOVERED;
9069         }
9070
9071         err = pci_cleanup_aer_uncorrect_error_status(pdev);
9072         if (err) {
9073                 e_dev_err("pci_cleanup_aer_uncorrect_error_status "
9074                           "failed 0x%0x\n", err);
9075                 /* non-fatal, continue */
9076         }
9077
9078         return result;
9079 }
9080
9081 /**
9082  * ixgbe_io_resume - called when traffic can start flowing again.
9083  * @pdev: Pointer to PCI device
9084  *
9085  * This callback is called when the error recovery driver tells us that
9086  * its OK to resume normal operation.
9087  */
9088 static void ixgbe_io_resume(struct pci_dev *pdev)
9089 {
9090         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
9091         struct net_device *netdev = adapter->netdev;
9092
9093 #ifdef CONFIG_PCI_IOV
9094         if (adapter->vferr_refcount) {
9095                 e_info(drv, "Resuming after VF err\n");
9096                 adapter->vferr_refcount--;
9097                 return;
9098         }
9099
9100 #endif
9101         if (netif_running(netdev))
9102                 ixgbe_up(adapter);
9103
9104         netif_device_attach(netdev);
9105 }
9106
9107 static const struct pci_error_handlers ixgbe_err_handler = {
9108         .error_detected = ixgbe_io_error_detected,
9109         .slot_reset = ixgbe_io_slot_reset,
9110         .resume = ixgbe_io_resume,
9111 };
9112
9113 static struct pci_driver ixgbe_driver = {
9114         .name     = ixgbe_driver_name,
9115         .id_table = ixgbe_pci_tbl,
9116         .probe    = ixgbe_probe,
9117         .remove   = ixgbe_remove,
9118 #ifdef CONFIG_PM
9119         .suspend  = ixgbe_suspend,
9120         .resume   = ixgbe_resume,
9121 #endif
9122         .shutdown = ixgbe_shutdown,
9123         .sriov_configure = ixgbe_pci_sriov_configure,
9124         .err_handler = &ixgbe_err_handler
9125 };
9126
9127 /**
9128  * ixgbe_init_module - Driver Registration Routine
9129  *
9130  * ixgbe_init_module is the first routine called when the driver is
9131  * loaded. All it does is register with the PCI subsystem.
9132  **/
9133 static int __init ixgbe_init_module(void)
9134 {
9135         int ret;
9136         pr_info("%s - version %s\n", ixgbe_driver_string, ixgbe_driver_version);
9137         pr_info("%s\n", ixgbe_copyright);
9138
9139         ixgbe_dbg_init();
9140
9141         ret = pci_register_driver(&ixgbe_driver);
9142         if (ret) {
9143                 ixgbe_dbg_exit();
9144                 return ret;
9145         }
9146
9147 #ifdef CONFIG_IXGBE_DCA
9148         dca_register_notify(&dca_notifier);
9149 #endif
9150
9151         return 0;
9152 }
9153
9154 module_init(ixgbe_init_module);
9155
9156 /**
9157  * ixgbe_exit_module - Driver Exit Cleanup Routine
9158  *
9159  * ixgbe_exit_module is called just before the driver is removed
9160  * from memory.
9161  **/
9162 static void __exit ixgbe_exit_module(void)
9163 {
9164 #ifdef CONFIG_IXGBE_DCA
9165         dca_unregister_notify(&dca_notifier);
9166 #endif
9167         pci_unregister_driver(&ixgbe_driver);
9168
9169         ixgbe_dbg_exit();
9170 }
9171
9172 #ifdef CONFIG_IXGBE_DCA
9173 static int ixgbe_notify_dca(struct notifier_block *nb, unsigned long event,
9174                             void *p)
9175 {
9176         int ret_val;
9177
9178         ret_val = driver_for_each_device(&ixgbe_driver.driver, NULL, &event,
9179                                          __ixgbe_notify_dca);
9180
9181         return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
9182 }
9183
9184 #endif /* CONFIG_IXGBE_DCA */
9185
9186 module_exit(ixgbe_exit_module);
9187
9188 /* ixgbe_main.c */