drivers/net/ethernet/intel/igb/igb_main.c

   1 /*******************************************************************************
   2
   3   Intel(R) Gigabit Ethernet Linux driver
   4   Copyright(c) 2007-2013 Intel Corporation.
   5
   6   This program is free software; you can redistribute it and/or modify it
   7   under the terms and conditions of the GNU General Public License,
   8   version 2, as published by the Free Software Foundation.
   9
  10   This program is distributed in the hope it will be useful, but WITHOUT
  11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13   more details.
  14
  15   You should have received a copy of the GNU General Public License along with
  16   this program; if not, write to the Free Software Foundation, Inc.,
  17   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  18
  19   The full GNU General Public License is included in this distribution in
  20   the file called "COPYING".
  21
  22   Contact Information:
  23   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  24   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  25
  26 *******************************************************************************/
  27
  28 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  29
  30 #include <linux/module.h>
  31 #include <linux/types.h>
  32 #include <linux/init.h>
  33 #include <linux/bitops.h>
  34 #include <linux/vmalloc.h>
  35 #include <linux/pagemap.h>
  36 #include <linux/netdevice.h>
  37 #include <linux/ipv6.h>
  38 #include <linux/slab.h>
  39 #include <net/checksum.h>
  40 #include <net/ip6_checksum.h>
  41 #include <linux/net_tstamp.h>
  42 #include <linux/mii.h>
  43 #include <linux/ethtool.h>
  44 #include <linux/if.h>
  45 #include <linux/if_vlan.h>
  46 #include <linux/pci.h>
  47 #include <linux/pci-aspm.h>
  48 #include <linux/delay.h>
  49 #include <linux/interrupt.h>
  50 #include <linux/ip.h>
  51 #include <linux/tcp.h>
  52 #include <linux/sctp.h>
  53 #include <linux/if_ether.h>
  54 #include <linux/aer.h>
  55 #include <linux/prefetch.h>
  56 #include <linux/pm_runtime.h>
  57 #ifdef CONFIG_IGB_DCA
  58 #include <linux/dca.h>
  59 #endif
  60 #include <linux/i2c.h>
  61 #include "igb.h"
  62
  63 #define MAJ 5
  64 #define MIN 0
  65 #define BUILD 5
  66 #define DRV_VERSION __stringify(MAJ) "." __stringify(MIN) "." \
  67 __stringify(BUILD) "-k"
  68 char igb_driver_name[] = "igb";
  69 char igb_driver_version[] = DRV_VERSION;
  70 static const char igb_driver_string[] =
  71                                 "Intel(R) Gigabit Ethernet Network Driver";
  72 static const char igb_copyright[] =
  73                                 "Copyright (c) 2007-2013 Intel Corporation.";
  74
  75 static const struct e1000_info *igb_info_tbl[] = {
  76         [board_82575] = &e1000_82575_info,
  77 };
  78
  79 static DEFINE_PCI_DEVICE_TABLE(igb_pci_tbl) = {
  80         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_BACKPLANE_1GBPS) },
  81         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_SGMII) },
  82         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_BACKPLANE_2_5GBPS) },
  83         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I211_COPPER), board_82575 },
  84         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_COPPER), board_82575 },
  85         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_FIBER), board_82575 },
  86         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SERDES), board_82575 },
  87         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SGMII), board_82575 },
  88         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_COPPER_FLASHLESS), board_82575 },
  89         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SERDES_FLASHLESS), board_82575 },
  90         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_COPPER), board_82575 },
  91         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_FIBER), board_82575 },
  92         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_SERDES), board_82575 },
  93         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_SGMII), board_82575 },
  94         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_COPPER), board_82575 },
  95         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_FIBER), board_82575 },
  96         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_QUAD_FIBER), board_82575 },
  97         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_SERDES), board_82575 },
  98         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_SGMII), board_82575 },
  99         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_COPPER_DUAL), board_82575 },
 100         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SGMII), board_82575 },
 101         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SERDES), board_82575 },
 102         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_BACKPLANE), board_82575 },
 103         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SFP), board_82575 },
 104         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576), board_82575 },
 105         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_NS), board_82575 },
 106         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_NS_SERDES), board_82575 },
 107         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_FIBER), board_82575 },
 108         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES), board_82575 },
 109         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES_QUAD), board_82575 },
 110         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_QUAD_COPPER_ET2), board_82575 },
 111         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_QUAD_COPPER), board_82575 },
 112         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_COPPER), board_82575 },
 113         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_FIBER_SERDES), board_82575 },
 114         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575GB_QUAD_COPPER), board_82575 },
 115         /* required last entry */
 116         {0, }
 117 };
 118
 119 MODULE_DEVICE_TABLE(pci, igb_pci_tbl);
 120
 121 void igb_reset(struct igb_adapter *);
 122 static int igb_setup_all_tx_resources(struct igb_adapter *);
 123 static int igb_setup_all_rx_resources(struct igb_adapter *);
 124 static void igb_free_all_tx_resources(struct igb_adapter *);
 125 static void igb_free_all_rx_resources(struct igb_adapter *);
 126 static void igb_setup_mrqc(struct igb_adapter *);
 127 static int igb_probe(struct pci_dev *, const struct pci_device_id *);
 128 static void igb_remove(struct pci_dev *pdev);
 129 static int igb_sw_init(struct igb_adapter *);
 130 static int igb_open(struct net_device *);
 131 static int igb_close(struct net_device *);
 132 static void igb_configure(struct igb_adapter *);
 133 static void igb_configure_tx(struct igb_adapter *);
 134 static void igb_configure_rx(struct igb_adapter *);
 135 static void igb_clean_all_tx_rings(struct igb_adapter *);
 136 static void igb_clean_all_rx_rings(struct igb_adapter *);
 137 static void igb_clean_tx_ring(struct igb_ring *);
 138 static void igb_clean_rx_ring(struct igb_ring *);
 139 static void igb_set_rx_mode(struct net_device *);
 140 static void igb_update_phy_info(unsigned long);
 141 static void igb_watchdog(unsigned long);
 142 static void igb_watchdog_task(struct work_struct *);
 143 static netdev_tx_t igb_xmit_frame(struct sk_buff *skb, struct net_device *);
 144 static struct rtnl_link_stats64 *igb_get_stats64(struct net_device *dev,
 145                                                  struct rtnl_link_stats64 *stats);
 146 static int igb_change_mtu(struct net_device *, int);
 147 static int igb_set_mac(struct net_device *, void *);
 148 static void igb_set_uta(struct igb_adapter *adapter);
 149 static irqreturn_t igb_intr(int irq, void *);
 150 static irqreturn_t igb_intr_msi(int irq, void *);
 151 static irqreturn_t igb_msix_other(int irq, void *);
 152 static irqreturn_t igb_msix_ring(int irq, void *);
 153 #ifdef CONFIG_IGB_DCA
 154 static void igb_update_dca(struct igb_q_vector *);
 155 static void igb_setup_dca(struct igb_adapter *);
 156 #endif /* CONFIG_IGB_DCA */
 157 static int igb_poll(struct napi_struct *, int);
 158 static bool igb_clean_tx_irq(struct igb_q_vector *);
 159 static bool igb_clean_rx_irq(struct igb_q_vector *, int);
 160 static int igb_ioctl(struct net_device *, struct ifreq *, int cmd);
 161 static void igb_tx_timeout(struct net_device *);
 162 static void igb_reset_task(struct work_struct *);
 163 static void igb_vlan_mode(struct net_device *netdev, netdev_features_t features);
 164 static int igb_vlan_rx_add_vid(struct net_device *, __be16, u16);
 165 static int igb_vlan_rx_kill_vid(struct net_device *, __be16, u16);
 166 static void igb_restore_vlan(struct igb_adapter *);
 167 static void igb_rar_set_qsel(struct igb_adapter *, u8 *, u32 , u8);
 168 static void igb_ping_all_vfs(struct igb_adapter *);
 169 static void igb_msg_task(struct igb_adapter *);
 170 static void igb_vmm_control(struct igb_adapter *);
 171 static int igb_set_vf_mac(struct igb_adapter *, int, unsigned char *);
 172 static void igb_restore_vf_multicasts(struct igb_adapter *adapter);
 173 static int igb_ndo_set_vf_mac(struct net_device *netdev, int vf, u8 *mac);
 174 static int igb_ndo_set_vf_vlan(struct net_device *netdev,
 175                                int vf, u16 vlan, u8 qos);
 176 static int igb_ndo_set_vf_bw(struct net_device *netdev, int vf, int tx_rate);
 177 static int igb_ndo_set_vf_spoofchk(struct net_device *netdev, int vf,
 178                                    bool setting);
 179 static int igb_ndo_get_vf_config(struct net_device *netdev, int vf,
 180                                  struct ifla_vf_info *ivi);
 181 static void igb_check_vf_rate_limit(struct igb_adapter *);
 182
 183 #ifdef CONFIG_PCI_IOV
 184 static int igb_vf_configure(struct igb_adapter *adapter, int vf);
 185 #endif
 186
 187 #ifdef CONFIG_PM
 188 #ifdef CONFIG_PM_SLEEP
 189 static int igb_suspend(struct device *);
 190 #endif
 191 static int igb_resume(struct device *);
 192 #ifdef CONFIG_PM_RUNTIME
 193 static int igb_runtime_suspend(struct device *dev);
 194 static int igb_runtime_resume(struct device *dev);
 195 static int igb_runtime_idle(struct device *dev);
 196 #endif
 197 static const struct dev_pm_ops igb_pm_ops = {
 198         SET_SYSTEM_SLEEP_PM_OPS(igb_suspend, igb_resume)
 199         SET_RUNTIME_PM_OPS(igb_runtime_suspend, igb_runtime_resume,
 200                         igb_runtime_idle)
 201 };
 202 #endif
 203 static void igb_shutdown(struct pci_dev *);
 204 static int igb_pci_sriov_configure(struct pci_dev *dev, int num_vfs);
 205 #ifdef CONFIG_IGB_DCA
 206 static int igb_notify_dca(struct notifier_block *, unsigned long, void *);
 207 static struct notifier_block dca_notifier = {
 208         .notifier_call  = igb_notify_dca,
 209         .next           = NULL,
 210         .priority       = 0
 211 };
 212 #endif
 213 #ifdef CONFIG_NET_POLL_CONTROLLER
 214 /* for netdump / net console */
 215 static void igb_netpoll(struct net_device *);
 216 #endif
 217 #ifdef CONFIG_PCI_IOV
 218 static unsigned int max_vfs = 0;
 219 module_param(max_vfs, uint, 0);
 220 MODULE_PARM_DESC(max_vfs, "Maximum number of virtual functions to allocate "
 221                  "per physical function");
 222 #endif /* CONFIG_PCI_IOV */
 223
 224 static pci_ers_result_t igb_io_error_detected(struct pci_dev *,
 225                      pci_channel_state_t);
 226 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *);
 227 static void igb_io_resume(struct pci_dev *);
 228
 229 static const struct pci_error_handlers igb_err_handler = {
 230         .error_detected = igb_io_error_detected,
 231         .slot_reset = igb_io_slot_reset,
 232         .resume = igb_io_resume,
 233 };
 234
 235 static void igb_init_dmac(struct igb_adapter *adapter, u32 pba);
 236
 237 static struct pci_driver igb_driver = {
 238         .name     = igb_driver_name,
 239         .id_table = igb_pci_tbl,
 240         .probe    = igb_probe,
 241         .remove   = igb_remove,
 242 #ifdef CONFIG_PM
 243         .driver.pm = &igb_pm_ops,
 244 #endif
 245         .shutdown = igb_shutdown,
 246         .sriov_configure = igb_pci_sriov_configure,
 247         .err_handler = &igb_err_handler
 248 };
 249
 250 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
 251 MODULE_DESCRIPTION("Intel(R) Gigabit Ethernet Network Driver");
 252 MODULE_LICENSE("GPL");
 253 MODULE_VERSION(DRV_VERSION);
 254
 255 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
 256 static int debug = -1;
 257 module_param(debug, int, 0);
 258 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
 259
 260 struct igb_reg_info {
 261         u32 ofs;
 262         char *name;
 263 };
 264
 265 static const struct igb_reg_info igb_reg_info_tbl[] = {
 266
 267         /* General Registers */
 268         {E1000_CTRL, "CTRL"},
 269         {E1000_STATUS, "STATUS"},
 270         {E1000_CTRL_EXT, "CTRL_EXT"},
 271
 272         /* Interrupt Registers */
 273         {E1000_ICR, "ICR"},
 274
 275         /* RX Registers */
 276         {E1000_RCTL, "RCTL"},
 277         {E1000_RDLEN(0), "RDLEN"},
 278         {E1000_RDH(0), "RDH"},
 279         {E1000_RDT(0), "RDT"},
 280         {E1000_RXDCTL(0), "RXDCTL"},
 281         {E1000_RDBAL(0), "RDBAL"},
 282         {E1000_RDBAH(0), "RDBAH"},
 283
 284         /* TX Registers */
 285         {E1000_TCTL, "TCTL"},
 286         {E1000_TDBAL(0), "TDBAL"},
 287         {E1000_TDBAH(0), "TDBAH"},
 288         {E1000_TDLEN(0), "TDLEN"},
 289         {E1000_TDH(0), "TDH"},
 290         {E1000_TDT(0), "TDT"},
 291         {E1000_TXDCTL(0), "TXDCTL"},
 292         {E1000_TDFH, "TDFH"},
 293         {E1000_TDFT, "TDFT"},
 294         {E1000_TDFHS, "TDFHS"},
 295         {E1000_TDFPC, "TDFPC"},
 296
 297         /* List Terminator */
 298         {}
 299 };
 300
 301 /* igb_regdump - register printout routine */
 302 static void igb_regdump(struct e1000_hw *hw, struct igb_reg_info *reginfo)
 303 {
 304         int n = 0;
 305         char rname[16];
 306         u32 regs[8];
 307
 308         switch (reginfo->ofs) {
 309         case E1000_RDLEN(0):
 310                 for (n = 0; n < 4; n++)
 311                         regs[n] = rd32(E1000_RDLEN(n));
 312                 break;
 313         case E1000_RDH(0):
 314                 for (n = 0; n < 4; n++)
 315                         regs[n] = rd32(E1000_RDH(n));
 316                 break;
 317         case E1000_RDT(0):
 318                 for (n = 0; n < 4; n++)
 319                         regs[n] = rd32(E1000_RDT(n));
 320                 break;
 321         case E1000_RXDCTL(0):
 322                 for (n = 0; n < 4; n++)
 323                         regs[n] = rd32(E1000_RXDCTL(n));
 324                 break;
 325         case E1000_RDBAL(0):
 326                 for (n = 0; n < 4; n++)
 327                         regs[n] = rd32(E1000_RDBAL(n));
 328                 break;
 329         case E1000_RDBAH(0):
 330                 for (n = 0; n < 4; n++)
 331                         regs[n] = rd32(E1000_RDBAH(n));
 332                 break;
 333         case E1000_TDBAL(0):
 334                 for (n = 0; n < 4; n++)
 335                         regs[n] = rd32(E1000_RDBAL(n));
 336                 break;
 337         case E1000_TDBAH(0):
 338                 for (n = 0; n < 4; n++)
 339                         regs[n] = rd32(E1000_TDBAH(n));
 340                 break;
 341         case E1000_TDLEN(0):
 342                 for (n = 0; n < 4; n++)
 343                         regs[n] = rd32(E1000_TDLEN(n));
 344                 break;
 345         case E1000_TDH(0):
 346                 for (n = 0; n < 4; n++)
 347                         regs[n] = rd32(E1000_TDH(n));
 348                 break;
 349         case E1000_TDT(0):
 350                 for (n = 0; n < 4; n++)
 351                         regs[n] = rd32(E1000_TDT(n));
 352                 break;
 353         case E1000_TXDCTL(0):
 354                 for (n = 0; n < 4; n++)
 355                         regs[n] = rd32(E1000_TXDCTL(n));
 356                 break;
 357         default:
 358                 pr_info("%-15s %08x\n", reginfo->name, rd32(reginfo->ofs));
 359                 return;
 360         }
 361
 362         snprintf(rname, 16, "%s%s", reginfo->name, "[0-3]");
 363         pr_info("%-15s %08x %08x %08x %08x\n", rname, regs[0], regs[1],
 364                 regs[2], regs[3]);
 365 }
 366
 367 /* igb_dump - Print registers, Tx-rings and Rx-rings */
 368 static void igb_dump(struct igb_adapter *adapter)
 369 {
 370         struct net_device *netdev = adapter->netdev;
 371         struct e1000_hw *hw = &adapter->hw;
 372         struct igb_reg_info *reginfo;
 373         struct igb_ring *tx_ring;
 374         union e1000_adv_tx_desc *tx_desc;
 375         struct my_u0 { u64 a; u64 b; } *u0;
 376         struct igb_ring *rx_ring;
 377         union e1000_adv_rx_desc *rx_desc;
 378         u32 staterr;
 379         u16 i, n;
 380
 381         if (!netif_msg_hw(adapter))
 382                 return;
 383
 384         /* Print netdevice Info */
 385         if (netdev) {
 386                 dev_info(&adapter->pdev->dev, "Net device Info\n");
 387                 pr_info("Device Name     state            trans_start      "
 388                         "last_rx\n");
 389                 pr_info("%-15s %016lX %016lX %016lX\n", netdev->name,
 390                         netdev->state, netdev->trans_start, netdev->last_rx);
 391         }
 392
 393         /* Print Registers */
 394         dev_info(&adapter->pdev->dev, "Register Dump\n");
 395         pr_info(" Register Name   Value\n");
 396         for (reginfo = (struct igb_reg_info *)igb_reg_info_tbl;
 397              reginfo->name; reginfo++) {
 398                 igb_regdump(hw, reginfo);
 399         }
 400
 401         /* Print TX Ring Summary */
 402         if (!netdev || !netif_running(netdev))
 403                 goto exit;
 404
 405         dev_info(&adapter->pdev->dev, "TX Rings Summary\n");
 406         pr_info("Queue [NTU] [NTC] [bi(ntc)->dma  ] leng ntw timestamp\n");
 407         for (n = 0; n < adapter->num_tx_queues; n++) {
 408                 struct igb_tx_buffer *buffer_info;
 409                 tx_ring = adapter->tx_ring[n];
 410                 buffer_info = &tx_ring->tx_buffer_info[tx_ring->next_to_clean];
 411                 pr_info(" %5d %5X %5X %016llX %04X %p %016llX\n",
 412                         n, tx_ring->next_to_use, tx_ring->next_to_clean,
 413                         (u64)dma_unmap_addr(buffer_info, dma),
 414                         dma_unmap_len(buffer_info, len),
 415                         buffer_info->next_to_watch,
 416                         (u64)buffer_info->time_stamp);
 417         }
 418
 419         /* Print TX Rings */
 420         if (!netif_msg_tx_done(adapter))
 421                 goto rx_ring_summary;
 422
 423         dev_info(&adapter->pdev->dev, "TX Rings Dump\n");
 424
 425         /* Transmit Descriptor Formats
 426          *
 427          * Advanced Transmit Descriptor
 428          *   +--------------------------------------------------------------+
 429          * 0 |         Buffer Address [63:0]                                |
 430          *   +--------------------------------------------------------------+
 431          * 8 | PAYLEN  | PORTS  |CC|IDX | STA | DCMD  |DTYP|MAC|RSV| DTALEN |
 432          *   +--------------------------------------------------------------+
 433          *   63      46 45    40 39 38 36 35 32 31   24             15       0
 434          */
 435
 436         for (n = 0; n < adapter->num_tx_queues; n++) {
 437                 tx_ring = adapter->tx_ring[n];
 438                 pr_info("------------------------------------\n");
 439                 pr_info("TX QUEUE INDEX = %d\n", tx_ring->queue_index);
 440                 pr_info("------------------------------------\n");
 441                 pr_info("T [desc]     [address 63:0  ] [PlPOCIStDDM Ln] "
 442                         "[bi->dma       ] leng  ntw timestamp        "
 443                         "bi->skb\n");
 444
 445                 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
 446                         const char *next_desc;
 447                         struct igb_tx_buffer *buffer_info;
 448                         tx_desc = IGB_TX_DESC(tx_ring, i);
 449                         buffer_info = &tx_ring->tx_buffer_info[i];
 450                         u0 = (struct my_u0 *)tx_desc;
 451                         if (i == tx_ring->next_to_use &&
 452                             i == tx_ring->next_to_clean)
 453                                 next_desc = " NTC/U";
 454                         else if (i == tx_ring->next_to_use)
 455                                 next_desc = " NTU";
 456                         else if (i == tx_ring->next_to_clean)
 457                                 next_desc = " NTC";
 458                         else
 459                                 next_desc = "";
 460
 461                         pr_info("T [0x%03X]    %016llX %016llX %016llX"
 462                                 " %04X  %p %016llX %p%s\n", i,
 463                                 le64_to_cpu(u0->a),
 464                                 le64_to_cpu(u0->b),
 465                                 (u64)dma_unmap_addr(buffer_info, dma),
 466                                 dma_unmap_len(buffer_info, len),
 467                                 buffer_info->next_to_watch,
 468                                 (u64)buffer_info->time_stamp,
 469                                 buffer_info->skb, next_desc);
 470
 471                         if (netif_msg_pktdata(adapter) && buffer_info->skb)
 472                                 print_hex_dump(KERN_INFO, "",
 473                                         DUMP_PREFIX_ADDRESS,
 474                                         16, 1, buffer_info->skb->data,
 475                                         dma_unmap_len(buffer_info, len),
 476                                         true);
 477                 }
 478         }
 479
 480         /* Print RX Rings Summary */
 481 rx_ring_summary:
 482         dev_info(&adapter->pdev->dev, "RX Rings Summary\n");
 483         pr_info("Queue [NTU] [NTC]\n");
 484         for (n = 0; n < adapter->num_rx_queues; n++) {
 485                 rx_ring = adapter->rx_ring[n];
 486                 pr_info(" %5d %5X %5X\n",
 487                         n, rx_ring->next_to_use, rx_ring->next_to_clean);
 488         }
 489
 490         /* Print RX Rings */
 491         if (!netif_msg_rx_status(adapter))
 492                 goto exit;
 493
 494         dev_info(&adapter->pdev->dev, "RX Rings Dump\n");
 495
 496         /* Advanced Receive Descriptor (Read) Format
 497          *    63                                           1        0
 498          *    +-----------------------------------------------------+
 499          *  0 |       Packet Buffer Address [63:1]           |A0/NSE|
 500          *    +----------------------------------------------+------+
 501          *  8 |       Header Buffer Address [63:1]           |  DD  |
 502          *    +-----------------------------------------------------+
 503          *
 504          *
 505          * Advanced Receive Descriptor (Write-Back) Format
 506          *
 507          *   63       48 47    32 31  30      21 20 17 16   4 3     0
 508          *   +------------------------------------------------------+
 509          * 0 | Packet     IP     |SPH| HDR_LEN   | RSV|Packet|  RSS |
 510          *   | Checksum   Ident  |   |           |    | Type | Type |
 511          *   +------------------------------------------------------+
 512          * 8 | VLAN Tag | Length | Extended Error | Extended Status |
 513          *   +------------------------------------------------------+
 514          *   63       48 47    32 31            20 19               0
 515          */
 516
 517         for (n = 0; n < adapter->num_rx_queues; n++) {
 518                 rx_ring = adapter->rx_ring[n];
 519                 pr_info("------------------------------------\n");
 520                 pr_info("RX QUEUE INDEX = %d\n", rx_ring->queue_index);
 521                 pr_info("------------------------------------\n");
 522                 pr_info("R  [desc]      [ PktBuf     A0] [  HeadBuf   DD] "
 523                         "[bi->dma       ] [bi->skb] <-- Adv Rx Read format\n");
 524                 pr_info("RWB[desc]      [PcsmIpSHl PtRs] [vl er S cks ln] -----"
 525                         "----------- [bi->skb] <-- Adv Rx Write-Back format\n");
 526
 527                 for (i = 0; i < rx_ring->count; i++) {
 528                         const char *next_desc;
 529                         struct igb_rx_buffer *buffer_info;
 530                         buffer_info = &rx_ring->rx_buffer_info[i];
 531                         rx_desc = IGB_RX_DESC(rx_ring, i);
 532                         u0 = (struct my_u0 *)rx_desc;
 533                         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
 534
 535                         if (i == rx_ring->next_to_use)
 536                                 next_desc = " NTU";
 537                         else if (i == rx_ring->next_to_clean)
 538                                 next_desc = " NTC";
 539                         else
 540                                 next_desc = "";
 541
 542                         if (staterr & E1000_RXD_STAT_DD) {
 543                                 /* Descriptor Done */
 544                                 pr_info("%s[0x%03X]     %016llX %016llX ---------------- %s\n",
 545                                         "RWB", i,
 546                                         le64_to_cpu(u0->a),
 547                                         le64_to_cpu(u0->b),
 548                                         next_desc);
 549                         } else {
 550                                 pr_info("%s[0x%03X]     %016llX %016llX %016llX %s\n",
 551                                         "R  ", i,
 552                                         le64_to_cpu(u0->a),
 553                                         le64_to_cpu(u0->b),
 554                                         (u64)buffer_info->dma,
 555                                         next_desc);
 556
 557                                 if (netif_msg_pktdata(adapter) &&
 558                                     buffer_info->dma && buffer_info->page) {
 559                                         print_hex_dump(KERN_INFO, "",
 560                                           DUMP_PREFIX_ADDRESS,
 561                                           16, 1,
 562                                           page_address(buffer_info->page) +
 563                                                       buffer_info->page_offset,
 564                                           IGB_RX_BUFSZ, true);
 565                                 }
 566                         }
 567                 }
 568         }
 569
 570 exit:
 571         return;
 572 }
 573
 574 /**
 575  *  igb_get_i2c_data - Reads the I2C SDA data bit
 576  *  @hw: pointer to hardware structure
 577  *  @i2cctl: Current value of I2CCTL register
 578  *
 579  *  Returns the I2C data bit value
 580  **/
 581 static int igb_get_i2c_data(void *data)
 582 {
 583         struct igb_adapter *adapter = (struct igb_adapter *)data;
 584         struct e1000_hw *hw = &adapter->hw;
 585         s32 i2cctl = rd32(E1000_I2CPARAMS);
 586
 587         return ((i2cctl & E1000_I2C_DATA_IN) != 0);
 588 }
 589
 590 /**
 591  *  igb_set_i2c_data - Sets the I2C data bit
 592  *  @data: pointer to hardware structure
 593  *  @state: I2C data value (0 or 1) to set
 594  *
 595  *  Sets the I2C data bit
 596  **/
 597 static void igb_set_i2c_data(void *data, int state)
 598 {
 599         struct igb_adapter *adapter = (struct igb_adapter *)data;
 600         struct e1000_hw *hw = &adapter->hw;
 601         s32 i2cctl = rd32(E1000_I2CPARAMS);
 602
 603         if (state)
 604                 i2cctl |= E1000_I2C_DATA_OUT;
 605         else
 606                 i2cctl &= ~E1000_I2C_DATA_OUT;
 607
 608         i2cctl &= ~E1000_I2C_DATA_OE_N;
 609         i2cctl |= E1000_I2C_CLK_OE_N;
 610         wr32(E1000_I2CPARAMS, i2cctl);
 611         wrfl();
 612
 613 }
 614
 615 /**
 616  *  igb_set_i2c_clk - Sets the I2C SCL clock
 617  *  @data: pointer to hardware structure
 618  *  @state: state to set clock
 619  *
 620  *  Sets the I2C clock line to state
 621  **/
 622 static void igb_set_i2c_clk(void *data, int state)
 623 {
 624         struct igb_adapter *adapter = (struct igb_adapter *)data;
 625         struct e1000_hw *hw = &adapter->hw;
 626         s32 i2cctl = rd32(E1000_I2CPARAMS);
 627
 628         if (state) {
 629                 i2cctl |= E1000_I2C_CLK_OUT;
 630                 i2cctl &= ~E1000_I2C_CLK_OE_N;
 631         } else {
 632                 i2cctl &= ~E1000_I2C_CLK_OUT;
 633                 i2cctl &= ~E1000_I2C_CLK_OE_N;
 634         }
 635         wr32(E1000_I2CPARAMS, i2cctl);
 636         wrfl();
 637 }
 638
 639 /**
 640  *  igb_get_i2c_clk - Gets the I2C SCL clock state
 641  *  @data: pointer to hardware structure
 642  *
 643  *  Gets the I2C clock state
 644  **/
 645 static int igb_get_i2c_clk(void *data)
 646 {
 647         struct igb_adapter *adapter = (struct igb_adapter *)data;
 648         struct e1000_hw *hw = &adapter->hw;
 649         s32 i2cctl = rd32(E1000_I2CPARAMS);
 650
 651         return ((i2cctl & E1000_I2C_CLK_IN) != 0);
 652 }
 653
 654 static const struct i2c_algo_bit_data igb_i2c_algo = {
 655         .setsda         = igb_set_i2c_data,
 656         .setscl         = igb_set_i2c_clk,
 657         .getsda         = igb_get_i2c_data,
 658         .getscl         = igb_get_i2c_clk,
 659         .udelay         = 5,
 660         .timeout        = 20,
 661 };
 662
 663 /**
 664  *  igb_get_hw_dev - return device
 665  *  @hw: pointer to hardware structure
 666  *
 667  *  used by hardware layer to print debugging information
 668  **/
 669 struct net_device *igb_get_hw_dev(struct e1000_hw *hw)
 670 {
 671         struct igb_adapter *adapter = hw->back;
 672         return adapter->netdev;
 673 }
 674
 675 /**
 676  *  igb_init_module - Driver Registration Routine
 677  *
 678  *  igb_init_module is the first routine called when the driver is
 679  *  loaded. All it does is register with the PCI subsystem.
 680  **/
 681 static int __init igb_init_module(void)
 682 {
 683         int ret;
 684         pr_info("%s - version %s\n",
 685                igb_driver_string, igb_driver_version);
 686
 687         pr_info("%s\n", igb_copyright);
 688
 689 #ifdef CONFIG_IGB_DCA
 690         dca_register_notify(&dca_notifier);
 691 #endif
 692         ret = pci_register_driver(&igb_driver);
 693         return ret;
 694 }
 695
 696 module_init(igb_init_module);
 697
 698 /**
 699  *  igb_exit_module - Driver Exit Cleanup Routine
 700  *
 701  *  igb_exit_module is called just before the driver is removed
 702  *  from memory.
 703  **/
 704 static void __exit igb_exit_module(void)
 705 {
 706 #ifdef CONFIG_IGB_DCA
 707         dca_unregister_notify(&dca_notifier);
 708 #endif
 709         pci_unregister_driver(&igb_driver);
 710 }
 711
 712 module_exit(igb_exit_module);
 713
 714 #define Q_IDX_82576(i) (((i & 0x1) << 3) + (i >> 1))
 715 /**
 716  *  igb_cache_ring_register - Descriptor ring to register mapping
 717  *  @adapter: board private structure to initialize
 718  *
 719  *  Once we know the feature-set enabled for the device, we'll cache
 720  *  the register offset the descriptor ring is assigned to.
 721  **/
 722 static void igb_cache_ring_register(struct igb_adapter *adapter)
 723 {
 724         int i = 0, j = 0;
 725         u32 rbase_offset = adapter->vfs_allocated_count;
 726
 727         switch (adapter->hw.mac.type) {
 728         case e1000_82576:
 729                 /* The queues are allocated for virtualization such that VF 0
 730                  * is allocated queues 0 and 8, VF 1 queues 1 and 9, etc.
 731                  * In order to avoid collision we start at the first free queue
 732                  * and continue consuming queues in the same sequence
 733                  */
 734                 if (adapter->vfs_allocated_count) {
 735                         for (; i < adapter->rss_queues; i++)
 736                                 adapter->rx_ring[i]->reg_idx = rbase_offset +
 737                                                                Q_IDX_82576(i);
 738                 }
 739         case e1000_82575:
 740         case e1000_82580:
 741         case e1000_i350:
 742         case e1000_i354:
 743         case e1000_i210:
 744         case e1000_i211:
 745         default:
 746                 for (; i < adapter->num_rx_queues; i++)
 747                         adapter->rx_ring[i]->reg_idx = rbase_offset + i;
 748                 for (; j < adapter->num_tx_queues; j++)
 749                         adapter->tx_ring[j]->reg_idx = rbase_offset + j;
 750                 break;
 751         }
 752 }
 753
 754 /**
 755  *  igb_write_ivar - configure ivar for given MSI-X vector
 756  *  @hw: pointer to the HW structure
 757  *  @msix_vector: vector number we are allocating to a given ring
 758  *  @index: row index of IVAR register to write within IVAR table
 759  *  @offset: column offset of in IVAR, should be multiple of 8
 760  *
 761  *  This function is intended to handle the writing of the IVAR register
 762  *  for adapters 82576 and newer.  The IVAR table consists of 2 columns,
 763  *  each containing an cause allocation for an Rx and Tx ring, and a
 764  *  variable number of rows depending on the number of queues supported.
 765  **/
 766 static void igb_write_ivar(struct e1000_hw *hw, int msix_vector,
 767                            int index, int offset)
 768 {
 769         u32 ivar = array_rd32(E1000_IVAR0, index);
 770
 771         /* clear any bits that are currently set */
 772         ivar &= ~((u32)0xFF << offset);
 773
 774         /* write vector and valid bit */
 775         ivar |= (msix_vector | E1000_IVAR_VALID) << offset;
 776
 777         array_wr32(E1000_IVAR0, index, ivar);
 778 }
 779
 780 #define IGB_N0_QUEUE -1
 781 static void igb_assign_vector(struct igb_q_vector *q_vector, int msix_vector)
 782 {
 783         struct igb_adapter *adapter = q_vector->adapter;
 784         struct e1000_hw *hw = &adapter->hw;
 785         int rx_queue = IGB_N0_QUEUE;
 786         int tx_queue = IGB_N0_QUEUE;
 787         u32 msixbm = 0;
 788
 789         if (q_vector->rx.ring)
 790                 rx_queue = q_vector->rx.ring->reg_idx;
 791         if (q_vector->tx.ring)
 792                 tx_queue = q_vector->tx.ring->reg_idx;
 793
 794         switch (hw->mac.type) {
 795         case e1000_82575:
 796                 /* The 82575 assigns vectors using a bitmask, which matches the
 797                  * bitmask for the EICR/EIMS/EIMC registers.  To assign one
 798                  * or more queues to a vector, we write the appropriate bits
 799                  * into the MSIXBM register for that vector.
 800                  */
 801                 if (rx_queue > IGB_N0_QUEUE)
 802                         msixbm = E1000_EICR_RX_QUEUE0 << rx_queue;
 803                 if (tx_queue > IGB_N0_QUEUE)
 804                         msixbm |= E1000_EICR_TX_QUEUE0 << tx_queue;
 805                 if (!adapter->msix_entries && msix_vector == 0)
 806                         msixbm |= E1000_EIMS_OTHER;
 807                 array_wr32(E1000_MSIXBM(0), msix_vector, msixbm);
 808                 q_vector->eims_value = msixbm;
 809                 break;
 810         case e1000_82576:
 811                 /* 82576 uses a table that essentially consists of 2 columns
 812                  * with 8 rows.  The ordering is column-major so we use the
 813                  * lower 3 bits as the row index, and the 4th bit as the
 814                  * column offset.
 815                  */
 816                 if (rx_queue > IGB_N0_QUEUE)
 817                         igb_write_ivar(hw, msix_vector,
 818                                        rx_queue & 0x7,
 819                                        (rx_queue & 0x8) << 1);
 820                 if (tx_queue > IGB_N0_QUEUE)
 821                         igb_write_ivar(hw, msix_vector,
 822                                        tx_queue & 0x7,
 823                                        ((tx_queue & 0x8) << 1) + 8);
 824                 q_vector->eims_value = 1 << msix_vector;
 825                 break;
 826         case e1000_82580:
 827         case e1000_i350:
 828         case e1000_i354:
 829         case e1000_i210:
 830         case e1000_i211:
 831                 /* On 82580 and newer adapters the scheme is similar to 82576
 832                  * however instead of ordering column-major we have things
 833                  * ordered row-major.  So we traverse the table by using
 834                  * bit 0 as the column offset, and the remaining bits as the
 835                  * row index.
 836                  */
 837                 if (rx_queue > IGB_N0_QUEUE)
 838                         igb_write_ivar(hw, msix_vector,
 839                                        rx_queue >> 1,
 840                                        (rx_queue & 0x1) << 4);
 841                 if (tx_queue > IGB_N0_QUEUE)
 842                         igb_write_ivar(hw, msix_vector,
 843                                        tx_queue >> 1,
 844                                        ((tx_queue & 0x1) << 4) + 8);
 845                 q_vector->eims_value = 1 << msix_vector;
 846                 break;
 847         default:
 848                 BUG();
 849                 break;
 850         }
 851
 852         /* add q_vector eims value to global eims_enable_mask */
 853         adapter->eims_enable_mask |= q_vector->eims_value;
 854
 855         /* configure q_vector to set itr on first interrupt */
 856         q_vector->set_itr = 1;
 857 }
 858
 859 /**
 860  *  igb_configure_msix - Configure MSI-X hardware
 861  *  @adapter: board private structure to initialize
 862  *
 863  *  igb_configure_msix sets up the hardware to properly
 864  *  generate MSI-X interrupts.
 865  **/
 866 static void igb_configure_msix(struct igb_adapter *adapter)
 867 {
 868         u32 tmp;
 869         int i, vector = 0;
 870         struct e1000_hw *hw = &adapter->hw;
 871
 872         adapter->eims_enable_mask = 0;
 873
 874         /* set vector for other causes, i.e. link changes */
 875         switch (hw->mac.type) {
 876         case e1000_82575:
 877                 tmp = rd32(E1000_CTRL_EXT);
 878                 /* enable MSI-X PBA support*/
 879                 tmp |= E1000_CTRL_EXT_PBA_CLR;
 880
 881                 /* Auto-Mask interrupts upon ICR read. */
 882                 tmp |= E1000_CTRL_EXT_EIAME;
 883                 tmp |= E1000_CTRL_EXT_IRCA;
 884
 885                 wr32(E1000_CTRL_EXT, tmp);
 886
 887                 /* enable msix_other interrupt */
 888                 array_wr32(E1000_MSIXBM(0), vector++, E1000_EIMS_OTHER);
 889                 adapter->eims_other = E1000_EIMS_OTHER;
 890
 891                 break;
 892
 893         case e1000_82576:
 894         case e1000_82580:
 895         case e1000_i350:
 896         case e1000_i354:
 897         case e1000_i210:
 898         case e1000_i211:
 899                 /* Turn on MSI-X capability first, or our settings
 900                  * won't stick.  And it will take days to debug.
 901                  */
 902                 wr32(E1000_GPIE, E1000_GPIE_MSIX_MODE |
 903                      E1000_GPIE_PBA | E1000_GPIE_EIAME |
 904                      E1000_GPIE_NSICR);
 905
 906                 /* enable msix_other interrupt */
 907                 adapter->eims_other = 1 << vector;
 908                 tmp = (vector++ | E1000_IVAR_VALID) << 8;
 909
 910                 wr32(E1000_IVAR_MISC, tmp);
 911                 break;
 912         default:
 913                 /* do nothing, since nothing else supports MSI-X */
 914                 break;
 915         } /* switch (hw->mac.type) */
 916
 917         adapter->eims_enable_mask |= adapter->eims_other;
 918
 919         for (i = 0; i < adapter->num_q_vectors; i++)
 920                 igb_assign_vector(adapter->q_vector[i], vector++);
 921
 922         wrfl();
 923 }
 924
 925 /**
 926  *  igb_request_msix - Initialize MSI-X interrupts
 927  *  @adapter: board private structure to initialize
 928  *
 929  *  igb_request_msix allocates MSI-X vectors and requests interrupts from the
 930  *  kernel.
 931  **/
 932 static int igb_request_msix(struct igb_adapter *adapter)
 933 {
 934         struct net_device *netdev = adapter->netdev;
 935         struct e1000_hw *hw = &adapter->hw;
 936         int i, err = 0, vector = 0, free_vector = 0;
 937
 938         err = request_irq(adapter->msix_entries[vector].vector,
 939                           igb_msix_other, 0, netdev->name, adapter);
 940         if (err)
 941                 goto err_out;
 942
 943         for (i = 0; i < adapter->num_q_vectors; i++) {
 944                 struct igb_q_vector *q_vector = adapter->q_vector[i];
 945
 946                 vector++;
 947
 948                 q_vector->itr_register = hw->hw_addr + E1000_EITR(vector);
 949
 950                 if (q_vector->rx.ring && q_vector->tx.ring)
 951                         sprintf(q_vector->name, "%s-TxRx-%u", netdev->name,
 952                                 q_vector->rx.ring->queue_index);
 953                 else if (q_vector->tx.ring)
 954                         sprintf(q_vector->name, "%s-tx-%u", netdev->name,
 955                                 q_vector->tx.ring->queue_index);
 956                 else if (q_vector->rx.ring)
 957                         sprintf(q_vector->name, "%s-rx-%u", netdev->name,
 958                                 q_vector->rx.ring->queue_index);
 959                 else
 960                         sprintf(q_vector->name, "%s-unused", netdev->name);
 961
 962                 err = request_irq(adapter->msix_entries[vector].vector,
 963                                   igb_msix_ring, 0, q_vector->name,
 964                                   q_vector);
 965                 if (err)
 966                         goto err_free;
 967         }
 968
 969         igb_configure_msix(adapter);
 970         return 0;
 971
 972 err_free:
 973         /* free already assigned IRQs */
 974         free_irq(adapter->msix_entries[free_vector++].vector, adapter);
 975
 976         vector--;
 977         for (i = 0; i < vector; i++) {
 978                 free_irq(adapter->msix_entries[free_vector++].vector,
 979                          adapter->q_vector[i]);
 980         }
 981 err_out:
 982         return err;
 983 }
 984
 985 static void igb_reset_interrupt_capability(struct igb_adapter *adapter)
 986 {
 987         if (adapter->msix_entries) {
 988                 pci_disable_msix(adapter->pdev);
 989                 kfree(adapter->msix_entries);
 990                 adapter->msix_entries = NULL;
 991         } else if (adapter->flags & IGB_FLAG_HAS_MSI) {
 992                 pci_disable_msi(adapter->pdev);
 993         }
 994 }
 995
 996 /**
 997  *  igb_free_q_vector - Free memory allocated for specific interrupt vector
 998  *  @adapter: board private structure to initialize
 999  *  @v_idx: Index of vector to be freed
1000  *
1001  *  This function frees the memory allocated to the q_vector.  In addition if
1002  *  NAPI is enabled it will delete any references to the NAPI struct prior
1003  *  to freeing the q_vector.
1004  **/
1005 static void igb_free_q_vector(struct igb_adapter *adapter, int v_idx)
1006 {
1007         struct igb_q_vector *q_vector = adapter->q_vector[v_idx];
1008
1009         if (q_vector->tx.ring)
1010                 adapter->tx_ring[q_vector->tx.ring->queue_index] = NULL;
1011
1012         if (q_vector->rx.ring)
1013                 adapter->tx_ring[q_vector->rx.ring->queue_index] = NULL;
1014
1015         adapter->q_vector[v_idx] = NULL;
1016         netif_napi_del(&q_vector->napi);
1017
1018         /* igb_get_stats64() might access the rings on this vector,
1019          * we must wait a grace period before freeing it.
1020          */
1021         kfree_rcu(q_vector, rcu);
1022 }
1023
1024 /**
1025  *  igb_free_q_vectors - Free memory allocated for interrupt vectors
1026  *  @adapter: board private structure to initialize
1027  *
1028  *  This function frees the memory allocated to the q_vectors.  In addition if
1029  *  NAPI is enabled it will delete any references to the NAPI struct prior
1030  *  to freeing the q_vector.
1031  **/
1032 static void igb_free_q_vectors(struct igb_adapter *adapter)
1033 {
1034         int v_idx = adapter->num_q_vectors;
1035
1036         adapter->num_tx_queues = 0;
1037         adapter->num_rx_queues = 0;
1038         adapter->num_q_vectors = 0;
1039
1040         while (v_idx--)
1041                 igb_free_q_vector(adapter, v_idx);
1042 }
1043
1044 /**
1045  *  igb_clear_interrupt_scheme - reset the device to a state of no interrupts
1046  *  @adapter: board private structure to initialize
1047  *
1048  *  This function resets the device so that it has 0 Rx queues, Tx queues, and
1049  *  MSI-X interrupts allocated.
1050  */
1051 static void igb_clear_interrupt_scheme(struct igb_adapter *adapter)
1052 {
1053         igb_free_q_vectors(adapter);
1054         igb_reset_interrupt_capability(adapter);
1055 }
1056
1057 /**
1058  *  igb_set_interrupt_capability - set MSI or MSI-X if supported
1059  *  @adapter: board private structure to initialize
1060  *  @msix: boolean value of MSIX capability
1061  *
1062  *  Attempt to configure interrupts using the best available
1063  *  capabilities of the hardware and kernel.
1064  **/
1065 static void igb_set_interrupt_capability(struct igb_adapter *adapter, bool msix)
1066 {
1067         int err;
1068         int numvecs, i;
1069
1070         if (!msix)
1071                 goto msi_only;
1072
1073         /* Number of supported queues. */
1074         adapter->num_rx_queues = adapter->rss_queues;
1075         if (adapter->vfs_allocated_count)
1076                 adapter->num_tx_queues = 1;
1077         else
1078                 adapter->num_tx_queues = adapter->rss_queues;
1079
1080         /* start with one vector for every Rx queue */
1081         numvecs = adapter->num_rx_queues;
1082
1083         /* if Tx handler is separate add 1 for every Tx queue */
1084         if (!(adapter->flags & IGB_FLAG_QUEUE_PAIRS))
1085                 numvecs += adapter->num_tx_queues;
1086
1087         /* store the number of vectors reserved for queues */
1088         adapter->num_q_vectors = numvecs;
1089
1090         /* add 1 vector for link status interrupts */
1091         numvecs++;
1092         adapter->msix_entries = kcalloc(numvecs, sizeof(struct msix_entry),
1093                                         GFP_KERNEL);
1094
1095         if (!adapter->msix_entries)
1096                 goto msi_only;
1097
1098         for (i = 0; i < numvecs; i++)
1099                 adapter->msix_entries[i].entry = i;
1100
1101         err = pci_enable_msix(adapter->pdev,
1102                               adapter->msix_entries,
1103                               numvecs);
1104         if (err == 0)
1105                 return;
1106
1107         igb_reset_interrupt_capability(adapter);
1108
1109         /* If we can't do MSI-X, try MSI */
1110 msi_only:
1111 #ifdef CONFIG_PCI_IOV
1112         /* disable SR-IOV for non MSI-X configurations */
1113         if (adapter->vf_data) {
1114                 struct e1000_hw *hw = &adapter->hw;
1115                 /* disable iov and allow time for transactions to clear */
1116                 pci_disable_sriov(adapter->pdev);
1117                 msleep(500);
1118
1119                 kfree(adapter->vf_data);
1120                 adapter->vf_data = NULL;
1121                 wr32(E1000_IOVCTL, E1000_IOVCTL_REUSE_VFQ);
1122                 wrfl();
1123                 msleep(100);
1124                 dev_info(&adapter->pdev->dev, "IOV Disabled\n");
1125         }
1126 #endif
1127         adapter->vfs_allocated_count = 0;
1128         adapter->rss_queues = 1;
1129         adapter->flags |= IGB_FLAG_QUEUE_PAIRS;
1130         adapter->num_rx_queues = 1;
1131         adapter->num_tx_queues = 1;
1132         adapter->num_q_vectors = 1;
1133         if (!pci_enable_msi(adapter->pdev))
1134                 adapter->flags |= IGB_FLAG_HAS_MSI;
1135 }
1136
1137 static void igb_add_ring(struct igb_ring *ring,
1138                          struct igb_ring_container *head)
1139 {
1140         head->ring = ring;
1141         head->count++;
1142 }
1143
1144 /**
1145  *  igb_alloc_q_vector - Allocate memory for a single interrupt vector
1146  *  @adapter: board private structure to initialize
1147  *  @v_count: q_vectors allocated on adapter, used for ring interleaving
1148  *  @v_idx: index of vector in adapter struct
1149  *  @txr_count: total number of Tx rings to allocate
1150  *  @txr_idx: index of first Tx ring to allocate
1151  *  @rxr_count: total number of Rx rings to allocate
1152  *  @rxr_idx: index of first Rx ring to allocate
1153  *
1154  *  We allocate one q_vector.  If allocation fails we return -ENOMEM.
1155  **/
1156 static int igb_alloc_q_vector(struct igb_adapter *adapter,
1157                               int v_count, int v_idx,
1158                               int txr_count, int txr_idx,
1159                               int rxr_count, int rxr_idx)
1160 {
1161         struct igb_q_vector *q_vector;
1162         struct igb_ring *ring;
1163         int ring_count, size;
1164
1165         /* igb only supports 1 Tx and/or 1 Rx queue per vector */
1166         if (txr_count > 1 || rxr_count > 1)
1167                 return -ENOMEM;
1168
1169         ring_count = txr_count + rxr_count;
1170         size = sizeof(struct igb_q_vector) +
1171                (sizeof(struct igb_ring) * ring_count);
1172
1173         /* allocate q_vector and rings */
1174         q_vector = kzalloc(size, GFP_KERNEL);
1175         if (!q_vector)
1176                 return -ENOMEM;
1177
1178         /* initialize NAPI */
1179         netif_napi_add(adapter->netdev, &q_vector->napi,
1180                        igb_poll, 64);
1181
1182         /* tie q_vector and adapter together */
1183         adapter->q_vector[v_idx] = q_vector;
1184         q_vector->adapter = adapter;
1185
1186         /* initialize work limits */
1187         q_vector->tx.work_limit = adapter->tx_work_limit;
1188
1189         /* initialize ITR configuration */
1190         q_vector->itr_register = adapter->hw.hw_addr + E1000_EITR(0);
1191         q_vector->itr_val = IGB_START_ITR;
1192
1193         /* initialize pointer to rings */
1194         ring = q_vector->ring;
1195
1196         /* intialize ITR */
1197         if (rxr_count) {
1198                 /* rx or rx/tx vector */
1199                 if (!adapter->rx_itr_setting || adapter->rx_itr_setting > 3)
1200                         q_vector->itr_val = adapter->rx_itr_setting;
1201         } else {
1202                 /* tx only vector */
1203                 if (!adapter->tx_itr_setting || adapter->tx_itr_setting > 3)
1204                         q_vector->itr_val = adapter->tx_itr_setting;
1205         }
1206
1207         if (txr_count) {
1208                 /* assign generic ring traits */
1209                 ring->dev = &adapter->pdev->dev;
1210                 ring->netdev = adapter->netdev;
1211
1212                 /* configure backlink on ring */
1213                 ring->q_vector = q_vector;
1214
1215                 /* update q_vector Tx values */
1216                 igb_add_ring(ring, &q_vector->tx);
1217
1218                 /* For 82575, context index must be unique per ring. */
1219                 if (adapter->hw.mac.type == e1000_82575)
1220                         set_bit(IGB_RING_FLAG_TX_CTX_IDX, &ring->flags);
1221
1222                 /* apply Tx specific ring traits */
1223                 ring->count = adapter->tx_ring_count;
1224                 ring->queue_index = txr_idx;
1225
1226                 u64_stats_init(&ring->tx_syncp);
1227                 u64_stats_init(&ring->tx_syncp2);
1228
1229                 /* assign ring to adapter */
1230                 adapter->tx_ring[txr_idx] = ring;
1231
1232                 /* push pointer to next ring */
1233                 ring++;
1234         }
1235
1236         if (rxr_count) {
1237                 /* assign generic ring traits */
1238                 ring->dev = &adapter->pdev->dev;
1239                 ring->netdev = adapter->netdev;
1240
1241                 /* configure backlink on ring */
1242                 ring->q_vector = q_vector;
1243
1244                 /* update q_vector Rx values */
1245                 igb_add_ring(ring, &q_vector->rx);
1246
1247                 /* set flag indicating ring supports SCTP checksum offload */
1248                 if (adapter->hw.mac.type >= e1000_82576)
1249                         set_bit(IGB_RING_FLAG_RX_SCTP_CSUM, &ring->flags);
1250
1251                 /*
1252                  * On i350, i354, i210, and i211, loopback VLAN packets
1253                  * have the tag byte-swapped.
1254                  */
1255                 if (adapter->hw.mac.type >= e1000_i350)
1256                         set_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP, &ring->flags);
1257
1258                 /* apply Rx specific ring traits */
1259                 ring->count = adapter->rx_ring_count;
1260                 ring->queue_index = rxr_idx;
1261
1262                 u64_stats_init(&ring->rx_syncp);
1263
1264                 /* assign ring to adapter */
1265                 adapter->rx_ring[rxr_idx] = ring;
1266         }
1267
1268         return 0;
1269 }
1270
1271
1272 /**
1273  *  igb_alloc_q_vectors - Allocate memory for interrupt vectors
1274  *  @adapter: board private structure to initialize
1275  *
1276  *  We allocate one q_vector per queue interrupt.  If allocation fails we
1277  *  return -ENOMEM.
1278  **/
1279 static int igb_alloc_q_vectors(struct igb_adapter *adapter)
1280 {
1281         int q_vectors = adapter->num_q_vectors;
1282         int rxr_remaining = adapter->num_rx_queues;
1283         int txr_remaining = adapter->num_tx_queues;
1284         int rxr_idx = 0, txr_idx = 0, v_idx = 0;
1285         int err;
1286
1287         if (q_vectors >= (rxr_remaining + txr_remaining)) {
1288                 for (; rxr_remaining; v_idx++) {
1289                         err = igb_alloc_q_vector(adapter, q_vectors, v_idx,
1290                                                  0, 0, 1, rxr_idx);
1291
1292                         if (err)
1293                                 goto err_out;
1294
1295                         /* update counts and index */
1296                         rxr_remaining--;
1297                         rxr_idx++;
1298                 }
1299         }
1300
1301         for (; v_idx < q_vectors; v_idx++) {
1302                 int rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors - v_idx);
1303                 int tqpv = DIV_ROUND_UP(txr_remaining, q_vectors - v_idx);
1304                 err = igb_alloc_q_vector(adapter, q_vectors, v_idx,
1305                                          tqpv, txr_idx, rqpv, rxr_idx);
1306
1307                 if (err)
1308                         goto err_out;
1309
1310                 /* update counts and index */
1311                 rxr_remaining -= rqpv;
1312                 txr_remaining -= tqpv;
1313                 rxr_idx++;
1314                 txr_idx++;
1315         }
1316
1317         return 0;
1318
1319 err_out:
1320         adapter->num_tx_queues = 0;
1321         adapter->num_rx_queues = 0;
1322         adapter->num_q_vectors = 0;
1323
1324         while (v_idx--)
1325                 igb_free_q_vector(adapter, v_idx);
1326
1327         return -ENOMEM;
1328 }
1329
1330 /**
1331  *  igb_init_interrupt_scheme - initialize interrupts, allocate queues/vectors
1332  *  @adapter: board private structure to initialize
1333  *  @msix: boolean value of MSIX capability
1334  *
1335  *  This function initializes the interrupts and allocates all of the queues.
1336  **/
1337 static int igb_init_interrupt_scheme(struct igb_adapter *adapter, bool msix)
1338 {
1339         struct pci_dev *pdev = adapter->pdev;
1340         int err;
1341
1342         igb_set_interrupt_capability(adapter, msix);
1343
1344         err = igb_alloc_q_vectors(adapter);
1345         if (err) {
1346                 dev_err(&pdev->dev, "Unable to allocate memory for vectors\n");
1347                 goto err_alloc_q_vectors;
1348         }
1349
1350         igb_cache_ring_register(adapter);
1351
1352         return 0;
1353
1354 err_alloc_q_vectors:
1355         igb_reset_interrupt_capability(adapter);
1356         return err;
1357 }
1358
1359 /**
1360  *  igb_request_irq - initialize interrupts
1361  *  @adapter: board private structure to initialize
1362  *
1363  *  Attempts to configure interrupts using the best available
1364  *  capabilities of the hardware and kernel.
1365  **/
1366 static int igb_request_irq(struct igb_adapter *adapter)
1367 {
1368         struct net_device *netdev = adapter->netdev;
1369         struct pci_dev *pdev = adapter->pdev;
1370         int err = 0;
1371
1372         if (adapter->msix_entries) {
1373                 err = igb_request_msix(adapter);
1374                 if (!err)
1375                         goto request_done;
1376                 /* fall back to MSI */
1377                 igb_free_all_tx_resources(adapter);
1378                 igb_free_all_rx_resources(adapter);
1379
1380                 igb_clear_interrupt_scheme(adapter);
1381                 err = igb_init_interrupt_scheme(adapter, false);
1382                 if (err)
1383                         goto request_done;
1384
1385                 igb_setup_all_tx_resources(adapter);
1386                 igb_setup_all_rx_resources(adapter);
1387                 igb_configure(adapter);
1388         }
1389
1390         igb_assign_vector(adapter->q_vector[0], 0);
1391
1392         if (adapter->flags & IGB_FLAG_HAS_MSI) {
1393                 err = request_irq(pdev->irq, igb_intr_msi, 0,
1394                                   netdev->name, adapter);
1395                 if (!err)
1396                         goto request_done;
1397
1398                 /* fall back to legacy interrupts */
1399                 igb_reset_interrupt_capability(adapter);
1400                 adapter->flags &= ~IGB_FLAG_HAS_MSI;
1401         }
1402
1403         err = request_irq(pdev->irq, igb_intr, IRQF_SHARED,
1404                           netdev->name, adapter);
1405
1406         if (err)
1407                 dev_err(&pdev->dev, "Error %d getting interrupt\n",
1408                         err);
1409
1410 request_done:
1411         return err;
1412 }
1413
1414 static void igb_free_irq(struct igb_adapter *adapter)
1415 {
1416         if (adapter->msix_entries) {
1417                 int vector = 0, i;
1418
1419                 free_irq(adapter->msix_entries[vector++].vector, adapter);
1420
1421                 for (i = 0; i < adapter->num_q_vectors; i++)
1422                         free_irq(adapter->msix_entries[vector++].vector,
1423                                  adapter->q_vector[i]);
1424         } else {
1425                 free_irq(adapter->pdev->irq, adapter);
1426         }
1427 }
1428
1429 /**
1430  *  igb_irq_disable - Mask off interrupt generation on the NIC
1431  *  @adapter: board private structure
1432  **/
1433 static void igb_irq_disable(struct igb_adapter *adapter)
1434 {
1435         struct e1000_hw *hw = &adapter->hw;
1436
1437         /* we need to be careful when disabling interrupts.  The VFs are also
1438          * mapped into these registers and so clearing the bits can cause
1439          * issues on the VF drivers so we only need to clear what we set
1440          */
1441         if (adapter->msix_entries) {
1442                 u32 regval = rd32(E1000_EIAM);
1443                 wr32(E1000_EIAM, regval & ~adapter->eims_enable_mask);
1444                 wr32(E1000_EIMC, adapter->eims_enable_mask);
1445                 regval = rd32(E1000_EIAC);
1446                 wr32(E1000_EIAC, regval & ~adapter->eims_enable_mask);
1447         }
1448
1449         wr32(E1000_IAM, 0);
1450         wr32(E1000_IMC, ~0);
1451         wrfl();
1452         if (adapter->msix_entries) {
1453                 int i;
1454                 for (i = 0; i < adapter->num_q_vectors; i++)
1455                         synchronize_irq(adapter->msix_entries[i].vector);
1456         } else {
1457                 synchronize_irq(adapter->pdev->irq);
1458         }
1459 }
1460
1461 /**
1462  *  igb_irq_enable - Enable default interrupt generation settings
1463  *  @adapter: board private structure
1464  **/
1465 static void igb_irq_enable(struct igb_adapter *adapter)
1466 {
1467         struct e1000_hw *hw = &adapter->hw;
1468
1469         if (adapter->msix_entries) {
1470                 u32 ims = E1000_IMS_LSC | E1000_IMS_DOUTSYNC | E1000_IMS_DRSTA;
1471                 u32 regval = rd32(E1000_EIAC);
1472                 wr32(E1000_EIAC, regval | adapter->eims_enable_mask);
1473                 regval = rd32(E1000_EIAM);
1474                 wr32(E1000_EIAM, regval | adapter->eims_enable_mask);
1475                 wr32(E1000_EIMS, adapter->eims_enable_mask);
1476                 if (adapter->vfs_allocated_count) {
1477                         wr32(E1000_MBVFIMR, 0xFF);
1478                         ims |= E1000_IMS_VMMB;
1479                 }
1480                 wr32(E1000_IMS, ims);
1481         } else {
1482                 wr32(E1000_IMS, IMS_ENABLE_MASK |
1483                                 E1000_IMS_DRSTA);
1484                 wr32(E1000_IAM, IMS_ENABLE_MASK |
1485                                 E1000_IMS_DRSTA);
1486         }
1487 }
1488
1489 static void igb_update_mng_vlan(struct igb_adapter *adapter)
1490 {
1491         struct e1000_hw *hw = &adapter->hw;
1492         u16 vid = adapter->hw.mng_cookie.vlan_id;
1493         u16 old_vid = adapter->mng_vlan_id;
1494
1495         if (hw->mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
1496                 /* add VID to filter table */
1497                 igb_vfta_set(hw, vid, true);
1498                 adapter->mng_vlan_id = vid;
1499         } else {
1500                 adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
1501         }
1502
1503         if ((old_vid != (u16)IGB_MNG_VLAN_NONE) &&
1504             (vid != old_vid) &&
1505             !test_bit(old_vid, adapter->active_vlans)) {
1506                 /* remove VID from filter table */
1507                 igb_vfta_set(hw, old_vid, false);
1508         }
1509 }
1510
1511 /**
1512  *  igb_release_hw_control - release control of the h/w to f/w
1513  *  @adapter: address of board private structure
1514  *
1515  *  igb_release_hw_control resets CTRL_EXT:DRV_LOAD bit.
1516  *  For ASF and Pass Through versions of f/w this means that the
1517  *  driver is no longer loaded.
1518  **/
1519 static void igb_release_hw_control(struct igb_adapter *adapter)
1520 {
1521         struct e1000_hw *hw = &adapter->hw;
1522         u32 ctrl_ext;
1523
1524         /* Let firmware take over control of h/w */
1525         ctrl_ext = rd32(E1000_CTRL_EXT);
1526         wr32(E1000_CTRL_EXT,
1527                         ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
1528 }
1529
1530 /**
1531  *  igb_get_hw_control - get control of the h/w from f/w
1532  *  @adapter: address of board private structure
1533  *
1534  *  igb_get_hw_control sets CTRL_EXT:DRV_LOAD bit.
1535  *  For ASF and Pass Through versions of f/w this means that
1536  *  the driver is loaded.
1537  **/
1538 static void igb_get_hw_control(struct igb_adapter *adapter)
1539 {
1540         struct e1000_hw *hw = &adapter->hw;
1541         u32 ctrl_ext;
1542
1543         /* Let firmware know the driver has taken over */
1544         ctrl_ext = rd32(E1000_CTRL_EXT);
1545         wr32(E1000_CTRL_EXT,
1546                         ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
1547 }
1548
1549 /**
1550  *  igb_configure - configure the hardware for RX and TX
1551  *  @adapter: private board structure
1552  **/
1553 static void igb_configure(struct igb_adapter *adapter)
1554 {
1555         struct net_device *netdev = adapter->netdev;
1556         int i;
1557
1558         igb_get_hw_control(adapter);
1559         igb_set_rx_mode(netdev);
1560
1561         igb_restore_vlan(adapter);
1562
1563         igb_setup_tctl(adapter);
1564         igb_setup_mrqc(adapter);
1565         igb_setup_rctl(adapter);
1566
1567         igb_configure_tx(adapter);
1568         igb_configure_rx(adapter);
1569
1570         igb_rx_fifo_flush_82575(&adapter->hw);
1571
1572         /* call igb_desc_unused which always leaves
1573          * at least 1 descriptor unused to make sure
1574          * next_to_use != next_to_clean
1575          */
1576         for (i = 0; i < adapter->num_rx_queues; i++) {
1577                 struct igb_ring *ring = adapter->rx_ring[i];
1578                 igb_alloc_rx_buffers(ring, igb_desc_unused(ring));
1579         }
1580 }
1581
1582 /**
1583  *  igb_power_up_link - Power up the phy/serdes link
1584  *  @adapter: address of board private structure
1585  **/
1586 void igb_power_up_link(struct igb_adapter *adapter)
1587 {
1588         igb_reset_phy(&adapter->hw);
1589
1590         if (adapter->hw.phy.media_type == e1000_media_type_copper)
1591                 igb_power_up_phy_copper(&adapter->hw);
1592         else
1593                 igb_power_up_serdes_link_82575(&adapter->hw);
1594 }
1595
1596 /**
1597  *  igb_power_down_link - Power down the phy/serdes link
1598  *  @adapter: address of board private structure
1599  */
1600 static void igb_power_down_link(struct igb_adapter *adapter)
1601 {
1602         if (adapter->hw.phy.media_type == e1000_media_type_copper)
1603                 igb_power_down_phy_copper_82575(&adapter->hw);
1604         else
1605                 igb_shutdown_serdes_link_82575(&adapter->hw);
1606 }
1607
1608 /**
1609  *  igb_up - Open the interface and prepare it to handle traffic
1610  *  @adapter: board private structure
1611  **/
1612 int igb_up(struct igb_adapter *adapter)
1613 {
1614         struct e1000_hw *hw = &adapter->hw;
1615         int i;
1616
1617         /* hardware has been reset, we need to reload some things */
1618         igb_configure(adapter);
1619
1620         clear_bit(__IGB_DOWN, &adapter->state);
1621
1622         for (i = 0; i < adapter->num_q_vectors; i++)
1623                 napi_enable(&(adapter->q_vector[i]->napi));
1624
1625         if (adapter->msix_entries)
1626                 igb_configure_msix(adapter);
1627         else
1628                 igb_assign_vector(adapter->q_vector[0], 0);
1629
1630         /* Clear any pending interrupts. */
1631         rd32(E1000_ICR);
1632         igb_irq_enable(adapter);
1633
1634         /* notify VFs that reset has been completed */
1635         if (adapter->vfs_allocated_count) {
1636                 u32 reg_data = rd32(E1000_CTRL_EXT);
1637                 reg_data |= E1000_CTRL_EXT_PFRSTD;
1638                 wr32(E1000_CTRL_EXT, reg_data);
1639         }
1640
1641         netif_tx_start_all_queues(adapter->netdev);
1642
1643         /* start the watchdog. */
1644         hw->mac.get_link_status = 1;
1645         schedule_work(&adapter->watchdog_task);
1646
1647         return 0;
1648 }
1649
1650 void igb_down(struct igb_adapter *adapter)
1651 {
1652         struct net_device *netdev = adapter->netdev;
1653         struct e1000_hw *hw = &adapter->hw;
1654         u32 tctl, rctl;
1655         int i;
1656
1657         /* signal that we're down so the interrupt handler does not
1658          * reschedule our watchdog timer
1659          */
1660         set_bit(__IGB_DOWN, &adapter->state);
1661
1662         /* disable receives in the hardware */
1663         rctl = rd32(E1000_RCTL);
1664         wr32(E1000_RCTL, rctl & ~E1000_RCTL_EN);
1665         /* flush and sleep below */
1666
1667         netif_tx_stop_all_queues(netdev);
1668
1669         /* disable transmits in the hardware */
1670         tctl = rd32(E1000_TCTL);
1671         tctl &= ~E1000_TCTL_EN;
1672         wr32(E1000_TCTL, tctl);
1673         /* flush both disables and wait for them to finish */
1674         wrfl();
1675         msleep(10);
1676
1677         igb_irq_disable(adapter);
1678
1679         adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
1680
1681         for (i = 0; i < adapter->num_q_vectors; i++) {
1682                 napi_synchronize(&(adapter->q_vector[i]->napi));
1683                 napi_disable(&(adapter->q_vector[i]->napi));
1684         }
1685
1686
1687         del_timer_sync(&adapter->watchdog_timer);
1688         del_timer_sync(&adapter->phy_info_timer);
1689
1690         netif_carrier_off(netdev);
1691
1692         /* record the stats before reset*/
1693         spin_lock(&adapter->stats64_lock);
1694         igb_update_stats(adapter, &adapter->stats64);
1695         spin_unlock(&adapter->stats64_lock);
1696
1697         adapter->link_speed = 0;
1698         adapter->link_duplex = 0;
1699
1700         if (!pci_channel_offline(adapter->pdev))
1701                 igb_reset(adapter);
1702         igb_clean_all_tx_rings(adapter);
1703         igb_clean_all_rx_rings(adapter);
1704 #ifdef CONFIG_IGB_DCA
1705
1706         /* since we reset the hardware DCA settings were cleared */
1707         igb_setup_dca(adapter);
1708 #endif
1709 }
1710
1711 void igb_reinit_locked(struct igb_adapter *adapter)
1712 {
1713         WARN_ON(in_interrupt());
1714         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
1715                 msleep(1);
1716         igb_down(adapter);
1717         igb_up(adapter);
1718         clear_bit(__IGB_RESETTING, &adapter->state);
1719 }
1720
1721 void igb_reset(struct igb_adapter *adapter)
1722 {
1723         struct pci_dev *pdev = adapter->pdev;
1724         struct e1000_hw *hw = &adapter->hw;
1725         struct e1000_mac_info *mac = &hw->mac;
1726         struct e1000_fc_info *fc = &hw->fc;
1727         u32 pba = 0, tx_space, min_tx_space, min_rx_space, hwm;
1728
1729         /* Repartition Pba for greater than 9k mtu
1730          * To take effect CTRL.RST is required.
1731          */
1732         switch (mac->type) {
1733         case e1000_i350:
1734         case e1000_i354:
1735         case e1000_82580:
1736                 pba = rd32(E1000_RXPBS);
1737                 pba = igb_rxpbs_adjust_82580(pba);
1738                 break;
1739         case e1000_82576:
1740                 pba = rd32(E1000_RXPBS);
1741                 pba &= E1000_RXPBS_SIZE_MASK_82576;
1742                 break;
1743         case e1000_82575:
1744         case e1000_i210:
1745         case e1000_i211:
1746         default:
1747                 pba = E1000_PBA_34K;
1748                 break;
1749         }
1750
1751         if ((adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) &&
1752             (mac->type < e1000_82576)) {
1753                 /* adjust PBA for jumbo frames */
1754                 wr32(E1000_PBA, pba);
1755
1756                 /* To maintain wire speed transmits, the Tx FIFO should be
1757                  * large enough to accommodate two full transmit packets,
1758                  * rounded up to the next 1KB and expressed in KB.  Likewise,
1759                  * the Rx FIFO should be large enough to accommodate at least
1760                  * one full receive packet and is similarly rounded up and
1761                  * expressed in KB.
1762                  */
1763                 pba = rd32(E1000_PBA);
1764                 /* upper 16 bits has Tx packet buffer allocation size in KB */
1765                 tx_space = pba >> 16;
1766                 /* lower 16 bits has Rx packet buffer allocation size in KB */
1767                 pba &= 0xffff;
1768                 /* the Tx fifo also stores 16 bytes of information about the Tx
1769                  * but don't include ethernet FCS because hardware appends it
1770                  */
1771                 min_tx_space = (adapter->max_frame_size +
1772                                 sizeof(union e1000_adv_tx_desc) -
1773                                 ETH_FCS_LEN) * 2;
1774                 min_tx_space = ALIGN(min_tx_space, 1024);
1775                 min_tx_space >>= 10;
1776                 /* software strips receive CRC, so leave room for it */
1777                 min_rx_space = adapter->max_frame_size;
1778                 min_rx_space = ALIGN(min_rx_space, 1024);
1779                 min_rx_space >>= 10;
1780
1781                 /* If current Tx allocation is less than the min Tx FIFO size,
1782                  * and the min Tx FIFO size is less than the current Rx FIFO
1783                  * allocation, take space away from current Rx allocation
1784                  */
1785                 if (tx_space < min_tx_space &&
1786                     ((min_tx_space - tx_space) < pba)) {
1787                         pba = pba - (min_tx_space - tx_space);
1788
1789                         /* if short on Rx space, Rx wins and must trump Tx
1790                          * adjustment
1791                          */
1792                         if (pba < min_rx_space)
1793                                 pba = min_rx_space;
1794                 }
1795                 wr32(E1000_PBA, pba);
1796         }
1797
1798         /* flow control settings */
1799         /* The high water mark must be low enough to fit one full frame
1800          * (or the size used for early receive) above it in the Rx FIFO.
1801          * Set it to the lower of:
1802          * - 90% of the Rx FIFO size, or
1803          * - the full Rx FIFO size minus one full frame
1804          */
1805         hwm = min(((pba << 10) * 9 / 10),
1806                         ((pba << 10) - 2 * adapter->max_frame_size));
1807
1808         fc->high_water = hwm & 0xFFFFFFF0;      /* 16-byte granularity */
1809         fc->low_water = fc->high_water - 16;
1810         fc->pause_time = 0xFFFF;
1811         fc->send_xon = 1;
1812         fc->current_mode = fc->requested_mode;
1813
1814         /* disable receive for all VFs and wait one second */
1815         if (adapter->vfs_allocated_count) {
1816                 int i;
1817                 for (i = 0 ; i < adapter->vfs_allocated_count; i++)
1818                         adapter->vf_data[i].flags &= IGB_VF_FLAG_PF_SET_MAC;
1819
1820                 /* ping all the active vfs to let them know we are going down */
1821                 igb_ping_all_vfs(adapter);
1822
1823                 /* disable transmits and receives */
1824                 wr32(E1000_VFRE, 0);
1825                 wr32(E1000_VFTE, 0);
1826         }
1827
1828         /* Allow time for pending master requests to run */
1829         hw->mac.ops.reset_hw(hw);
1830         wr32(E1000_WUC, 0);
1831
1832         if (hw->mac.ops.init_hw(hw))
1833                 dev_err(&pdev->dev, "Hardware Error\n");
1834
1835         /* Flow control settings reset on hardware reset, so guarantee flow
1836          * control is off when forcing speed.
1837          */
1838         if (!hw->mac.autoneg)
1839                 igb_force_mac_fc(hw);
1840
1841         igb_init_dmac(adapter, pba);
1842 #ifdef CONFIG_IGB_HWMON
1843         /* Re-initialize the thermal sensor on i350 devices. */
1844         if (!test_bit(__IGB_DOWN, &adapter->state)) {
1845                 if (mac->type == e1000_i350 && hw->bus.func == 0) {
1846                         /* If present, re-initialize the external thermal sensor
1847                          * interface.
1848                          */
1849                         if (adapter->ets)
1850                                 mac->ops.init_thermal_sensor_thresh(hw);
1851                 }
1852         }
1853 #endif
1854         if (!netif_running(adapter->netdev))
1855                 igb_power_down_link(adapter);
1856
1857         igb_update_mng_vlan(adapter);
1858
1859         /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
1860         wr32(E1000_VET, ETHERNET_IEEE_VLAN_TYPE);
1861
1862         /* Re-enable PTP, where applicable. */
1863         igb_ptp_reset(adapter);
1864
1865         igb_get_phy_info(hw);
1866 }
1867
1868 static netdev_features_t igb_fix_features(struct net_device *netdev,
1869         netdev_features_t features)
1870 {
1871         /* Since there is no support for separate Rx/Tx vlan accel
1872          * enable/disable make sure Tx flag is always in same state as Rx.
1873          */
1874         if (features & NETIF_F_HW_VLAN_CTAG_RX)
1875                 features |= NETIF_F_HW_VLAN_CTAG_TX;
1876         else
1877                 features &= ~NETIF_F_HW_VLAN_CTAG_TX;
1878
1879         return features;
1880 }
1881
1882 static int igb_set_features(struct net_device *netdev,
1883         netdev_features_t features)
1884 {
1885         netdev_features_t changed = netdev->features ^ features;
1886         struct igb_adapter *adapter = netdev_priv(netdev);
1887
1888         if (changed & NETIF_F_HW_VLAN_CTAG_RX)
1889                 igb_vlan_mode(netdev, features);
1890
1891         if (!(changed & NETIF_F_RXALL))
1892                 return 0;
1893
1894         netdev->features = features;
1895
1896         if (netif_running(netdev))
1897                 igb_reinit_locked(adapter);
1898         else
1899                 igb_reset(adapter);
1900
1901         return 0;
1902 }
1903
1904 static const struct net_device_ops igb_netdev_ops = {
1905         .ndo_open               = igb_open,
1906         .ndo_stop               = igb_close,
1907         .ndo_start_xmit         = igb_xmit_frame,
1908         .ndo_get_stats64        = igb_get_stats64,
1909         .ndo_set_rx_mode        = igb_set_rx_mode,
1910         .ndo_set_mac_address    = igb_set_mac,
1911         .ndo_change_mtu         = igb_change_mtu,
1912         .ndo_do_ioctl           = igb_ioctl,
1913         .ndo_tx_timeout         = igb_tx_timeout,
1914         .ndo_validate_addr      = eth_validate_addr,
1915         .ndo_vlan_rx_add_vid    = igb_vlan_rx_add_vid,
1916         .ndo_vlan_rx_kill_vid   = igb_vlan_rx_kill_vid,
1917         .ndo_set_vf_mac         = igb_ndo_set_vf_mac,
1918         .ndo_set_vf_vlan        = igb_ndo_set_vf_vlan,
1919         .ndo_set_vf_tx_rate     = igb_ndo_set_vf_bw,
1920         .ndo_set_vf_spoofchk    = igb_ndo_set_vf_spoofchk,
1921         .ndo_get_vf_config      = igb_ndo_get_vf_config,
1922 #ifdef CONFIG_NET_POLL_CONTROLLER
1923         .ndo_poll_controller    = igb_netpoll,
1924 #endif
1925         .ndo_fix_features       = igb_fix_features,
1926         .ndo_set_features       = igb_set_features,
1927 };
1928
1929 /**
1930  * igb_set_fw_version - Configure version string for ethtool
1931  * @adapter: adapter struct
1932  **/
1933 void igb_set_fw_version(struct igb_adapter *adapter)
1934 {
1935         struct e1000_hw *hw = &adapter->hw;
1936         struct e1000_fw_version fw;
1937
1938         igb_get_fw_version(hw, &fw);
1939
1940         switch (hw->mac.type) {
1941         case e1000_i210:
1942         case e1000_i211:
1943                 if (!(igb_get_flash_presence_i210(hw))) {
1944                         snprintf(adapter->fw_version,
1945                                  sizeof(adapter->fw_version),
1946                                  "%2d.%2d-%d",
1947                                  fw.invm_major, fw.invm_minor,
1948                                  fw.invm_img_type);
1949                         break;
1950                 }
1951                 /* fall through */
1952         default:
1953                 /* if option is rom valid, display its version too */
1954                 if (fw.or_valid) {
1955                         snprintf(adapter->fw_version,
1956                                  sizeof(adapter->fw_version),
1957                                  "%d.%d, 0x%08x, %d.%d.%d",
1958                                  fw.eep_major, fw.eep_minor, fw.etrack_id,
1959                                  fw.or_major, fw.or_build, fw.or_patch);
1960                 /* no option rom */
1961                 } else if (fw.etrack_id != 0X0000) {
1962                         snprintf(adapter->fw_version,
1963                             sizeof(adapter->fw_version),
1964                             "%d.%d, 0x%08x",
1965                             fw.eep_major, fw.eep_minor, fw.etrack_id);
1966                 } else {
1967                 snprintf(adapter->fw_version,
1968                     sizeof(adapter->fw_version),
1969                     "%d.%d.%d",
1970                     fw.eep_major, fw.eep_minor, fw.eep_build);
1971                 }
1972                 break;
1973         }
1974         return;
1975 }
1976
1977 /**
1978  *  igb_init_i2c - Init I2C interface
1979  *  @adapter: pointer to adapter structure
1980  **/
1981 static s32 igb_init_i2c(struct igb_adapter *adapter)
1982 {
1983         s32 status = E1000_SUCCESS;
1984
1985         /* I2C interface supported on i350 devices */
1986         if (adapter->hw.mac.type != e1000_i350)
1987                 return E1000_SUCCESS;
1988
1989         /* Initialize the i2c bus which is controlled by the registers.
1990          * This bus will use the i2c_algo_bit structue that implements
1991          * the protocol through toggling of the 4 bits in the register.
1992          */
1993         adapter->i2c_adap.owner = THIS_MODULE;
1994         adapter->i2c_algo = igb_i2c_algo;
1995         adapter->i2c_algo.data = adapter;
1996         adapter->i2c_adap.algo_data = &adapter->i2c_algo;
1997         adapter->i2c_adap.dev.parent = &adapter->pdev->dev;
1998         strlcpy(adapter->i2c_adap.name, "igb BB",
1999                 sizeof(adapter->i2c_adap.name));
2000         status = i2c_bit_add_bus(&adapter->i2c_adap);
2001         return status;
2002 }
2003
2004 /**
2005  *  igb_probe - Device Initialization Routine
2006  *  @pdev: PCI device information struct
2007  *  @ent: entry in igb_pci_tbl
2008  *
2009  *  Returns 0 on success, negative on failure
2010  *
2011  *  igb_probe initializes an adapter identified by a pci_dev structure.
2012  *  The OS initialization, configuring of the adapter private structure,
2013  *  and a hardware reset occur.
2014  **/
2015 static int igb_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
2016 {
2017         struct net_device *netdev;
2018         struct igb_adapter *adapter;
2019         struct e1000_hw *hw;
2020         u16 eeprom_data = 0;
2021         s32 ret_val;
2022         static int global_quad_port_a; /* global quad port a indication */
2023         const struct e1000_info *ei = igb_info_tbl[ent->driver_data];
2024         unsigned long mmio_start, mmio_len;
2025         int err, pci_using_dac;
2026         u8 part_str[E1000_PBANUM_LENGTH];
2027
2028         /* Catch broken hardware that put the wrong VF device ID in
2029          * the PCIe SR-IOV capability.
2030          */
2031         if (pdev->is_virtfn) {
2032                 WARN(1, KERN_ERR "%s (%hx:%hx) should not be a VF!\n",
2033                         pci_name(pdev), pdev->vendor, pdev->device);
2034                 return -EINVAL;
2035         }
2036
2037         err = pci_enable_device_mem(pdev);
2038         if (err)
2039                 return err;
2040
2041         pci_using_dac = 0;
2042         err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(64));
2043         if (!err) {
2044                 err = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64));
2045                 if (!err)
2046                         pci_using_dac = 1;
2047         } else {
2048                 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
2049                 if (err) {
2050                         err = dma_set_coherent_mask(&pdev->dev,
2051                                                     DMA_BIT_MASK(32));
2052                         if (err) {
2053                                 dev_err(&pdev->dev,
2054                                         "No usable DMA configuration, aborting\n");
2055                                 goto err_dma;
2056                         }
2057                 }
2058         }
2059
2060         err = pci_request_selected_regions(pdev, pci_select_bars(pdev,
2061                                            IORESOURCE_MEM),
2062                                            igb_driver_name);
2063         if (err)
2064                 goto err_pci_reg;
2065
2066         pci_enable_pcie_error_reporting(pdev);
2067
2068         pci_set_master(pdev);
2069         pci_save_state(pdev);
2070
2071         err = -ENOMEM;
2072         netdev = alloc_etherdev_mq(sizeof(struct igb_adapter),
2073                                    IGB_MAX_TX_QUEUES);
2074         if (!netdev)
2075                 goto err_alloc_etherdev;
2076
2077         SET_NETDEV_DEV(netdev, &pdev->dev);
2078
2079         pci_set_drvdata(pdev, netdev);
2080         adapter = netdev_priv(netdev);
2081         adapter->netdev = netdev;
2082         adapter->pdev = pdev;
2083         hw = &adapter->hw;
2084         hw->back = adapter;
2085         adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
2086
2087         mmio_start = pci_resource_start(pdev, 0);
2088         mmio_len = pci_resource_len(pdev, 0);
2089
2090         err = -EIO;
2091         hw->hw_addr = ioremap(mmio_start, mmio_len);
2092         if (!hw->hw_addr)
2093                 goto err_ioremap;
2094
2095         netdev->netdev_ops = &igb_netdev_ops;
2096         igb_set_ethtool_ops(netdev);
2097         netdev->watchdog_timeo = 5 * HZ;
2098
2099         strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
2100
2101         netdev->mem_start = mmio_start;
2102         netdev->mem_end = mmio_start + mmio_len;
2103
2104         /* PCI config space info */
2105         hw->vendor_id = pdev->vendor;
2106         hw->device_id = pdev->device;
2107         hw->revision_id = pdev->revision;
2108         hw->subsystem_vendor_id = pdev->subsystem_vendor;
2109         hw->subsystem_device_id = pdev->subsystem_device;
2110
2111         /* Copy the default MAC, PHY and NVM function pointers */
2112         memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
2113         memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
2114         memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
2115         /* Initialize skew-specific constants */
2116         err = ei->get_invariants(hw);
2117         if (err)
2118                 goto err_sw_init;
2119
2120         /* setup the private structure */
2121         err = igb_sw_init(adapter);
2122         if (err)
2123                 goto err_sw_init;
2124
2125         igb_get_bus_info_pcie(hw);
2126
2127         hw->phy.autoneg_wait_to_complete = false;
2128
2129         /* Copper options */
2130         if (hw->phy.media_type == e1000_media_type_copper) {
2131                 hw->phy.mdix = AUTO_ALL_MODES;
2132                 hw->phy.disable_polarity_correction = false;
2133                 hw->phy.ms_type = e1000_ms_hw_default;
2134         }
2135
2136         if (igb_check_reset_block(hw))
2137                 dev_info(&pdev->dev,
2138                         "PHY reset is blocked due to SOL/IDER session.\n");
2139
2140         /* features is initialized to 0 in allocation, it might have bits
2141          * set by igb_sw_init so we should use an or instead of an
2142          * assignment.
2143          */
2144         netdev->features |= NETIF_F_SG |
2145                             NETIF_F_IP_CSUM |
2146                             NETIF_F_IPV6_CSUM |
2147                             NETIF_F_TSO |
2148                             NETIF_F_TSO6 |
2149                             NETIF_F_RXHASH |
2150                             NETIF_F_RXCSUM |
2151                             NETIF_F_HW_VLAN_CTAG_RX |
2152                             NETIF_F_HW_VLAN_CTAG_TX;
2153
2154         /* copy netdev features into list of user selectable features */
2155         netdev->hw_features |= netdev->features;
2156         netdev->hw_features |= NETIF_F_RXALL;
2157
2158         /* set this bit last since it cannot be part of hw_features */
2159         netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER;
2160
2161         netdev->vlan_features |= NETIF_F_TSO |
2162                                  NETIF_F_TSO6 |
2163                                  NETIF_F_IP_CSUM |
2164                                  NETIF_F_IPV6_CSUM |
2165                                  NETIF_F_SG;
2166
2167         netdev->priv_flags |= IFF_SUPP_NOFCS;
2168
2169         if (pci_using_dac) {
2170                 netdev->features |= NETIF_F_HIGHDMA;
2171                 netdev->vlan_features |= NETIF_F_HIGHDMA;
2172         }
2173
2174         if (hw->mac.type >= e1000_82576) {
2175                 netdev->hw_features |= NETIF_F_SCTP_CSUM;
2176                 netdev->features |= NETIF_F_SCTP_CSUM;
2177         }
2178
2179         netdev->priv_flags |= IFF_UNICAST_FLT;
2180
2181         adapter->en_mng_pt = igb_enable_mng_pass_thru(hw);
2182
2183         /* before reading the NVM, reset the controller to put the device in a
2184          * known good starting state
2185          */
2186         hw->mac.ops.reset_hw(hw);
2187
2188         /* make sure the NVM is good , i211/i210 parts can have special NVM
2189          * that doesn't contain a checksum
2190          */
2191         switch (hw->mac.type) {
2192         case e1000_i210:
2193         case e1000_i211:
2194                 if (igb_get_flash_presence_i210(hw)) {
2195                         if (hw->nvm.ops.validate(hw) < 0) {
2196                                 dev_err(&pdev->dev,
2197                                         "The NVM Checksum Is Not Valid\n");
2198                                 err = -EIO;
2199                                 goto err_eeprom;
2200                         }
2201                 }
2202                 break;
2203         default:
2204                 if (hw->nvm.ops.validate(hw) < 0) {
2205                         dev_err(&pdev->dev, "The NVM Checksum Is Not Valid\n");
2206                         err = -EIO;
2207                         goto err_eeprom;
2208                 }
2209                 break;
2210         }
2211
2212         /* copy the MAC address out of the NVM */
2213         if (hw->mac.ops.read_mac_addr(hw))
2214                 dev_err(&pdev->dev, "NVM Read Error\n");
2215
2216         memcpy(netdev->dev_addr, hw->mac.addr, netdev->addr_len);
2217
2218         if (!is_valid_ether_addr(netdev->dev_addr)) {
2219                 dev_err(&pdev->dev, "Invalid MAC Address\n");
2220                 err = -EIO;
2221                 goto err_eeprom;
2222         }
2223
2224         /* get firmware version for ethtool -i */
2225         igb_set_fw_version(adapter);
2226
2227         setup_timer(&adapter->watchdog_timer, igb_watchdog,
2228                     (unsigned long) adapter);
2229         setup_timer(&adapter->phy_info_timer, igb_update_phy_info,
2230                     (unsigned long) adapter);
2231
2232         INIT_WORK(&adapter->reset_task, igb_reset_task);
2233         INIT_WORK(&adapter->watchdog_task, igb_watchdog_task);
2234
2235         /* Initialize link properties that are user-changeable */
2236         adapter->fc_autoneg = true;
2237         hw->mac.autoneg = true;
2238         hw->phy.autoneg_advertised = 0x2f;
2239
2240         hw->fc.requested_mode = e1000_fc_default;
2241         hw->fc.current_mode = e1000_fc_default;
2242
2243         igb_validate_mdi_setting(hw);
2244
2245         /* By default, support wake on port A */
2246         if (hw->bus.func == 0)
2247                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2248
2249         /* Check the NVM for wake support on non-port A ports */
2250         if (hw->mac.type >= e1000_82580)
2251                 hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_A +
2252                                  NVM_82580_LAN_FUNC_OFFSET(hw->bus.func), 1,
2253                                  &eeprom_data);
2254         else if (hw->bus.func == 1)
2255                 hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
2256
2257         if (eeprom_data & IGB_EEPROM_APME)
2258                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2259
2260         /* now that we have the eeprom settings, apply the special cases where
2261          * the eeprom may be wrong or the board simply won't support wake on
2262          * lan on a particular port
2263          */
2264         switch (pdev->device) {
2265         case E1000_DEV_ID_82575GB_QUAD_COPPER:
2266                 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2267                 break;
2268         case E1000_DEV_ID_82575EB_FIBER_SERDES:
2269         case E1000_DEV_ID_82576_FIBER:
2270         case E1000_DEV_ID_82576_SERDES:
2271                 /* Wake events only supported on port A for dual fiber
2272                  * regardless of eeprom setting
2273                  */
2274                 if (rd32(E1000_STATUS) & E1000_STATUS_FUNC_1)
2275                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2276                 break;
2277         case E1000_DEV_ID_82576_QUAD_COPPER:
2278         case E1000_DEV_ID_82576_QUAD_COPPER_ET2:
2279                 /* if quad port adapter, disable WoL on all but port A */
2280                 if (global_quad_port_a != 0)
2281                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2282                 else
2283                         adapter->flags |= IGB_FLAG_QUAD_PORT_A;
2284                 /* Reset for multiple quad port adapters */
2285                 if (++global_quad_port_a == 4)
2286                         global_quad_port_a = 0;
2287                 break;
2288         default:
2289                 /* If the device can't wake, don't set software support */
2290                 if (!device_can_wakeup(&adapter->pdev->dev))
2291                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2292         }
2293
2294         /* initialize the wol settings based on the eeprom settings */
2295         if (adapter->flags & IGB_FLAG_WOL_SUPPORTED)
2296                 adapter->wol |= E1000_WUFC_MAG;
2297
2298         /* Some vendors want WoL disabled by default, but still supported */
2299         if ((hw->mac.type == e1000_i350) &&
2300             (pdev->subsystem_vendor == PCI_VENDOR_ID_HP)) {
2301                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2302                 adapter->wol = 0;
2303         }
2304
2305         device_set_wakeup_enable(&adapter->pdev->dev,
2306                                  adapter->flags & IGB_FLAG_WOL_SUPPORTED);
2307
2308         /* reset the hardware with the new settings */
2309         igb_reset(adapter);
2310
2311         /* Init the I2C interface */
2312         err = igb_init_i2c(adapter);
2313         if (err) {
2314                 dev_err(&pdev->dev, "failed to init i2c interface\n");
2315                 goto err_eeprom;
2316         }
2317
2318         /* let the f/w know that the h/w is now under the control of the
2319          * driver. */
2320         igb_get_hw_control(adapter);
2321
2322         strcpy(netdev->name, "eth%d");
2323         err = register_netdev(netdev);
2324         if (err)
2325                 goto err_register;
2326
2327         /* carrier off reporting is important to ethtool even BEFORE open */
2328         netif_carrier_off(netdev);
2329
2330 #ifdef CONFIG_IGB_DCA
2331         if (dca_add_requester(&pdev->dev) == 0) {
2332                 adapter->flags |= IGB_FLAG_DCA_ENABLED;
2333                 dev_info(&pdev->dev, "DCA enabled\n");
2334                 igb_setup_dca(adapter);
2335         }
2336
2337 #endif
2338 #ifdef CONFIG_IGB_HWMON
2339         /* Initialize the thermal sensor on i350 devices. */
2340         if (hw->mac.type == e1000_i350 && hw->bus.func == 0) {
2341                 u16 ets_word;
2342
2343                 /* Read the NVM to determine if this i350 device supports an
2344                  * external thermal sensor.
2345                  */
2346                 hw->nvm.ops.read(hw, NVM_ETS_CFG, 1, &ets_word);
2347                 if (ets_word != 0x0000 && ets_word != 0xFFFF)
2348                         adapter->ets = true;
2349                 else
2350                         adapter->ets = false;
2351                 if (igb_sysfs_init(adapter))
2352                         dev_err(&pdev->dev,
2353                                 "failed to allocate sysfs resources\n");
2354         } else {
2355                 adapter->ets = false;
2356         }
2357 #endif
2358         /* do hw tstamp init after resetting */
2359         igb_ptp_init(adapter);
2360
2361         dev_info(&pdev->dev, "Intel(R) Gigabit Ethernet Network Connection\n");
2362         /* print bus type/speed/width info, not applicable to i354 */
2363         if (hw->mac.type != e1000_i354) {
2364                 dev_info(&pdev->dev, "%s: (PCIe:%s:%s) %pM\n",
2365                          netdev->name,
2366                          ((hw->bus.speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
2367                           (hw->bus.speed == e1000_bus_speed_5000) ? "5.0Gb/s" :
2368                            "unknown"),
2369                          ((hw->bus.width == e1000_bus_width_pcie_x4) ?
2370                           "Width x4" :
2371                           (hw->bus.width == e1000_bus_width_pcie_x2) ?
2372                           "Width x2" :
2373                           (hw->bus.width == e1000_bus_width_pcie_x1) ?
2374                           "Width x1" : "unknown"), netdev->dev_addr);
2375         }
2376
2377         if ((hw->mac.type >= e1000_i210 ||
2378              igb_get_flash_presence_i210(hw))) {
2379                 ret_val = igb_read_part_string(hw, part_str,
2380                                                E1000_PBANUM_LENGTH);
2381         } else {
2382                 ret_val = -E1000_ERR_INVM_VALUE_NOT_FOUND;
2383         }
2384
2385         if (ret_val)
2386                 strcpy(part_str, "Unknown");
2387         dev_info(&pdev->dev, "%s: PBA No: %s\n", netdev->name, part_str);
2388         dev_info(&pdev->dev,
2389                 "Using %s interrupts. %d rx queue(s), %d tx queue(s)\n",
2390                 adapter->msix_entries ? "MSI-X" :
2391                 (adapter->flags & IGB_FLAG_HAS_MSI) ? "MSI" : "legacy",
2392                 adapter->num_rx_queues, adapter->num_tx_queues);
2393         switch (hw->mac.type) {
2394         case e1000_i350:
2395         case e1000_i210:
2396         case e1000_i211:
2397                 igb_set_eee_i350(hw);
2398                 break;
2399         case e1000_i354:
2400                 if (hw->phy.media_type == e1000_media_type_copper) {
2401                         if ((rd32(E1000_CTRL_EXT) &
2402                             E1000_CTRL_EXT_LINK_MODE_SGMII))
2403                                 igb_set_eee_i354(hw);
2404                 }
2405                 break;
2406         default:
2407                 break;
2408         }
2409
2410         pm_runtime_put_noidle(&pdev->dev);
2411         return 0;
2412
2413 err_register:
2414         igb_release_hw_control(adapter);
2415         memset(&adapter->i2c_adap, 0, sizeof(adapter->i2c_adap));
2416 err_eeprom:
2417         if (!igb_check_reset_block(hw))
2418                 igb_reset_phy(hw);
2419
2420         if (hw->flash_address)
2421                 iounmap(hw->flash_address);
2422 err_sw_init:
2423         igb_clear_interrupt_scheme(adapter);
2424         iounmap(hw->hw_addr);
2425 err_ioremap:
2426         free_netdev(netdev);
2427 err_alloc_etherdev:
2428         pci_release_selected_regions(pdev,
2429                                      pci_select_bars(pdev, IORESOURCE_MEM));
2430 err_pci_reg:
2431 err_dma:
2432         pci_disable_device(pdev);
2433         return err;
2434 }
2435
2436 #ifdef CONFIG_PCI_IOV
2437 static int  igb_disable_sriov(struct pci_dev *pdev)
2438 {
2439         struct net_device *netdev = pci_get_drvdata(pdev);
2440         struct igb_adapter *adapter = netdev_priv(netdev);
2441         struct e1000_hw *hw = &adapter->hw;
2442
2443         /* reclaim resources allocated to VFs */
2444         if (adapter->vf_data) {
2445                 /* disable iov and allow time for transactions to clear */
2446                 if (pci_vfs_assigned(pdev)) {
2447                         dev_warn(&pdev->dev,
2448                                  "Cannot deallocate SR-IOV virtual functions while they are assigned - VFs will not be deallocated\n");
2449                         return -EPERM;
2450                 } else {
2451                         pci_disable_sriov(pdev);
2452                         msleep(500);
2453                 }
2454
2455                 kfree(adapter->vf_data);
2456                 adapter->vf_data = NULL;
2457                 adapter->vfs_allocated_count = 0;
2458                 wr32(E1000_IOVCTL, E1000_IOVCTL_REUSE_VFQ);
2459                 wrfl();
2460                 msleep(100);
2461                 dev_info(&pdev->dev, "IOV Disabled\n");
2462
2463                 /* Re-enable DMA Coalescing flag since IOV is turned off */
2464                 adapter->flags |= IGB_FLAG_DMAC;
2465         }
2466
2467         return 0;
2468 }
2469
2470 static int igb_enable_sriov(struct pci_dev *pdev, int num_vfs)
2471 {
2472         struct net_device *netdev = pci_get_drvdata(pdev);
2473         struct igb_adapter *adapter = netdev_priv(netdev);
2474         int old_vfs = pci_num_vf(pdev);
2475         int err = 0;
2476         int i;
2477
2478         if (!adapter->msix_entries) {
2479                 err = -EPERM;
2480                 goto out;
2481         }
2482
2483         if (!num_vfs)
2484                 goto out;
2485         else if (old_vfs && old_vfs == num_vfs)
2486                 goto out;
2487         else if (old_vfs && old_vfs != num_vfs)
2488                 err = igb_disable_sriov(pdev);
2489
2490         if (err)
2491                 goto out;
2492
2493         if (num_vfs > 7) {
2494                 err = -EPERM;
2495                 goto out;
2496         }
2497
2498         adapter->vfs_allocated_count = num_vfs;
2499
2500         adapter->vf_data = kcalloc(adapter->vfs_allocated_count,
2501                                 sizeof(struct vf_data_storage), GFP_KERNEL);
2502
2503         /* if allocation failed then we do not support SR-IOV */
2504         if (!adapter->vf_data) {
2505                 adapter->vfs_allocated_count = 0;
2506                 dev_err(&pdev->dev,
2507                         "Unable to allocate memory for VF Data Storage\n");
2508                 err = -ENOMEM;
2509                 goto out;
2510         }
2511
2512         err = pci_enable_sriov(pdev, adapter->vfs_allocated_count);
2513         if (err)
2514                 goto err_out;
2515
2516         dev_info(&pdev->dev, "%d VFs allocated\n",
2517                  adapter->vfs_allocated_count);
2518         for (i = 0; i < adapter->vfs_allocated_count; i++)
2519                 igb_vf_configure(adapter, i);
2520
2521         /* DMA Coalescing is not supported in IOV mode. */
2522         adapter->flags &= ~IGB_FLAG_DMAC;
2523         goto out;
2524
2525 err_out:
2526         kfree(adapter->vf_data);
2527         adapter->vf_data = NULL;
2528         adapter->vfs_allocated_count = 0;
2529 out:
2530         return err;
2531 }
2532
2533 #endif
2534 /**
2535  *  igb_remove_i2c - Cleanup  I2C interface
2536  *  @adapter: pointer to adapter structure
2537  **/
2538 static void igb_remove_i2c(struct igb_adapter *adapter)
2539 {
2540         /* free the adapter bus structure */
2541         i2c_del_adapter(&adapter->i2c_adap);
2542 }
2543
2544 /**
2545  *  igb_remove - Device Removal Routine
2546  *  @pdev: PCI device information struct
2547  *
2548  *  igb_remove is called by the PCI subsystem to alert the driver
2549  *  that it should release a PCI device.  The could be caused by a
2550  *  Hot-Plug event, or because the driver is going to be removed from
2551  *  memory.
2552  **/
2553 static void igb_remove(struct pci_dev *pdev)
2554 {
2555         struct net_device *netdev = pci_get_drvdata(pdev);
2556         struct igb_adapter *adapter = netdev_priv(netdev);
2557         struct e1000_hw *hw = &adapter->hw;
2558
2559         pm_runtime_get_noresume(&pdev->dev);
2560 #ifdef CONFIG_IGB_HWMON
2561         igb_sysfs_exit(adapter);
2562 #endif
2563         igb_remove_i2c(adapter);
2564         igb_ptp_stop(adapter);
2565         /* The watchdog timer may be rescheduled, so explicitly
2566          * disable watchdog from being rescheduled.
2567          */
2568         set_bit(__IGB_DOWN, &adapter->state);
2569         del_timer_sync(&adapter->watchdog_timer);
2570         del_timer_sync(&adapter->phy_info_timer);
2571
2572         cancel_work_sync(&adapter->reset_task);
2573         cancel_work_sync(&adapter->watchdog_task);
2574
2575 #ifdef CONFIG_IGB_DCA
2576         if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
2577                 dev_info(&pdev->dev, "DCA disabled\n");
2578                 dca_remove_requester(&pdev->dev);
2579                 adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
2580                 wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_DISABLE);
2581         }
2582 #endif
2583
2584         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
2585          * would have already happened in close and is redundant.
2586          */
2587         igb_release_hw_control(adapter);
2588
2589         unregister_netdev(netdev);
2590
2591         igb_clear_interrupt_scheme(adapter);
2592
2593 #ifdef CONFIG_PCI_IOV
2594         igb_disable_sriov(pdev);
2595 #endif
2596
2597         iounmap(hw->hw_addr);
2598         if (hw->flash_address)
2599                 iounmap(hw->flash_address);
2600         pci_release_selected_regions(pdev,
2601                                      pci_select_bars(pdev, IORESOURCE_MEM));
2602
2603         kfree(adapter->shadow_vfta);
2604         free_netdev(netdev);
2605
2606         pci_disable_pcie_error_reporting(pdev);
2607
2608         pci_disable_device(pdev);
2609 }
2610
2611 /**
2612  *  igb_probe_vfs - Initialize vf data storage and add VFs to pci config space
2613  *  @adapter: board private structure to initialize
2614  *
2615  *  This function initializes the vf specific data storage and then attempts to
2616  *  allocate the VFs.  The reason for ordering it this way is because it is much
2617  *  mor expensive time wise to disable SR-IOV than it is to allocate and free
2618  *  the memory for the VFs.
2619  **/
2620 static void igb_probe_vfs(struct igb_adapter *adapter)
2621 {
2622 #ifdef CONFIG_PCI_IOV
2623         struct pci_dev *pdev = adapter->pdev;
2624         struct e1000_hw *hw = &adapter->hw;
2625
2626         /* Virtualization features not supported on i210 family. */
2627         if ((hw->mac.type == e1000_i210) || (hw->mac.type == e1000_i211))
2628                 return;
2629
2630         pci_sriov_set_totalvfs(pdev, 7);
2631         igb_enable_sriov(pdev, max_vfs);
2632
2633 #endif /* CONFIG_PCI_IOV */
2634 }
2635
2636 static void igb_init_queue_configuration(struct igb_adapter *adapter)
2637 {
2638         struct e1000_hw *hw = &adapter->hw;
2639         u32 max_rss_queues;
2640
2641         /* Determine the maximum number of RSS queues supported. */
2642         switch (hw->mac.type) {
2643         case e1000_i211:
2644                 max_rss_queues = IGB_MAX_RX_QUEUES_I211;
2645                 break;
2646         case e1000_82575:
2647         case e1000_i210:
2648                 max_rss_queues = IGB_MAX_RX_QUEUES_82575;
2649                 break;
2650         case e1000_i350:
2651                 /* I350 cannot do RSS and SR-IOV at the same time */
2652                 if (!!adapter->vfs_allocated_count) {
2653                         max_rss_queues = 1;
2654                         break;
2655                 }
2656                 /* fall through */
2657         case e1000_82576:
2658                 if (!!adapter->vfs_allocated_count) {
2659                         max_rss_queues = 2;
2660                         break;
2661                 }
2662                 /* fall through */
2663         case e1000_82580:
2664         case e1000_i354:
2665         default:
2666                 max_rss_queues = IGB_MAX_RX_QUEUES;
2667                 break;
2668         }
2669
2670         adapter->rss_queues = min_t(u32, max_rss_queues, num_online_cpus());
2671
2672         /* Determine if we need to pair queues. */
2673         switch (hw->mac.type) {
2674         case e1000_82575:
2675         case e1000_i211:
2676                 /* Device supports enough interrupts without queue pairing. */
2677                 break;
2678         case e1000_82576:
2679                 /* If VFs are going to be allocated with RSS queues then we
2680                  * should pair the queues in order to conserve interrupts due
2681                  * to limited supply.
2682                  */
2683                 if ((adapter->rss_queues > 1) &&
2684                     (adapter->vfs_allocated_count > 6))
2685                         adapter->flags |= IGB_FLAG_QUEUE_PAIRS;
2686                 /* fall through */
2687         case e1000_82580:
2688         case e1000_i350:
2689         case e1000_i354:
2690         case e1000_i210:
2691         default:
2692                 /* If rss_queues > half of max_rss_queues, pair the queues in
2693                  * order to conserve interrupts due to limited supply.
2694                  */
2695                 if (adapter->rss_queues > (max_rss_queues / 2))
2696                         adapter->flags |= IGB_FLAG_QUEUE_PAIRS;
2697                 break;
2698         }
2699 }
2700
2701 /**
2702  *  igb_sw_init - Initialize general software structures (struct igb_adapter)
2703  *  @adapter: board private structure to initialize
2704  *
2705  *  igb_sw_init initializes the Adapter private data structure.
2706  *  Fields are initialized based on PCI device information and
2707  *  OS network device settings (MTU size).
2708  **/
2709 static int igb_sw_init(struct igb_adapter *adapter)
2710 {
2711         struct e1000_hw *hw = &adapter->hw;
2712         struct net_device *netdev = adapter->netdev;
2713         struct pci_dev *pdev = adapter->pdev;
2714
2715         pci_read_config_word(pdev, PCI_COMMAND, &hw->bus.pci_cmd_word);
2716
2717         /* set default ring sizes */
2718         adapter->tx_ring_count = IGB_DEFAULT_TXD;
2719         adapter->rx_ring_count = IGB_DEFAULT_RXD;
2720
2721         /* set default ITR values */
2722         adapter->rx_itr_setting = IGB_DEFAULT_ITR;
2723         adapter->tx_itr_setting = IGB_DEFAULT_ITR;
2724
2725         /* set default work limits */
2726         adapter->tx_work_limit = IGB_DEFAULT_TX_WORK;
2727
2728         adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN +
2729                                   VLAN_HLEN;
2730         adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
2731
2732         spin_lock_init(&adapter->stats64_lock);
2733 #ifdef CONFIG_PCI_IOV
2734         switch (hw->mac.type) {
2735         case e1000_82576:
2736         case e1000_i350:
2737                 if (max_vfs > 7) {
2738                         dev_warn(&pdev->dev,
2739                                  "Maximum of 7 VFs per PF, using max\n");
2740                         max_vfs = adapter->vfs_allocated_count = 7;
2741                 } else
2742                         adapter->vfs_allocated_count = max_vfs;
2743                 if (adapter->vfs_allocated_count)
2744                         dev_warn(&pdev->dev,
2745                                  "Enabling SR-IOV VFs using the module parameter is deprecated - please use the pci sysfs interface.\n");
2746                 break;
2747         default:
2748                 break;
2749         }
2750 #endif /* CONFIG_PCI_IOV */
2751
2752         igb_init_queue_configuration(adapter);
2753
2754         /* Setup and initialize a copy of the hw vlan table array */
2755         adapter->shadow_vfta = kcalloc(E1000_VLAN_FILTER_TBL_SIZE, sizeof(u32),
2756                                        GFP_ATOMIC);
2757
2758         /* This call may decrease the number of queues */
2759         if (igb_init_interrupt_scheme(adapter, true)) {
2760                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
2761                 return -ENOMEM;
2762         }
2763
2764         igb_probe_vfs(adapter);
2765
2766         /* Explicitly disable IRQ since the NIC can be in any state. */
2767         igb_irq_disable(adapter);
2768
2769         if (hw->mac.type >= e1000_i350)
2770                 adapter->flags &= ~IGB_FLAG_DMAC;
2771
2772         set_bit(__IGB_DOWN, &adapter->state);
2773         return 0;
2774 }
2775
2776 /**
2777  *  igb_open - Called when a network interface is made active
2778  *  @netdev: network interface device structure
2779  *
2780  *  Returns 0 on success, negative value on failure
2781  *
2782  *  The open entry point is called when a network interface is made
2783  *  active by the system (IFF_UP).  At this point all resources needed
2784  *  for transmit and receive operations are allocated, the interrupt
2785  *  handler is registered with the OS, the watchdog timer is started,
2786  *  and the stack is notified that the interface is ready.
2787  **/
2788 static int __igb_open(struct net_device *netdev, bool resuming)
2789 {
2790         struct igb_adapter *adapter = netdev_priv(netdev);
2791         struct e1000_hw *hw = &adapter->hw;
2792         struct pci_dev *pdev = adapter->pdev;
2793         int err;
2794         int i;
2795
2796         /* disallow open during test */
2797         if (test_bit(__IGB_TESTING, &adapter->state)) {
2798                 WARN_ON(resuming);
2799                 return -EBUSY;
2800         }
2801
2802         if (!resuming)
2803                 pm_runtime_get_sync(&pdev->dev);
2804
2805         netif_carrier_off(netdev);
2806
2807         /* allocate transmit descriptors */
2808         err = igb_setup_all_tx_resources(adapter);
2809         if (err)
2810                 goto err_setup_tx;
2811
2812         /* allocate receive descriptors */
2813         err = igb_setup_all_rx_resources(adapter);
2814         if (err)
2815                 goto err_setup_rx;
2816
2817         igb_power_up_link(adapter);
2818
2819         /* before we allocate an interrupt, we must be ready to handle it.
2820          * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
2821          * as soon as we call pci_request_irq, so we have to setup our
2822          * clean_rx handler before we do so.
2823          */
2824         igb_configure(adapter);
2825
2826         err = igb_request_irq(adapter);
2827         if (err)
2828                 goto err_req_irq;
2829
2830         /* Notify the stack of the actual queue counts. */
2831         err = netif_set_real_num_tx_queues(adapter->netdev,
2832                                            adapter->num_tx_queues);
2833         if (err)
2834                 goto err_set_queues;
2835
2836         err = netif_set_real_num_rx_queues(adapter->netdev,
2837                                            adapter->num_rx_queues);
2838         if (err)
2839                 goto err_set_queues;
2840
2841         /* From here on the code is the same as igb_up() */
2842         clear_bit(__IGB_DOWN, &adapter->state);
2843
2844         for (i = 0; i < adapter->num_q_vectors; i++)
2845                 napi_enable(&(adapter->q_vector[i]->napi));
2846
2847         /* Clear any pending interrupts. */
2848         rd32(E1000_ICR);
2849
2850         igb_irq_enable(adapter);
2851
2852         /* notify VFs that reset has been completed */
2853         if (adapter->vfs_allocated_count) {
2854                 u32 reg_data = rd32(E1000_CTRL_EXT);
2855                 reg_data |= E1000_CTRL_EXT_PFRSTD;
2856                 wr32(E1000_CTRL_EXT, reg_data);
2857         }
2858
2859         netif_tx_start_all_queues(netdev);
2860
2861         if (!resuming)
2862                 pm_runtime_put(&pdev->dev);
2863
2864         /* start the watchdog. */
2865         hw->mac.get_link_status = 1;
2866         schedule_work(&adapter->watchdog_task);
2867
2868         return 0;
2869
2870 err_set_queues:
2871         igb_free_irq(adapter);
2872 err_req_irq:
2873         igb_release_hw_control(adapter);
2874         igb_power_down_link(adapter);
2875         igb_free_all_rx_resources(adapter);
2876 err_setup_rx:
2877         igb_free_all_tx_resources(adapter);
2878 err_setup_tx:
2879         igb_reset(adapter);
2880         if (!resuming)
2881                 pm_runtime_put(&pdev->dev);
2882
2883         return err;
2884 }
2885
2886 static int igb_open(struct net_device *netdev)
2887 {
2888         return __igb_open(netdev, false);
2889 }
2890
2891 /**
2892  *  igb_close - Disables a network interface
2893  *  @netdev: network interface device structure
2894  *
2895  *  Returns 0, this is not allowed to fail
2896  *
2897  *  The close entry point is called when an interface is de-activated
2898  *  by the OS.  The hardware is still under the driver's control, but
2899  *  needs to be disabled.  A global MAC reset is issued to stop the
2900  *  hardware, and all transmit and receive resources are freed.
2901  **/
2902 static int __igb_close(struct net_device *netdev, bool suspending)
2903 {
2904         struct igb_adapter *adapter = netdev_priv(netdev);
2905         struct pci_dev *pdev = adapter->pdev;
2906
2907         WARN_ON(test_bit(__IGB_RESETTING, &adapter->state));
2908
2909         if (!suspending)
2910                 pm_runtime_get_sync(&pdev->dev);
2911
2912         igb_down(adapter);
2913         igb_free_irq(adapter);
2914
2915         igb_free_all_tx_resources(adapter);
2916         igb_free_all_rx_resources(adapter);
2917
2918         if (!suspending)
2919                 pm_runtime_put_sync(&pdev->dev);
2920         return 0;
2921 }
2922
2923 static int igb_close(struct net_device *netdev)
2924 {
2925         return __igb_close(netdev, false);
2926 }
2927
2928 /**
2929  *  igb_setup_tx_resources - allocate Tx resources (Descriptors)
2930  *  @tx_ring: tx descriptor ring (for a specific queue) to setup
2931  *
2932  *  Return 0 on success, negative on failure
2933  **/
2934 int igb_setup_tx_resources(struct igb_ring *tx_ring)
2935 {
2936         struct device *dev = tx_ring->dev;
2937         int size;
2938
2939         size = sizeof(struct igb_tx_buffer) * tx_ring->count;
2940
2941         tx_ring->tx_buffer_info = vzalloc(size);
2942         if (!tx_ring->tx_buffer_info)
2943                 goto err;
2944
2945         /* round up to nearest 4K */
2946         tx_ring->size = tx_ring->count * sizeof(union e1000_adv_tx_desc);
2947         tx_ring->size = ALIGN(tx_ring->size, 4096);
2948
2949         tx_ring->desc = dma_alloc_coherent(dev, tx_ring->size,
2950                                            &tx_ring->dma, GFP_KERNEL);
2951         if (!tx_ring->desc)
2952                 goto err;
2953
2954         tx_ring->next_to_use = 0;
2955         tx_ring->next_to_clean = 0;
2956
2957         return 0;
2958
2959 err:
2960         vfree(tx_ring->tx_buffer_info);
2961         tx_ring->tx_buffer_info = NULL;
2962         dev_err(dev, "Unable to allocate memory for the Tx descriptor ring\n");
2963         return -ENOMEM;
2964 }
2965
2966 /**
2967  *  igb_setup_all_tx_resources - wrapper to allocate Tx resources
2968  *                               (Descriptors) for all queues
2969  *  @adapter: board private structure
2970  *
2971  *  Return 0 on success, negative on failure
2972  **/
2973 static int igb_setup_all_tx_resources(struct igb_adapter *adapter)
2974 {
2975         struct pci_dev *pdev = adapter->pdev;
2976         int i, err = 0;
2977
2978         for (i = 0; i < adapter->num_tx_queues; i++) {
2979                 err = igb_setup_tx_resources(adapter->tx_ring[i]);
2980                 if (err) {
2981                         dev_err(&pdev->dev,
2982                                 "Allocation for Tx Queue %u failed\n", i);
2983                         for (i--; i >= 0; i--)
2984                                 igb_free_tx_resources(adapter->tx_ring[i]);
2985                         break;
2986                 }
2987         }
2988
2989         return err;
2990 }
2991
2992 /**
2993  *  igb_setup_tctl - configure the transmit control registers
2994  *  @adapter: Board private structure
2995  **/
2996 void igb_setup_tctl(struct igb_adapter *adapter)
2997 {
2998         struct e1000_hw *hw = &adapter->hw;
2999         u32 tctl;
3000
3001         /* disable queue 0 which is enabled by default on 82575 and 82576 */
3002         wr32(E1000_TXDCTL(0), 0);
3003
3004         /* Program the Transmit Control Register */
3005         tctl = rd32(E1000_TCTL);
3006         tctl &= ~E1000_TCTL_CT;
3007         tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
3008                 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
3009
3010         igb_config_collision_dist(hw);
3011
3012         /* Enable transmits */
3013         tctl |= E1000_TCTL_EN;
3014
3015         wr32(E1000_TCTL, tctl);
3016 }
3017
3018 /**
3019  *  igb_configure_tx_ring - Configure transmit ring after Reset
3020  *  @adapter: board private structure
3021  *  @ring: tx ring to configure
3022  *
3023  *  Configure a transmit ring after a reset.
3024  **/
3025 void igb_configure_tx_ring(struct igb_adapter *adapter,
3026                            struct igb_ring *ring)
3027 {
3028         struct e1000_hw *hw = &adapter->hw;
3029         u32 txdctl = 0;
3030         u64 tdba = ring->dma;
3031         int reg_idx = ring->reg_idx;
3032
3033         /* disable the queue */
3034         wr32(E1000_TXDCTL(reg_idx), 0);
3035         wrfl();
3036         mdelay(10);
3037
3038         wr32(E1000_TDLEN(reg_idx),
3039              ring->count * sizeof(union e1000_adv_tx_desc));
3040         wr32(E1000_TDBAL(reg_idx),
3041              tdba & 0x00000000ffffffffULL);
3042         wr32(E1000_TDBAH(reg_idx), tdba >> 32);
3043
3044         ring->tail = hw->hw_addr + E1000_TDT(reg_idx);
3045         wr32(E1000_TDH(reg_idx), 0);
3046         writel(0, ring->tail);
3047
3048         txdctl |= IGB_TX_PTHRESH;
3049         txdctl |= IGB_TX_HTHRESH << 8;
3050         txdctl |= IGB_TX_WTHRESH << 16;
3051
3052         txdctl |= E1000_TXDCTL_QUEUE_ENABLE;
3053         wr32(E1000_TXDCTL(reg_idx), txdctl);
3054 }
3055
3056 /**
3057  *  igb_configure_tx - Configure transmit Unit after Reset
3058  *  @adapter: board private structure
3059  *
3060  *  Configure the Tx unit of the MAC after a reset.
3061  **/
3062 static void igb_configure_tx(struct igb_adapter *adapter)
3063 {
3064         int i;
3065
3066         for (i = 0; i < adapter->num_tx_queues; i++)
3067                 igb_configure_tx_ring(adapter, adapter->tx_ring[i]);
3068 }
3069
3070 /**
3071  *  igb_setup_rx_resources - allocate Rx resources (Descriptors)
3072  *  @rx_ring: Rx descriptor ring (for a specific queue) to setup
3073  *
3074  *  Returns 0 on success, negative on failure
3075  **/
3076 int igb_setup_rx_resources(struct igb_ring *rx_ring)
3077 {
3078         struct device *dev = rx_ring->dev;
3079         int size;
3080
3081         size = sizeof(struct igb_rx_buffer) * rx_ring->count;
3082
3083         rx_ring->rx_buffer_info = vzalloc(size);
3084         if (!rx_ring->rx_buffer_info)
3085                 goto err;
3086
3087         /* Round up to nearest 4K */
3088         rx_ring->size = rx_ring->count * sizeof(union e1000_adv_rx_desc);
3089         rx_ring->size = ALIGN(rx_ring->size, 4096);
3090
3091         rx_ring->desc = dma_alloc_coherent(dev, rx_ring->size,
3092                                            &rx_ring->dma, GFP_KERNEL);
3093         if (!rx_ring->desc)
3094                 goto err;
3095
3096         rx_ring->next_to_alloc = 0;
3097         rx_ring->next_to_clean = 0;
3098         rx_ring->next_to_use = 0;
3099
3100         return 0;
3101
3102 err:
3103         vfree(rx_ring->rx_buffer_info);
3104         rx_ring->rx_buffer_info = NULL;
3105         dev_err(dev, "Unable to allocate memory for the Rx descriptor ring\n");
3106         return -ENOMEM;
3107 }
3108
3109 /**
3110  *  igb_setup_all_rx_resources - wrapper to allocate Rx resources
3111  *                               (Descriptors) for all queues
3112  *  @adapter: board private structure
3113  *
3114  *  Return 0 on success, negative on failure
3115  **/
3116 static int igb_setup_all_rx_resources(struct igb_adapter *adapter)
3117 {
3118         struct pci_dev *pdev = adapter->pdev;
3119         int i, err = 0;
3120
3121         for (i = 0; i < adapter->num_rx_queues; i++) {
3122                 err = igb_setup_rx_resources(adapter->rx_ring[i]);
3123                 if (err) {
3124                         dev_err(&pdev->dev,
3125                                 "Allocation for Rx Queue %u failed\n", i);
3126                         for (i--; i >= 0; i--)
3127                                 igb_free_rx_resources(adapter->rx_ring[i]);
3128                         break;
3129                 }
3130         }
3131
3132         return err;
3133 }
3134
3135 /**
3136  *  igb_setup_mrqc - configure the multiple receive queue control registers
3137  *  @adapter: Board private structure
3138  **/
3139 static void igb_setup_mrqc(struct igb_adapter *adapter)
3140 {
3141         struct e1000_hw *hw = &adapter->hw;
3142         u32 mrqc, rxcsum;
3143         u32 j, num_rx_queues;
3144         static const u32 rsskey[10] = { 0xDA565A6D, 0xC20E5B25, 0x3D256741,
3145                                         0xB08FA343, 0xCB2BCAD0, 0xB4307BAE,
3146                                         0xA32DCB77, 0x0CF23080, 0x3BB7426A,
3147                                         0xFA01ACBE };
3148
3149         /* Fill out hash function seeds */
3150         for (j = 0; j < 10; j++)
3151                 wr32(E1000_RSSRK(j), rsskey[j]);
3152
3153         num_rx_queues = adapter->rss_queues;
3154
3155         switch (hw->mac.type) {
3156         case e1000_82576:
3157                 /* 82576 supports 2 RSS queues for SR-IOV */
3158                 if (adapter->vfs_allocated_count)
3159                         num_rx_queues = 2;
3160                 break;
3161         default:
3162                 break;
3163         }
3164
3165         if (adapter->rss_indir_tbl_init != num_rx_queues) {
3166                 for (j = 0; j < IGB_RETA_SIZE; j++)
3167                         adapter->rss_indir_tbl[j] = (j * num_rx_queues) / IGB_RETA_SIZE;
3168                 adapter->rss_indir_tbl_init = num_rx_queues;
3169         }
3170         igb_write_rss_indir_tbl(adapter);
3171
3172         /* Disable raw packet checksumming so that RSS hash is placed in
3173          * descriptor on writeback.  No need to enable TCP/UDP/IP checksum
3174          * offloads as they are enabled by default
3175          */
3176         rxcsum = rd32(E1000_RXCSUM);
3177         rxcsum |= E1000_RXCSUM_PCSD;
3178
3179         if (adapter->hw.mac.type >= e1000_82576)
3180                 /* Enable Receive Checksum Offload for SCTP */
3181                 rxcsum |= E1000_RXCSUM_CRCOFL;
3182
3183         /* Don't need to set TUOFL or IPOFL, they default to 1 */
3184         wr32(E1000_RXCSUM, rxcsum);
3185
3186         /* Generate RSS hash based on packet types, TCP/UDP
3187          * port numbers and/or IPv4/v6 src and dst addresses
3188          */
3189         mrqc = E1000_MRQC_RSS_FIELD_IPV4 |
3190                E1000_MRQC_RSS_FIELD_IPV4_TCP |
3191                E1000_MRQC_RSS_FIELD_IPV6 |
3192                E1000_MRQC_RSS_FIELD_IPV6_TCP |
3193                E1000_MRQC_RSS_FIELD_IPV6_TCP_EX;
3194
3195         if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV4_UDP)
3196                 mrqc |= E1000_MRQC_RSS_FIELD_IPV4_UDP;
3197         if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV6_UDP)
3198                 mrqc |= E1000_MRQC_RSS_FIELD_IPV6_UDP;
3199
3200         /* If VMDq is enabled then we set the appropriate mode for that, else
3201          * we default to RSS so that an RSS hash is calculated per packet even
3202          * if we are only using one queue
3203          */
3204         if (adapter->vfs_allocated_count) {
3205                 if (hw->mac.type > e1000_82575) {
3206                         /* Set the default pool for the PF's first queue */
3207                         u32 vtctl = rd32(E1000_VT_CTL);
3208                         vtctl &= ~(E1000_VT_CTL_DEFAULT_POOL_MASK |
3209                                    E1000_VT_CTL_DISABLE_DEF_POOL);
3210                         vtctl |= adapter->vfs_allocated_count <<
3211                                 E1000_VT_CTL_DEFAULT_POOL_SHIFT;
3212                         wr32(E1000_VT_CTL, vtctl);
3213                 }
3214                 if (adapter->rss_queues > 1)
3215                         mrqc |= E1000_MRQC_ENABLE_VMDQ_RSS_2Q;
3216                 else
3217                         mrqc |= E1000_MRQC_ENABLE_VMDQ;
3218         } else {
3219                 if (hw->mac.type != e1000_i211)
3220                         mrqc |= E1000_MRQC_ENABLE_RSS_4Q;
3221         }
3222         igb_vmm_control(adapter);
3223
3224         wr32(E1000_MRQC, mrqc);
3225 }
3226
3227 /**
3228  *  igb_setup_rctl - configure the receive control registers
3229  *  @adapter: Board private structure
3230  **/
3231 void igb_setup_rctl(struct igb_adapter *adapter)
3232 {
3233         struct e1000_hw *hw = &adapter->hw;
3234         u32 rctl;
3235
3236         rctl = rd32(E1000_RCTL);
3237
3238         rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
3239         rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
3240
3241         rctl |= E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_RDMTS_HALF |
3242                 (hw->mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
3243
3244         /* enable stripping of CRC. It's unlikely this will break BMC
3245          * redirection as it did with e1000. Newer features require
3246          * that the HW strips the CRC.
3247          */
3248         rctl |= E1000_RCTL_SECRC;
3249
3250         /* disable store bad packets and clear size bits. */
3251         rctl &= ~(E1000_RCTL_SBP | E1000_RCTL_SZ_256);
3252
3253         /* enable LPE to prevent packets larger than max_frame_size */
3254         rctl |= E1000_RCTL_LPE;
3255
3256         /* disable queue 0 to prevent tail write w/o re-config */
3257         wr32(E1000_RXDCTL(0), 0);
3258
3259         /* Attention!!!  For SR-IOV PF driver operations you must enable
3260          * queue drop for all VF and PF queues to prevent head of line blocking
3261          * if an un-trusted VF does not provide descriptors to hardware.
3262          */
3263         if (adapter->vfs_allocated_count) {
3264                 /* set all queue drop enable bits */
3265                 wr32(E1000_QDE, ALL_QUEUES);
3266         }
3267
3268         /* This is useful for sniffing bad packets. */
3269         if (adapter->netdev->features & NETIF_F_RXALL) {
3270                 /* UPE and MPE will be handled by normal PROMISC logic
3271                  * in e1000e_set_rx_mode
3272                  */
3273                 rctl |= (E1000_RCTL_SBP | /* Receive bad packets */
3274                          E1000_RCTL_BAM | /* RX All Bcast Pkts */
3275                          E1000_RCTL_PMCF); /* RX All MAC Ctrl Pkts */
3276
3277                 rctl &= ~(E1000_RCTL_VFE | /* Disable VLAN filter */
3278                           E1000_RCTL_DPF | /* Allow filtered pause */
3279                           E1000_RCTL_CFIEN); /* Dis VLAN CFIEN Filter */
3280                 /* Do not mess with E1000_CTRL_VME, it affects transmit as well,
3281                  * and that breaks VLANs.
3282                  */
3283         }
3284
3285         wr32(E1000_RCTL, rctl);
3286 }
3287
3288 static inline int igb_set_vf_rlpml(struct igb_adapter *adapter, int size,
3289                                    int vfn)
3290 {
3291         struct e1000_hw *hw = &adapter->hw;
3292         u32 vmolr;
3293
3294         /* if it isn't the PF check to see if VFs are enabled and
3295          * increase the size to support vlan tags
3296          */
3297         if (vfn < adapter->vfs_allocated_count &&
3298             adapter->vf_data[vfn].vlans_enabled)
3299                 size += VLAN_TAG_SIZE;
3300
3301         vmolr = rd32(E1000_VMOLR(vfn));
3302         vmolr &= ~E1000_VMOLR_RLPML_MASK;
3303         vmolr |= size | E1000_VMOLR_LPE;
3304         wr32(E1000_VMOLR(vfn), vmolr);
3305
3306         return 0;
3307 }
3308
3309 /**
3310  *  igb_rlpml_set - set maximum receive packet size
3311  *  @adapter: board private structure
3312  *
3313  *  Configure maximum receivable packet size.
3314  **/
3315 static void igb_rlpml_set(struct igb_adapter *adapter)
3316 {
3317         u32 max_frame_size = adapter->max_frame_size;
3318         struct e1000_hw *hw = &adapter->hw;
3319         u16 pf_id = adapter->vfs_allocated_count;
3320
3321         if (pf_id) {
3322                 igb_set_vf_rlpml(adapter, max_frame_size, pf_id);
3323                 /* If we're in VMDQ or SR-IOV mode, then set global RLPML
3324                  * to our max jumbo frame size, in case we need to enable
3325                  * jumbo frames on one of the rings later.
3326                  * This will not pass over-length frames into the default
3327                  * queue because it's gated by the VMOLR.RLPML.
3328                  */
3329                 max_frame_size = MAX_JUMBO_FRAME_SIZE;
3330         }
3331
3332         wr32(E1000_RLPML, max_frame_size);
3333 }
3334
3335 static inline void igb_set_vmolr(struct igb_adapter *adapter,
3336                                  int vfn, bool aupe)
3337 {
3338         struct e1000_hw *hw = &adapter->hw;
3339         u32 vmolr;
3340
3341         /* This register exists only on 82576 and newer so if we are older then
3342          * we should exit and do nothing
3343          */
3344         if (hw->mac.type < e1000_82576)
3345                 return;
3346
3347         vmolr = rd32(E1000_VMOLR(vfn));
3348         vmolr |= E1000_VMOLR_STRVLAN; /* Strip vlan tags */
3349         if (aupe)
3350                 vmolr |= E1000_VMOLR_AUPE; /* Accept untagged packets */
3351         else
3352                 vmolr &= ~(E1000_VMOLR_AUPE); /* Tagged packets ONLY */
3353
3354         /* clear all bits that might not be set */
3355         vmolr &= ~(E1000_VMOLR_BAM | E1000_VMOLR_RSSE);
3356
3357         if (adapter->rss_queues > 1 && vfn == adapter->vfs_allocated_count)
3358                 vmolr |= E1000_VMOLR_RSSE; /* enable RSS */
3359         /* for VMDq only allow the VFs and pool 0 to accept broadcast and
3360          * multicast packets
3361          */
3362         if (vfn <= adapter->vfs_allocated_count)
3363                 vmolr |= E1000_VMOLR_BAM; /* Accept broadcast */
3364
3365         wr32(E1000_VMOLR(vfn), vmolr);
3366 }
3367
3368 /**
3369  *  igb_configure_rx_ring - Configure a receive ring after Reset
3370  *  @adapter: board private structure
3371  *  @ring: receive ring to be configured
3372  *
3373  *  Configure the Rx unit of the MAC after a reset.
3374  **/
3375 void igb_configure_rx_ring(struct igb_adapter *adapter,
3376                            struct igb_ring *ring)
3377 {
3378         struct e1000_hw *hw = &adapter->hw;
3379         u64 rdba = ring->dma;
3380         int reg_idx = ring->reg_idx;
3381         u32 srrctl = 0, rxdctl = 0;
3382
3383         /* disable the queue */
3384         wr32(E1000_RXDCTL(reg_idx), 0);
3385
3386         /* Set DMA base address registers */
3387         wr32(E1000_RDBAL(reg_idx),
3388              rdba & 0x00000000ffffffffULL);
3389         wr32(E1000_RDBAH(reg_idx), rdba >> 32);
3390         wr32(E1000_RDLEN(reg_idx),
3391              ring->count * sizeof(union e1000_adv_rx_desc));
3392
3393         /* initialize head and tail */
3394         ring->tail = hw->hw_addr + E1000_RDT(reg_idx);
3395         wr32(E1000_RDH(reg_idx), 0);
3396         writel(0, ring->tail);
3397
3398         /* set descriptor configuration */
3399         srrctl = IGB_RX_HDR_LEN << E1000_SRRCTL_BSIZEHDRSIZE_SHIFT;
3400         srrctl |= IGB_RX_BUFSZ >> E1000_SRRCTL_BSIZEPKT_SHIFT;
3401         srrctl |= E1000_SRRCTL_DESCTYPE_ADV_ONEBUF;
3402         if (hw->mac.type >= e1000_82580)
3403                 srrctl |= E1000_SRRCTL_TIMESTAMP;
3404         /* Only set Drop Enable if we are supporting multiple queues */
3405         if (adapter->vfs_allocated_count || adapter->num_rx_queues > 1)
3406                 srrctl |= E1000_SRRCTL_DROP_EN;
3407
3408         wr32(E1000_SRRCTL(reg_idx), srrctl);
3409
3410         /* set filtering for VMDQ pools */
3411         igb_set_vmolr(adapter, reg_idx & 0x7, true);
3412
3413         rxdctl |= IGB_RX_PTHRESH;
3414         rxdctl |= IGB_RX_HTHRESH << 8;
3415         rxdctl |= IGB_RX_WTHRESH << 16;
3416
3417         /* enable receive descriptor fetching */
3418         rxdctl |= E1000_RXDCTL_QUEUE_ENABLE;
3419         wr32(E1000_RXDCTL(reg_idx), rxdctl);
3420 }
3421
3422 /**
3423  *  igb_configure_rx - Configure receive Unit after Reset
3424  *  @adapter: board private structure
3425  *
3426  *  Configure the Rx unit of the MAC after a reset.
3427  **/
3428 static void igb_configure_rx(struct igb_adapter *adapter)
3429 {
3430         int i;
3431
3432         /* set UTA to appropriate mode */
3433         igb_set_uta(adapter);
3434
3435         /* set the correct pool for the PF default MAC address in entry 0 */
3436         igb_rar_set_qsel(adapter, adapter->hw.mac.addr, 0,
3437                          adapter->vfs_allocated_count);
3438
3439         /* Setup the HW Rx Head and Tail Descriptor Pointers and
3440          * the Base and Length of the Rx Descriptor Ring
3441          */
3442         for (i = 0; i < adapter->num_rx_queues; i++)
3443                 igb_configure_rx_ring(adapter, adapter->rx_ring[i]);
3444 }
3445
3446 /**
3447  *  igb_free_tx_resources - Free Tx Resources per Queue
3448  *  @tx_ring: Tx descriptor ring for a specific queue
3449  *
3450  *  Free all transmit software resources
3451  **/
3452 void igb_free_tx_resources(struct igb_ring *tx_ring)
3453 {
3454         igb_clean_tx_ring(tx_ring);
3455
3456         vfree(tx_ring->tx_buffer_info);
3457         tx_ring->tx_buffer_info = NULL;
3458
3459         /* if not set, then don't free */
3460         if (!tx_ring->desc)
3461                 return;
3462
3463         dma_free_coherent(tx_ring->dev, tx_ring->size,
3464                           tx_ring->desc, tx_ring->dma);
3465
3466         tx_ring->desc = NULL;
3467 }
3468
3469 /**
3470  *  igb_free_all_tx_resources - Free Tx Resources for All Queues
3471  *  @adapter: board private structure
3472  *
3473  *  Free all transmit software resources
3474  **/
3475 static void igb_free_all_tx_resources(struct igb_adapter *adapter)
3476 {
3477         int i;
3478
3479         for (i = 0; i < adapter->num_tx_queues; i++)
3480                 igb_free_tx_resources(adapter->tx_ring[i]);
3481 }
3482
3483 void igb_unmap_and_free_tx_resource(struct igb_ring *ring,
3484                                     struct igb_tx_buffer *tx_buffer)
3485 {
3486         if (tx_buffer->skb) {
3487                 dev_kfree_skb_any(tx_buffer->skb);
3488                 if (dma_unmap_len(tx_buffer, len))
3489                         dma_unmap_single(ring->dev,
3490                                          dma_unmap_addr(tx_buffer, dma),
3491                                          dma_unmap_len(tx_buffer, len),
3492                                          DMA_TO_DEVICE);
3493         } else if (dma_unmap_len(tx_buffer, len)) {
3494                 dma_unmap_page(ring->dev,
3495                                dma_unmap_addr(tx_buffer, dma),
3496                                dma_unmap_len(tx_buffer, len),
3497                                DMA_TO_DEVICE);
3498         }
3499         tx_buffer->next_to_watch = NULL;
3500         tx_buffer->skb = NULL;
3501         dma_unmap_len_set(tx_buffer, len, 0);
3502         /* buffer_info must be completely set up in the transmit path */
3503 }
3504
3505 /**
3506  *  igb_clean_tx_ring - Free Tx Buffers
3507  *  @tx_ring: ring to be cleaned
3508  **/
3509 static void igb_clean_tx_ring(struct igb_ring *tx_ring)
3510 {
3511         struct igb_tx_buffer *buffer_info;
3512         unsigned long size;
3513         u16 i;
3514
3515         if (!tx_ring->tx_buffer_info)
3516                 return;
3517         /* Free all the Tx ring sk_buffs */
3518
3519         for (i = 0; i < tx_ring->count; i++) {
3520                 buffer_info = &tx_ring->tx_buffer_info[i];
3521                 igb_unmap_and_free_tx_resource(tx_ring, buffer_info);
3522         }
3523
3524         netdev_tx_reset_queue(txring_txq(tx_ring));
3525
3526         size = sizeof(struct igb_tx_buffer) * tx_ring->count;
3527         memset(tx_ring->tx_buffer_info, 0, size);
3528
3529         /* Zero out the descriptor ring */
3530         memset(tx_ring->desc, 0, tx_ring->size);
3531
3532         tx_ring->next_to_use = 0;
3533         tx_ring->next_to_clean = 0;
3534 }
3535
3536 /**
3537  *  igb_clean_all_tx_rings - Free Tx Buffers for all queues
3538  *  @adapter: board private structure
3539  **/
3540 static void igb_clean_all_tx_rings(struct igb_adapter *adapter)
3541 {
3542         int i;
3543
3544         for (i = 0; i < adapter->num_tx_queues; i++)
3545                 igb_clean_tx_ring(adapter->tx_ring[i]);
3546 }
3547
3548 /**
3549  *  igb_free_rx_resources - Free Rx Resources
3550  *  @rx_ring: ring to clean the resources from
3551  *
3552  *  Free all receive software resources
3553  **/
3554 void igb_free_rx_resources(struct igb_ring *rx_ring)
3555 {
3556         igb_clean_rx_ring(rx_ring);
3557
3558         vfree(rx_ring->rx_buffer_info);
3559         rx_ring->rx_buffer_info = NULL;
3560
3561         /* if not set, then don't free */
3562         if (!rx_ring->desc)
3563                 return;
3564
3565         dma_free_coherent(rx_ring->dev, rx_ring->size,
3566                           rx_ring->desc, rx_ring->dma);
3567
3568         rx_ring->desc = NULL;
3569 }
3570
3571 /**
3572  *  igb_free_all_rx_resources - Free Rx Resources for All Queues
3573  *  @adapter: board private structure
3574  *
3575  *  Free all receive software resources
3576  **/
3577 static void igb_free_all_rx_resources(struct igb_adapter *adapter)
3578 {
3579         int i;
3580
3581         for (i = 0; i < adapter->num_rx_queues; i++)
3582                 igb_free_rx_resources(adapter->rx_ring[i]);
3583 }
3584
3585 /**
3586  *  igb_clean_rx_ring - Free Rx Buffers per Queue
3587  *  @rx_ring: ring to free buffers from
3588  **/
3589 static void igb_clean_rx_ring(struct igb_ring *rx_ring)
3590 {
3591         unsigned long size;
3592         u16 i;
3593
3594         if (rx_ring->skb)
3595                 dev_kfree_skb(rx_ring->skb);
3596         rx_ring->skb = NULL;
3597
3598         if (!rx_ring->rx_buffer_info)
3599                 return;
3600
3601         /* Free all the Rx ring sk_buffs */
3602         for (i = 0; i < rx_ring->count; i++) {
3603                 struct igb_rx_buffer *buffer_info = &rx_ring->rx_buffer_info[i];
3604
3605                 if (!buffer_info->page)
3606                         continue;
3607
3608                 dma_unmap_page(rx_ring->dev,
3609                                buffer_info->dma,
3610                                PAGE_SIZE,
3611                                DMA_FROM_DEVICE);
3612                 __free_page(buffer_info->page);
3613
3614                 buffer_info->page = NULL;
3615         }
3616
3617         size = sizeof(struct igb_rx_buffer) * rx_ring->count;
3618         memset(rx_ring->rx_buffer_info, 0, size);
3619
3620         /* Zero out the descriptor ring */
3621         memset(rx_ring->desc, 0, rx_ring->size);
3622
3623         rx_ring->next_to_alloc = 0;
3624         rx_ring->next_to_clean = 0;
3625         rx_ring->next_to_use = 0;
3626 }
3627
3628 /**
3629  *  igb_clean_all_rx_rings - Free Rx Buffers for all queues
3630  *  @adapter: board private structure
3631  **/
3632 static void igb_clean_all_rx_rings(struct igb_adapter *adapter)
3633 {
3634         int i;
3635
3636         for (i = 0; i < adapter->num_rx_queues; i++)
3637                 igb_clean_rx_ring(adapter->rx_ring[i]);
3638 }
3639
3640 /**
3641  *  igb_set_mac - Change the Ethernet Address of the NIC
3642  *  @netdev: network interface device structure
3643  *  @p: pointer to an address structure
3644  *
3645  *  Returns 0 on success, negative on failure
3646  **/
3647 static int igb_set_mac(struct net_device *netdev, void *p)
3648 {
3649         struct igb_adapter *adapter = netdev_priv(netdev);
3650         struct e1000_hw *hw = &adapter->hw;
3651         struct sockaddr *addr = p;
3652
3653         if (!is_valid_ether_addr(addr->sa_data))
3654                 return -EADDRNOTAVAIL;
3655
3656         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
3657         memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
3658
3659         /* set the correct pool for the new PF MAC address in entry 0 */
3660         igb_rar_set_qsel(adapter, hw->mac.addr, 0,
3661                          adapter->vfs_allocated_count);
3662
3663         return 0;
3664 }
3665
3666 /**
3667  *  igb_write_mc_addr_list - write multicast addresses to MTA
3668  *  @netdev: network interface device structure
3669  *
3670  *  Writes multicast address list to the MTA hash table.
3671  *  Returns: -ENOMEM on failure
3672  *           0 on no addresses written
3673  *           X on writing X addresses to MTA
3674  **/
3675 static int igb_write_mc_addr_list(struct net_device *netdev)
3676 {
3677         struct igb_adapter *adapter = netdev_priv(netdev);
3678         struct e1000_hw *hw = &adapter->hw;
3679         struct netdev_hw_addr *ha;
3680         u8  *mta_list;
3681         int i;
3682
3683         if (netdev_mc_empty(netdev)) {
3684                 /* nothing to program, so clear mc list */
3685                 igb_update_mc_addr_list(hw, NULL, 0);
3686                 igb_restore_vf_multicasts(adapter);
3687                 return 0;
3688         }
3689
3690         mta_list = kzalloc(netdev_mc_count(netdev) * 6, GFP_ATOMIC);
3691         if (!mta_list)
3692                 return -ENOMEM;
3693
3694         /* The shared function expects a packed array of only addresses. */
3695         i = 0;
3696         netdev_for_each_mc_addr(ha, netdev)
3697                 memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN);
3698
3699         igb_update_mc_addr_list(hw, mta_list, i);
3700         kfree(mta_list);
3701
3702         return netdev_mc_count(netdev);
3703 }
3704
3705 /**
3706  *  igb_write_uc_addr_list - write unicast addresses to RAR table
3707  *  @netdev: network interface device structure
3708  *
3709  *  Writes unicast address list to the RAR table.
3710  *  Returns: -ENOMEM on failure/insufficient address space
3711  *           0 on no addresses written
3712  *           X on writing X addresses to the RAR table
3713  **/
3714 static int igb_write_uc_addr_list(struct net_device *netdev)
3715 {
3716         struct igb_adapter *adapter = netdev_priv(netdev);
3717         struct e1000_hw *hw = &adapter->hw;
3718         unsigned int vfn = adapter->vfs_allocated_count;
3719         unsigned int rar_entries = hw->mac.rar_entry_count - (vfn + 1);
3720         int count = 0;
3721
3722         /* return ENOMEM indicating insufficient memory for addresses */
3723         if (netdev_uc_count(netdev) > rar_entries)
3724                 return -ENOMEM;
3725
3726         if (!netdev_uc_empty(netdev) && rar_entries) {
3727                 struct netdev_hw_addr *ha;
3728
3729                 netdev_for_each_uc_addr(ha, netdev) {
3730                         if (!rar_entries)
3731                                 break;
3732                         igb_rar_set_qsel(adapter, ha->addr,
3733                                          rar_entries--,
3734                                          vfn);
3735                         count++;
3736                 }
3737         }
3738         /* write the addresses in reverse order to avoid write combining */
3739         for (; rar_entries > 0 ; rar_entries--) {
3740                 wr32(E1000_RAH(rar_entries), 0);
3741                 wr32(E1000_RAL(rar_entries), 0);
3742         }
3743         wrfl();
3744
3745         return count;
3746 }
3747
3748 /**
3749  *  igb_set_rx_mode - Secondary Unicast, Multicast and Promiscuous mode set
3750  *  @netdev: network interface device structure
3751  *
3752  *  The set_rx_mode entry point is called whenever the unicast or multicast
3753  *  address lists or the network interface flags are updated.  This routine is
3754  *  responsible for configuring the hardware for proper unicast, multicast,
3755  *  promiscuous mode, and all-multi behavior.
3756  **/
3757 static void igb_set_rx_mode(struct net_device *netdev)
3758 {
3759         struct igb_adapter *adapter = netdev_priv(netdev);
3760         struct e1000_hw *hw = &adapter->hw;
3761         unsigned int vfn = adapter->vfs_allocated_count;
3762         u32 rctl, vmolr = 0;
3763         int count;
3764
3765         /* Check for Promiscuous and All Multicast modes */
3766         rctl = rd32(E1000_RCTL);
3767
3768         /* clear the effected bits */
3769         rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE | E1000_RCTL_VFE);
3770
3771         if (netdev->flags & IFF_PROMISC) {
3772                 /* retain VLAN HW filtering if in VT mode */
3773                 if (adapter->vfs_allocated_count)
3774                         rctl |= E1000_RCTL_VFE;
3775                 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
3776                 vmolr |= (E1000_VMOLR_ROPE | E1000_VMOLR_MPME);
3777         } else {
3778                 if (netdev->flags & IFF_ALLMULTI) {
3779                         rctl |= E1000_RCTL_MPE;
3780                         vmolr |= E1000_VMOLR_MPME;
3781                 } else {
3782                         /* Write addresses to the MTA, if the attempt fails
3783                          * then we should just turn on promiscuous mode so
3784                          * that we can at least receive multicast traffic
3785                          */
3786                         count = igb_write_mc_addr_list(netdev);
3787                         if (count < 0) {
3788                                 rctl |= E1000_RCTL_MPE;
3789                                 vmolr |= E1000_VMOLR_MPME;
3790                         } else if (count) {
3791                                 vmolr |= E1000_VMOLR_ROMPE;
3792                         }
3793                 }
3794                 /* Write addresses to available RAR registers, if there is not
3795                  * sufficient space to store all the addresses then enable
3796                  * unicast promiscuous mode
3797                  */
3798                 count = igb_write_uc_addr_list(netdev);
3799                 if (count < 0) {
3800                         rctl |= E1000_RCTL_UPE;
3801                         vmolr |= E1000_VMOLR_ROPE;
3802                 }
3803                 rctl |= E1000_RCTL_VFE;
3804         }
3805         wr32(E1000_RCTL, rctl);
3806
3807         /* In order to support SR-IOV and eventually VMDq it is necessary to set
3808          * the VMOLR to enable the appropriate modes.  Without this workaround
3809          * we will have issues with VLAN tag stripping not being done for frames
3810          * that are only arriving because we are the default pool
3811          */
3812         if ((hw->mac.type < e1000_82576) || (hw->mac.type > e1000_i350))
3813                 return;
3814
3815         vmolr |= rd32(E1000_VMOLR(vfn)) &
3816                  ~(E1000_VMOLR_ROPE | E1000_VMOLR_MPME | E1000_VMOLR_ROMPE);
3817         wr32(E1000_VMOLR(vfn), vmolr);
3818         igb_restore_vf_multicasts(adapter);
3819 }
3820
3821 static void igb_check_wvbr(struct igb_adapter *adapter)
3822 {
3823         struct e1000_hw *hw = &adapter->hw;
3824         u32 wvbr = 0;
3825
3826         switch (hw->mac.type) {
3827         case e1000_82576:
3828         case e1000_i350:
3829                 if (!(wvbr = rd32(E1000_WVBR)))
3830                         return;
3831                 break;
3832         default:
3833                 break;
3834         }
3835
3836         adapter->wvbr |= wvbr;
3837 }
3838
3839 #define IGB_STAGGERED_QUEUE_OFFSET 8
3840
3841 static void igb_spoof_check(struct igb_adapter *adapter)
3842 {
3843         int j;
3844
3845         if (!adapter->wvbr)
3846                 return;
3847
3848         for(j = 0; j < adapter->vfs_allocated_count; j++) {
3849                 if (adapter->wvbr & (1 << j) ||
3850                     adapter->wvbr & (1 << (j + IGB_STAGGERED_QUEUE_OFFSET))) {
3851                         dev_warn(&adapter->pdev->dev,
3852                                 "Spoof event(s) detected on VF %d\n", j);
3853                         adapter->wvbr &=
3854                                 ~((1 << j) |
3855                                   (1 << (j + IGB_STAGGERED_QUEUE_OFFSET)));
3856                 }
3857         }
3858 }
3859
3860 /* Need to wait a few seconds after link up to get diagnostic information from
3861  * the phy
3862  */
3863 static void igb_update_phy_info(unsigned long data)
3864 {
3865         struct igb_adapter *adapter = (struct igb_adapter *) data;
3866         igb_get_phy_info(&adapter->hw);
3867 }
3868
3869 /**
3870  *  igb_has_link - check shared code for link and determine up/down
3871  *  @adapter: pointer to driver private info
3872  **/
3873 bool igb_has_link(struct igb_adapter *adapter)
3874 {
3875         struct e1000_hw *hw = &adapter->hw;
3876         bool link_active = false;
3877
3878         /* get_link_status is set on LSC (link status) interrupt or
3879          * rx sequence error interrupt.  get_link_status will stay
3880          * false until the e1000_check_for_link establishes link
3881          * for copper adapters ONLY
3882          */
3883         switch (hw->phy.media_type) {
3884         case e1000_media_type_copper:
3885                 if (!hw->mac.get_link_status)
3886                         return true;
3887         case e1000_media_type_internal_serdes:
3888                 hw->mac.ops.check_for_link(hw);
3889                 link_active = !hw->mac.get_link_status;
3890                 break;
3891         default:
3892         case e1000_media_type_unknown:
3893                 break;
3894         }
3895
3896         if (((hw->mac.type == e1000_i210) ||
3897              (hw->mac.type == e1000_i211)) &&
3898              (hw->phy.id == I210_I_PHY_ID)) {
3899                 if (!netif_carrier_ok(adapter->netdev)) {
3900                         adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
3901                 } else if (!(adapter->flags & IGB_FLAG_NEED_LINK_UPDATE)) {
3902                         adapter->flags |= IGB_FLAG_NEED_LINK_UPDATE;
3903                         adapter->link_check_timeout = jiffies;
3904                 }
3905         }
3906
3907         return link_active;
3908 }
3909
3910 static bool igb_thermal_sensor_event(struct e1000_hw *hw, u32 event)
3911 {
3912         bool ret = false;
3913         u32 ctrl_ext, thstat;
3914
3915         /* check for thermal sensor event on i350 copper only */
3916         if (hw->mac.type == e1000_i350) {
3917                 thstat = rd32(E1000_THSTAT);
3918                 ctrl_ext = rd32(E1000_CTRL_EXT);
3919
3920                 if ((hw->phy.media_type == e1000_media_type_copper) &&
3921                     !(ctrl_ext & E1000_CTRL_EXT_LINK_MODE_SGMII))
3922                         ret = !!(thstat & event);
3923         }
3924
3925         return ret;
3926 }
3927
3928 /**
3929  *  igb_watchdog - Timer Call-back
3930  *  @data: pointer to adapter cast into an unsigned long
3931  **/
3932 static void igb_watchdog(unsigned long data)
3933 {
3934         struct igb_adapter *adapter = (struct igb_adapter *)data;
3935         /* Do the rest outside of interrupt context */
3936         schedule_work(&adapter->watchdog_task);
3937 }
3938
3939 static void igb_watchdog_task(struct work_struct *work)
3940 {
3941         struct igb_adapter *adapter = container_of(work,
3942                                                    struct igb_adapter,
3943                                                    watchdog_task);
3944         struct e1000_hw *hw = &adapter->hw;
3945         struct e1000_phy_info *phy = &hw->phy;
3946         struct net_device *netdev = adapter->netdev;
3947         u32 link;
3948         int i;
3949
3950         link = igb_has_link(adapter);
3951
3952         if (adapter->flags & IGB_FLAG_NEED_LINK_UPDATE) {
3953                 if (time_after(jiffies, (adapter->link_check_timeout + HZ)))
3954                         adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
3955                 else
3956                         link = false;
3957         }
3958
3959         if (link) {
3960                 /* Cancel scheduled suspend requests. */
3961                 pm_runtime_resume(netdev->dev.parent);
3962
3963                 if (!netif_carrier_ok(netdev)) {
3964                         u32 ctrl;
3965                         hw->mac.ops.get_speed_and_duplex(hw,
3966                                                          &adapter->link_speed,
3967                                                          &adapter->link_duplex);
3968
3969                         ctrl = rd32(E1000_CTRL);
3970                         /* Links status message must follow this format */
3971                         printk(KERN_INFO "igb: %s NIC Link is Up %d Mbps %s "
3972                                "Duplex, Flow Control: %s\n",
3973                                netdev->name,
3974                                adapter->link_speed,
3975                                adapter->link_duplex == FULL_DUPLEX ?
3976                                "Full" : "Half",
3977                                (ctrl & E1000_CTRL_TFCE) &&
3978                                (ctrl & E1000_CTRL_RFCE) ? "RX/TX" :
3979                                (ctrl & E1000_CTRL_RFCE) ?  "RX" :
3980                                (ctrl & E1000_CTRL_TFCE) ?  "TX" : "None");
3981
3982                         /* check if SmartSpeed worked */
3983                         igb_check_downshift(hw);
3984                         if (phy->speed_downgraded)
3985                                 netdev_warn(netdev, "Link Speed was downgraded by SmartSpeed\n");
3986
3987                         /* check for thermal sensor event */
3988                         if (igb_thermal_sensor_event(hw,
3989                             E1000_THSTAT_LINK_THROTTLE)) {
3990                                 netdev_info(netdev, "The network adapter link "
3991                                             "speed was downshifted because it "
3992                                             "overheated\n");
3993                         }
3994
3995                         /* adjust timeout factor according to speed/duplex */
3996                         adapter->tx_timeout_factor = 1;
3997                         switch (adapter->link_speed) {
3998                         case SPEED_10:
3999                                 adapter->tx_timeout_factor = 14;
4000                                 break;
4001                         case SPEED_100:
4002                                 /* maybe add some timeout factor ? */
4003                                 break;
4004                         }
4005
4006                         netif_carrier_on(netdev);
4007
4008                         igb_ping_all_vfs(adapter);
4009                         igb_check_vf_rate_limit(adapter);
4010
4011                         /* link state has changed, schedule phy info update */
4012                         if (!test_bit(__IGB_DOWN, &adapter->state))
4013                                 mod_timer(&adapter->phy_info_timer,
4014                                           round_jiffies(jiffies + 2 * HZ));
4015                 }
4016         } else {
4017                 if (netif_carrier_ok(netdev)) {
4018                         adapter->link_speed = 0;
4019                         adapter->link_duplex = 0;
4020
4021                         /* check for thermal sensor event */
4022                         if (igb_thermal_sensor_event(hw,
4023                             E1000_THSTAT_PWR_DOWN)) {
4024                                 netdev_err(netdev, "The network adapter was "
4025                                            "stopped because it overheated\n");
4026                         }
4027
4028                         /* Links status message must follow this format */
4029                         printk(KERN_INFO "igb: %s NIC Link is Down\n",
4030                                netdev->name);
4031                         netif_carrier_off(netdev);
4032
4033                         igb_ping_all_vfs(adapter);
4034
4035                         /* link state has changed, schedule phy info update */
4036                         if (!test_bit(__IGB_DOWN, &adapter->state))
4037                                 mod_timer(&adapter->phy_info_timer,
4038                                           round_jiffies(jiffies + 2 * HZ));
4039
4040                         pm_schedule_suspend(netdev->dev.parent,
4041                                             MSEC_PER_SEC * 5);
4042                 }
4043         }
4044
4045         spin_lock(&adapter->stats64_lock);
4046         igb_update_stats(adapter, &adapter->stats64);
4047         spin_unlock(&adapter->stats64_lock);
4048
4049         for (i = 0; i < adapter->num_tx_queues; i++) {
4050                 struct igb_ring *tx_ring = adapter->tx_ring[i];
4051                 if (!netif_carrier_ok(netdev)) {
4052                         /* We've lost link, so the controller stops DMA,
4053                          * but we've got queued Tx work that's never going
4054                          * to get done, so reset controller to flush Tx.
4055                          * (Do the reset outside of interrupt context).
4056                          */
4057                         if (igb_desc_unused(tx_ring) + 1 < tx_ring->count) {
4058                                 adapter->tx_timeout_count++;
4059                                 schedule_work(&adapter->reset_task);
4060                                 /* return immediately since reset is imminent */
4061                                 return;
4062                         }
4063                 }
4064
4065                 /* Force detection of hung controller every watchdog period */
4066                 set_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags);
4067         }
4068
4069         /* Cause software interrupt to ensure Rx ring is cleaned */
4070         if (adapter->msix_entries) {
4071                 u32 eics = 0;
4072                 for (i = 0; i < adapter->num_q_vectors; i++)
4073                         eics |= adapter->q_vector[i]->eims_value;
4074                 wr32(E1000_EICS, eics);
4075         } else {
4076                 wr32(E1000_ICS, E1000_ICS_RXDMT0);
4077         }
4078
4079         igb_spoof_check(adapter);
4080         igb_ptp_rx_hang(adapter);
4081
4082         /* Reset the timer */
4083         if (!test_bit(__IGB_DOWN, &adapter->state)) {
4084                 if (adapter->flags & IGB_FLAG_NEED_LINK_UPDATE)
4085                         mod_timer(&adapter->watchdog_timer,
4086                                   round_jiffies(jiffies +  HZ));
4087                 else
4088                         mod_timer(&adapter->watchdog_timer,
4089                                   round_jiffies(jiffies + 2 * HZ));
4090         }
4091 }
4092
4093 enum latency_range {
4094         lowest_latency = 0,
4095         low_latency = 1,
4096         bulk_latency = 2,
4097         latency_invalid = 255
4098 };
4099
4100 /**
4101  *  igb_update_ring_itr - update the dynamic ITR value based on packet size
4102  *  @q_vector: pointer to q_vector
4103  *
4104  *  Stores a new ITR value based on strictly on packet size.  This
4105  *  algorithm is less sophisticated than that used in igb_update_itr,
4106  *  due to the difficulty of synchronizing statistics across multiple
4107  *  receive rings.  The divisors and thresholds used by this function
4108  *  were determined based on theoretical maximum wire speed and testing
4109  *  data, in order to minimize response time while increasing bulk
4110  *  throughput.
4111  *  This functionality is controlled by the InterruptThrottleRate module
4112  *  parameter (see igb_param.c)
4113  *  NOTE:  This function is called only when operating in a multiqueue
4114  *         receive environment.
4115  **/
4116 static void igb_update_ring_itr(struct igb_q_vector *q_vector)
4117 {
4118         int new_val = q_vector->itr_val;
4119         int avg_wire_size = 0;
4120         struct igb_adapter *adapter = q_vector->adapter;
4121         unsigned int packets;
4122
4123         /* For non-gigabit speeds, just fix the interrupt rate at 4000
4124          * ints/sec - ITR timer value of 120 ticks.
4125          */
4126         if (adapter->link_speed != SPEED_1000) {
4127                 new_val = IGB_4K_ITR;
4128                 goto set_itr_val;
4129         }
4130
4131         packets = q_vector->rx.total_packets;
4132         if (packets)
4133                 avg_wire_size = q_vector->rx.total_bytes / packets;
4134
4135         packets = q_vector->tx.total_packets;
4136         if (packets)
4137                 avg_wire_size = max_t(u32, avg_wire_size,
4138                                       q_vector->tx.total_bytes / packets);
4139
4140         /* if avg_wire_size isn't set no work was done */
4141         if (!avg_wire_size)
4142                 goto clear_counts;
4143
4144         /* Add 24 bytes to size to account for CRC, preamble, and gap */
4145         avg_wire_size += 24;
4146
4147         /* Don't starve jumbo frames */
4148         avg_wire_size = min(avg_wire_size, 3000);
4149
4150         /* Give a little boost to mid-size frames */
4151         if ((avg_wire_size > 300) && (avg_wire_size < 1200))
4152                 new_val = avg_wire_size / 3;
4153         else
4154                 new_val = avg_wire_size / 2;
4155
4156         /* conservative mode (itr 3) eliminates the lowest_latency setting */
4157         if (new_val < IGB_20K_ITR &&
4158             ((q_vector->rx.ring && adapter->rx_itr_setting == 3) ||
4159              (!q_vector->rx.ring && adapter->tx_itr_setting == 3)))
4160                 new_val = IGB_20K_ITR;
4161
4162 set_itr_val:
4163         if (new_val != q_vector->itr_val) {
4164                 q_vector->itr_val = new_val;
4165                 q_vector->set_itr = 1;
4166         }
4167 clear_counts:
4168         q_vector->rx.total_bytes = 0;
4169         q_vector->rx.total_packets = 0;
4170         q_vector->tx.total_bytes = 0;
4171         q_vector->tx.total_packets = 0;
4172 }
4173
4174 /**
4175  *  igb_update_itr - update the dynamic ITR value based on statistics
4176  *  @q_vector: pointer to q_vector
4177  *  @ring_container: ring info to update the itr for
4178  *
4179  *  Stores a new ITR value based on packets and byte
4180  *  counts during the last interrupt.  The advantage of per interrupt
4181  *  computation is faster updates and more accurate ITR for the current
4182  *  traffic pattern.  Constants in this function were computed
4183  *  based on theoretical maximum wire speed and thresholds were set based
4184  *  on testing data as well as attempting to minimize response time
4185  *  while increasing bulk throughput.
4186  *  this functionality is controlled by the InterruptThrottleRate module
4187  *  parameter (see igb_param.c)
4188  *  NOTE:  These calculations are only valid when operating in a single-
4189  *         queue environment.
4190  **/
4191 static void igb_update_itr(struct igb_q_vector *q_vector,
4192                            struct igb_ring_container *ring_container)
4193 {
4194         unsigned int packets = ring_container->total_packets;
4195         unsigned int bytes = ring_container->total_bytes;
4196         u8 itrval = ring_container->itr;
4197
4198         /* no packets, exit with status unchanged */
4199         if (packets == 0)
4200                 return;
4201
4202         switch (itrval) {
4203         case lowest_latency:
4204                 /* handle TSO and jumbo frames */
4205                 if (bytes/packets > 8000)
4206                         itrval = bulk_latency;
4207                 else if ((packets < 5) && (bytes > 512))
4208                         itrval = low_latency;
4209                 break;
4210         case low_latency:  /* 50 usec aka 20000 ints/s */
4211                 if (bytes > 10000) {
4212                         /* this if handles the TSO accounting */
4213                         if (bytes/packets > 8000) {
4214                                 itrval = bulk_latency;
4215                         } else if ((packets < 10) || ((bytes/packets) > 1200)) {
4216                                 itrval = bulk_latency;
4217                         } else if ((packets > 35)) {
4218                                 itrval = lowest_latency;
4219                         }
4220                 } else if (bytes/packets > 2000) {
4221                         itrval = bulk_latency;
4222                 } else if (packets <= 2 && bytes < 512) {
4223                         itrval = lowest_latency;
4224                 }
4225                 break;
4226         case bulk_latency: /* 250 usec aka 4000 ints/s */
4227                 if (bytes > 25000) {
4228                         if (packets > 35)
4229                                 itrval = low_latency;
4230                 } else if (bytes < 1500) {
4231                         itrval = low_latency;
4232                 }
4233                 break;
4234         }
4235
4236         /* clear work counters since we have the values we need */
4237         ring_container->total_bytes = 0;
4238         ring_container->total_packets = 0;
4239
4240         /* write updated itr to ring container */
4241         ring_container->itr = itrval;
4242 }
4243
4244 static void igb_set_itr(struct igb_q_vector *q_vector)
4245 {
4246         struct igb_adapter *adapter = q_vector->adapter;
4247         u32 new_itr = q_vector->itr_val;
4248         u8 current_itr = 0;
4249
4250         /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
4251         if (adapter->link_speed != SPEED_1000) {
4252                 current_itr = 0;
4253                 new_itr = IGB_4K_ITR;
4254                 goto set_itr_now;
4255         }
4256
4257         igb_update_itr(q_vector, &q_vector->tx);
4258         igb_update_itr(q_vector, &q_vector->rx);
4259
4260         current_itr = max(q_vector->rx.itr, q_vector->tx.itr);
4261
4262         /* conservative mode (itr 3) eliminates the lowest_latency setting */
4263         if (current_itr == lowest_latency &&
4264             ((q_vector->rx.ring && adapter->rx_itr_setting == 3) ||
4265              (!q_vector->rx.ring && adapter->tx_itr_setting == 3)))
4266                 current_itr = low_latency;
4267
4268         switch (current_itr) {
4269         /* counts and packets in update_itr are dependent on these numbers */
4270         case lowest_latency:
4271                 new_itr = IGB_70K_ITR; /* 70,000 ints/sec */
4272                 break;
4273         case low_latency:
4274                 new_itr = IGB_20K_ITR; /* 20,000 ints/sec */
4275                 break;
4276         case bulk_latency:
4277                 new_itr = IGB_4K_ITR;  /* 4,000 ints/sec */
4278                 break;
4279         default:
4280                 break;
4281         }
4282
4283 set_itr_now:
4284         if (new_itr != q_vector->itr_val) {
4285                 /* this attempts to bias the interrupt rate towards Bulk
4286                  * by adding intermediate steps when interrupt rate is
4287                  * increasing
4288                  */
4289                 new_itr = new_itr > q_vector->itr_val ?
4290                           max((new_itr * q_vector->itr_val) /
4291                           (new_itr + (q_vector->itr_val >> 2)),
4292                           new_itr) : new_itr;
4293                 /* Don't write the value here; it resets the adapter's
4294                  * internal timer, and causes us to delay far longer than
4295                  * we should between interrupts.  Instead, we write the ITR
4296                  * value at the beginning of the next interrupt so the timing
4297                  * ends up being correct.
4298                  */
4299                 q_vector->itr_val = new_itr;
4300                 q_vector->set_itr = 1;
4301         }
4302 }
4303
4304 static void igb_tx_ctxtdesc(struct igb_ring *tx_ring, u32 vlan_macip_lens,
4305                             u32 type_tucmd, u32 mss_l4len_idx)
4306 {
4307         struct e1000_adv_tx_context_desc *context_desc;
4308         u16 i = tx_ring->next_to_use;
4309
4310         context_desc = IGB_TX_CTXTDESC(tx_ring, i);
4311
4312         i++;
4313         tx_ring->next_to_use = (i < tx_ring->count) ? i : 0;
4314
4315         /* set bits to identify this as an advanced context descriptor */
4316         type_tucmd |= E1000_TXD_CMD_DEXT | E1000_ADVTXD_DTYP_CTXT;
4317
4318         /* For 82575, context index must be unique per ring. */
4319         if (test_bit(IGB_RING_FLAG_TX_CTX_IDX, &tx_ring->flags))
4320                 mss_l4len_idx |= tx_ring->reg_idx << 4;
4321
4322         context_desc->vlan_macip_lens   = cpu_to_le32(vlan_macip_lens);
4323         context_desc->seqnum_seed       = 0;
4324         context_desc->type_tucmd_mlhl   = cpu_to_le32(type_tucmd);
4325         context_desc->mss_l4len_idx     = cpu_to_le32(mss_l4len_idx);
4326 }
4327
4328 static int igb_tso(struct igb_ring *tx_ring,
4329                    struct igb_tx_buffer *first,
4330                    u8 *hdr_len)
4331 {
4332         struct sk_buff *skb = first->skb;
4333         u32 vlan_macip_lens, type_tucmd;
4334         u32 mss_l4len_idx, l4len;
4335
4336         if (skb->ip_summed != CHECKSUM_PARTIAL)
4337                 return 0;
4338
4339         if (!skb_is_gso(skb))
4340                 return 0;
4341
4342         if (skb_header_cloned(skb)) {
4343                 int err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
4344                 if (err)
4345                         return err;
4346         }
4347
4348         /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
4349         type_tucmd = E1000_ADVTXD_TUCMD_L4T_TCP;
4350
4351         if (first->protocol == __constant_htons(ETH_P_IP)) {
4352                 struct iphdr *iph = ip_hdr(skb);
4353                 iph->tot_len = 0;
4354                 iph->check = 0;
4355                 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
4356                                                          iph->daddr, 0,
4357                                                          IPPROTO_TCP,
4358                                                          0);
4359                 type_tucmd |= E1000_ADVTXD_TUCMD_IPV4;
4360                 first->tx_flags |= IGB_TX_FLAGS_TSO |
4361                                    IGB_TX_FLAGS_CSUM |
4362                                    IGB_TX_FLAGS_IPV4;
4363         } else if (skb_is_gso_v6(skb)) {
4364                 ipv6_hdr(skb)->payload_len = 0;
4365                 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
4366                                                        &ipv6_hdr(skb)->daddr,
4367                                                        0, IPPROTO_TCP, 0);
4368                 first->tx_flags |= IGB_TX_FLAGS_TSO |
4369                                    IGB_TX_FLAGS_CSUM;
4370         }
4371
4372         /* compute header lengths */
4373         l4len = tcp_hdrlen(skb);
4374         *hdr_len = skb_transport_offset(skb) + l4len;
4375
4376         /* update gso size and bytecount with header size */
4377         first->gso_segs = skb_shinfo(skb)->gso_segs;
4378         first->bytecount += (first->gso_segs - 1) * *hdr_len;
4379
4380         /* MSS L4LEN IDX */
4381         mss_l4len_idx = l4len << E1000_ADVTXD_L4LEN_SHIFT;
4382         mss_l4len_idx |= skb_shinfo(skb)->gso_size << E1000_ADVTXD_MSS_SHIFT;
4383
4384         /* VLAN MACLEN IPLEN */
4385         vlan_macip_lens = skb_network_header_len(skb);
4386         vlan_macip_lens |= skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT;
4387         vlan_macip_lens |= first->tx_flags & IGB_TX_FLAGS_VLAN_MASK;
4388
4389         igb_tx_ctxtdesc(tx_ring, vlan_macip_lens, type_tucmd, mss_l4len_idx);
4390
4391         return 1;
4392 }
4393
4394 static void igb_tx_csum(struct igb_ring *tx_ring, struct igb_tx_buffer *first)
4395 {
4396         struct sk_buff *skb = first->skb;
4397         u32 vlan_macip_lens = 0;
4398         u32 mss_l4len_idx = 0;
4399         u32 type_tucmd = 0;
4400
4401         if (skb->ip_summed != CHECKSUM_PARTIAL) {
4402                 if (!(first->tx_flags & IGB_TX_FLAGS_VLAN))
4403                         return;
4404         } else {
4405                 u8 l4_hdr = 0;
4406                 switch (first->protocol) {
4407                 case __constant_htons(ETH_P_IP):
4408                         vlan_macip_lens |= skb_network_header_len(skb);
4409                         type_tucmd |= E1000_ADVTXD_TUCMD_IPV4;
4410                         l4_hdr = ip_hdr(skb)->protocol;
4411                         break;
4412                 case __constant_htons(ETH_P_IPV6):
4413                         vlan_macip_lens |= skb_network_header_len(skb);
4414                         l4_hdr = ipv6_hdr(skb)->nexthdr;
4415                         break;
4416                 default:
4417                         if (unlikely(net_ratelimit())) {
4418                                 dev_warn(tx_ring->dev,
4419                                          "partial checksum but proto=%x!\n",
4420                                          first->protocol);
4421                         }
4422                         break;
4423                 }
4424
4425                 switch (l4_hdr) {
4426                 case IPPROTO_TCP:
4427                         type_tucmd |= E1000_ADVTXD_TUCMD_L4T_TCP;
4428                         mss_l4len_idx = tcp_hdrlen(skb) <<
4429                                         E1000_ADVTXD_L4LEN_SHIFT;
4430                         break;
4431                 case IPPROTO_SCTP:
4432                         type_tucmd |= E1000_ADVTXD_TUCMD_L4T_SCTP;
4433                         mss_l4len_idx = sizeof(struct sctphdr) <<
4434                                         E1000_ADVTXD_L4LEN_SHIFT;
4435                         break;
4436                 case IPPROTO_UDP:
4437                         mss_l4len_idx = sizeof(struct udphdr) <<
4438                                         E1000_ADVTXD_L4LEN_SHIFT;
4439                         break;
4440                 default:
4441                         if (unlikely(net_ratelimit())) {
4442                                 dev_warn(tx_ring->dev,
4443                                          "partial checksum but l4 proto=%x!\n",
4444                                          l4_hdr);
4445                         }
4446                         break;
4447                 }
4448
4449                 /* update TX checksum flag */
4450                 first->tx_flags |= IGB_TX_FLAGS_CSUM;
4451         }
4452
4453         vlan_macip_lens |= skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT;
4454         vlan_macip_lens |= first->tx_flags & IGB_TX_FLAGS_VLAN_MASK;
4455
4456         igb_tx_ctxtdesc(tx_ring, vlan_macip_lens, type_tucmd, mss_l4len_idx);
4457 }
4458
4459 #define IGB_SET_FLAG(_input, _flag, _result) \
4460         ((_flag <= _result) ? \
4461          ((u32)(_input & _flag) * (_result / _flag)) : \
4462          ((u32)(_input & _flag) / (_flag / _result)))
4463
4464 static u32 igb_tx_cmd_type(struct sk_buff *skb, u32 tx_flags)
4465 {
4466         /* set type for advanced descriptor with frame checksum insertion */
4467         u32 cmd_type = E1000_ADVTXD_DTYP_DATA |
4468                        E1000_ADVTXD_DCMD_DEXT |
4469                        E1000_ADVTXD_DCMD_IFCS;
4470
4471         /* set HW vlan bit if vlan is present */
4472         cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_VLAN,
4473                                  (E1000_ADVTXD_DCMD_VLE));
4474
4475         /* set segmentation bits for TSO */
4476         cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_TSO,
4477                                  (E1000_ADVTXD_DCMD_TSE));
4478
4479         /* set timestamp bit if present */
4480         cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_TSTAMP,
4481                                  (E1000_ADVTXD_MAC_TSTAMP));
4482
4483         /* insert frame checksum */
4484         cmd_type ^= IGB_SET_FLAG(skb->no_fcs, 1, E1000_ADVTXD_DCMD_IFCS);
4485
4486         return cmd_type;
4487 }
4488
4489 static void igb_tx_olinfo_status(struct igb_ring *tx_ring,
4490                                  union e1000_adv_tx_desc *tx_desc,
4491                                  u32 tx_flags, unsigned int paylen)
4492 {
4493         u32 olinfo_status = paylen << E1000_ADVTXD_PAYLEN_SHIFT;
4494
4495         /* 82575 requires a unique index per ring */
4496         if (test_bit(IGB_RING_FLAG_TX_CTX_IDX, &tx_ring->flags))
4497                 olinfo_status |= tx_ring->reg_idx << 4;
4498
4499         /* insert L4 checksum */
4500         olinfo_status |= IGB_SET_FLAG(tx_flags,
4501                                       IGB_TX_FLAGS_CSUM,
4502                                       (E1000_TXD_POPTS_TXSM << 8));
4503
4504         /* insert IPv4 checksum */
4505         olinfo_status |= IGB_SET_FLAG(tx_flags,
4506                                       IGB_TX_FLAGS_IPV4,
4507                                       (E1000_TXD_POPTS_IXSM << 8));
4508
4509         tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
4510 }
4511
4512 static void igb_tx_map(struct igb_ring *tx_ring,
4513                        struct igb_tx_buffer *first,
4514                        const u8 hdr_len)
4515 {
4516         struct sk_buff *skb = first->skb;
4517         struct igb_tx_buffer *tx_buffer;
4518         union e1000_adv_tx_desc *tx_desc;
4519         struct skb_frag_struct *frag;
4520         dma_addr_t dma;
4521         unsigned int data_len, size;
4522         u32 tx_flags = first->tx_flags;
4523         u32 cmd_type = igb_tx_cmd_type(skb, tx_flags);
4524         u16 i = tx_ring->next_to_use;
4525
4526         tx_desc = IGB_TX_DESC(tx_ring, i);
4527
4528         igb_tx_olinfo_status(tx_ring, tx_desc, tx_flags, skb->len - hdr_len);
4529
4530         size = skb_headlen(skb);
4531         data_len = skb->data_len;
4532
4533         dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
4534
4535         tx_buffer = first;
4536
4537         for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
4538                 if (dma_mapping_error(tx_ring->dev, dma))
4539                         goto dma_error;
4540
4541                 /* record length, and DMA address */
4542                 dma_unmap_len_set(tx_buffer, len, size);
4543                 dma_unmap_addr_set(tx_buffer, dma, dma);
4544
4545                 tx_desc->read.buffer_addr = cpu_to_le64(dma);
4546
4547                 while (unlikely(size > IGB_MAX_DATA_PER_TXD)) {
4548                         tx_desc->read.cmd_type_len =
4549                                 cpu_to_le32(cmd_type ^ IGB_MAX_DATA_PER_TXD);
4550
4551                         i++;
4552                         tx_desc++;
4553                         if (i == tx_ring->count) {
4554                                 tx_desc = IGB_TX_DESC(tx_ring, 0);
4555                                 i = 0;
4556                         }
4557                         tx_desc->read.olinfo_status = 0;
4558
4559                         dma += IGB_MAX_DATA_PER_TXD;
4560                         size -= IGB_MAX_DATA_PER_TXD;
4561
4562                         tx_desc->read.buffer_addr = cpu_to_le64(dma);
4563                 }
4564
4565                 if (likely(!data_len))
4566                         break;
4567
4568                 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type ^ size);
4569
4570                 i++;
4571                 tx_desc++;
4572                 if (i == tx_ring->count) {
4573                         tx_desc = IGB_TX_DESC(tx_ring, 0);
4574                         i = 0;
4575                 }
4576                 tx_desc->read.olinfo_status = 0;
4577
4578                 size = skb_frag_size(frag);
4579                 data_len -= size;
4580
4581                 dma = skb_frag_dma_map(tx_ring->dev, frag, 0,
4582                                        size, DMA_TO_DEVICE);
4583
4584                 tx_buffer = &tx_ring->tx_buffer_info[i];
4585         }
4586
4587         /* write last descriptor with RS and EOP bits */
4588         cmd_type |= size | IGB_TXD_DCMD;
4589         tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
4590
4591         netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount);
4592
4593         /* set the timestamp */
4594         first->time_stamp = jiffies;
4595
4596         /* Force memory writes to complete before letting h/w know there
4597          * are new descriptors to fetch.  (Only applicable for weak-ordered
4598          * memory model archs, such as IA-64).
4599          *
4600          * We also need this memory barrier to make certain all of the
4601          * status bits have been updated before next_to_watch is written.
4602          */
4603         wmb();
4604
4605         /* set next_to_watch value indicating a packet is present */
4606         first->next_to_watch = tx_desc;
4607
4608         i++;
4609         if (i == tx_ring->count)
4610                 i = 0;
4611
4612         tx_ring->next_to_use = i;
4613
4614         writel(i, tx_ring->tail);
4615
4616         /* we need this if more than one processor can write to our tail
4617          * at a time, it synchronizes IO on IA64/Altix systems
4618          */
4619         mmiowb();
4620
4621         return;
4622
4623 dma_error:
4624         dev_err(tx_ring->dev, "TX DMA map failed\n");
4625
4626         /* clear dma mappings for failed tx_buffer_info map */
4627         for (;;) {
4628                 tx_buffer = &tx_ring->tx_buffer_info[i];
4629                 igb_unmap_and_free_tx_resource(tx_ring, tx_buffer);
4630                 if (tx_buffer == first)
4631                         break;
4632                 if (i == 0)
4633                         i = tx_ring->count;
4634                 i--;
4635         }
4636
4637         tx_ring->next_to_use = i;
4638 }
4639
4640 static int __igb_maybe_stop_tx(struct igb_ring *tx_ring, const u16 size)
4641 {
4642         struct net_device *netdev = tx_ring->netdev;
4643
4644         netif_stop_subqueue(netdev, tx_ring->queue_index);
4645
4646         /* Herbert's original patch had:
4647          *  smp_mb__after_netif_stop_queue();
4648          * but since that doesn't exist yet, just open code it.
4649          */
4650         smp_mb();
4651
4652         /* We need to check again in a case another CPU has just
4653          * made room available.
4654          */
4655         if (igb_desc_unused(tx_ring) < size)
4656                 return -EBUSY;
4657
4658         /* A reprieve! */
4659         netif_wake_subqueue(netdev, tx_ring->queue_index);
4660
4661         u64_stats_update_begin(&tx_ring->tx_syncp2);
4662         tx_ring->tx_stats.restart_queue2++;
4663         u64_stats_update_end(&tx_ring->tx_syncp2);
4664
4665         return 0;
4666 }
4667
4668 static inline int igb_maybe_stop_tx(struct igb_ring *tx_ring, const u16 size)
4669 {
4670         if (igb_desc_unused(tx_ring) >= size)
4671                 return 0;
4672         return __igb_maybe_stop_tx(tx_ring, size);
4673 }
4674
4675 netdev_tx_t igb_xmit_frame_ring(struct sk_buff *skb,
4676                                 struct igb_ring *tx_ring)
4677 {
4678         struct igb_tx_buffer *first;
4679         int tso;
4680         u32 tx_flags = 0;
4681         u16 count = TXD_USE_COUNT(skb_headlen(skb));
4682         __be16 protocol = vlan_get_protocol(skb);
4683         u8 hdr_len = 0;
4684
4685         /* need: 1 descriptor per page * PAGE_SIZE/IGB_MAX_DATA_PER_TXD,
4686          *       + 1 desc for skb_headlen/IGB_MAX_DATA_PER_TXD,
4687          *       + 2 desc gap to keep tail from touching head,
4688          *       + 1 desc for context descriptor,
4689          * otherwise try next time
4690          */
4691         if (NETDEV_FRAG_PAGE_MAX_SIZE > IGB_MAX_DATA_PER_TXD) {
4692                 unsigned short f;
4693                 for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
4694                         count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
4695         } else {
4696                 count += skb_shinfo(skb)->nr_frags;
4697         }
4698
4699         if (igb_maybe_stop_tx(tx_ring, count + 3)) {
4700                 /* this is a hard error */
4701                 return NETDEV_TX_BUSY;
4702         }
4703
4704         /* record the location of the first descriptor for this packet */
4705         first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
4706         first->skb = skb;
4707         first->bytecount = skb->len;
4708         first->gso_segs = 1;
4709
4710         skb_tx_timestamp(skb);
4711
4712         if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)) {
4713                 struct igb_adapter *adapter = netdev_priv(tx_ring->netdev);
4714
4715                 if (!(adapter->ptp_tx_skb)) {
4716                         skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
4717                         tx_flags |= IGB_TX_FLAGS_TSTAMP;
4718
4719                         adapter->ptp_tx_skb = skb_get(skb);
4720                         adapter->ptp_tx_start = jiffies;
4721                         if (adapter->hw.mac.type == e1000_82576)
4722                                 schedule_work(&adapter->ptp_tx_work);
4723                 }
4724         }
4725
4726         if (vlan_tx_tag_present(skb)) {
4727                 tx_flags |= IGB_TX_FLAGS_VLAN;
4728                 tx_flags |= (vlan_tx_tag_get(skb) << IGB_TX_FLAGS_VLAN_SHIFT);
4729         }
4730
4731         /* record initial flags and protocol */
4732         first->tx_flags = tx_flags;
4733         first->protocol = protocol;
4734
4735         tso = igb_tso(tx_ring, first, &hdr_len);
4736         if (tso < 0)
4737                 goto out_drop;
4738         else if (!tso)
4739                 igb_tx_csum(tx_ring, first);
4740
4741         igb_tx_map(tx_ring, first, hdr_len);
4742
4743         /* Make sure there is space in the ring for the next send. */
4744         igb_maybe_stop_tx(tx_ring, DESC_NEEDED);
4745
4746         return NETDEV_TX_OK;
4747
4748 out_drop:
4749         igb_unmap_and_free_tx_resource(tx_ring, first);
4750
4751         return NETDEV_TX_OK;
4752 }
4753
4754 static inline struct igb_ring *igb_tx_queue_mapping(struct igb_adapter *adapter,
4755                                                     struct sk_buff *skb)
4756 {
4757         unsigned int r_idx = skb->queue_mapping;
4758
4759         if (r_idx >= adapter->num_tx_queues)
4760                 r_idx = r_idx % adapter->num_tx_queues;
4761
4762         return adapter->tx_ring[r_idx];
4763 }
4764
4765 static netdev_tx_t igb_xmit_frame(struct sk_buff *skb,
4766                                   struct net_device *netdev)
4767 {
4768         struct igb_adapter *adapter = netdev_priv(netdev);
4769
4770         if (test_bit(__IGB_DOWN, &adapter->state)) {
4771                 dev_kfree_skb_any(skb);
4772                 return NETDEV_TX_OK;
4773         }
4774
4775         if (skb->len <= 0) {
4776                 dev_kfree_skb_any(skb);
4777                 return NETDEV_TX_OK;
4778         }
4779
4780         /* The minimum packet size with TCTL.PSP set is 17 so pad the skb
4781          * in order to meet this minimum size requirement.
4782          */
4783         if (unlikely(skb->len < 17)) {
4784                 if (skb_pad(skb, 17 - skb->len))
4785                         return NETDEV_TX_OK;
4786                 skb->len = 17;
4787                 skb_set_tail_pointer(skb, 17);
4788         }
4789
4790         return igb_xmit_frame_ring(skb, igb_tx_queue_mapping(adapter, skb));
4791 }
4792
4793 /**
4794  *  igb_tx_timeout - Respond to a Tx Hang
4795  *  @netdev: network interface device structure
4796  **/
4797 static void igb_tx_timeout(struct net_device *netdev)
4798 {
4799         struct igb_adapter *adapter = netdev_priv(netdev);
4800         struct e1000_hw *hw = &adapter->hw;
4801
4802         /* Do the reset outside of interrupt context */
4803         adapter->tx_timeout_count++;
4804
4805         if (hw->mac.type >= e1000_82580)
4806                 hw->dev_spec._82575.global_device_reset = true;
4807
4808         schedule_work(&adapter->reset_task);
4809         wr32(E1000_EICS,
4810              (adapter->eims_enable_mask & ~adapter->eims_other));
4811 }
4812
4813 static void igb_reset_task(struct work_struct *work)
4814 {
4815         struct igb_adapter *adapter;
4816         adapter = container_of(work, struct igb_adapter, reset_task);
4817
4818         igb_dump(adapter);
4819         netdev_err(adapter->netdev, "Reset adapter\n");
4820         igb_reinit_locked(adapter);
4821 }
4822
4823 /**
4824  *  igb_get_stats64 - Get System Network Statistics
4825  *  @netdev: network interface device structure
4826  *  @stats: rtnl_link_stats64 pointer
4827  **/
4828 static struct rtnl_link_stats64 *igb_get_stats64(struct net_device *netdev,
4829                                                 struct rtnl_link_stats64 *stats)
4830 {
4831         struct igb_adapter *adapter = netdev_priv(netdev);
4832
4833         spin_lock(&adapter->stats64_lock);
4834         igb_update_stats(adapter, &adapter->stats64);
4835         memcpy(stats, &adapter->stats64, sizeof(*stats));
4836         spin_unlock(&adapter->stats64_lock);
4837
4838         return stats;
4839 }
4840
4841 /**
4842  *  igb_change_mtu - Change the Maximum Transfer Unit
4843  *  @netdev: network interface device structure
4844  *  @new_mtu: new value for maximum frame size
4845  *
4846  *  Returns 0 on success, negative on failure
4847  **/
4848 static int igb_change_mtu(struct net_device *netdev, int new_mtu)
4849 {
4850         struct igb_adapter *adapter = netdev_priv(netdev);
4851         struct pci_dev *pdev = adapter->pdev;
4852         int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
4853
4854         if ((new_mtu < 68) || (max_frame > MAX_JUMBO_FRAME_SIZE)) {
4855                 dev_err(&pdev->dev, "Invalid MTU setting\n");
4856                 return -EINVAL;
4857         }
4858
4859 #define MAX_STD_JUMBO_FRAME_SIZE 9238
4860         if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
4861                 dev_err(&pdev->dev, "MTU > 9216 not supported.\n");
4862                 return -EINVAL;
4863         }
4864
4865         /* adjust max frame to be at least the size of a standard frame */
4866         if (max_frame < (ETH_FRAME_LEN + ETH_FCS_LEN))
4867                 max_frame = ETH_FRAME_LEN + ETH_FCS_LEN;
4868
4869         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
4870                 msleep(1);
4871
4872         /* igb_down has a dependency on max_frame_size */
4873         adapter->max_frame_size = max_frame;
4874
4875         if (netif_running(netdev))
4876                 igb_down(adapter);
4877
4878         dev_info(&pdev->dev, "changing MTU from %d to %d\n",
4879                  netdev->mtu, new_mtu);
4880         netdev->mtu = new_mtu;
4881
4882         if (netif_running(netdev))
4883                 igb_up(adapter);
4884         else
4885                 igb_reset(adapter);
4886
4887         clear_bit(__IGB_RESETTING, &adapter->state);
4888
4889         return 0;
4890 }
4891
4892 /**
4893  *  igb_update_stats - Update the board statistics counters
4894  *  @adapter: board private structure
4895  **/
4896 void igb_update_stats(struct igb_adapter *adapter,
4897                       struct rtnl_link_stats64 *net_stats)
4898 {
4899         struct e1000_hw *hw = &adapter->hw;
4900         struct pci_dev *pdev = adapter->pdev;
4901         u32 reg, mpc;
4902         u16 phy_tmp;
4903         int i;
4904         u64 bytes, packets;
4905         unsigned int start;
4906         u64 _bytes, _packets;
4907
4908 #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
4909
4910         /* Prevent stats update while adapter is being reset, or if the pci
4911          * connection is down.
4912          */
4913         if (adapter->link_speed == 0)
4914                 return;
4915         if (pci_channel_offline(pdev))
4916                 return;
4917
4918         bytes = 0;
4919         packets = 0;
4920
4921         rcu_read_lock();
4922         for (i = 0; i < adapter->num_rx_queues; i++) {
4923                 u32 rqdpc = rd32(E1000_RQDPC(i));
4924                 struct igb_ring *ring = adapter->rx_ring[i];
4925
4926                 if (rqdpc) {
4927                         ring->rx_stats.drops += rqdpc;
4928                         net_stats->rx_fifo_errors += rqdpc;
4929                 }
4930
4931                 do {
4932                         start = u64_stats_fetch_begin_bh(&ring->rx_syncp);
4933                         _bytes = ring->rx_stats.bytes;
4934                         _packets = ring->rx_stats.packets;
4935                 } while (u64_stats_fetch_retry_bh(&ring->rx_syncp, start));
4936                 bytes += _bytes;
4937                 packets += _packets;
4938         }
4939
4940         net_stats->rx_bytes = bytes;
4941         net_stats->rx_packets = packets;
4942
4943         bytes = 0;
4944         packets = 0;
4945         for (i = 0; i < adapter->num_tx_queues; i++) {
4946                 struct igb_ring *ring = adapter->tx_ring[i];
4947                 do {
4948                         start = u64_stats_fetch_begin_bh(&ring->tx_syncp);
4949                         _bytes = ring->tx_stats.bytes;
4950                         _packets = ring->tx_stats.packets;
4951                 } while (u64_stats_fetch_retry_bh(&ring->tx_syncp, start));
4952                 bytes += _bytes;
4953                 packets += _packets;
4954         }
4955         net_stats->tx_bytes = bytes;
4956         net_stats->tx_packets = packets;
4957         rcu_read_unlock();
4958
4959         /* read stats registers */
4960         adapter->stats.crcerrs += rd32(E1000_CRCERRS);
4961         adapter->stats.gprc += rd32(E1000_GPRC);
4962         adapter->stats.gorc += rd32(E1000_GORCL);
4963         rd32(E1000_GORCH); /* clear GORCL */
4964         adapter->stats.bprc += rd32(E1000_BPRC);
4965         adapter->stats.mprc += rd32(E1000_MPRC);
4966         adapter->stats.roc += rd32(E1000_ROC);
4967
4968         adapter->stats.prc64 += rd32(E1000_PRC64);
4969         adapter->stats.prc127 += rd32(E1000_PRC127);
4970         adapter->stats.prc255 += rd32(E1000_PRC255);
4971         adapter->stats.prc511 += rd32(E1000_PRC511);
4972         adapter->stats.prc1023 += rd32(E1000_PRC1023);
4973         adapter->stats.prc1522 += rd32(E1000_PRC1522);
4974         adapter->stats.symerrs += rd32(E1000_SYMERRS);
4975         adapter->stats.sec += rd32(E1000_SEC);
4976
4977         mpc = rd32(E1000_MPC);
4978         adapter->stats.mpc += mpc;
4979         net_stats->rx_fifo_errors += mpc;
4980         adapter->stats.scc += rd32(E1000_SCC);
4981         adapter->stats.ecol += rd32(E1000_ECOL);
4982         adapter->stats.mcc += rd32(E1000_MCC);
4983         adapter->stats.latecol += rd32(E1000_LATECOL);
4984         adapter->stats.dc += rd32(E1000_DC);
4985         adapter->stats.rlec += rd32(E1000_RLEC);
4986         adapter->stats.xonrxc += rd32(E1000_XONRXC);
4987         adapter->stats.xontxc += rd32(E1000_XONTXC);
4988         adapter->stats.xoffrxc += rd32(E1000_XOFFRXC);
4989         adapter->stats.xofftxc += rd32(E1000_XOFFTXC);
4990         adapter->stats.fcruc += rd32(E1000_FCRUC);
4991         adapter->stats.gptc += rd32(E1000_GPTC);
4992         adapter->stats.gotc += rd32(E1000_GOTCL);
4993         rd32(E1000_GOTCH); /* clear GOTCL */
4994         adapter->stats.rnbc += rd32(E1000_RNBC);
4995         adapter->stats.ruc += rd32(E1000_RUC);
4996         adapter->stats.rfc += rd32(E1000_RFC);
4997         adapter->stats.rjc += rd32(E1000_RJC);
4998         adapter->stats.tor += rd32(E1000_TORH);
4999         adapter->stats.tot += rd32(E1000_TOTH);
5000         adapter->stats.tpr += rd32(E1000_TPR);
5001
5002         adapter->stats.ptc64 += rd32(E1000_PTC64);
5003         adapter->stats.ptc127 += rd32(E1000_PTC127);
5004         adapter->stats.ptc255 += rd32(E1000_PTC255);
5005         adapter->stats.ptc511 += rd32(E1000_PTC511);
5006         adapter->stats.ptc1023 += rd32(E1000_PTC1023);
5007         adapter->stats.ptc1522 += rd32(E1000_PTC1522);
5008
5009         adapter->stats.mptc += rd32(E1000_MPTC);
5010         adapter->stats.bptc += rd32(E1000_BPTC);
5011
5012         adapter->stats.tpt += rd32(E1000_TPT);
5013         adapter->stats.colc += rd32(E1000_COLC);
5014
5015         adapter->stats.algnerrc += rd32(E1000_ALGNERRC);
5016         /* read internal phy specific stats */
5017         reg = rd32(E1000_CTRL_EXT);
5018         if (!(reg & E1000_CTRL_EXT_LINK_MODE_MASK)) {
5019                 adapter->stats.rxerrc += rd32(E1000_RXERRC);
5020
5021                 /* this stat has invalid values on i210/i211 */
5022                 if ((hw->mac.type != e1000_i210) &&
5023                     (hw->mac.type != e1000_i211))
5024                         adapter->stats.tncrs += rd32(E1000_TNCRS);
5025         }
5026
5027         adapter->stats.tsctc += rd32(E1000_TSCTC);
5028         adapter->stats.tsctfc += rd32(E1000_TSCTFC);
5029
5030         adapter->stats.iac += rd32(E1000_IAC);
5031         adapter->stats.icrxoc += rd32(E1000_ICRXOC);
5032         adapter->stats.icrxptc += rd32(E1000_ICRXPTC);
5033         adapter->stats.icrxatc += rd32(E1000_ICRXATC);
5034         adapter->stats.ictxptc += rd32(E1000_ICTXPTC);
5035         adapter->stats.ictxatc += rd32(E1000_ICTXATC);
5036         adapter->stats.ictxqec += rd32(E1000_ICTXQEC);
5037         adapter->stats.ictxqmtc += rd32(E1000_ICTXQMTC);
5038         adapter->stats.icrxdmtc += rd32(E1000_ICRXDMTC);
5039
5040         /* Fill out the OS statistics structure */
5041         net_stats->multicast = adapter->stats.mprc;
5042         net_stats->collisions = adapter->stats.colc;
5043
5044         /* Rx Errors */
5045
5046         /* RLEC on some newer hardware can be incorrect so build
5047          * our own version based on RUC and ROC
5048          */
5049         net_stats->rx_errors = adapter->stats.rxerrc +
5050                 adapter->stats.crcerrs + adapter->stats.algnerrc +
5051                 adapter->stats.ruc + adapter->stats.roc +
5052                 adapter->stats.cexterr;
5053         net_stats->rx_length_errors = adapter->stats.ruc +
5054                                       adapter->stats.roc;
5055         net_stats->rx_crc_errors = adapter->stats.crcerrs;
5056         net_stats->rx_frame_errors = adapter->stats.algnerrc;
5057         net_stats->rx_missed_errors = adapter->stats.mpc;
5058
5059         /* Tx Errors */
5060         net_stats->tx_errors = adapter->stats.ecol +
5061                                adapter->stats.latecol;
5062         net_stats->tx_aborted_errors = adapter->stats.ecol;
5063         net_stats->tx_window_errors = adapter->stats.latecol;
5064         net_stats->tx_carrier_errors = adapter->stats.tncrs;
5065
5066         /* Tx Dropped needs to be maintained elsewhere */
5067
5068         /* Phy Stats */
5069         if (hw->phy.media_type == e1000_media_type_copper) {
5070                 if ((adapter->link_speed == SPEED_1000) &&
5071                    (!igb_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
5072                         phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
5073                         adapter->phy_stats.idle_errors += phy_tmp;
5074                 }
5075         }
5076
5077         /* Management Stats */
5078         adapter->stats.mgptc += rd32(E1000_MGTPTC);
5079         adapter->stats.mgprc += rd32(E1000_MGTPRC);
5080         adapter->stats.mgpdc += rd32(E1000_MGTPDC);
5081
5082         /* OS2BMC Stats */
5083         reg = rd32(E1000_MANC);
5084         if (reg & E1000_MANC_EN_BMC2OS) {
5085                 adapter->stats.o2bgptc += rd32(E1000_O2BGPTC);
5086                 adapter->stats.o2bspc += rd32(E1000_O2BSPC);
5087                 adapter->stats.b2ospc += rd32(E1000_B2OSPC);
5088                 adapter->stats.b2ogprc += rd32(E1000_B2OGPRC);
5089         }
5090 }
5091
5092 static irqreturn_t igb_msix_other(int irq, void *data)
5093 {
5094         struct igb_adapter *adapter = data;
5095         struct e1000_hw *hw = &adapter->hw;
5096         u32 icr = rd32(E1000_ICR);
5097         /* reading ICR causes bit 31 of EICR to be cleared */
5098
5099         if (icr & E1000_ICR_DRSTA)
5100                 schedule_work(&adapter->reset_task);
5101
5102         if (icr & E1000_ICR_DOUTSYNC) {
5103                 /* HW is reporting DMA is out of sync */
5104                 adapter->stats.doosync++;
5105                 /* The DMA Out of Sync is also indication of a spoof event
5106                  * in IOV mode. Check the Wrong VM Behavior register to
5107                  * see if it is really a spoof event.
5108                  */
5109                 igb_check_wvbr(adapter);
5110         }
5111
5112         /* Check for a mailbox event */
5113         if (icr & E1000_ICR_VMMB)
5114                 igb_msg_task(adapter);
5115
5116         if (icr & E1000_ICR_LSC) {
5117                 hw->mac.get_link_status = 1;
5118                 /* guard against interrupt when we're going down */
5119                 if (!test_bit(__IGB_DOWN, &adapter->state))
5120                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
5121         }
5122
5123         if (icr & E1000_ICR_TS) {
5124                 u32 tsicr = rd32(E1000_TSICR);
5125
5126                 if (tsicr & E1000_TSICR_TXTS) {
5127                         /* acknowledge the interrupt */
5128                         wr32(E1000_TSICR, E1000_TSICR_TXTS);
5129                         /* retrieve hardware timestamp */
5130                         schedule_work(&adapter->ptp_tx_work);
5131                 }
5132         }
5133
5134         wr32(E1000_EIMS, adapter->eims_other);
5135
5136         return IRQ_HANDLED;
5137 }
5138
5139 static void igb_write_itr(struct igb_q_vector *q_vector)
5140 {
5141         struct igb_adapter *adapter = q_vector->adapter;
5142         u32 itr_val = q_vector->itr_val & 0x7FFC;
5143
5144         if (!q_vector->set_itr)
5145                 return;
5146
5147         if (!itr_val)
5148                 itr_val = 0x4;
5149
5150         if (adapter->hw.mac.type == e1000_82575)
5151                 itr_val |= itr_val << 16;
5152         else
5153                 itr_val |= E1000_EITR_CNT_IGNR;
5154
5155         writel(itr_val, q_vector->itr_register);
5156         q_vector->set_itr = 0;
5157 }
5158
5159 static irqreturn_t igb_msix_ring(int irq, void *data)
5160 {
5161         struct igb_q_vector *q_vector = data;
5162
5163         /* Write the ITR value calculated from the previous interrupt. */
5164         igb_write_itr(q_vector);
5165
5166         napi_schedule(&q_vector->napi);
5167
5168         return IRQ_HANDLED;
5169 }
5170
5171 #ifdef CONFIG_IGB_DCA
5172 static void igb_update_tx_dca(struct igb_adapter *adapter,
5173                               struct igb_ring *tx_ring,
5174                               int cpu)
5175 {
5176         struct e1000_hw *hw = &adapter->hw;
5177         u32 txctrl = dca3_get_tag(tx_ring->dev, cpu);
5178
5179         if (hw->mac.type != e1000_82575)
5180                 txctrl <<= E1000_DCA_TXCTRL_CPUID_SHIFT;
5181
5182         /* We can enable relaxed ordering for reads, but not writes when
5183          * DCA is enabled.  This is due to a known issue in some chipsets
5184          * which will cause the DCA tag to be cleared.
5185          */
5186         txctrl |= E1000_DCA_TXCTRL_DESC_RRO_EN |
5187                   E1000_DCA_TXCTRL_DATA_RRO_EN |
5188                   E1000_DCA_TXCTRL_DESC_DCA_EN;
5189
5190         wr32(E1000_DCA_TXCTRL(tx_ring->reg_idx), txctrl);
5191 }
5192
5193 static void igb_update_rx_dca(struct igb_adapter *adapter,
5194                               struct igb_ring *rx_ring,
5195                               int cpu)
5196 {
5197         struct e1000_hw *hw = &adapter->hw;
5198         u32 rxctrl = dca3_get_tag(&adapter->pdev->dev, cpu);
5199
5200         if (hw->mac.type != e1000_82575)
5201                 rxctrl <<= E1000_DCA_RXCTRL_CPUID_SHIFT;
5202
5203         /* We can enable relaxed ordering for reads, but not writes when
5204          * DCA is enabled.  This is due to a known issue in some chipsets
5205          * which will cause the DCA tag to be cleared.
5206          */
5207         rxctrl |= E1000_DCA_RXCTRL_DESC_RRO_EN |
5208                   E1000_DCA_RXCTRL_DESC_DCA_EN;
5209
5210         wr32(E1000_DCA_RXCTRL(rx_ring->reg_idx), rxctrl);
5211 }
5212
5213 static void igb_update_dca(struct igb_q_vector *q_vector)
5214 {
5215         struct igb_adapter *adapter = q_vector->adapter;
5216         int cpu = get_cpu();
5217
5218         if (q_vector->cpu == cpu)
5219                 goto out_no_update;
5220
5221         if (q_vector->tx.ring)
5222                 igb_update_tx_dca(adapter, q_vector->tx.ring, cpu);
5223
5224         if (q_vector->rx.ring)
5225                 igb_update_rx_dca(adapter, q_vector->rx.ring, cpu);
5226
5227         q_vector->cpu = cpu;
5228 out_no_update:
5229         put_cpu();
5230 }
5231
5232 static void igb_setup_dca(struct igb_adapter *adapter)
5233 {
5234         struct e1000_hw *hw = &adapter->hw;
5235         int i;
5236
5237         if (!(adapter->flags & IGB_FLAG_DCA_ENABLED))
5238                 return;
5239
5240         /* Always use CB2 mode, difference is masked in the CB driver. */
5241         wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_CB2);
5242
5243         for (i = 0; i < adapter->num_q_vectors; i++) {
5244                 adapter->q_vector[i]->cpu = -1;
5245                 igb_update_dca(adapter->q_vector[i]);
5246         }
5247 }
5248
5249 static int __igb_notify_dca(struct device *dev, void *data)
5250 {
5251         struct net_device *netdev = dev_get_drvdata(dev);
5252         struct igb_adapter *adapter = netdev_priv(netdev);
5253         struct pci_dev *pdev = adapter->pdev;
5254         struct e1000_hw *hw = &adapter->hw;
5255         unsigned long event = *(unsigned long *)data;
5256
5257         switch (event) {
5258         case DCA_PROVIDER_ADD:
5259                 /* if already enabled, don't do it again */
5260                 if (adapter->flags & IGB_FLAG_DCA_ENABLED)
5261                         break;
5262                 if (dca_add_requester(dev) == 0) {
5263                         adapter->flags |= IGB_FLAG_DCA_ENABLED;
5264                         dev_info(&pdev->dev, "DCA enabled\n");
5265                         igb_setup_dca(adapter);
5266                         break;
5267                 }
5268                 /* Fall Through since DCA is disabled. */
5269         case DCA_PROVIDER_REMOVE:
5270                 if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
5271                         /* without this a class_device is left
5272                          * hanging around in the sysfs model
5273                          */
5274                         dca_remove_requester(dev);
5275                         dev_info(&pdev->dev, "DCA disabled\n");
5276                         adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
5277                         wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_DISABLE);
5278                 }
5279                 break;
5280         }
5281
5282         return 0;
5283 }
5284
5285 static int igb_notify_dca(struct notifier_block *nb, unsigned long event,
5286                           void *p)
5287 {
5288         int ret_val;
5289
5290         ret_val = driver_for_each_device(&igb_driver.driver, NULL, &event,
5291                                          __igb_notify_dca);
5292
5293         return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
5294 }
5295 #endif /* CONFIG_IGB_DCA */
5296
5297 #ifdef CONFIG_PCI_IOV
5298 static int igb_vf_configure(struct igb_adapter *adapter, int vf)
5299 {
5300         unsigned char mac_addr[ETH_ALEN];
5301
5302         eth_zero_addr(mac_addr);
5303         igb_set_vf_mac(adapter, vf, mac_addr);
5304
5305         /* By default spoof check is enabled for all VFs */
5306         adapter->vf_data[vf].spoofchk_enabled = true;
5307
5308         return 0;
5309 }
5310
5311 #endif
5312 static void igb_ping_all_vfs(struct igb_adapter *adapter)
5313 {
5314         struct e1000_hw *hw = &adapter->hw;
5315         u32 ping;
5316         int i;
5317
5318         for (i = 0 ; i < adapter->vfs_allocated_count; i++) {
5319                 ping = E1000_PF_CONTROL_MSG;
5320                 if (adapter->vf_data[i].flags & IGB_VF_FLAG_CTS)
5321                         ping |= E1000_VT_MSGTYPE_CTS;
5322                 igb_write_mbx(hw, &ping, 1, i);
5323         }
5324 }
5325
5326 static int igb_set_vf_promisc(struct igb_adapter *adapter, u32 *msgbuf, u32 vf)
5327 {
5328         struct e1000_hw *hw = &adapter->hw;
5329         u32 vmolr = rd32(E1000_VMOLR(vf));
5330         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
5331
5332         vf_data->flags &= ~(IGB_VF_FLAG_UNI_PROMISC |
5333                             IGB_VF_FLAG_MULTI_PROMISC);
5334         vmolr &= ~(E1000_VMOLR_ROPE | E1000_VMOLR_ROMPE | E1000_VMOLR_MPME);
5335
5336         if (*msgbuf & E1000_VF_SET_PROMISC_MULTICAST) {
5337                 vmolr |= E1000_VMOLR_MPME;
5338                 vf_data->flags |= IGB_VF_FLAG_MULTI_PROMISC;
5339                 *msgbuf &= ~E1000_VF_SET_PROMISC_MULTICAST;
5340         } else {
5341                 /* if we have hashes and we are clearing a multicast promisc
5342                  * flag we need to write the hashes to the MTA as this step
5343                  * was previously skipped
5344                  */
5345                 if (vf_data->num_vf_mc_hashes > 30) {
5346                         vmolr |= E1000_VMOLR_MPME;
5347                 } else if (vf_data->num_vf_mc_hashes) {
5348                         int j;
5349                         vmolr |= E1000_VMOLR_ROMPE;
5350                         for (j = 0; j < vf_data->num_vf_mc_hashes; j++)
5351                                 igb_mta_set(hw, vf_data->vf_mc_hashes[j]);
5352                 }
5353         }
5354
5355         wr32(E1000_VMOLR(vf), vmolr);
5356
5357         /* there are flags left unprocessed, likely not supported */
5358         if (*msgbuf & E1000_VT_MSGINFO_MASK)
5359                 return -EINVAL;
5360
5361         return 0;
5362 }
5363
5364 static int igb_set_vf_multicasts(struct igb_adapter *adapter,
5365                                   u32 *msgbuf, u32 vf)
5366 {
5367         int n = (msgbuf[0] & E1000_VT_MSGINFO_MASK) >> E1000_VT_MSGINFO_SHIFT;
5368         u16 *hash_list = (u16 *)&msgbuf[1];
5369         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
5370         int i;
5371
5372         /* salt away the number of multicast addresses assigned
5373          * to this VF for later use to restore when the PF multi cast
5374          * list changes
5375          */
5376         vf_data->num_vf_mc_hashes = n;
5377
5378         /* only up to 30 hash values supported */
5379         if (n > 30)
5380                 n = 30;
5381
5382         /* store the hashes for later use */
5383         for (i = 0; i < n; i++)
5384                 vf_data->vf_mc_hashes[i] = hash_list[i];
5385
5386         /* Flush and reset the mta with the new values */
5387         igb_set_rx_mode(adapter->netdev);
5388
5389         return 0;
5390 }
5391
5392 static void igb_restore_vf_multicasts(struct igb_adapter *adapter)
5393 {
5394         struct e1000_hw *hw = &adapter->hw;
5395         struct vf_data_storage *vf_data;
5396         int i, j;
5397
5398         for (i = 0; i < adapter->vfs_allocated_count; i++) {
5399                 u32 vmolr = rd32(E1000_VMOLR(i));
5400                 vmolr &= ~(E1000_VMOLR_ROMPE | E1000_VMOLR_MPME);
5401
5402                 vf_data = &adapter->vf_data[i];
5403
5404                 if ((vf_data->num_vf_mc_hashes > 30) ||
5405                     (vf_data->flags & IGB_VF_FLAG_MULTI_PROMISC)) {
5406                         vmolr |= E1000_VMOLR_MPME;
5407                 } else if (vf_data->num_vf_mc_hashes) {
5408                         vmolr |= E1000_VMOLR_ROMPE;
5409                         for (j = 0; j < vf_data->num_vf_mc_hashes; j++)
5410                                 igb_mta_set(hw, vf_data->vf_mc_hashes[j]);
5411                 }
5412                 wr32(E1000_VMOLR(i), vmolr);
5413         }
5414 }
5415
5416 static void igb_clear_vf_vfta(struct igb_adapter *adapter, u32 vf)
5417 {
5418         struct e1000_hw *hw = &adapter->hw;
5419         u32 pool_mask, reg, vid;
5420         int i;
5421
5422         pool_mask = 1 << (E1000_VLVF_POOLSEL_SHIFT + vf);
5423
5424         /* Find the vlan filter for this id */
5425         for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
5426                 reg = rd32(E1000_VLVF(i));
5427
5428                 /* remove the vf from the pool */
5429                 reg &= ~pool_mask;
5430
5431                 /* if pool is empty then remove entry from vfta */
5432                 if (!(reg & E1000_VLVF_POOLSEL_MASK) &&
5433                     (reg & E1000_VLVF_VLANID_ENABLE)) {
5434                         reg = 0;
5435                         vid = reg & E1000_VLVF_VLANID_MASK;
5436                         igb_vfta_set(hw, vid, false);
5437                 }
5438
5439                 wr32(E1000_VLVF(i), reg);
5440         }
5441
5442         adapter->vf_data[vf].vlans_enabled = 0;
5443 }
5444
5445 static s32 igb_vlvf_set(struct igb_adapter *adapter, u32 vid, bool add, u32 vf)
5446 {
5447         struct e1000_hw *hw = &adapter->hw;
5448         u32 reg, i;
5449
5450         /* The vlvf table only exists on 82576 hardware and newer */
5451         if (hw->mac.type < e1000_82576)
5452                 return -1;
5453
5454         /* we only need to do this if VMDq is enabled */
5455         if (!adapter->vfs_allocated_count)
5456                 return -1;
5457
5458         /* Find the vlan filter for this id */
5459         for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
5460                 reg = rd32(E1000_VLVF(i));
5461                 if ((reg & E1000_VLVF_VLANID_ENABLE) &&
5462                     vid == (reg & E1000_VLVF_VLANID_MASK))
5463                         break;
5464         }
5465
5466         if (add) {
5467                 if (i == E1000_VLVF_ARRAY_SIZE) {
5468                         /* Did not find a matching VLAN ID entry that was
5469                          * enabled.  Search for a free filter entry, i.e.
5470                          * one without the enable bit set
5471                          */
5472                         for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
5473                                 reg = rd32(E1000_VLVF(i));
5474                                 if (!(reg & E1000_VLVF_VLANID_ENABLE))
5475                                         break;
5476                         }
5477                 }
5478                 if (i < E1000_VLVF_ARRAY_SIZE) {
5479                         /* Found an enabled/available entry */
5480                         reg |= 1 << (E1000_VLVF_POOLSEL_SHIFT + vf);
5481
5482                         /* if !enabled we need to set this up in vfta */
5483                         if (!(reg & E1000_VLVF_VLANID_ENABLE)) {
5484                                 /* add VID to filter table */
5485                                 igb_vfta_set(hw, vid, true);
5486                                 reg |= E1000_VLVF_VLANID_ENABLE;
5487                         }
5488                         reg &= ~E1000_VLVF_VLANID_MASK;
5489                         reg |= vid;
5490                         wr32(E1000_VLVF(i), reg);
5491
5492                         /* do not modify RLPML for PF devices */
5493                         if (vf >= adapter->vfs_allocated_count)
5494                                 return 0;
5495
5496                         if (!adapter->vf_data[vf].vlans_enabled) {
5497                                 u32 size;
5498                                 reg = rd32(E1000_VMOLR(vf));
5499                                 size = reg & E1000_VMOLR_RLPML_MASK;
5500                                 size += 4;
5501                                 reg &= ~E1000_VMOLR_RLPML_MASK;
5502                                 reg |= size;
5503                                 wr32(E1000_VMOLR(vf), reg);
5504                         }
5505
5506                         adapter->vf_data[vf].vlans_enabled++;
5507                 }
5508         } else {
5509                 if (i < E1000_VLVF_ARRAY_SIZE) {
5510                         /* remove vf from the pool */
5511                         reg &= ~(1 << (E1000_VLVF_POOLSEL_SHIFT + vf));
5512                         /* if pool is empty then remove entry from vfta */
5513                         if (!(reg & E1000_VLVF_POOLSEL_MASK)) {
5514                                 reg = 0;
5515                                 igb_vfta_set(hw, vid, false);
5516                         }
5517                         wr32(E1000_VLVF(i), reg);
5518
5519                         /* do not modify RLPML for PF devices */
5520                         if (vf >= adapter->vfs_allocated_count)
5521                                 return 0;
5522
5523                         adapter->vf_data[vf].vlans_enabled--;
5524                         if (!adapter->vf_data[vf].vlans_enabled) {
5525                                 u32 size;
5526                                 reg = rd32(E1000_VMOLR(vf));
5527                                 size = reg & E1000_VMOLR_RLPML_MASK;
5528                                 size -= 4;
5529                                 reg &= ~E1000_VMOLR_RLPML_MASK;
5530                                 reg |= size;
5531                                 wr32(E1000_VMOLR(vf), reg);
5532                         }
5533                 }
5534         }
5535         return 0;
5536 }
5537
5538 static void igb_set_vmvir(struct igb_adapter *adapter, u32 vid, u32 vf)
5539 {
5540         struct e1000_hw *hw = &adapter->hw;
5541
5542         if (vid)
5543                 wr32(E1000_VMVIR(vf), (vid | E1000_VMVIR_VLANA_DEFAULT));
5544         else
5545                 wr32(E1000_VMVIR(vf), 0);
5546 }
5547
5548 static int igb_ndo_set_vf_vlan(struct net_device *netdev,
5549                                int vf, u16 vlan, u8 qos)
5550 {
5551         int err = 0;
5552         struct igb_adapter *adapter = netdev_priv(netdev);
5553
5554         if ((vf >= adapter->vfs_allocated_count) || (vlan > 4095) || (qos > 7))
5555                 return -EINVAL;
5556         if (vlan || qos) {
5557                 err = igb_vlvf_set(adapter, vlan, !!vlan, vf);
5558                 if (err)
5559                         goto out;
5560                 igb_set_vmvir(adapter, vlan | (qos << VLAN_PRIO_SHIFT), vf);
5561                 igb_set_vmolr(adapter, vf, !vlan);
5562                 adapter->vf_data[vf].pf_vlan = vlan;
5563                 adapter->vf_data[vf].pf_qos = qos;
5564                 dev_info(&adapter->pdev->dev,
5565                          "Setting VLAN %d, QOS 0x%x on VF %d\n", vlan, qos, vf);
5566                 if (test_bit(__IGB_DOWN, &adapter->state)) {
5567                         dev_warn(&adapter->pdev->dev,
5568                                  "The VF VLAN has been set, but the PF device is not up.\n");
5569                         dev_warn(&adapter->pdev->dev,
5570                                  "Bring the PF device up before attempting to use the VF device.\n");
5571                 }
5572         } else {
5573                 igb_vlvf_set(adapter, adapter->vf_data[vf].pf_vlan,
5574                              false, vf);
5575                 igb_set_vmvir(adapter, vlan, vf);
5576                 igb_set_vmolr(adapter, vf, true);
5577                 adapter->vf_data[vf].pf_vlan = 0;
5578                 adapter->vf_data[vf].pf_qos = 0;
5579         }
5580 out:
5581         return err;
5582 }
5583
5584 static int igb_find_vlvf_entry(struct igb_adapter *adapter, int vid)
5585 {
5586         struct e1000_hw *hw = &adapter->hw;
5587         int i;
5588         u32 reg;
5589
5590         /* Find the vlan filter for this id */
5591         for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
5592                 reg = rd32(E1000_VLVF(i));
5593                 if ((reg & E1000_VLVF_VLANID_ENABLE) &&
5594                     vid == (reg & E1000_VLVF_VLANID_MASK))
5595                         break;
5596         }
5597
5598         if (i >= E1000_VLVF_ARRAY_SIZE)
5599                 i = -1;
5600
5601         return i;
5602 }
5603
5604 static int igb_set_vf_vlan(struct igb_adapter *adapter, u32 *msgbuf, u32 vf)
5605 {
5606         struct e1000_hw *hw = &adapter->hw;
5607         int add = (msgbuf[0] & E1000_VT_MSGINFO_MASK) >> E1000_VT_MSGINFO_SHIFT;
5608         int vid = (msgbuf[1] & E1000_VLVF_VLANID_MASK);
5609         int err = 0;
5610
5611         /* If in promiscuous mode we need to make sure the PF also has
5612          * the VLAN filter set.
5613          */
5614         if (add && (adapter->netdev->flags & IFF_PROMISC))
5615                 err = igb_vlvf_set(adapter, vid, add,
5616                                    adapter->vfs_allocated_count);
5617         if (err)
5618                 goto out;
5619
5620         err = igb_vlvf_set(adapter, vid, add, vf);
5621
5622         if (err)
5623                 goto out;
5624
5625         /* Go through all the checks to see if the VLAN filter should
5626          * be wiped completely.
5627          */
5628         if (!add && (adapter->netdev->flags & IFF_PROMISC)) {
5629                 u32 vlvf, bits;
5630
5631                 int regndx = igb_find_vlvf_entry(adapter, vid);
5632                 if (regndx < 0)
5633                         goto out;
5634                 /* See if any other pools are set for this VLAN filter
5635                  * entry other than the PF.
5636                  */
5637                 vlvf = bits = rd32(E1000_VLVF(regndx));
5638                 bits &= 1 << (E1000_VLVF_POOLSEL_SHIFT +
5639                               adapter->vfs_allocated_count);
5640                 /* If the filter was removed then ensure PF pool bit
5641                  * is cleared if the PF only added itself to the pool
5642                  * because the PF is in promiscuous mode.
5643                  */
5644                 if ((vlvf & VLAN_VID_MASK) == vid &&
5645                     !test_bit(vid, adapter->active_vlans) &&
5646                     !bits)
5647                         igb_vlvf_set(adapter, vid, add,
5648                                      adapter->vfs_allocated_count);
5649         }
5650
5651 out:
5652         return err;
5653 }
5654
5655 static inline void igb_vf_reset(struct igb_adapter *adapter, u32 vf)
5656 {
5657         /* clear flags - except flag that indicates PF has set the MAC */
5658         adapter->vf_data[vf].flags &= IGB_VF_FLAG_PF_SET_MAC;
5659         adapter->vf_data[vf].last_nack = jiffies;
5660
5661         /* reset offloads to defaults */
5662         igb_set_vmolr(adapter, vf, true);
5663
5664         /* reset vlans for device */
5665         igb_clear_vf_vfta(adapter, vf);
5666         if (adapter->vf_data[vf].pf_vlan)
5667                 igb_ndo_set_vf_vlan(adapter->netdev, vf,
5668                                     adapter->vf_data[vf].pf_vlan,
5669                                     adapter->vf_data[vf].pf_qos);
5670         else
5671                 igb_clear_vf_vfta(adapter, vf);
5672
5673         /* reset multicast table array for vf */
5674         adapter->vf_data[vf].num_vf_mc_hashes = 0;
5675
5676         /* Flush and reset the mta with the new values */
5677         igb_set_rx_mode(adapter->netdev);
5678 }
5679
5680 static void igb_vf_reset_event(struct igb_adapter *adapter, u32 vf)
5681 {
5682         unsigned char *vf_mac = adapter->vf_data[vf].vf_mac_addresses;
5683
5684         /* clear mac address as we were hotplug removed/added */
5685         if (!(adapter->vf_data[vf].flags & IGB_VF_FLAG_PF_SET_MAC))
5686                 eth_zero_addr(vf_mac);
5687
5688         /* process remaining reset events */
5689         igb_vf_reset(adapter, vf);
5690 }
5691
5692 static void igb_vf_reset_msg(struct igb_adapter *adapter, u32 vf)
5693 {
5694         struct e1000_hw *hw = &adapter->hw;
5695         unsigned char *vf_mac = adapter->vf_data[vf].vf_mac_addresses;
5696         int rar_entry = hw->mac.rar_entry_count - (vf + 1);
5697         u32 reg, msgbuf[3];
5698         u8 *addr = (u8 *)(&msgbuf[1]);
5699
5700         /* process all the same items cleared in a function level reset */
5701         igb_vf_reset(adapter, vf);
5702
5703         /* set vf mac address */
5704         igb_rar_set_qsel(adapter, vf_mac, rar_entry, vf);
5705
5706         /* enable transmit and receive for vf */
5707         reg = rd32(E1000_VFTE);
5708         wr32(E1000_VFTE, reg | (1 << vf));
5709         reg = rd32(E1000_VFRE);
5710         wr32(E1000_VFRE, reg | (1 << vf));
5711
5712         adapter->vf_data[vf].flags |= IGB_VF_FLAG_CTS;
5713
5714         /* reply to reset with ack and vf mac address */
5715         msgbuf[0] = E1000_VF_RESET | E1000_VT_MSGTYPE_ACK;
5716         memcpy(addr, vf_mac, 6);
5717         igb_write_mbx(hw, msgbuf, 3, vf);
5718 }
5719
5720 static int igb_set_vf_mac_addr(struct igb_adapter *adapter, u32 *msg, int vf)
5721 {
5722         /* The VF MAC Address is stored in a packed array of bytes
5723          * starting at the second 32 bit word of the msg array
5724          */
5725         unsigned char *addr = (char *)&msg[1];
5726         int err = -1;
5727
5728         if (is_valid_ether_addr(addr))
5729                 err = igb_set_vf_mac(adapter, vf, addr);
5730
5731         return err;
5732 }
5733
5734 static void igb_rcv_ack_from_vf(struct igb_adapter *adapter, u32 vf)
5735 {
5736         struct e1000_hw *hw = &adapter->hw;
5737         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
5738         u32 msg = E1000_VT_MSGTYPE_NACK;
5739
5740         /* if device isn't clear to send it shouldn't be reading either */
5741         if (!(vf_data->flags & IGB_VF_FLAG_CTS) &&
5742             time_after(jiffies, vf_data->last_nack + (2 * HZ))) {
5743                 igb_write_mbx(hw, &msg, 1, vf);
5744                 vf_data->last_nack = jiffies;
5745         }
5746 }
5747
5748 static void igb_rcv_msg_from_vf(struct igb_adapter *adapter, u32 vf)
5749 {
5750         struct pci_dev *pdev = adapter->pdev;
5751         u32 msgbuf[E1000_VFMAILBOX_SIZE];
5752         struct e1000_hw *hw = &adapter->hw;
5753         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
5754         s32 retval;
5755
5756         retval = igb_read_mbx(hw, msgbuf, E1000_VFMAILBOX_SIZE, vf);
5757
5758         if (retval) {
5759                 /* if receive failed revoke VF CTS stats and restart init */
5760                 dev_err(&pdev->dev, "Error receiving message from VF\n");
5761                 vf_data->flags &= ~IGB_VF_FLAG_CTS;
5762                 if (!time_after(jiffies, vf_data->last_nack + (2 * HZ)))
5763                         return;
5764                 goto out;
5765         }
5766
5767         /* this is a message we already processed, do nothing */
5768         if (msgbuf[0] & (E1000_VT_MSGTYPE_ACK | E1000_VT_MSGTYPE_NACK))
5769                 return;
5770
5771         /* until the vf completes a reset it should not be
5772          * allowed to start any configuration.
5773          */
5774         if (msgbuf[0] == E1000_VF_RESET) {
5775                 igb_vf_reset_msg(adapter, vf);
5776                 return;
5777         }
5778
5779         if (!(vf_data->flags & IGB_VF_FLAG_CTS)) {
5780                 if (!time_after(jiffies, vf_data->last_nack + (2 * HZ)))
5781                         return;
5782                 retval = -1;
5783                 goto out;
5784         }
5785
5786         switch ((msgbuf[0] & 0xFFFF)) {
5787         case E1000_VF_SET_MAC_ADDR:
5788                 retval = -EINVAL;
5789                 if (!(vf_data->flags & IGB_VF_FLAG_PF_SET_MAC))
5790                         retval = igb_set_vf_mac_addr(adapter, msgbuf, vf);
5791                 else
5792                         dev_warn(&pdev->dev,
5793                                  "VF %d attempted to override administratively set MAC address\nReload the VF driver to resume operations\n",
5794                                  vf);
5795                 break;
5796         case E1000_VF_SET_PROMISC:
5797                 retval = igb_set_vf_promisc(adapter, msgbuf, vf);
5798                 break;
5799         case E1000_VF_SET_MULTICAST:
5800                 retval = igb_set_vf_multicasts(adapter, msgbuf, vf);
5801                 break;
5802         case E1000_VF_SET_LPE:
5803                 retval = igb_set_vf_rlpml(adapter, msgbuf[1], vf);
5804                 break;
5805         case E1000_VF_SET_VLAN:
5806                 retval = -1;
5807                 if (vf_data->pf_vlan)
5808                         dev_warn(&pdev->dev,
5809                                  "VF %d attempted to override administratively set VLAN tag\nReload the VF driver to resume operations\n",
5810                                  vf);
5811                 else
5812                         retval = igb_set_vf_vlan(adapter, msgbuf, vf);
5813                 break;
5814         default:
5815                 dev_err(&pdev->dev, "Unhandled Msg %08x\n", msgbuf[0]);
5816                 retval = -1;
5817                 break;
5818         }
5819
5820         msgbuf[0] |= E1000_VT_MSGTYPE_CTS;
5821 out:
5822         /* notify the VF of the results of what it sent us */
5823         if (retval)
5824                 msgbuf[0] |= E1000_VT_MSGTYPE_NACK;
5825         else
5826                 msgbuf[0] |= E1000_VT_MSGTYPE_ACK;
5827
5828         igb_write_mbx(hw, msgbuf, 1, vf);
5829 }
5830
5831 static void igb_msg_task(struct igb_adapter *adapter)
5832 {
5833         struct e1000_hw *hw = &adapter->hw;
5834         u32 vf;
5835
5836         for (vf = 0; vf < adapter->vfs_allocated_count; vf++) {
5837                 /* process any reset requests */
5838                 if (!igb_check_for_rst(hw, vf))
5839                         igb_vf_reset_event(adapter, vf);
5840
5841                 /* process any messages pending */
5842                 if (!igb_check_for_msg(hw, vf))
5843                         igb_rcv_msg_from_vf(adapter, vf);
5844
5845                 /* process any acks */
5846                 if (!igb_check_for_ack(hw, vf))
5847                         igb_rcv_ack_from_vf(adapter, vf);
5848         }
5849 }
5850
5851 /**
5852  *  igb_set_uta - Set unicast filter table address
5853  *  @adapter: board private structure
5854  *
5855  *  The unicast table address is a register array of 32-bit registers.
5856  *  The table is meant to be used in a way similar to how the MTA is used
5857  *  however due to certain limitations in the hardware it is necessary to
5858  *  set all the hash bits to 1 and use the VMOLR ROPE bit as a promiscuous
5859  *  enable bit to allow vlan tag stripping when promiscuous mode is enabled
5860  **/
5861 static void igb_set_uta(struct igb_adapter *adapter)
5862 {
5863         struct e1000_hw *hw = &adapter->hw;
5864         int i;
5865
5866         /* The UTA table only exists on 82576 hardware and newer */
5867         if (hw->mac.type < e1000_82576)
5868                 return;
5869
5870         /* we only need to do this if VMDq is enabled */
5871         if (!adapter->vfs_allocated_count)
5872                 return;
5873
5874         for (i = 0; i < hw->mac.uta_reg_count; i++)
5875                 array_wr32(E1000_UTA, i, ~0);
5876 }
5877
5878 /**
5879  *  igb_intr_msi - Interrupt Handler
5880  *  @irq: interrupt number
5881  *  @data: pointer to a network interface device structure
5882  **/
5883 static irqreturn_t igb_intr_msi(int irq, void *data)
5884 {
5885         struct igb_adapter *adapter = data;
5886         struct igb_q_vector *q_vector = adapter->q_vector[0];
5887         struct e1000_hw *hw = &adapter->hw;
5888         /* read ICR disables interrupts using IAM */
5889         u32 icr = rd32(E1000_ICR);
5890
5891         igb_write_itr(q_vector);
5892
5893         if (icr & E1000_ICR_DRSTA)
5894                 schedule_work(&adapter->reset_task);
5895
5896         if (icr & E1000_ICR_DOUTSYNC) {
5897                 /* HW is reporting DMA is out of sync */
5898                 adapter->stats.doosync++;
5899         }
5900
5901         if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
5902                 hw->mac.get_link_status = 1;
5903                 if (!test_bit(__IGB_DOWN, &adapter->state))
5904                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
5905         }
5906
5907         if (icr & E1000_ICR_TS) {
5908                 u32 tsicr = rd32(E1000_TSICR);
5909
5910                 if (tsicr & E1000_TSICR_TXTS) {
5911                         /* acknowledge the interrupt */
5912                         wr32(E1000_TSICR, E1000_TSICR_TXTS);
5913                         /* retrieve hardware timestamp */
5914                         schedule_work(&adapter->ptp_tx_work);
5915                 }
5916         }
5917
5918         napi_schedule(&q_vector->napi);
5919
5920         return IRQ_HANDLED;
5921 }
5922
5923 /**
5924  *  igb_intr - Legacy Interrupt Handler
5925  *  @irq: interrupt number
5926  *  @data: pointer to a network interface device structure
5927  **/
5928 static irqreturn_t igb_intr(int irq, void *data)
5929 {
5930         struct igb_adapter *adapter = data;
5931         struct igb_q_vector *q_vector = adapter->q_vector[0];
5932         struct e1000_hw *hw = &adapter->hw;
5933         /* Interrupt Auto-Mask...upon reading ICR, interrupts are masked.  No
5934          * need for the IMC write
5935          */
5936         u32 icr = rd32(E1000_ICR);
5937
5938         /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
5939          * not set, then the adapter didn't send an interrupt
5940          */
5941         if (!(icr & E1000_ICR_INT_ASSERTED))
5942                 return IRQ_NONE;
5943
5944         igb_write_itr(q_vector);
5945
5946         if (icr & E1000_ICR_DRSTA)
5947                 schedule_work(&adapter->reset_task);
5948
5949         if (icr & E1000_ICR_DOUTSYNC) {
5950                 /* HW is reporting DMA is out of sync */
5951                 adapter->stats.doosync++;
5952         }
5953
5954         if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
5955                 hw->mac.get_link_status = 1;
5956                 /* guard against interrupt when we're going down */
5957                 if (!test_bit(__IGB_DOWN, &adapter->state))
5958                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
5959         }
5960
5961         if (icr & E1000_ICR_TS) {
5962                 u32 tsicr = rd32(E1000_TSICR);
5963
5964                 if (tsicr & E1000_TSICR_TXTS) {
5965                         /* acknowledge the interrupt */
5966                         wr32(E1000_TSICR, E1000_TSICR_TXTS);
5967                         /* retrieve hardware timestamp */
5968                         schedule_work(&adapter->ptp_tx_work);
5969                 }
5970         }
5971
5972         napi_schedule(&q_vector->napi);
5973
5974         return IRQ_HANDLED;
5975 }
5976
5977 static void igb_ring_irq_enable(struct igb_q_vector *q_vector)
5978 {
5979         struct igb_adapter *adapter = q_vector->adapter;
5980         struct e1000_hw *hw = &adapter->hw;
5981
5982         if ((q_vector->rx.ring && (adapter->rx_itr_setting & 3)) ||
5983             (!q_vector->rx.ring && (adapter->tx_itr_setting & 3))) {
5984                 if ((adapter->num_q_vectors == 1) && !adapter->vf_data)
5985                         igb_set_itr(q_vector);
5986                 else
5987                         igb_update_ring_itr(q_vector);
5988         }
5989
5990         if (!test_bit(__IGB_DOWN, &adapter->state)) {
5991                 if (adapter->msix_entries)
5992                         wr32(E1000_EIMS, q_vector->eims_value);
5993                 else
5994                         igb_irq_enable(adapter);
5995         }
5996 }
5997
5998 /**
5999  *  igb_poll - NAPI Rx polling callback
6000  *  @napi: napi polling structure
6001  *  @budget: count of how many packets we should handle
6002  **/
6003 static int igb_poll(struct napi_struct *napi, int budget)
6004 {
6005         struct igb_q_vector *q_vector = container_of(napi,
6006                                                      struct igb_q_vector,
6007                                                      napi);
6008         bool clean_complete = true;
6009
6010 #ifdef CONFIG_IGB_DCA
6011         if (q_vector->adapter->flags & IGB_FLAG_DCA_ENABLED)
6012                 igb_update_dca(q_vector);
6013 #endif
6014         if (q_vector->tx.ring)
6015                 clean_complete = igb_clean_tx_irq(q_vector);
6016
6017         if (q_vector->rx.ring)
6018                 clean_complete &= igb_clean_rx_irq(q_vector, budget);
6019
6020         /* If all work not completed, return budget and keep polling */
6021         if (!clean_complete)
6022                 return budget;
6023
6024         /* If not enough Rx work done, exit the polling mode */
6025         napi_complete(napi);
6026         igb_ring_irq_enable(q_vector);
6027
6028         return 0;
6029 }
6030
6031 /**
6032  *  igb_clean_tx_irq - Reclaim resources after transmit completes
6033  *  @q_vector: pointer to q_vector containing needed info
6034  *
6035  *  returns true if ring is completely cleaned
6036  **/
6037 static bool igb_clean_tx_irq(struct igb_q_vector *q_vector)
6038 {
6039         struct igb_adapter *adapter = q_vector->adapter;
6040         struct igb_ring *tx_ring = q_vector->tx.ring;
6041         struct igb_tx_buffer *tx_buffer;
6042         union e1000_adv_tx_desc *tx_desc;
6043         unsigned int total_bytes = 0, total_packets = 0;
6044         unsigned int budget = q_vector->tx.work_limit;
6045         unsigned int i = tx_ring->next_to_clean;
6046
6047         if (test_bit(__IGB_DOWN, &adapter->state))
6048                 return true;
6049
6050         tx_buffer = &tx_ring->tx_buffer_info[i];
6051         tx_desc = IGB_TX_DESC(tx_ring, i);
6052         i -= tx_ring->count;
6053
6054         do {
6055                 union e1000_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
6056
6057                 /* if next_to_watch is not set then there is no work pending */
6058                 if (!eop_desc)
6059                         break;
6060
6061                 /* prevent any other reads prior to eop_desc */
6062                 read_barrier_depends();
6063
6064                 /* if DD is not set pending work has not been completed */
6065                 if (!(eop_desc->wb.status & cpu_to_le32(E1000_TXD_STAT_DD)))
6066                         break;
6067
6068                 /* clear next_to_watch to prevent false hangs */
6069                 tx_buffer->next_to_watch = NULL;
6070
6071                 /* update the statistics for this packet */
6072                 total_bytes += tx_buffer->bytecount;
6073                 total_packets += tx_buffer->gso_segs;
6074
6075                 /* free the skb */
6076                 dev_kfree_skb_any(tx_buffer->skb);
6077
6078                 /* unmap skb header data */
6079                 dma_unmap_single(tx_ring->dev,
6080                                  dma_unmap_addr(tx_buffer, dma),
6081                                  dma_unmap_len(tx_buffer, len),
6082                                  DMA_TO_DEVICE);
6083
6084                 /* clear tx_buffer data */
6085                 tx_buffer->skb = NULL;
6086                 dma_unmap_len_set(tx_buffer, len, 0);
6087
6088                 /* clear last DMA location and unmap remaining buffers */
6089                 while (tx_desc != eop_desc) {
6090                         tx_buffer++;
6091                         tx_desc++;
6092                         i++;
6093                         if (unlikely(!i)) {
6094                                 i -= tx_ring->count;
6095                                 tx_buffer = tx_ring->tx_buffer_info;
6096                                 tx_desc = IGB_TX_DESC(tx_ring, 0);
6097                         }
6098
6099                         /* unmap any remaining paged data */
6100                         if (dma_unmap_len(tx_buffer, len)) {
6101                                 dma_unmap_page(tx_ring->dev,
6102                                                dma_unmap_addr(tx_buffer, dma),
6103                                                dma_unmap_len(tx_buffer, len),
6104                                                DMA_TO_DEVICE);
6105                                 dma_unmap_len_set(tx_buffer, len, 0);
6106                         }
6107                 }
6108
6109                 /* move us one more past the eop_desc for start of next pkt */
6110                 tx_buffer++;
6111                 tx_desc++;
6112                 i++;
6113                 if (unlikely(!i)) {
6114                         i -= tx_ring->count;
6115                         tx_buffer = tx_ring->tx_buffer_info;
6116                         tx_desc = IGB_TX_DESC(tx_ring, 0);
6117                 }
6118
6119                 /* issue prefetch for next Tx descriptor */
6120                 prefetch(tx_desc);
6121
6122                 /* update budget accounting */
6123                 budget--;
6124         } while (likely(budget));
6125
6126         netdev_tx_completed_queue(txring_txq(tx_ring),
6127                                   total_packets, total_bytes);
6128         i += tx_ring->count;
6129         tx_ring->next_to_clean = i;
6130         u64_stats_update_begin(&tx_ring->tx_syncp);
6131         tx_ring->tx_stats.bytes += total_bytes;
6132         tx_ring->tx_stats.packets += total_packets;
6133         u64_stats_update_end(&tx_ring->tx_syncp);
6134         q_vector->tx.total_bytes += total_bytes;
6135         q_vector->tx.total_packets += total_packets;
6136
6137         if (test_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags)) {
6138                 struct e1000_hw *hw = &adapter->hw;
6139
6140                 /* Detect a transmit hang in hardware, this serializes the
6141                  * check with the clearing of time_stamp and movement of i
6142                  */
6143                 clear_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags);
6144                 if (tx_buffer->next_to_watch &&
6145                     time_after(jiffies, tx_buffer->time_stamp +
6146                                (adapter->tx_timeout_factor * HZ)) &&
6147                     !(rd32(E1000_STATUS) & E1000_STATUS_TXOFF)) {
6148
6149                         /* detected Tx unit hang */
6150                         dev_err(tx_ring->dev,
6151                                 "Detected Tx Unit Hang\n"
6152                                 "  Tx Queue             <%d>\n"
6153                                 "  TDH                  <%x>\n"
6154                                 "  TDT                  <%x>\n"
6155                                 "  next_to_use          <%x>\n"
6156                                 "  next_to_clean        <%x>\n"
6157                                 "buffer_info[next_to_clean]\n"
6158                                 "  time_stamp           <%lx>\n"
6159                                 "  next_to_watch        <%p>\n"
6160                                 "  jiffies              <%lx>\n"
6161                                 "  desc.status          <%x>\n",
6162                                 tx_ring->queue_index,
6163                                 rd32(E1000_TDH(tx_ring->reg_idx)),
6164                                 readl(tx_ring->tail),
6165                                 tx_ring->next_to_use,
6166                                 tx_ring->next_to_clean,
6167                                 tx_buffer->time_stamp,
6168                                 tx_buffer->next_to_watch,
6169                                 jiffies,
6170                                 tx_buffer->next_to_watch->wb.status);
6171                         netif_stop_subqueue(tx_ring->netdev,
6172                                             tx_ring->queue_index);
6173
6174                         /* we are about to reset, no point in enabling stuff */
6175                         return true;
6176                 }
6177         }
6178
6179 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
6180         if (unlikely(total_packets &&
6181             netif_carrier_ok(tx_ring->netdev) &&
6182             igb_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD)) {
6183                 /* Make sure that anybody stopping the queue after this
6184                  * sees the new next_to_clean.
6185                  */
6186                 smp_mb();
6187                 if (__netif_subqueue_stopped(tx_ring->netdev,
6188                                              tx_ring->queue_index) &&
6189                     !(test_bit(__IGB_DOWN, &adapter->state))) {
6190                         netif_wake_subqueue(tx_ring->netdev,
6191                                             tx_ring->queue_index);
6192
6193                         u64_stats_update_begin(&tx_ring->tx_syncp);
6194                         tx_ring->tx_stats.restart_queue++;
6195                         u64_stats_update_end(&tx_ring->tx_syncp);
6196                 }
6197         }
6198
6199         return !!budget;
6200 }
6201
6202 /**
6203  *  igb_reuse_rx_page - page flip buffer and store it back on the ring
6204  *  @rx_ring: rx descriptor ring to store buffers on
6205  *  @old_buff: donor buffer to have page reused
6206  *
6207  *  Synchronizes page for reuse by the adapter
6208  **/
6209 static void igb_reuse_rx_page(struct igb_ring *rx_ring,
6210                               struct igb_rx_buffer *old_buff)
6211 {
6212         struct igb_rx_buffer *new_buff;
6213         u16 nta = rx_ring->next_to_alloc;
6214
6215         new_buff = &rx_ring->rx_buffer_info[nta];
6216
6217         /* update, and store next to alloc */
6218         nta++;
6219         rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
6220
6221         /* transfer page from old buffer to new buffer */
6222         memcpy(new_buff, old_buff, sizeof(struct igb_rx_buffer));
6223
6224         /* sync the buffer for use by the device */
6225         dma_sync_single_range_for_device(rx_ring->dev, old_buff->dma,
6226                                          old_buff->page_offset,
6227                                          IGB_RX_BUFSZ,
6228                                          DMA_FROM_DEVICE);
6229 }
6230
6231 static bool igb_can_reuse_rx_page(struct igb_rx_buffer *rx_buffer,
6232                                   struct page *page,
6233                                   unsigned int truesize)
6234 {
6235         /* avoid re-using remote pages */
6236         if (unlikely(page_to_nid(page) != numa_node_id()))
6237                 return false;
6238
6239 #if (PAGE_SIZE < 8192)
6240         /* if we are only owner of page we can reuse it */
6241         if (unlikely(page_count(page) != 1))
6242                 return false;
6243
6244         /* flip page offset to other buffer */
6245         rx_buffer->page_offset ^= IGB_RX_BUFSZ;
6246
6247         /* since we are the only owner of the page and we need to
6248          * increment it, just set the value to 2 in order to avoid
6249          * an unnecessary locked operation
6250          */
6251         atomic_set(&page->_count, 2);
6252 #else
6253         /* move offset up to the next cache line */
6254         rx_buffer->page_offset += truesize;
6255
6256         if (rx_buffer->page_offset > (PAGE_SIZE - IGB_RX_BUFSZ))
6257                 return false;
6258
6259         /* bump ref count on page before it is given to the stack */
6260         get_page(page);
6261 #endif
6262
6263         return true;
6264 }
6265
6266 /**
6267  *  igb_add_rx_frag - Add contents of Rx buffer to sk_buff
6268  *  @rx_ring: rx descriptor ring to transact packets on
6269  *  @rx_buffer: buffer containing page to add
6270  *  @rx_desc: descriptor containing length of buffer written by hardware
6271  *  @skb: sk_buff to place the data into
6272  *
6273  *  This function will add the data contained in rx_buffer->page to the skb.
6274  *  This is done either through a direct copy if the data in the buffer is
6275  *  less than the skb header size, otherwise it will just attach the page as
6276  *  a frag to the skb.
6277  *
6278  *  The function will then update the page offset if necessary and return
6279  *  true if the buffer can be reused by the adapter.
6280  **/
6281 static bool igb_add_rx_frag(struct igb_ring *rx_ring,
6282                             struct igb_rx_buffer *rx_buffer,
6283                             union e1000_adv_rx_desc *rx_desc,
6284                             struct sk_buff *skb)
6285 {
6286         struct page *page = rx_buffer->page;
6287         unsigned int size = le16_to_cpu(rx_desc->wb.upper.length);
6288 #if (PAGE_SIZE < 8192)
6289         unsigned int truesize = IGB_RX_BUFSZ;
6290 #else
6291         unsigned int truesize = ALIGN(size, L1_CACHE_BYTES);
6292 #endif
6293
6294         if ((size <= IGB_RX_HDR_LEN) && !skb_is_nonlinear(skb)) {
6295                 unsigned char *va = page_address(page) + rx_buffer->page_offset;
6296
6297                 if (igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP)) {
6298                         igb_ptp_rx_pktstamp(rx_ring->q_vector, va, skb);
6299                         va += IGB_TS_HDR_LEN;
6300                         size -= IGB_TS_HDR_LEN;
6301                 }
6302
6303                 memcpy(__skb_put(skb, size), va, ALIGN(size, sizeof(long)));
6304
6305                 /* we can reuse buffer as-is, just make sure it is local */
6306                 if (likely(page_to_nid(page) == numa_node_id()))
6307                         return true;
6308
6309                 /* this page cannot be reused so discard it */
6310                 put_page(page);
6311                 return false;
6312         }
6313
6314         skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, page,
6315                         rx_buffer->page_offset, size, truesize);
6316
6317         return igb_can_reuse_rx_page(rx_buffer, page, truesize);
6318 }
6319
6320 static struct sk_buff *igb_fetch_rx_buffer(struct igb_ring *rx_ring,
6321                                            union e1000_adv_rx_desc *rx_desc,
6322                                            struct sk_buff *skb)
6323 {
6324         struct igb_rx_buffer *rx_buffer;
6325         struct page *page;
6326
6327         rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
6328
6329         page = rx_buffer->page;
6330         prefetchw(page);
6331
6332         if (likely(!skb)) {
6333                 void *page_addr = page_address(page) +
6334                                   rx_buffer->page_offset;
6335
6336                 /* prefetch first cache line of first page */
6337                 prefetch(page_addr);
6338 #if L1_CACHE_BYTES < 128
6339                 prefetch(page_addr + L1_CACHE_BYTES);
6340 #endif
6341
6342                 /* allocate a skb to store the frags */
6343                 skb = netdev_alloc_skb_ip_align(rx_ring->netdev,
6344                                                 IGB_RX_HDR_LEN);
6345                 if (unlikely(!skb)) {
6346                         rx_ring->rx_stats.alloc_failed++;
6347                         return NULL;
6348                 }
6349
6350                 /* we will be copying header into skb->data in
6351                  * pskb_may_pull so it is in our interest to prefetch
6352                  * it now to avoid a possible cache miss
6353                  */
6354                 prefetchw(skb->data);
6355         }
6356
6357         /* we are reusing so sync this buffer for CPU use */
6358         dma_sync_single_range_for_cpu(rx_ring->dev,
6359                                       rx_buffer->dma,
6360                                       rx_buffer->page_offset,
6361                                       IGB_RX_BUFSZ,
6362                                       DMA_FROM_DEVICE);
6363
6364         /* pull page into skb */
6365         if (igb_add_rx_frag(rx_ring, rx_buffer, rx_desc, skb)) {
6366                 /* hand second half of page back to the ring */
6367                 igb_reuse_rx_page(rx_ring, rx_buffer);
6368         } else {
6369                 /* we are not reusing the buffer so unmap it */
6370                 dma_unmap_page(rx_ring->dev, rx_buffer->dma,
6371                                PAGE_SIZE, DMA_FROM_DEVICE);
6372         }
6373
6374         /* clear contents of rx_buffer */
6375         rx_buffer->page = NULL;
6376
6377         return skb;
6378 }
6379
6380 static inline void igb_rx_checksum(struct igb_ring *ring,
6381                                    union e1000_adv_rx_desc *rx_desc,
6382                                    struct sk_buff *skb)
6383 {
6384         skb_checksum_none_assert(skb);
6385
6386         /* Ignore Checksum bit is set */
6387         if (igb_test_staterr(rx_desc, E1000_RXD_STAT_IXSM))
6388                 return;
6389
6390         /* Rx checksum disabled via ethtool */
6391         if (!(ring->netdev->features & NETIF_F_RXCSUM))
6392                 return;
6393
6394         /* TCP/UDP checksum error bit is set */
6395         if (igb_test_staterr(rx_desc,
6396                              E1000_RXDEXT_STATERR_TCPE |
6397                              E1000_RXDEXT_STATERR_IPE)) {
6398                 /* work around errata with sctp packets where the TCPE aka
6399                  * L4E bit is set incorrectly on 64 byte (60 byte w/o crc)
6400                  * packets, (aka let the stack check the crc32c)
6401                  */
6402                 if (!((skb->len == 60) &&
6403                       test_bit(IGB_RING_FLAG_RX_SCTP_CSUM, &ring->flags))) {
6404                         u64_stats_update_begin(&ring->rx_syncp);
6405                         ring->rx_stats.csum_err++;
6406                         u64_stats_update_end(&ring->rx_syncp);
6407                 }
6408                 /* let the stack verify checksum errors */
6409                 return;
6410         }
6411         /* It must be a TCP or UDP packet with a valid checksum */
6412         if (igb_test_staterr(rx_desc, E1000_RXD_STAT_TCPCS |
6413                                       E1000_RXD_STAT_UDPCS))
6414                 skb->ip_summed = CHECKSUM_UNNECESSARY;
6415
6416         dev_dbg(ring->dev, "cksum success: bits %08X\n",
6417                 le32_to_cpu(rx_desc->wb.upper.status_error));
6418 }
6419
6420 static inline void igb_rx_hash(struct igb_ring *ring,
6421                                union e1000_adv_rx_desc *rx_desc,
6422                                struct sk_buff *skb)
6423 {
6424         if (ring->netdev->features & NETIF_F_RXHASH)
6425                 skb->rxhash = le32_to_cpu(rx_desc->wb.lower.hi_dword.rss);
6426 }
6427
6428 /**
6429  *  igb_is_non_eop - process handling of non-EOP buffers
6430  *  @rx_ring: Rx ring being processed
6431  *  @rx_desc: Rx descriptor for current buffer
6432  *  @skb: current socket buffer containing buffer in progress
6433  *
6434  *  This function updates next to clean.  If the buffer is an EOP buffer
6435  *  this function exits returning false, otherwise it will place the
6436  *  sk_buff in the next buffer to be chained and return true indicating
6437  *  that this is in fact a non-EOP buffer.
6438  **/
6439 static bool igb_is_non_eop(struct igb_ring *rx_ring,
6440                            union e1000_adv_rx_desc *rx_desc)
6441 {
6442         u32 ntc = rx_ring->next_to_clean + 1;
6443
6444         /* fetch, update, and store next to clean */
6445         ntc = (ntc < rx_ring->count) ? ntc : 0;
6446         rx_ring->next_to_clean = ntc;
6447
6448         prefetch(IGB_RX_DESC(rx_ring, ntc));
6449
6450         if (likely(igb_test_staterr(rx_desc, E1000_RXD_STAT_EOP)))
6451                 return false;
6452
6453         return true;
6454 }
6455
6456 /**
6457  *  igb_get_headlen - determine size of header for LRO/GRO
6458  *  @data: pointer to the start of the headers
6459  *  @max_len: total length of section to find headers in
6460  *
6461  *  This function is meant to determine the length of headers that will
6462  *  be recognized by hardware for LRO, and GRO offloads.  The main
6463  *  motivation of doing this is to only perform one pull for IPv4 TCP
6464  *  packets so that we can do basic things like calculating the gso_size
6465  *  based on the average data per packet.
6466  **/
6467 static unsigned int igb_get_headlen(unsigned char *data,
6468                                     unsigned int max_len)
6469 {
6470         union {
6471                 unsigned char *network;
6472                 /* l2 headers */
6473                 struct ethhdr *eth;
6474                 struct vlan_hdr *vlan;
6475                 /* l3 headers */
6476                 struct iphdr *ipv4;
6477                 struct ipv6hdr *ipv6;
6478         } hdr;
6479         __be16 protocol;
6480         u8 nexthdr = 0; /* default to not TCP */
6481         u8 hlen;
6482
6483         /* this should never happen, but better safe than sorry */
6484         if (max_len < ETH_HLEN)
6485                 return max_len;
6486
6487         /* initialize network frame pointer */
6488         hdr.network = data;
6489
6490         /* set first protocol and move network header forward */
6491         protocol = hdr.eth->h_proto;
6492         hdr.network += ETH_HLEN;
6493
6494         /* handle any vlan tag if present */
6495         if (protocol == __constant_htons(ETH_P_8021Q)) {
6496                 if ((hdr.network - data) > (max_len - VLAN_HLEN))
6497                         return max_len;
6498
6499                 protocol = hdr.vlan->h_vlan_encapsulated_proto;
6500                 hdr.network += VLAN_HLEN;
6501         }
6502
6503         /* handle L3 protocols */
6504         if (protocol == __constant_htons(ETH_P_IP)) {
6505                 if ((hdr.network - data) > (max_len - sizeof(struct iphdr)))
6506                         return max_len;
6507
6508                 /* access ihl as a u8 to avoid unaligned access on ia64 */
6509                 hlen = (hdr.network[0] & 0x0F) << 2;
6510
6511                 /* verify hlen meets minimum size requirements */
6512                 if (hlen < sizeof(struct iphdr))
6513                         return hdr.network - data;
6514
6515                 /* record next protocol if header is present */
6516                 if (!(hdr.ipv4->frag_off & htons(IP_OFFSET)))
6517                         nexthdr = hdr.ipv4->protocol;
6518         } else if (protocol == __constant_htons(ETH_P_IPV6)) {
6519                 if ((hdr.network - data) > (max_len - sizeof(struct ipv6hdr)))
6520                         return max_len;
6521
6522                 /* record next protocol */
6523                 nexthdr = hdr.ipv6->nexthdr;
6524                 hlen = sizeof(struct ipv6hdr);
6525         } else {
6526                 return hdr.network - data;
6527         }
6528
6529         /* relocate pointer to start of L4 header */
6530         hdr.network += hlen;
6531
6532         /* finally sort out TCP */
6533         if (nexthdr == IPPROTO_TCP) {
6534                 if ((hdr.network - data) > (max_len - sizeof(struct tcphdr)))
6535                         return max_len;
6536
6537                 /* access doff as a u8 to avoid unaligned access on ia64 */
6538                 hlen = (hdr.network[12] & 0xF0) >> 2;
6539
6540                 /* verify hlen meets minimum size requirements */
6541                 if (hlen < sizeof(struct tcphdr))
6542                         return hdr.network - data;
6543
6544                 hdr.network += hlen;
6545         } else if (nexthdr == IPPROTO_UDP) {
6546                 if ((hdr.network - data) > (max_len - sizeof(struct udphdr)))
6547                         return max_len;
6548
6549                 hdr.network += sizeof(struct udphdr);
6550         }
6551
6552         /* If everything has gone correctly hdr.network should be the
6553          * data section of the packet and will be the end of the header.
6554          * If not then it probably represents the end of the last recognized
6555          * header.
6556          */
6557         if ((hdr.network - data) < max_len)
6558                 return hdr.network - data;
6559         else
6560                 return max_len;
6561 }
6562
6563 /**
6564  *  igb_pull_tail - igb specific version of skb_pull_tail
6565  *  @rx_ring: rx descriptor ring packet is being transacted on
6566  *  @rx_desc: pointer to the EOP Rx descriptor
6567  *  @skb: pointer to current skb being adjusted
6568  *
6569  *  This function is an igb specific version of __pskb_pull_tail.  The
6570  *  main difference between this version and the original function is that
6571  *  this function can make several assumptions about the state of things
6572  *  that allow for significant optimizations versus the standard function.
6573  *  As a result we can do things like drop a frag and maintain an accurate
6574  *  truesize for the skb.
6575  */
6576 static void igb_pull_tail(struct igb_ring *rx_ring,
6577                           union e1000_adv_rx_desc *rx_desc,
6578                           struct sk_buff *skb)
6579 {
6580         struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
6581         unsigned char *va;
6582         unsigned int pull_len;
6583
6584         /* it is valid to use page_address instead of kmap since we are
6585          * working with pages allocated out of the lomem pool per
6586          * alloc_page(GFP_ATOMIC)
6587          */
6588         va = skb_frag_address(frag);
6589
6590         if (igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP)) {
6591                 /* retrieve timestamp from buffer */
6592                 igb_ptp_rx_pktstamp(rx_ring->q_vector, va, skb);
6593
6594                 /* update pointers to remove timestamp header */
6595                 skb_frag_size_sub(frag, IGB_TS_HDR_LEN);
6596                 frag->page_offset += IGB_TS_HDR_LEN;
6597                 skb->data_len -= IGB_TS_HDR_LEN;
6598                 skb->len -= IGB_TS_HDR_LEN;
6599
6600                 /* move va to start of packet data */
6601                 va += IGB_TS_HDR_LEN;
6602         }
6603
6604         /* we need the header to contain the greater of either ETH_HLEN or
6605          * 60 bytes if the skb->len is less than 60 for skb_pad.
6606          */
6607         pull_len = igb_get_headlen(va, IGB_RX_HDR_LEN);
6608
6609         /* align pull length to size of long to optimize memcpy performance */
6610         skb_copy_to_linear_data(skb, va, ALIGN(pull_len, sizeof(long)));
6611
6612         /* update all of the pointers */
6613         skb_frag_size_sub(frag, pull_len);
6614         frag->page_offset += pull_len;
6615         skb->data_len -= pull_len;
6616         skb->tail += pull_len;
6617 }
6618
6619 /**
6620  *  igb_cleanup_headers - Correct corrupted or empty headers
6621  *  @rx_ring: rx descriptor ring packet is being transacted on
6622  *  @rx_desc: pointer to the EOP Rx descriptor
6623  *  @skb: pointer to current skb being fixed
6624  *
6625  *  Address the case where we are pulling data in on pages only
6626  *  and as such no data is present in the skb header.
6627  *
6628  *  In addition if skb is not at least 60 bytes we need to pad it so that
6629  *  it is large enough to qualify as a valid Ethernet frame.
6630  *
6631  *  Returns true if an error was encountered and skb was freed.
6632  **/
6633 static bool igb_cleanup_headers(struct igb_ring *rx_ring,
6634                                 union e1000_adv_rx_desc *rx_desc,
6635                                 struct sk_buff *skb)
6636 {
6637         if (unlikely((igb_test_staterr(rx_desc,
6638                                        E1000_RXDEXT_ERR_FRAME_ERR_MASK)))) {
6639                 struct net_device *netdev = rx_ring->netdev;
6640                 if (!(netdev->features & NETIF_F_RXALL)) {
6641                         dev_kfree_skb_any(skb);
6642                         return true;
6643                 }
6644         }
6645
6646         /* place header in linear portion of buffer */
6647         if (skb_is_nonlinear(skb))
6648                 igb_pull_tail(rx_ring, rx_desc, skb);
6649
6650         /* if skb_pad returns an error the skb was freed */
6651         if (unlikely(skb->len < 60)) {
6652                 int pad_len = 60 - skb->len;
6653
6654                 if (skb_pad(skb, pad_len))
6655                         return true;
6656                 __skb_put(skb, pad_len);
6657         }
6658
6659         return false;
6660 }
6661
6662 /**
6663  *  igb_process_skb_fields - Populate skb header fields from Rx descriptor
6664  *  @rx_ring: rx descriptor ring packet is being transacted on
6665  *  @rx_desc: pointer to the EOP Rx descriptor
6666  *  @skb: pointer to current skb being populated
6667  *
6668  *  This function checks the ring, descriptor, and packet information in
6669  *  order to populate the hash, checksum, VLAN, timestamp, protocol, and
6670  *  other fields within the skb.
6671  **/
6672 static void igb_process_skb_fields(struct igb_ring *rx_ring,
6673                                    union e1000_adv_rx_desc *rx_desc,
6674                                    struct sk_buff *skb)
6675 {
6676         struct net_device *dev = rx_ring->netdev;
6677
6678         igb_rx_hash(rx_ring, rx_desc, skb);
6679
6680         igb_rx_checksum(rx_ring, rx_desc, skb);
6681
6682         igb_ptp_rx_hwtstamp(rx_ring, rx_desc, skb);
6683
6684         if ((dev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
6685             igb_test_staterr(rx_desc, E1000_RXD_STAT_VP)) {
6686                 u16 vid;
6687                 if (igb_test_staterr(rx_desc, E1000_RXDEXT_STATERR_LB) &&
6688                     test_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP, &rx_ring->flags))
6689                         vid = be16_to_cpu(rx_desc->wb.upper.vlan);
6690                 else
6691                         vid = le16_to_cpu(rx_desc->wb.upper.vlan);
6692
6693                 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
6694         }
6695
6696         skb_record_rx_queue(skb, rx_ring->queue_index);
6697
6698         skb->protocol = eth_type_trans(skb, rx_ring->netdev);
6699 }
6700
6701 static bool igb_clean_rx_irq(struct igb_q_vector *q_vector, const int budget)
6702 {
6703         struct igb_ring *rx_ring = q_vector->rx.ring;
6704         struct sk_buff *skb = rx_ring->skb;
6705         unsigned int total_bytes = 0, total_packets = 0;
6706         u16 cleaned_count = igb_desc_unused(rx_ring);
6707
6708         do {
6709                 union e1000_adv_rx_desc *rx_desc;
6710
6711                 /* return some buffers to hardware, one at a time is too slow */
6712                 if (cleaned_count >= IGB_RX_BUFFER_WRITE) {
6713                         igb_alloc_rx_buffers(rx_ring, cleaned_count);
6714                         cleaned_count = 0;
6715                 }
6716
6717                 rx_desc = IGB_RX_DESC(rx_ring, rx_ring->next_to_clean);
6718
6719                 if (!igb_test_staterr(rx_desc, E1000_RXD_STAT_DD))
6720                         break;
6721
6722                 /* This memory barrier is needed to keep us from reading
6723                  * any other fields out of the rx_desc until we know the
6724                  * RXD_STAT_DD bit is set
6725                  */
6726                 rmb();
6727
6728                 /* retrieve a buffer from the ring */
6729                 skb = igb_fetch_rx_buffer(rx_ring, rx_desc, skb);
6730
6731                 /* exit if we failed to retrieve a buffer */
6732                 if (!skb)
6733                         break;
6734
6735                 cleaned_count++;
6736
6737                 /* fetch next buffer in frame if non-eop */
6738                 if (igb_is_non_eop(rx_ring, rx_desc))
6739                         continue;
6740
6741                 /* verify the packet layout is correct */
6742                 if (igb_cleanup_headers(rx_ring, rx_desc, skb)) {
6743                         skb = NULL;
6744                         continue;
6745                 }
6746
6747                 /* probably a little skewed due to removing CRC */
6748                 total_bytes += skb->len;
6749
6750                 /* populate checksum, timestamp, VLAN, and protocol */
6751                 igb_process_skb_fields(rx_ring, rx_desc, skb);
6752
6753                 napi_gro_receive(&q_vector->napi, skb);
6754
6755                 /* reset skb pointer */
6756                 skb = NULL;
6757
6758                 /* update budget accounting */
6759                 total_packets++;
6760         } while (likely(total_packets < budget));
6761
6762         /* place incomplete frames back on ring for completion */
6763         rx_ring->skb = skb;
6764
6765         u64_stats_update_begin(&rx_ring->rx_syncp);
6766         rx_ring->rx_stats.packets += total_packets;
6767         rx_ring->rx_stats.bytes += total_bytes;
6768         u64_stats_update_end(&rx_ring->rx_syncp);
6769         q_vector->rx.total_packets += total_packets;
6770         q_vector->rx.total_bytes += total_bytes;
6771
6772         if (cleaned_count)
6773                 igb_alloc_rx_buffers(rx_ring, cleaned_count);
6774
6775         return (total_packets < budget);
6776 }
6777
6778 static bool igb_alloc_mapped_page(struct igb_ring *rx_ring,
6779                                   struct igb_rx_buffer *bi)
6780 {
6781         struct page *page = bi->page;
6782         dma_addr_t dma;
6783
6784         /* since we are recycling buffers we should seldom need to alloc */
6785         if (likely(page))
6786                 return true;
6787
6788         /* alloc new page for storage */
6789         page = __skb_alloc_page(GFP_ATOMIC | __GFP_COLD, NULL);
6790         if (unlikely(!page)) {
6791                 rx_ring->rx_stats.alloc_failed++;
6792                 return false;
6793         }
6794
6795         /* map page for use */
6796         dma = dma_map_page(rx_ring->dev, page, 0, PAGE_SIZE, DMA_FROM_DEVICE);
6797
6798         /* if mapping failed free memory back to system since
6799          * there isn't much point in holding memory we can't use
6800          */
6801         if (dma_mapping_error(rx_ring->dev, dma)) {
6802                 __free_page(page);
6803
6804                 rx_ring->rx_stats.alloc_failed++;
6805                 return false;
6806         }
6807
6808         bi->dma = dma;
6809         bi->page = page;
6810         bi->page_offset = 0;
6811
6812         return true;
6813 }
6814
6815 /**
6816  *  igb_alloc_rx_buffers - Replace used receive buffers; packet split
6817  *  @adapter: address of board private structure
6818  **/
6819 void igb_alloc_rx_buffers(struct igb_ring *rx_ring, u16 cleaned_count)
6820 {
6821         union e1000_adv_rx_desc *rx_desc;
6822         struct igb_rx_buffer *bi;
6823         u16 i = rx_ring->next_to_use;
6824
6825         /* nothing to do */
6826         if (!cleaned_count)
6827                 return;
6828
6829         rx_desc = IGB_RX_DESC(rx_ring, i);
6830         bi = &rx_ring->rx_buffer_info[i];
6831         i -= rx_ring->count;
6832
6833         do {
6834                 if (!igb_alloc_mapped_page(rx_ring, bi))
6835                         break;
6836
6837                 /* Refresh the desc even if buffer_addrs didn't change
6838                  * because each write-back erases this info.
6839                  */
6840                 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
6841
6842                 rx_desc++;
6843                 bi++;
6844                 i++;
6845                 if (unlikely(!i)) {
6846                         rx_desc = IGB_RX_DESC(rx_ring, 0);
6847                         bi = rx_ring->rx_buffer_info;
6848                         i -= rx_ring->count;
6849                 }
6850
6851                 /* clear the hdr_addr for the next_to_use descriptor */
6852                 rx_desc->read.hdr_addr = 0;
6853
6854                 cleaned_count--;
6855         } while (cleaned_count);
6856
6857         i += rx_ring->count;
6858
6859         if (rx_ring->next_to_use != i) {
6860                 /* record the next descriptor to use */
6861                 rx_ring->next_to_use = i;
6862
6863                 /* update next to alloc since we have filled the ring */
6864                 rx_ring->next_to_alloc = i;
6865
6866                 /* Force memory writes to complete before letting h/w
6867                  * know there are new descriptors to fetch.  (Only
6868                  * applicable for weak-ordered memory model archs,
6869                  * such as IA-64).
6870                  */
6871                 wmb();
6872                 writel(i, rx_ring->tail);
6873         }
6874 }
6875
6876 /**
6877  * igb_mii_ioctl -
6878  * @netdev:
6879  * @ifreq:
6880  * @cmd:
6881  **/
6882 static int igb_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
6883 {
6884         struct igb_adapter *adapter = netdev_priv(netdev);
6885         struct mii_ioctl_data *data = if_mii(ifr);
6886
6887         if (adapter->hw.phy.media_type != e1000_media_type_copper)
6888                 return -EOPNOTSUPP;
6889
6890         switch (cmd) {
6891         case SIOCGMIIPHY:
6892                 data->phy_id = adapter->hw.phy.addr;
6893                 break;
6894         case SIOCGMIIREG:
6895                 if (igb_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
6896                                      &data->val_out))
6897                         return -EIO;
6898                 break;
6899         case SIOCSMIIREG:
6900         default:
6901                 return -EOPNOTSUPP;
6902         }
6903         return 0;
6904 }
6905
6906 /**
6907  * igb_ioctl -
6908  * @netdev:
6909  * @ifreq:
6910  * @cmd:
6911  **/
6912 static int igb_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
6913 {
6914         switch (cmd) {
6915         case SIOCGMIIPHY:
6916         case SIOCGMIIREG:
6917         case SIOCSMIIREG:
6918                 return igb_mii_ioctl(netdev, ifr, cmd);
6919         case SIOCSHWTSTAMP:
6920                 return igb_ptp_hwtstamp_ioctl(netdev, ifr, cmd);
6921         default:
6922                 return -EOPNOTSUPP;
6923         }
6924 }
6925
6926 s32 igb_read_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
6927 {
6928         struct igb_adapter *adapter = hw->back;
6929
6930         if (pcie_capability_read_word(adapter->pdev, reg, value))
6931                 return -E1000_ERR_CONFIG;
6932
6933         return 0;
6934 }
6935
6936 s32 igb_write_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
6937 {
6938         struct igb_adapter *adapter = hw->back;
6939
6940         if (pcie_capability_write_word(adapter->pdev, reg, *value))
6941                 return -E1000_ERR_CONFIG;
6942
6943         return 0;
6944 }
6945
6946 static void igb_vlan_mode(struct net_device *netdev, netdev_features_t features)
6947 {
6948         struct igb_adapter *adapter = netdev_priv(netdev);
6949         struct e1000_hw *hw = &adapter->hw;
6950         u32 ctrl, rctl;
6951         bool enable = !!(features & NETIF_F_HW_VLAN_CTAG_RX);
6952
6953         if (enable) {
6954                 /* enable VLAN tag insert/strip */
6955                 ctrl = rd32(E1000_CTRL);
6956                 ctrl |= E1000_CTRL_VME;
6957                 wr32(E1000_CTRL, ctrl);
6958
6959                 /* Disable CFI check */
6960                 rctl = rd32(E1000_RCTL);
6961                 rctl &= ~E1000_RCTL_CFIEN;
6962                 wr32(E1000_RCTL, rctl);
6963         } else {
6964                 /* disable VLAN tag insert/strip */
6965                 ctrl = rd32(E1000_CTRL);
6966                 ctrl &= ~E1000_CTRL_VME;
6967                 wr32(E1000_CTRL, ctrl);
6968         }
6969
6970         igb_rlpml_set(adapter);
6971 }
6972
6973 static int igb_vlan_rx_add_vid(struct net_device *netdev,
6974                                __be16 proto, u16 vid)
6975 {
6976         struct igb_adapter *adapter = netdev_priv(netdev);
6977         struct e1000_hw *hw = &adapter->hw;
6978         int pf_id = adapter->vfs_allocated_count;
6979
6980         /* attempt to add filter to vlvf array */
6981         igb_vlvf_set(adapter, vid, true, pf_id);
6982
6983         /* add the filter since PF can receive vlans w/o entry in vlvf */
6984         igb_vfta_set(hw, vid, true);
6985
6986         set_bit(vid, adapter->active_vlans);
6987
6988         return 0;
6989 }
6990
6991 static int igb_vlan_rx_kill_vid(struct net_device *netdev,
6992                                 __be16 proto, u16 vid)
6993 {
6994         struct igb_adapter *adapter = netdev_priv(netdev);
6995         struct e1000_hw *hw = &adapter->hw;
6996         int pf_id = adapter->vfs_allocated_count;
6997         s32 err;
6998
6999         /* remove vlan from VLVF table array */
7000         err = igb_vlvf_set(adapter, vid, false, pf_id);
7001
7002         /* if vid was not present in VLVF just remove it from table */
7003         if (err)
7004                 igb_vfta_set(hw, vid, false);
7005
7006         clear_bit(vid, adapter->active_vlans);
7007
7008         return 0;
7009 }
7010
7011 static void igb_restore_vlan(struct igb_adapter *adapter)
7012 {
7013         u16 vid;
7014
7015         igb_vlan_mode(adapter->netdev, adapter->netdev->features);
7016
7017         for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
7018                 igb_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);
7019 }
7020
7021 int igb_set_spd_dplx(struct igb_adapter *adapter, u32 spd, u8 dplx)
7022 {
7023         struct pci_dev *pdev = adapter->pdev;
7024         struct e1000_mac_info *mac = &adapter->hw.mac;
7025
7026         mac->autoneg = 0;
7027
7028         /* Make sure dplx is at most 1 bit and lsb of speed is not set
7029          * for the switch() below to work
7030          */
7031         if ((spd & 1) || (dplx & ~1))
7032                 goto err_inval;
7033
7034         /* Fiber NIC's only allow 1000 gbps Full duplex
7035          * and 100Mbps Full duplex for 100baseFx sfp
7036          */
7037         if (adapter->hw.phy.media_type == e1000_media_type_internal_serdes) {
7038                 switch (spd + dplx) {
7039                 case SPEED_10 + DUPLEX_HALF:
7040                 case SPEED_10 + DUPLEX_FULL:
7041                 case SPEED_100 + DUPLEX_HALF:
7042                         goto err_inval;
7043                 default:
7044                         break;
7045                 }
7046         }
7047
7048         switch (spd + dplx) {
7049         case SPEED_10 + DUPLEX_HALF:
7050                 mac->forced_speed_duplex = ADVERTISE_10_HALF;
7051                 break;
7052         case SPEED_10 + DUPLEX_FULL:
7053                 mac->forced_speed_duplex = ADVERTISE_10_FULL;
7054                 break;
7055         case SPEED_100 + DUPLEX_HALF:
7056                 mac->forced_speed_duplex = ADVERTISE_100_HALF;
7057                 break;
7058         case SPEED_100 + DUPLEX_FULL:
7059                 mac->forced_speed_duplex = ADVERTISE_100_FULL;
7060                 break;
7061         case SPEED_1000 + DUPLEX_FULL:
7062                 mac->autoneg = 1;
7063                 adapter->hw.phy.autoneg_advertised = ADVERTISE_1000_FULL;
7064                 break;
7065         case SPEED_1000 + DUPLEX_HALF: /* not supported */
7066         default:
7067                 goto err_inval;
7068         }
7069
7070         /* clear MDI, MDI(-X) override is only allowed when autoneg enabled */
7071         adapter->hw.phy.mdix = AUTO_ALL_MODES;
7072
7073         return 0;
7074
7075 err_inval:
7076         dev_err(&pdev->dev, "Unsupported Speed/Duplex configuration\n");
7077         return -EINVAL;
7078 }
7079
7080 static int __igb_shutdown(struct pci_dev *pdev, bool *enable_wake,
7081                           bool runtime)
7082 {
7083         struct net_device *netdev = pci_get_drvdata(pdev);
7084         struct igb_adapter *adapter = netdev_priv(netdev);
7085         struct e1000_hw *hw = &adapter->hw;
7086         u32 ctrl, rctl, status;
7087         u32 wufc = runtime ? E1000_WUFC_LNKC : adapter->wol;
7088 #ifdef CONFIG_PM
7089         int retval = 0;
7090 #endif
7091
7092         netif_device_detach(netdev);
7093
7094         if (netif_running(netdev))
7095                 __igb_close(netdev, true);
7096
7097         igb_clear_interrupt_scheme(adapter);
7098
7099 #ifdef CONFIG_PM
7100         retval = pci_save_state(pdev);
7101         if (retval)
7102                 return retval;
7103 #endif
7104
7105         status = rd32(E1000_STATUS);
7106         if (status & E1000_STATUS_LU)
7107                 wufc &= ~E1000_WUFC_LNKC;
7108
7109         if (wufc) {
7110                 igb_setup_rctl(adapter);
7111                 igb_set_rx_mode(netdev);
7112
7113                 /* turn on all-multi mode if wake on multicast is enabled */
7114                 if (wufc & E1000_WUFC_MC) {
7115                         rctl = rd32(E1000_RCTL);
7116                         rctl |= E1000_RCTL_MPE;
7117                         wr32(E1000_RCTL, rctl);
7118                 }
7119
7120                 ctrl = rd32(E1000_CTRL);
7121                 /* advertise wake from D3Cold */
7122                 #define E1000_CTRL_ADVD3WUC 0x00100000
7123                 /* phy power management enable */
7124                 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
7125                 ctrl |= E1000_CTRL_ADVD3WUC;
7126                 wr32(E1000_CTRL, ctrl);
7127
7128                 /* Allow time for pending master requests to run */
7129                 igb_disable_pcie_master(hw);
7130
7131                 wr32(E1000_WUC, E1000_WUC_PME_EN);
7132                 wr32(E1000_WUFC, wufc);
7133         } else {
7134                 wr32(E1000_WUC, 0);
7135                 wr32(E1000_WUFC, 0);
7136         }
7137
7138         *enable_wake = wufc || adapter->en_mng_pt;
7139         if (!*enable_wake)
7140                 igb_power_down_link(adapter);
7141         else
7142                 igb_power_up_link(adapter);
7143
7144         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
7145          * would have already happened in close and is redundant.
7146          */
7147         igb_release_hw_control(adapter);
7148
7149         pci_disable_device(pdev);
7150
7151         return 0;
7152 }
7153
7154 #ifdef CONFIG_PM
7155 #ifdef CONFIG_PM_SLEEP
7156 static int igb_suspend(struct device *dev)
7157 {
7158         int retval;
7159         bool wake;
7160         struct pci_dev *pdev = to_pci_dev(dev);
7161
7162         retval = __igb_shutdown(pdev, &wake, 0);
7163         if (retval)
7164                 return retval;
7165
7166         if (wake) {
7167                 pci_prepare_to_sleep(pdev);
7168         } else {
7169                 pci_wake_from_d3(pdev, false);
7170                 pci_set_power_state(pdev, PCI_D3hot);
7171         }
7172
7173         return 0;
7174 }
7175 #endif /* CONFIG_PM_SLEEP */
7176
7177 static int igb_resume(struct device *dev)
7178 {
7179         struct pci_dev *pdev = to_pci_dev(dev);
7180         struct net_device *netdev = pci_get_drvdata(pdev);
7181         struct igb_adapter *adapter = netdev_priv(netdev);
7182         struct e1000_hw *hw = &adapter->hw;
7183         u32 err;
7184
7185         pci_set_power_state(pdev, PCI_D0);
7186         pci_restore_state(pdev);
7187         pci_save_state(pdev);
7188
7189         err = pci_enable_device_mem(pdev);
7190         if (err) {
7191                 dev_err(&pdev->dev,
7192                         "igb: Cannot enable PCI device from suspend\n");
7193                 return err;
7194         }
7195         pci_set_master(pdev);
7196
7197         pci_enable_wake(pdev, PCI_D3hot, 0);
7198         pci_enable_wake(pdev, PCI_D3cold, 0);
7199
7200         if (igb_init_interrupt_scheme(adapter, true)) {
7201                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
7202                 return -ENOMEM;
7203         }
7204
7205         igb_reset(adapter);
7206
7207         /* let the f/w know that the h/w is now under the control of the
7208          * driver.
7209          */
7210         igb_get_hw_control(adapter);
7211
7212         wr32(E1000_WUS, ~0);
7213
7214         if (netdev->flags & IFF_UP) {
7215                 rtnl_lock();
7216                 err = __igb_open(netdev, true);
7217                 rtnl_unlock();
7218                 if (err)
7219                         return err;
7220         }
7221
7222         netif_device_attach(netdev);
7223         return 0;
7224 }
7225
7226 #ifdef CONFIG_PM_RUNTIME
7227 static int igb_runtime_idle(struct device *dev)
7228 {
7229         struct pci_dev *pdev = to_pci_dev(dev);
7230         struct net_device *netdev = pci_get_drvdata(pdev);
7231         struct igb_adapter *adapter = netdev_priv(netdev);
7232
7233         if (!igb_has_link(adapter))
7234                 pm_schedule_suspend(dev, MSEC_PER_SEC * 5);
7235
7236         return -EBUSY;
7237 }
7238
7239 static int igb_runtime_suspend(struct device *dev)
7240 {
7241         struct pci_dev *pdev = to_pci_dev(dev);
7242         int retval;
7243         bool wake;
7244
7245         retval = __igb_shutdown(pdev, &wake, 1);
7246         if (retval)
7247                 return retval;
7248
7249         if (wake) {
7250                 pci_prepare_to_sleep(pdev);
7251         } else {
7252                 pci_wake_from_d3(pdev, false);
7253                 pci_set_power_state(pdev, PCI_D3hot);
7254         }
7255
7256         return 0;
7257 }
7258
7259 static int igb_runtime_resume(struct device *dev)
7260 {
7261         return igb_resume(dev);
7262 }
7263 #endif /* CONFIG_PM_RUNTIME */
7264 #endif
7265
7266 static void igb_shutdown(struct pci_dev *pdev)
7267 {
7268         bool wake;
7269
7270         __igb_shutdown(pdev, &wake, 0);
7271
7272         if (system_state == SYSTEM_POWER_OFF) {
7273                 pci_wake_from_d3(pdev, wake);
7274                 pci_set_power_state(pdev, PCI_D3hot);
7275         }
7276 }
7277
7278 #ifdef CONFIG_PCI_IOV
7279 static int igb_sriov_reinit(struct pci_dev *dev)
7280 {
7281         struct net_device *netdev = pci_get_drvdata(dev);
7282         struct igb_adapter *adapter = netdev_priv(netdev);
7283         struct pci_dev *pdev = adapter->pdev;
7284
7285         rtnl_lock();
7286
7287         if (netif_running(netdev))
7288                 igb_close(netdev);
7289
7290         igb_clear_interrupt_scheme(adapter);
7291
7292         igb_init_queue_configuration(adapter);
7293
7294         if (igb_init_interrupt_scheme(adapter, true)) {
7295                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
7296                 return -ENOMEM;
7297         }
7298
7299         if (netif_running(netdev))
7300                 igb_open(netdev);
7301
7302         rtnl_unlock();
7303
7304         return 0;
7305 }
7306
7307 static int igb_pci_disable_sriov(struct pci_dev *dev)
7308 {
7309         int err = igb_disable_sriov(dev);
7310
7311         if (!err)
7312                 err = igb_sriov_reinit(dev);
7313
7314         return err;
7315 }
7316
7317 static int igb_pci_enable_sriov(struct pci_dev *dev, int num_vfs)
7318 {
7319         int err = igb_enable_sriov(dev, num_vfs);
7320
7321         if (err)
7322                 goto out;
7323
7324         err = igb_sriov_reinit(dev);
7325         if (!err)
7326                 return num_vfs;
7327
7328 out:
7329         return err;
7330 }
7331
7332 #endif
7333 static int igb_pci_sriov_configure(struct pci_dev *dev, int num_vfs)
7334 {
7335 #ifdef CONFIG_PCI_IOV
7336         if (num_vfs == 0)
7337                 return igb_pci_disable_sriov(dev);
7338         else
7339                 return igb_pci_enable_sriov(dev, num_vfs);
7340 #endif
7341         return 0;
7342 }
7343
7344 #ifdef CONFIG_NET_POLL_CONTROLLER
7345 /* Polling 'interrupt' - used by things like netconsole to send skbs
7346  * without having to re-enable interrupts. It's not called while
7347  * the interrupt routine is executing.
7348  */
7349 static void igb_netpoll(struct net_device *netdev)
7350 {
7351         struct igb_adapter *adapter = netdev_priv(netdev);
7352         struct e1000_hw *hw = &adapter->hw;
7353         struct igb_q_vector *q_vector;
7354         int i;
7355
7356         for (i = 0; i < adapter->num_q_vectors; i++) {
7357                 q_vector = adapter->q_vector[i];
7358                 if (adapter->msix_entries)
7359                         wr32(E1000_EIMC, q_vector->eims_value);
7360                 else
7361                         igb_irq_disable(adapter);
7362                 napi_schedule(&q_vector->napi);
7363         }
7364 }
7365 #endif /* CONFIG_NET_POLL_CONTROLLER */
7366
7367 /**
7368  *  igb_io_error_detected - called when PCI error is detected
7369  *  @pdev: Pointer to PCI device
7370  *  @state: The current pci connection state
7371  *
7372  *  This function is called after a PCI bus error affecting
7373  *  this device has been detected.
7374  **/
7375 static pci_ers_result_t igb_io_error_detected(struct pci_dev *pdev,
7376                                               pci_channel_state_t state)
7377 {
7378         struct net_device *netdev = pci_get_drvdata(pdev);
7379         struct igb_adapter *adapter = netdev_priv(netdev);
7380
7381         netif_device_detach(netdev);
7382
7383         if (state == pci_channel_io_perm_failure)
7384                 return PCI_ERS_RESULT_DISCONNECT;
7385
7386         if (netif_running(netdev))
7387                 igb_down(adapter);
7388         pci_disable_device(pdev);
7389
7390         /* Request a slot slot reset. */
7391         return PCI_ERS_RESULT_NEED_RESET;
7392 }
7393
7394 /**
7395  *  igb_io_slot_reset - called after the pci bus has been reset.
7396  *  @pdev: Pointer to PCI device
7397  *
7398  *  Restart the card from scratch, as if from a cold-boot. Implementation
7399  *  resembles the first-half of the igb_resume routine.
7400  **/
7401 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *pdev)
7402 {
7403         struct net_device *netdev = pci_get_drvdata(pdev);
7404         struct igb_adapter *adapter = netdev_priv(netdev);
7405         struct e1000_hw *hw = &adapter->hw;
7406         pci_ers_result_t result;
7407         int err;
7408
7409         if (pci_enable_device_mem(pdev)) {
7410                 dev_err(&pdev->dev,
7411                         "Cannot re-enable PCI device after reset.\n");
7412                 result = PCI_ERS_RESULT_DISCONNECT;
7413         } else {
7414                 pci_set_master(pdev);
7415                 pci_restore_state(pdev);
7416                 pci_save_state(pdev);
7417
7418                 pci_enable_wake(pdev, PCI_D3hot, 0);
7419                 pci_enable_wake(pdev, PCI_D3cold, 0);
7420
7421                 igb_reset(adapter);
7422                 wr32(E1000_WUS, ~0);
7423                 result = PCI_ERS_RESULT_RECOVERED;
7424         }
7425
7426         err = pci_cleanup_aer_uncorrect_error_status(pdev);
7427         if (err) {
7428                 dev_err(&pdev->dev,
7429                         "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n",
7430                         err);
7431                 /* non-fatal, continue */
7432         }
7433
7434         return result;
7435 }
7436
7437 /**
7438  *  igb_io_resume - called when traffic can start flowing again.
7439  *  @pdev: Pointer to PCI device
7440  *
7441  *  This callback is called when the error recovery driver tells us that
7442  *  its OK to resume normal operation. Implementation resembles the
7443  *  second-half of the igb_resume routine.
7444  */
7445 static void igb_io_resume(struct pci_dev *pdev)
7446 {
7447         struct net_device *netdev = pci_get_drvdata(pdev);
7448         struct igb_adapter *adapter = netdev_priv(netdev);
7449
7450         if (netif_running(netdev)) {
7451                 if (igb_up(adapter)) {
7452                         dev_err(&pdev->dev, "igb_up failed after reset\n");
7453                         return;
7454                 }
7455         }
7456
7457         netif_device_attach(netdev);
7458
7459         /* let the f/w know that the h/w is now under the control of the
7460          * driver.
7461          */
7462         igb_get_hw_control(adapter);
7463 }
7464
7465 static void igb_rar_set_qsel(struct igb_adapter *adapter, u8 *addr, u32 index,
7466                              u8 qsel)
7467 {
7468         u32 rar_low, rar_high;
7469         struct e1000_hw *hw = &adapter->hw;
7470
7471         /* HW expects these in little endian so we reverse the byte order
7472          * from network order (big endian) to little endian
7473          */
7474         rar_low = ((u32) addr[0] | ((u32) addr[1] << 8) |
7475                    ((u32) addr[2] << 16) | ((u32) addr[3] << 24));
7476         rar_high = ((u32) addr[4] | ((u32) addr[5] << 8));
7477
7478         /* Indicate to hardware the Address is Valid. */
7479         rar_high |= E1000_RAH_AV;
7480
7481         if (hw->mac.type == e1000_82575)
7482                 rar_high |= E1000_RAH_POOL_1 * qsel;
7483         else
7484                 rar_high |= E1000_RAH_POOL_1 << qsel;
7485
7486         wr32(E1000_RAL(index), rar_low);
7487         wrfl();
7488         wr32(E1000_RAH(index), rar_high);
7489         wrfl();
7490 }
7491
7492 static int igb_set_vf_mac(struct igb_adapter *adapter,
7493                           int vf, unsigned char *mac_addr)
7494 {
7495         struct e1000_hw *hw = &adapter->hw;
7496         /* VF MAC addresses start at end of receive addresses and moves
7497          * towards the first, as a result a collision should not be possible
7498          */
7499         int rar_entry = hw->mac.rar_entry_count - (vf + 1);
7500
7501         memcpy(adapter->vf_data[vf].vf_mac_addresses, mac_addr, ETH_ALEN);
7502
7503         igb_rar_set_qsel(adapter, mac_addr, rar_entry, vf);
7504
7505         return 0;
7506 }
7507
7508 static int igb_ndo_set_vf_mac(struct net_device *netdev, int vf, u8 *mac)
7509 {
7510         struct igb_adapter *adapter = netdev_priv(netdev);
7511         if (!is_valid_ether_addr(mac) || (vf >= adapter->vfs_allocated_count))
7512                 return -EINVAL;
7513         adapter->vf_data[vf].flags |= IGB_VF_FLAG_PF_SET_MAC;
7514         dev_info(&adapter->pdev->dev, "setting MAC %pM on VF %d\n", mac, vf);
7515         dev_info(&adapter->pdev->dev,
7516                  "Reload the VF driver to make this change effective.");
7517         if (test_bit(__IGB_DOWN, &adapter->state)) {
7518                 dev_warn(&adapter->pdev->dev,
7519                          "The VF MAC address has been set, but the PF device is not up.\n");
7520                 dev_warn(&adapter->pdev->dev,
7521                          "Bring the PF device up before attempting to use the VF device.\n");
7522         }
7523         return igb_set_vf_mac(adapter, vf, mac);
7524 }
7525
7526 static int igb_link_mbps(int internal_link_speed)
7527 {
7528         switch (internal_link_speed) {
7529         case SPEED_100:
7530                 return 100;
7531         case SPEED_1000:
7532                 return 1000;
7533         default:
7534                 return 0;
7535         }
7536 }
7537
7538 static void igb_set_vf_rate_limit(struct e1000_hw *hw, int vf, int tx_rate,
7539                                   int link_speed)
7540 {
7541         int rf_dec, rf_int;
7542         u32 bcnrc_val;
7543
7544         if (tx_rate != 0) {
7545                 /* Calculate the rate factor values to set */
7546                 rf_int = link_speed / tx_rate;
7547                 rf_dec = (link_speed - (rf_int * tx_rate));
7548                 rf_dec = (rf_dec * (1 << E1000_RTTBCNRC_RF_INT_SHIFT)) /
7549                          tx_rate;
7550
7551                 bcnrc_val = E1000_RTTBCNRC_RS_ENA;
7552                 bcnrc_val |= ((rf_int << E1000_RTTBCNRC_RF_INT_SHIFT) &
7553                               E1000_RTTBCNRC_RF_INT_MASK);
7554                 bcnrc_val |= (rf_dec & E1000_RTTBCNRC_RF_DEC_MASK);
7555         } else {
7556                 bcnrc_val = 0;
7557         }
7558
7559         wr32(E1000_RTTDQSEL, vf); /* vf X uses queue X */
7560         /* Set global transmit compensation time to the MMW_SIZE in RTTBCNRM
7561          * register. MMW_SIZE=0x014 if 9728-byte jumbo is supported.
7562          */
7563         wr32(E1000_RTTBCNRM, 0x14);
7564         wr32(E1000_RTTBCNRC, bcnrc_val);
7565 }
7566
7567 static void igb_check_vf_rate_limit(struct igb_adapter *adapter)
7568 {
7569         int actual_link_speed, i;
7570         bool reset_rate = false;
7571
7572         /* VF TX rate limit was not set or not supported */
7573         if ((adapter->vf_rate_link_speed == 0) ||
7574             (adapter->hw.mac.type != e1000_82576))
7575                 return;
7576
7577         actual_link_speed = igb_link_mbps(adapter->link_speed);
7578         if (actual_link_speed != adapter->vf_rate_link_speed) {
7579                 reset_rate = true;
7580                 adapter->vf_rate_link_speed = 0;
7581                 dev_info(&adapter->pdev->dev,
7582                          "Link speed has been changed. VF Transmit rate is disabled\n");
7583         }
7584
7585         for (i = 0; i < adapter->vfs_allocated_count; i++) {
7586                 if (reset_rate)
7587                         adapter->vf_data[i].tx_rate = 0;
7588
7589                 igb_set_vf_rate_limit(&adapter->hw, i,
7590                                       adapter->vf_data[i].tx_rate,
7591                                       actual_link_speed);
7592         }
7593 }
7594
7595 static int igb_ndo_set_vf_bw(struct net_device *netdev, int vf, int tx_rate)
7596 {
7597         struct igb_adapter *adapter = netdev_priv(netdev);
7598         struct e1000_hw *hw = &adapter->hw;
7599         int actual_link_speed;
7600
7601         if (hw->mac.type != e1000_82576)
7602                 return -EOPNOTSUPP;
7603
7604         actual_link_speed = igb_link_mbps(adapter->link_speed);
7605         if ((vf >= adapter->vfs_allocated_count) ||
7606             (!(rd32(E1000_STATUS) & E1000_STATUS_LU)) ||
7607             (tx_rate < 0) || (tx_rate > actual_link_speed))
7608                 return -EINVAL;
7609
7610         adapter->vf_rate_link_speed = actual_link_speed;
7611         adapter->vf_data[vf].tx_rate = (u16)tx_rate;
7612         igb_set_vf_rate_limit(hw, vf, tx_rate, actual_link_speed);
7613
7614         return 0;
7615 }
7616
7617 static int igb_ndo_set_vf_spoofchk(struct net_device *netdev, int vf,
7618                                    bool setting)
7619 {
7620         struct igb_adapter *adapter = netdev_priv(netdev);
7621         struct e1000_hw *hw = &adapter->hw;
7622         u32 reg_val, reg_offset;
7623
7624         if (!adapter->vfs_allocated_count)
7625                 return -EOPNOTSUPP;
7626
7627         if (vf >= adapter->vfs_allocated_count)
7628                 return -EINVAL;
7629
7630         reg_offset = (hw->mac.type == e1000_82576) ? E1000_DTXSWC : E1000_TXSWC;
7631         reg_val = rd32(reg_offset);
7632         if (setting)
7633                 reg_val |= ((1 << vf) |
7634                             (1 << (vf + E1000_DTXSWC_VLAN_SPOOF_SHIFT)));
7635         else
7636                 reg_val &= ~((1 << vf) |
7637                              (1 << (vf + E1000_DTXSWC_VLAN_SPOOF_SHIFT)));
7638         wr32(reg_offset, reg_val);
7639
7640         adapter->vf_data[vf].spoofchk_enabled = setting;
7641         return E1000_SUCCESS;
7642 }
7643
7644 static int igb_ndo_get_vf_config(struct net_device *netdev,
7645                                  int vf, struct ifla_vf_info *ivi)
7646 {
7647         struct igb_adapter *adapter = netdev_priv(netdev);
7648         if (vf >= adapter->vfs_allocated_count)
7649                 return -EINVAL;
7650         ivi->vf = vf;
7651         memcpy(&ivi->mac, adapter->vf_data[vf].vf_mac_addresses, ETH_ALEN);
7652         ivi->tx_rate = adapter->vf_data[vf].tx_rate;
7653         ivi->vlan = adapter->vf_data[vf].pf_vlan;
7654         ivi->qos = adapter->vf_data[vf].pf_qos;
7655         ivi->spoofchk = adapter->vf_data[vf].spoofchk_enabled;
7656         return 0;
7657 }
7658
7659 static void igb_vmm_control(struct igb_adapter *adapter)
7660 {
7661         struct e1000_hw *hw = &adapter->hw;
7662         u32 reg;
7663
7664         switch (hw->mac.type) {
7665         case e1000_82575:
7666         case e1000_i210:
7667         case e1000_i211:
7668         case e1000_i354:
7669         default:
7670                 /* replication is not supported for 82575 */
7671                 return;
7672         case e1000_82576:
7673                 /* notify HW that the MAC is adding vlan tags */
7674                 reg = rd32(E1000_DTXCTL);
7675                 reg |= E1000_DTXCTL_VLAN_ADDED;
7676                 wr32(E1000_DTXCTL, reg);
7677         case e1000_82580:
7678                 /* enable replication vlan tag stripping */
7679                 reg = rd32(E1000_RPLOLR);
7680                 reg |= E1000_RPLOLR_STRVLAN;
7681                 wr32(E1000_RPLOLR, reg);
7682         case e1000_i350:
7683                 /* none of the above registers are supported by i350 */
7684                 break;
7685         }
7686
7687         if (adapter->vfs_allocated_count) {
7688                 igb_vmdq_set_loopback_pf(hw, true);
7689                 igb_vmdq_set_replication_pf(hw, true);
7690                 igb_vmdq_set_anti_spoofing_pf(hw, true,
7691                                               adapter->vfs_allocated_count);
7692         } else {
7693                 igb_vmdq_set_loopback_pf(hw, false);
7694                 igb_vmdq_set_replication_pf(hw, false);
7695         }
7696 }
7697
7698 static void igb_init_dmac(struct igb_adapter *adapter, u32 pba)
7699 {
7700         struct e1000_hw *hw = &adapter->hw;
7701         u32 dmac_thr;
7702         u16 hwm;
7703
7704         if (hw->mac.type > e1000_82580) {
7705                 if (adapter->flags & IGB_FLAG_DMAC) {
7706                         u32 reg;
7707
7708                         /* force threshold to 0. */
7709                         wr32(E1000_DMCTXTH, 0);
7710
7711                         /* DMA Coalescing high water mark needs to be greater
7712                          * than the Rx threshold. Set hwm to PBA - max frame
7713                          * size in 16B units, capping it at PBA - 6KB.
7714                          */
7715                         hwm = 64 * pba - adapter->max_frame_size / 16;
7716                         if (hwm < 64 * (pba - 6))
7717                                 hwm = 64 * (pba - 6);
7718                         reg = rd32(E1000_FCRTC);
7719                         reg &= ~E1000_FCRTC_RTH_COAL_MASK;
7720                         reg |= ((hwm << E1000_FCRTC_RTH_COAL_SHIFT)
7721                                 & E1000_FCRTC_RTH_COAL_MASK);
7722                         wr32(E1000_FCRTC, reg);
7723
7724                         /* Set the DMA Coalescing Rx threshold to PBA - 2 * max
7725                          * frame size, capping it at PBA - 10KB.
7726                          */
7727                         dmac_thr = pba - adapter->max_frame_size / 512;
7728                         if (dmac_thr < pba - 10)
7729                                 dmac_thr = pba - 10;
7730                         reg = rd32(E1000_DMACR);
7731                         reg &= ~E1000_DMACR_DMACTHR_MASK;
7732                         reg |= ((dmac_thr << E1000_DMACR_DMACTHR_SHIFT)
7733                                 & E1000_DMACR_DMACTHR_MASK);
7734
7735                         /* transition to L0x or L1 if available..*/
7736                         reg |= (E1000_DMACR_DMAC_EN | E1000_DMACR_DMAC_LX_MASK);
7737
7738                         /* watchdog timer= +-1000 usec in 32usec intervals */
7739                         reg |= (1000 >> 5);
7740
7741                         /* Disable BMC-to-OS Watchdog Enable */
7742                         if (hw->mac.type != e1000_i354)
7743                                 reg &= ~E1000_DMACR_DC_BMC2OSW_EN;
7744
7745                         wr32(E1000_DMACR, reg);
7746
7747                         /* no lower threshold to disable
7748                          * coalescing(smart fifb)-UTRESH=0
7749                          */
7750                         wr32(E1000_DMCRTRH, 0);
7751
7752                         reg = (IGB_DMCTLX_DCFLUSH_DIS | 0x4);
7753
7754                         wr32(E1000_DMCTLX, reg);
7755
7756                         /* free space in tx packet buffer to wake from
7757                          * DMA coal
7758                          */
7759                         wr32(E1000_DMCTXTH, (IGB_MIN_TXPBSIZE -
7760                              (IGB_TX_BUF_4096 + adapter->max_frame_size)) >> 6);
7761
7762                         /* make low power state decision controlled
7763                          * by DMA coal
7764                          */
7765                         reg = rd32(E1000_PCIEMISC);
7766                         reg &= ~E1000_PCIEMISC_LX_DECISION;
7767                         wr32(E1000_PCIEMISC, reg);
7768                 } /* endif adapter->dmac is not disabled */
7769         } else if (hw->mac.type == e1000_82580) {
7770                 u32 reg = rd32(E1000_PCIEMISC);
7771                 wr32(E1000_PCIEMISC, reg & ~E1000_PCIEMISC_LX_DECISION);
7772                 wr32(E1000_DMACR, 0);
7773         }
7774 }
7775
7776 /**
7777  *  igb_read_i2c_byte - Reads 8 bit word over I2C
7778  *  @hw: pointer to hardware structure
7779  *  @byte_offset: byte offset to read
7780  *  @dev_addr: device address
7781  *  @data: value read
7782  *
7783  *  Performs byte read operation over I2C interface at
7784  *  a specified device address.
7785  **/
7786 s32 igb_read_i2c_byte(struct e1000_hw *hw, u8 byte_offset,
7787                       u8 dev_addr, u8 *data)
7788 {
7789         struct igb_adapter *adapter = container_of(hw, struct igb_adapter, hw);
7790         struct i2c_client *this_client = adapter->i2c_client;
7791         s32 status;
7792         u16 swfw_mask = 0;
7793
7794         if (!this_client)
7795                 return E1000_ERR_I2C;
7796
7797         swfw_mask = E1000_SWFW_PHY0_SM;
7798
7799         if (hw->mac.ops.acquire_swfw_sync(hw, swfw_mask)
7800             != E1000_SUCCESS)
7801                 return E1000_ERR_SWFW_SYNC;
7802
7803         status = i2c_smbus_read_byte_data(this_client, byte_offset);
7804         hw->mac.ops.release_swfw_sync(hw, swfw_mask);
7805
7806         if (status < 0)
7807                 return E1000_ERR_I2C;
7808         else {
7809                 *data = status;
7810                 return E1000_SUCCESS;
7811         }
7812 }
7813
7814 /**
7815  *  igb_write_i2c_byte - Writes 8 bit word over I2C
7816  *  @hw: pointer to hardware structure
7817  *  @byte_offset: byte offset to write
7818  *  @dev_addr: device address
7819  *  @data: value to write
7820  *
7821  *  Performs byte write operation over I2C interface at
7822  *  a specified device address.
7823  **/
7824 s32 igb_write_i2c_byte(struct e1000_hw *hw, u8 byte_offset,
7825                        u8 dev_addr, u8 data)
7826 {
7827         struct igb_adapter *adapter = container_of(hw, struct igb_adapter, hw);
7828         struct i2c_client *this_client = adapter->i2c_client;
7829         s32 status;
7830         u16 swfw_mask = E1000_SWFW_PHY0_SM;
7831
7832         if (!this_client)
7833                 return E1000_ERR_I2C;
7834
7835         if (hw->mac.ops.acquire_swfw_sync(hw, swfw_mask) != E1000_SUCCESS)
7836                 return E1000_ERR_SWFW_SYNC;
7837         status = i2c_smbus_write_byte_data(this_client, byte_offset, data);
7838         hw->mac.ops.release_swfw_sync(hw, swfw_mask);
7839
7840         if (status)
7841                 return E1000_ERR_I2C;
7842         else
7843                 return E1000_SUCCESS;
7844
7845 }
7846 /* igb_main.c */