drivers/net/ethernet/intel/igb/igb_main.c

   1 /*******************************************************************************
   2
   3   Intel(R) Gigabit Ethernet Linux driver
   4   Copyright(c) 2007-2012 Intel Corporation.
   5
   6   This program is free software; you can redistribute it and/or modify it
   7   under the terms and conditions of the GNU General Public License,
   8   version 2, as published by the Free Software Foundation.
   9
  10   This program is distributed in the hope it will be useful, but WITHOUT
  11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13   more details.
  14
  15   You should have received a copy of the GNU General Public License along with
  16   this program; if not, write to the Free Software Foundation, Inc.,
  17   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  18
  19   The full GNU General Public License is included in this distribution in
  20   the file called "COPYING".
  21
  22   Contact Information:
  23   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  24   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  25
  26 *******************************************************************************/
  27
  28 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  29
  30 #include <linux/module.h>
  31 #include <linux/types.h>
  32 #include <linux/init.h>
  33 #include <linux/bitops.h>
  34 #include <linux/vmalloc.h>
  35 #include <linux/pagemap.h>
  36 #include <linux/netdevice.h>
  37 #include <linux/ipv6.h>
  38 #include <linux/slab.h>
  39 #include <net/checksum.h>
  40 #include <net/ip6_checksum.h>
  41 #include <linux/net_tstamp.h>
  42 #include <linux/mii.h>
  43 #include <linux/ethtool.h>
  44 #include <linux/if.h>
  45 #include <linux/if_vlan.h>
  46 #include <linux/pci.h>
  47 #include <linux/pci-aspm.h>
  48 #include <linux/delay.h>
  49 #include <linux/interrupt.h>
  50 #include <linux/ip.h>
  51 #include <linux/tcp.h>
  52 #include <linux/sctp.h>
  53 #include <linux/if_ether.h>
  54 #include <linux/aer.h>
  55 #include <linux/prefetch.h>
  56 #include <linux/pm_runtime.h>
  57 #ifdef CONFIG_IGB_DCA
  58 #include <linux/dca.h>
  59 #endif
  60 #include "igb.h"
  61
  62 #define MAJ 4
  63 #define MIN 0
  64 #define BUILD 1
  65 #define DRV_VERSION __stringify(MAJ) "." __stringify(MIN) "." \
  66 __stringify(BUILD) "-k"
  67 char igb_driver_name[] = "igb";
  68 char igb_driver_version[] = DRV_VERSION;
  69 static const char igb_driver_string[] =
  70                                 "Intel(R) Gigabit Ethernet Network Driver";
  71 static const char igb_copyright[] = "Copyright (c) 2007-2012 Intel Corporation.";
  72
  73 static const struct e1000_info *igb_info_tbl[] = {
  74         [board_82575] = &e1000_82575_info,
  75 };
  76
  77 static DEFINE_PCI_DEVICE_TABLE(igb_pci_tbl) = {
  78         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I211_COPPER), board_82575 },
  79         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_COPPER), board_82575 },
  80         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_FIBER), board_82575 },
  81         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SERDES), board_82575 },
  82         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SGMII), board_82575 },
  83         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_COPPER), board_82575 },
  84         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_FIBER), board_82575 },
  85         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_SERDES), board_82575 },
  86         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_SGMII), board_82575 },
  87         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_COPPER), board_82575 },
  88         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_FIBER), board_82575 },
  89         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_QUAD_FIBER), board_82575 },
  90         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_SERDES), board_82575 },
  91         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_SGMII), board_82575 },
  92         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_COPPER_DUAL), board_82575 },
  93         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SGMII), board_82575 },
  94         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SERDES), board_82575 },
  95         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_BACKPLANE), board_82575 },
  96         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SFP), board_82575 },
  97         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576), board_82575 },
  98         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_NS), board_82575 },
  99         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_NS_SERDES), board_82575 },
 100         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_FIBER), board_82575 },
 101         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES), board_82575 },
 102         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES_QUAD), board_82575 },
 103         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_QUAD_COPPER_ET2), board_82575 },
 104         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_QUAD_COPPER), board_82575 },
 105         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_COPPER), board_82575 },
 106         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_FIBER_SERDES), board_82575 },
 107         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575GB_QUAD_COPPER), board_82575 },
 108         /* required last entry */
 109         {0, }
 110 };
 111
 112 MODULE_DEVICE_TABLE(pci, igb_pci_tbl);
 113
 114 void igb_reset(struct igb_adapter *);
 115 static int igb_setup_all_tx_resources(struct igb_adapter *);
 116 static int igb_setup_all_rx_resources(struct igb_adapter *);
 117 static void igb_free_all_tx_resources(struct igb_adapter *);
 118 static void igb_free_all_rx_resources(struct igb_adapter *);
 119 static void igb_setup_mrqc(struct igb_adapter *);
 120 static int igb_probe(struct pci_dev *, const struct pci_device_id *);
 121 static void __devexit igb_remove(struct pci_dev *pdev);
 122 static int igb_sw_init(struct igb_adapter *);
 123 static int igb_open(struct net_device *);
 124 static int igb_close(struct net_device *);
 125 static void igb_configure_tx(struct igb_adapter *);
 126 static void igb_configure_rx(struct igb_adapter *);
 127 static void igb_clean_all_tx_rings(struct igb_adapter *);
 128 static void igb_clean_all_rx_rings(struct igb_adapter *);
 129 static void igb_clean_tx_ring(struct igb_ring *);
 130 static void igb_clean_rx_ring(struct igb_ring *);
 131 static void igb_set_rx_mode(struct net_device *);
 132 static void igb_update_phy_info(unsigned long);
 133 static void igb_watchdog(unsigned long);
 134 static void igb_watchdog_task(struct work_struct *);
 135 static netdev_tx_t igb_xmit_frame(struct sk_buff *skb, struct net_device *);
 136 static struct rtnl_link_stats64 *igb_get_stats64(struct net_device *dev,
 137                                                  struct rtnl_link_stats64 *stats);
 138 static int igb_change_mtu(struct net_device *, int);
 139 static int igb_set_mac(struct net_device *, void *);
 140 static void igb_set_uta(struct igb_adapter *adapter);
 141 static irqreturn_t igb_intr(int irq, void *);
 142 static irqreturn_t igb_intr_msi(int irq, void *);
 143 static irqreturn_t igb_msix_other(int irq, void *);
 144 static irqreturn_t igb_msix_ring(int irq, void *);
 145 #ifdef CONFIG_IGB_DCA
 146 static void igb_update_dca(struct igb_q_vector *);
 147 static void igb_setup_dca(struct igb_adapter *);
 148 #endif /* CONFIG_IGB_DCA */
 149 static int igb_poll(struct napi_struct *, int);
 150 static bool igb_clean_tx_irq(struct igb_q_vector *);
 151 static bool igb_clean_rx_irq(struct igb_q_vector *, int);
 152 static int igb_ioctl(struct net_device *, struct ifreq *, int cmd);
 153 static void igb_tx_timeout(struct net_device *);
 154 static void igb_reset_task(struct work_struct *);
 155 static void igb_vlan_mode(struct net_device *netdev, netdev_features_t features);
 156 static int igb_vlan_rx_add_vid(struct net_device *, u16);
 157 static int igb_vlan_rx_kill_vid(struct net_device *, u16);
 158 static void igb_restore_vlan(struct igb_adapter *);
 159 static void igb_rar_set_qsel(struct igb_adapter *, u8 *, u32 , u8);
 160 static void igb_ping_all_vfs(struct igb_adapter *);
 161 static void igb_msg_task(struct igb_adapter *);
 162 static void igb_vmm_control(struct igb_adapter *);
 163 static int igb_set_vf_mac(struct igb_adapter *, int, unsigned char *);
 164 static void igb_restore_vf_multicasts(struct igb_adapter *adapter);
 165 static int igb_ndo_set_vf_mac(struct net_device *netdev, int vf, u8 *mac);
 166 static int igb_ndo_set_vf_vlan(struct net_device *netdev,
 167                                int vf, u16 vlan, u8 qos);
 168 static int igb_ndo_set_vf_bw(struct net_device *netdev, int vf, int tx_rate);
 169 static int igb_ndo_get_vf_config(struct net_device *netdev, int vf,
 170                                  struct ifla_vf_info *ivi);
 171 static void igb_check_vf_rate_limit(struct igb_adapter *);
 172
 173 #ifdef CONFIG_PCI_IOV
 174 static int igb_vf_configure(struct igb_adapter *adapter, int vf);
 175 static bool igb_vfs_are_assigned(struct igb_adapter *adapter);
 176 #endif
 177
 178 #ifdef CONFIG_PM
 179 #ifdef CONFIG_PM_SLEEP
 180 static int igb_suspend(struct device *);
 181 #endif
 182 static int igb_resume(struct device *);
 183 #ifdef CONFIG_PM_RUNTIME
 184 static int igb_runtime_suspend(struct device *dev);
 185 static int igb_runtime_resume(struct device *dev);
 186 static int igb_runtime_idle(struct device *dev);
 187 #endif
 188 static const struct dev_pm_ops igb_pm_ops = {
 189         SET_SYSTEM_SLEEP_PM_OPS(igb_suspend, igb_resume)
 190         SET_RUNTIME_PM_OPS(igb_runtime_suspend, igb_runtime_resume,
 191                         igb_runtime_idle)
 192 };
 193 #endif
 194 static void igb_shutdown(struct pci_dev *);
 195 #ifdef CONFIG_IGB_DCA
 196 static int igb_notify_dca(struct notifier_block *, unsigned long, void *);
 197 static struct notifier_block dca_notifier = {
 198         .notifier_call  = igb_notify_dca,
 199         .next           = NULL,
 200         .priority       = 0
 201 };
 202 #endif
 203 #ifdef CONFIG_NET_POLL_CONTROLLER
 204 /* for netdump / net console */
 205 static void igb_netpoll(struct net_device *);
 206 #endif
 207 #ifdef CONFIG_PCI_IOV
 208 static unsigned int max_vfs = 0;
 209 module_param(max_vfs, uint, 0);
 210 MODULE_PARM_DESC(max_vfs, "Maximum number of virtual functions to allocate "
 211                  "per physical function");
 212 #endif /* CONFIG_PCI_IOV */
 213
 214 static pci_ers_result_t igb_io_error_detected(struct pci_dev *,
 215                      pci_channel_state_t);
 216 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *);
 217 static void igb_io_resume(struct pci_dev *);
 218
 219 static const struct pci_error_handlers igb_err_handler = {
 220         .error_detected = igb_io_error_detected,
 221         .slot_reset = igb_io_slot_reset,
 222         .resume = igb_io_resume,
 223 };
 224
 225 static void igb_init_dmac(struct igb_adapter *adapter, u32 pba);
 226
 227 static struct pci_driver igb_driver = {
 228         .name     = igb_driver_name,
 229         .id_table = igb_pci_tbl,
 230         .probe    = igb_probe,
 231         .remove   = __devexit_p(igb_remove),
 232 #ifdef CONFIG_PM
 233         .driver.pm = &igb_pm_ops,
 234 #endif
 235         .shutdown = igb_shutdown,
 236         .err_handler = &igb_err_handler
 237 };
 238
 239 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
 240 MODULE_DESCRIPTION("Intel(R) Gigabit Ethernet Network Driver");
 241 MODULE_LICENSE("GPL");
 242 MODULE_VERSION(DRV_VERSION);
 243
 244 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
 245 static int debug = -1;
 246 module_param(debug, int, 0);
 247 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
 248
 249 struct igb_reg_info {
 250         u32 ofs;
 251         char *name;
 252 };
 253
 254 static const struct igb_reg_info igb_reg_info_tbl[] = {
 255
 256         /* General Registers */
 257         {E1000_CTRL, "CTRL"},
 258         {E1000_STATUS, "STATUS"},
 259         {E1000_CTRL_EXT, "CTRL_EXT"},
 260
 261         /* Interrupt Registers */
 262         {E1000_ICR, "ICR"},
 263
 264         /* RX Registers */
 265         {E1000_RCTL, "RCTL"},
 266         {E1000_RDLEN(0), "RDLEN"},
 267         {E1000_RDH(0), "RDH"},
 268         {E1000_RDT(0), "RDT"},
 269         {E1000_RXDCTL(0), "RXDCTL"},
 270         {E1000_RDBAL(0), "RDBAL"},
 271         {E1000_RDBAH(0), "RDBAH"},
 272
 273         /* TX Registers */
 274         {E1000_TCTL, "TCTL"},
 275         {E1000_TDBAL(0), "TDBAL"},
 276         {E1000_TDBAH(0), "TDBAH"},
 277         {E1000_TDLEN(0), "TDLEN"},
 278         {E1000_TDH(0), "TDH"},
 279         {E1000_TDT(0), "TDT"},
 280         {E1000_TXDCTL(0), "TXDCTL"},
 281         {E1000_TDFH, "TDFH"},
 282         {E1000_TDFT, "TDFT"},
 283         {E1000_TDFHS, "TDFHS"},
 284         {E1000_TDFPC, "TDFPC"},
 285
 286         /* List Terminator */
 287         {}
 288 };
 289
 290 /*
 291  * igb_regdump - register printout routine
 292  */
 293 static void igb_regdump(struct e1000_hw *hw, struct igb_reg_info *reginfo)
 294 {
 295         int n = 0;
 296         char rname[16];
 297         u32 regs[8];
 298
 299         switch (reginfo->ofs) {
 300         case E1000_RDLEN(0):
 301                 for (n = 0; n < 4; n++)
 302                         regs[n] = rd32(E1000_RDLEN(n));
 303                 break;
 304         case E1000_RDH(0):
 305                 for (n = 0; n < 4; n++)
 306                         regs[n] = rd32(E1000_RDH(n));
 307                 break;
 308         case E1000_RDT(0):
 309                 for (n = 0; n < 4; n++)
 310                         regs[n] = rd32(E1000_RDT(n));
 311                 break;
 312         case E1000_RXDCTL(0):
 313                 for (n = 0; n < 4; n++)
 314                         regs[n] = rd32(E1000_RXDCTL(n));
 315                 break;
 316         case E1000_RDBAL(0):
 317                 for (n = 0; n < 4; n++)
 318                         regs[n] = rd32(E1000_RDBAL(n));
 319                 break;
 320         case E1000_RDBAH(0):
 321                 for (n = 0; n < 4; n++)
 322                         regs[n] = rd32(E1000_RDBAH(n));
 323                 break;
 324         case E1000_TDBAL(0):
 325                 for (n = 0; n < 4; n++)
 326                         regs[n] = rd32(E1000_RDBAL(n));
 327                 break;
 328         case E1000_TDBAH(0):
 329                 for (n = 0; n < 4; n++)
 330                         regs[n] = rd32(E1000_TDBAH(n));
 331                 break;
 332         case E1000_TDLEN(0):
 333                 for (n = 0; n < 4; n++)
 334                         regs[n] = rd32(E1000_TDLEN(n));
 335                 break;
 336         case E1000_TDH(0):
 337                 for (n = 0; n < 4; n++)
 338                         regs[n] = rd32(E1000_TDH(n));
 339                 break;
 340         case E1000_TDT(0):
 341                 for (n = 0; n < 4; n++)
 342                         regs[n] = rd32(E1000_TDT(n));
 343                 break;
 344         case E1000_TXDCTL(0):
 345                 for (n = 0; n < 4; n++)
 346                         regs[n] = rd32(E1000_TXDCTL(n));
 347                 break;
 348         default:
 349                 pr_info("%-15s %08x\n", reginfo->name, rd32(reginfo->ofs));
 350                 return;
 351         }
 352
 353         snprintf(rname, 16, "%s%s", reginfo->name, "[0-3]");
 354         pr_info("%-15s %08x %08x %08x %08x\n", rname, regs[0], regs[1],
 355                 regs[2], regs[3]);
 356 }
 357
 358 /*
 359  * igb_dump - Print registers, tx-rings and rx-rings
 360  */
 361 static void igb_dump(struct igb_adapter *adapter)
 362 {
 363         struct net_device *netdev = adapter->netdev;
 364         struct e1000_hw *hw = &adapter->hw;
 365         struct igb_reg_info *reginfo;
 366         struct igb_ring *tx_ring;
 367         union e1000_adv_tx_desc *tx_desc;
 368         struct my_u0 { u64 a; u64 b; } *u0;
 369         struct igb_ring *rx_ring;
 370         union e1000_adv_rx_desc *rx_desc;
 371         u32 staterr;
 372         u16 i, n;
 373
 374         if (!netif_msg_hw(adapter))
 375                 return;
 376
 377         /* Print netdevice Info */
 378         if (netdev) {
 379                 dev_info(&adapter->pdev->dev, "Net device Info\n");
 380                 pr_info("Device Name     state            trans_start      "
 381                         "last_rx\n");
 382                 pr_info("%-15s %016lX %016lX %016lX\n", netdev->name,
 383                         netdev->state, netdev->trans_start, netdev->last_rx);
 384         }
 385
 386         /* Print Registers */
 387         dev_info(&adapter->pdev->dev, "Register Dump\n");
 388         pr_info(" Register Name   Value\n");
 389         for (reginfo = (struct igb_reg_info *)igb_reg_info_tbl;
 390              reginfo->name; reginfo++) {
 391                 igb_regdump(hw, reginfo);
 392         }
 393
 394         /* Print TX Ring Summary */
 395         if (!netdev || !netif_running(netdev))
 396                 goto exit;
 397
 398         dev_info(&adapter->pdev->dev, "TX Rings Summary\n");
 399         pr_info("Queue [NTU] [NTC] [bi(ntc)->dma  ] leng ntw timestamp\n");
 400         for (n = 0; n < adapter->num_tx_queues; n++) {
 401                 struct igb_tx_buffer *buffer_info;
 402                 tx_ring = adapter->tx_ring[n];
 403                 buffer_info = &tx_ring->tx_buffer_info[tx_ring->next_to_clean];
 404                 pr_info(" %5d %5X %5X %016llX %04X %p %016llX\n",
 405                         n, tx_ring->next_to_use, tx_ring->next_to_clean,
 406                         (u64)dma_unmap_addr(buffer_info, dma),
 407                         dma_unmap_len(buffer_info, len),
 408                         buffer_info->next_to_watch,
 409                         (u64)buffer_info->time_stamp);
 410         }
 411
 412         /* Print TX Rings */
 413         if (!netif_msg_tx_done(adapter))
 414                 goto rx_ring_summary;
 415
 416         dev_info(&adapter->pdev->dev, "TX Rings Dump\n");
 417
 418         /* Transmit Descriptor Formats
 419          *
 420          * Advanced Transmit Descriptor
 421          *   +--------------------------------------------------------------+
 422          * 0 |         Buffer Address [63:0]                                |
 423          *   +--------------------------------------------------------------+
 424          * 8 | PAYLEN  | PORTS  |CC|IDX | STA | DCMD  |DTYP|MAC|RSV| DTALEN |
 425          *   +--------------------------------------------------------------+
 426          *   63      46 45    40 39 38 36 35 32 31   24             15       0
 427          */
 428
 429         for (n = 0; n < adapter->num_tx_queues; n++) {
 430                 tx_ring = adapter->tx_ring[n];
 431                 pr_info("------------------------------------\n");
 432                 pr_info("TX QUEUE INDEX = %d\n", tx_ring->queue_index);
 433                 pr_info("------------------------------------\n");
 434                 pr_info("T [desc]     [address 63:0  ] [PlPOCIStDDM Ln] "
 435                         "[bi->dma       ] leng  ntw timestamp        "
 436                         "bi->skb\n");
 437
 438                 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
 439                         const char *next_desc;
 440                         struct igb_tx_buffer *buffer_info;
 441                         tx_desc = IGB_TX_DESC(tx_ring, i);
 442                         buffer_info = &tx_ring->tx_buffer_info[i];
 443                         u0 = (struct my_u0 *)tx_desc;
 444                         if (i == tx_ring->next_to_use &&
 445                             i == tx_ring->next_to_clean)
 446                                 next_desc = " NTC/U";
 447                         else if (i == tx_ring->next_to_use)
 448                                 next_desc = " NTU";
 449                         else if (i == tx_ring->next_to_clean)
 450                                 next_desc = " NTC";
 451                         else
 452                                 next_desc = "";
 453
 454                         pr_info("T [0x%03X]    %016llX %016llX %016llX"
 455                                 " %04X  %p %016llX %p%s\n", i,
 456                                 le64_to_cpu(u0->a),
 457                                 le64_to_cpu(u0->b),
 458                                 (u64)dma_unmap_addr(buffer_info, dma),
 459                                 dma_unmap_len(buffer_info, len),
 460                                 buffer_info->next_to_watch,
 461                                 (u64)buffer_info->time_stamp,
 462                                 buffer_info->skb, next_desc);
 463
 464                         if (netif_msg_pktdata(adapter) && buffer_info->skb)
 465                                 print_hex_dump(KERN_INFO, "",
 466                                         DUMP_PREFIX_ADDRESS,
 467                                         16, 1, buffer_info->skb->data,
 468                                         dma_unmap_len(buffer_info, len),
 469                                         true);
 470                 }
 471         }
 472
 473         /* Print RX Rings Summary */
 474 rx_ring_summary:
 475         dev_info(&adapter->pdev->dev, "RX Rings Summary\n");
 476         pr_info("Queue [NTU] [NTC]\n");
 477         for (n = 0; n < adapter->num_rx_queues; n++) {
 478                 rx_ring = adapter->rx_ring[n];
 479                 pr_info(" %5d %5X %5X\n",
 480                         n, rx_ring->next_to_use, rx_ring->next_to_clean);
 481         }
 482
 483         /* Print RX Rings */
 484         if (!netif_msg_rx_status(adapter))
 485                 goto exit;
 486
 487         dev_info(&adapter->pdev->dev, "RX Rings Dump\n");
 488
 489         /* Advanced Receive Descriptor (Read) Format
 490          *    63                                           1        0
 491          *    +-----------------------------------------------------+
 492          *  0 |       Packet Buffer Address [63:1]           |A0/NSE|
 493          *    +----------------------------------------------+------+
 494          *  8 |       Header Buffer Address [63:1]           |  DD  |
 495          *    +-----------------------------------------------------+
 496          *
 497          *
 498          * Advanced Receive Descriptor (Write-Back) Format
 499          *
 500          *   63       48 47    32 31  30      21 20 17 16   4 3     0
 501          *   +------------------------------------------------------+
 502          * 0 | Packet     IP     |SPH| HDR_LEN   | RSV|Packet|  RSS |
 503          *   | Checksum   Ident  |   |           |    | Type | Type |
 504          *   +------------------------------------------------------+
 505          * 8 | VLAN Tag | Length | Extended Error | Extended Status |
 506          *   +------------------------------------------------------+
 507          *   63       48 47    32 31            20 19               0
 508          */
 509
 510         for (n = 0; n < adapter->num_rx_queues; n++) {
 511                 rx_ring = adapter->rx_ring[n];
 512                 pr_info("------------------------------------\n");
 513                 pr_info("RX QUEUE INDEX = %d\n", rx_ring->queue_index);
 514                 pr_info("------------------------------------\n");
 515                 pr_info("R  [desc]      [ PktBuf     A0] [  HeadBuf   DD] "
 516                         "[bi->dma       ] [bi->skb] <-- Adv Rx Read format\n");
 517                 pr_info("RWB[desc]      [PcsmIpSHl PtRs] [vl er S cks ln] -----"
 518                         "----------- [bi->skb] <-- Adv Rx Write-Back format\n");
 519
 520                 for (i = 0; i < rx_ring->count; i++) {
 521                         const char *next_desc;
 522                         struct igb_rx_buffer *buffer_info;
 523                         buffer_info = &rx_ring->rx_buffer_info[i];
 524                         rx_desc = IGB_RX_DESC(rx_ring, i);
 525                         u0 = (struct my_u0 *)rx_desc;
 526                         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
 527
 528                         if (i == rx_ring->next_to_use)
 529                                 next_desc = " NTU";
 530                         else if (i == rx_ring->next_to_clean)
 531                                 next_desc = " NTC";
 532                         else
 533                                 next_desc = "";
 534
 535                         if (staterr & E1000_RXD_STAT_DD) {
 536                                 /* Descriptor Done */
 537                                 pr_info("%s[0x%03X]     %016llX %016llX ---------------- %s\n",
 538                                         "RWB", i,
 539                                         le64_to_cpu(u0->a),
 540                                         le64_to_cpu(u0->b),
 541                                         next_desc);
 542                         } else {
 543                                 pr_info("%s[0x%03X]     %016llX %016llX %016llX %s\n",
 544                                         "R  ", i,
 545                                         le64_to_cpu(u0->a),
 546                                         le64_to_cpu(u0->b),
 547                                         (u64)buffer_info->dma,
 548                                         next_desc);
 549
 550                                 if (netif_msg_pktdata(adapter) &&
 551                                     buffer_info->dma && buffer_info->page) {
 552                                         print_hex_dump(KERN_INFO, "",
 553                                           DUMP_PREFIX_ADDRESS,
 554                                           16, 1,
 555                                           page_address(buffer_info->page) +
 556                                                       buffer_info->page_offset,
 557                                           IGB_RX_BUFSZ, true);
 558                                 }
 559                         }
 560                 }
 561         }
 562
 563 exit:
 564         return;
 565 }
 566
 567 /**
 568  * igb_get_hw_dev - return device
 569  * used by hardware layer to print debugging information
 570  **/
 571 struct net_device *igb_get_hw_dev(struct e1000_hw *hw)
 572 {
 573         struct igb_adapter *adapter = hw->back;
 574         return adapter->netdev;
 575 }
 576
 577 /**
 578  * igb_init_module - Driver Registration Routine
 579  *
 580  * igb_init_module is the first routine called when the driver is
 581  * loaded. All it does is register with the PCI subsystem.
 582  **/
 583 static int __init igb_init_module(void)
 584 {
 585         int ret;
 586         pr_info("%s - version %s\n",
 587                igb_driver_string, igb_driver_version);
 588
 589         pr_info("%s\n", igb_copyright);
 590
 591 #ifdef CONFIG_IGB_DCA
 592         dca_register_notify(&dca_notifier);
 593 #endif
 594         ret = pci_register_driver(&igb_driver);
 595         return ret;
 596 }
 597
 598 module_init(igb_init_module);
 599
 600 /**
 601  * igb_exit_module - Driver Exit Cleanup Routine
 602  *
 603  * igb_exit_module is called just before the driver is removed
 604  * from memory.
 605  **/
 606 static void __exit igb_exit_module(void)
 607 {
 608 #ifdef CONFIG_IGB_DCA
 609         dca_unregister_notify(&dca_notifier);
 610 #endif
 611         pci_unregister_driver(&igb_driver);
 612 }
 613
 614 module_exit(igb_exit_module);
 615
 616 #define Q_IDX_82576(i) (((i & 0x1) << 3) + (i >> 1))
 617 /**
 618  * igb_cache_ring_register - Descriptor ring to register mapping
 619  * @adapter: board private structure to initialize
 620  *
 621  * Once we know the feature-set enabled for the device, we'll cache
 622  * the register offset the descriptor ring is assigned to.
 623  **/
 624 static void igb_cache_ring_register(struct igb_adapter *adapter)
 625 {
 626         int i = 0, j = 0;
 627         u32 rbase_offset = adapter->vfs_allocated_count;
 628
 629         switch (adapter->hw.mac.type) {
 630         case e1000_82576:
 631                 /* The queues are allocated for virtualization such that VF 0
 632                  * is allocated queues 0 and 8, VF 1 queues 1 and 9, etc.
 633                  * In order to avoid collision we start at the first free queue
 634                  * and continue consuming queues in the same sequence
 635                  */
 636                 if (adapter->vfs_allocated_count) {
 637                         for (; i < adapter->rss_queues; i++)
 638                                 adapter->rx_ring[i]->reg_idx = rbase_offset +
 639                                                                Q_IDX_82576(i);
 640                 }
 641         case e1000_82575:
 642         case e1000_82580:
 643         case e1000_i350:
 644         case e1000_i210:
 645         case e1000_i211:
 646         default:
 647                 for (; i < adapter->num_rx_queues; i++)
 648                         adapter->rx_ring[i]->reg_idx = rbase_offset + i;
 649                 for (; j < adapter->num_tx_queues; j++)
 650                         adapter->tx_ring[j]->reg_idx = rbase_offset + j;
 651                 break;
 652         }
 653 }
 654
 655 /**
 656  *  igb_write_ivar - configure ivar for given MSI-X vector
 657  *  @hw: pointer to the HW structure
 658  *  @msix_vector: vector number we are allocating to a given ring
 659  *  @index: row index of IVAR register to write within IVAR table
 660  *  @offset: column offset of in IVAR, should be multiple of 8
 661  *
 662  *  This function is intended to handle the writing of the IVAR register
 663  *  for adapters 82576 and newer.  The IVAR table consists of 2 columns,
 664  *  each containing an cause allocation for an Rx and Tx ring, and a
 665  *  variable number of rows depending on the number of queues supported.
 666  **/
 667 static void igb_write_ivar(struct e1000_hw *hw, int msix_vector,
 668                            int index, int offset)
 669 {
 670         u32 ivar = array_rd32(E1000_IVAR0, index);
 671
 672         /* clear any bits that are currently set */
 673         ivar &= ~((u32)0xFF << offset);
 674
 675         /* write vector and valid bit */
 676         ivar |= (msix_vector | E1000_IVAR_VALID) << offset;
 677
 678         array_wr32(E1000_IVAR0, index, ivar);
 679 }
 680
 681 #define IGB_N0_QUEUE -1
 682 static void igb_assign_vector(struct igb_q_vector *q_vector, int msix_vector)
 683 {
 684         struct igb_adapter *adapter = q_vector->adapter;
 685         struct e1000_hw *hw = &adapter->hw;
 686         int rx_queue = IGB_N0_QUEUE;
 687         int tx_queue = IGB_N0_QUEUE;
 688         u32 msixbm = 0;
 689
 690         if (q_vector->rx.ring)
 691                 rx_queue = q_vector->rx.ring->reg_idx;
 692         if (q_vector->tx.ring)
 693                 tx_queue = q_vector->tx.ring->reg_idx;
 694
 695         switch (hw->mac.type) {
 696         case e1000_82575:
 697                 /* The 82575 assigns vectors using a bitmask, which matches the
 698                    bitmask for the EICR/EIMS/EIMC registers.  To assign one
 699                    or more queues to a vector, we write the appropriate bits
 700                    into the MSIXBM register for that vector. */
 701                 if (rx_queue > IGB_N0_QUEUE)
 702                         msixbm = E1000_EICR_RX_QUEUE0 << rx_queue;
 703                 if (tx_queue > IGB_N0_QUEUE)
 704                         msixbm |= E1000_EICR_TX_QUEUE0 << tx_queue;
 705                 if (!adapter->msix_entries && msix_vector == 0)
 706                         msixbm |= E1000_EIMS_OTHER;
 707                 array_wr32(E1000_MSIXBM(0), msix_vector, msixbm);
 708                 q_vector->eims_value = msixbm;
 709                 break;
 710         case e1000_82576:
 711                 /*
 712                  * 82576 uses a table that essentially consists of 2 columns
 713                  * with 8 rows.  The ordering is column-major so we use the
 714                  * lower 3 bits as the row index, and the 4th bit as the
 715                  * column offset.
 716                  */
 717                 if (rx_queue > IGB_N0_QUEUE)
 718                         igb_write_ivar(hw, msix_vector,
 719                                        rx_queue & 0x7,
 720                                        (rx_queue & 0x8) << 1);
 721                 if (tx_queue > IGB_N0_QUEUE)
 722                         igb_write_ivar(hw, msix_vector,
 723                                        tx_queue & 0x7,
 724                                        ((tx_queue & 0x8) << 1) + 8);
 725                 q_vector->eims_value = 1 << msix_vector;
 726                 break;
 727         case e1000_82580:
 728         case e1000_i350:
 729         case e1000_i210:
 730         case e1000_i211:
 731                 /*
 732                  * On 82580 and newer adapters the scheme is similar to 82576
 733                  * however instead of ordering column-major we have things
 734                  * ordered row-major.  So we traverse the table by using
 735                  * bit 0 as the column offset, and the remaining bits as the
 736                  * row index.
 737                  */
 738                 if (rx_queue > IGB_N0_QUEUE)
 739                         igb_write_ivar(hw, msix_vector,
 740                                        rx_queue >> 1,
 741                                        (rx_queue & 0x1) << 4);
 742                 if (tx_queue > IGB_N0_QUEUE)
 743                         igb_write_ivar(hw, msix_vector,
 744                                        tx_queue >> 1,
 745                                        ((tx_queue & 0x1) << 4) + 8);
 746                 q_vector->eims_value = 1 << msix_vector;
 747                 break;
 748         default:
 749                 BUG();
 750                 break;
 751         }
 752
 753         /* add q_vector eims value to global eims_enable_mask */
 754         adapter->eims_enable_mask |= q_vector->eims_value;
 755
 756         /* configure q_vector to set itr on first interrupt */
 757         q_vector->set_itr = 1;
 758 }
 759
 760 /**
 761  * igb_configure_msix - Configure MSI-X hardware
 762  *
 763  * igb_configure_msix sets up the hardware to properly
 764  * generate MSI-X interrupts.
 765  **/
 766 static void igb_configure_msix(struct igb_adapter *adapter)
 767 {
 768         u32 tmp;
 769         int i, vector = 0;
 770         struct e1000_hw *hw = &adapter->hw;
 771
 772         adapter->eims_enable_mask = 0;
 773
 774         /* set vector for other causes, i.e. link changes */
 775         switch (hw->mac.type) {
 776         case e1000_82575:
 777                 tmp = rd32(E1000_CTRL_EXT);
 778                 /* enable MSI-X PBA support*/
 779                 tmp |= E1000_CTRL_EXT_PBA_CLR;
 780
 781                 /* Auto-Mask interrupts upon ICR read. */
 782                 tmp |= E1000_CTRL_EXT_EIAME;
 783                 tmp |= E1000_CTRL_EXT_IRCA;
 784
 785                 wr32(E1000_CTRL_EXT, tmp);
 786
 787                 /* enable msix_other interrupt */
 788                 array_wr32(E1000_MSIXBM(0), vector++,
 789                                       E1000_EIMS_OTHER);
 790                 adapter->eims_other = E1000_EIMS_OTHER;
 791
 792                 break;
 793
 794         case e1000_82576:
 795         case e1000_82580:
 796         case e1000_i350:
 797         case e1000_i210:
 798         case e1000_i211:
 799                 /* Turn on MSI-X capability first, or our settings
 800                  * won't stick.  And it will take days to debug. */
 801                 wr32(E1000_GPIE, E1000_GPIE_MSIX_MODE |
 802                                 E1000_GPIE_PBA | E1000_GPIE_EIAME |
 803                                 E1000_GPIE_NSICR);
 804
 805                 /* enable msix_other interrupt */
 806                 adapter->eims_other = 1 << vector;
 807                 tmp = (vector++ | E1000_IVAR_VALID) << 8;
 808
 809                 wr32(E1000_IVAR_MISC, tmp);
 810                 break;
 811         default:
 812                 /* do nothing, since nothing else supports MSI-X */
 813                 break;
 814         } /* switch (hw->mac.type) */
 815
 816         adapter->eims_enable_mask |= adapter->eims_other;
 817
 818         for (i = 0; i < adapter->num_q_vectors; i++)
 819                 igb_assign_vector(adapter->q_vector[i], vector++);
 820
 821         wrfl();
 822 }
 823
 824 /**
 825  * igb_request_msix - Initialize MSI-X interrupts
 826  *
 827  * igb_request_msix allocates MSI-X vectors and requests interrupts from the
 828  * kernel.
 829  **/
 830 static int igb_request_msix(struct igb_adapter *adapter)
 831 {
 832         struct net_device *netdev = adapter->netdev;
 833         struct e1000_hw *hw = &adapter->hw;
 834         int i, err = 0, vector = 0;
 835
 836         err = request_irq(adapter->msix_entries[vector].vector,
 837                           igb_msix_other, 0, netdev->name, adapter);
 838         if (err)
 839                 goto out;
 840         vector++;
 841
 842         for (i = 0; i < adapter->num_q_vectors; i++) {
 843                 struct igb_q_vector *q_vector = adapter->q_vector[i];
 844
 845                 q_vector->itr_register = hw->hw_addr + E1000_EITR(vector);
 846
 847                 if (q_vector->rx.ring && q_vector->tx.ring)
 848                         sprintf(q_vector->name, "%s-TxRx-%u", netdev->name,
 849                                 q_vector->rx.ring->queue_index);
 850                 else if (q_vector->tx.ring)
 851                         sprintf(q_vector->name, "%s-tx-%u", netdev->name,
 852                                 q_vector->tx.ring->queue_index);
 853                 else if (q_vector->rx.ring)
 854                         sprintf(q_vector->name, "%s-rx-%u", netdev->name,
 855                                 q_vector->rx.ring->queue_index);
 856                 else
 857                         sprintf(q_vector->name, "%s-unused", netdev->name);
 858
 859                 err = request_irq(adapter->msix_entries[vector].vector,
 860                                   igb_msix_ring, 0, q_vector->name,
 861                                   q_vector);
 862                 if (err)
 863                         goto out;
 864                 vector++;
 865         }
 866
 867         igb_configure_msix(adapter);
 868         return 0;
 869 out:
 870         return err;
 871 }
 872
 873 static void igb_reset_interrupt_capability(struct igb_adapter *adapter)
 874 {
 875         if (adapter->msix_entries) {
 876                 pci_disable_msix(adapter->pdev);
 877                 kfree(adapter->msix_entries);
 878                 adapter->msix_entries = NULL;
 879         } else if (adapter->flags & IGB_FLAG_HAS_MSI) {
 880                 pci_disable_msi(adapter->pdev);
 881         }
 882 }
 883
 884 /**
 885  * igb_free_q_vector - Free memory allocated for specific interrupt vector
 886  * @adapter: board private structure to initialize
 887  * @v_idx: Index of vector to be freed
 888  *
 889  * This function frees the memory allocated to the q_vector.  In addition if
 890  * NAPI is enabled it will delete any references to the NAPI struct prior
 891  * to freeing the q_vector.
 892  **/
 893 static void igb_free_q_vector(struct igb_adapter *adapter, int v_idx)
 894 {
 895         struct igb_q_vector *q_vector = adapter->q_vector[v_idx];
 896
 897         if (q_vector->tx.ring)
 898                 adapter->tx_ring[q_vector->tx.ring->queue_index] = NULL;
 899
 900         if (q_vector->rx.ring)
 901                 adapter->tx_ring[q_vector->rx.ring->queue_index] = NULL;
 902
 903         adapter->q_vector[v_idx] = NULL;
 904         netif_napi_del(&q_vector->napi);
 905
 906         /*
 907          * ixgbe_get_stats64() might access the rings on this vector,
 908          * we must wait a grace period before freeing it.
 909          */
 910         kfree_rcu(q_vector, rcu);
 911 }
 912
 913 /**
 914  * igb_free_q_vectors - Free memory allocated for interrupt vectors
 915  * @adapter: board private structure to initialize
 916  *
 917  * This function frees the memory allocated to the q_vectors.  In addition if
 918  * NAPI is enabled it will delete any references to the NAPI struct prior
 919  * to freeing the q_vector.
 920  **/
 921 static void igb_free_q_vectors(struct igb_adapter *adapter)
 922 {
 923         int v_idx = adapter->num_q_vectors;
 924
 925         adapter->num_tx_queues = 0;
 926         adapter->num_rx_queues = 0;
 927         adapter->num_q_vectors = 0;
 928
 929         while (v_idx--)
 930                 igb_free_q_vector(adapter, v_idx);
 931 }
 932
 933 /**
 934  * igb_clear_interrupt_scheme - reset the device to a state of no interrupts
 935  *
 936  * This function resets the device so that it has 0 rx queues, tx queues, and
 937  * MSI-X interrupts allocated.
 938  */
 939 static void igb_clear_interrupt_scheme(struct igb_adapter *adapter)
 940 {
 941         igb_free_q_vectors(adapter);
 942         igb_reset_interrupt_capability(adapter);
 943 }
 944
 945 /**
 946  * igb_set_interrupt_capability - set MSI or MSI-X if supported
 947  *
 948  * Attempt to configure interrupts using the best available
 949  * capabilities of the hardware and kernel.
 950  **/
 951 static int igb_set_interrupt_capability(struct igb_adapter *adapter)
 952 {
 953         int err;
 954         int numvecs, i;
 955
 956         /* Number of supported queues. */
 957         adapter->num_rx_queues = adapter->rss_queues;
 958         if (adapter->vfs_allocated_count)
 959                 adapter->num_tx_queues = 1;
 960         else
 961                 adapter->num_tx_queues = adapter->rss_queues;
 962
 963         /* start with one vector for every rx queue */
 964         numvecs = adapter->num_rx_queues;
 965
 966         /* if tx handler is separate add 1 for every tx queue */
 967         if (!(adapter->flags & IGB_FLAG_QUEUE_PAIRS))
 968                 numvecs += adapter->num_tx_queues;
 969
 970         /* store the number of vectors reserved for queues */
 971         adapter->num_q_vectors = numvecs;
 972
 973         /* add 1 vector for link status interrupts */
 974         numvecs++;
 975         adapter->msix_entries = kcalloc(numvecs, sizeof(struct msix_entry),
 976                                         GFP_KERNEL);
 977
 978         if (!adapter->msix_entries)
 979                 goto msi_only;
 980
 981         for (i = 0; i < numvecs; i++)
 982                 adapter->msix_entries[i].entry = i;
 983
 984         err = pci_enable_msix(adapter->pdev,
 985                               adapter->msix_entries,
 986                               numvecs);
 987         if (err == 0)
 988                 goto out;
 989
 990         igb_reset_interrupt_capability(adapter);
 991
 992         /* If we can't do MSI-X, try MSI */
 993 msi_only:
 994 #ifdef CONFIG_PCI_IOV
 995         /* disable SR-IOV for non MSI-X configurations */
 996         if (adapter->vf_data) {
 997                 struct e1000_hw *hw = &adapter->hw;
 998                 /* disable iov and allow time for transactions to clear */
 999                 pci_disable_sriov(adapter->pdev);
1000                 msleep(500);
1001
1002                 kfree(adapter->vf_data);
1003                 adapter->vf_data = NULL;
1004                 wr32(E1000_IOVCTL, E1000_IOVCTL_REUSE_VFQ);
1005                 wrfl();
1006                 msleep(100);
1007                 dev_info(&adapter->pdev->dev, "IOV Disabled\n");
1008         }
1009 #endif
1010         adapter->vfs_allocated_count = 0;
1011         adapter->rss_queues = 1;
1012         adapter->flags |= IGB_FLAG_QUEUE_PAIRS;
1013         adapter->num_rx_queues = 1;
1014         adapter->num_tx_queues = 1;
1015         adapter->num_q_vectors = 1;
1016         if (!pci_enable_msi(adapter->pdev))
1017                 adapter->flags |= IGB_FLAG_HAS_MSI;
1018 out:
1019         /* Notify the stack of the (possibly) reduced queue counts. */
1020         rtnl_lock();
1021         netif_set_real_num_tx_queues(adapter->netdev, adapter->num_tx_queues);
1022         err = netif_set_real_num_rx_queues(adapter->netdev,
1023                 adapter->num_rx_queues);
1024         rtnl_unlock();
1025         return err;
1026 }
1027
1028 static void igb_add_ring(struct igb_ring *ring,
1029                          struct igb_ring_container *head)
1030 {
1031         head->ring = ring;
1032         head->count++;
1033 }
1034
1035 /**
1036  * igb_alloc_q_vector - Allocate memory for a single interrupt vector
1037  * @adapter: board private structure to initialize
1038  * @v_count: q_vectors allocated on adapter, used for ring interleaving
1039  * @v_idx: index of vector in adapter struct
1040  * @txr_count: total number of Tx rings to allocate
1041  * @txr_idx: index of first Tx ring to allocate
1042  * @rxr_count: total number of Rx rings to allocate
1043  * @rxr_idx: index of first Rx ring to allocate
1044  *
1045  * We allocate one q_vector.  If allocation fails we return -ENOMEM.
1046  **/
1047 static int igb_alloc_q_vector(struct igb_adapter *adapter,
1048                               int v_count, int v_idx,
1049                               int txr_count, int txr_idx,
1050                               int rxr_count, int rxr_idx)
1051 {
1052         struct igb_q_vector *q_vector;
1053         struct igb_ring *ring;
1054         int ring_count, size;
1055
1056         /* igb only supports 1 Tx and/or 1 Rx queue per vector */
1057         if (txr_count > 1 || rxr_count > 1)
1058                 return -ENOMEM;
1059
1060         ring_count = txr_count + rxr_count;
1061         size = sizeof(struct igb_q_vector) +
1062                (sizeof(struct igb_ring) * ring_count);
1063
1064         /* allocate q_vector and rings */
1065         q_vector = kzalloc(size, GFP_KERNEL);
1066         if (!q_vector)
1067                 return -ENOMEM;
1068
1069         /* initialize NAPI */
1070         netif_napi_add(adapter->netdev, &q_vector->napi,
1071                        igb_poll, 64);
1072
1073         /* tie q_vector and adapter together */
1074         adapter->q_vector[v_idx] = q_vector;
1075         q_vector->adapter = adapter;
1076
1077         /* initialize work limits */
1078         q_vector->tx.work_limit = adapter->tx_work_limit;
1079
1080         /* initialize ITR configuration */
1081         q_vector->itr_register = adapter->hw.hw_addr + E1000_EITR(0);
1082         q_vector->itr_val = IGB_START_ITR;
1083
1084         /* initialize pointer to rings */
1085         ring = q_vector->ring;
1086
1087         if (txr_count) {
1088                 /* assign generic ring traits */
1089                 ring->dev = &adapter->pdev->dev;
1090                 ring->netdev = adapter->netdev;
1091
1092                 /* configure backlink on ring */
1093                 ring->q_vector = q_vector;
1094
1095                 /* update q_vector Tx values */
1096                 igb_add_ring(ring, &q_vector->tx);
1097
1098                 /* For 82575, context index must be unique per ring. */
1099                 if (adapter->hw.mac.type == e1000_82575)
1100                         set_bit(IGB_RING_FLAG_TX_CTX_IDX, &ring->flags);
1101
1102                 /* apply Tx specific ring traits */
1103                 ring->count = adapter->tx_ring_count;
1104                 ring->queue_index = txr_idx;
1105
1106                 /* assign ring to adapter */
1107                 adapter->tx_ring[txr_idx] = ring;
1108
1109                 /* push pointer to next ring */
1110                 ring++;
1111         }
1112
1113         if (rxr_count) {
1114                 /* assign generic ring traits */
1115                 ring->dev = &adapter->pdev->dev;
1116                 ring->netdev = adapter->netdev;
1117
1118                 /* configure backlink on ring */
1119                 ring->q_vector = q_vector;
1120
1121                 /* update q_vector Rx values */
1122                 igb_add_ring(ring, &q_vector->rx);
1123
1124                 /* set flag indicating ring supports SCTP checksum offload */
1125                 if (adapter->hw.mac.type >= e1000_82576)
1126                         set_bit(IGB_RING_FLAG_RX_SCTP_CSUM, &ring->flags);
1127
1128                 /*
1129                  * On i350, i210, and i211, loopback VLAN packets
1130                  * have the tag byte-swapped.
1131                  * */
1132                 if (adapter->hw.mac.type >= e1000_i350)
1133                         set_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP, &ring->flags);
1134
1135                 /* apply Rx specific ring traits */
1136                 ring->count = adapter->rx_ring_count;
1137                 ring->queue_index = rxr_idx;
1138
1139                 /* assign ring to adapter */
1140                 adapter->rx_ring[rxr_idx] = ring;
1141         }
1142
1143         return 0;
1144 }
1145
1146
1147 /**
1148  * igb_alloc_q_vectors - Allocate memory for interrupt vectors
1149  * @adapter: board private structure to initialize
1150  *
1151  * We allocate one q_vector per queue interrupt.  If allocation fails we
1152  * return -ENOMEM.
1153  **/
1154 static int igb_alloc_q_vectors(struct igb_adapter *adapter)
1155 {
1156         int q_vectors = adapter->num_q_vectors;
1157         int rxr_remaining = adapter->num_rx_queues;
1158         int txr_remaining = adapter->num_tx_queues;
1159         int rxr_idx = 0, txr_idx = 0, v_idx = 0;
1160         int err;
1161
1162         if (q_vectors >= (rxr_remaining + txr_remaining)) {
1163                 for (; rxr_remaining; v_idx++) {
1164                         err = igb_alloc_q_vector(adapter, q_vectors, v_idx,
1165                                                  0, 0, 1, rxr_idx);
1166
1167                         if (err)
1168                                 goto err_out;
1169
1170                         /* update counts and index */
1171                         rxr_remaining--;
1172                         rxr_idx++;
1173                 }
1174         }
1175
1176         for (; v_idx < q_vectors; v_idx++) {
1177                 int rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors - v_idx);
1178                 int tqpv = DIV_ROUND_UP(txr_remaining, q_vectors - v_idx);
1179                 err = igb_alloc_q_vector(adapter, q_vectors, v_idx,
1180                                          tqpv, txr_idx, rqpv, rxr_idx);
1181
1182                 if (err)
1183                         goto err_out;
1184
1185                 /* update counts and index */
1186                 rxr_remaining -= rqpv;
1187                 txr_remaining -= tqpv;
1188                 rxr_idx++;
1189                 txr_idx++;
1190         }
1191
1192         return 0;
1193
1194 err_out:
1195         adapter->num_tx_queues = 0;
1196         adapter->num_rx_queues = 0;
1197         adapter->num_q_vectors = 0;
1198
1199         while (v_idx--)
1200                 igb_free_q_vector(adapter, v_idx);
1201
1202         return -ENOMEM;
1203 }
1204
1205 /**
1206  * igb_init_interrupt_scheme - initialize interrupts, allocate queues/vectors
1207  *
1208  * This function initializes the interrupts and allocates all of the queues.
1209  **/
1210 static int igb_init_interrupt_scheme(struct igb_adapter *adapter)
1211 {
1212         struct pci_dev *pdev = adapter->pdev;
1213         int err;
1214
1215         err = igb_set_interrupt_capability(adapter);
1216         if (err)
1217                 return err;
1218
1219         err = igb_alloc_q_vectors(adapter);
1220         if (err) {
1221                 dev_err(&pdev->dev, "Unable to allocate memory for vectors\n");
1222                 goto err_alloc_q_vectors;
1223         }
1224
1225         igb_cache_ring_register(adapter);
1226
1227         return 0;
1228
1229 err_alloc_q_vectors:
1230         igb_reset_interrupt_capability(adapter);
1231         return err;
1232 }
1233
1234 /**
1235  * igb_request_irq - initialize interrupts
1236  *
1237  * Attempts to configure interrupts using the best available
1238  * capabilities of the hardware and kernel.
1239  **/
1240 static int igb_request_irq(struct igb_adapter *adapter)
1241 {
1242         struct net_device *netdev = adapter->netdev;
1243         struct pci_dev *pdev = adapter->pdev;
1244         int err = 0;
1245
1246         if (adapter->msix_entries) {
1247                 err = igb_request_msix(adapter);
1248                 if (!err)
1249                         goto request_done;
1250                 /* fall back to MSI */
1251                 igb_free_all_tx_resources(adapter);
1252                 igb_free_all_rx_resources(adapter);
1253                 igb_clear_interrupt_scheme(adapter);
1254                 if (!pci_enable_msi(pdev))
1255                         adapter->flags |= IGB_FLAG_HAS_MSI;
1256                 adapter->num_tx_queues = 1;
1257                 adapter->num_rx_queues = 1;
1258                 adapter->num_q_vectors = 1;
1259                 err = igb_alloc_q_vectors(adapter);
1260                 if (err) {
1261                         dev_err(&pdev->dev,
1262                                 "Unable to allocate memory for vectors\n");
1263                         goto request_done;
1264                 }
1265                 igb_setup_all_tx_resources(adapter);
1266                 igb_setup_all_rx_resources(adapter);
1267         }
1268
1269         igb_assign_vector(adapter->q_vector[0], 0);
1270
1271         if (adapter->flags & IGB_FLAG_HAS_MSI) {
1272                 err = request_irq(pdev->irq, igb_intr_msi, 0,
1273                                   netdev->name, adapter);
1274                 if (!err)
1275                         goto request_done;
1276
1277                 /* fall back to legacy interrupts */
1278                 igb_reset_interrupt_capability(adapter);
1279                 adapter->flags &= ~IGB_FLAG_HAS_MSI;
1280         }
1281
1282         err = request_irq(pdev->irq, igb_intr, IRQF_SHARED,
1283                           netdev->name, adapter);
1284
1285         if (err)
1286                 dev_err(&pdev->dev, "Error %d getting interrupt\n",
1287                         err);
1288
1289 request_done:
1290         return err;
1291 }
1292
1293 static void igb_free_irq(struct igb_adapter *adapter)
1294 {
1295         if (adapter->msix_entries) {
1296                 int vector = 0, i;
1297
1298                 free_irq(adapter->msix_entries[vector++].vector, adapter);
1299
1300                 for (i = 0; i < adapter->num_q_vectors; i++)
1301                         free_irq(adapter->msix_entries[vector++].vector,
1302                                  adapter->q_vector[i]);
1303         } else {
1304                 free_irq(adapter->pdev->irq, adapter);
1305         }
1306 }
1307
1308 /**
1309  * igb_irq_disable - Mask off interrupt generation on the NIC
1310  * @adapter: board private structure
1311  **/
1312 static void igb_irq_disable(struct igb_adapter *adapter)
1313 {
1314         struct e1000_hw *hw = &adapter->hw;
1315
1316         /*
1317          * we need to be careful when disabling interrupts.  The VFs are also
1318          * mapped into these registers and so clearing the bits can cause
1319          * issues on the VF drivers so we only need to clear what we set
1320          */
1321         if (adapter->msix_entries) {
1322                 u32 regval = rd32(E1000_EIAM);
1323                 wr32(E1000_EIAM, regval & ~adapter->eims_enable_mask);
1324                 wr32(E1000_EIMC, adapter->eims_enable_mask);
1325                 regval = rd32(E1000_EIAC);
1326                 wr32(E1000_EIAC, regval & ~adapter->eims_enable_mask);
1327         }
1328
1329         wr32(E1000_IAM, 0);
1330         wr32(E1000_IMC, ~0);
1331         wrfl();
1332         if (adapter->msix_entries) {
1333                 int i;
1334                 for (i = 0; i < adapter->num_q_vectors; i++)
1335                         synchronize_irq(adapter->msix_entries[i].vector);
1336         } else {
1337                 synchronize_irq(adapter->pdev->irq);
1338         }
1339 }
1340
1341 /**
1342  * igb_irq_enable - Enable default interrupt generation settings
1343  * @adapter: board private structure
1344  **/
1345 static void igb_irq_enable(struct igb_adapter *adapter)
1346 {
1347         struct e1000_hw *hw = &adapter->hw;
1348
1349         if (adapter->msix_entries) {
1350                 u32 ims = E1000_IMS_LSC | E1000_IMS_DOUTSYNC | E1000_IMS_DRSTA;
1351                 u32 regval = rd32(E1000_EIAC);
1352                 wr32(E1000_EIAC, regval | adapter->eims_enable_mask);
1353                 regval = rd32(E1000_EIAM);
1354                 wr32(E1000_EIAM, regval | adapter->eims_enable_mask);
1355                 wr32(E1000_EIMS, adapter->eims_enable_mask);
1356                 if (adapter->vfs_allocated_count) {
1357                         wr32(E1000_MBVFIMR, 0xFF);
1358                         ims |= E1000_IMS_VMMB;
1359                 }
1360                 wr32(E1000_IMS, ims);
1361         } else {
1362                 wr32(E1000_IMS, IMS_ENABLE_MASK |
1363                                 E1000_IMS_DRSTA);
1364                 wr32(E1000_IAM, IMS_ENABLE_MASK |
1365                                 E1000_IMS_DRSTA);
1366         }
1367 }
1368
1369 static void igb_update_mng_vlan(struct igb_adapter *adapter)
1370 {
1371         struct e1000_hw *hw = &adapter->hw;
1372         u16 vid = adapter->hw.mng_cookie.vlan_id;
1373         u16 old_vid = adapter->mng_vlan_id;
1374
1375         if (hw->mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
1376                 /* add VID to filter table */
1377                 igb_vfta_set(hw, vid, true);
1378                 adapter->mng_vlan_id = vid;
1379         } else {
1380                 adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
1381         }
1382
1383         if ((old_vid != (u16)IGB_MNG_VLAN_NONE) &&
1384             (vid != old_vid) &&
1385             !test_bit(old_vid, adapter->active_vlans)) {
1386                 /* remove VID from filter table */
1387                 igb_vfta_set(hw, old_vid, false);
1388         }
1389 }
1390
1391 /**
1392  * igb_release_hw_control - release control of the h/w to f/w
1393  * @adapter: address of board private structure
1394  *
1395  * igb_release_hw_control resets CTRL_EXT:DRV_LOAD bit.
1396  * For ASF and Pass Through versions of f/w this means that the
1397  * driver is no longer loaded.
1398  *
1399  **/
1400 static void igb_release_hw_control(struct igb_adapter *adapter)
1401 {
1402         struct e1000_hw *hw = &adapter->hw;
1403         u32 ctrl_ext;
1404
1405         /* Let firmware take over control of h/w */
1406         ctrl_ext = rd32(E1000_CTRL_EXT);
1407         wr32(E1000_CTRL_EXT,
1408                         ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
1409 }
1410
1411 /**
1412  * igb_get_hw_control - get control of the h/w from f/w
1413  * @adapter: address of board private structure
1414  *
1415  * igb_get_hw_control sets CTRL_EXT:DRV_LOAD bit.
1416  * For ASF and Pass Through versions of f/w this means that
1417  * the driver is loaded.
1418  *
1419  **/
1420 static void igb_get_hw_control(struct igb_adapter *adapter)
1421 {
1422         struct e1000_hw *hw = &adapter->hw;
1423         u32 ctrl_ext;
1424
1425         /* Let firmware know the driver has taken over */
1426         ctrl_ext = rd32(E1000_CTRL_EXT);
1427         wr32(E1000_CTRL_EXT,
1428                         ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
1429 }
1430
1431 /**
1432  * igb_configure - configure the hardware for RX and TX
1433  * @adapter: private board structure
1434  **/
1435 static void igb_configure(struct igb_adapter *adapter)
1436 {
1437         struct net_device *netdev = adapter->netdev;
1438         int i;
1439
1440         igb_get_hw_control(adapter);
1441         igb_set_rx_mode(netdev);
1442
1443         igb_restore_vlan(adapter);
1444
1445         igb_setup_tctl(adapter);
1446         igb_setup_mrqc(adapter);
1447         igb_setup_rctl(adapter);
1448
1449         igb_configure_tx(adapter);
1450         igb_configure_rx(adapter);
1451
1452         igb_rx_fifo_flush_82575(&adapter->hw);
1453
1454         /* call igb_desc_unused which always leaves
1455          * at least 1 descriptor unused to make sure
1456          * next_to_use != next_to_clean */
1457         for (i = 0; i < adapter->num_rx_queues; i++) {
1458                 struct igb_ring *ring = adapter->rx_ring[i];
1459                 igb_alloc_rx_buffers(ring, igb_desc_unused(ring));
1460         }
1461 }
1462
1463 /**
1464  * igb_power_up_link - Power up the phy/serdes link
1465  * @adapter: address of board private structure
1466  **/
1467 void igb_power_up_link(struct igb_adapter *adapter)
1468 {
1469         igb_reset_phy(&adapter->hw);
1470
1471         if (adapter->hw.phy.media_type == e1000_media_type_copper)
1472                 igb_power_up_phy_copper(&adapter->hw);
1473         else
1474                 igb_power_up_serdes_link_82575(&adapter->hw);
1475 }
1476
1477 /**
1478  * igb_power_down_link - Power down the phy/serdes link
1479  * @adapter: address of board private structure
1480  */
1481 static void igb_power_down_link(struct igb_adapter *adapter)
1482 {
1483         if (adapter->hw.phy.media_type == e1000_media_type_copper)
1484                 igb_power_down_phy_copper_82575(&adapter->hw);
1485         else
1486                 igb_shutdown_serdes_link_82575(&adapter->hw);
1487 }
1488
1489 /**
1490  * igb_up - Open the interface and prepare it to handle traffic
1491  * @adapter: board private structure
1492  **/
1493 int igb_up(struct igb_adapter *adapter)
1494 {
1495         struct e1000_hw *hw = &adapter->hw;
1496         int i;
1497
1498         /* hardware has been reset, we need to reload some things */
1499         igb_configure(adapter);
1500
1501         clear_bit(__IGB_DOWN, &adapter->state);
1502
1503         for (i = 0; i < adapter->num_q_vectors; i++)
1504                 napi_enable(&(adapter->q_vector[i]->napi));
1505
1506         if (adapter->msix_entries)
1507                 igb_configure_msix(adapter);
1508         else
1509                 igb_assign_vector(adapter->q_vector[0], 0);
1510
1511         /* Clear any pending interrupts. */
1512         rd32(E1000_ICR);
1513         igb_irq_enable(adapter);
1514
1515         /* notify VFs that reset has been completed */
1516         if (adapter->vfs_allocated_count) {
1517                 u32 reg_data = rd32(E1000_CTRL_EXT);
1518                 reg_data |= E1000_CTRL_EXT_PFRSTD;
1519                 wr32(E1000_CTRL_EXT, reg_data);
1520         }
1521
1522         netif_tx_start_all_queues(adapter->netdev);
1523
1524         /* start the watchdog. */
1525         hw->mac.get_link_status = 1;
1526         schedule_work(&adapter->watchdog_task);
1527
1528         return 0;
1529 }
1530
1531 void igb_down(struct igb_adapter *adapter)
1532 {
1533         struct net_device *netdev = adapter->netdev;
1534         struct e1000_hw *hw = &adapter->hw;
1535         u32 tctl, rctl;
1536         int i;
1537
1538         /* signal that we're down so the interrupt handler does not
1539          * reschedule our watchdog timer */
1540         set_bit(__IGB_DOWN, &adapter->state);
1541
1542         /* disable receives in the hardware */
1543         rctl = rd32(E1000_RCTL);
1544         wr32(E1000_RCTL, rctl & ~E1000_RCTL_EN);
1545         /* flush and sleep below */
1546
1547         netif_tx_stop_all_queues(netdev);
1548
1549         /* disable transmits in the hardware */
1550         tctl = rd32(E1000_TCTL);
1551         tctl &= ~E1000_TCTL_EN;
1552         wr32(E1000_TCTL, tctl);
1553         /* flush both disables and wait for them to finish */
1554         wrfl();
1555         msleep(10);
1556
1557         for (i = 0; i < adapter->num_q_vectors; i++)
1558                 napi_disable(&(adapter->q_vector[i]->napi));
1559
1560         igb_irq_disable(adapter);
1561
1562         del_timer_sync(&adapter->watchdog_timer);
1563         del_timer_sync(&adapter->phy_info_timer);
1564
1565         netif_carrier_off(netdev);
1566
1567         /* record the stats before reset*/
1568         spin_lock(&adapter->stats64_lock);
1569         igb_update_stats(adapter, &adapter->stats64);
1570         spin_unlock(&adapter->stats64_lock);
1571
1572         adapter->link_speed = 0;
1573         adapter->link_duplex = 0;
1574
1575         if (!pci_channel_offline(adapter->pdev))
1576                 igb_reset(adapter);
1577         igb_clean_all_tx_rings(adapter);
1578         igb_clean_all_rx_rings(adapter);
1579 #ifdef CONFIG_IGB_DCA
1580
1581         /* since we reset the hardware DCA settings were cleared */
1582         igb_setup_dca(adapter);
1583 #endif
1584 }
1585
1586 void igb_reinit_locked(struct igb_adapter *adapter)
1587 {
1588         WARN_ON(in_interrupt());
1589         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
1590                 msleep(1);
1591         igb_down(adapter);
1592         igb_up(adapter);
1593         clear_bit(__IGB_RESETTING, &adapter->state);
1594 }
1595
1596 void igb_reset(struct igb_adapter *adapter)
1597 {
1598         struct pci_dev *pdev = adapter->pdev;
1599         struct e1000_hw *hw = &adapter->hw;
1600         struct e1000_mac_info *mac = &hw->mac;
1601         struct e1000_fc_info *fc = &hw->fc;
1602         u32 pba = 0, tx_space, min_tx_space, min_rx_space;
1603         u16 hwm;
1604
1605         /* Repartition Pba for greater than 9k mtu
1606          * To take effect CTRL.RST is required.
1607          */
1608         switch (mac->type) {
1609         case e1000_i350:
1610         case e1000_82580:
1611                 pba = rd32(E1000_RXPBS);
1612                 pba = igb_rxpbs_adjust_82580(pba);
1613                 break;
1614         case e1000_82576:
1615                 pba = rd32(E1000_RXPBS);
1616                 pba &= E1000_RXPBS_SIZE_MASK_82576;
1617                 break;
1618         case e1000_82575:
1619         case e1000_i210:
1620         case e1000_i211:
1621         default:
1622                 pba = E1000_PBA_34K;
1623                 break;
1624         }
1625
1626         if ((adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) &&
1627             (mac->type < e1000_82576)) {
1628                 /* adjust PBA for jumbo frames */
1629                 wr32(E1000_PBA, pba);
1630
1631                 /* To maintain wire speed transmits, the Tx FIFO should be
1632                  * large enough to accommodate two full transmit packets,
1633                  * rounded up to the next 1KB and expressed in KB.  Likewise,
1634                  * the Rx FIFO should be large enough to accommodate at least
1635                  * one full receive packet and is similarly rounded up and
1636                  * expressed in KB. */
1637                 pba = rd32(E1000_PBA);
1638                 /* upper 16 bits has Tx packet buffer allocation size in KB */
1639                 tx_space = pba >> 16;
1640                 /* lower 16 bits has Rx packet buffer allocation size in KB */
1641                 pba &= 0xffff;
1642                 /* the tx fifo also stores 16 bytes of information about the tx
1643                  * but don't include ethernet FCS because hardware appends it */
1644                 min_tx_space = (adapter->max_frame_size +
1645                                 sizeof(union e1000_adv_tx_desc) -
1646                                 ETH_FCS_LEN) * 2;
1647                 min_tx_space = ALIGN(min_tx_space, 1024);
1648                 min_tx_space >>= 10;
1649                 /* software strips receive CRC, so leave room for it */
1650                 min_rx_space = adapter->max_frame_size;
1651                 min_rx_space = ALIGN(min_rx_space, 1024);
1652                 min_rx_space >>= 10;
1653
1654                 /* If current Tx allocation is less than the min Tx FIFO size,
1655                  * and the min Tx FIFO size is less than the current Rx FIFO
1656                  * allocation, take space away from current Rx allocation */
1657                 if (tx_space < min_tx_space &&
1658                     ((min_tx_space - tx_space) < pba)) {
1659                         pba = pba - (min_tx_space - tx_space);
1660
1661                         /* if short on rx space, rx wins and must trump tx
1662                          * adjustment */
1663                         if (pba < min_rx_space)
1664                                 pba = min_rx_space;
1665                 }
1666                 wr32(E1000_PBA, pba);
1667         }
1668
1669         /* flow control settings */
1670         /* The high water mark must be low enough to fit one full frame
1671          * (or the size used for early receive) above it in the Rx FIFO.
1672          * Set it to the lower of:
1673          * - 90% of the Rx FIFO size, or
1674          * - the full Rx FIFO size minus one full frame */
1675         hwm = min(((pba << 10) * 9 / 10),
1676                         ((pba << 10) - 2 * adapter->max_frame_size));
1677
1678         fc->high_water = hwm & 0xFFF0;  /* 16-byte granularity */
1679         fc->low_water = fc->high_water - 16;
1680         fc->pause_time = 0xFFFF;
1681         fc->send_xon = 1;
1682         fc->current_mode = fc->requested_mode;
1683
1684         /* disable receive for all VFs and wait one second */
1685         if (adapter->vfs_allocated_count) {
1686                 int i;
1687                 for (i = 0 ; i < adapter->vfs_allocated_count; i++)
1688                         adapter->vf_data[i].flags &= IGB_VF_FLAG_PF_SET_MAC;
1689
1690                 /* ping all the active vfs to let them know we are going down */
1691                 igb_ping_all_vfs(adapter);
1692
1693                 /* disable transmits and receives */
1694                 wr32(E1000_VFRE, 0);
1695                 wr32(E1000_VFTE, 0);
1696         }
1697
1698         /* Allow time for pending master requests to run */
1699         hw->mac.ops.reset_hw(hw);
1700         wr32(E1000_WUC, 0);
1701
1702         if (hw->mac.ops.init_hw(hw))
1703                 dev_err(&pdev->dev, "Hardware Error\n");
1704
1705         /*
1706          * Flow control settings reset on hardware reset, so guarantee flow
1707          * control is off when forcing speed.
1708          */
1709         if (!hw->mac.autoneg)
1710                 igb_force_mac_fc(hw);
1711
1712         igb_init_dmac(adapter, pba);
1713         if (!netif_running(adapter->netdev))
1714                 igb_power_down_link(adapter);
1715
1716         igb_update_mng_vlan(adapter);
1717
1718         /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
1719         wr32(E1000_VET, ETHERNET_IEEE_VLAN_TYPE);
1720
1721 #ifdef CONFIG_IGB_PTP
1722         /* Re-enable PTP, where applicable. */
1723         igb_ptp_reset(adapter);
1724 #endif /* CONFIG_IGB_PTP */
1725
1726         igb_get_phy_info(hw);
1727 }
1728
1729 static netdev_features_t igb_fix_features(struct net_device *netdev,
1730         netdev_features_t features)
1731 {
1732         /*
1733          * Since there is no support for separate rx/tx vlan accel
1734          * enable/disable make sure tx flag is always in same state as rx.
1735          */
1736         if (features & NETIF_F_HW_VLAN_RX)
1737                 features |= NETIF_F_HW_VLAN_TX;
1738         else
1739                 features &= ~NETIF_F_HW_VLAN_TX;
1740
1741         return features;
1742 }
1743
1744 static int igb_set_features(struct net_device *netdev,
1745         netdev_features_t features)
1746 {
1747         netdev_features_t changed = netdev->features ^ features;
1748         struct igb_adapter *adapter = netdev_priv(netdev);
1749
1750         if (changed & NETIF_F_HW_VLAN_RX)
1751                 igb_vlan_mode(netdev, features);
1752
1753         if (!(changed & NETIF_F_RXALL))
1754                 return 0;
1755
1756         netdev->features = features;
1757
1758         if (netif_running(netdev))
1759                 igb_reinit_locked(adapter);
1760         else
1761                 igb_reset(adapter);
1762
1763         return 0;
1764 }
1765
1766 static const struct net_device_ops igb_netdev_ops = {
1767         .ndo_open               = igb_open,
1768         .ndo_stop               = igb_close,
1769         .ndo_start_xmit         = igb_xmit_frame,
1770         .ndo_get_stats64        = igb_get_stats64,
1771         .ndo_set_rx_mode        = igb_set_rx_mode,
1772         .ndo_set_mac_address    = igb_set_mac,
1773         .ndo_change_mtu         = igb_change_mtu,
1774         .ndo_do_ioctl           = igb_ioctl,
1775         .ndo_tx_timeout         = igb_tx_timeout,
1776         .ndo_validate_addr      = eth_validate_addr,
1777         .ndo_vlan_rx_add_vid    = igb_vlan_rx_add_vid,
1778         .ndo_vlan_rx_kill_vid   = igb_vlan_rx_kill_vid,
1779         .ndo_set_vf_mac         = igb_ndo_set_vf_mac,
1780         .ndo_set_vf_vlan        = igb_ndo_set_vf_vlan,
1781         .ndo_set_vf_tx_rate     = igb_ndo_set_vf_bw,
1782         .ndo_get_vf_config      = igb_ndo_get_vf_config,
1783 #ifdef CONFIG_NET_POLL_CONTROLLER
1784         .ndo_poll_controller    = igb_netpoll,
1785 #endif
1786         .ndo_fix_features       = igb_fix_features,
1787         .ndo_set_features       = igb_set_features,
1788 };
1789
1790 /**
1791  * igb_set_fw_version - Configure version string for ethtool
1792  * @adapter: adapter struct
1793  *
1794  **/
1795 void igb_set_fw_version(struct igb_adapter *adapter)
1796 {
1797         struct e1000_hw *hw = &adapter->hw;
1798         u16 eeprom_verh, eeprom_verl, comb_verh, comb_verl, comb_offset;
1799         u16 major, build, patch, fw_version;
1800         u32 etrack_id;
1801
1802         hw->nvm.ops.read(hw, 5, 1, &fw_version);
1803         if (adapter->hw.mac.type != e1000_i211) {
1804                 hw->nvm.ops.read(hw, NVM_ETRACK_WORD, 1, &eeprom_verh);
1805                 hw->nvm.ops.read(hw, (NVM_ETRACK_WORD + 1), 1, &eeprom_verl);
1806                 etrack_id = (eeprom_verh << IGB_ETRACK_SHIFT) | eeprom_verl;
1807
1808                 /* combo image version needs to be found */
1809                 hw->nvm.ops.read(hw, NVM_COMB_VER_PTR, 1, &comb_offset);
1810                 if ((comb_offset != 0x0) &&
1811                     (comb_offset != IGB_NVM_VER_INVALID)) {
1812                         hw->nvm.ops.read(hw, (NVM_COMB_VER_OFF + comb_offset
1813                                          + 1), 1, &comb_verh);
1814                         hw->nvm.ops.read(hw, (NVM_COMB_VER_OFF + comb_offset),
1815                                          1, &comb_verl);
1816
1817                         /* Only display Option Rom if it exists and is valid */
1818                         if ((comb_verh && comb_verl) &&
1819                             ((comb_verh != IGB_NVM_VER_INVALID) &&
1820                              (comb_verl != IGB_NVM_VER_INVALID))) {
1821                                 major = comb_verl >> IGB_COMB_VER_SHFT;
1822                                 build = (comb_verl << IGB_COMB_VER_SHFT) |
1823                                         (comb_verh >> IGB_COMB_VER_SHFT);
1824                                 patch = comb_verh & IGB_COMB_VER_MASK;
1825                                 snprintf(adapter->fw_version,
1826                                          sizeof(adapter->fw_version),
1827                                          "%d.%d%d, 0x%08x, %d.%d.%d",
1828                                          (fw_version & IGB_MAJOR_MASK) >>
1829                                          IGB_MAJOR_SHIFT,
1830                                          (fw_version & IGB_MINOR_MASK) >>
1831                                          IGB_MINOR_SHIFT,
1832                                          (fw_version & IGB_BUILD_MASK),
1833                                          etrack_id, major, build, patch);
1834                                 goto out;
1835                         }
1836                 }
1837                 snprintf(adapter->fw_version, sizeof(adapter->fw_version),
1838                          "%d.%d%d, 0x%08x",
1839                          (fw_version & IGB_MAJOR_MASK) >> IGB_MAJOR_SHIFT,
1840                          (fw_version & IGB_MINOR_MASK) >> IGB_MINOR_SHIFT,
1841                          (fw_version & IGB_BUILD_MASK), etrack_id);
1842         } else {
1843                 snprintf(adapter->fw_version, sizeof(adapter->fw_version),
1844                          "%d.%d%d",
1845                          (fw_version & IGB_MAJOR_MASK) >> IGB_MAJOR_SHIFT,
1846                          (fw_version & IGB_MINOR_MASK) >> IGB_MINOR_SHIFT,
1847                          (fw_version & IGB_BUILD_MASK));
1848         }
1849 out:
1850         return;
1851 }
1852
1853 /**
1854  * igb_probe - Device Initialization Routine
1855  * @pdev: PCI device information struct
1856  * @ent: entry in igb_pci_tbl
1857  *
1858  * Returns 0 on success, negative on failure
1859  *
1860  * igb_probe initializes an adapter identified by a pci_dev structure.
1861  * The OS initialization, configuring of the adapter private structure,
1862  * and a hardware reset occur.
1863  **/
1864 static int __devinit igb_probe(struct pci_dev *pdev,
1865                                const struct pci_device_id *ent)
1866 {
1867         struct net_device *netdev;
1868         struct igb_adapter *adapter;
1869         struct e1000_hw *hw;
1870         u16 eeprom_data = 0;
1871         s32 ret_val;
1872         static int global_quad_port_a; /* global quad port a indication */
1873         const struct e1000_info *ei = igb_info_tbl[ent->driver_data];
1874         unsigned long mmio_start, mmio_len;
1875         int err, pci_using_dac;
1876         u16 eeprom_apme_mask = IGB_EEPROM_APME;
1877         u8 part_str[E1000_PBANUM_LENGTH];
1878
1879         /* Catch broken hardware that put the wrong VF device ID in
1880          * the PCIe SR-IOV capability.
1881          */
1882         if (pdev->is_virtfn) {
1883                 WARN(1, KERN_ERR "%s (%hx:%hx) should not be a VF!\n",
1884                         pci_name(pdev), pdev->vendor, pdev->device);
1885                 return -EINVAL;
1886         }
1887
1888         err = pci_enable_device_mem(pdev);
1889         if (err)
1890                 return err;
1891
1892         pci_using_dac = 0;
1893         err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(64));
1894         if (!err) {
1895                 err = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64));
1896                 if (!err)
1897                         pci_using_dac = 1;
1898         } else {
1899                 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
1900                 if (err) {
1901                         err = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
1902                         if (err) {
1903                                 dev_err(&pdev->dev, "No usable DMA "
1904                                         "configuration, aborting\n");
1905                                 goto err_dma;
1906                         }
1907                 }
1908         }
1909
1910         err = pci_request_selected_regions(pdev, pci_select_bars(pdev,
1911                                            IORESOURCE_MEM),
1912                                            igb_driver_name);
1913         if (err)
1914                 goto err_pci_reg;
1915
1916         pci_enable_pcie_error_reporting(pdev);
1917
1918         pci_set_master(pdev);
1919         pci_save_state(pdev);
1920
1921         err = -ENOMEM;
1922         netdev = alloc_etherdev_mq(sizeof(struct igb_adapter),
1923                                    IGB_MAX_TX_QUEUES);
1924         if (!netdev)
1925                 goto err_alloc_etherdev;
1926
1927         SET_NETDEV_DEV(netdev, &pdev->dev);
1928
1929         pci_set_drvdata(pdev, netdev);
1930         adapter = netdev_priv(netdev);
1931         adapter->netdev = netdev;
1932         adapter->pdev = pdev;
1933         hw = &adapter->hw;
1934         hw->back = adapter;
1935         adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
1936
1937         mmio_start = pci_resource_start(pdev, 0);
1938         mmio_len = pci_resource_len(pdev, 0);
1939
1940         err = -EIO;
1941         hw->hw_addr = ioremap(mmio_start, mmio_len);
1942         if (!hw->hw_addr)
1943                 goto err_ioremap;
1944
1945         netdev->netdev_ops = &igb_netdev_ops;
1946         igb_set_ethtool_ops(netdev);
1947         netdev->watchdog_timeo = 5 * HZ;
1948
1949         strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
1950
1951         netdev->mem_start = mmio_start;
1952         netdev->mem_end = mmio_start + mmio_len;
1953
1954         /* PCI config space info */
1955         hw->vendor_id = pdev->vendor;
1956         hw->device_id = pdev->device;
1957         hw->revision_id = pdev->revision;
1958         hw->subsystem_vendor_id = pdev->subsystem_vendor;
1959         hw->subsystem_device_id = pdev->subsystem_device;
1960
1961         /* Copy the default MAC, PHY and NVM function pointers */
1962         memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
1963         memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
1964         memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
1965         /* Initialize skew-specific constants */
1966         err = ei->get_invariants(hw);
1967         if (err)
1968                 goto err_sw_init;
1969
1970         /* setup the private structure */
1971         err = igb_sw_init(adapter);
1972         if (err)
1973                 goto err_sw_init;
1974
1975         igb_get_bus_info_pcie(hw);
1976
1977         hw->phy.autoneg_wait_to_complete = false;
1978
1979         /* Copper options */
1980         if (hw->phy.media_type == e1000_media_type_copper) {
1981                 hw->phy.mdix = AUTO_ALL_MODES;
1982                 hw->phy.disable_polarity_correction = false;
1983                 hw->phy.ms_type = e1000_ms_hw_default;
1984         }
1985
1986         if (igb_check_reset_block(hw))
1987                 dev_info(&pdev->dev,
1988                         "PHY reset is blocked due to SOL/IDER session.\n");
1989
1990         /*
1991          * features is initialized to 0 in allocation, it might have bits
1992          * set by igb_sw_init so we should use an or instead of an
1993          * assignment.
1994          */
1995         netdev->features |= NETIF_F_SG |
1996                             NETIF_F_IP_CSUM |
1997                             NETIF_F_IPV6_CSUM |
1998                             NETIF_F_TSO |
1999                             NETIF_F_TSO6 |
2000                             NETIF_F_RXHASH |
2001                             NETIF_F_RXCSUM |
2002                             NETIF_F_HW_VLAN_RX |
2003                             NETIF_F_HW_VLAN_TX;
2004
2005         /* copy netdev features into list of user selectable features */
2006         netdev->hw_features |= netdev->features;
2007         netdev->hw_features |= NETIF_F_RXALL;
2008
2009         /* set this bit last since it cannot be part of hw_features */
2010         netdev->features |= NETIF_F_HW_VLAN_FILTER;
2011
2012         netdev->vlan_features |= NETIF_F_TSO |
2013                                  NETIF_F_TSO6 |
2014                                  NETIF_F_IP_CSUM |
2015                                  NETIF_F_IPV6_CSUM |
2016                                  NETIF_F_SG;
2017
2018         netdev->priv_flags |= IFF_SUPP_NOFCS;
2019
2020         if (pci_using_dac) {
2021                 netdev->features |= NETIF_F_HIGHDMA;
2022                 netdev->vlan_features |= NETIF_F_HIGHDMA;
2023         }
2024
2025         if (hw->mac.type >= e1000_82576) {
2026                 netdev->hw_features |= NETIF_F_SCTP_CSUM;
2027                 netdev->features |= NETIF_F_SCTP_CSUM;
2028         }
2029
2030         netdev->priv_flags |= IFF_UNICAST_FLT;
2031
2032         adapter->en_mng_pt = igb_enable_mng_pass_thru(hw);
2033
2034         /* before reading the NVM, reset the controller to put the device in a
2035          * known good starting state */
2036         hw->mac.ops.reset_hw(hw);
2037
2038         /*
2039          * make sure the NVM is good , i211 parts have special NVM that
2040          * doesn't contain a checksum
2041          */
2042         if (hw->mac.type != e1000_i211) {
2043                 if (hw->nvm.ops.validate(hw) < 0) {
2044                         dev_err(&pdev->dev, "The NVM Checksum Is Not Valid\n");
2045                         err = -EIO;
2046                         goto err_eeprom;
2047                 }
2048         }
2049
2050         /* copy the MAC address out of the NVM */
2051         if (hw->mac.ops.read_mac_addr(hw))
2052                 dev_err(&pdev->dev, "NVM Read Error\n");
2053
2054         memcpy(netdev->dev_addr, hw->mac.addr, netdev->addr_len);
2055         memcpy(netdev->perm_addr, hw->mac.addr, netdev->addr_len);
2056
2057         if (!is_valid_ether_addr(netdev->perm_addr)) {
2058                 dev_err(&pdev->dev, "Invalid MAC Address\n");
2059                 err = -EIO;
2060                 goto err_eeprom;
2061         }
2062
2063         /* get firmware version for ethtool -i */
2064         igb_set_fw_version(adapter);
2065
2066         setup_timer(&adapter->watchdog_timer, igb_watchdog,
2067                     (unsigned long) adapter);
2068         setup_timer(&adapter->phy_info_timer, igb_update_phy_info,
2069                     (unsigned long) adapter);
2070
2071         INIT_WORK(&adapter->reset_task, igb_reset_task);
2072         INIT_WORK(&adapter->watchdog_task, igb_watchdog_task);
2073
2074         /* Initialize link properties that are user-changeable */
2075         adapter->fc_autoneg = true;
2076         hw->mac.autoneg = true;
2077         hw->phy.autoneg_advertised = 0x2f;
2078
2079         hw->fc.requested_mode = e1000_fc_default;
2080         hw->fc.current_mode = e1000_fc_default;
2081
2082         igb_validate_mdi_setting(hw);
2083
2084         /* Initial Wake on LAN setting If APM wake is enabled in the EEPROM,
2085          * enable the ACPI Magic Packet filter
2086          */
2087
2088         if (hw->bus.func == 0)
2089                 hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
2090         else if (hw->mac.type >= e1000_82580)
2091                 hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_A +
2092                                  NVM_82580_LAN_FUNC_OFFSET(hw->bus.func), 1,
2093                                  &eeprom_data);
2094         else if (hw->bus.func == 1)
2095                 hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
2096
2097         if (eeprom_data & eeprom_apme_mask)
2098                 adapter->eeprom_wol |= E1000_WUFC_MAG;
2099
2100         /* now that we have the eeprom settings, apply the special cases where
2101          * the eeprom may be wrong or the board simply won't support wake on
2102          * lan on a particular port */
2103         switch (pdev->device) {
2104         case E1000_DEV_ID_82575GB_QUAD_COPPER:
2105                 adapter->eeprom_wol = 0;
2106                 break;
2107         case E1000_DEV_ID_82575EB_FIBER_SERDES:
2108         case E1000_DEV_ID_82576_FIBER:
2109         case E1000_DEV_ID_82576_SERDES:
2110                 /* Wake events only supported on port A for dual fiber
2111                  * regardless of eeprom setting */
2112                 if (rd32(E1000_STATUS) & E1000_STATUS_FUNC_1)
2113                         adapter->eeprom_wol = 0;
2114                 break;
2115         case E1000_DEV_ID_82576_QUAD_COPPER:
2116         case E1000_DEV_ID_82576_QUAD_COPPER_ET2:
2117                 /* if quad port adapter, disable WoL on all but port A */
2118                 if (global_quad_port_a != 0)
2119                         adapter->eeprom_wol = 0;
2120                 else
2121                         adapter->flags |= IGB_FLAG_QUAD_PORT_A;
2122                 /* Reset for multiple quad port adapters */
2123                 if (++global_quad_port_a == 4)
2124                         global_quad_port_a = 0;
2125                 break;
2126         }
2127
2128         /* initialize the wol settings based on the eeprom settings */
2129         adapter->wol = adapter->eeprom_wol;
2130         device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
2131
2132         /* reset the hardware with the new settings */
2133         igb_reset(adapter);
2134
2135         /* let the f/w know that the h/w is now under the control of the
2136          * driver. */
2137         igb_get_hw_control(adapter);
2138
2139         strcpy(netdev->name, "eth%d");
2140         err = register_netdev(netdev);
2141         if (err)
2142                 goto err_register;
2143
2144         /* carrier off reporting is important to ethtool even BEFORE open */
2145         netif_carrier_off(netdev);
2146
2147 #ifdef CONFIG_IGB_DCA
2148         if (dca_add_requester(&pdev->dev) == 0) {
2149                 adapter->flags |= IGB_FLAG_DCA_ENABLED;
2150                 dev_info(&pdev->dev, "DCA enabled\n");
2151                 igb_setup_dca(adapter);
2152         }
2153
2154 #endif
2155
2156 #ifdef CONFIG_IGB_PTP
2157         /* do hw tstamp init after resetting */
2158         igb_ptp_init(adapter);
2159 #endif /* CONFIG_IGB_PTP */
2160
2161         dev_info(&pdev->dev, "Intel(R) Gigabit Ethernet Network Connection\n");
2162         /* print bus type/speed/width info */
2163         dev_info(&pdev->dev, "%s: (PCIe:%s:%s) %pM\n",
2164                  netdev->name,
2165                  ((hw->bus.speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
2166                   (hw->bus.speed == e1000_bus_speed_5000) ? "5.0Gb/s" :
2167                                                             "unknown"),
2168                  ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" :
2169                   (hw->bus.width == e1000_bus_width_pcie_x2) ? "Width x2" :
2170                   (hw->bus.width == e1000_bus_width_pcie_x1) ? "Width x1" :
2171                    "unknown"),
2172                  netdev->dev_addr);
2173
2174         ret_val = igb_read_part_string(hw, part_str, E1000_PBANUM_LENGTH);
2175         if (ret_val)
2176                 strcpy(part_str, "Unknown");
2177         dev_info(&pdev->dev, "%s: PBA No: %s\n", netdev->name, part_str);
2178         dev_info(&pdev->dev,
2179                 "Using %s interrupts. %d rx queue(s), %d tx queue(s)\n",
2180                 adapter->msix_entries ? "MSI-X" :
2181                 (adapter->flags & IGB_FLAG_HAS_MSI) ? "MSI" : "legacy",
2182                 adapter->num_rx_queues, adapter->num_tx_queues);
2183         switch (hw->mac.type) {
2184         case e1000_i350:
2185         case e1000_i210:
2186         case e1000_i211:
2187                 igb_set_eee_i350(hw);
2188                 break;
2189         default:
2190                 break;
2191         }
2192
2193         pm_runtime_put_noidle(&pdev->dev);
2194         return 0;
2195
2196 err_register:
2197         igb_release_hw_control(adapter);
2198 err_eeprom:
2199         if (!igb_check_reset_block(hw))
2200                 igb_reset_phy(hw);
2201
2202         if (hw->flash_address)
2203                 iounmap(hw->flash_address);
2204 err_sw_init:
2205         igb_clear_interrupt_scheme(adapter);
2206         iounmap(hw->hw_addr);
2207 err_ioremap:
2208         free_netdev(netdev);
2209 err_alloc_etherdev:
2210         pci_release_selected_regions(pdev,
2211                                      pci_select_bars(pdev, IORESOURCE_MEM));
2212 err_pci_reg:
2213 err_dma:
2214         pci_disable_device(pdev);
2215         return err;
2216 }
2217
2218 /**
2219  * igb_remove - Device Removal Routine
2220  * @pdev: PCI device information struct
2221  *
2222  * igb_remove is called by the PCI subsystem to alert the driver
2223  * that it should release a PCI device.  The could be caused by a
2224  * Hot-Plug event, or because the driver is going to be removed from
2225  * memory.
2226  **/
2227 static void __devexit igb_remove(struct pci_dev *pdev)
2228 {
2229         struct net_device *netdev = pci_get_drvdata(pdev);
2230         struct igb_adapter *adapter = netdev_priv(netdev);
2231         struct e1000_hw *hw = &adapter->hw;
2232
2233         pm_runtime_get_noresume(&pdev->dev);
2234 #ifdef CONFIG_IGB_PTP
2235         igb_ptp_stop(adapter);
2236 #endif /* CONFIG_IGB_PTP */
2237
2238         /*
2239          * The watchdog timer may be rescheduled, so explicitly
2240          * disable watchdog from being rescheduled.
2241          */
2242         set_bit(__IGB_DOWN, &adapter->state);
2243         del_timer_sync(&adapter->watchdog_timer);
2244         del_timer_sync(&adapter->phy_info_timer);
2245
2246         cancel_work_sync(&adapter->reset_task);
2247         cancel_work_sync(&adapter->watchdog_task);
2248
2249 #ifdef CONFIG_IGB_DCA
2250         if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
2251                 dev_info(&pdev->dev, "DCA disabled\n");
2252                 dca_remove_requester(&pdev->dev);
2253                 adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
2254                 wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_DISABLE);
2255         }
2256 #endif
2257
2258         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
2259          * would have already happened in close and is redundant. */
2260         igb_release_hw_control(adapter);
2261
2262         unregister_netdev(netdev);
2263
2264         igb_clear_interrupt_scheme(adapter);
2265
2266 #ifdef CONFIG_PCI_IOV
2267         /* reclaim resources allocated to VFs */
2268         if (adapter->vf_data) {
2269                 /* disable iov and allow time for transactions to clear */
2270                 if (igb_vfs_are_assigned(adapter)) {
2271                         dev_info(&pdev->dev, "Unloading driver while VFs are assigned - VFs will not be deallocated\n");
2272                 } else {
2273                         pci_disable_sriov(pdev);
2274                         msleep(500);
2275                 }
2276
2277                 kfree(adapter->vf_data);
2278                 adapter->vf_data = NULL;
2279                 wr32(E1000_IOVCTL, E1000_IOVCTL_REUSE_VFQ);
2280                 wrfl();
2281                 msleep(100);
2282                 dev_info(&pdev->dev, "IOV Disabled\n");
2283         }
2284 #endif
2285
2286         iounmap(hw->hw_addr);
2287         if (hw->flash_address)
2288                 iounmap(hw->flash_address);
2289         pci_release_selected_regions(pdev,
2290                                      pci_select_bars(pdev, IORESOURCE_MEM));
2291
2292         kfree(adapter->shadow_vfta);
2293         free_netdev(netdev);
2294
2295         pci_disable_pcie_error_reporting(pdev);
2296
2297         pci_disable_device(pdev);
2298 }
2299
2300 /**
2301  * igb_probe_vfs - Initialize vf data storage and add VFs to pci config space
2302  * @adapter: board private structure to initialize
2303  *
2304  * This function initializes the vf specific data storage and then attempts to
2305  * allocate the VFs.  The reason for ordering it this way is because it is much
2306  * mor expensive time wise to disable SR-IOV than it is to allocate and free
2307  * the memory for the VFs.
2308  **/
2309 static void __devinit igb_probe_vfs(struct igb_adapter * adapter)
2310 {
2311 #ifdef CONFIG_PCI_IOV
2312         struct pci_dev *pdev = adapter->pdev;
2313         struct e1000_hw *hw = &adapter->hw;
2314         int old_vfs = pci_num_vf(adapter->pdev);
2315         int i;
2316
2317         /* Virtualization features not supported on i210 family. */
2318         if ((hw->mac.type == e1000_i210) || (hw->mac.type == e1000_i211))
2319                 return;
2320
2321         if (old_vfs) {
2322                 dev_info(&pdev->dev, "%d pre-allocated VFs found - override "
2323                          "max_vfs setting of %d\n", old_vfs, max_vfs);
2324                 adapter->vfs_allocated_count = old_vfs;
2325         }
2326
2327         if (!adapter->vfs_allocated_count)
2328                 return;
2329
2330         adapter->vf_data = kcalloc(adapter->vfs_allocated_count,
2331                                 sizeof(struct vf_data_storage), GFP_KERNEL);
2332
2333         /* if allocation failed then we do not support SR-IOV */
2334         if (!adapter->vf_data) {
2335                 adapter->vfs_allocated_count = 0;
2336                 dev_err(&pdev->dev, "Unable to allocate memory for VF "
2337                         "Data Storage\n");
2338                 goto out;
2339         }
2340
2341         if (!old_vfs) {
2342                 if (pci_enable_sriov(pdev, adapter->vfs_allocated_count))
2343                         goto err_out;
2344         }
2345         dev_info(&pdev->dev, "%d VFs allocated\n",
2346                  adapter->vfs_allocated_count);
2347         for (i = 0; i < adapter->vfs_allocated_count; i++)
2348                 igb_vf_configure(adapter, i);
2349
2350         /* DMA Coalescing is not supported in IOV mode. */
2351         adapter->flags &= ~IGB_FLAG_DMAC;
2352         goto out;
2353 err_out:
2354         kfree(adapter->vf_data);
2355         adapter->vf_data = NULL;
2356         adapter->vfs_allocated_count = 0;
2357 out:
2358         return;
2359 #endif /* CONFIG_PCI_IOV */
2360 }
2361
2362 /**
2363  * igb_sw_init - Initialize general software structures (struct igb_adapter)
2364  * @adapter: board private structure to initialize
2365  *
2366  * igb_sw_init initializes the Adapter private data structure.
2367  * Fields are initialized based on PCI device information and
2368  * OS network device settings (MTU size).
2369  **/
2370 static int __devinit igb_sw_init(struct igb_adapter *adapter)
2371 {
2372         struct e1000_hw *hw = &adapter->hw;
2373         struct net_device *netdev = adapter->netdev;
2374         struct pci_dev *pdev = adapter->pdev;
2375         u32 max_rss_queues;
2376
2377         pci_read_config_word(pdev, PCI_COMMAND, &hw->bus.pci_cmd_word);
2378
2379         /* set default ring sizes */
2380         adapter->tx_ring_count = IGB_DEFAULT_TXD;
2381         adapter->rx_ring_count = IGB_DEFAULT_RXD;
2382
2383         /* set default ITR values */
2384         adapter->rx_itr_setting = IGB_DEFAULT_ITR;
2385         adapter->tx_itr_setting = IGB_DEFAULT_ITR;
2386
2387         /* set default work limits */
2388         adapter->tx_work_limit = IGB_DEFAULT_TX_WORK;
2389
2390         adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN +
2391                                   VLAN_HLEN;
2392         adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
2393
2394         spin_lock_init(&adapter->stats64_lock);
2395 #ifdef CONFIG_PCI_IOV
2396         switch (hw->mac.type) {
2397         case e1000_82576:
2398         case e1000_i350:
2399                 if (max_vfs > 7) {
2400                         dev_warn(&pdev->dev,
2401                                  "Maximum of 7 VFs per PF, using max\n");
2402                         adapter->vfs_allocated_count = 7;
2403                 } else
2404                         adapter->vfs_allocated_count = max_vfs;
2405                 break;
2406         default:
2407                 break;
2408         }
2409 #endif /* CONFIG_PCI_IOV */
2410
2411         /* Determine the maximum number of RSS queues supported. */
2412         switch (hw->mac.type) {
2413         case e1000_i211:
2414                 max_rss_queues = IGB_MAX_RX_QUEUES_I211;
2415                 break;
2416         case e1000_82575:
2417         case e1000_i210:
2418                 max_rss_queues = IGB_MAX_RX_QUEUES_82575;
2419                 break;
2420         case e1000_i350:
2421                 /* I350 cannot do RSS and SR-IOV at the same time */
2422                 if (!!adapter->vfs_allocated_count) {
2423                         max_rss_queues = 1;
2424                         break;
2425                 }
2426                 /* fall through */
2427         case e1000_82576:
2428                 if (!!adapter->vfs_allocated_count) {
2429                         max_rss_queues = 2;
2430                         break;
2431                 }
2432                 /* fall through */
2433         case e1000_82580:
2434         default:
2435                 max_rss_queues = IGB_MAX_RX_QUEUES;
2436                 break;
2437         }
2438
2439         adapter->rss_queues = min_t(u32, max_rss_queues, num_online_cpus());
2440
2441         /* Determine if we need to pair queues. */
2442         switch (hw->mac.type) {
2443         case e1000_82575:
2444         case e1000_i211:
2445                 /* Device supports enough interrupts without queue pairing. */
2446                 break;
2447         case e1000_82576:
2448                 /*
2449                  * If VFs are going to be allocated with RSS queues then we
2450                  * should pair the queues in order to conserve interrupts due
2451                  * to limited supply.
2452                  */
2453                 if ((adapter->rss_queues > 1) &&
2454                     (adapter->vfs_allocated_count > 6))
2455                         adapter->flags |= IGB_FLAG_QUEUE_PAIRS;
2456                 /* fall through */
2457         case e1000_82580:
2458         case e1000_i350:
2459         case e1000_i210:
2460         default:
2461                 /*
2462                  * If rss_queues > half of max_rss_queues, pair the queues in
2463                  * order to conserve interrupts due to limited supply.
2464                  */
2465                 if (adapter->rss_queues > (max_rss_queues / 2))
2466                         adapter->flags |= IGB_FLAG_QUEUE_PAIRS;
2467                 break;
2468         }
2469
2470         /* Setup and initialize a copy of the hw vlan table array */
2471         adapter->shadow_vfta = kzalloc(sizeof(u32) *
2472                                 E1000_VLAN_FILTER_TBL_SIZE,
2473                                 GFP_ATOMIC);
2474
2475         /* This call may decrease the number of queues */
2476         if (igb_init_interrupt_scheme(adapter)) {
2477                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
2478                 return -ENOMEM;
2479         }
2480
2481         igb_probe_vfs(adapter);
2482
2483         /* Explicitly disable IRQ since the NIC can be in any state. */
2484         igb_irq_disable(adapter);
2485
2486         if (hw->mac.type >= e1000_i350)
2487                 adapter->flags &= ~IGB_FLAG_DMAC;
2488
2489         set_bit(__IGB_DOWN, &adapter->state);
2490         return 0;
2491 }
2492
2493 /**
2494  * igb_open - Called when a network interface is made active
2495  * @netdev: network interface device structure
2496  *
2497  * Returns 0 on success, negative value on failure
2498  *
2499  * The open entry point is called when a network interface is made
2500  * active by the system (IFF_UP).  At this point all resources needed
2501  * for transmit and receive operations are allocated, the interrupt
2502  * handler is registered with the OS, the watchdog timer is started,
2503  * and the stack is notified that the interface is ready.
2504  **/
2505 static int __igb_open(struct net_device *netdev, bool resuming)
2506 {
2507         struct igb_adapter *adapter = netdev_priv(netdev);
2508         struct e1000_hw *hw = &adapter->hw;
2509         struct pci_dev *pdev = adapter->pdev;
2510         int err;
2511         int i;
2512
2513         /* disallow open during test */
2514         if (test_bit(__IGB_TESTING, &adapter->state)) {
2515                 WARN_ON(resuming);
2516                 return -EBUSY;
2517         }
2518
2519         if (!resuming)
2520                 pm_runtime_get_sync(&pdev->dev);
2521
2522         netif_carrier_off(netdev);
2523
2524         /* allocate transmit descriptors */
2525         err = igb_setup_all_tx_resources(adapter);
2526         if (err)
2527                 goto err_setup_tx;
2528
2529         /* allocate receive descriptors */
2530         err = igb_setup_all_rx_resources(adapter);
2531         if (err)
2532                 goto err_setup_rx;
2533
2534         igb_power_up_link(adapter);
2535
2536         /* before we allocate an interrupt, we must be ready to handle it.
2537          * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
2538          * as soon as we call pci_request_irq, so we have to setup our
2539          * clean_rx handler before we do so.  */
2540         igb_configure(adapter);
2541
2542         err = igb_request_irq(adapter);
2543         if (err)
2544                 goto err_req_irq;
2545
2546         /* From here on the code is the same as igb_up() */
2547         clear_bit(__IGB_DOWN, &adapter->state);
2548
2549         for (i = 0; i < adapter->num_q_vectors; i++)
2550                 napi_enable(&(adapter->q_vector[i]->napi));
2551
2552         /* Clear any pending interrupts. */
2553         rd32(E1000_ICR);
2554
2555         igb_irq_enable(adapter);
2556
2557         /* notify VFs that reset has been completed */
2558         if (adapter->vfs_allocated_count) {
2559                 u32 reg_data = rd32(E1000_CTRL_EXT);
2560                 reg_data |= E1000_CTRL_EXT_PFRSTD;
2561                 wr32(E1000_CTRL_EXT, reg_data);
2562         }
2563
2564         netif_tx_start_all_queues(netdev);
2565
2566         if (!resuming)
2567                 pm_runtime_put(&pdev->dev);
2568
2569         /* start the watchdog. */
2570         hw->mac.get_link_status = 1;
2571         schedule_work(&adapter->watchdog_task);
2572
2573         return 0;
2574
2575 err_req_irq:
2576         igb_release_hw_control(adapter);
2577         igb_power_down_link(adapter);
2578         igb_free_all_rx_resources(adapter);
2579 err_setup_rx:
2580         igb_free_all_tx_resources(adapter);
2581 err_setup_tx:
2582         igb_reset(adapter);
2583         if (!resuming)
2584                 pm_runtime_put(&pdev->dev);
2585
2586         return err;
2587 }
2588
2589 static int igb_open(struct net_device *netdev)
2590 {
2591         return __igb_open(netdev, false);
2592 }
2593
2594 /**
2595  * igb_close - Disables a network interface
2596  * @netdev: network interface device structure
2597  *
2598  * Returns 0, this is not allowed to fail
2599  *
2600  * The close entry point is called when an interface is de-activated
2601  * by the OS.  The hardware is still under the driver's control, but
2602  * needs to be disabled.  A global MAC reset is issued to stop the
2603  * hardware, and all transmit and receive resources are freed.
2604  **/
2605 static int __igb_close(struct net_device *netdev, bool suspending)
2606 {
2607         struct igb_adapter *adapter = netdev_priv(netdev);
2608         struct pci_dev *pdev = adapter->pdev;
2609
2610         WARN_ON(test_bit(__IGB_RESETTING, &adapter->state));
2611
2612         if (!suspending)
2613                 pm_runtime_get_sync(&pdev->dev);
2614
2615         igb_down(adapter);
2616         igb_free_irq(adapter);
2617
2618         igb_free_all_tx_resources(adapter);
2619         igb_free_all_rx_resources(adapter);
2620
2621         if (!suspending)
2622                 pm_runtime_put_sync(&pdev->dev);
2623         return 0;
2624 }
2625
2626 static int igb_close(struct net_device *netdev)
2627 {
2628         return __igb_close(netdev, false);
2629 }
2630
2631 /**
2632  * igb_setup_tx_resources - allocate Tx resources (Descriptors)
2633  * @tx_ring: tx descriptor ring (for a specific queue) to setup
2634  *
2635  * Return 0 on success, negative on failure
2636  **/
2637 int igb_setup_tx_resources(struct igb_ring *tx_ring)
2638 {
2639         struct device *dev = tx_ring->dev;
2640         int size;
2641
2642         size = sizeof(struct igb_tx_buffer) * tx_ring->count;
2643
2644         tx_ring->tx_buffer_info = vzalloc(size);
2645         if (!tx_ring->tx_buffer_info)
2646                 goto err;
2647
2648         /* round up to nearest 4K */
2649         tx_ring->size = tx_ring->count * sizeof(union e1000_adv_tx_desc);
2650         tx_ring->size = ALIGN(tx_ring->size, 4096);
2651
2652         tx_ring->desc = dma_alloc_coherent(dev, tx_ring->size,
2653                                            &tx_ring->dma, GFP_KERNEL);
2654         if (!tx_ring->desc)
2655                 goto err;
2656
2657         tx_ring->next_to_use = 0;
2658         tx_ring->next_to_clean = 0;
2659
2660         return 0;
2661
2662 err:
2663         vfree(tx_ring->tx_buffer_info);
2664         tx_ring->tx_buffer_info = NULL;
2665         dev_err(dev, "Unable to allocate memory for the Tx descriptor ring\n");
2666         return -ENOMEM;
2667 }
2668
2669 /**
2670  * igb_setup_all_tx_resources - wrapper to allocate Tx resources
2671  *                                (Descriptors) for all queues
2672  * @adapter: board private structure
2673  *
2674  * Return 0 on success, negative on failure
2675  **/
2676 static int igb_setup_all_tx_resources(struct igb_adapter *adapter)
2677 {
2678         struct pci_dev *pdev = adapter->pdev;
2679         int i, err = 0;
2680
2681         for (i = 0; i < adapter->num_tx_queues; i++) {
2682                 err = igb_setup_tx_resources(adapter->tx_ring[i]);
2683                 if (err) {
2684                         dev_err(&pdev->dev,
2685                                 "Allocation for Tx Queue %u failed\n", i);
2686                         for (i--; i >= 0; i--)
2687                                 igb_free_tx_resources(adapter->tx_ring[i]);
2688                         break;
2689                 }
2690         }
2691
2692         return err;
2693 }
2694
2695 /**
2696  * igb_setup_tctl - configure the transmit control registers
2697  * @adapter: Board private structure
2698  **/
2699 void igb_setup_tctl(struct igb_adapter *adapter)
2700 {
2701         struct e1000_hw *hw = &adapter->hw;
2702         u32 tctl;
2703
2704         /* disable queue 0 which is enabled by default on 82575 and 82576 */
2705         wr32(E1000_TXDCTL(0), 0);
2706
2707         /* Program the Transmit Control Register */
2708         tctl = rd32(E1000_TCTL);
2709         tctl &= ~E1000_TCTL_CT;
2710         tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
2711                 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
2712
2713         igb_config_collision_dist(hw);
2714
2715         /* Enable transmits */
2716         tctl |= E1000_TCTL_EN;
2717
2718         wr32(E1000_TCTL, tctl);
2719 }
2720
2721 /**
2722  * igb_configure_tx_ring - Configure transmit ring after Reset
2723  * @adapter: board private structure
2724  * @ring: tx ring to configure
2725  *
2726  * Configure a transmit ring after a reset.
2727  **/
2728 void igb_configure_tx_ring(struct igb_adapter *adapter,
2729                            struct igb_ring *ring)
2730 {
2731         struct e1000_hw *hw = &adapter->hw;
2732         u32 txdctl = 0;
2733         u64 tdba = ring->dma;
2734         int reg_idx = ring->reg_idx;
2735
2736         /* disable the queue */
2737         wr32(E1000_TXDCTL(reg_idx), 0);
2738         wrfl();
2739         mdelay(10);
2740
2741         wr32(E1000_TDLEN(reg_idx),
2742                         ring->count * sizeof(union e1000_adv_tx_desc));
2743         wr32(E1000_TDBAL(reg_idx),
2744                         tdba & 0x00000000ffffffffULL);
2745         wr32(E1000_TDBAH(reg_idx), tdba >> 32);
2746
2747         ring->tail = hw->hw_addr + E1000_TDT(reg_idx);
2748         wr32(E1000_TDH(reg_idx), 0);
2749         writel(0, ring->tail);
2750
2751         txdctl |= IGB_TX_PTHRESH;
2752         txdctl |= IGB_TX_HTHRESH << 8;
2753         txdctl |= IGB_TX_WTHRESH << 16;
2754
2755         txdctl |= E1000_TXDCTL_QUEUE_ENABLE;
2756         wr32(E1000_TXDCTL(reg_idx), txdctl);
2757 }
2758
2759 /**
2760  * igb_configure_tx - Configure transmit Unit after Reset
2761  * @adapter: board private structure
2762  *
2763  * Configure the Tx unit of the MAC after a reset.
2764  **/
2765 static void igb_configure_tx(struct igb_adapter *adapter)
2766 {
2767         int i;
2768
2769         for (i = 0; i < adapter->num_tx_queues; i++)
2770                 igb_configure_tx_ring(adapter, adapter->tx_ring[i]);
2771 }
2772
2773 /**
2774  * igb_setup_rx_resources - allocate Rx resources (Descriptors)
2775  * @rx_ring:    rx descriptor ring (for a specific queue) to setup
2776  *
2777  * Returns 0 on success, negative on failure
2778  **/
2779 int igb_setup_rx_resources(struct igb_ring *rx_ring)
2780 {
2781         struct device *dev = rx_ring->dev;
2782         int size;
2783
2784         size = sizeof(struct igb_rx_buffer) * rx_ring->count;
2785
2786         rx_ring->rx_buffer_info = vzalloc(size);
2787         if (!rx_ring->rx_buffer_info)
2788                 goto err;
2789
2790         /* Round up to nearest 4K */
2791         rx_ring->size = rx_ring->count * sizeof(union e1000_adv_rx_desc);
2792         rx_ring->size = ALIGN(rx_ring->size, 4096);
2793
2794         rx_ring->desc = dma_alloc_coherent(dev, rx_ring->size,
2795                                            &rx_ring->dma, GFP_KERNEL);
2796         if (!rx_ring->desc)
2797                 goto err;
2798
2799         rx_ring->next_to_alloc = 0;
2800         rx_ring->next_to_clean = 0;
2801         rx_ring->next_to_use = 0;
2802
2803         return 0;
2804
2805 err:
2806         vfree(rx_ring->rx_buffer_info);
2807         rx_ring->rx_buffer_info = NULL;
2808         dev_err(dev, "Unable to allocate memory for the Rx descriptor ring\n");
2809         return -ENOMEM;
2810 }
2811
2812 /**
2813  * igb_setup_all_rx_resources - wrapper to allocate Rx resources
2814  *                                (Descriptors) for all queues
2815  * @adapter: board private structure
2816  *
2817  * Return 0 on success, negative on failure
2818  **/
2819 static int igb_setup_all_rx_resources(struct igb_adapter *adapter)
2820 {
2821         struct pci_dev *pdev = adapter->pdev;
2822         int i, err = 0;
2823
2824         for (i = 0; i < adapter->num_rx_queues; i++) {
2825                 err = igb_setup_rx_resources(adapter->rx_ring[i]);
2826                 if (err) {
2827                         dev_err(&pdev->dev,
2828                                 "Allocation for Rx Queue %u failed\n", i);
2829                         for (i--; i >= 0; i--)
2830                                 igb_free_rx_resources(adapter->rx_ring[i]);
2831                         break;
2832                 }
2833         }
2834
2835         return err;
2836 }
2837
2838 /**
2839  * igb_setup_mrqc - configure the multiple receive queue control registers
2840  * @adapter: Board private structure
2841  **/
2842 static void igb_setup_mrqc(struct igb_adapter *adapter)
2843 {
2844         struct e1000_hw *hw = &adapter->hw;
2845         u32 mrqc, rxcsum;
2846         u32 j, num_rx_queues, shift = 0;
2847         static const u32 rsskey[10] = { 0xDA565A6D, 0xC20E5B25, 0x3D256741,
2848                                         0xB08FA343, 0xCB2BCAD0, 0xB4307BAE,
2849                                         0xA32DCB77, 0x0CF23080, 0x3BB7426A,
2850                                         0xFA01ACBE };
2851
2852         /* Fill out hash function seeds */
2853         for (j = 0; j < 10; j++)
2854                 wr32(E1000_RSSRK(j), rsskey[j]);
2855
2856         num_rx_queues = adapter->rss_queues;
2857
2858         switch (hw->mac.type) {
2859         case e1000_82575:
2860                 shift = 6;
2861                 break;
2862         case e1000_82576:
2863                 /* 82576 supports 2 RSS queues for SR-IOV */
2864                 if (adapter->vfs_allocated_count) {
2865                         shift = 3;
2866                         num_rx_queues = 2;
2867                 }
2868                 break;
2869         default:
2870                 break;
2871         }
2872
2873         /*
2874          * Populate the indirection table 4 entries at a time.  To do this
2875          * we are generating the results for n and n+2 and then interleaving
2876          * those with the results with n+1 and n+3.
2877          */
2878         for (j = 0; j < 32; j++) {
2879                 /* first pass generates n and n+2 */
2880                 u32 base = ((j * 0x00040004) + 0x00020000) * num_rx_queues;
2881                 u32 reta = (base & 0x07800780) >> (7 - shift);
2882
2883                 /* second pass generates n+1 and n+3 */
2884                 base += 0x00010001 * num_rx_queues;
2885                 reta |= (base & 0x07800780) << (1 + shift);
2886
2887                 wr32(E1000_RETA(j), reta);
2888         }
2889
2890         /*
2891          * Disable raw packet checksumming so that RSS hash is placed in
2892          * descriptor on writeback.  No need to enable TCP/UDP/IP checksum
2893          * offloads as they are enabled by default
2894          */
2895         rxcsum = rd32(E1000_RXCSUM);
2896         rxcsum |= E1000_RXCSUM_PCSD;
2897
2898         if (adapter->hw.mac.type >= e1000_82576)
2899                 /* Enable Receive Checksum Offload for SCTP */
2900                 rxcsum |= E1000_RXCSUM_CRCOFL;
2901
2902         /* Don't need to set TUOFL or IPOFL, they default to 1 */
2903         wr32(E1000_RXCSUM, rxcsum);
2904         /*
2905          * Generate RSS hash based on TCP port numbers and/or
2906          * IPv4/v6 src and dst addresses since UDP cannot be
2907          * hashed reliably due to IP fragmentation
2908          */
2909
2910         mrqc = E1000_MRQC_RSS_FIELD_IPV4 |
2911                E1000_MRQC_RSS_FIELD_IPV4_TCP |
2912                E1000_MRQC_RSS_FIELD_IPV6 |
2913                E1000_MRQC_RSS_FIELD_IPV6_TCP |
2914                E1000_MRQC_RSS_FIELD_IPV6_TCP_EX;
2915
2916         /* If VMDq is enabled then we set the appropriate mode for that, else
2917          * we default to RSS so that an RSS hash is calculated per packet even
2918          * if we are only using one queue */
2919         if (adapter->vfs_allocated_count) {
2920                 if (hw->mac.type > e1000_82575) {
2921                         /* Set the default pool for the PF's first queue */
2922                         u32 vtctl = rd32(E1000_VT_CTL);
2923                         vtctl &= ~(E1000_VT_CTL_DEFAULT_POOL_MASK |
2924                                    E1000_VT_CTL_DISABLE_DEF_POOL);
2925                         vtctl |= adapter->vfs_allocated_count <<
2926                                 E1000_VT_CTL_DEFAULT_POOL_SHIFT;
2927                         wr32(E1000_VT_CTL, vtctl);
2928                 }
2929                 if (adapter->rss_queues > 1)
2930                         mrqc |= E1000_MRQC_ENABLE_VMDQ_RSS_2Q;
2931                 else
2932                         mrqc |= E1000_MRQC_ENABLE_VMDQ;
2933         } else {
2934                 if (hw->mac.type != e1000_i211)
2935                         mrqc |= E1000_MRQC_ENABLE_RSS_4Q;
2936         }
2937         igb_vmm_control(adapter);
2938
2939         wr32(E1000_MRQC, mrqc);
2940 }
2941
2942 /**
2943  * igb_setup_rctl - configure the receive control registers
2944  * @adapter: Board private structure
2945  **/
2946 void igb_setup_rctl(struct igb_adapter *adapter)
2947 {
2948         struct e1000_hw *hw = &adapter->hw;
2949         u32 rctl;
2950
2951         rctl = rd32(E1000_RCTL);
2952
2953         rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
2954         rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
2955
2956         rctl |= E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_RDMTS_HALF |
2957                 (hw->mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
2958
2959         /*
2960          * enable stripping of CRC. It's unlikely this will break BMC
2961          * redirection as it did with e1000. Newer features require
2962          * that the HW strips the CRC.
2963          */
2964         rctl |= E1000_RCTL_SECRC;
2965
2966         /* disable store bad packets and clear size bits. */
2967         rctl &= ~(E1000_RCTL_SBP | E1000_RCTL_SZ_256);
2968
2969         /* enable LPE to prevent packets larger than max_frame_size */
2970         rctl |= E1000_RCTL_LPE;
2971
2972         /* disable queue 0 to prevent tail write w/o re-config */
2973         wr32(E1000_RXDCTL(0), 0);
2974
2975         /* Attention!!!  For SR-IOV PF driver operations you must enable
2976          * queue drop for all VF and PF queues to prevent head of line blocking
2977          * if an un-trusted VF does not provide descriptors to hardware.
2978          */
2979         if (adapter->vfs_allocated_count) {
2980                 /* set all queue drop enable bits */
2981                 wr32(E1000_QDE, ALL_QUEUES);
2982         }
2983
2984         /* This is useful for sniffing bad packets. */
2985         if (adapter->netdev->features & NETIF_F_RXALL) {
2986                 /* UPE and MPE will be handled by normal PROMISC logic
2987                  * in e1000e_set_rx_mode */
2988                 rctl |= (E1000_RCTL_SBP | /* Receive bad packets */
2989                          E1000_RCTL_BAM | /* RX All Bcast Pkts */
2990                          E1000_RCTL_PMCF); /* RX All MAC Ctrl Pkts */
2991
2992                 rctl &= ~(E1000_RCTL_VFE | /* Disable VLAN filter */
2993                           E1000_RCTL_DPF | /* Allow filtered pause */
2994                           E1000_RCTL_CFIEN); /* Dis VLAN CFIEN Filter */
2995                 /* Do not mess with E1000_CTRL_VME, it affects transmit as well,
2996                  * and that breaks VLANs.
2997                  */
2998         }
2999
3000         wr32(E1000_RCTL, rctl);
3001 }
3002
3003 static inline int igb_set_vf_rlpml(struct igb_adapter *adapter, int size,
3004                                    int vfn)
3005 {
3006         struct e1000_hw *hw = &adapter->hw;
3007         u32 vmolr;
3008
3009         /* if it isn't the PF check to see if VFs are enabled and
3010          * increase the size to support vlan tags */
3011         if (vfn < adapter->vfs_allocated_count &&
3012             adapter->vf_data[vfn].vlans_enabled)
3013                 size += VLAN_TAG_SIZE;
3014
3015         vmolr = rd32(E1000_VMOLR(vfn));
3016         vmolr &= ~E1000_VMOLR_RLPML_MASK;
3017         vmolr |= size | E1000_VMOLR_LPE;
3018         wr32(E1000_VMOLR(vfn), vmolr);
3019
3020         return 0;
3021 }
3022
3023 /**
3024  * igb_rlpml_set - set maximum receive packet size
3025  * @adapter: board private structure
3026  *
3027  * Configure maximum receivable packet size.
3028  **/
3029 static void igb_rlpml_set(struct igb_adapter *adapter)
3030 {
3031         u32 max_frame_size = adapter->max_frame_size;
3032         struct e1000_hw *hw = &adapter->hw;
3033         u16 pf_id = adapter->vfs_allocated_count;
3034
3035         if (pf_id) {
3036                 igb_set_vf_rlpml(adapter, max_frame_size, pf_id);
3037                 /*
3038                  * If we're in VMDQ or SR-IOV mode, then set global RLPML
3039                  * to our max jumbo frame size, in case we need to enable
3040                  * jumbo frames on one of the rings later.
3041                  * This will not pass over-length frames into the default
3042                  * queue because it's gated by the VMOLR.RLPML.
3043                  */
3044                 max_frame_size = MAX_JUMBO_FRAME_SIZE;
3045         }
3046
3047         wr32(E1000_RLPML, max_frame_size);
3048 }
3049
3050 static inline void igb_set_vmolr(struct igb_adapter *adapter,
3051                                  int vfn, bool aupe)
3052 {
3053         struct e1000_hw *hw = &adapter->hw;
3054         u32 vmolr;
3055
3056         /*
3057          * This register exists only on 82576 and newer so if we are older then
3058          * we should exit and do nothing
3059          */
3060         if (hw->mac.type < e1000_82576)
3061                 return;
3062
3063         vmolr = rd32(E1000_VMOLR(vfn));
3064         vmolr |= E1000_VMOLR_STRVLAN;      /* Strip vlan tags */
3065         if (aupe)
3066                 vmolr |= E1000_VMOLR_AUPE;        /* Accept untagged packets */
3067         else
3068                 vmolr &= ~(E1000_VMOLR_AUPE); /* Tagged packets ONLY */
3069
3070         /* clear all bits that might not be set */
3071         vmolr &= ~(E1000_VMOLR_BAM | E1000_VMOLR_RSSE);
3072
3073         if (adapter->rss_queues > 1 && vfn == adapter->vfs_allocated_count)
3074                 vmolr |= E1000_VMOLR_RSSE; /* enable RSS */
3075         /*
3076          * for VMDq only allow the VFs and pool 0 to accept broadcast and
3077          * multicast packets
3078          */
3079         if (vfn <= adapter->vfs_allocated_count)
3080                 vmolr |= E1000_VMOLR_BAM;          /* Accept broadcast */
3081
3082         wr32(E1000_VMOLR(vfn), vmolr);
3083 }
3084
3085 /**
3086  * igb_configure_rx_ring - Configure a receive ring after Reset
3087  * @adapter: board private structure
3088  * @ring: receive ring to be configured
3089  *
3090  * Configure the Rx unit of the MAC after a reset.
3091  **/
3092 void igb_configure_rx_ring(struct igb_adapter *adapter,
3093                            struct igb_ring *ring)
3094 {
3095         struct e1000_hw *hw = &adapter->hw;
3096         u64 rdba = ring->dma;
3097         int reg_idx = ring->reg_idx;
3098         u32 srrctl = 0, rxdctl = 0;
3099
3100         /* disable the queue */
3101         wr32(E1000_RXDCTL(reg_idx), 0);
3102
3103         /* Set DMA base address registers */
3104         wr32(E1000_RDBAL(reg_idx),
3105              rdba & 0x00000000ffffffffULL);
3106         wr32(E1000_RDBAH(reg_idx), rdba >> 32);
3107         wr32(E1000_RDLEN(reg_idx),
3108                        ring->count * sizeof(union e1000_adv_rx_desc));
3109
3110         /* initialize head and tail */
3111         ring->tail = hw->hw_addr + E1000_RDT(reg_idx);
3112         wr32(E1000_RDH(reg_idx), 0);
3113         writel(0, ring->tail);
3114
3115         /* set descriptor configuration */
3116         srrctl = IGB_RX_HDR_LEN << E1000_SRRCTL_BSIZEHDRSIZE_SHIFT;
3117         srrctl |= IGB_RX_BUFSZ >> E1000_SRRCTL_BSIZEPKT_SHIFT;
3118         srrctl |= E1000_SRRCTL_DESCTYPE_ADV_ONEBUF;
3119 #ifdef CONFIG_IGB_PTP
3120         if (hw->mac.type >= e1000_82580)
3121                 srrctl |= E1000_SRRCTL_TIMESTAMP;
3122 #endif /* CONFIG_IGB_PTP */
3123         /* Only set Drop Enable if we are supporting multiple queues */
3124         if (adapter->vfs_allocated_count || adapter->num_rx_queues > 1)
3125                 srrctl |= E1000_SRRCTL_DROP_EN;
3126
3127         wr32(E1000_SRRCTL(reg_idx), srrctl);
3128
3129         /* set filtering for VMDQ pools */
3130         igb_set_vmolr(adapter, reg_idx & 0x7, true);
3131
3132         rxdctl |= IGB_RX_PTHRESH;
3133         rxdctl |= IGB_RX_HTHRESH << 8;
3134         rxdctl |= IGB_RX_WTHRESH << 16;
3135
3136         /* enable receive descriptor fetching */
3137         rxdctl |= E1000_RXDCTL_QUEUE_ENABLE;
3138         wr32(E1000_RXDCTL(reg_idx), rxdctl);
3139 }
3140
3141 /**
3142  * igb_configure_rx - Configure receive Unit after Reset
3143  * @adapter: board private structure
3144  *
3145  * Configure the Rx unit of the MAC after a reset.
3146  **/
3147 static void igb_configure_rx(struct igb_adapter *adapter)
3148 {
3149         int i;
3150
3151         /* set UTA to appropriate mode */
3152         igb_set_uta(adapter);
3153
3154         /* set the correct pool for the PF default MAC address in entry 0 */
3155         igb_rar_set_qsel(adapter, adapter->hw.mac.addr, 0,
3156                          adapter->vfs_allocated_count);
3157
3158         /* Setup the HW Rx Head and Tail Descriptor Pointers and
3159          * the Base and Length of the Rx Descriptor Ring */
3160         for (i = 0; i < adapter->num_rx_queues; i++)
3161                 igb_configure_rx_ring(adapter, adapter->rx_ring[i]);
3162 }
3163
3164 /**
3165  * igb_free_tx_resources - Free Tx Resources per Queue
3166  * @tx_ring: Tx descriptor ring for a specific queue
3167  *
3168  * Free all transmit software resources
3169  **/
3170 void igb_free_tx_resources(struct igb_ring *tx_ring)
3171 {
3172         igb_clean_tx_ring(tx_ring);
3173
3174         vfree(tx_ring->tx_buffer_info);
3175         tx_ring->tx_buffer_info = NULL;
3176
3177         /* if not set, then don't free */
3178         if (!tx_ring->desc)
3179                 return;
3180
3181         dma_free_coherent(tx_ring->dev, tx_ring->size,
3182                           tx_ring->desc, tx_ring->dma);
3183
3184         tx_ring->desc = NULL;
3185 }
3186
3187 /**
3188  * igb_free_all_tx_resources - Free Tx Resources for All Queues
3189  * @adapter: board private structure
3190  *
3191  * Free all transmit software resources
3192  **/
3193 static void igb_free_all_tx_resources(struct igb_adapter *adapter)
3194 {
3195         int i;
3196
3197         for (i = 0; i < adapter->num_tx_queues; i++)
3198                 igb_free_tx_resources(adapter->tx_ring[i]);
3199 }
3200
3201 void igb_unmap_and_free_tx_resource(struct igb_ring *ring,
3202                                     struct igb_tx_buffer *tx_buffer)
3203 {
3204         if (tx_buffer->skb) {
3205                 dev_kfree_skb_any(tx_buffer->skb);
3206                 if (dma_unmap_len(tx_buffer, len))
3207                         dma_unmap_single(ring->dev,
3208                                          dma_unmap_addr(tx_buffer, dma),
3209                                          dma_unmap_len(tx_buffer, len),
3210                                          DMA_TO_DEVICE);
3211         } else if (dma_unmap_len(tx_buffer, len)) {
3212                 dma_unmap_page(ring->dev,
3213                                dma_unmap_addr(tx_buffer, dma),
3214                                dma_unmap_len(tx_buffer, len),
3215                                DMA_TO_DEVICE);
3216         }
3217         tx_buffer->next_to_watch = NULL;
3218         tx_buffer->skb = NULL;
3219         dma_unmap_len_set(tx_buffer, len, 0);
3220         /* buffer_info must be completely set up in the transmit path */
3221 }
3222
3223 /**
3224  * igb_clean_tx_ring - Free Tx Buffers
3225  * @tx_ring: ring to be cleaned
3226  **/
3227 static void igb_clean_tx_ring(struct igb_ring *tx_ring)
3228 {
3229         struct igb_tx_buffer *buffer_info;
3230         unsigned long size;
3231         u16 i;
3232
3233         if (!tx_ring->tx_buffer_info)
3234                 return;
3235         /* Free all the Tx ring sk_buffs */
3236
3237         for (i = 0; i < tx_ring->count; i++) {
3238                 buffer_info = &tx_ring->tx_buffer_info[i];
3239                 igb_unmap_and_free_tx_resource(tx_ring, buffer_info);
3240         }
3241
3242         netdev_tx_reset_queue(txring_txq(tx_ring));
3243
3244         size = sizeof(struct igb_tx_buffer) * tx_ring->count;
3245         memset(tx_ring->tx_buffer_info, 0, size);
3246
3247         /* Zero out the descriptor ring */
3248         memset(tx_ring->desc, 0, tx_ring->size);
3249
3250         tx_ring->next_to_use = 0;
3251         tx_ring->next_to_clean = 0;
3252 }
3253
3254 /**
3255  * igb_clean_all_tx_rings - Free Tx Buffers for all queues
3256  * @adapter: board private structure
3257  **/
3258 static void igb_clean_all_tx_rings(struct igb_adapter *adapter)
3259 {
3260         int i;
3261
3262         for (i = 0; i < adapter->num_tx_queues; i++)
3263                 igb_clean_tx_ring(adapter->tx_ring[i]);
3264 }
3265
3266 /**
3267  * igb_free_rx_resources - Free Rx Resources
3268  * @rx_ring: ring to clean the resources from
3269  *
3270  * Free all receive software resources
3271  **/
3272 void igb_free_rx_resources(struct igb_ring *rx_ring)
3273 {
3274         igb_clean_rx_ring(rx_ring);
3275
3276         vfree(rx_ring->rx_buffer_info);
3277         rx_ring->rx_buffer_info = NULL;
3278
3279         /* if not set, then don't free */
3280         if (!rx_ring->desc)
3281                 return;
3282
3283         dma_free_coherent(rx_ring->dev, rx_ring->size,
3284                           rx_ring->desc, rx_ring->dma);
3285
3286         rx_ring->desc = NULL;
3287 }
3288
3289 /**
3290  * igb_free_all_rx_resources - Free Rx Resources for All Queues
3291  * @adapter: board private structure
3292  *
3293  * Free all receive software resources
3294  **/
3295 static void igb_free_all_rx_resources(struct igb_adapter *adapter)
3296 {
3297         int i;
3298
3299         for (i = 0; i < adapter->num_rx_queues; i++)
3300                 igb_free_rx_resources(adapter->rx_ring[i]);
3301 }
3302
3303 /**
3304  * igb_clean_rx_ring - Free Rx Buffers per Queue
3305  * @rx_ring: ring to free buffers from
3306  **/
3307 static void igb_clean_rx_ring(struct igb_ring *rx_ring)
3308 {
3309         unsigned long size;
3310         u16 i;
3311
3312         if (rx_ring->skb)
3313                 dev_kfree_skb(rx_ring->skb);
3314         rx_ring->skb = NULL;
3315
3316         if (!rx_ring->rx_buffer_info)
3317                 return;
3318
3319         /* Free all the Rx ring sk_buffs */
3320         for (i = 0; i < rx_ring->count; i++) {
3321                 struct igb_rx_buffer *buffer_info = &rx_ring->rx_buffer_info[i];
3322
3323                 if (!buffer_info->page)
3324                         continue;
3325
3326                 dma_unmap_page(rx_ring->dev,
3327                                buffer_info->dma,
3328                                PAGE_SIZE,
3329                                DMA_FROM_DEVICE);
3330                 __free_page(buffer_info->page);
3331
3332                 buffer_info->page = NULL;
3333         }
3334
3335         size = sizeof(struct igb_rx_buffer) * rx_ring->count;
3336         memset(rx_ring->rx_buffer_info, 0, size);
3337
3338         /* Zero out the descriptor ring */
3339         memset(rx_ring->desc, 0, rx_ring->size);
3340
3341         rx_ring->next_to_alloc = 0;
3342         rx_ring->next_to_clean = 0;
3343         rx_ring->next_to_use = 0;
3344 }
3345
3346 /**
3347  * igb_clean_all_rx_rings - Free Rx Buffers for all queues
3348  * @adapter: board private structure
3349  **/
3350 static void igb_clean_all_rx_rings(struct igb_adapter *adapter)
3351 {
3352         int i;
3353
3354         for (i = 0; i < adapter->num_rx_queues; i++)
3355                 igb_clean_rx_ring(adapter->rx_ring[i]);
3356 }
3357
3358 /**
3359  * igb_set_mac - Change the Ethernet Address of the NIC
3360  * @netdev: network interface device structure
3361  * @p: pointer to an address structure
3362  *
3363  * Returns 0 on success, negative on failure
3364  **/
3365 static int igb_set_mac(struct net_device *netdev, void *p)
3366 {
3367         struct igb_adapter *adapter = netdev_priv(netdev);
3368         struct e1000_hw *hw = &adapter->hw;
3369         struct sockaddr *addr = p;
3370
3371         if (!is_valid_ether_addr(addr->sa_data))
3372                 return -EADDRNOTAVAIL;
3373
3374         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
3375         memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
3376
3377         /* set the correct pool for the new PF MAC address in entry 0 */
3378         igb_rar_set_qsel(adapter, hw->mac.addr, 0,
3379                          adapter->vfs_allocated_count);
3380
3381         return 0;
3382 }
3383
3384 /**
3385  * igb_write_mc_addr_list - write multicast addresses to MTA
3386  * @netdev: network interface device structure
3387  *
3388  * Writes multicast address list to the MTA hash table.
3389  * Returns: -ENOMEM on failure
3390  *                0 on no addresses written
3391  *                X on writing X addresses to MTA
3392  **/
3393 static int igb_write_mc_addr_list(struct net_device *netdev)
3394 {
3395         struct igb_adapter *adapter = netdev_priv(netdev);
3396         struct e1000_hw *hw = &adapter->hw;
3397         struct netdev_hw_addr *ha;
3398         u8  *mta_list;
3399         int i;
3400
3401         if (netdev_mc_empty(netdev)) {
3402                 /* nothing to program, so clear mc list */
3403                 igb_update_mc_addr_list(hw, NULL, 0);
3404                 igb_restore_vf_multicasts(adapter);
3405                 return 0;
3406         }
3407
3408         mta_list = kzalloc(netdev_mc_count(netdev) * 6, GFP_ATOMIC);
3409         if (!mta_list)
3410                 return -ENOMEM;
3411
3412         /* The shared function expects a packed array of only addresses. */
3413         i = 0;
3414         netdev_for_each_mc_addr(ha, netdev)
3415                 memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN);
3416
3417         igb_update_mc_addr_list(hw, mta_list, i);
3418         kfree(mta_list);
3419
3420         return netdev_mc_count(netdev);
3421 }
3422
3423 /**
3424  * igb_write_uc_addr_list - write unicast addresses to RAR table
3425  * @netdev: network interface device structure
3426  *
3427  * Writes unicast address list to the RAR table.
3428  * Returns: -ENOMEM on failure/insufficient address space
3429  *                0 on no addresses written
3430  *                X on writing X addresses to the RAR table
3431  **/
3432 static int igb_write_uc_addr_list(struct net_device *netdev)
3433 {
3434         struct igb_adapter *adapter = netdev_priv(netdev);
3435         struct e1000_hw *hw = &adapter->hw;
3436         unsigned int vfn = adapter->vfs_allocated_count;
3437         unsigned int rar_entries = hw->mac.rar_entry_count - (vfn + 1);
3438         int count = 0;
3439
3440         /* return ENOMEM indicating insufficient memory for addresses */
3441         if (netdev_uc_count(netdev) > rar_entries)
3442                 return -ENOMEM;
3443
3444         if (!netdev_uc_empty(netdev) && rar_entries) {
3445                 struct netdev_hw_addr *ha;
3446
3447                 netdev_for_each_uc_addr(ha, netdev) {
3448                         if (!rar_entries)
3449                                 break;
3450                         igb_rar_set_qsel(adapter, ha->addr,
3451                                          rar_entries--,
3452                                          vfn);
3453                         count++;
3454                 }
3455         }
3456         /* write the addresses in reverse order to avoid write combining */
3457         for (; rar_entries > 0 ; rar_entries--) {
3458                 wr32(E1000_RAH(rar_entries), 0);
3459                 wr32(E1000_RAL(rar_entries), 0);
3460         }
3461         wrfl();
3462
3463         return count;
3464 }
3465
3466 /**
3467  * igb_set_rx_mode - Secondary Unicast, Multicast and Promiscuous mode set
3468  * @netdev: network interface device structure
3469  *
3470  * The set_rx_mode entry point is called whenever the unicast or multicast
3471  * address lists or the network interface flags are updated.  This routine is
3472  * responsible for configuring the hardware for proper unicast, multicast,
3473  * promiscuous mode, and all-multi behavior.
3474  **/
3475 static void igb_set_rx_mode(struct net_device *netdev)
3476 {
3477         struct igb_adapter *adapter = netdev_priv(netdev);
3478         struct e1000_hw *hw = &adapter->hw;
3479         unsigned int vfn = adapter->vfs_allocated_count;
3480         u32 rctl, vmolr = 0;
3481         int count;
3482
3483         /* Check for Promiscuous and All Multicast modes */
3484         rctl = rd32(E1000_RCTL);
3485
3486         /* clear the effected bits */
3487         rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE | E1000_RCTL_VFE);
3488
3489         if (netdev->flags & IFF_PROMISC) {
3490                 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
3491                 vmolr |= (E1000_VMOLR_ROPE | E1000_VMOLR_MPME);
3492         } else {
3493                 if (netdev->flags & IFF_ALLMULTI) {
3494                         rctl |= E1000_RCTL_MPE;
3495                         vmolr |= E1000_VMOLR_MPME;
3496                 } else {
3497                         /*
3498                          * Write addresses to the MTA, if the attempt fails
3499                          * then we should just turn on promiscuous mode so
3500                          * that we can at least receive multicast traffic
3501                          */
3502                         count = igb_write_mc_addr_list(netdev);
3503                         if (count < 0) {
3504                                 rctl |= E1000_RCTL_MPE;
3505                                 vmolr |= E1000_VMOLR_MPME;
3506                         } else if (count) {
3507                                 vmolr |= E1000_VMOLR_ROMPE;
3508                         }
3509                 }
3510                 /*
3511                  * Write addresses to available RAR registers, if there is not
3512                  * sufficient space to store all the addresses then enable
3513                  * unicast promiscuous mode
3514                  */
3515                 count = igb_write_uc_addr_list(netdev);
3516                 if (count < 0) {
3517                         rctl |= E1000_RCTL_UPE;
3518                         vmolr |= E1000_VMOLR_ROPE;
3519                 }
3520                 rctl |= E1000_RCTL_VFE;
3521         }
3522         wr32(E1000_RCTL, rctl);
3523
3524         /*
3525          * In order to support SR-IOV and eventually VMDq it is necessary to set
3526          * the VMOLR to enable the appropriate modes.  Without this workaround
3527          * we will have issues with VLAN tag stripping not being done for frames
3528          * that are only arriving because we are the default pool
3529          */
3530         if ((hw->mac.type < e1000_82576) || (hw->mac.type > e1000_i350))
3531                 return;
3532
3533         vmolr |= rd32(E1000_VMOLR(vfn)) &
3534                  ~(E1000_VMOLR_ROPE | E1000_VMOLR_MPME | E1000_VMOLR_ROMPE);
3535         wr32(E1000_VMOLR(vfn), vmolr);
3536         igb_restore_vf_multicasts(adapter);
3537 }
3538
3539 static void igb_check_wvbr(struct igb_adapter *adapter)
3540 {
3541         struct e1000_hw *hw = &adapter->hw;
3542         u32 wvbr = 0;
3543
3544         switch (hw->mac.type) {
3545         case e1000_82576:
3546         case e1000_i350:
3547                 if (!(wvbr = rd32(E1000_WVBR)))
3548                         return;
3549                 break;
3550         default:
3551                 break;
3552         }
3553
3554         adapter->wvbr |= wvbr;
3555 }
3556
3557 #define IGB_STAGGERED_QUEUE_OFFSET 8
3558
3559 static void igb_spoof_check(struct igb_adapter *adapter)
3560 {
3561         int j;
3562
3563         if (!adapter->wvbr)
3564                 return;
3565
3566         for(j = 0; j < adapter->vfs_allocated_count; j++) {
3567                 if (adapter->wvbr & (1 << j) ||
3568                     adapter->wvbr & (1 << (j + IGB_STAGGERED_QUEUE_OFFSET))) {
3569                         dev_warn(&adapter->pdev->dev,
3570                                 "Spoof event(s) detected on VF %d\n", j);
3571                         adapter->wvbr &=
3572                                 ~((1 << j) |
3573                                   (1 << (j + IGB_STAGGERED_QUEUE_OFFSET)));
3574                 }
3575         }
3576 }
3577
3578 /* Need to wait a few seconds after link up to get diagnostic information from
3579  * the phy */
3580 static void igb_update_phy_info(unsigned long data)
3581 {
3582         struct igb_adapter *adapter = (struct igb_adapter *) data;
3583         igb_get_phy_info(&adapter->hw);
3584 }
3585
3586 /**
3587  * igb_has_link - check shared code for link and determine up/down
3588  * @adapter: pointer to driver private info
3589  **/
3590 bool igb_has_link(struct igb_adapter *adapter)
3591 {
3592         struct e1000_hw *hw = &adapter->hw;
3593         bool link_active = false;
3594         s32 ret_val = 0;
3595
3596         /* get_link_status is set on LSC (link status) interrupt or
3597          * rx sequence error interrupt.  get_link_status will stay
3598          * false until the e1000_check_for_link establishes link
3599          * for copper adapters ONLY
3600          */
3601         switch (hw->phy.media_type) {
3602         case e1000_media_type_copper:
3603                 if (hw->mac.get_link_status) {
3604                         ret_val = hw->mac.ops.check_for_link(hw);
3605                         link_active = !hw->mac.get_link_status;
3606                 } else {
3607                         link_active = true;
3608                 }
3609                 break;
3610         case e1000_media_type_internal_serdes:
3611                 ret_val = hw->mac.ops.check_for_link(hw);
3612                 link_active = hw->mac.serdes_has_link;
3613                 break;
3614         default:
3615         case e1000_media_type_unknown:
3616                 break;
3617         }
3618
3619         return link_active;
3620 }
3621
3622 static bool igb_thermal_sensor_event(struct e1000_hw *hw, u32 event)
3623 {
3624         bool ret = false;
3625         u32 ctrl_ext, thstat;
3626
3627         /* check for thermal sensor event on i350 copper only */
3628         if (hw->mac.type == e1000_i350) {
3629                 thstat = rd32(E1000_THSTAT);
3630                 ctrl_ext = rd32(E1000_CTRL_EXT);
3631
3632                 if ((hw->phy.media_type == e1000_media_type_copper) &&
3633                     !(ctrl_ext & E1000_CTRL_EXT_LINK_MODE_SGMII)) {
3634                         ret = !!(thstat & event);
3635                 }
3636         }
3637
3638         return ret;
3639 }
3640
3641 /**
3642  * igb_watchdog - Timer Call-back
3643  * @data: pointer to adapter cast into an unsigned long
3644  **/
3645 static void igb_watchdog(unsigned long data)
3646 {
3647         struct igb_adapter *adapter = (struct igb_adapter *)data;
3648         /* Do the rest outside of interrupt context */
3649         schedule_work(&adapter->watchdog_task);
3650 }
3651
3652 static void igb_watchdog_task(struct work_struct *work)
3653 {
3654         struct igb_adapter *adapter = container_of(work,
3655                                                    struct igb_adapter,
3656                                                    watchdog_task);
3657         struct e1000_hw *hw = &adapter->hw;
3658         struct net_device *netdev = adapter->netdev;
3659         u32 link;
3660         int i;
3661
3662         link = igb_has_link(adapter);
3663         if (link) {
3664                 /* Cancel scheduled suspend requests. */
3665                 pm_runtime_resume(netdev->dev.parent);
3666
3667                 if (!netif_carrier_ok(netdev)) {
3668                         u32 ctrl;
3669                         hw->mac.ops.get_speed_and_duplex(hw,
3670                                                          &adapter->link_speed,
3671                                                          &adapter->link_duplex);
3672
3673                         ctrl = rd32(E1000_CTRL);
3674                         /* Links status message must follow this format */
3675                         printk(KERN_INFO "igb: %s NIC Link is Up %d Mbps %s "
3676                                "Duplex, Flow Control: %s\n",
3677                                netdev->name,
3678                                adapter->link_speed,
3679                                adapter->link_duplex == FULL_DUPLEX ?
3680                                "Full" : "Half",
3681                                (ctrl & E1000_CTRL_TFCE) &&
3682                                (ctrl & E1000_CTRL_RFCE) ? "RX/TX" :
3683                                (ctrl & E1000_CTRL_RFCE) ?  "RX" :
3684                                (ctrl & E1000_CTRL_TFCE) ?  "TX" : "None");
3685
3686                         /* check for thermal sensor event */
3687                         if (igb_thermal_sensor_event(hw,
3688                             E1000_THSTAT_LINK_THROTTLE)) {
3689                                 netdev_info(netdev, "The network adapter link "
3690                                             "speed was downshifted because it "
3691                                             "overheated\n");
3692                         }
3693
3694                         /* adjust timeout factor according to speed/duplex */
3695                         adapter->tx_timeout_factor = 1;
3696                         switch (adapter->link_speed) {
3697                         case SPEED_10:
3698                                 adapter->tx_timeout_factor = 14;
3699                                 break;
3700                         case SPEED_100:
3701                                 /* maybe add some timeout factor ? */
3702                                 break;
3703                         }
3704
3705                         netif_carrier_on(netdev);
3706
3707                         igb_ping_all_vfs(adapter);
3708                         igb_check_vf_rate_limit(adapter);
3709
3710                         /* link state has changed, schedule phy info update */
3711                         if (!test_bit(__IGB_DOWN, &adapter->state))
3712                                 mod_timer(&adapter->phy_info_timer,
3713                                           round_jiffies(jiffies + 2 * HZ));
3714                 }
3715         } else {
3716                 if (netif_carrier_ok(netdev)) {
3717                         adapter->link_speed = 0;
3718                         adapter->link_duplex = 0;
3719
3720                         /* check for thermal sensor event */
3721                         if (igb_thermal_sensor_event(hw,
3722                             E1000_THSTAT_PWR_DOWN)) {
3723                                 netdev_err(netdev, "The network adapter was "
3724                                            "stopped because it overheated\n");
3725                         }
3726
3727                         /* Links status message must follow this format */
3728                         printk(KERN_INFO "igb: %s NIC Link is Down\n",
3729                                netdev->name);
3730                         netif_carrier_off(netdev);
3731
3732                         igb_ping_all_vfs(adapter);
3733
3734                         /* link state has changed, schedule phy info update */
3735                         if (!test_bit(__IGB_DOWN, &adapter->state))
3736                                 mod_timer(&adapter->phy_info_timer,
3737                                           round_jiffies(jiffies + 2 * HZ));
3738
3739                         pm_schedule_suspend(netdev->dev.parent,
3740                                             MSEC_PER_SEC * 5);
3741                 }
3742         }
3743
3744         spin_lock(&adapter->stats64_lock);
3745         igb_update_stats(adapter, &adapter->stats64);
3746         spin_unlock(&adapter->stats64_lock);
3747
3748         for (i = 0; i < adapter->num_tx_queues; i++) {
3749                 struct igb_ring *tx_ring = adapter->tx_ring[i];
3750                 if (!netif_carrier_ok(netdev)) {
3751                         /* We've lost link, so the controller stops DMA,
3752                          * but we've got queued Tx work that's never going
3753                          * to get done, so reset controller to flush Tx.
3754                          * (Do the reset outside of interrupt context). */
3755                         if (igb_desc_unused(tx_ring) + 1 < tx_ring->count) {
3756                                 adapter->tx_timeout_count++;
3757                                 schedule_work(&adapter->reset_task);
3758                                 /* return immediately since reset is imminent */
3759                                 return;
3760                         }
3761                 }
3762
3763                 /* Force detection of hung controller every watchdog period */
3764                 set_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags);
3765         }
3766
3767         /* Cause software interrupt to ensure rx ring is cleaned */
3768         if (adapter->msix_entries) {
3769                 u32 eics = 0;
3770                 for (i = 0; i < adapter->num_q_vectors; i++)
3771                         eics |= adapter->q_vector[i]->eims_value;
3772                 wr32(E1000_EICS, eics);
3773         } else {
3774                 wr32(E1000_ICS, E1000_ICS_RXDMT0);
3775         }
3776
3777         igb_spoof_check(adapter);
3778
3779         /* Reset the timer */
3780         if (!test_bit(__IGB_DOWN, &adapter->state))
3781                 mod_timer(&adapter->watchdog_timer,
3782                           round_jiffies(jiffies + 2 * HZ));
3783 }
3784
3785 enum latency_range {
3786         lowest_latency = 0,
3787         low_latency = 1,
3788         bulk_latency = 2,
3789         latency_invalid = 255
3790 };
3791
3792 /**
3793  * igb_update_ring_itr - update the dynamic ITR value based on packet size
3794  *
3795  *      Stores a new ITR value based on strictly on packet size.  This
3796  *      algorithm is less sophisticated than that used in igb_update_itr,
3797  *      due to the difficulty of synchronizing statistics across multiple
3798  *      receive rings.  The divisors and thresholds used by this function
3799  *      were determined based on theoretical maximum wire speed and testing
3800  *      data, in order to minimize response time while increasing bulk
3801  *      throughput.
3802  *      This functionality is controlled by the InterruptThrottleRate module
3803  *      parameter (see igb_param.c)
3804  *      NOTE:  This function is called only when operating in a multiqueue
3805  *             receive environment.
3806  * @q_vector: pointer to q_vector
3807  **/
3808 static void igb_update_ring_itr(struct igb_q_vector *q_vector)
3809 {
3810         int new_val = q_vector->itr_val;
3811         int avg_wire_size = 0;
3812         struct igb_adapter *adapter = q_vector->adapter;
3813         unsigned int packets;
3814
3815         /* For non-gigabit speeds, just fix the interrupt rate at 4000
3816          * ints/sec - ITR timer value of 120 ticks.
3817          */
3818         if (adapter->link_speed != SPEED_1000) {
3819                 new_val = IGB_4K_ITR;
3820                 goto set_itr_val;
3821         }
3822
3823         packets = q_vector->rx.total_packets;
3824         if (packets)
3825                 avg_wire_size = q_vector->rx.total_bytes / packets;
3826
3827         packets = q_vector->tx.total_packets;
3828         if (packets)
3829                 avg_wire_size = max_t(u32, avg_wire_size,
3830                                       q_vector->tx.total_bytes / packets);
3831
3832         /* if avg_wire_size isn't set no work was done */
3833         if (!avg_wire_size)
3834                 goto clear_counts;
3835
3836         /* Add 24 bytes to size to account for CRC, preamble, and gap */
3837         avg_wire_size += 24;
3838
3839         /* Don't starve jumbo frames */
3840         avg_wire_size = min(avg_wire_size, 3000);
3841
3842         /* Give a little boost to mid-size frames */
3843         if ((avg_wire_size > 300) && (avg_wire_size < 1200))
3844                 new_val = avg_wire_size / 3;
3845         else
3846                 new_val = avg_wire_size / 2;
3847
3848         /* conservative mode (itr 3) eliminates the lowest_latency setting */
3849         if (new_val < IGB_20K_ITR &&
3850             ((q_vector->rx.ring && adapter->rx_itr_setting == 3) ||
3851              (!q_vector->rx.ring && adapter->tx_itr_setting == 3)))
3852                 new_val = IGB_20K_ITR;
3853
3854 set_itr_val:
3855         if (new_val != q_vector->itr_val) {
3856                 q_vector->itr_val = new_val;
3857                 q_vector->set_itr = 1;
3858         }
3859 clear_counts:
3860         q_vector->rx.total_bytes = 0;
3861         q_vector->rx.total_packets = 0;
3862         q_vector->tx.total_bytes = 0;
3863         q_vector->tx.total_packets = 0;
3864 }
3865
3866 /**
3867  * igb_update_itr - update the dynamic ITR value based on statistics
3868  *      Stores a new ITR value based on packets and byte
3869  *      counts during the last interrupt.  The advantage of per interrupt
3870  *      computation is faster updates and more accurate ITR for the current
3871  *      traffic pattern.  Constants in this function were computed
3872  *      based on theoretical maximum wire speed and thresholds were set based
3873  *      on testing data as well as attempting to minimize response time
3874  *      while increasing bulk throughput.
3875  *      this functionality is controlled by the InterruptThrottleRate module
3876  *      parameter (see igb_param.c)
3877  *      NOTE:  These calculations are only valid when operating in a single-
3878  *             queue environment.
3879  * @q_vector: pointer to q_vector
3880  * @ring_container: ring info to update the itr for
3881  **/
3882 static void igb_update_itr(struct igb_q_vector *q_vector,
3883                            struct igb_ring_container *ring_container)
3884 {
3885         unsigned int packets = ring_container->total_packets;
3886         unsigned int bytes = ring_container->total_bytes;
3887         u8 itrval = ring_container->itr;
3888
3889         /* no packets, exit with status unchanged */
3890         if (packets == 0)
3891                 return;
3892
3893         switch (itrval) {
3894         case lowest_latency:
3895                 /* handle TSO and jumbo frames */
3896                 if (bytes/packets > 8000)
3897                         itrval = bulk_latency;
3898                 else if ((packets < 5) && (bytes > 512))
3899                         itrval = low_latency;
3900                 break;
3901         case low_latency:  /* 50 usec aka 20000 ints/s */
3902                 if (bytes > 10000) {
3903                         /* this if handles the TSO accounting */
3904                         if (bytes/packets > 8000) {
3905                                 itrval = bulk_latency;
3906                         } else if ((packets < 10) || ((bytes/packets) > 1200)) {
3907                                 itrval = bulk_latency;
3908                         } else if ((packets > 35)) {
3909                                 itrval = lowest_latency;
3910                         }
3911                 } else if (bytes/packets > 2000) {
3912                         itrval = bulk_latency;
3913                 } else if (packets <= 2 && bytes < 512) {
3914                         itrval = lowest_latency;
3915                 }
3916                 break;
3917         case bulk_latency: /* 250 usec aka 4000 ints/s */
3918                 if (bytes > 25000) {
3919                         if (packets > 35)
3920                                 itrval = low_latency;
3921                 } else if (bytes < 1500) {
3922                         itrval = low_latency;
3923                 }
3924                 break;
3925         }
3926
3927         /* clear work counters since we have the values we need */
3928         ring_container->total_bytes = 0;
3929         ring_container->total_packets = 0;
3930
3931         /* write updated itr to ring container */
3932         ring_container->itr = itrval;
3933 }
3934
3935 static void igb_set_itr(struct igb_q_vector *q_vector)
3936 {
3937         struct igb_adapter *adapter = q_vector->adapter;
3938         u32 new_itr = q_vector->itr_val;
3939         u8 current_itr = 0;
3940
3941         /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
3942         if (adapter->link_speed != SPEED_1000) {
3943                 current_itr = 0;
3944                 new_itr = IGB_4K_ITR;
3945                 goto set_itr_now;
3946         }
3947
3948         igb_update_itr(q_vector, &q_vector->tx);
3949         igb_update_itr(q_vector, &q_vector->rx);
3950
3951         current_itr = max(q_vector->rx.itr, q_vector->tx.itr);
3952
3953         /* conservative mode (itr 3) eliminates the lowest_latency setting */
3954         if (current_itr == lowest_latency &&
3955             ((q_vector->rx.ring && adapter->rx_itr_setting == 3) ||
3956              (!q_vector->rx.ring && adapter->tx_itr_setting == 3)))
3957                 current_itr = low_latency;
3958
3959         switch (current_itr) {
3960         /* counts and packets in update_itr are dependent on these numbers */
3961         case lowest_latency:
3962                 new_itr = IGB_70K_ITR; /* 70,000 ints/sec */
3963                 break;
3964         case low_latency:
3965                 new_itr = IGB_20K_ITR; /* 20,000 ints/sec */
3966                 break;
3967         case bulk_latency:
3968                 new_itr = IGB_4K_ITR;  /* 4,000 ints/sec */
3969                 break;
3970         default:
3971                 break;
3972         }
3973
3974 set_itr_now:
3975         if (new_itr != q_vector->itr_val) {
3976                 /* this attempts to bias the interrupt rate towards Bulk
3977                  * by adding intermediate steps when interrupt rate is
3978                  * increasing */
3979                 new_itr = new_itr > q_vector->itr_val ?
3980                              max((new_itr * q_vector->itr_val) /
3981                                  (new_itr + (q_vector->itr_val >> 2)),
3982                                  new_itr) :
3983                              new_itr;
3984                 /* Don't write the value here; it resets the adapter's
3985                  * internal timer, and causes us to delay far longer than
3986                  * we should between interrupts.  Instead, we write the ITR
3987                  * value at the beginning of the next interrupt so the timing
3988                  * ends up being correct.
3989                  */
3990                 q_vector->itr_val = new_itr;
3991                 q_vector->set_itr = 1;
3992         }
3993 }
3994
3995 static void igb_tx_ctxtdesc(struct igb_ring *tx_ring, u32 vlan_macip_lens,
3996                             u32 type_tucmd, u32 mss_l4len_idx)
3997 {
3998         struct e1000_adv_tx_context_desc *context_desc;
3999         u16 i = tx_ring->next_to_use;
4000
4001         context_desc = IGB_TX_CTXTDESC(tx_ring, i);
4002
4003         i++;
4004         tx_ring->next_to_use = (i < tx_ring->count) ? i : 0;
4005
4006         /* set bits to identify this as an advanced context descriptor */
4007         type_tucmd |= E1000_TXD_CMD_DEXT | E1000_ADVTXD_DTYP_CTXT;
4008
4009         /* For 82575, context index must be unique per ring. */
4010         if (test_bit(IGB_RING_FLAG_TX_CTX_IDX, &tx_ring->flags))
4011                 mss_l4len_idx |= tx_ring->reg_idx << 4;
4012
4013         context_desc->vlan_macip_lens   = cpu_to_le32(vlan_macip_lens);
4014         context_desc->seqnum_seed       = 0;
4015         context_desc->type_tucmd_mlhl   = cpu_to_le32(type_tucmd);
4016         context_desc->mss_l4len_idx     = cpu_to_le32(mss_l4len_idx);
4017 }
4018
4019 static int igb_tso(struct igb_ring *tx_ring,
4020                    struct igb_tx_buffer *first,
4021                    u8 *hdr_len)
4022 {
4023         struct sk_buff *skb = first->skb;
4024         u32 vlan_macip_lens, type_tucmd;
4025         u32 mss_l4len_idx, l4len;
4026
4027         if (!skb_is_gso(skb))
4028                 return 0;
4029
4030         if (skb_header_cloned(skb)) {
4031                 int err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
4032                 if (err)
4033                         return err;
4034         }
4035
4036         /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
4037         type_tucmd = E1000_ADVTXD_TUCMD_L4T_TCP;
4038
4039         if (first->protocol == __constant_htons(ETH_P_IP)) {
4040                 struct iphdr *iph = ip_hdr(skb);
4041                 iph->tot_len = 0;
4042                 iph->check = 0;
4043                 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
4044                                                          iph->daddr, 0,
4045                                                          IPPROTO_TCP,
4046                                                          0);
4047                 type_tucmd |= E1000_ADVTXD_TUCMD_IPV4;
4048                 first->tx_flags |= IGB_TX_FLAGS_TSO |
4049                                    IGB_TX_FLAGS_CSUM |
4050                                    IGB_TX_FLAGS_IPV4;
4051         } else if (skb_is_gso_v6(skb)) {
4052                 ipv6_hdr(skb)->payload_len = 0;
4053                 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
4054                                                        &ipv6_hdr(skb)->daddr,
4055                                                        0, IPPROTO_TCP, 0);
4056                 first->tx_flags |= IGB_TX_FLAGS_TSO |
4057                                    IGB_TX_FLAGS_CSUM;
4058         }
4059
4060         /* compute header lengths */
4061         l4len = tcp_hdrlen(skb);
4062         *hdr_len = skb_transport_offset(skb) + l4len;
4063
4064         /* update gso size and bytecount with header size */
4065         first->gso_segs = skb_shinfo(skb)->gso_segs;
4066         first->bytecount += (first->gso_segs - 1) * *hdr_len;
4067
4068         /* MSS L4LEN IDX */
4069         mss_l4len_idx = l4len << E1000_ADVTXD_L4LEN_SHIFT;
4070         mss_l4len_idx |= skb_shinfo(skb)->gso_size << E1000_ADVTXD_MSS_SHIFT;
4071
4072         /* VLAN MACLEN IPLEN */
4073         vlan_macip_lens = skb_network_header_len(skb);
4074         vlan_macip_lens |= skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT;
4075         vlan_macip_lens |= first->tx_flags & IGB_TX_FLAGS_VLAN_MASK;
4076
4077         igb_tx_ctxtdesc(tx_ring, vlan_macip_lens, type_tucmd, mss_l4len_idx);
4078
4079         return 1;
4080 }
4081
4082 static void igb_tx_csum(struct igb_ring *tx_ring, struct igb_tx_buffer *first)
4083 {
4084         struct sk_buff *skb = first->skb;
4085         u32 vlan_macip_lens = 0;
4086         u32 mss_l4len_idx = 0;
4087         u32 type_tucmd = 0;
4088
4089         if (skb->ip_summed != CHECKSUM_PARTIAL) {
4090                 if (!(first->tx_flags & IGB_TX_FLAGS_VLAN))
4091                         return;
4092         } else {
4093                 u8 l4_hdr = 0;
4094                 switch (first->protocol) {
4095                 case __constant_htons(ETH_P_IP):
4096                         vlan_macip_lens |= skb_network_header_len(skb);
4097                         type_tucmd |= E1000_ADVTXD_TUCMD_IPV4;
4098                         l4_hdr = ip_hdr(skb)->protocol;
4099                         break;
4100                 case __constant_htons(ETH_P_IPV6):
4101                         vlan_macip_lens |= skb_network_header_len(skb);
4102                         l4_hdr = ipv6_hdr(skb)->nexthdr;
4103                         break;
4104                 default:
4105                         if (unlikely(net_ratelimit())) {
4106                                 dev_warn(tx_ring->dev,
4107                                  "partial checksum but proto=%x!\n",
4108                                  first->protocol);
4109                         }
4110                         break;
4111                 }
4112
4113                 switch (l4_hdr) {
4114                 case IPPROTO_TCP:
4115                         type_tucmd |= E1000_ADVTXD_TUCMD_L4T_TCP;
4116                         mss_l4len_idx = tcp_hdrlen(skb) <<
4117                                         E1000_ADVTXD_L4LEN_SHIFT;
4118                         break;
4119                 case IPPROTO_SCTP:
4120                         type_tucmd |= E1000_ADVTXD_TUCMD_L4T_SCTP;
4121                         mss_l4len_idx = sizeof(struct sctphdr) <<
4122                                         E1000_ADVTXD_L4LEN_SHIFT;
4123                         break;
4124                 case IPPROTO_UDP:
4125                         mss_l4len_idx = sizeof(struct udphdr) <<
4126                                         E1000_ADVTXD_L4LEN_SHIFT;
4127                         break;
4128                 default:
4129                         if (unlikely(net_ratelimit())) {
4130                                 dev_warn(tx_ring->dev,
4131                                  "partial checksum but l4 proto=%x!\n",
4132                                  l4_hdr);
4133                         }
4134                         break;
4135                 }
4136
4137                 /* update TX checksum flag */
4138                 first->tx_flags |= IGB_TX_FLAGS_CSUM;
4139         }
4140
4141         vlan_macip_lens |= skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT;
4142         vlan_macip_lens |= first->tx_flags & IGB_TX_FLAGS_VLAN_MASK;
4143
4144         igb_tx_ctxtdesc(tx_ring, vlan_macip_lens, type_tucmd, mss_l4len_idx);
4145 }
4146
4147 static __le32 igb_tx_cmd_type(u32 tx_flags)
4148 {
4149         /* set type for advanced descriptor with frame checksum insertion */
4150         __le32 cmd_type = cpu_to_le32(E1000_ADVTXD_DTYP_DATA |
4151                                       E1000_ADVTXD_DCMD_IFCS |
4152                                       E1000_ADVTXD_DCMD_DEXT);
4153
4154         /* set HW vlan bit if vlan is present */
4155         if (tx_flags & IGB_TX_FLAGS_VLAN)
4156                 cmd_type |= cpu_to_le32(E1000_ADVTXD_DCMD_VLE);
4157
4158 #ifdef CONFIG_IGB_PTP
4159         /* set timestamp bit if present */
4160         if (unlikely(tx_flags & IGB_TX_FLAGS_TSTAMP))
4161                 cmd_type |= cpu_to_le32(E1000_ADVTXD_MAC_TSTAMP);
4162 #endif /* CONFIG_IGB_PTP */
4163
4164         /* set segmentation bits for TSO */
4165         if (tx_flags & IGB_TX_FLAGS_TSO)
4166                 cmd_type |= cpu_to_le32(E1000_ADVTXD_DCMD_TSE);
4167
4168         return cmd_type;
4169 }
4170
4171 static void igb_tx_olinfo_status(struct igb_ring *tx_ring,
4172                                  union e1000_adv_tx_desc *tx_desc,
4173                                  u32 tx_flags, unsigned int paylen)
4174 {
4175         u32 olinfo_status = paylen << E1000_ADVTXD_PAYLEN_SHIFT;
4176
4177         /* 82575 requires a unique index per ring if any offload is enabled */
4178         if ((tx_flags & (IGB_TX_FLAGS_CSUM | IGB_TX_FLAGS_VLAN)) &&
4179             test_bit(IGB_RING_FLAG_TX_CTX_IDX, &tx_ring->flags))
4180                 olinfo_status |= tx_ring->reg_idx << 4;
4181
4182         /* insert L4 checksum */
4183         if (tx_flags & IGB_TX_FLAGS_CSUM) {
4184                 olinfo_status |= E1000_TXD_POPTS_TXSM << 8;
4185
4186                 /* insert IPv4 checksum */
4187                 if (tx_flags & IGB_TX_FLAGS_IPV4)
4188                         olinfo_status |= E1000_TXD_POPTS_IXSM << 8;
4189         }
4190
4191         tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
4192 }
4193
4194 /*
4195  * The largest size we can write to the descriptor is 65535.  In order to
4196  * maintain a power of two alignment we have to limit ourselves to 32K.
4197  */
4198 #define IGB_MAX_TXD_PWR 15
4199 #define IGB_MAX_DATA_PER_TXD    (1<<IGB_MAX_TXD_PWR)
4200
4201 static void igb_tx_map(struct igb_ring *tx_ring,
4202                        struct igb_tx_buffer *first,
4203                        const u8 hdr_len)
4204 {
4205         struct sk_buff *skb = first->skb;
4206         struct igb_tx_buffer *tx_buffer;
4207         union e1000_adv_tx_desc *tx_desc;
4208         dma_addr_t dma;
4209         struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
4210         unsigned int data_len = skb->data_len;
4211         unsigned int size = skb_headlen(skb);
4212         unsigned int paylen = skb->len - hdr_len;
4213         __le32 cmd_type;
4214         u32 tx_flags = first->tx_flags;
4215         u16 i = tx_ring->next_to_use;
4216
4217         tx_desc = IGB_TX_DESC(tx_ring, i);
4218
4219         igb_tx_olinfo_status(tx_ring, tx_desc, tx_flags, paylen);
4220         cmd_type = igb_tx_cmd_type(tx_flags);
4221
4222         dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
4223         if (dma_mapping_error(tx_ring->dev, dma))
4224                 goto dma_error;
4225
4226         /* record length, and DMA address */
4227         dma_unmap_len_set(first, len, size);
4228         dma_unmap_addr_set(first, dma, dma);
4229         tx_desc->read.buffer_addr = cpu_to_le64(dma);
4230
4231         for (;;) {
4232                 while (unlikely(size > IGB_MAX_DATA_PER_TXD)) {
4233                         tx_desc->read.cmd_type_len =
4234                                 cmd_type | cpu_to_le32(IGB_MAX_DATA_PER_TXD);
4235
4236                         i++;
4237                         tx_desc++;
4238                         if (i == tx_ring->count) {
4239                                 tx_desc = IGB_TX_DESC(tx_ring, 0);
4240                                 i = 0;
4241                         }
4242
4243                         dma += IGB_MAX_DATA_PER_TXD;
4244                         size -= IGB_MAX_DATA_PER_TXD;
4245
4246                         tx_desc->read.olinfo_status = 0;
4247                         tx_desc->read.buffer_addr = cpu_to_le64(dma);
4248                 }
4249
4250                 if (likely(!data_len))
4251                         break;
4252
4253                 tx_desc->read.cmd_type_len = cmd_type | cpu_to_le32(size);
4254
4255                 i++;
4256                 tx_desc++;
4257                 if (i == tx_ring->count) {
4258                         tx_desc = IGB_TX_DESC(tx_ring, 0);
4259                         i = 0;
4260                 }
4261
4262                 size = skb_frag_size(frag);
4263                 data_len -= size;
4264
4265                 dma = skb_frag_dma_map(tx_ring->dev, frag, 0,
4266                                    size, DMA_TO_DEVICE);
4267                 if (dma_mapping_error(tx_ring->dev, dma))
4268                         goto dma_error;
4269
4270                 tx_buffer = &tx_ring->tx_buffer_info[i];
4271                 dma_unmap_len_set(tx_buffer, len, size);
4272                 dma_unmap_addr_set(tx_buffer, dma, dma);
4273
4274                 tx_desc->read.olinfo_status = 0;
4275                 tx_desc->read.buffer_addr = cpu_to_le64(dma);
4276
4277                 frag++;
4278         }
4279
4280         netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount);
4281
4282         /* write last descriptor with RS and EOP bits */
4283         cmd_type |= cpu_to_le32(size) | cpu_to_le32(IGB_TXD_DCMD);
4284         if (unlikely(skb->no_fcs))
4285                 cmd_type &= ~(cpu_to_le32(E1000_ADVTXD_DCMD_IFCS));
4286         tx_desc->read.cmd_type_len = cmd_type;
4287
4288         /* set the timestamp */
4289         first->time_stamp = jiffies;
4290
4291         /*
4292          * Force memory writes to complete before letting h/w know there
4293          * are new descriptors to fetch.  (Only applicable for weak-ordered
4294          * memory model archs, such as IA-64).
4295          *
4296          * We also need this memory barrier to make certain all of the
4297          * status bits have been updated before next_to_watch is written.
4298          */
4299         wmb();
4300
4301         /* set next_to_watch value indicating a packet is present */
4302         first->next_to_watch = tx_desc;
4303
4304         i++;
4305         if (i == tx_ring->count)
4306                 i = 0;
4307
4308         tx_ring->next_to_use = i;
4309
4310         writel(i, tx_ring->tail);
4311
4312         /* we need this if more than one processor can write to our tail
4313          * at a time, it syncronizes IO on IA64/Altix systems */
4314         mmiowb();
4315
4316         return;
4317
4318 dma_error:
4319         dev_err(tx_ring->dev, "TX DMA map failed\n");
4320
4321         /* clear dma mappings for failed tx_buffer_info map */
4322         for (;;) {
4323                 tx_buffer = &tx_ring->tx_buffer_info[i];
4324                 igb_unmap_and_free_tx_resource(tx_ring, tx_buffer);
4325                 if (tx_buffer == first)
4326                         break;
4327                 if (i == 0)
4328                         i = tx_ring->count;
4329                 i--;
4330         }
4331
4332         tx_ring->next_to_use = i;
4333 }
4334
4335 static int __igb_maybe_stop_tx(struct igb_ring *tx_ring, const u16 size)
4336 {
4337         struct net_device *netdev = tx_ring->netdev;
4338
4339         netif_stop_subqueue(netdev, tx_ring->queue_index);
4340
4341         /* Herbert's original patch had:
4342          *  smp_mb__after_netif_stop_queue();
4343          * but since that doesn't exist yet, just open code it. */
4344         smp_mb();
4345
4346         /* We need to check again in a case another CPU has just
4347          * made room available. */
4348         if (igb_desc_unused(tx_ring) < size)
4349                 return -EBUSY;
4350
4351         /* A reprieve! */
4352         netif_wake_subqueue(netdev, tx_ring->queue_index);
4353
4354         u64_stats_update_begin(&tx_ring->tx_syncp2);
4355         tx_ring->tx_stats.restart_queue2++;
4356         u64_stats_update_end(&tx_ring->tx_syncp2);
4357
4358         return 0;
4359 }
4360
4361 static inline int igb_maybe_stop_tx(struct igb_ring *tx_ring, const u16 size)
4362 {
4363         if (igb_desc_unused(tx_ring) >= size)
4364                 return 0;
4365         return __igb_maybe_stop_tx(tx_ring, size);
4366 }
4367
4368 netdev_tx_t igb_xmit_frame_ring(struct sk_buff *skb,
4369                                 struct igb_ring *tx_ring)
4370 {
4371 #ifdef CONFIG_IGB_PTP
4372         struct igb_adapter *adapter = netdev_priv(tx_ring->netdev);
4373 #endif /* CONFIG_IGB_PTP */
4374         struct igb_tx_buffer *first;
4375         int tso;
4376         u32 tx_flags = 0;
4377         __be16 protocol = vlan_get_protocol(skb);
4378         u8 hdr_len = 0;
4379
4380         /* need: 1 descriptor per page,
4381          *       + 2 desc gap to keep tail from touching head,
4382          *       + 1 desc for skb->data,
4383          *       + 1 desc for context descriptor,
4384          * otherwise try next time */
4385         if (igb_maybe_stop_tx(tx_ring, skb_shinfo(skb)->nr_frags + 4)) {
4386                 /* this is a hard error */
4387                 return NETDEV_TX_BUSY;
4388         }
4389
4390         /* record the location of the first descriptor for this packet */
4391         first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
4392         first->skb = skb;
4393         first->bytecount = skb->len;
4394         first->gso_segs = 1;
4395
4396 #ifdef CONFIG_IGB_PTP
4397         if (unlikely((skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) &&
4398                      !(adapter->ptp_tx_skb))) {
4399                 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
4400                 tx_flags |= IGB_TX_FLAGS_TSTAMP;
4401
4402                 adapter->ptp_tx_skb = skb_get(skb);
4403                 if (adapter->hw.mac.type == e1000_82576)
4404                         schedule_work(&adapter->ptp_tx_work);
4405         }
4406 #endif /* CONFIG_IGB_PTP */
4407
4408         if (vlan_tx_tag_present(skb)) {
4409                 tx_flags |= IGB_TX_FLAGS_VLAN;
4410                 tx_flags |= (vlan_tx_tag_get(skb) << IGB_TX_FLAGS_VLAN_SHIFT);
4411         }
4412
4413         /* record initial flags and protocol */
4414         first->tx_flags = tx_flags;
4415         first->protocol = protocol;
4416
4417         tso = igb_tso(tx_ring, first, &hdr_len);
4418         if (tso < 0)
4419                 goto out_drop;
4420         else if (!tso)
4421                 igb_tx_csum(tx_ring, first);
4422
4423         igb_tx_map(tx_ring, first, hdr_len);
4424
4425         /* Make sure there is space in the ring for the next send. */
4426         igb_maybe_stop_tx(tx_ring, MAX_SKB_FRAGS + 4);
4427
4428         return NETDEV_TX_OK;
4429
4430 out_drop:
4431         igb_unmap_and_free_tx_resource(tx_ring, first);
4432
4433         return NETDEV_TX_OK;
4434 }
4435
4436 static inline struct igb_ring *igb_tx_queue_mapping(struct igb_adapter *adapter,
4437                                                     struct sk_buff *skb)
4438 {
4439         unsigned int r_idx = skb->queue_mapping;
4440
4441         if (r_idx >= adapter->num_tx_queues)
4442                 r_idx = r_idx % adapter->num_tx_queues;
4443
4444         return adapter->tx_ring[r_idx];
4445 }
4446
4447 static netdev_tx_t igb_xmit_frame(struct sk_buff *skb,
4448                                   struct net_device *netdev)
4449 {
4450         struct igb_adapter *adapter = netdev_priv(netdev);
4451
4452         if (test_bit(__IGB_DOWN, &adapter->state)) {
4453                 dev_kfree_skb_any(skb);
4454                 return NETDEV_TX_OK;
4455         }
4456
4457         if (skb->len <= 0) {
4458                 dev_kfree_skb_any(skb);
4459                 return NETDEV_TX_OK;
4460         }
4461
4462         /*
4463          * The minimum packet size with TCTL.PSP set is 17 so pad the skb
4464          * in order to meet this minimum size requirement.
4465          */
4466         if (unlikely(skb->len < 17)) {
4467                 if (skb_pad(skb, 17 - skb->len))
4468                         return NETDEV_TX_OK;
4469                 skb->len = 17;
4470                 skb_set_tail_pointer(skb, 17);
4471         }
4472
4473         return igb_xmit_frame_ring(skb, igb_tx_queue_mapping(adapter, skb));
4474 }
4475
4476 /**
4477  * igb_tx_timeout - Respond to a Tx Hang
4478  * @netdev: network interface device structure
4479  **/
4480 static void igb_tx_timeout(struct net_device *netdev)
4481 {
4482         struct igb_adapter *adapter = netdev_priv(netdev);
4483         struct e1000_hw *hw = &adapter->hw;
4484
4485         /* Do the reset outside of interrupt context */
4486         adapter->tx_timeout_count++;
4487
4488         if (hw->mac.type >= e1000_82580)
4489                 hw->dev_spec._82575.global_device_reset = true;
4490
4491         schedule_work(&adapter->reset_task);
4492         wr32(E1000_EICS,
4493              (adapter->eims_enable_mask & ~adapter->eims_other));
4494 }
4495
4496 static void igb_reset_task(struct work_struct *work)
4497 {
4498         struct igb_adapter *adapter;
4499         adapter = container_of(work, struct igb_adapter, reset_task);
4500
4501         igb_dump(adapter);
4502         netdev_err(adapter->netdev, "Reset adapter\n");
4503         igb_reinit_locked(adapter);
4504 }
4505
4506 /**
4507  * igb_get_stats64 - Get System Network Statistics
4508  * @netdev: network interface device structure
4509  * @stats: rtnl_link_stats64 pointer
4510  *
4511  **/
4512 static struct rtnl_link_stats64 *igb_get_stats64(struct net_device *netdev,
4513                                                  struct rtnl_link_stats64 *stats)
4514 {
4515         struct igb_adapter *adapter = netdev_priv(netdev);
4516
4517         spin_lock(&adapter->stats64_lock);
4518         igb_update_stats(adapter, &adapter->stats64);
4519         memcpy(stats, &adapter->stats64, sizeof(*stats));
4520         spin_unlock(&adapter->stats64_lock);
4521
4522         return stats;
4523 }
4524
4525 /**
4526  * igb_change_mtu - Change the Maximum Transfer Unit
4527  * @netdev: network interface device structure
4528  * @new_mtu: new value for maximum frame size
4529  *
4530  * Returns 0 on success, negative on failure
4531  **/
4532 static int igb_change_mtu(struct net_device *netdev, int new_mtu)
4533 {
4534         struct igb_adapter *adapter = netdev_priv(netdev);
4535         struct pci_dev *pdev = adapter->pdev;
4536         int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
4537
4538         if ((new_mtu < 68) || (max_frame > MAX_JUMBO_FRAME_SIZE)) {
4539                 dev_err(&pdev->dev, "Invalid MTU setting\n");
4540                 return -EINVAL;
4541         }
4542
4543 #define MAX_STD_JUMBO_FRAME_SIZE 9238
4544         if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
4545                 dev_err(&pdev->dev, "MTU > 9216 not supported.\n");
4546                 return -EINVAL;
4547         }
4548
4549         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
4550                 msleep(1);
4551
4552         /* igb_down has a dependency on max_frame_size */
4553         adapter->max_frame_size = max_frame;
4554
4555         if (netif_running(netdev))
4556                 igb_down(adapter);
4557
4558         dev_info(&pdev->dev, "changing MTU from %d to %d\n",
4559                  netdev->mtu, new_mtu);
4560         netdev->mtu = new_mtu;
4561
4562         if (netif_running(netdev))
4563                 igb_up(adapter);
4564         else
4565                 igb_reset(adapter);
4566
4567         clear_bit(__IGB_RESETTING, &adapter->state);
4568
4569         return 0;
4570 }
4571
4572 /**
4573  * igb_update_stats - Update the board statistics counters
4574  * @adapter: board private structure
4575  **/
4576
4577 void igb_update_stats(struct igb_adapter *adapter,
4578                       struct rtnl_link_stats64 *net_stats)
4579 {
4580         struct e1000_hw *hw = &adapter->hw;
4581         struct pci_dev *pdev = adapter->pdev;
4582         u32 reg, mpc;
4583         u16 phy_tmp;
4584         int i;
4585         u64 bytes, packets;
4586         unsigned int start;
4587         u64 _bytes, _packets;
4588
4589 #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
4590
4591         /*
4592          * Prevent stats update while adapter is being reset, or if the pci
4593          * connection is down.
4594          */
4595         if (adapter->link_speed == 0)
4596                 return;
4597         if (pci_channel_offline(pdev))
4598                 return;
4599
4600         bytes = 0;
4601         packets = 0;
4602         for (i = 0; i < adapter->num_rx_queues; i++) {
4603                 u32 rqdpc = rd32(E1000_RQDPC(i));
4604                 struct igb_ring *ring = adapter->rx_ring[i];
4605
4606                 if (rqdpc) {
4607                         ring->rx_stats.drops += rqdpc;
4608                         net_stats->rx_fifo_errors += rqdpc;
4609                 }
4610
4611                 do {
4612                         start = u64_stats_fetch_begin_bh(&ring->rx_syncp);
4613                         _bytes = ring->rx_stats.bytes;
4614                         _packets = ring->rx_stats.packets;
4615                 } while (u64_stats_fetch_retry_bh(&ring->rx_syncp, start));
4616                 bytes += _bytes;
4617                 packets += _packets;
4618         }
4619
4620         net_stats->rx_bytes = bytes;
4621         net_stats->rx_packets = packets;
4622
4623         bytes = 0;
4624         packets = 0;
4625         for (i = 0; i < adapter->num_tx_queues; i++) {
4626                 struct igb_ring *ring = adapter->tx_ring[i];
4627                 do {
4628                         start = u64_stats_fetch_begin_bh(&ring->tx_syncp);
4629                         _bytes = ring->tx_stats.bytes;
4630                         _packets = ring->tx_stats.packets;
4631                 } while (u64_stats_fetch_retry_bh(&ring->tx_syncp, start));
4632                 bytes += _bytes;
4633                 packets += _packets;
4634         }
4635         net_stats->tx_bytes = bytes;
4636         net_stats->tx_packets = packets;
4637
4638         /* read stats registers */
4639         adapter->stats.crcerrs += rd32(E1000_CRCERRS);
4640         adapter->stats.gprc += rd32(E1000_GPRC);
4641         adapter->stats.gorc += rd32(E1000_GORCL);
4642         rd32(E1000_GORCH); /* clear GORCL */
4643         adapter->stats.bprc += rd32(E1000_BPRC);
4644         adapter->stats.mprc += rd32(E1000_MPRC);
4645         adapter->stats.roc += rd32(E1000_ROC);
4646
4647         adapter->stats.prc64 += rd32(E1000_PRC64);
4648         adapter->stats.prc127 += rd32(E1000_PRC127);
4649         adapter->stats.prc255 += rd32(E1000_PRC255);
4650         adapter->stats.prc511 += rd32(E1000_PRC511);
4651         adapter->stats.prc1023 += rd32(E1000_PRC1023);
4652         adapter->stats.prc1522 += rd32(E1000_PRC1522);
4653         adapter->stats.symerrs += rd32(E1000_SYMERRS);
4654         adapter->stats.sec += rd32(E1000_SEC);
4655
4656         mpc = rd32(E1000_MPC);
4657         adapter->stats.mpc += mpc;
4658         net_stats->rx_fifo_errors += mpc;
4659         adapter->stats.scc += rd32(E1000_SCC);
4660         adapter->stats.ecol += rd32(E1000_ECOL);
4661         adapter->stats.mcc += rd32(E1000_MCC);
4662         adapter->stats.latecol += rd32(E1000_LATECOL);
4663         adapter->stats.dc += rd32(E1000_DC);
4664         adapter->stats.rlec += rd32(E1000_RLEC);
4665         adapter->stats.xonrxc += rd32(E1000_XONRXC);
4666         adapter->stats.xontxc += rd32(E1000_XONTXC);
4667         adapter->stats.xoffrxc += rd32(E1000_XOFFRXC);
4668         adapter->stats.xofftxc += rd32(E1000_XOFFTXC);
4669         adapter->stats.fcruc += rd32(E1000_FCRUC);
4670         adapter->stats.gptc += rd32(E1000_GPTC);
4671         adapter->stats.gotc += rd32(E1000_GOTCL);
4672         rd32(E1000_GOTCH); /* clear GOTCL */
4673         adapter->stats.rnbc += rd32(E1000_RNBC);
4674         adapter->stats.ruc += rd32(E1000_RUC);
4675         adapter->stats.rfc += rd32(E1000_RFC);
4676         adapter->stats.rjc += rd32(E1000_RJC);
4677         adapter->stats.tor += rd32(E1000_TORH);
4678         adapter->stats.tot += rd32(E1000_TOTH);
4679         adapter->stats.tpr += rd32(E1000_TPR);
4680
4681         adapter->stats.ptc64 += rd32(E1000_PTC64);
4682         adapter->stats.ptc127 += rd32(E1000_PTC127);
4683         adapter->stats.ptc255 += rd32(E1000_PTC255);
4684         adapter->stats.ptc511 += rd32(E1000_PTC511);
4685         adapter->stats.ptc1023 += rd32(E1000_PTC1023);
4686         adapter->stats.ptc1522 += rd32(E1000_PTC1522);
4687
4688         adapter->stats.mptc += rd32(E1000_MPTC);
4689         adapter->stats.bptc += rd32(E1000_BPTC);
4690
4691         adapter->stats.tpt += rd32(E1000_TPT);
4692         adapter->stats.colc += rd32(E1000_COLC);
4693
4694         adapter->stats.algnerrc += rd32(E1000_ALGNERRC);
4695         /* read internal phy specific stats */
4696         reg = rd32(E1000_CTRL_EXT);
4697         if (!(reg & E1000_CTRL_EXT_LINK_MODE_MASK)) {
4698                 adapter->stats.rxerrc += rd32(E1000_RXERRC);
4699
4700                 /* this stat has invalid values on i210/i211 */
4701                 if ((hw->mac.type != e1000_i210) &&
4702                     (hw->mac.type != e1000_i211))
4703                         adapter->stats.tncrs += rd32(E1000_TNCRS);
4704         }
4705
4706         adapter->stats.tsctc += rd32(E1000_TSCTC);
4707         adapter->stats.tsctfc += rd32(E1000_TSCTFC);
4708
4709         adapter->stats.iac += rd32(E1000_IAC);
4710         adapter->stats.icrxoc += rd32(E1000_ICRXOC);
4711         adapter->stats.icrxptc += rd32(E1000_ICRXPTC);
4712         adapter->stats.icrxatc += rd32(E1000_ICRXATC);
4713         adapter->stats.ictxptc += rd32(E1000_ICTXPTC);
4714         adapter->stats.ictxatc += rd32(E1000_ICTXATC);
4715         adapter->stats.ictxqec += rd32(E1000_ICTXQEC);
4716         adapter->stats.ictxqmtc += rd32(E1000_ICTXQMTC);
4717         adapter->stats.icrxdmtc += rd32(E1000_ICRXDMTC);
4718
4719         /* Fill out the OS statistics structure */
4720         net_stats->multicast = adapter->stats.mprc;
4721         net_stats->collisions = adapter->stats.colc;
4722
4723         /* Rx Errors */
4724
4725         /* RLEC on some newer hardware can be incorrect so build
4726          * our own version based on RUC and ROC */
4727         net_stats->rx_errors = adapter->stats.rxerrc +
4728                 adapter->stats.crcerrs + adapter->stats.algnerrc +
4729                 adapter->stats.ruc + adapter->stats.roc +
4730                 adapter->stats.cexterr;
4731         net_stats->rx_length_errors = adapter->stats.ruc +
4732                                       adapter->stats.roc;
4733         net_stats->rx_crc_errors = adapter->stats.crcerrs;
4734         net_stats->rx_frame_errors = adapter->stats.algnerrc;
4735         net_stats->rx_missed_errors = adapter->stats.mpc;
4736
4737         /* Tx Errors */
4738         net_stats->tx_errors = adapter->stats.ecol +
4739                                adapter->stats.latecol;
4740         net_stats->tx_aborted_errors = adapter->stats.ecol;
4741         net_stats->tx_window_errors = adapter->stats.latecol;
4742         net_stats->tx_carrier_errors = adapter->stats.tncrs;
4743
4744         /* Tx Dropped needs to be maintained elsewhere */
4745
4746         /* Phy Stats */
4747         if (hw->phy.media_type == e1000_media_type_copper) {
4748                 if ((adapter->link_speed == SPEED_1000) &&
4749                    (!igb_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
4750                         phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
4751                         adapter->phy_stats.idle_errors += phy_tmp;
4752                 }
4753         }
4754
4755         /* Management Stats */
4756         adapter->stats.mgptc += rd32(E1000_MGTPTC);
4757         adapter->stats.mgprc += rd32(E1000_MGTPRC);
4758         adapter->stats.mgpdc += rd32(E1000_MGTPDC);
4759
4760         /* OS2BMC Stats */
4761         reg = rd32(E1000_MANC);
4762         if (reg & E1000_MANC_EN_BMC2OS) {
4763                 adapter->stats.o2bgptc += rd32(E1000_O2BGPTC);
4764                 adapter->stats.o2bspc += rd32(E1000_O2BSPC);
4765                 adapter->stats.b2ospc += rd32(E1000_B2OSPC);
4766                 adapter->stats.b2ogprc += rd32(E1000_B2OGPRC);
4767         }
4768 }
4769
4770 static irqreturn_t igb_msix_other(int irq, void *data)
4771 {
4772         struct igb_adapter *adapter = data;
4773         struct e1000_hw *hw = &adapter->hw;
4774         u32 icr = rd32(E1000_ICR);
4775         /* reading ICR causes bit 31 of EICR to be cleared */
4776
4777         if (icr & E1000_ICR_DRSTA)
4778                 schedule_work(&adapter->reset_task);
4779
4780         if (icr & E1000_ICR_DOUTSYNC) {
4781                 /* HW is reporting DMA is out of sync */
4782                 adapter->stats.doosync++;
4783                 /* The DMA Out of Sync is also indication of a spoof event
4784                  * in IOV mode. Check the Wrong VM Behavior register to
4785                  * see if it is really a spoof event. */
4786                 igb_check_wvbr(adapter);
4787         }
4788
4789         /* Check for a mailbox event */
4790         if (icr & E1000_ICR_VMMB)
4791                 igb_msg_task(adapter);
4792
4793         if (icr & E1000_ICR_LSC) {
4794                 hw->mac.get_link_status = 1;
4795                 /* guard against interrupt when we're going down */
4796                 if (!test_bit(__IGB_DOWN, &adapter->state))
4797                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
4798         }
4799
4800 #ifdef CONFIG_IGB_PTP
4801         if (icr & E1000_ICR_TS) {
4802                 u32 tsicr = rd32(E1000_TSICR);
4803
4804                 if (tsicr & E1000_TSICR_TXTS) {
4805                         /* acknowledge the interrupt */
4806                         wr32(E1000_TSICR, E1000_TSICR_TXTS);
4807                         /* retrieve hardware timestamp */
4808                         schedule_work(&adapter->ptp_tx_work);
4809                 }
4810         }
4811 #endif /* CONFIG_IGB_PTP */
4812
4813         wr32(E1000_EIMS, adapter->eims_other);
4814
4815         return IRQ_HANDLED;
4816 }
4817
4818 static void igb_write_itr(struct igb_q_vector *q_vector)
4819 {
4820         struct igb_adapter *adapter = q_vector->adapter;
4821         u32 itr_val = q_vector->itr_val & 0x7FFC;
4822
4823         if (!q_vector->set_itr)
4824                 return;
4825
4826         if (!itr_val)
4827                 itr_val = 0x4;
4828
4829         if (adapter->hw.mac.type == e1000_82575)
4830                 itr_val |= itr_val << 16;
4831         else
4832                 itr_val |= E1000_EITR_CNT_IGNR;
4833
4834         writel(itr_val, q_vector->itr_register);
4835         q_vector->set_itr = 0;
4836 }
4837
4838 static irqreturn_t igb_msix_ring(int irq, void *data)
4839 {
4840         struct igb_q_vector *q_vector = data;
4841
4842         /* Write the ITR value calculated from the previous interrupt. */
4843         igb_write_itr(q_vector);
4844
4845         napi_schedule(&q_vector->napi);
4846
4847         return IRQ_HANDLED;
4848 }
4849
4850 #ifdef CONFIG_IGB_DCA
4851 static void igb_update_dca(struct igb_q_vector *q_vector)
4852 {
4853         struct igb_adapter *adapter = q_vector->adapter;
4854         struct e1000_hw *hw = &adapter->hw;
4855         int cpu = get_cpu();
4856
4857         if (q_vector->cpu == cpu)
4858                 goto out_no_update;
4859
4860         if (q_vector->tx.ring) {
4861                 int q = q_vector->tx.ring->reg_idx;
4862                 u32 dca_txctrl = rd32(E1000_DCA_TXCTRL(q));
4863                 if (hw->mac.type == e1000_82575) {
4864                         dca_txctrl &= ~E1000_DCA_TXCTRL_CPUID_MASK;
4865                         dca_txctrl |= dca3_get_tag(&adapter->pdev->dev, cpu);
4866                 } else {
4867                         dca_txctrl &= ~E1000_DCA_TXCTRL_CPUID_MASK_82576;
4868                         dca_txctrl |= dca3_get_tag(&adapter->pdev->dev, cpu) <<
4869                                       E1000_DCA_TXCTRL_CPUID_SHIFT;
4870                 }
4871                 dca_txctrl |= E1000_DCA_TXCTRL_DESC_DCA_EN;
4872                 wr32(E1000_DCA_TXCTRL(q), dca_txctrl);
4873         }
4874         if (q_vector->rx.ring) {
4875                 int q = q_vector->rx.ring->reg_idx;
4876                 u32 dca_rxctrl = rd32(E1000_DCA_RXCTRL(q));
4877                 if (hw->mac.type == e1000_82575) {
4878                         dca_rxctrl &= ~E1000_DCA_RXCTRL_CPUID_MASK;
4879                         dca_rxctrl |= dca3_get_tag(&adapter->pdev->dev, cpu);
4880                 } else {
4881                         dca_rxctrl &= ~E1000_DCA_RXCTRL_CPUID_MASK_82576;
4882                         dca_rxctrl |= dca3_get_tag(&adapter->pdev->dev, cpu) <<
4883                                       E1000_DCA_RXCTRL_CPUID_SHIFT;
4884                 }
4885                 dca_rxctrl |= E1000_DCA_RXCTRL_DESC_DCA_EN;
4886                 dca_rxctrl |= E1000_DCA_RXCTRL_HEAD_DCA_EN;
4887                 dca_rxctrl |= E1000_DCA_RXCTRL_DATA_DCA_EN;
4888                 wr32(E1000_DCA_RXCTRL(q), dca_rxctrl);
4889         }
4890         q_vector->cpu = cpu;
4891 out_no_update:
4892         put_cpu();
4893 }
4894
4895 static void igb_setup_dca(struct igb_adapter *adapter)
4896 {
4897         struct e1000_hw *hw = &adapter->hw;
4898         int i;
4899
4900         if (!(adapter->flags & IGB_FLAG_DCA_ENABLED))
4901                 return;
4902
4903         /* Always use CB2 mode, difference is masked in the CB driver. */
4904         wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_CB2);
4905
4906         for (i = 0; i < adapter->num_q_vectors; i++) {
4907                 adapter->q_vector[i]->cpu = -1;
4908                 igb_update_dca(adapter->q_vector[i]);
4909         }
4910 }
4911
4912 static int __igb_notify_dca(struct device *dev, void *data)
4913 {
4914         struct net_device *netdev = dev_get_drvdata(dev);
4915         struct igb_adapter *adapter = netdev_priv(netdev);
4916         struct pci_dev *pdev = adapter->pdev;
4917         struct e1000_hw *hw = &adapter->hw;
4918         unsigned long event = *(unsigned long *)data;
4919
4920         switch (event) {
4921         case DCA_PROVIDER_ADD:
4922                 /* if already enabled, don't do it again */
4923                 if (adapter->flags & IGB_FLAG_DCA_ENABLED)
4924                         break;
4925                 if (dca_add_requester(dev) == 0) {
4926                         adapter->flags |= IGB_FLAG_DCA_ENABLED;
4927                         dev_info(&pdev->dev, "DCA enabled\n");
4928                         igb_setup_dca(adapter);
4929                         break;
4930                 }
4931                 /* Fall Through since DCA is disabled. */
4932         case DCA_PROVIDER_REMOVE:
4933                 if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
4934                         /* without this a class_device is left
4935                          * hanging around in the sysfs model */
4936                         dca_remove_requester(dev);
4937                         dev_info(&pdev->dev, "DCA disabled\n");
4938                         adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
4939                         wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_DISABLE);
4940                 }
4941                 break;
4942         }
4943
4944         return 0;
4945 }
4946
4947 static int igb_notify_dca(struct notifier_block *nb, unsigned long event,
4948                           void *p)
4949 {
4950         int ret_val;
4951
4952         ret_val = driver_for_each_device(&igb_driver.driver, NULL, &event,
4953                                          __igb_notify_dca);
4954
4955         return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
4956 }
4957 #endif /* CONFIG_IGB_DCA */
4958
4959 #ifdef CONFIG_PCI_IOV
4960 static int igb_vf_configure(struct igb_adapter *adapter, int vf)
4961 {
4962         unsigned char mac_addr[ETH_ALEN];
4963
4964         eth_random_addr(mac_addr);
4965         igb_set_vf_mac(adapter, vf, mac_addr);
4966
4967         return 0;
4968 }
4969
4970 static bool igb_vfs_are_assigned(struct igb_adapter *adapter)
4971 {
4972         struct pci_dev *pdev = adapter->pdev;
4973         struct pci_dev *vfdev;
4974         int dev_id;
4975
4976         switch (adapter->hw.mac.type) {
4977         case e1000_82576:
4978                 dev_id = IGB_82576_VF_DEV_ID;
4979                 break;
4980         case e1000_i350:
4981                 dev_id = IGB_I350_VF_DEV_ID;
4982                 break;
4983         default:
4984                 return false;
4985         }
4986
4987         /* loop through all the VFs to see if we own any that are assigned */
4988         vfdev = pci_get_device(PCI_VENDOR_ID_INTEL, dev_id, NULL);
4989         while (vfdev) {
4990                 /* if we don't own it we don't care */
4991                 if (vfdev->is_virtfn && vfdev->physfn == pdev) {
4992                         /* if it is assigned we cannot release it */
4993                         if (vfdev->dev_flags & PCI_DEV_FLAGS_ASSIGNED)
4994                                 return true;
4995                 }
4996
4997                 vfdev = pci_get_device(PCI_VENDOR_ID_INTEL, dev_id, vfdev);
4998         }
4999
5000         return false;
5001 }
5002
5003 #endif
5004 static void igb_ping_all_vfs(struct igb_adapter *adapter)
5005 {
5006         struct e1000_hw *hw = &adapter->hw;
5007         u32 ping;
5008         int i;
5009
5010         for (i = 0 ; i < adapter->vfs_allocated_count; i++) {
5011                 ping = E1000_PF_CONTROL_MSG;
5012                 if (adapter->vf_data[i].flags & IGB_VF_FLAG_CTS)
5013                         ping |= E1000_VT_MSGTYPE_CTS;
5014                 igb_write_mbx(hw, &ping, 1, i);
5015         }
5016 }
5017
5018 static int igb_set_vf_promisc(struct igb_adapter *adapter, u32 *msgbuf, u32 vf)
5019 {
5020         struct e1000_hw *hw = &adapter->hw;
5021         u32 vmolr = rd32(E1000_VMOLR(vf));
5022         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
5023
5024         vf_data->flags &= ~(IGB_VF_FLAG_UNI_PROMISC |
5025                             IGB_VF_FLAG_MULTI_PROMISC);
5026         vmolr &= ~(E1000_VMOLR_ROPE | E1000_VMOLR_ROMPE | E1000_VMOLR_MPME);
5027
5028         if (*msgbuf & E1000_VF_SET_PROMISC_MULTICAST) {
5029                 vmolr |= E1000_VMOLR_MPME;
5030                 vf_data->flags |= IGB_VF_FLAG_MULTI_PROMISC;
5031                 *msgbuf &= ~E1000_VF_SET_PROMISC_MULTICAST;
5032         } else {
5033                 /*
5034                  * if we have hashes and we are clearing a multicast promisc
5035                  * flag we need to write the hashes to the MTA as this step
5036                  * was previously skipped
5037                  */
5038                 if (vf_data->num_vf_mc_hashes > 30) {
5039                         vmolr |= E1000_VMOLR_MPME;
5040                 } else if (vf_data->num_vf_mc_hashes) {
5041                         int j;
5042                         vmolr |= E1000_VMOLR_ROMPE;
5043                         for (j = 0; j < vf_data->num_vf_mc_hashes; j++)
5044                                 igb_mta_set(hw, vf_data->vf_mc_hashes[j]);
5045                 }
5046         }
5047
5048         wr32(E1000_VMOLR(vf), vmolr);
5049
5050         /* there are flags left unprocessed, likely not supported */
5051         if (*msgbuf & E1000_VT_MSGINFO_MASK)
5052                 return -EINVAL;
5053
5054         return 0;
5055
5056 }
5057
5058 static int igb_set_vf_multicasts(struct igb_adapter *adapter,
5059                                   u32 *msgbuf, u32 vf)
5060 {
5061         int n = (msgbuf[0] & E1000_VT_MSGINFO_MASK) >> E1000_VT_MSGINFO_SHIFT;
5062         u16 *hash_list = (u16 *)&msgbuf[1];
5063         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
5064         int i;
5065
5066         /* salt away the number of multicast addresses assigned
5067          * to this VF for later use to restore when the PF multi cast
5068          * list changes
5069          */
5070         vf_data->num_vf_mc_hashes = n;
5071
5072         /* only up to 30 hash values supported */
5073         if (n > 30)
5074                 n = 30;
5075
5076         /* store the hashes for later use */
5077         for (i = 0; i < n; i++)
5078                 vf_data->vf_mc_hashes[i] = hash_list[i];
5079
5080         /* Flush and reset the mta with the new values */
5081         igb_set_rx_mode(adapter->netdev);
5082
5083         return 0;
5084 }
5085
5086 static void igb_restore_vf_multicasts(struct igb_adapter *adapter)
5087 {
5088         struct e1000_hw *hw = &adapter->hw;
5089         struct vf_data_storage *vf_data;
5090         int i, j;
5091
5092         for (i = 0; i < adapter->vfs_allocated_count; i++) {
5093                 u32 vmolr = rd32(E1000_VMOLR(i));
5094                 vmolr &= ~(E1000_VMOLR_ROMPE | E1000_VMOLR_MPME);
5095
5096                 vf_data = &adapter->vf_data[i];
5097
5098                 if ((vf_data->num_vf_mc_hashes > 30) ||
5099                     (vf_data->flags & IGB_VF_FLAG_MULTI_PROMISC)) {
5100                         vmolr |= E1000_VMOLR_MPME;
5101                 } else if (vf_data->num_vf_mc_hashes) {
5102                         vmolr |= E1000_VMOLR_ROMPE;
5103                         for (j = 0; j < vf_data->num_vf_mc_hashes; j++)
5104                                 igb_mta_set(hw, vf_data->vf_mc_hashes[j]);
5105                 }
5106                 wr32(E1000_VMOLR(i), vmolr);
5107         }
5108 }
5109
5110 static void igb_clear_vf_vfta(struct igb_adapter *adapter, u32 vf)
5111 {
5112         struct e1000_hw *hw = &adapter->hw;
5113         u32 pool_mask, reg, vid;
5114         int i;
5115
5116         pool_mask = 1 << (E1000_VLVF_POOLSEL_SHIFT + vf);
5117
5118         /* Find the vlan filter for this id */
5119         for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
5120                 reg = rd32(E1000_VLVF(i));
5121
5122                 /* remove the vf from the pool */
5123                 reg &= ~pool_mask;
5124
5125                 /* if pool is empty then remove entry from vfta */
5126                 if (!(reg & E1000_VLVF_POOLSEL_MASK) &&
5127                     (reg & E1000_VLVF_VLANID_ENABLE)) {
5128                         reg = 0;
5129                         vid = reg & E1000_VLVF_VLANID_MASK;
5130                         igb_vfta_set(hw, vid, false);
5131                 }
5132
5133                 wr32(E1000_VLVF(i), reg);
5134         }
5135
5136         adapter->vf_data[vf].vlans_enabled = 0;
5137 }
5138
5139 static s32 igb_vlvf_set(struct igb_adapter *adapter, u32 vid, bool add, u32 vf)
5140 {
5141         struct e1000_hw *hw = &adapter->hw;
5142         u32 reg, i;
5143
5144         /* The vlvf table only exists on 82576 hardware and newer */
5145         if (hw->mac.type < e1000_82576)
5146                 return -1;
5147
5148         /* we only need to do this if VMDq is enabled */
5149         if (!adapter->vfs_allocated_count)
5150                 return -1;
5151
5152         /* Find the vlan filter for this id */
5153         for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
5154                 reg = rd32(E1000_VLVF(i));
5155                 if ((reg & E1000_VLVF_VLANID_ENABLE) &&
5156                     vid == (reg & E1000_VLVF_VLANID_MASK))
5157                         break;
5158         }
5159
5160         if (add) {
5161                 if (i == E1000_VLVF_ARRAY_SIZE) {
5162                         /* Did not find a matching VLAN ID entry that was
5163                          * enabled.  Search for a free filter entry, i.e.
5164                          * one without the enable bit set
5165                          */
5166                         for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
5167                                 reg = rd32(E1000_VLVF(i));
5168                                 if (!(reg & E1000_VLVF_VLANID_ENABLE))
5169                                         break;
5170                         }
5171                 }
5172                 if (i < E1000_VLVF_ARRAY_SIZE) {
5173                         /* Found an enabled/available entry */
5174                         reg |= 1 << (E1000_VLVF_POOLSEL_SHIFT + vf);
5175
5176                         /* if !enabled we need to set this up in vfta */
5177                         if (!(reg & E1000_VLVF_VLANID_ENABLE)) {
5178                                 /* add VID to filter table */
5179                                 igb_vfta_set(hw, vid, true);
5180                                 reg |= E1000_VLVF_VLANID_ENABLE;
5181                         }
5182                         reg &= ~E1000_VLVF_VLANID_MASK;
5183                         reg |= vid;
5184                         wr32(E1000_VLVF(i), reg);
5185
5186                         /* do not modify RLPML for PF devices */
5187                         if (vf >= adapter->vfs_allocated_count)
5188                                 return 0;
5189
5190                         if (!adapter->vf_data[vf].vlans_enabled) {
5191                                 u32 size;
5192                                 reg = rd32(E1000_VMOLR(vf));
5193                                 size = reg & E1000_VMOLR_RLPML_MASK;
5194                                 size += 4;
5195                                 reg &= ~E1000_VMOLR_RLPML_MASK;
5196                                 reg |= size;
5197                                 wr32(E1000_VMOLR(vf), reg);
5198                         }
5199
5200                         adapter->vf_data[vf].vlans_enabled++;
5201                 }
5202         } else {
5203                 if (i < E1000_VLVF_ARRAY_SIZE) {
5204                         /* remove vf from the pool */
5205                         reg &= ~(1 << (E1000_VLVF_POOLSEL_SHIFT + vf));
5206                         /* if pool is empty then remove entry from vfta */
5207                         if (!(reg & E1000_VLVF_POOLSEL_MASK)) {
5208                                 reg = 0;
5209                                 igb_vfta_set(hw, vid, false);
5210                         }
5211                         wr32(E1000_VLVF(i), reg);
5212
5213                         /* do not modify RLPML for PF devices */
5214                         if (vf >= adapter->vfs_allocated_count)
5215                                 return 0;
5216
5217                         adapter->vf_data[vf].vlans_enabled--;
5218                         if (!adapter->vf_data[vf].vlans_enabled) {
5219                                 u32 size;
5220                                 reg = rd32(E1000_VMOLR(vf));
5221                                 size = reg & E1000_VMOLR_RLPML_MASK;
5222                                 size -= 4;
5223                                 reg &= ~E1000_VMOLR_RLPML_MASK;
5224                                 reg |= size;
5225                                 wr32(E1000_VMOLR(vf), reg);
5226                         }
5227                 }
5228         }
5229         return 0;
5230 }
5231
5232 static void igb_set_vmvir(struct igb_adapter *adapter, u32 vid, u32 vf)
5233 {
5234         struct e1000_hw *hw = &adapter->hw;
5235
5236         if (vid)
5237                 wr32(E1000_VMVIR(vf), (vid | E1000_VMVIR_VLANA_DEFAULT));
5238         else
5239                 wr32(E1000_VMVIR(vf), 0);
5240 }
5241
5242 static int igb_ndo_set_vf_vlan(struct net_device *netdev,
5243                                int vf, u16 vlan, u8 qos)
5244 {
5245         int err = 0;
5246         struct igb_adapter *adapter = netdev_priv(netdev);
5247
5248         if ((vf >= adapter->vfs_allocated_count) || (vlan > 4095) || (qos > 7))
5249                 return -EINVAL;
5250         if (vlan || qos) {
5251                 err = igb_vlvf_set(adapter, vlan, !!vlan, vf);
5252                 if (err)
5253                         goto out;
5254                 igb_set_vmvir(adapter, vlan | (qos << VLAN_PRIO_SHIFT), vf);
5255                 igb_set_vmolr(adapter, vf, !vlan);
5256                 adapter->vf_data[vf].pf_vlan = vlan;
5257                 adapter->vf_data[vf].pf_qos = qos;
5258                 dev_info(&adapter->pdev->dev,
5259                          "Setting VLAN %d, QOS 0x%x on VF %d\n", vlan, qos, vf);
5260                 if (test_bit(__IGB_DOWN, &adapter->state)) {
5261                         dev_warn(&adapter->pdev->dev,
5262                                  "The VF VLAN has been set,"
5263                                  " but the PF device is not up.\n");
5264                         dev_warn(&adapter->pdev->dev,
5265                                  "Bring the PF device up before"
5266                                  " attempting to use the VF device.\n");
5267                 }
5268         } else {
5269                 igb_vlvf_set(adapter, adapter->vf_data[vf].pf_vlan,
5270                                    false, vf);
5271                 igb_set_vmvir(adapter, vlan, vf);
5272                 igb_set_vmolr(adapter, vf, true);
5273                 adapter->vf_data[vf].pf_vlan = 0;
5274                 adapter->vf_data[vf].pf_qos = 0;
5275        }
5276 out:
5277        return err;
5278 }
5279
5280 static int igb_set_vf_vlan(struct igb_adapter *adapter, u32 *msgbuf, u32 vf)
5281 {
5282         int add = (msgbuf[0] & E1000_VT_MSGINFO_MASK) >> E1000_VT_MSGINFO_SHIFT;
5283         int vid = (msgbuf[1] & E1000_VLVF_VLANID_MASK);
5284
5285         return igb_vlvf_set(adapter, vid, add, vf);
5286 }
5287
5288 static inline void igb_vf_reset(struct igb_adapter *adapter, u32 vf)
5289 {
5290         /* clear flags - except flag that indicates PF has set the MAC */
5291         adapter->vf_data[vf].flags &= IGB_VF_FLAG_PF_SET_MAC;
5292         adapter->vf_data[vf].last_nack = jiffies;
5293
5294         /* reset offloads to defaults */
5295         igb_set_vmolr(adapter, vf, true);
5296
5297         /* reset vlans for device */
5298         igb_clear_vf_vfta(adapter, vf);
5299         if (adapter->vf_data[vf].pf_vlan)
5300                 igb_ndo_set_vf_vlan(adapter->netdev, vf,
5301                                     adapter->vf_data[vf].pf_vlan,
5302                                     adapter->vf_data[vf].pf_qos);
5303         else
5304                 igb_clear_vf_vfta(adapter, vf);
5305
5306         /* reset multicast table array for vf */
5307         adapter->vf_data[vf].num_vf_mc_hashes = 0;
5308
5309         /* Flush and reset the mta with the new values */
5310         igb_set_rx_mode(adapter->netdev);
5311 }
5312
5313 static void igb_vf_reset_event(struct igb_adapter *adapter, u32 vf)
5314 {
5315         unsigned char *vf_mac = adapter->vf_data[vf].vf_mac_addresses;
5316
5317         /* generate a new mac address as we were hotplug removed/added */
5318         if (!(adapter->vf_data[vf].flags & IGB_VF_FLAG_PF_SET_MAC))
5319                 eth_random_addr(vf_mac);
5320
5321         /* process remaining reset events */
5322         igb_vf_reset(adapter, vf);
5323 }
5324
5325 static void igb_vf_reset_msg(struct igb_adapter *adapter, u32 vf)
5326 {
5327         struct e1000_hw *hw = &adapter->hw;
5328         unsigned char *vf_mac = adapter->vf_data[vf].vf_mac_addresses;
5329         int rar_entry = hw->mac.rar_entry_count - (vf + 1);
5330         u32 reg, msgbuf[3];
5331         u8 *addr = (u8 *)(&msgbuf[1]);
5332
5333         /* process all the same items cleared in a function level reset */
5334         igb_vf_reset(adapter, vf);
5335
5336         /* set vf mac address */
5337         igb_rar_set_qsel(adapter, vf_mac, rar_entry, vf);
5338
5339         /* enable transmit and receive for vf */
5340         reg = rd32(E1000_VFTE);
5341         wr32(E1000_VFTE, reg | (1 << vf));
5342         reg = rd32(E1000_VFRE);
5343         wr32(E1000_VFRE, reg | (1 << vf));
5344
5345         adapter->vf_data[vf].flags |= IGB_VF_FLAG_CTS;
5346
5347         /* reply to reset with ack and vf mac address */
5348         msgbuf[0] = E1000_VF_RESET | E1000_VT_MSGTYPE_ACK;
5349         memcpy(addr, vf_mac, 6);
5350         igb_write_mbx(hw, msgbuf, 3, vf);
5351 }
5352
5353 static int igb_set_vf_mac_addr(struct igb_adapter *adapter, u32 *msg, int vf)
5354 {
5355         /*
5356          * The VF MAC Address is stored in a packed array of bytes
5357          * starting at the second 32 bit word of the msg array
5358          */
5359         unsigned char *addr = (char *)&msg[1];
5360         int err = -1;
5361
5362         if (is_valid_ether_addr(addr))
5363                 err = igb_set_vf_mac(adapter, vf, addr);
5364
5365         return err;
5366 }
5367
5368 static void igb_rcv_ack_from_vf(struct igb_adapter *adapter, u32 vf)
5369 {
5370         struct e1000_hw *hw = &adapter->hw;
5371         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
5372         u32 msg = E1000_VT_MSGTYPE_NACK;
5373
5374         /* if device isn't clear to send it shouldn't be reading either */
5375         if (!(vf_data->flags & IGB_VF_FLAG_CTS) &&
5376             time_after(jiffies, vf_data->last_nack + (2 * HZ))) {
5377                 igb_write_mbx(hw, &msg, 1, vf);
5378                 vf_data->last_nack = jiffies;
5379         }
5380 }
5381
5382 static void igb_rcv_msg_from_vf(struct igb_adapter *adapter, u32 vf)
5383 {
5384         struct pci_dev *pdev = adapter->pdev;
5385         u32 msgbuf[E1000_VFMAILBOX_SIZE];
5386         struct e1000_hw *hw = &adapter->hw;
5387         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
5388         s32 retval;
5389
5390         retval = igb_read_mbx(hw, msgbuf, E1000_VFMAILBOX_SIZE, vf);
5391
5392         if (retval) {
5393                 /* if receive failed revoke VF CTS stats and restart init */
5394                 dev_err(&pdev->dev, "Error receiving message from VF\n");
5395                 vf_data->flags &= ~IGB_VF_FLAG_CTS;
5396                 if (!time_after(jiffies, vf_data->last_nack + (2 * HZ)))
5397                         return;
5398                 goto out;
5399         }
5400
5401         /* this is a message we already processed, do nothing */
5402         if (msgbuf[0] & (E1000_VT_MSGTYPE_ACK | E1000_VT_MSGTYPE_NACK))
5403                 return;
5404
5405         /*
5406          * until the vf completes a reset it should not be
5407          * allowed to start any configuration.
5408          */
5409
5410         if (msgbuf[0] == E1000_VF_RESET) {
5411                 igb_vf_reset_msg(adapter, vf);
5412                 return;
5413         }
5414
5415         if (!(vf_data->flags & IGB_VF_FLAG_CTS)) {
5416                 if (!time_after(jiffies, vf_data->last_nack + (2 * HZ)))
5417                         return;
5418                 retval = -1;
5419                 goto out;
5420         }
5421
5422         switch ((msgbuf[0] & 0xFFFF)) {
5423         case E1000_VF_SET_MAC_ADDR:
5424                 retval = -EINVAL;
5425                 if (!(vf_data->flags & IGB_VF_FLAG_PF_SET_MAC))
5426                         retval = igb_set_vf_mac_addr(adapter, msgbuf, vf);
5427                 else
5428                         dev_warn(&pdev->dev,
5429                                  "VF %d attempted to override administratively "
5430                                  "set MAC address\nReload the VF driver to "
5431                                  "resume operations\n", vf);
5432                 break;
5433         case E1000_VF_SET_PROMISC:
5434                 retval = igb_set_vf_promisc(adapter, msgbuf, vf);
5435                 break;
5436         case E1000_VF_SET_MULTICAST:
5437                 retval = igb_set_vf_multicasts(adapter, msgbuf, vf);
5438                 break;
5439         case E1000_VF_SET_LPE:
5440                 retval = igb_set_vf_rlpml(adapter, msgbuf[1], vf);
5441                 break;
5442         case E1000_VF_SET_VLAN:
5443                 retval = -1;
5444                 if (vf_data->pf_vlan)
5445                         dev_warn(&pdev->dev,
5446                                  "VF %d attempted to override administratively "
5447                                  "set VLAN tag\nReload the VF driver to "
5448                                  "resume operations\n", vf);
5449                 else
5450                         retval = igb_set_vf_vlan(adapter, msgbuf, vf);
5451                 break;
5452         default:
5453                 dev_err(&pdev->dev, "Unhandled Msg %08x\n", msgbuf[0]);
5454                 retval = -1;
5455                 break;
5456         }
5457
5458         msgbuf[0] |= E1000_VT_MSGTYPE_CTS;
5459 out:
5460         /* notify the VF of the results of what it sent us */
5461         if (retval)
5462                 msgbuf[0] |= E1000_VT_MSGTYPE_NACK;
5463         else
5464                 msgbuf[0] |= E1000_VT_MSGTYPE_ACK;
5465
5466         igb_write_mbx(hw, msgbuf, 1, vf);
5467 }
5468
5469 static void igb_msg_task(struct igb_adapter *adapter)
5470 {
5471         struct e1000_hw *hw = &adapter->hw;
5472         u32 vf;
5473
5474         for (vf = 0; vf < adapter->vfs_allocated_count; vf++) {
5475                 /* process any reset requests */
5476                 if (!igb_check_for_rst(hw, vf))
5477                         igb_vf_reset_event(adapter, vf);
5478
5479                 /* process any messages pending */
5480                 if (!igb_check_for_msg(hw, vf))
5481                         igb_rcv_msg_from_vf(adapter, vf);
5482
5483                 /* process any acks */
5484                 if (!igb_check_for_ack(hw, vf))
5485                         igb_rcv_ack_from_vf(adapter, vf);
5486         }
5487 }
5488
5489 /**
5490  *  igb_set_uta - Set unicast filter table address
5491  *  @adapter: board private structure
5492  *
5493  *  The unicast table address is a register array of 32-bit registers.
5494  *  The table is meant to be used in a way similar to how the MTA is used
5495  *  however due to certain limitations in the hardware it is necessary to
5496  *  set all the hash bits to 1 and use the VMOLR ROPE bit as a promiscuous
5497  *  enable bit to allow vlan tag stripping when promiscuous mode is enabled
5498  **/
5499 static void igb_set_uta(struct igb_adapter *adapter)
5500 {
5501         struct e1000_hw *hw = &adapter->hw;
5502         int i;
5503
5504         /* The UTA table only exists on 82576 hardware and newer */
5505         if (hw->mac.type < e1000_82576)
5506                 return;
5507
5508         /* we only need to do this if VMDq is enabled */
5509         if (!adapter->vfs_allocated_count)
5510                 return;
5511
5512         for (i = 0; i < hw->mac.uta_reg_count; i++)
5513                 array_wr32(E1000_UTA, i, ~0);
5514 }
5515
5516 /**
5517  * igb_intr_msi - Interrupt Handler
5518  * @irq: interrupt number
5519  * @data: pointer to a network interface device structure
5520  **/
5521 static irqreturn_t igb_intr_msi(int irq, void *data)
5522 {
5523         struct igb_adapter *adapter = data;
5524         struct igb_q_vector *q_vector = adapter->q_vector[0];
5525         struct e1000_hw *hw = &adapter->hw;
5526         /* read ICR disables interrupts using IAM */
5527         u32 icr = rd32(E1000_ICR);
5528
5529         igb_write_itr(q_vector);
5530
5531         if (icr & E1000_ICR_DRSTA)
5532                 schedule_work(&adapter->reset_task);
5533
5534         if (icr & E1000_ICR_DOUTSYNC) {
5535                 /* HW is reporting DMA is out of sync */
5536                 adapter->stats.doosync++;
5537         }
5538
5539         if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
5540                 hw->mac.get_link_status = 1;
5541                 if (!test_bit(__IGB_DOWN, &adapter->state))
5542                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
5543         }
5544
5545 #ifdef CONFIG_IGB_PTP
5546         if (icr & E1000_ICR_TS) {
5547                 u32 tsicr = rd32(E1000_TSICR);
5548
5549                 if (tsicr & E1000_TSICR_TXTS) {
5550                         /* acknowledge the interrupt */
5551                         wr32(E1000_TSICR, E1000_TSICR_TXTS);
5552                         /* retrieve hardware timestamp */
5553                         schedule_work(&adapter->ptp_tx_work);
5554                 }
5555         }
5556 #endif /* CONFIG_IGB_PTP */
5557
5558         napi_schedule(&q_vector->napi);
5559
5560         return IRQ_HANDLED;
5561 }
5562
5563 /**
5564  * igb_intr - Legacy Interrupt Handler
5565  * @irq: interrupt number
5566  * @data: pointer to a network interface device structure
5567  **/
5568 static irqreturn_t igb_intr(int irq, void *data)
5569 {
5570         struct igb_adapter *adapter = data;
5571         struct igb_q_vector *q_vector = adapter->q_vector[0];
5572         struct e1000_hw *hw = &adapter->hw;
5573         /* Interrupt Auto-Mask...upon reading ICR, interrupts are masked.  No
5574          * need for the IMC write */
5575         u32 icr = rd32(E1000_ICR);
5576
5577         /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
5578          * not set, then the adapter didn't send an interrupt */
5579         if (!(icr & E1000_ICR_INT_ASSERTED))
5580                 return IRQ_NONE;
5581
5582         igb_write_itr(q_vector);
5583
5584         if (icr & E1000_ICR_DRSTA)
5585                 schedule_work(&adapter->reset_task);
5586
5587         if (icr & E1000_ICR_DOUTSYNC) {
5588                 /* HW is reporting DMA is out of sync */
5589                 adapter->stats.doosync++;
5590         }
5591
5592         if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
5593                 hw->mac.get_link_status = 1;
5594                 /* guard against interrupt when we're going down */
5595                 if (!test_bit(__IGB_DOWN, &adapter->state))
5596                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
5597         }
5598
5599 #ifdef CONFIG_IGB_PTP
5600         if (icr & E1000_ICR_TS) {
5601                 u32 tsicr = rd32(E1000_TSICR);
5602
5603                 if (tsicr & E1000_TSICR_TXTS) {
5604                         /* acknowledge the interrupt */
5605                         wr32(E1000_TSICR, E1000_TSICR_TXTS);
5606                         /* retrieve hardware timestamp */
5607                         schedule_work(&adapter->ptp_tx_work);
5608                 }
5609         }
5610 #endif /* CONFIG_IGB_PTP */
5611
5612         napi_schedule(&q_vector->napi);
5613
5614         return IRQ_HANDLED;
5615 }
5616
5617 static void igb_ring_irq_enable(struct igb_q_vector *q_vector)
5618 {
5619         struct igb_adapter *adapter = q_vector->adapter;
5620         struct e1000_hw *hw = &adapter->hw;
5621
5622         if ((q_vector->rx.ring && (adapter->rx_itr_setting & 3)) ||
5623             (!q_vector->rx.ring && (adapter->tx_itr_setting & 3))) {
5624                 if ((adapter->num_q_vectors == 1) && !adapter->vf_data)
5625                         igb_set_itr(q_vector);
5626                 else
5627                         igb_update_ring_itr(q_vector);
5628         }
5629
5630         if (!test_bit(__IGB_DOWN, &adapter->state)) {
5631                 if (adapter->msix_entries)
5632                         wr32(E1000_EIMS, q_vector->eims_value);
5633                 else
5634                         igb_irq_enable(adapter);
5635         }
5636 }
5637
5638 /**
5639  * igb_poll - NAPI Rx polling callback
5640  * @napi: napi polling structure
5641  * @budget: count of how many packets we should handle
5642  **/
5643 static int igb_poll(struct napi_struct *napi, int budget)
5644 {
5645         struct igb_q_vector *q_vector = container_of(napi,
5646                                                      struct igb_q_vector,
5647                                                      napi);
5648         bool clean_complete = true;
5649
5650 #ifdef CONFIG_IGB_DCA
5651         if (q_vector->adapter->flags & IGB_FLAG_DCA_ENABLED)
5652                 igb_update_dca(q_vector);
5653 #endif
5654         if (q_vector->tx.ring)
5655                 clean_complete = igb_clean_tx_irq(q_vector);
5656
5657         if (q_vector->rx.ring)
5658                 clean_complete &= igb_clean_rx_irq(q_vector, budget);
5659
5660         /* If all work not completed, return budget and keep polling */
5661         if (!clean_complete)
5662                 return budget;
5663
5664         /* If not enough Rx work done, exit the polling mode */
5665         napi_complete(napi);
5666         igb_ring_irq_enable(q_vector);
5667
5668         return 0;
5669 }
5670
5671 /**
5672  * igb_clean_tx_irq - Reclaim resources after transmit completes
5673  * @q_vector: pointer to q_vector containing needed info
5674  *
5675  * returns true if ring is completely cleaned
5676  **/
5677 static bool igb_clean_tx_irq(struct igb_q_vector *q_vector)
5678 {
5679         struct igb_adapter *adapter = q_vector->adapter;
5680         struct igb_ring *tx_ring = q_vector->tx.ring;
5681         struct igb_tx_buffer *tx_buffer;
5682         union e1000_adv_tx_desc *tx_desc;
5683         unsigned int total_bytes = 0, total_packets = 0;
5684         unsigned int budget = q_vector->tx.work_limit;
5685         unsigned int i = tx_ring->next_to_clean;
5686
5687         if (test_bit(__IGB_DOWN, &adapter->state))
5688                 return true;
5689
5690         tx_buffer = &tx_ring->tx_buffer_info[i];
5691         tx_desc = IGB_TX_DESC(tx_ring, i);
5692         i -= tx_ring->count;
5693
5694         do {
5695                 union e1000_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
5696
5697                 /* if next_to_watch is not set then there is no work pending */
5698                 if (!eop_desc)
5699                         break;
5700
5701                 /* prevent any other reads prior to eop_desc */
5702                 rmb();
5703
5704                 /* if DD is not set pending work has not been completed */
5705                 if (!(eop_desc->wb.status & cpu_to_le32(E1000_TXD_STAT_DD)))
5706                         break;
5707
5708                 /* clear next_to_watch to prevent false hangs */
5709                 tx_buffer->next_to_watch = NULL;
5710
5711                 /* update the statistics for this packet */
5712                 total_bytes += tx_buffer->bytecount;
5713                 total_packets += tx_buffer->gso_segs;
5714
5715                 /* free the skb */
5716                 dev_kfree_skb_any(tx_buffer->skb);
5717
5718                 /* unmap skb header data */
5719                 dma_unmap_single(tx_ring->dev,
5720                                  dma_unmap_addr(tx_buffer, dma),
5721                                  dma_unmap_len(tx_buffer, len),
5722                                  DMA_TO_DEVICE);
5723
5724                 /* clear tx_buffer data */
5725                 tx_buffer->skb = NULL;
5726                 dma_unmap_len_set(tx_buffer, len, 0);
5727
5728                 /* clear last DMA location and unmap remaining buffers */
5729                 while (tx_desc != eop_desc) {
5730                         tx_buffer++;
5731                         tx_desc++;
5732                         i++;
5733                         if (unlikely(!i)) {
5734                                 i -= tx_ring->count;
5735                                 tx_buffer = tx_ring->tx_buffer_info;
5736                                 tx_desc = IGB_TX_DESC(tx_ring, 0);
5737                         }
5738
5739                         /* unmap any remaining paged data */
5740                         if (dma_unmap_len(tx_buffer, len)) {
5741                                 dma_unmap_page(tx_ring->dev,
5742                                                dma_unmap_addr(tx_buffer, dma),
5743                                                dma_unmap_len(tx_buffer, len),
5744                                                DMA_TO_DEVICE);
5745                                 dma_unmap_len_set(tx_buffer, len, 0);
5746                         }
5747                 }
5748
5749                 /* move us one more past the eop_desc for start of next pkt */
5750                 tx_buffer++;
5751                 tx_desc++;
5752                 i++;
5753                 if (unlikely(!i)) {
5754                         i -= tx_ring->count;
5755                         tx_buffer = tx_ring->tx_buffer_info;
5756                         tx_desc = IGB_TX_DESC(tx_ring, 0);
5757                 }
5758
5759                 /* issue prefetch for next Tx descriptor */
5760                 prefetch(tx_desc);
5761
5762                 /* update budget accounting */
5763                 budget--;
5764         } while (likely(budget));
5765
5766         netdev_tx_completed_queue(txring_txq(tx_ring),
5767                                   total_packets, total_bytes);
5768         i += tx_ring->count;
5769         tx_ring->next_to_clean = i;
5770         u64_stats_update_begin(&tx_ring->tx_syncp);
5771         tx_ring->tx_stats.bytes += total_bytes;
5772         tx_ring->tx_stats.packets += total_packets;
5773         u64_stats_update_end(&tx_ring->tx_syncp);
5774         q_vector->tx.total_bytes += total_bytes;
5775         q_vector->tx.total_packets += total_packets;
5776
5777         if (test_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags)) {
5778                 struct e1000_hw *hw = &adapter->hw;
5779
5780                 /* Detect a transmit hang in hardware, this serializes the
5781                  * check with the clearing of time_stamp and movement of i */
5782                 clear_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags);
5783                 if (tx_buffer->next_to_watch &&
5784                     time_after(jiffies, tx_buffer->time_stamp +
5785                                (adapter->tx_timeout_factor * HZ)) &&
5786                     !(rd32(E1000_STATUS) & E1000_STATUS_TXOFF)) {
5787
5788                         /* detected Tx unit hang */
5789                         dev_err(tx_ring->dev,
5790                                 "Detected Tx Unit Hang\n"
5791                                 "  Tx Queue             <%d>\n"
5792                                 "  TDH                  <%x>\n"
5793                                 "  TDT                  <%x>\n"
5794                                 "  next_to_use          <%x>\n"
5795                                 "  next_to_clean        <%x>\n"
5796                                 "buffer_info[next_to_clean]\n"
5797                                 "  time_stamp           <%lx>\n"
5798                                 "  next_to_watch        <%p>\n"
5799                                 "  jiffies              <%lx>\n"
5800                                 "  desc.status          <%x>\n",
5801                                 tx_ring->queue_index,
5802                                 rd32(E1000_TDH(tx_ring->reg_idx)),
5803                                 readl(tx_ring->tail),
5804                                 tx_ring->next_to_use,
5805                                 tx_ring->next_to_clean,
5806                                 tx_buffer->time_stamp,
5807                                 tx_buffer->next_to_watch,
5808                                 jiffies,
5809                                 tx_buffer->next_to_watch->wb.status);
5810                         netif_stop_subqueue(tx_ring->netdev,
5811                                             tx_ring->queue_index);
5812
5813                         /* we are about to reset, no point in enabling stuff */
5814                         return true;
5815                 }
5816         }
5817
5818         if (unlikely(total_packets &&
5819                      netif_carrier_ok(tx_ring->netdev) &&
5820                      igb_desc_unused(tx_ring) >= IGB_TX_QUEUE_WAKE)) {
5821                 /* Make sure that anybody stopping the queue after this
5822                  * sees the new next_to_clean.
5823                  */
5824                 smp_mb();
5825                 if (__netif_subqueue_stopped(tx_ring->netdev,
5826                                              tx_ring->queue_index) &&
5827                     !(test_bit(__IGB_DOWN, &adapter->state))) {
5828                         netif_wake_subqueue(tx_ring->netdev,
5829                                             tx_ring->queue_index);
5830
5831                         u64_stats_update_begin(&tx_ring->tx_syncp);
5832                         tx_ring->tx_stats.restart_queue++;
5833                         u64_stats_update_end(&tx_ring->tx_syncp);
5834                 }
5835         }
5836
5837         return !!budget;
5838 }
5839
5840 /**
5841  * igb_reuse_rx_page - page flip buffer and store it back on the ring
5842  * @rx_ring: rx descriptor ring to store buffers on
5843  * @old_buff: donor buffer to have page reused
5844  *
5845  * Synchronizes page for reuse by the adapter
5846  **/
5847 static void igb_reuse_rx_page(struct igb_ring *rx_ring,
5848                               struct igb_rx_buffer *old_buff)
5849 {
5850         struct igb_rx_buffer *new_buff;
5851         u16 nta = rx_ring->next_to_alloc;
5852
5853         new_buff = &rx_ring->rx_buffer_info[nta];
5854
5855         /* update, and store next to alloc */
5856         nta++;
5857         rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
5858
5859         /* transfer page from old buffer to new buffer */
5860         memcpy(new_buff, old_buff, sizeof(struct igb_rx_buffer));
5861
5862         /* sync the buffer for use by the device */
5863         dma_sync_single_range_for_device(rx_ring->dev, old_buff->dma,
5864                                          old_buff->page_offset,
5865                                          IGB_RX_BUFSZ,
5866                                          DMA_FROM_DEVICE);
5867 }
5868
5869 /**
5870  * igb_add_rx_frag - Add contents of Rx buffer to sk_buff
5871  * @rx_ring: rx descriptor ring to transact packets on
5872  * @rx_buffer: buffer containing page to add
5873  * @rx_desc: descriptor containing length of buffer written by hardware
5874  * @skb: sk_buff to place the data into
5875  *
5876  * This function will add the data contained in rx_buffer->page to the skb.
5877  * This is done either through a direct copy if the data in the buffer is
5878  * less than the skb header size, otherwise it will just attach the page as
5879  * a frag to the skb.
5880  *
5881  * The function will then update the page offset if necessary and return
5882  * true if the buffer can be reused by the adapter.
5883  **/
5884 static bool igb_add_rx_frag(struct igb_ring *rx_ring,
5885                             struct igb_rx_buffer *rx_buffer,
5886                             union e1000_adv_rx_desc *rx_desc,
5887                             struct sk_buff *skb)
5888 {
5889         struct page *page = rx_buffer->page;
5890         unsigned int size = le16_to_cpu(rx_desc->wb.upper.length);
5891
5892         if ((size <= IGB_RX_HDR_LEN) && !skb_is_nonlinear(skb)) {
5893                 unsigned char *va = page_address(page) + rx_buffer->page_offset;
5894
5895 #ifdef CONFIG_IGB_PTP
5896                 if (igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP)) {
5897                         igb_ptp_rx_pktstamp(rx_ring->q_vector, va, skb);
5898                         va += IGB_TS_HDR_LEN;
5899                         size -= IGB_TS_HDR_LEN;
5900                 }
5901
5902 #endif
5903                 memcpy(__skb_put(skb, size), va, ALIGN(size, sizeof(long)));
5904
5905                 /* we can reuse buffer as-is, just make sure it is local */
5906                 if (likely(page_to_nid(page) == numa_node_id()))
5907                         return true;
5908
5909                 /* this page cannot be reused so discard it */
5910                 put_page(page);
5911                 return false;
5912         }
5913
5914         skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, page,
5915                         rx_buffer->page_offset, size, IGB_RX_BUFSZ);
5916
5917         /* avoid re-using remote pages */
5918         if (unlikely(page_to_nid(page) != numa_node_id()))
5919                 return false;
5920
5921 #if (PAGE_SIZE < 8192)
5922         /* if we are only owner of page we can reuse it */
5923         if (unlikely(page_count(page) != 1))
5924                 return false;
5925
5926         /* flip page offset to other buffer */
5927         rx_buffer->page_offset ^= IGB_RX_BUFSZ;
5928
5929         /*
5930          * since we are the only owner of the page and we need to
5931          * increment it, just set the value to 2 in order to avoid
5932          * an unnecessary locked operation
5933          */
5934         atomic_set(&page->_count, 2);
5935 #else
5936         /* move offset up to the next cache line */
5937         rx_buffer->page_offset += SKB_DATA_ALIGN(size);
5938
5939         if (rx_buffer->page_offset > (PAGE_SIZE - IGB_RX_BUFSZ))
5940                 return false;
5941
5942         /* bump ref count on page before it is given to the stack */
5943         get_page(page);
5944 #endif
5945
5946         return true;
5947 }
5948
5949 static struct sk_buff *igb_fetch_rx_buffer(struct igb_ring *rx_ring,
5950                                            union e1000_adv_rx_desc *rx_desc,
5951                                            struct sk_buff *skb)
5952 {
5953         struct igb_rx_buffer *rx_buffer;
5954         struct page *page;
5955
5956         rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
5957
5958         /*
5959          * This memory barrier is needed to keep us from reading
5960          * any other fields out of the rx_desc until we know the
5961          * RXD_STAT_DD bit is set
5962          */
5963         rmb();
5964
5965         page = rx_buffer->page;
5966         prefetchw(page);
5967
5968         if (likely(!skb)) {
5969                 void *page_addr = page_address(page) +
5970                                   rx_buffer->page_offset;
5971
5972                 /* prefetch first cache line of first page */
5973                 prefetch(page_addr);
5974 #if L1_CACHE_BYTES < 128
5975                 prefetch(page_addr + L1_CACHE_BYTES);
5976 #endif
5977
5978                 /* allocate a skb to store the frags */
5979                 skb = netdev_alloc_skb_ip_align(rx_ring->netdev,
5980                                                 IGB_RX_HDR_LEN);
5981                 if (unlikely(!skb)) {
5982                         rx_ring->rx_stats.alloc_failed++;
5983                         return NULL;
5984                 }
5985
5986                 /*
5987                  * we will be copying header into skb->data in
5988                  * pskb_may_pull so it is in our interest to prefetch
5989                  * it now to avoid a possible cache miss
5990                  */
5991                 prefetchw(skb->data);
5992         }
5993
5994         /* we are reusing so sync this buffer for CPU use */
5995         dma_sync_single_range_for_cpu(rx_ring->dev,
5996                                       rx_buffer->dma,
5997                                       rx_buffer->page_offset,
5998                                       IGB_RX_BUFSZ,
5999                                       DMA_FROM_DEVICE);
6000
6001         /* pull page into skb */
6002         if (igb_add_rx_frag(rx_ring, rx_buffer, rx_desc, skb)) {
6003                 /* hand second half of page back to the ring */
6004                 igb_reuse_rx_page(rx_ring, rx_buffer);
6005         } else {
6006                 /* we are not reusing the buffer so unmap it */
6007                 dma_unmap_page(rx_ring->dev, rx_buffer->dma,
6008                                PAGE_SIZE, DMA_FROM_DEVICE);
6009         }
6010
6011         /* clear contents of rx_buffer */
6012         rx_buffer->page = NULL;
6013
6014         return skb;
6015 }
6016
6017 static inline void igb_rx_checksum(struct igb_ring *ring,
6018                                    union e1000_adv_rx_desc *rx_desc,
6019                                    struct sk_buff *skb)
6020 {
6021         skb_checksum_none_assert(skb);
6022
6023         /* Ignore Checksum bit is set */
6024         if (igb_test_staterr(rx_desc, E1000_RXD_STAT_IXSM))
6025                 return;
6026
6027         /* Rx checksum disabled via ethtool */
6028         if (!(ring->netdev->features & NETIF_F_RXCSUM))
6029                 return;
6030
6031         /* TCP/UDP checksum error bit is set */
6032         if (igb_test_staterr(rx_desc,
6033                              E1000_RXDEXT_STATERR_TCPE |
6034                              E1000_RXDEXT_STATERR_IPE)) {
6035                 /*
6036                  * work around errata with sctp packets where the TCPE aka
6037                  * L4E bit is set incorrectly on 64 byte (60 byte w/o crc)
6038                  * packets, (aka let the stack check the crc32c)
6039                  */
6040                 if (!((skb->len == 60) &&
6041                       test_bit(IGB_RING_FLAG_RX_SCTP_CSUM, &ring->flags))) {
6042                         u64_stats_update_begin(&ring->rx_syncp);
6043                         ring->rx_stats.csum_err++;
6044                         u64_stats_update_end(&ring->rx_syncp);
6045                 }
6046                 /* let the stack verify checksum errors */
6047                 return;
6048         }
6049         /* It must be a TCP or UDP packet with a valid checksum */
6050         if (igb_test_staterr(rx_desc, E1000_RXD_STAT_TCPCS |
6051                                       E1000_RXD_STAT_UDPCS))
6052                 skb->ip_summed = CHECKSUM_UNNECESSARY;
6053
6054         dev_dbg(ring->dev, "cksum success: bits %08X\n",
6055                 le32_to_cpu(rx_desc->wb.upper.status_error));
6056 }
6057
6058 static inline void igb_rx_hash(struct igb_ring *ring,
6059                                union e1000_adv_rx_desc *rx_desc,
6060                                struct sk_buff *skb)
6061 {
6062         if (ring->netdev->features & NETIF_F_RXHASH)
6063                 skb->rxhash = le32_to_cpu(rx_desc->wb.lower.hi_dword.rss);
6064 }
6065
6066 /**
6067  * igb_is_non_eop - process handling of non-EOP buffers
6068  * @rx_ring: Rx ring being processed
6069  * @rx_desc: Rx descriptor for current buffer
6070  * @skb: current socket buffer containing buffer in progress
6071  *
6072  * This function updates next to clean.  If the buffer is an EOP buffer
6073  * this function exits returning false, otherwise it will place the
6074  * sk_buff in the next buffer to be chained and return true indicating
6075  * that this is in fact a non-EOP buffer.
6076  **/
6077 static bool igb_is_non_eop(struct igb_ring *rx_ring,
6078                            union e1000_adv_rx_desc *rx_desc)
6079 {
6080         u32 ntc = rx_ring->next_to_clean + 1;
6081
6082         /* fetch, update, and store next to clean */
6083         ntc = (ntc < rx_ring->count) ? ntc : 0;
6084         rx_ring->next_to_clean = ntc;
6085
6086         prefetch(IGB_RX_DESC(rx_ring, ntc));
6087
6088         if (likely(igb_test_staterr(rx_desc, E1000_RXD_STAT_EOP)))
6089                 return false;
6090
6091         return true;
6092 }
6093
6094 /**
6095  * igb_get_headlen - determine size of header for LRO/GRO
6096  * @data: pointer to the start of the headers
6097  * @max_len: total length of section to find headers in
6098  *
6099  * This function is meant to determine the length of headers that will
6100  * be recognized by hardware for LRO, and GRO offloads.  The main
6101  * motivation of doing this is to only perform one pull for IPv4 TCP
6102  * packets so that we can do basic things like calculating the gso_size
6103  * based on the average data per packet.
6104  **/
6105 static unsigned int igb_get_headlen(unsigned char *data,
6106                                     unsigned int max_len)
6107 {
6108         union {
6109                 unsigned char *network;
6110                 /* l2 headers */
6111                 struct ethhdr *eth;
6112                 struct vlan_hdr *vlan;
6113                 /* l3 headers */
6114                 struct iphdr *ipv4;
6115                 struct ipv6hdr *ipv6;
6116         } hdr;
6117         __be16 protocol;
6118         u8 nexthdr = 0; /* default to not TCP */
6119         u8 hlen;
6120
6121         /* this should never happen, but better safe than sorry */
6122         if (max_len < ETH_HLEN)
6123                 return max_len;
6124
6125         /* initialize network frame pointer */
6126         hdr.network = data;
6127
6128         /* set first protocol and move network header forward */
6129         protocol = hdr.eth->h_proto;
6130         hdr.network += ETH_HLEN;
6131
6132         /* handle any vlan tag if present */
6133         if (protocol == __constant_htons(ETH_P_8021Q)) {
6134                 if ((hdr.network - data) > (max_len - VLAN_HLEN))
6135                         return max_len;
6136
6137                 protocol = hdr.vlan->h_vlan_encapsulated_proto;
6138                 hdr.network += VLAN_HLEN;
6139         }
6140
6141         /* handle L3 protocols */
6142         if (protocol == __constant_htons(ETH_P_IP)) {
6143                 if ((hdr.network - data) > (max_len - sizeof(struct iphdr)))
6144                         return max_len;
6145
6146                 /* access ihl as a u8 to avoid unaligned access on ia64 */
6147                 hlen = (hdr.network[0] & 0x0F) << 2;
6148
6149                 /* verify hlen meets minimum size requirements */
6150                 if (hlen < sizeof(struct iphdr))
6151                         return hdr.network - data;
6152
6153                 /* record next protocol */
6154                 nexthdr = hdr.ipv4->protocol;
6155                 hdr.network += hlen;
6156         } else if (protocol == __constant_htons(ETH_P_IPV6)) {
6157                 if ((hdr.network - data) > (max_len - sizeof(struct ipv6hdr)))
6158                         return max_len;
6159
6160                 /* record next protocol */
6161                 nexthdr = hdr.ipv6->nexthdr;
6162                 hdr.network += sizeof(struct ipv6hdr);
6163         } else {
6164                 return hdr.network - data;
6165         }
6166
6167         /* finally sort out TCP */
6168         if (nexthdr == IPPROTO_TCP) {
6169                 if ((hdr.network - data) > (max_len - sizeof(struct tcphdr)))
6170                         return max_len;
6171
6172                 /* access doff as a u8 to avoid unaligned access on ia64 */
6173                 hlen = (hdr.network[12] & 0xF0) >> 2;
6174
6175                 /* verify hlen meets minimum size requirements */
6176                 if (hlen < sizeof(struct tcphdr))
6177                         return hdr.network - data;
6178
6179                 hdr.network += hlen;
6180         } else if (nexthdr == IPPROTO_UDP) {
6181                 if ((hdr.network - data) > (max_len - sizeof(struct udphdr)))
6182                         return max_len;
6183
6184                 hdr.network += sizeof(struct udphdr);
6185         }
6186
6187         /*
6188          * If everything has gone correctly hdr.network should be the
6189          * data section of the packet and will be the end of the header.
6190          * If not then it probably represents the end of the last recognized
6191          * header.
6192          */
6193         if ((hdr.network - data) < max_len)
6194                 return hdr.network - data;
6195         else
6196                 return max_len;
6197 }
6198
6199 /**
6200  * igb_pull_tail - igb specific version of skb_pull_tail
6201  * @rx_ring: rx descriptor ring packet is being transacted on
6202  * @rx_desc: pointer to the EOP Rx descriptor
6203  * @skb: pointer to current skb being adjusted
6204  *
6205  * This function is an igb specific version of __pskb_pull_tail.  The
6206  * main difference between this version and the original function is that
6207  * this function can make several assumptions about the state of things
6208  * that allow for significant optimizations versus the standard function.
6209  * As a result we can do things like drop a frag and maintain an accurate
6210  * truesize for the skb.
6211  */
6212 static void igb_pull_tail(struct igb_ring *rx_ring,
6213                           union e1000_adv_rx_desc *rx_desc,
6214                           struct sk_buff *skb)
6215 {
6216         struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
6217         unsigned char *va;
6218         unsigned int pull_len;
6219
6220         /*
6221          * it is valid to use page_address instead of kmap since we are
6222          * working with pages allocated out of the lomem pool per
6223          * alloc_page(GFP_ATOMIC)
6224          */
6225         va = skb_frag_address(frag);
6226
6227 #ifdef CONFIG_IGB_PTP
6228         if (igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP)) {
6229                 /* retrieve timestamp from buffer */
6230                 igb_ptp_rx_pktstamp(rx_ring->q_vector, va, skb);
6231
6232                 /* update pointers to remove timestamp header */
6233                 skb_frag_size_sub(frag, IGB_TS_HDR_LEN);
6234                 frag->page_offset += IGB_TS_HDR_LEN;
6235                 skb->data_len -= IGB_TS_HDR_LEN;
6236                 skb->len -= IGB_TS_HDR_LEN;
6237
6238                 /* move va to start of packet data */
6239                 va += IGB_TS_HDR_LEN;
6240         }
6241
6242 #endif
6243         /*
6244          * we need the header to contain the greater of either ETH_HLEN or
6245          * 60 bytes if the skb->len is less than 60 for skb_pad.
6246          */
6247         pull_len = igb_get_headlen(va, IGB_RX_HDR_LEN);
6248
6249         /* align pull length to size of long to optimize memcpy performance */
6250         skb_copy_to_linear_data(skb, va, ALIGN(pull_len, sizeof(long)));
6251
6252         /* update all of the pointers */
6253         skb_frag_size_sub(frag, pull_len);
6254         frag->page_offset += pull_len;
6255         skb->data_len -= pull_len;
6256         skb->tail += pull_len;
6257 }
6258
6259 /**
6260  * igb_cleanup_headers - Correct corrupted or empty headers
6261  * @rx_ring: rx descriptor ring packet is being transacted on
6262  * @rx_desc: pointer to the EOP Rx descriptor
6263  * @skb: pointer to current skb being fixed
6264  *
6265  * Address the case where we are pulling data in on pages only
6266  * and as such no data is present in the skb header.
6267  *
6268  * In addition if skb is not at least 60 bytes we need to pad it so that
6269  * it is large enough to qualify as a valid Ethernet frame.
6270  *
6271  * Returns true if an error was encountered and skb was freed.
6272  **/
6273 static bool igb_cleanup_headers(struct igb_ring *rx_ring,
6274                                 union e1000_adv_rx_desc *rx_desc,
6275                                 struct sk_buff *skb)
6276 {
6277
6278         if (unlikely((igb_test_staterr(rx_desc,
6279                                        E1000_RXDEXT_ERR_FRAME_ERR_MASK)))) {
6280                 struct net_device *netdev = rx_ring->netdev;
6281                 if (!(netdev->features & NETIF_F_RXALL)) {
6282                         dev_kfree_skb_any(skb);
6283                         return true;
6284                 }
6285         }
6286
6287         /* place header in linear portion of buffer */
6288         if (skb_is_nonlinear(skb))
6289                 igb_pull_tail(rx_ring, rx_desc, skb);
6290
6291         /* if skb_pad returns an error the skb was freed */
6292         if (unlikely(skb->len < 60)) {
6293                 int pad_len = 60 - skb->len;
6294
6295                 if (skb_pad(skb, pad_len))
6296                         return true;
6297                 __skb_put(skb, pad_len);
6298         }
6299
6300         return false;
6301 }
6302
6303 /**
6304  * igb_process_skb_fields - Populate skb header fields from Rx descriptor
6305  * @rx_ring: rx descriptor ring packet is being transacted on
6306  * @rx_desc: pointer to the EOP Rx descriptor
6307  * @skb: pointer to current skb being populated
6308  *
6309  * This function checks the ring, descriptor, and packet information in
6310  * order to populate the hash, checksum, VLAN, timestamp, protocol, and
6311  * other fields within the skb.
6312  **/
6313 static void igb_process_skb_fields(struct igb_ring *rx_ring,
6314                                    union e1000_adv_rx_desc *rx_desc,
6315                                    struct sk_buff *skb)
6316 {
6317         struct net_device *dev = rx_ring->netdev;
6318
6319         igb_rx_hash(rx_ring, rx_desc, skb);
6320
6321         igb_rx_checksum(rx_ring, rx_desc, skb);
6322
6323 #ifdef CONFIG_IGB_PTP
6324         igb_ptp_rx_hwtstamp(rx_ring->q_vector, rx_desc, skb);
6325 #endif /* CONFIG_IGB_PTP */
6326
6327         if ((dev->features & NETIF_F_HW_VLAN_RX) &&
6328             igb_test_staterr(rx_desc, E1000_RXD_STAT_VP)) {
6329                 u16 vid;
6330                 if (igb_test_staterr(rx_desc, E1000_RXDEXT_STATERR_LB) &&
6331                     test_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP, &rx_ring->flags))
6332                         vid = be16_to_cpu(rx_desc->wb.upper.vlan);
6333                 else
6334                         vid = le16_to_cpu(rx_desc->wb.upper.vlan);
6335
6336                 __vlan_hwaccel_put_tag(skb, vid);
6337         }
6338
6339         skb_record_rx_queue(skb, rx_ring->queue_index);
6340
6341         skb->protocol = eth_type_trans(skb, rx_ring->netdev);
6342 }
6343
6344 static bool igb_clean_rx_irq(struct igb_q_vector *q_vector, const int budget)
6345 {
6346         struct igb_ring *rx_ring = q_vector->rx.ring;
6347         struct sk_buff *skb = rx_ring->skb;
6348         unsigned int total_bytes = 0, total_packets = 0;
6349         u16 cleaned_count = igb_desc_unused(rx_ring);
6350
6351         do {
6352                 union e1000_adv_rx_desc *rx_desc;
6353
6354                 /* return some buffers to hardware, one at a time is too slow */
6355                 if (cleaned_count >= IGB_RX_BUFFER_WRITE) {
6356                         igb_alloc_rx_buffers(rx_ring, cleaned_count);
6357                         cleaned_count = 0;
6358                 }
6359
6360                 rx_desc = IGB_RX_DESC(rx_ring, rx_ring->next_to_clean);
6361
6362                 if (!igb_test_staterr(rx_desc, E1000_RXD_STAT_DD))
6363                         break;
6364
6365                 /* retrieve a buffer from the ring */
6366                 skb = igb_fetch_rx_buffer(rx_ring, rx_desc, skb);
6367
6368                 /* exit if we failed to retrieve a buffer */
6369                 if (!skb)
6370                         break;
6371
6372                 cleaned_count++;
6373
6374                 /* fetch next buffer in frame if non-eop */
6375                 if (igb_is_non_eop(rx_ring, rx_desc))
6376                         continue;
6377
6378                 /* verify the packet layout is correct */
6379                 if (igb_cleanup_headers(rx_ring, rx_desc, skb)) {
6380                         skb = NULL;
6381                         continue;
6382                 }
6383
6384                 /* probably a little skewed due to removing CRC */
6385                 total_bytes += skb->len;
6386
6387                 /* populate checksum, timestamp, VLAN, and protocol */
6388                 igb_process_skb_fields(rx_ring, rx_desc, skb);
6389
6390                 napi_gro_receive(&q_vector->napi, skb);
6391
6392                 /* reset skb pointer */
6393                 skb = NULL;
6394
6395                 /* update budget accounting */
6396                 total_packets++;
6397         } while (likely(total_packets < budget));
6398
6399         /* place incomplete frames back on ring for completion */
6400         rx_ring->skb = skb;
6401
6402         u64_stats_update_begin(&rx_ring->rx_syncp);
6403         rx_ring->rx_stats.packets += total_packets;
6404         rx_ring->rx_stats.bytes += total_bytes;
6405         u64_stats_update_end(&rx_ring->rx_syncp);
6406         q_vector->rx.total_packets += total_packets;
6407         q_vector->rx.total_bytes += total_bytes;
6408
6409         if (cleaned_count)
6410                 igb_alloc_rx_buffers(rx_ring, cleaned_count);
6411
6412         return (total_packets < budget);
6413 }
6414
6415 static bool igb_alloc_mapped_page(struct igb_ring *rx_ring,
6416                                   struct igb_rx_buffer *bi)
6417 {
6418         struct page *page = bi->page;
6419         dma_addr_t dma;
6420
6421         /* since we are recycling buffers we should seldom need to alloc */
6422         if (likely(page))
6423                 return true;
6424
6425         /* alloc new page for storage */
6426         page = __skb_alloc_page(GFP_ATOMIC | __GFP_COLD, NULL);
6427         if (unlikely(!page)) {
6428                 rx_ring->rx_stats.alloc_failed++;
6429                 return false;
6430         }
6431
6432         /* map page for use */
6433         dma = dma_map_page(rx_ring->dev, page, 0, PAGE_SIZE, DMA_FROM_DEVICE);
6434
6435         /*
6436          * if mapping failed free memory back to system since
6437          * there isn't much point in holding memory we can't use
6438          */
6439         if (dma_mapping_error(rx_ring->dev, dma)) {
6440                 __free_page(page);
6441
6442                 rx_ring->rx_stats.alloc_failed++;
6443                 return false;
6444         }
6445
6446         bi->dma = dma;
6447         bi->page = page;
6448         bi->page_offset = 0;
6449
6450         return true;
6451 }
6452
6453 /**
6454  * igb_alloc_rx_buffers - Replace used receive buffers; packet split
6455  * @adapter: address of board private structure
6456  **/
6457 void igb_alloc_rx_buffers(struct igb_ring *rx_ring, u16 cleaned_count)
6458 {
6459         union e1000_adv_rx_desc *rx_desc;
6460         struct igb_rx_buffer *bi;
6461         u16 i = rx_ring->next_to_use;
6462
6463         /* nothing to do */
6464         if (!cleaned_count)
6465                 return;
6466
6467         rx_desc = IGB_RX_DESC(rx_ring, i);
6468         bi = &rx_ring->rx_buffer_info[i];
6469         i -= rx_ring->count;
6470
6471         do {
6472                 if (!igb_alloc_mapped_page(rx_ring, bi))
6473                         break;
6474
6475                 /*
6476                  * Refresh the desc even if buffer_addrs didn't change
6477                  * because each write-back erases this info.
6478                  */
6479                 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
6480
6481                 rx_desc++;
6482                 bi++;
6483                 i++;
6484                 if (unlikely(!i)) {
6485                         rx_desc = IGB_RX_DESC(rx_ring, 0);
6486                         bi = rx_ring->rx_buffer_info;
6487                         i -= rx_ring->count;
6488                 }
6489
6490                 /* clear the hdr_addr for the next_to_use descriptor */
6491                 rx_desc->read.hdr_addr = 0;
6492
6493                 cleaned_count--;
6494         } while (cleaned_count);
6495
6496         i += rx_ring->count;
6497
6498         if (rx_ring->next_to_use != i) {
6499                 /* record the next descriptor to use */
6500                 rx_ring->next_to_use = i;
6501
6502                 /* update next to alloc since we have filled the ring */
6503                 rx_ring->next_to_alloc = i;
6504
6505                 /*
6506                  * Force memory writes to complete before letting h/w
6507                  * know there are new descriptors to fetch.  (Only
6508                  * applicable for weak-ordered memory model archs,
6509                  * such as IA-64).
6510                  */
6511                 wmb();
6512                 writel(i, rx_ring->tail);
6513         }
6514 }
6515
6516 /**
6517  * igb_mii_ioctl -
6518  * @netdev:
6519  * @ifreq:
6520  * @cmd:
6521  **/
6522 static int igb_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
6523 {
6524         struct igb_adapter *adapter = netdev_priv(netdev);
6525         struct mii_ioctl_data *data = if_mii(ifr);
6526
6527         if (adapter->hw.phy.media_type != e1000_media_type_copper)
6528                 return -EOPNOTSUPP;
6529
6530         switch (cmd) {
6531         case SIOCGMIIPHY:
6532                 data->phy_id = adapter->hw.phy.addr;
6533                 break;
6534         case SIOCGMIIREG:
6535                 if (igb_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
6536                                      &data->val_out))
6537                         return -EIO;
6538                 break;
6539         case SIOCSMIIREG:
6540         default:
6541                 return -EOPNOTSUPP;
6542         }
6543         return 0;
6544 }
6545
6546 /**
6547  * igb_ioctl -
6548  * @netdev:
6549  * @ifreq:
6550  * @cmd:
6551  **/
6552 static int igb_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
6553 {
6554         switch (cmd) {
6555         case SIOCGMIIPHY:
6556         case SIOCGMIIREG:
6557         case SIOCSMIIREG:
6558                 return igb_mii_ioctl(netdev, ifr, cmd);
6559 #ifdef CONFIG_IGB_PTP
6560         case SIOCSHWTSTAMP:
6561                 return igb_ptp_hwtstamp_ioctl(netdev, ifr, cmd);
6562 #endif /* CONFIG_IGB_PTP */
6563         default:
6564                 return -EOPNOTSUPP;
6565         }
6566 }
6567
6568 s32 igb_read_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
6569 {
6570         struct igb_adapter *adapter = hw->back;
6571
6572         if (pcie_capability_read_word(adapter->pdev, reg, value))
6573                 return -E1000_ERR_CONFIG;
6574
6575         return 0;
6576 }
6577
6578 s32 igb_write_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
6579 {
6580         struct igb_adapter *adapter = hw->back;
6581
6582         if (pcie_capability_write_word(adapter->pdev, reg, *value))
6583                 return -E1000_ERR_CONFIG;
6584
6585         return 0;
6586 }
6587
6588 static void igb_vlan_mode(struct net_device *netdev, netdev_features_t features)
6589 {
6590         struct igb_adapter *adapter = netdev_priv(netdev);
6591         struct e1000_hw *hw = &adapter->hw;
6592         u32 ctrl, rctl;
6593         bool enable = !!(features & NETIF_F_HW_VLAN_RX);
6594
6595         if (enable) {
6596                 /* enable VLAN tag insert/strip */
6597                 ctrl = rd32(E1000_CTRL);
6598                 ctrl |= E1000_CTRL_VME;
6599                 wr32(E1000_CTRL, ctrl);
6600
6601                 /* Disable CFI check */
6602                 rctl = rd32(E1000_RCTL);
6603                 rctl &= ~E1000_RCTL_CFIEN;
6604                 wr32(E1000_RCTL, rctl);
6605         } else {
6606                 /* disable VLAN tag insert/strip */
6607                 ctrl = rd32(E1000_CTRL);
6608                 ctrl &= ~E1000_CTRL_VME;
6609                 wr32(E1000_CTRL, ctrl);
6610         }
6611
6612         igb_rlpml_set(adapter);
6613 }
6614
6615 static int igb_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
6616 {
6617         struct igb_adapter *adapter = netdev_priv(netdev);
6618         struct e1000_hw *hw = &adapter->hw;
6619         int pf_id = adapter->vfs_allocated_count;
6620
6621         /* attempt to add filter to vlvf array */
6622         igb_vlvf_set(adapter, vid, true, pf_id);
6623
6624         /* add the filter since PF can receive vlans w/o entry in vlvf */
6625         igb_vfta_set(hw, vid, true);
6626
6627         set_bit(vid, adapter->active_vlans);
6628
6629         return 0;
6630 }
6631
6632 static int igb_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
6633 {
6634         struct igb_adapter *adapter = netdev_priv(netdev);
6635         struct e1000_hw *hw = &adapter->hw;
6636         int pf_id = adapter->vfs_allocated_count;
6637         s32 err;
6638
6639         /* remove vlan from VLVF table array */
6640         err = igb_vlvf_set(adapter, vid, false, pf_id);
6641
6642         /* if vid was not present in VLVF just remove it from table */
6643         if (err)
6644                 igb_vfta_set(hw, vid, false);
6645
6646         clear_bit(vid, adapter->active_vlans);
6647
6648         return 0;
6649 }
6650
6651 static void igb_restore_vlan(struct igb_adapter *adapter)
6652 {
6653         u16 vid;
6654
6655         igb_vlan_mode(adapter->netdev, adapter->netdev->features);
6656
6657         for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
6658                 igb_vlan_rx_add_vid(adapter->netdev, vid);
6659 }
6660
6661 int igb_set_spd_dplx(struct igb_adapter *adapter, u32 spd, u8 dplx)
6662 {
6663         struct pci_dev *pdev = adapter->pdev;
6664         struct e1000_mac_info *mac = &adapter->hw.mac;
6665
6666         mac->autoneg = 0;
6667
6668         /* Make sure dplx is at most 1 bit and lsb of speed is not set
6669          * for the switch() below to work */
6670         if ((spd & 1) || (dplx & ~1))
6671                 goto err_inval;
6672
6673         /* Fiber NIC's only allow 1000 Gbps Full duplex */
6674         if ((adapter->hw.phy.media_type == e1000_media_type_internal_serdes) &&
6675             spd != SPEED_1000 &&
6676             dplx != DUPLEX_FULL)
6677                 goto err_inval;
6678
6679         switch (spd + dplx) {
6680         case SPEED_10 + DUPLEX_HALF:
6681                 mac->forced_speed_duplex = ADVERTISE_10_HALF;
6682                 break;
6683         case SPEED_10 + DUPLEX_FULL:
6684                 mac->forced_speed_duplex = ADVERTISE_10_FULL;
6685                 break;
6686         case SPEED_100 + DUPLEX_HALF:
6687                 mac->forced_speed_duplex = ADVERTISE_100_HALF;
6688                 break;
6689         case SPEED_100 + DUPLEX_FULL:
6690                 mac->forced_speed_duplex = ADVERTISE_100_FULL;
6691                 break;
6692         case SPEED_1000 + DUPLEX_FULL:
6693                 mac->autoneg = 1;
6694                 adapter->hw.phy.autoneg_advertised = ADVERTISE_1000_FULL;
6695                 break;
6696         case SPEED_1000 + DUPLEX_HALF: /* not supported */
6697         default:
6698                 goto err_inval;
6699         }
6700
6701         /* clear MDI, MDI(-X) override is only allowed when autoneg enabled */
6702         adapter->hw.phy.mdix = AUTO_ALL_MODES;
6703
6704         return 0;
6705
6706 err_inval:
6707         dev_err(&pdev->dev, "Unsupported Speed/Duplex configuration\n");
6708         return -EINVAL;
6709 }
6710
6711 static int __igb_shutdown(struct pci_dev *pdev, bool *enable_wake,
6712                           bool runtime)
6713 {
6714         struct net_device *netdev = pci_get_drvdata(pdev);
6715         struct igb_adapter *adapter = netdev_priv(netdev);
6716         struct e1000_hw *hw = &adapter->hw;
6717         u32 ctrl, rctl, status;
6718         u32 wufc = runtime ? E1000_WUFC_LNKC : adapter->wol;
6719 #ifdef CONFIG_PM
6720         int retval = 0;
6721 #endif
6722
6723         netif_device_detach(netdev);
6724
6725         if (netif_running(netdev))
6726                 __igb_close(netdev, true);
6727
6728         igb_clear_interrupt_scheme(adapter);
6729
6730 #ifdef CONFIG_PM
6731         retval = pci_save_state(pdev);
6732         if (retval)
6733                 return retval;
6734 #endif
6735
6736         status = rd32(E1000_STATUS);
6737         if (status & E1000_STATUS_LU)
6738                 wufc &= ~E1000_WUFC_LNKC;
6739
6740         if (wufc) {
6741                 igb_setup_rctl(adapter);
6742                 igb_set_rx_mode(netdev);
6743
6744                 /* turn on all-multi mode if wake on multicast is enabled */
6745                 if (wufc & E1000_WUFC_MC) {
6746                         rctl = rd32(E1000_RCTL);
6747                         rctl |= E1000_RCTL_MPE;
6748                         wr32(E1000_RCTL, rctl);
6749                 }
6750
6751                 ctrl = rd32(E1000_CTRL);
6752                 /* advertise wake from D3Cold */
6753                 #define E1000_CTRL_ADVD3WUC 0x00100000
6754                 /* phy power management enable */
6755                 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
6756                 ctrl |= E1000_CTRL_ADVD3WUC;
6757                 wr32(E1000_CTRL, ctrl);
6758
6759                 /* Allow time for pending master requests to run */
6760                 igb_disable_pcie_master(hw);
6761
6762                 wr32(E1000_WUC, E1000_WUC_PME_EN);
6763                 wr32(E1000_WUFC, wufc);
6764         } else {
6765                 wr32(E1000_WUC, 0);
6766                 wr32(E1000_WUFC, 0);
6767         }
6768
6769         *enable_wake = wufc || adapter->en_mng_pt;
6770         if (!*enable_wake)
6771                 igb_power_down_link(adapter);
6772         else
6773                 igb_power_up_link(adapter);
6774
6775         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
6776          * would have already happened in close and is redundant. */
6777         igb_release_hw_control(adapter);
6778
6779         pci_disable_device(pdev);
6780
6781         return 0;
6782 }
6783
6784 #ifdef CONFIG_PM
6785 #ifdef CONFIG_PM_SLEEP
6786 static int igb_suspend(struct device *dev)
6787 {
6788         int retval;
6789         bool wake;
6790         struct pci_dev *pdev = to_pci_dev(dev);
6791
6792         retval = __igb_shutdown(pdev, &wake, 0);
6793         if (retval)
6794                 return retval;
6795
6796         if (wake) {
6797                 pci_prepare_to_sleep(pdev);
6798         } else {
6799                 pci_wake_from_d3(pdev, false);
6800                 pci_set_power_state(pdev, PCI_D3hot);
6801         }
6802
6803         return 0;
6804 }
6805 #endif /* CONFIG_PM_SLEEP */
6806
6807 static int igb_resume(struct device *dev)
6808 {
6809         struct pci_dev *pdev = to_pci_dev(dev);
6810         struct net_device *netdev = pci_get_drvdata(pdev);
6811         struct igb_adapter *adapter = netdev_priv(netdev);
6812         struct e1000_hw *hw = &adapter->hw;
6813         u32 err;
6814
6815         pci_set_power_state(pdev, PCI_D0);
6816         pci_restore_state(pdev);
6817         pci_save_state(pdev);
6818
6819         err = pci_enable_device_mem(pdev);
6820         if (err) {
6821                 dev_err(&pdev->dev,
6822                         "igb: Cannot enable PCI device from suspend\n");
6823                 return err;
6824         }
6825         pci_set_master(pdev);
6826
6827         pci_enable_wake(pdev, PCI_D3hot, 0);
6828         pci_enable_wake(pdev, PCI_D3cold, 0);
6829
6830         if (igb_init_interrupt_scheme(adapter)) {
6831                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
6832                 return -ENOMEM;
6833         }
6834
6835         igb_reset(adapter);
6836
6837         /* let the f/w know that the h/w is now under the control of the
6838          * driver. */
6839         igb_get_hw_control(adapter);
6840
6841         wr32(E1000_WUS, ~0);
6842
6843         if (netdev->flags & IFF_UP) {
6844                 err = __igb_open(netdev, true);
6845                 if (err)
6846                         return err;
6847         }
6848
6849         netif_device_attach(netdev);
6850         return 0;
6851 }
6852
6853 #ifdef CONFIG_PM_RUNTIME
6854 static int igb_runtime_idle(struct device *dev)
6855 {
6856         struct pci_dev *pdev = to_pci_dev(dev);
6857         struct net_device *netdev = pci_get_drvdata(pdev);
6858         struct igb_adapter *adapter = netdev_priv(netdev);
6859
6860         if (!igb_has_link(adapter))
6861                 pm_schedule_suspend(dev, MSEC_PER_SEC * 5);
6862
6863         return -EBUSY;
6864 }
6865
6866 static int igb_runtime_suspend(struct device *dev)
6867 {
6868         struct pci_dev *pdev = to_pci_dev(dev);
6869         int retval;
6870         bool wake;
6871
6872         retval = __igb_shutdown(pdev, &wake, 1);
6873         if (retval)
6874                 return retval;
6875
6876         if (wake) {
6877                 pci_prepare_to_sleep(pdev);
6878         } else {
6879                 pci_wake_from_d3(pdev, false);
6880                 pci_set_power_state(pdev, PCI_D3hot);
6881         }
6882
6883         return 0;
6884 }
6885
6886 static int igb_runtime_resume(struct device *dev)
6887 {
6888         return igb_resume(dev);
6889 }
6890 #endif /* CONFIG_PM_RUNTIME */
6891 #endif
6892
6893 static void igb_shutdown(struct pci_dev *pdev)
6894 {
6895         bool wake;
6896
6897         __igb_shutdown(pdev, &wake, 0);
6898
6899         if (system_state == SYSTEM_POWER_OFF) {
6900                 pci_wake_from_d3(pdev, wake);
6901                 pci_set_power_state(pdev, PCI_D3hot);
6902         }
6903 }
6904
6905 #ifdef CONFIG_NET_POLL_CONTROLLER
6906 /*
6907  * Polling 'interrupt' - used by things like netconsole to send skbs
6908  * without having to re-enable interrupts. It's not called while
6909  * the interrupt routine is executing.
6910  */
6911 static void igb_netpoll(struct net_device *netdev)
6912 {
6913         struct igb_adapter *adapter = netdev_priv(netdev);
6914         struct e1000_hw *hw = &adapter->hw;
6915         struct igb_q_vector *q_vector;
6916         int i;
6917
6918         for (i = 0; i < adapter->num_q_vectors; i++) {
6919                 q_vector = adapter->q_vector[i];
6920                 if (adapter->msix_entries)
6921                         wr32(E1000_EIMC, q_vector->eims_value);
6922                 else
6923                         igb_irq_disable(adapter);
6924                 napi_schedule(&q_vector->napi);
6925         }
6926 }
6927 #endif /* CONFIG_NET_POLL_CONTROLLER */
6928
6929 /**
6930  * igb_io_error_detected - called when PCI error is detected
6931  * @pdev: Pointer to PCI device
6932  * @state: The current pci connection state
6933  *
6934  * This function is called after a PCI bus error affecting
6935  * this device has been detected.
6936  */
6937 static pci_ers_result_t igb_io_error_detected(struct pci_dev *pdev,
6938                                               pci_channel_state_t state)
6939 {
6940         struct net_device *netdev = pci_get_drvdata(pdev);
6941         struct igb_adapter *adapter = netdev_priv(netdev);
6942
6943         netif_device_detach(netdev);
6944
6945         if (state == pci_channel_io_perm_failure)
6946                 return PCI_ERS_RESULT_DISCONNECT;
6947
6948         if (netif_running(netdev))
6949                 igb_down(adapter);
6950         pci_disable_device(pdev);
6951
6952         /* Request a slot slot reset. */
6953         return PCI_ERS_RESULT_NEED_RESET;
6954 }
6955
6956 /**
6957  * igb_io_slot_reset - called after the pci bus has been reset.
6958  * @pdev: Pointer to PCI device
6959  *
6960  * Restart the card from scratch, as if from a cold-boot. Implementation
6961  * resembles the first-half of the igb_resume routine.
6962  */
6963 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *pdev)
6964 {
6965         struct net_device *netdev = pci_get_drvdata(pdev);
6966         struct igb_adapter *adapter = netdev_priv(netdev);
6967         struct e1000_hw *hw = &adapter->hw;
6968         pci_ers_result_t result;
6969         int err;
6970
6971         if (pci_enable_device_mem(pdev)) {
6972                 dev_err(&pdev->dev,
6973                         "Cannot re-enable PCI device after reset.\n");
6974                 result = PCI_ERS_RESULT_DISCONNECT;
6975         } else {
6976                 pci_set_master(pdev);
6977                 pci_restore_state(pdev);
6978                 pci_save_state(pdev);
6979
6980                 pci_enable_wake(pdev, PCI_D3hot, 0);
6981                 pci_enable_wake(pdev, PCI_D3cold, 0);
6982
6983                 igb_reset(adapter);
6984                 wr32(E1000_WUS, ~0);
6985                 result = PCI_ERS_RESULT_RECOVERED;
6986         }
6987
6988         err = pci_cleanup_aer_uncorrect_error_status(pdev);
6989         if (err) {
6990                 dev_err(&pdev->dev, "pci_cleanup_aer_uncorrect_error_status "
6991                         "failed 0x%0x\n", err);
6992                 /* non-fatal, continue */
6993         }
6994
6995         return result;
6996 }
6997
6998 /**
6999  * igb_io_resume - called when traffic can start flowing again.
7000  * @pdev: Pointer to PCI device
7001  *
7002  * This callback is called when the error recovery driver tells us that
7003  * its OK to resume normal operation. Implementation resembles the
7004  * second-half of the igb_resume routine.
7005  */
7006 static void igb_io_resume(struct pci_dev *pdev)
7007 {
7008         struct net_device *netdev = pci_get_drvdata(pdev);
7009         struct igb_adapter *adapter = netdev_priv(netdev);
7010
7011         if (netif_running(netdev)) {
7012                 if (igb_up(adapter)) {
7013                         dev_err(&pdev->dev, "igb_up failed after reset\n");
7014                         return;
7015                 }
7016         }
7017
7018         netif_device_attach(netdev);
7019
7020         /* let the f/w know that the h/w is now under the control of the
7021          * driver. */
7022         igb_get_hw_control(adapter);
7023 }
7024
7025 static void igb_rar_set_qsel(struct igb_adapter *adapter, u8 *addr, u32 index,
7026                              u8 qsel)
7027 {
7028         u32 rar_low, rar_high;
7029         struct e1000_hw *hw = &adapter->hw;
7030
7031         /* HW expects these in little endian so we reverse the byte order
7032          * from network order (big endian) to little endian
7033          */
7034         rar_low = ((u32) addr[0] | ((u32) addr[1] << 8) |
7035                   ((u32) addr[2] << 16) | ((u32) addr[3] << 24));
7036         rar_high = ((u32) addr[4] | ((u32) addr[5] << 8));
7037
7038         /* Indicate to hardware the Address is Valid. */
7039         rar_high |= E1000_RAH_AV;
7040
7041         if (hw->mac.type == e1000_82575)
7042                 rar_high |= E1000_RAH_POOL_1 * qsel;
7043         else
7044                 rar_high |= E1000_RAH_POOL_1 << qsel;
7045
7046         wr32(E1000_RAL(index), rar_low);
7047         wrfl();
7048         wr32(E1000_RAH(index), rar_high);
7049         wrfl();
7050 }
7051
7052 static int igb_set_vf_mac(struct igb_adapter *adapter,
7053                           int vf, unsigned char *mac_addr)
7054 {
7055         struct e1000_hw *hw = &adapter->hw;
7056         /* VF MAC addresses start at end of receive addresses and moves
7057          * torwards the first, as a result a collision should not be possible */
7058         int rar_entry = hw->mac.rar_entry_count - (vf + 1);
7059
7060         memcpy(adapter->vf_data[vf].vf_mac_addresses, mac_addr, ETH_ALEN);
7061
7062         igb_rar_set_qsel(adapter, mac_addr, rar_entry, vf);
7063
7064         return 0;
7065 }
7066
7067 static int igb_ndo_set_vf_mac(struct net_device *netdev, int vf, u8 *mac)
7068 {
7069         struct igb_adapter *adapter = netdev_priv(netdev);
7070         if (!is_valid_ether_addr(mac) || (vf >= adapter->vfs_allocated_count))
7071                 return -EINVAL;
7072         adapter->vf_data[vf].flags |= IGB_VF_FLAG_PF_SET_MAC;
7073         dev_info(&adapter->pdev->dev, "setting MAC %pM on VF %d\n", mac, vf);
7074         dev_info(&adapter->pdev->dev, "Reload the VF driver to make this"
7075                                       " change effective.");
7076         if (test_bit(__IGB_DOWN, &adapter->state)) {
7077                 dev_warn(&adapter->pdev->dev, "The VF MAC address has been set,"
7078                          " but the PF device is not up.\n");
7079                 dev_warn(&adapter->pdev->dev, "Bring the PF device up before"
7080                          " attempting to use the VF device.\n");
7081         }
7082         return igb_set_vf_mac(adapter, vf, mac);
7083 }
7084
7085 static int igb_link_mbps(int internal_link_speed)
7086 {
7087         switch (internal_link_speed) {
7088         case SPEED_100:
7089                 return 100;
7090         case SPEED_1000:
7091                 return 1000;
7092         default:
7093                 return 0;
7094         }
7095 }
7096
7097 static void igb_set_vf_rate_limit(struct e1000_hw *hw, int vf, int tx_rate,
7098                                   int link_speed)
7099 {
7100         int rf_dec, rf_int;
7101         u32 bcnrc_val;
7102
7103         if (tx_rate != 0) {
7104                 /* Calculate the rate factor values to set */
7105                 rf_int = link_speed / tx_rate;
7106                 rf_dec = (link_speed - (rf_int * tx_rate));
7107                 rf_dec = (rf_dec * (1<<E1000_RTTBCNRC_RF_INT_SHIFT)) / tx_rate;
7108
7109                 bcnrc_val = E1000_RTTBCNRC_RS_ENA;
7110                 bcnrc_val |= ((rf_int<<E1000_RTTBCNRC_RF_INT_SHIFT) &
7111                                E1000_RTTBCNRC_RF_INT_MASK);
7112                 bcnrc_val |= (rf_dec & E1000_RTTBCNRC_RF_DEC_MASK);
7113         } else {
7114                 bcnrc_val = 0;
7115         }
7116
7117         wr32(E1000_RTTDQSEL, vf); /* vf X uses queue X */
7118         /*
7119          * Set global transmit compensation time to the MMW_SIZE in RTTBCNRM
7120          * register. MMW_SIZE=0x014 if 9728-byte jumbo is supported.
7121          */
7122         wr32(E1000_RTTBCNRM, 0x14);
7123         wr32(E1000_RTTBCNRC, bcnrc_val);
7124 }
7125
7126 static void igb_check_vf_rate_limit(struct igb_adapter *adapter)
7127 {
7128         int actual_link_speed, i;
7129         bool reset_rate = false;
7130
7131         /* VF TX rate limit was not set or not supported */
7132         if ((adapter->vf_rate_link_speed == 0) ||
7133             (adapter->hw.mac.type != e1000_82576))
7134                 return;
7135
7136         actual_link_speed = igb_link_mbps(adapter->link_speed);
7137         if (actual_link_speed != adapter->vf_rate_link_speed) {
7138                 reset_rate = true;
7139                 adapter->vf_rate_link_speed = 0;
7140                 dev_info(&adapter->pdev->dev,
7141                          "Link speed has been changed. VF Transmit "
7142                          "rate is disabled\n");
7143         }
7144
7145         for (i = 0; i < adapter->vfs_allocated_count; i++) {
7146                 if (reset_rate)
7147                         adapter->vf_data[i].tx_rate = 0;
7148
7149                 igb_set_vf_rate_limit(&adapter->hw, i,
7150                                       adapter->vf_data[i].tx_rate,
7151                                       actual_link_speed);
7152         }
7153 }
7154
7155 static int igb_ndo_set_vf_bw(struct net_device *netdev, int vf, int tx_rate)
7156 {
7157         struct igb_adapter *adapter = netdev_priv(netdev);
7158         struct e1000_hw *hw = &adapter->hw;
7159         int actual_link_speed;
7160
7161         if (hw->mac.type != e1000_82576)
7162                 return -EOPNOTSUPP;
7163
7164         actual_link_speed = igb_link_mbps(adapter->link_speed);
7165         if ((vf >= adapter->vfs_allocated_count) ||
7166             (!(rd32(E1000_STATUS) & E1000_STATUS_LU)) ||
7167             (tx_rate < 0) || (tx_rate > actual_link_speed))
7168                 return -EINVAL;
7169
7170         adapter->vf_rate_link_speed = actual_link_speed;
7171         adapter->vf_data[vf].tx_rate = (u16)tx_rate;
7172         igb_set_vf_rate_limit(hw, vf, tx_rate, actual_link_speed);
7173
7174         return 0;
7175 }
7176
7177 static int igb_ndo_get_vf_config(struct net_device *netdev,
7178                                  int vf, struct ifla_vf_info *ivi)
7179 {
7180         struct igb_adapter *adapter = netdev_priv(netdev);
7181         if (vf >= adapter->vfs_allocated_count)
7182                 return -EINVAL;
7183         ivi->vf = vf;
7184         memcpy(&ivi->mac, adapter->vf_data[vf].vf_mac_addresses, ETH_ALEN);
7185         ivi->tx_rate = adapter->vf_data[vf].tx_rate;
7186         ivi->vlan = adapter->vf_data[vf].pf_vlan;
7187         ivi->qos = adapter->vf_data[vf].pf_qos;
7188         return 0;
7189 }
7190
7191 static void igb_vmm_control(struct igb_adapter *adapter)
7192 {
7193         struct e1000_hw *hw = &adapter->hw;
7194         u32 reg;
7195
7196         switch (hw->mac.type) {
7197         case e1000_82575:
7198         case e1000_i210:
7199         case e1000_i211:
7200         default:
7201                 /* replication is not supported for 82575 */
7202                 return;
7203         case e1000_82576:
7204                 /* notify HW that the MAC is adding vlan tags */
7205                 reg = rd32(E1000_DTXCTL);
7206                 reg |= E1000_DTXCTL_VLAN_ADDED;
7207                 wr32(E1000_DTXCTL, reg);
7208         case e1000_82580:
7209                 /* enable replication vlan tag stripping */
7210                 reg = rd32(E1000_RPLOLR);
7211                 reg |= E1000_RPLOLR_STRVLAN;
7212                 wr32(E1000_RPLOLR, reg);
7213         case e1000_i350:
7214                 /* none of the above registers are supported by i350 */
7215                 break;
7216         }
7217
7218         if (adapter->vfs_allocated_count) {
7219                 igb_vmdq_set_loopback_pf(hw, true);
7220                 igb_vmdq_set_replication_pf(hw, true);
7221                 igb_vmdq_set_anti_spoofing_pf(hw, true,
7222                                                 adapter->vfs_allocated_count);
7223         } else {
7224                 igb_vmdq_set_loopback_pf(hw, false);
7225                 igb_vmdq_set_replication_pf(hw, false);
7226         }
7227 }
7228
7229 static void igb_init_dmac(struct igb_adapter *adapter, u32 pba)
7230 {
7231         struct e1000_hw *hw = &adapter->hw;
7232         u32 dmac_thr;
7233         u16 hwm;
7234
7235         if (hw->mac.type > e1000_82580) {
7236                 if (adapter->flags & IGB_FLAG_DMAC) {
7237                         u32 reg;
7238
7239                         /* force threshold to 0. */
7240                         wr32(E1000_DMCTXTH, 0);
7241
7242                         /*
7243                          * DMA Coalescing high water mark needs to be greater
7244                          * than the Rx threshold. Set hwm to PBA - max frame
7245                          * size in 16B units, capping it at PBA - 6KB.
7246                          */
7247                         hwm = 64 * pba - adapter->max_frame_size / 16;
7248                         if (hwm < 64 * (pba - 6))
7249                                 hwm = 64 * (pba - 6);
7250                         reg = rd32(E1000_FCRTC);
7251                         reg &= ~E1000_FCRTC_RTH_COAL_MASK;
7252                         reg |= ((hwm << E1000_FCRTC_RTH_COAL_SHIFT)
7253                                 & E1000_FCRTC_RTH_COAL_MASK);
7254                         wr32(E1000_FCRTC, reg);
7255
7256                         /*
7257                          * Set the DMA Coalescing Rx threshold to PBA - 2 * max
7258                          * frame size, capping it at PBA - 10KB.
7259                          */
7260                         dmac_thr = pba - adapter->max_frame_size / 512;
7261                         if (dmac_thr < pba - 10)
7262                                 dmac_thr = pba - 10;
7263                         reg = rd32(E1000_DMACR);
7264                         reg &= ~E1000_DMACR_DMACTHR_MASK;
7265                         reg |= ((dmac_thr << E1000_DMACR_DMACTHR_SHIFT)
7266                                 & E1000_DMACR_DMACTHR_MASK);
7267
7268                         /* transition to L0x or L1 if available..*/
7269                         reg |= (E1000_DMACR_DMAC_EN | E1000_DMACR_DMAC_LX_MASK);
7270
7271                         /* watchdog timer= +-1000 usec in 32usec intervals */
7272                         reg |= (1000 >> 5);
7273
7274                         /* Disable BMC-to-OS Watchdog Enable */
7275                         reg &= ~E1000_DMACR_DC_BMC2OSW_EN;
7276                         wr32(E1000_DMACR, reg);
7277
7278                         /*
7279                          * no lower threshold to disable
7280                          * coalescing(smart fifb)-UTRESH=0
7281                          */
7282                         wr32(E1000_DMCRTRH, 0);
7283
7284                         reg = (IGB_DMCTLX_DCFLUSH_DIS | 0x4);
7285
7286                         wr32(E1000_DMCTLX, reg);
7287
7288                         /*
7289                          * free space in tx packet buffer to wake from
7290                          * DMA coal
7291                          */
7292                         wr32(E1000_DMCTXTH, (IGB_MIN_TXPBSIZE -
7293                              (IGB_TX_BUF_4096 + adapter->max_frame_size)) >> 6);
7294
7295                         /*
7296                          * make low power state decision controlled
7297                          * by DMA coal
7298                          */
7299                         reg = rd32(E1000_PCIEMISC);
7300                         reg &= ~E1000_PCIEMISC_LX_DECISION;
7301                         wr32(E1000_PCIEMISC, reg);
7302                 } /* endif adapter->dmac is not disabled */
7303         } else if (hw->mac.type == e1000_82580) {
7304                 u32 reg = rd32(E1000_PCIEMISC);
7305                 wr32(E1000_PCIEMISC, reg & ~E1000_PCIEMISC_LX_DECISION);
7306                 wr32(E1000_DMACR, 0);
7307         }
7308 }
7309
7310 /* igb_main.c */