1 /*******************************************************************************
3 * Intel Ethernet Controller XL710 Family Linux Driver
4 * Copyright(c) 2013 - 2014 Intel Corporation.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * You should have received a copy of the GNU General Public License along
16 * with this program. If not, see <http://www.gnu.org/licenses/>.
18 * The full GNU General Public License is included in this distribution in
19 * the file called "COPYING".
21 * Contact Information:
22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25 ******************************************************************************/
29 #include "i40e_diag.h"
30 #ifdef CONFIG_I40E_VXLAN
31 #include <net/vxlan.h>
34 const char i40e_driver_name[] = "i40e";
35 static const char i40e_driver_string[] =
36 "Intel(R) Ethernet Connection XL710 Network Driver";
40 #define DRV_VERSION_MAJOR 1
41 #define DRV_VERSION_MINOR 0
42 #define DRV_VERSION_BUILD 21
43 #define DRV_VERSION __stringify(DRV_VERSION_MAJOR) "." \
44 __stringify(DRV_VERSION_MINOR) "." \
45 __stringify(DRV_VERSION_BUILD) DRV_KERN
46 const char i40e_driver_version_str[] = DRV_VERSION;
47 static const char i40e_copyright[] = "Copyright (c) 2013 - 2014 Intel Corporation.";
49 /* a bit of forward declarations */
50 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi);
51 static void i40e_handle_reset_warning(struct i40e_pf *pf);
52 static int i40e_add_vsi(struct i40e_vsi *vsi);
53 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi);
54 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit);
55 static int i40e_setup_misc_vector(struct i40e_pf *pf);
56 static void i40e_determine_queue_usage(struct i40e_pf *pf);
57 static int i40e_setup_pf_filter_control(struct i40e_pf *pf);
58 static void i40e_fdir_sb_setup(struct i40e_pf *pf);
59 static int i40e_veb_get_bw_info(struct i40e_veb *veb);
61 /* i40e_pci_tbl - PCI Device ID Table
63 * Last entry must be all 0s
65 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
66 * Class, Class Mask, private data (not used) }
68 static const struct pci_device_id i40e_pci_tbl[] = {
69 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_XL710), 0},
70 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QEMU), 0},
71 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_A), 0},
72 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_B), 0},
73 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_C), 0},
74 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_A), 0},
75 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_B), 0},
76 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_C), 0},
77 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T), 0},
78 /* required last entry */
81 MODULE_DEVICE_TABLE(pci, i40e_pci_tbl);
83 #define I40E_MAX_VF_COUNT 128
84 static int debug = -1;
85 module_param(debug, int, 0);
86 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
88 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
89 MODULE_DESCRIPTION("Intel(R) Ethernet Connection XL710 Network Driver");
90 MODULE_LICENSE("GPL");
91 MODULE_VERSION(DRV_VERSION);
94 * i40e_allocate_dma_mem_d - OS specific memory alloc for shared code
95 * @hw: pointer to the HW structure
96 * @mem: ptr to mem struct to fill out
97 * @size: size of memory requested
98 * @alignment: what to align the allocation to
100 int i40e_allocate_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem,
101 u64 size, u32 alignment)
103 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
105 mem->size = ALIGN(size, alignment);
106 mem->va = dma_zalloc_coherent(&pf->pdev->dev, mem->size,
107 &mem->pa, GFP_KERNEL);
115 * i40e_free_dma_mem_d - OS specific memory free for shared code
116 * @hw: pointer to the HW structure
117 * @mem: ptr to mem struct to free
119 int i40e_free_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem)
121 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
123 dma_free_coherent(&pf->pdev->dev, mem->size, mem->va, mem->pa);
132 * i40e_allocate_virt_mem_d - OS specific memory alloc for shared code
133 * @hw: pointer to the HW structure
134 * @mem: ptr to mem struct to fill out
135 * @size: size of memory requested
137 int i40e_allocate_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem,
141 mem->va = kzalloc(size, GFP_KERNEL);
150 * i40e_free_virt_mem_d - OS specific memory free for shared code
151 * @hw: pointer to the HW structure
152 * @mem: ptr to mem struct to free
154 int i40e_free_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem)
156 /* it's ok to kfree a NULL pointer */
165 * i40e_get_lump - find a lump of free generic resource
166 * @pf: board private structure
167 * @pile: the pile of resource to search
168 * @needed: the number of items needed
169 * @id: an owner id to stick on the items assigned
171 * Returns the base item index of the lump, or negative for error
173 * The search_hint trick and lack of advanced fit-finding only work
174 * because we're highly likely to have all the same size lump requests.
175 * Linear search time and any fragmentation should be minimal.
177 static int i40e_get_lump(struct i40e_pf *pf, struct i40e_lump_tracking *pile,
183 if (!pile || needed == 0 || id >= I40E_PILE_VALID_BIT) {
184 dev_info(&pf->pdev->dev,
185 "param err: pile=%p needed=%d id=0x%04x\n",
190 /* start the linear search with an imperfect hint */
191 i = pile->search_hint;
192 while (i < pile->num_entries) {
193 /* skip already allocated entries */
194 if (pile->list[i] & I40E_PILE_VALID_BIT) {
199 /* do we have enough in this lump? */
200 for (j = 0; (j < needed) && ((i+j) < pile->num_entries); j++) {
201 if (pile->list[i+j] & I40E_PILE_VALID_BIT)
206 /* there was enough, so assign it to the requestor */
207 for (j = 0; j < needed; j++)
208 pile->list[i+j] = id | I40E_PILE_VALID_BIT;
210 pile->search_hint = i + j;
213 /* not enough, so skip over it and continue looking */
222 * i40e_put_lump - return a lump of generic resource
223 * @pile: the pile of resource to search
224 * @index: the base item index
225 * @id: the owner id of the items assigned
227 * Returns the count of items in the lump
229 static int i40e_put_lump(struct i40e_lump_tracking *pile, u16 index, u16 id)
231 int valid_id = (id | I40E_PILE_VALID_BIT);
235 if (!pile || index >= pile->num_entries)
239 i < pile->num_entries && pile->list[i] == valid_id;
245 if (count && index < pile->search_hint)
246 pile->search_hint = index;
252 * i40e_service_event_schedule - Schedule the service task to wake up
253 * @pf: board private structure
255 * If not already scheduled, this puts the task into the work queue
257 static void i40e_service_event_schedule(struct i40e_pf *pf)
259 if (!test_bit(__I40E_DOWN, &pf->state) &&
260 !test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state) &&
261 !test_and_set_bit(__I40E_SERVICE_SCHED, &pf->state))
262 schedule_work(&pf->service_task);
266 * i40e_tx_timeout - Respond to a Tx Hang
267 * @netdev: network interface device structure
269 * If any port has noticed a Tx timeout, it is likely that the whole
270 * device is munged, not just the one netdev port, so go for the full
274 void i40e_tx_timeout(struct net_device *netdev)
276 static void i40e_tx_timeout(struct net_device *netdev)
279 struct i40e_netdev_priv *np = netdev_priv(netdev);
280 struct i40e_vsi *vsi = np->vsi;
281 struct i40e_pf *pf = vsi->back;
283 pf->tx_timeout_count++;
285 if (time_after(jiffies, (pf->tx_timeout_last_recovery + HZ*20)))
286 pf->tx_timeout_recovery_level = 1;
287 pf->tx_timeout_last_recovery = jiffies;
288 netdev_info(netdev, "tx_timeout recovery level %d\n",
289 pf->tx_timeout_recovery_level);
291 switch (pf->tx_timeout_recovery_level) {
293 /* disable and re-enable queues for the VSI */
294 if (in_interrupt()) {
295 set_bit(__I40E_REINIT_REQUESTED, &pf->state);
296 set_bit(__I40E_REINIT_REQUESTED, &vsi->state);
298 i40e_vsi_reinit_locked(vsi);
302 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
305 set_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
308 set_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
311 netdev_err(netdev, "tx_timeout recovery unsuccessful\n");
312 set_bit(__I40E_DOWN_REQUESTED, &pf->state);
313 set_bit(__I40E_DOWN_REQUESTED, &vsi->state);
316 i40e_service_event_schedule(pf);
317 pf->tx_timeout_recovery_level++;
321 * i40e_release_rx_desc - Store the new tail and head values
322 * @rx_ring: ring to bump
323 * @val: new head index
325 static inline void i40e_release_rx_desc(struct i40e_ring *rx_ring, u32 val)
327 rx_ring->next_to_use = val;
329 /* Force memory writes to complete before letting h/w
330 * know there are new descriptors to fetch. (Only
331 * applicable for weak-ordered memory model archs,
335 writel(val, rx_ring->tail);
339 * i40e_get_vsi_stats_struct - Get System Network Statistics
340 * @vsi: the VSI we care about
342 * Returns the address of the device statistics structure.
343 * The statistics are actually updated from the service task.
345 struct rtnl_link_stats64 *i40e_get_vsi_stats_struct(struct i40e_vsi *vsi)
347 return &vsi->net_stats;
351 * i40e_get_netdev_stats_struct - Get statistics for netdev interface
352 * @netdev: network interface device structure
354 * Returns the address of the device statistics structure.
355 * The statistics are actually updated from the service task.
358 struct rtnl_link_stats64 *i40e_get_netdev_stats_struct(
359 struct net_device *netdev,
360 struct rtnl_link_stats64 *stats)
362 static struct rtnl_link_stats64 *i40e_get_netdev_stats_struct(
363 struct net_device *netdev,
364 struct rtnl_link_stats64 *stats)
367 struct i40e_netdev_priv *np = netdev_priv(netdev);
368 struct i40e_ring *tx_ring, *rx_ring;
369 struct i40e_vsi *vsi = np->vsi;
370 struct rtnl_link_stats64 *vsi_stats = i40e_get_vsi_stats_struct(vsi);
373 if (test_bit(__I40E_DOWN, &vsi->state))
380 for (i = 0; i < vsi->num_queue_pairs; i++) {
384 tx_ring = ACCESS_ONCE(vsi->tx_rings[i]);
389 start = u64_stats_fetch_begin_irq(&tx_ring->syncp);
390 packets = tx_ring->stats.packets;
391 bytes = tx_ring->stats.bytes;
392 } while (u64_stats_fetch_retry_irq(&tx_ring->syncp, start));
394 stats->tx_packets += packets;
395 stats->tx_bytes += bytes;
396 rx_ring = &tx_ring[1];
399 start = u64_stats_fetch_begin_irq(&rx_ring->syncp);
400 packets = rx_ring->stats.packets;
401 bytes = rx_ring->stats.bytes;
402 } while (u64_stats_fetch_retry_irq(&rx_ring->syncp, start));
404 stats->rx_packets += packets;
405 stats->rx_bytes += bytes;
409 /* following stats updated by i40e_watchdog_subtask() */
410 stats->multicast = vsi_stats->multicast;
411 stats->tx_errors = vsi_stats->tx_errors;
412 stats->tx_dropped = vsi_stats->tx_dropped;
413 stats->rx_errors = vsi_stats->rx_errors;
414 stats->rx_crc_errors = vsi_stats->rx_crc_errors;
415 stats->rx_length_errors = vsi_stats->rx_length_errors;
421 * i40e_vsi_reset_stats - Resets all stats of the given vsi
422 * @vsi: the VSI to have its stats reset
424 void i40e_vsi_reset_stats(struct i40e_vsi *vsi)
426 struct rtnl_link_stats64 *ns;
432 ns = i40e_get_vsi_stats_struct(vsi);
433 memset(ns, 0, sizeof(*ns));
434 memset(&vsi->net_stats_offsets, 0, sizeof(vsi->net_stats_offsets));
435 memset(&vsi->eth_stats, 0, sizeof(vsi->eth_stats));
436 memset(&vsi->eth_stats_offsets, 0, sizeof(vsi->eth_stats_offsets));
437 if (vsi->rx_rings && vsi->rx_rings[0]) {
438 for (i = 0; i < vsi->num_queue_pairs; i++) {
439 memset(&vsi->rx_rings[i]->stats, 0 ,
440 sizeof(vsi->rx_rings[i]->stats));
441 memset(&vsi->rx_rings[i]->rx_stats, 0 ,
442 sizeof(vsi->rx_rings[i]->rx_stats));
443 memset(&vsi->tx_rings[i]->stats, 0 ,
444 sizeof(vsi->tx_rings[i]->stats));
445 memset(&vsi->tx_rings[i]->tx_stats, 0,
446 sizeof(vsi->tx_rings[i]->tx_stats));
449 vsi->stat_offsets_loaded = false;
453 * i40e_pf_reset_stats - Reset all of the stats for the given pf
454 * @pf: the PF to be reset
456 void i40e_pf_reset_stats(struct i40e_pf *pf)
460 memset(&pf->stats, 0, sizeof(pf->stats));
461 memset(&pf->stats_offsets, 0, sizeof(pf->stats_offsets));
462 pf->stat_offsets_loaded = false;
464 for (i = 0; i < I40E_MAX_VEB; i++) {
466 memset(&pf->veb[i]->stats, 0,
467 sizeof(pf->veb[i]->stats));
468 memset(&pf->veb[i]->stats_offsets, 0,
469 sizeof(pf->veb[i]->stats_offsets));
470 pf->veb[i]->stat_offsets_loaded = false;
476 * i40e_stat_update48 - read and update a 48 bit stat from the chip
477 * @hw: ptr to the hardware info
478 * @hireg: the high 32 bit reg to read
479 * @loreg: the low 32 bit reg to read
480 * @offset_loaded: has the initial offset been loaded yet
481 * @offset: ptr to current offset value
482 * @stat: ptr to the stat
484 * Since the device stats are not reset at PFReset, they likely will not
485 * be zeroed when the driver starts. We'll save the first values read
486 * and use them as offsets to be subtracted from the raw values in order
487 * to report stats that count from zero. In the process, we also manage
488 * the potential roll-over.
490 static void i40e_stat_update48(struct i40e_hw *hw, u32 hireg, u32 loreg,
491 bool offset_loaded, u64 *offset, u64 *stat)
495 if (hw->device_id == I40E_DEV_ID_QEMU) {
496 new_data = rd32(hw, loreg);
497 new_data |= ((u64)(rd32(hw, hireg) & 0xFFFF)) << 32;
499 new_data = rd64(hw, loreg);
503 if (likely(new_data >= *offset))
504 *stat = new_data - *offset;
506 *stat = (new_data + ((u64)1 << 48)) - *offset;
507 *stat &= 0xFFFFFFFFFFFFULL;
511 * i40e_stat_update32 - read and update a 32 bit stat from the chip
512 * @hw: ptr to the hardware info
513 * @reg: the hw reg to read
514 * @offset_loaded: has the initial offset been loaded yet
515 * @offset: ptr to current offset value
516 * @stat: ptr to the stat
518 static void i40e_stat_update32(struct i40e_hw *hw, u32 reg,
519 bool offset_loaded, u64 *offset, u64 *stat)
523 new_data = rd32(hw, reg);
526 if (likely(new_data >= *offset))
527 *stat = (u32)(new_data - *offset);
529 *stat = (u32)((new_data + ((u64)1 << 32)) - *offset);
533 * i40e_update_eth_stats - Update VSI-specific ethernet statistics counters.
534 * @vsi: the VSI to be updated
536 void i40e_update_eth_stats(struct i40e_vsi *vsi)
538 int stat_idx = le16_to_cpu(vsi->info.stat_counter_idx);
539 struct i40e_pf *pf = vsi->back;
540 struct i40e_hw *hw = &pf->hw;
541 struct i40e_eth_stats *oes;
542 struct i40e_eth_stats *es; /* device's eth stats */
544 es = &vsi->eth_stats;
545 oes = &vsi->eth_stats_offsets;
547 /* Gather up the stats that the hw collects */
548 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
549 vsi->stat_offsets_loaded,
550 &oes->tx_errors, &es->tx_errors);
551 i40e_stat_update32(hw, I40E_GLV_RDPC(stat_idx),
552 vsi->stat_offsets_loaded,
553 &oes->rx_discards, &es->rx_discards);
554 i40e_stat_update32(hw, I40E_GLV_RUPP(stat_idx),
555 vsi->stat_offsets_loaded,
556 &oes->rx_unknown_protocol, &es->rx_unknown_protocol);
557 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
558 vsi->stat_offsets_loaded,
559 &oes->tx_errors, &es->tx_errors);
561 i40e_stat_update48(hw, I40E_GLV_GORCH(stat_idx),
562 I40E_GLV_GORCL(stat_idx),
563 vsi->stat_offsets_loaded,
564 &oes->rx_bytes, &es->rx_bytes);
565 i40e_stat_update48(hw, I40E_GLV_UPRCH(stat_idx),
566 I40E_GLV_UPRCL(stat_idx),
567 vsi->stat_offsets_loaded,
568 &oes->rx_unicast, &es->rx_unicast);
569 i40e_stat_update48(hw, I40E_GLV_MPRCH(stat_idx),
570 I40E_GLV_MPRCL(stat_idx),
571 vsi->stat_offsets_loaded,
572 &oes->rx_multicast, &es->rx_multicast);
573 i40e_stat_update48(hw, I40E_GLV_BPRCH(stat_idx),
574 I40E_GLV_BPRCL(stat_idx),
575 vsi->stat_offsets_loaded,
576 &oes->rx_broadcast, &es->rx_broadcast);
578 i40e_stat_update48(hw, I40E_GLV_GOTCH(stat_idx),
579 I40E_GLV_GOTCL(stat_idx),
580 vsi->stat_offsets_loaded,
581 &oes->tx_bytes, &es->tx_bytes);
582 i40e_stat_update48(hw, I40E_GLV_UPTCH(stat_idx),
583 I40E_GLV_UPTCL(stat_idx),
584 vsi->stat_offsets_loaded,
585 &oes->tx_unicast, &es->tx_unicast);
586 i40e_stat_update48(hw, I40E_GLV_MPTCH(stat_idx),
587 I40E_GLV_MPTCL(stat_idx),
588 vsi->stat_offsets_loaded,
589 &oes->tx_multicast, &es->tx_multicast);
590 i40e_stat_update48(hw, I40E_GLV_BPTCH(stat_idx),
591 I40E_GLV_BPTCL(stat_idx),
592 vsi->stat_offsets_loaded,
593 &oes->tx_broadcast, &es->tx_broadcast);
594 vsi->stat_offsets_loaded = true;
598 * i40e_update_veb_stats - Update Switch component statistics
599 * @veb: the VEB being updated
601 static void i40e_update_veb_stats(struct i40e_veb *veb)
603 struct i40e_pf *pf = veb->pf;
604 struct i40e_hw *hw = &pf->hw;
605 struct i40e_eth_stats *oes;
606 struct i40e_eth_stats *es; /* device's eth stats */
609 idx = veb->stats_idx;
611 oes = &veb->stats_offsets;
613 /* Gather up the stats that the hw collects */
614 i40e_stat_update32(hw, I40E_GLSW_TDPC(idx),
615 veb->stat_offsets_loaded,
616 &oes->tx_discards, &es->tx_discards);
617 if (hw->revision_id > 0)
618 i40e_stat_update32(hw, I40E_GLSW_RUPP(idx),
619 veb->stat_offsets_loaded,
620 &oes->rx_unknown_protocol,
621 &es->rx_unknown_protocol);
622 i40e_stat_update48(hw, I40E_GLSW_GORCH(idx), I40E_GLSW_GORCL(idx),
623 veb->stat_offsets_loaded,
624 &oes->rx_bytes, &es->rx_bytes);
625 i40e_stat_update48(hw, I40E_GLSW_UPRCH(idx), I40E_GLSW_UPRCL(idx),
626 veb->stat_offsets_loaded,
627 &oes->rx_unicast, &es->rx_unicast);
628 i40e_stat_update48(hw, I40E_GLSW_MPRCH(idx), I40E_GLSW_MPRCL(idx),
629 veb->stat_offsets_loaded,
630 &oes->rx_multicast, &es->rx_multicast);
631 i40e_stat_update48(hw, I40E_GLSW_BPRCH(idx), I40E_GLSW_BPRCL(idx),
632 veb->stat_offsets_loaded,
633 &oes->rx_broadcast, &es->rx_broadcast);
635 i40e_stat_update48(hw, I40E_GLSW_GOTCH(idx), I40E_GLSW_GOTCL(idx),
636 veb->stat_offsets_loaded,
637 &oes->tx_bytes, &es->tx_bytes);
638 i40e_stat_update48(hw, I40E_GLSW_UPTCH(idx), I40E_GLSW_UPTCL(idx),
639 veb->stat_offsets_loaded,
640 &oes->tx_unicast, &es->tx_unicast);
641 i40e_stat_update48(hw, I40E_GLSW_MPTCH(idx), I40E_GLSW_MPTCL(idx),
642 veb->stat_offsets_loaded,
643 &oes->tx_multicast, &es->tx_multicast);
644 i40e_stat_update48(hw, I40E_GLSW_BPTCH(idx), I40E_GLSW_BPTCL(idx),
645 veb->stat_offsets_loaded,
646 &oes->tx_broadcast, &es->tx_broadcast);
647 veb->stat_offsets_loaded = true;
652 * i40e_update_fcoe_stats - Update FCoE-specific ethernet statistics counters.
653 * @vsi: the VSI that is capable of doing FCoE
655 static void i40e_update_fcoe_stats(struct i40e_vsi *vsi)
657 struct i40e_pf *pf = vsi->back;
658 struct i40e_hw *hw = &pf->hw;
659 struct i40e_fcoe_stats *ofs;
660 struct i40e_fcoe_stats *fs; /* device's eth stats */
663 if (vsi->type != I40E_VSI_FCOE)
666 idx = (pf->pf_seid - I40E_BASE_PF_SEID) + I40E_FCOE_PF_STAT_OFFSET;
667 fs = &vsi->fcoe_stats;
668 ofs = &vsi->fcoe_stats_offsets;
670 i40e_stat_update32(hw, I40E_GL_FCOEPRC(idx),
671 vsi->fcoe_stat_offsets_loaded,
672 &ofs->rx_fcoe_packets, &fs->rx_fcoe_packets);
673 i40e_stat_update48(hw, I40E_GL_FCOEDWRCH(idx), I40E_GL_FCOEDWRCL(idx),
674 vsi->fcoe_stat_offsets_loaded,
675 &ofs->rx_fcoe_dwords, &fs->rx_fcoe_dwords);
676 i40e_stat_update32(hw, I40E_GL_FCOERPDC(idx),
677 vsi->fcoe_stat_offsets_loaded,
678 &ofs->rx_fcoe_dropped, &fs->rx_fcoe_dropped);
679 i40e_stat_update32(hw, I40E_GL_FCOEPTC(idx),
680 vsi->fcoe_stat_offsets_loaded,
681 &ofs->tx_fcoe_packets, &fs->tx_fcoe_packets);
682 i40e_stat_update48(hw, I40E_GL_FCOEDWTCH(idx), I40E_GL_FCOEDWTCL(idx),
683 vsi->fcoe_stat_offsets_loaded,
684 &ofs->tx_fcoe_dwords, &fs->tx_fcoe_dwords);
685 i40e_stat_update32(hw, I40E_GL_FCOECRC(idx),
686 vsi->fcoe_stat_offsets_loaded,
687 &ofs->fcoe_bad_fccrc, &fs->fcoe_bad_fccrc);
688 i40e_stat_update32(hw, I40E_GL_FCOELAST(idx),
689 vsi->fcoe_stat_offsets_loaded,
690 &ofs->fcoe_last_error, &fs->fcoe_last_error);
691 i40e_stat_update32(hw, I40E_GL_FCOEDDPC(idx),
692 vsi->fcoe_stat_offsets_loaded,
693 &ofs->fcoe_ddp_count, &fs->fcoe_ddp_count);
695 vsi->fcoe_stat_offsets_loaded = true;
700 * i40e_update_link_xoff_rx - Update XOFF received in link flow control mode
701 * @pf: the corresponding PF
703 * Update the Rx XOFF counter (PAUSE frames) in link flow control mode
705 static void i40e_update_link_xoff_rx(struct i40e_pf *pf)
707 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
708 struct i40e_hw_port_stats *nsd = &pf->stats;
709 struct i40e_hw *hw = &pf->hw;
713 if ((hw->fc.current_mode != I40E_FC_FULL) &&
714 (hw->fc.current_mode != I40E_FC_RX_PAUSE))
717 xoff = nsd->link_xoff_rx;
718 i40e_stat_update32(hw, I40E_GLPRT_LXOFFRXC(hw->port),
719 pf->stat_offsets_loaded,
720 &osd->link_xoff_rx, &nsd->link_xoff_rx);
722 /* No new LFC xoff rx */
723 if (!(nsd->link_xoff_rx - xoff))
726 /* Clear the __I40E_HANG_CHECK_ARMED bit for all Tx rings */
727 for (v = 0; v < pf->num_alloc_vsi; v++) {
728 struct i40e_vsi *vsi = pf->vsi[v];
730 if (!vsi || !vsi->tx_rings[0])
733 for (i = 0; i < vsi->num_queue_pairs; i++) {
734 struct i40e_ring *ring = vsi->tx_rings[i];
735 clear_bit(__I40E_HANG_CHECK_ARMED, &ring->state);
741 * i40e_update_prio_xoff_rx - Update XOFF received in PFC mode
742 * @pf: the corresponding PF
744 * Update the Rx XOFF counter (PAUSE frames) in PFC mode
746 static void i40e_update_prio_xoff_rx(struct i40e_pf *pf)
748 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
749 struct i40e_hw_port_stats *nsd = &pf->stats;
750 bool xoff[I40E_MAX_TRAFFIC_CLASS] = {false};
751 struct i40e_dcbx_config *dcb_cfg;
752 struct i40e_hw *hw = &pf->hw;
756 dcb_cfg = &hw->local_dcbx_config;
758 /* See if DCB enabled with PFC TC */
759 if (!(pf->flags & I40E_FLAG_DCB_ENABLED) ||
760 !(dcb_cfg->pfc.pfcenable)) {
761 i40e_update_link_xoff_rx(pf);
765 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
766 u64 prio_xoff = nsd->priority_xoff_rx[i];
767 i40e_stat_update32(hw, I40E_GLPRT_PXOFFRXC(hw->port, i),
768 pf->stat_offsets_loaded,
769 &osd->priority_xoff_rx[i],
770 &nsd->priority_xoff_rx[i]);
772 /* No new PFC xoff rx */
773 if (!(nsd->priority_xoff_rx[i] - prio_xoff))
775 /* Get the TC for given priority */
776 tc = dcb_cfg->etscfg.prioritytable[i];
780 /* Clear the __I40E_HANG_CHECK_ARMED bit for Tx rings */
781 for (v = 0; v < pf->num_alloc_vsi; v++) {
782 struct i40e_vsi *vsi = pf->vsi[v];
784 if (!vsi || !vsi->tx_rings[0])
787 for (i = 0; i < vsi->num_queue_pairs; i++) {
788 struct i40e_ring *ring = vsi->tx_rings[i];
792 clear_bit(__I40E_HANG_CHECK_ARMED,
799 * i40e_update_vsi_stats - Update the vsi statistics counters.
800 * @vsi: the VSI to be updated
802 * There are a few instances where we store the same stat in a
803 * couple of different structs. This is partly because we have
804 * the netdev stats that need to be filled out, which is slightly
805 * different from the "eth_stats" defined by the chip and used in
806 * VF communications. We sort it out here.
808 static void i40e_update_vsi_stats(struct i40e_vsi *vsi)
810 struct i40e_pf *pf = vsi->back;
811 struct rtnl_link_stats64 *ons;
812 struct rtnl_link_stats64 *ns; /* netdev stats */
813 struct i40e_eth_stats *oes;
814 struct i40e_eth_stats *es; /* device's eth stats */
815 u32 tx_restart, tx_busy;
824 if (test_bit(__I40E_DOWN, &vsi->state) ||
825 test_bit(__I40E_CONFIG_BUSY, &pf->state))
828 ns = i40e_get_vsi_stats_struct(vsi);
829 ons = &vsi->net_stats_offsets;
830 es = &vsi->eth_stats;
831 oes = &vsi->eth_stats_offsets;
833 /* Gather up the netdev and vsi stats that the driver collects
834 * on the fly during packet processing
838 tx_restart = tx_busy = 0;
842 for (q = 0; q < vsi->num_queue_pairs; q++) {
844 p = ACCESS_ONCE(vsi->tx_rings[q]);
847 start = u64_stats_fetch_begin_irq(&p->syncp);
848 packets = p->stats.packets;
849 bytes = p->stats.bytes;
850 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
853 tx_restart += p->tx_stats.restart_queue;
854 tx_busy += p->tx_stats.tx_busy;
856 /* Rx queue is part of the same block as Tx queue */
859 start = u64_stats_fetch_begin_irq(&p->syncp);
860 packets = p->stats.packets;
861 bytes = p->stats.bytes;
862 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
865 rx_buf += p->rx_stats.alloc_buff_failed;
866 rx_page += p->rx_stats.alloc_page_failed;
869 vsi->tx_restart = tx_restart;
870 vsi->tx_busy = tx_busy;
871 vsi->rx_page_failed = rx_page;
872 vsi->rx_buf_failed = rx_buf;
874 ns->rx_packets = rx_p;
876 ns->tx_packets = tx_p;
879 /* update netdev stats from eth stats */
880 i40e_update_eth_stats(vsi);
881 ons->tx_errors = oes->tx_errors;
882 ns->tx_errors = es->tx_errors;
883 ons->multicast = oes->rx_multicast;
884 ns->multicast = es->rx_multicast;
885 ons->rx_dropped = oes->rx_discards;
886 ns->rx_dropped = es->rx_discards;
887 ons->tx_dropped = oes->tx_discards;
888 ns->tx_dropped = es->tx_discards;
890 /* pull in a couple PF stats if this is the main vsi */
891 if (vsi == pf->vsi[pf->lan_vsi]) {
892 ns->rx_crc_errors = pf->stats.crc_errors;
893 ns->rx_errors = pf->stats.crc_errors + pf->stats.illegal_bytes;
894 ns->rx_length_errors = pf->stats.rx_length_errors;
899 * i40e_update_pf_stats - Update the pf statistics counters.
900 * @pf: the PF to be updated
902 static void i40e_update_pf_stats(struct i40e_pf *pf)
904 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
905 struct i40e_hw_port_stats *nsd = &pf->stats;
906 struct i40e_hw *hw = &pf->hw;
910 i40e_stat_update48(hw, I40E_GLPRT_GORCH(hw->port),
911 I40E_GLPRT_GORCL(hw->port),
912 pf->stat_offsets_loaded,
913 &osd->eth.rx_bytes, &nsd->eth.rx_bytes);
914 i40e_stat_update48(hw, I40E_GLPRT_GOTCH(hw->port),
915 I40E_GLPRT_GOTCL(hw->port),
916 pf->stat_offsets_loaded,
917 &osd->eth.tx_bytes, &nsd->eth.tx_bytes);
918 i40e_stat_update32(hw, I40E_GLPRT_RDPC(hw->port),
919 pf->stat_offsets_loaded,
920 &osd->eth.rx_discards,
921 &nsd->eth.rx_discards);
922 i40e_stat_update32(hw, I40E_GLPRT_TDPC(hw->port),
923 pf->stat_offsets_loaded,
924 &osd->eth.tx_discards,
925 &nsd->eth.tx_discards);
927 i40e_stat_update48(hw, I40E_GLPRT_UPRCH(hw->port),
928 I40E_GLPRT_UPRCL(hw->port),
929 pf->stat_offsets_loaded,
930 &osd->eth.rx_unicast,
931 &nsd->eth.rx_unicast);
932 i40e_stat_update48(hw, I40E_GLPRT_MPRCH(hw->port),
933 I40E_GLPRT_MPRCL(hw->port),
934 pf->stat_offsets_loaded,
935 &osd->eth.rx_multicast,
936 &nsd->eth.rx_multicast);
937 i40e_stat_update48(hw, I40E_GLPRT_BPRCH(hw->port),
938 I40E_GLPRT_BPRCL(hw->port),
939 pf->stat_offsets_loaded,
940 &osd->eth.rx_broadcast,
941 &nsd->eth.rx_broadcast);
942 i40e_stat_update48(hw, I40E_GLPRT_UPTCH(hw->port),
943 I40E_GLPRT_UPTCL(hw->port),
944 pf->stat_offsets_loaded,
945 &osd->eth.tx_unicast,
946 &nsd->eth.tx_unicast);
947 i40e_stat_update48(hw, I40E_GLPRT_MPTCH(hw->port),
948 I40E_GLPRT_MPTCL(hw->port),
949 pf->stat_offsets_loaded,
950 &osd->eth.tx_multicast,
951 &nsd->eth.tx_multicast);
952 i40e_stat_update48(hw, I40E_GLPRT_BPTCH(hw->port),
953 I40E_GLPRT_BPTCL(hw->port),
954 pf->stat_offsets_loaded,
955 &osd->eth.tx_broadcast,
956 &nsd->eth.tx_broadcast);
958 i40e_stat_update32(hw, I40E_GLPRT_TDOLD(hw->port),
959 pf->stat_offsets_loaded,
960 &osd->tx_dropped_link_down,
961 &nsd->tx_dropped_link_down);
963 i40e_stat_update32(hw, I40E_GLPRT_CRCERRS(hw->port),
964 pf->stat_offsets_loaded,
965 &osd->crc_errors, &nsd->crc_errors);
967 i40e_stat_update32(hw, I40E_GLPRT_ILLERRC(hw->port),
968 pf->stat_offsets_loaded,
969 &osd->illegal_bytes, &nsd->illegal_bytes);
971 i40e_stat_update32(hw, I40E_GLPRT_MLFC(hw->port),
972 pf->stat_offsets_loaded,
973 &osd->mac_local_faults,
974 &nsd->mac_local_faults);
975 i40e_stat_update32(hw, I40E_GLPRT_MRFC(hw->port),
976 pf->stat_offsets_loaded,
977 &osd->mac_remote_faults,
978 &nsd->mac_remote_faults);
980 i40e_stat_update32(hw, I40E_GLPRT_RLEC(hw->port),
981 pf->stat_offsets_loaded,
982 &osd->rx_length_errors,
983 &nsd->rx_length_errors);
985 i40e_stat_update32(hw, I40E_GLPRT_LXONRXC(hw->port),
986 pf->stat_offsets_loaded,
987 &osd->link_xon_rx, &nsd->link_xon_rx);
988 i40e_stat_update32(hw, I40E_GLPRT_LXONTXC(hw->port),
989 pf->stat_offsets_loaded,
990 &osd->link_xon_tx, &nsd->link_xon_tx);
991 i40e_update_prio_xoff_rx(pf); /* handles I40E_GLPRT_LXOFFRXC */
992 i40e_stat_update32(hw, I40E_GLPRT_LXOFFTXC(hw->port),
993 pf->stat_offsets_loaded,
994 &osd->link_xoff_tx, &nsd->link_xoff_tx);
996 for (i = 0; i < 8; i++) {
997 i40e_stat_update32(hw, I40E_GLPRT_PXONRXC(hw->port, i),
998 pf->stat_offsets_loaded,
999 &osd->priority_xon_rx[i],
1000 &nsd->priority_xon_rx[i]);
1001 i40e_stat_update32(hw, I40E_GLPRT_PXONTXC(hw->port, i),
1002 pf->stat_offsets_loaded,
1003 &osd->priority_xon_tx[i],
1004 &nsd->priority_xon_tx[i]);
1005 i40e_stat_update32(hw, I40E_GLPRT_PXOFFTXC(hw->port, i),
1006 pf->stat_offsets_loaded,
1007 &osd->priority_xoff_tx[i],
1008 &nsd->priority_xoff_tx[i]);
1009 i40e_stat_update32(hw,
1010 I40E_GLPRT_RXON2OFFCNT(hw->port, i),
1011 pf->stat_offsets_loaded,
1012 &osd->priority_xon_2_xoff[i],
1013 &nsd->priority_xon_2_xoff[i]);
1016 i40e_stat_update48(hw, I40E_GLPRT_PRC64H(hw->port),
1017 I40E_GLPRT_PRC64L(hw->port),
1018 pf->stat_offsets_loaded,
1019 &osd->rx_size_64, &nsd->rx_size_64);
1020 i40e_stat_update48(hw, I40E_GLPRT_PRC127H(hw->port),
1021 I40E_GLPRT_PRC127L(hw->port),
1022 pf->stat_offsets_loaded,
1023 &osd->rx_size_127, &nsd->rx_size_127);
1024 i40e_stat_update48(hw, I40E_GLPRT_PRC255H(hw->port),
1025 I40E_GLPRT_PRC255L(hw->port),
1026 pf->stat_offsets_loaded,
1027 &osd->rx_size_255, &nsd->rx_size_255);
1028 i40e_stat_update48(hw, I40E_GLPRT_PRC511H(hw->port),
1029 I40E_GLPRT_PRC511L(hw->port),
1030 pf->stat_offsets_loaded,
1031 &osd->rx_size_511, &nsd->rx_size_511);
1032 i40e_stat_update48(hw, I40E_GLPRT_PRC1023H(hw->port),
1033 I40E_GLPRT_PRC1023L(hw->port),
1034 pf->stat_offsets_loaded,
1035 &osd->rx_size_1023, &nsd->rx_size_1023);
1036 i40e_stat_update48(hw, I40E_GLPRT_PRC1522H(hw->port),
1037 I40E_GLPRT_PRC1522L(hw->port),
1038 pf->stat_offsets_loaded,
1039 &osd->rx_size_1522, &nsd->rx_size_1522);
1040 i40e_stat_update48(hw, I40E_GLPRT_PRC9522H(hw->port),
1041 I40E_GLPRT_PRC9522L(hw->port),
1042 pf->stat_offsets_loaded,
1043 &osd->rx_size_big, &nsd->rx_size_big);
1045 i40e_stat_update48(hw, I40E_GLPRT_PTC64H(hw->port),
1046 I40E_GLPRT_PTC64L(hw->port),
1047 pf->stat_offsets_loaded,
1048 &osd->tx_size_64, &nsd->tx_size_64);
1049 i40e_stat_update48(hw, I40E_GLPRT_PTC127H(hw->port),
1050 I40E_GLPRT_PTC127L(hw->port),
1051 pf->stat_offsets_loaded,
1052 &osd->tx_size_127, &nsd->tx_size_127);
1053 i40e_stat_update48(hw, I40E_GLPRT_PTC255H(hw->port),
1054 I40E_GLPRT_PTC255L(hw->port),
1055 pf->stat_offsets_loaded,
1056 &osd->tx_size_255, &nsd->tx_size_255);
1057 i40e_stat_update48(hw, I40E_GLPRT_PTC511H(hw->port),
1058 I40E_GLPRT_PTC511L(hw->port),
1059 pf->stat_offsets_loaded,
1060 &osd->tx_size_511, &nsd->tx_size_511);
1061 i40e_stat_update48(hw, I40E_GLPRT_PTC1023H(hw->port),
1062 I40E_GLPRT_PTC1023L(hw->port),
1063 pf->stat_offsets_loaded,
1064 &osd->tx_size_1023, &nsd->tx_size_1023);
1065 i40e_stat_update48(hw, I40E_GLPRT_PTC1522H(hw->port),
1066 I40E_GLPRT_PTC1522L(hw->port),
1067 pf->stat_offsets_loaded,
1068 &osd->tx_size_1522, &nsd->tx_size_1522);
1069 i40e_stat_update48(hw, I40E_GLPRT_PTC9522H(hw->port),
1070 I40E_GLPRT_PTC9522L(hw->port),
1071 pf->stat_offsets_loaded,
1072 &osd->tx_size_big, &nsd->tx_size_big);
1074 i40e_stat_update32(hw, I40E_GLPRT_RUC(hw->port),
1075 pf->stat_offsets_loaded,
1076 &osd->rx_undersize, &nsd->rx_undersize);
1077 i40e_stat_update32(hw, I40E_GLPRT_RFC(hw->port),
1078 pf->stat_offsets_loaded,
1079 &osd->rx_fragments, &nsd->rx_fragments);
1080 i40e_stat_update32(hw, I40E_GLPRT_ROC(hw->port),
1081 pf->stat_offsets_loaded,
1082 &osd->rx_oversize, &nsd->rx_oversize);
1083 i40e_stat_update32(hw, I40E_GLPRT_RJC(hw->port),
1084 pf->stat_offsets_loaded,
1085 &osd->rx_jabber, &nsd->rx_jabber);
1088 i40e_stat_update32(hw, I40E_GLQF_PCNT(pf->fd_atr_cnt_idx),
1089 pf->stat_offsets_loaded,
1090 &osd->fd_atr_match, &nsd->fd_atr_match);
1091 i40e_stat_update32(hw, I40E_GLQF_PCNT(pf->fd_sb_cnt_idx),
1092 pf->stat_offsets_loaded,
1093 &osd->fd_sb_match, &nsd->fd_sb_match);
1095 val = rd32(hw, I40E_PRTPM_EEE_STAT);
1096 nsd->tx_lpi_status =
1097 (val & I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_MASK) >>
1098 I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_SHIFT;
1099 nsd->rx_lpi_status =
1100 (val & I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_MASK) >>
1101 I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_SHIFT;
1102 i40e_stat_update32(hw, I40E_PRTPM_TLPIC,
1103 pf->stat_offsets_loaded,
1104 &osd->tx_lpi_count, &nsd->tx_lpi_count);
1105 i40e_stat_update32(hw, I40E_PRTPM_RLPIC,
1106 pf->stat_offsets_loaded,
1107 &osd->rx_lpi_count, &nsd->rx_lpi_count);
1109 pf->stat_offsets_loaded = true;
1113 * i40e_update_stats - Update the various statistics counters.
1114 * @vsi: the VSI to be updated
1116 * Update the various stats for this VSI and its related entities.
1118 void i40e_update_stats(struct i40e_vsi *vsi)
1120 struct i40e_pf *pf = vsi->back;
1122 if (vsi == pf->vsi[pf->lan_vsi])
1123 i40e_update_pf_stats(pf);
1125 i40e_update_vsi_stats(vsi);
1127 i40e_update_fcoe_stats(vsi);
1132 * i40e_find_filter - Search VSI filter list for specific mac/vlan filter
1133 * @vsi: the VSI to be searched
1134 * @macaddr: the MAC address
1136 * @is_vf: make sure its a vf filter, else doesn't matter
1137 * @is_netdev: make sure its a netdev filter, else doesn't matter
1139 * Returns ptr to the filter object or NULL
1141 static struct i40e_mac_filter *i40e_find_filter(struct i40e_vsi *vsi,
1142 u8 *macaddr, s16 vlan,
1143 bool is_vf, bool is_netdev)
1145 struct i40e_mac_filter *f;
1147 if (!vsi || !macaddr)
1150 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1151 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1152 (vlan == f->vlan) &&
1153 (!is_vf || f->is_vf) &&
1154 (!is_netdev || f->is_netdev))
1161 * i40e_find_mac - Find a mac addr in the macvlan filters list
1162 * @vsi: the VSI to be searched
1163 * @macaddr: the MAC address we are searching for
1164 * @is_vf: make sure its a vf filter, else doesn't matter
1165 * @is_netdev: make sure its a netdev filter, else doesn't matter
1167 * Returns the first filter with the provided MAC address or NULL if
1168 * MAC address was not found
1170 struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, u8 *macaddr,
1171 bool is_vf, bool is_netdev)
1173 struct i40e_mac_filter *f;
1175 if (!vsi || !macaddr)
1178 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1179 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1180 (!is_vf || f->is_vf) &&
1181 (!is_netdev || f->is_netdev))
1188 * i40e_is_vsi_in_vlan - Check if VSI is in vlan mode
1189 * @vsi: the VSI to be searched
1191 * Returns true if VSI is in vlan mode or false otherwise
1193 bool i40e_is_vsi_in_vlan(struct i40e_vsi *vsi)
1195 struct i40e_mac_filter *f;
1197 /* Only -1 for all the filters denotes not in vlan mode
1198 * so we have to go through all the list in order to make sure
1200 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1209 * i40e_put_mac_in_vlan - Make macvlan filters from macaddrs and vlans
1210 * @vsi: the VSI to be searched
1211 * @macaddr: the mac address to be filtered
1212 * @is_vf: true if it is a vf
1213 * @is_netdev: true if it is a netdev
1215 * Goes through all the macvlan filters and adds a
1216 * macvlan filter for each unique vlan that already exists
1218 * Returns first filter found on success, else NULL
1220 struct i40e_mac_filter *i40e_put_mac_in_vlan(struct i40e_vsi *vsi, u8 *macaddr,
1221 bool is_vf, bool is_netdev)
1223 struct i40e_mac_filter *f;
1225 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1226 if (!i40e_find_filter(vsi, macaddr, f->vlan,
1227 is_vf, is_netdev)) {
1228 if (!i40e_add_filter(vsi, macaddr, f->vlan,
1234 return list_first_entry_or_null(&vsi->mac_filter_list,
1235 struct i40e_mac_filter, list);
1239 * i40e_rm_default_mac_filter - Remove the default MAC filter set by NVM
1240 * @vsi: the PF Main VSI - inappropriate for any other VSI
1241 * @macaddr: the MAC address
1243 * Some older firmware configurations set up a default promiscuous VLAN
1244 * filter that needs to be removed.
1246 static int i40e_rm_default_mac_filter(struct i40e_vsi *vsi, u8 *macaddr)
1248 struct i40e_aqc_remove_macvlan_element_data element;
1249 struct i40e_pf *pf = vsi->back;
1252 /* Only appropriate for the PF main VSI */
1253 if (vsi->type != I40E_VSI_MAIN)
1256 memset(&element, 0, sizeof(element));
1257 ether_addr_copy(element.mac_addr, macaddr);
1258 element.vlan_tag = 0;
1259 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH |
1260 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
1261 aq_ret = i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1269 * i40e_add_filter - Add a mac/vlan filter to the VSI
1270 * @vsi: the VSI to be searched
1271 * @macaddr: the MAC address
1273 * @is_vf: make sure its a vf filter, else doesn't matter
1274 * @is_netdev: make sure its a netdev filter, else doesn't matter
1276 * Returns ptr to the filter object or NULL when no memory available.
1278 struct i40e_mac_filter *i40e_add_filter(struct i40e_vsi *vsi,
1279 u8 *macaddr, s16 vlan,
1280 bool is_vf, bool is_netdev)
1282 struct i40e_mac_filter *f;
1284 if (!vsi || !macaddr)
1287 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev);
1289 f = kzalloc(sizeof(*f), GFP_ATOMIC);
1291 goto add_filter_out;
1293 ether_addr_copy(f->macaddr, macaddr);
1297 INIT_LIST_HEAD(&f->list);
1298 list_add(&f->list, &vsi->mac_filter_list);
1301 /* increment counter and add a new flag if needed */
1307 } else if (is_netdev) {
1308 if (!f->is_netdev) {
1309 f->is_netdev = true;
1316 /* changed tells sync_filters_subtask to
1317 * push the filter down to the firmware
1320 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1321 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1329 * i40e_del_filter - Remove a mac/vlan filter from the VSI
1330 * @vsi: the VSI to be searched
1331 * @macaddr: the MAC address
1333 * @is_vf: make sure it's a vf filter, else doesn't matter
1334 * @is_netdev: make sure it's a netdev filter, else doesn't matter
1336 void i40e_del_filter(struct i40e_vsi *vsi,
1337 u8 *macaddr, s16 vlan,
1338 bool is_vf, bool is_netdev)
1340 struct i40e_mac_filter *f;
1342 if (!vsi || !macaddr)
1345 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev);
1346 if (!f || f->counter == 0)
1354 } else if (is_netdev) {
1356 f->is_netdev = false;
1360 /* make sure we don't remove a filter in use by vf or netdev */
1362 min_f += (f->is_vf ? 1 : 0);
1363 min_f += (f->is_netdev ? 1 : 0);
1365 if (f->counter > min_f)
1369 /* counter == 0 tells sync_filters_subtask to
1370 * remove the filter from the firmware's list
1372 if (f->counter == 0) {
1374 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1375 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1380 * i40e_set_mac - NDO callback to set mac address
1381 * @netdev: network interface device structure
1382 * @p: pointer to an address structure
1384 * Returns 0 on success, negative on failure
1387 int i40e_set_mac(struct net_device *netdev, void *p)
1389 static int i40e_set_mac(struct net_device *netdev, void *p)
1392 struct i40e_netdev_priv *np = netdev_priv(netdev);
1393 struct i40e_vsi *vsi = np->vsi;
1394 struct i40e_pf *pf = vsi->back;
1395 struct i40e_hw *hw = &pf->hw;
1396 struct sockaddr *addr = p;
1397 struct i40e_mac_filter *f;
1399 if (!is_valid_ether_addr(addr->sa_data))
1400 return -EADDRNOTAVAIL;
1402 if (ether_addr_equal(netdev->dev_addr, addr->sa_data)) {
1403 netdev_info(netdev, "already using mac address %pM\n",
1408 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
1409 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
1410 return -EADDRNOTAVAIL;
1412 if (ether_addr_equal(hw->mac.addr, addr->sa_data))
1413 netdev_info(netdev, "returning to hw mac address %pM\n",
1416 netdev_info(netdev, "set new mac address %pM\n", addr->sa_data);
1418 if (vsi->type == I40E_VSI_MAIN) {
1420 ret = i40e_aq_mac_address_write(&vsi->back->hw,
1421 I40E_AQC_WRITE_TYPE_LAA_WOL,
1422 addr->sa_data, NULL);
1425 "Addr change for Main VSI failed: %d\n",
1427 return -EADDRNOTAVAIL;
1431 if (ether_addr_equal(netdev->dev_addr, hw->mac.addr)) {
1432 struct i40e_aqc_remove_macvlan_element_data element;
1434 memset(&element, 0, sizeof(element));
1435 ether_addr_copy(element.mac_addr, netdev->dev_addr);
1436 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1437 i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1439 i40e_del_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY,
1443 if (ether_addr_equal(addr->sa_data, hw->mac.addr)) {
1444 struct i40e_aqc_add_macvlan_element_data element;
1446 memset(&element, 0, sizeof(element));
1447 ether_addr_copy(element.mac_addr, hw->mac.addr);
1448 element.flags = cpu_to_le16(I40E_AQC_MACVLAN_ADD_PERFECT_MATCH);
1449 i40e_aq_add_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1451 f = i40e_add_filter(vsi, addr->sa_data, I40E_VLAN_ANY,
1457 i40e_sync_vsi_filters(vsi);
1458 ether_addr_copy(netdev->dev_addr, addr->sa_data);
1464 * i40e_vsi_setup_queue_map - Setup a VSI queue map based on enabled_tc
1465 * @vsi: the VSI being setup
1466 * @ctxt: VSI context structure
1467 * @enabled_tc: Enabled TCs bitmap
1468 * @is_add: True if called before Add VSI
1470 * Setup VSI queue mapping for enabled traffic classes.
1473 void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1474 struct i40e_vsi_context *ctxt,
1478 static void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1479 struct i40e_vsi_context *ctxt,
1484 struct i40e_pf *pf = vsi->back;
1494 sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
1497 if (enabled_tc && (vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
1498 /* Find numtc from enabled TC bitmap */
1499 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1500 if (enabled_tc & (1 << i)) /* TC is enabled */
1504 dev_warn(&pf->pdev->dev, "DCB is enabled but no TC enabled, forcing TC0\n");
1508 /* At least TC0 is enabled in case of non-DCB case */
1512 vsi->tc_config.numtc = numtc;
1513 vsi->tc_config.enabled_tc = enabled_tc ? enabled_tc : 1;
1514 /* Number of queues per enabled TC */
1515 num_tc_qps = vsi->alloc_queue_pairs/numtc;
1516 num_tc_qps = min_t(int, num_tc_qps, I40E_MAX_QUEUES_PER_TC);
1518 /* Setup queue offset/count for all TCs for given VSI */
1519 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1520 /* See if the given TC is enabled for the given VSI */
1521 if (vsi->tc_config.enabled_tc & (1 << i)) { /* TC is enabled */
1524 switch (vsi->type) {
1526 qcount = min_t(int, pf->rss_size, num_tc_qps);
1530 qcount = num_tc_qps;
1534 case I40E_VSI_SRIOV:
1535 case I40E_VSI_VMDQ2:
1537 qcount = num_tc_qps;
1541 vsi->tc_config.tc_info[i].qoffset = offset;
1542 vsi->tc_config.tc_info[i].qcount = qcount;
1544 /* find the power-of-2 of the number of queue pairs */
1547 while (num_qps && ((1 << pow) < qcount)) {
1552 vsi->tc_config.tc_info[i].netdev_tc = netdev_tc++;
1554 (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
1555 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
1559 /* TC is not enabled so set the offset to
1560 * default queue and allocate one queue
1563 vsi->tc_config.tc_info[i].qoffset = 0;
1564 vsi->tc_config.tc_info[i].qcount = 1;
1565 vsi->tc_config.tc_info[i].netdev_tc = 0;
1569 ctxt->info.tc_mapping[i] = cpu_to_le16(qmap);
1572 /* Set actual Tx/Rx queue pairs */
1573 vsi->num_queue_pairs = offset;
1575 /* Scheduler section valid can only be set for ADD VSI */
1577 sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
1579 ctxt->info.up_enable_bits = enabled_tc;
1581 if (vsi->type == I40E_VSI_SRIOV) {
1582 ctxt->info.mapping_flags |=
1583 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_NONCONTIG);
1584 for (i = 0; i < vsi->num_queue_pairs; i++)
1585 ctxt->info.queue_mapping[i] =
1586 cpu_to_le16(vsi->base_queue + i);
1588 ctxt->info.mapping_flags |=
1589 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
1590 ctxt->info.queue_mapping[0] = cpu_to_le16(vsi->base_queue);
1592 ctxt->info.valid_sections |= cpu_to_le16(sections);
1596 * i40e_set_rx_mode - NDO callback to set the netdev filters
1597 * @netdev: network interface device structure
1600 void i40e_set_rx_mode(struct net_device *netdev)
1602 static void i40e_set_rx_mode(struct net_device *netdev)
1605 struct i40e_netdev_priv *np = netdev_priv(netdev);
1606 struct i40e_mac_filter *f, *ftmp;
1607 struct i40e_vsi *vsi = np->vsi;
1608 struct netdev_hw_addr *uca;
1609 struct netdev_hw_addr *mca;
1610 struct netdev_hw_addr *ha;
1612 /* add addr if not already in the filter list */
1613 netdev_for_each_uc_addr(uca, netdev) {
1614 if (!i40e_find_mac(vsi, uca->addr, false, true)) {
1615 if (i40e_is_vsi_in_vlan(vsi))
1616 i40e_put_mac_in_vlan(vsi, uca->addr,
1619 i40e_add_filter(vsi, uca->addr, I40E_VLAN_ANY,
1624 netdev_for_each_mc_addr(mca, netdev) {
1625 if (!i40e_find_mac(vsi, mca->addr, false, true)) {
1626 if (i40e_is_vsi_in_vlan(vsi))
1627 i40e_put_mac_in_vlan(vsi, mca->addr,
1630 i40e_add_filter(vsi, mca->addr, I40E_VLAN_ANY,
1635 /* remove filter if not in netdev list */
1636 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1642 if (is_multicast_ether_addr(f->macaddr)) {
1643 netdev_for_each_mc_addr(mca, netdev) {
1644 if (ether_addr_equal(mca->addr, f->macaddr)) {
1650 netdev_for_each_uc_addr(uca, netdev) {
1651 if (ether_addr_equal(uca->addr, f->macaddr)) {
1657 for_each_dev_addr(netdev, ha) {
1658 if (ether_addr_equal(ha->addr, f->macaddr)) {
1666 vsi, f->macaddr, I40E_VLAN_ANY, false, true);
1669 /* check for other flag changes */
1670 if (vsi->current_netdev_flags != vsi->netdev->flags) {
1671 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1672 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1677 * i40e_sync_vsi_filters - Update the VSI filter list to the HW
1678 * @vsi: ptr to the VSI
1680 * Push any outstanding VSI filter changes through the AdminQ.
1682 * Returns 0 or error value
1684 int i40e_sync_vsi_filters(struct i40e_vsi *vsi)
1686 struct i40e_mac_filter *f, *ftmp;
1687 bool promisc_forced_on = false;
1688 bool add_happened = false;
1689 int filter_list_len = 0;
1690 u32 changed_flags = 0;
1691 i40e_status aq_ret = 0;
1697 /* empty array typed pointers, kcalloc later */
1698 struct i40e_aqc_add_macvlan_element_data *add_list;
1699 struct i40e_aqc_remove_macvlan_element_data *del_list;
1701 while (test_and_set_bit(__I40E_CONFIG_BUSY, &vsi->state))
1702 usleep_range(1000, 2000);
1706 changed_flags = vsi->current_netdev_flags ^ vsi->netdev->flags;
1707 vsi->current_netdev_flags = vsi->netdev->flags;
1710 if (vsi->flags & I40E_VSI_FLAG_FILTER_CHANGED) {
1711 vsi->flags &= ~I40E_VSI_FLAG_FILTER_CHANGED;
1713 filter_list_len = pf->hw.aq.asq_buf_size /
1714 sizeof(struct i40e_aqc_remove_macvlan_element_data);
1715 del_list = kcalloc(filter_list_len,
1716 sizeof(struct i40e_aqc_remove_macvlan_element_data),
1721 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1725 if (f->counter != 0)
1730 /* add to delete list */
1731 ether_addr_copy(del_list[num_del].mac_addr, f->macaddr);
1732 del_list[num_del].vlan_tag =
1733 cpu_to_le16((u16)(f->vlan ==
1734 I40E_VLAN_ANY ? 0 : f->vlan));
1736 cmd_flags |= I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1737 del_list[num_del].flags = cmd_flags;
1740 /* unlink from filter list */
1744 /* flush a full buffer */
1745 if (num_del == filter_list_len) {
1746 aq_ret = i40e_aq_remove_macvlan(&pf->hw,
1747 vsi->seid, del_list, num_del,
1750 memset(del_list, 0, sizeof(*del_list));
1753 pf->hw.aq.asq_last_status !=
1755 dev_info(&pf->pdev->dev,
1756 "ignoring delete macvlan error, err %d, aq_err %d while flushing a full buffer\n",
1758 pf->hw.aq.asq_last_status);
1762 aq_ret = i40e_aq_remove_macvlan(&pf->hw, vsi->seid,
1763 del_list, num_del, NULL);
1767 pf->hw.aq.asq_last_status != I40E_AQ_RC_ENOENT)
1768 dev_info(&pf->pdev->dev,
1769 "ignoring delete macvlan error, err %d, aq_err %d\n",
1770 aq_ret, pf->hw.aq.asq_last_status);
1776 /* do all the adds now */
1777 filter_list_len = pf->hw.aq.asq_buf_size /
1778 sizeof(struct i40e_aqc_add_macvlan_element_data),
1779 add_list = kcalloc(filter_list_len,
1780 sizeof(struct i40e_aqc_add_macvlan_element_data),
1785 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1789 if (f->counter == 0)
1792 add_happened = true;
1795 /* add to add array */
1796 ether_addr_copy(add_list[num_add].mac_addr, f->macaddr);
1797 add_list[num_add].vlan_tag =
1799 (u16)(f->vlan == I40E_VLAN_ANY ? 0 : f->vlan));
1800 add_list[num_add].queue_number = 0;
1802 cmd_flags |= I40E_AQC_MACVLAN_ADD_PERFECT_MATCH;
1803 add_list[num_add].flags = cpu_to_le16(cmd_flags);
1806 /* flush a full buffer */
1807 if (num_add == filter_list_len) {
1808 aq_ret = i40e_aq_add_macvlan(&pf->hw, vsi->seid,
1815 memset(add_list, 0, sizeof(*add_list));
1819 aq_ret = i40e_aq_add_macvlan(&pf->hw, vsi->seid,
1820 add_list, num_add, NULL);
1826 if (add_happened && aq_ret &&
1827 pf->hw.aq.asq_last_status != I40E_AQ_RC_EINVAL) {
1828 dev_info(&pf->pdev->dev,
1829 "add filter failed, err %d, aq_err %d\n",
1830 aq_ret, pf->hw.aq.asq_last_status);
1831 if ((pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOSPC) &&
1832 !test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
1834 promisc_forced_on = true;
1835 set_bit(__I40E_FILTER_OVERFLOW_PROMISC,
1837 dev_info(&pf->pdev->dev, "promiscuous mode forced on\n");
1842 /* check for changes in promiscuous modes */
1843 if (changed_flags & IFF_ALLMULTI) {
1844 bool cur_multipromisc;
1845 cur_multipromisc = !!(vsi->current_netdev_flags & IFF_ALLMULTI);
1846 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(&vsi->back->hw,
1851 dev_info(&pf->pdev->dev,
1852 "set multi promisc failed, err %d, aq_err %d\n",
1853 aq_ret, pf->hw.aq.asq_last_status);
1855 if ((changed_flags & IFF_PROMISC) || promisc_forced_on) {
1857 cur_promisc = (!!(vsi->current_netdev_flags & IFF_PROMISC) ||
1858 test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
1860 aq_ret = i40e_aq_set_vsi_unicast_promiscuous(&vsi->back->hw,
1864 dev_info(&pf->pdev->dev,
1865 "set uni promisc failed, err %d, aq_err %d\n",
1866 aq_ret, pf->hw.aq.asq_last_status);
1867 aq_ret = i40e_aq_set_vsi_broadcast(&vsi->back->hw,
1871 dev_info(&pf->pdev->dev,
1872 "set brdcast promisc failed, err %d, aq_err %d\n",
1873 aq_ret, pf->hw.aq.asq_last_status);
1876 clear_bit(__I40E_CONFIG_BUSY, &vsi->state);
1881 * i40e_sync_filters_subtask - Sync the VSI filter list with HW
1882 * @pf: board private structure
1884 static void i40e_sync_filters_subtask(struct i40e_pf *pf)
1888 if (!pf || !(pf->flags & I40E_FLAG_FILTER_SYNC))
1890 pf->flags &= ~I40E_FLAG_FILTER_SYNC;
1892 for (v = 0; v < pf->num_alloc_vsi; v++) {
1894 (pf->vsi[v]->flags & I40E_VSI_FLAG_FILTER_CHANGED))
1895 i40e_sync_vsi_filters(pf->vsi[v]);
1900 * i40e_change_mtu - NDO callback to change the Maximum Transfer Unit
1901 * @netdev: network interface device structure
1902 * @new_mtu: new value for maximum frame size
1904 * Returns 0 on success, negative on failure
1906 static int i40e_change_mtu(struct net_device *netdev, int new_mtu)
1908 struct i40e_netdev_priv *np = netdev_priv(netdev);
1909 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
1910 struct i40e_vsi *vsi = np->vsi;
1912 /* MTU < 68 is an error and causes problems on some kernels */
1913 if ((new_mtu < 68) || (max_frame > I40E_MAX_RXBUFFER))
1916 netdev_info(netdev, "changing MTU from %d to %d\n",
1917 netdev->mtu, new_mtu);
1918 netdev->mtu = new_mtu;
1919 if (netif_running(netdev))
1920 i40e_vsi_reinit_locked(vsi);
1926 * i40e_ioctl - Access the hwtstamp interface
1927 * @netdev: network interface device structure
1928 * @ifr: interface request data
1929 * @cmd: ioctl command
1931 int i40e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
1933 struct i40e_netdev_priv *np = netdev_priv(netdev);
1934 struct i40e_pf *pf = np->vsi->back;
1938 return i40e_ptp_get_ts_config(pf, ifr);
1940 return i40e_ptp_set_ts_config(pf, ifr);
1947 * i40e_vlan_stripping_enable - Turn on vlan stripping for the VSI
1948 * @vsi: the vsi being adjusted
1950 void i40e_vlan_stripping_enable(struct i40e_vsi *vsi)
1952 struct i40e_vsi_context ctxt;
1955 if ((vsi->info.valid_sections &
1956 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
1957 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_MODE_MASK) == 0))
1958 return; /* already enabled */
1960 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
1961 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
1962 I40E_AQ_VSI_PVLAN_EMOD_STR_BOTH;
1964 ctxt.seid = vsi->seid;
1965 memcpy(&ctxt.info, &vsi->info, sizeof(vsi->info));
1966 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
1968 dev_info(&vsi->back->pdev->dev,
1969 "%s: update vsi failed, aq_err=%d\n",
1970 __func__, vsi->back->hw.aq.asq_last_status);
1975 * i40e_vlan_stripping_disable - Turn off vlan stripping for the VSI
1976 * @vsi: the vsi being adjusted
1978 void i40e_vlan_stripping_disable(struct i40e_vsi *vsi)
1980 struct i40e_vsi_context ctxt;
1983 if ((vsi->info.valid_sections &
1984 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
1985 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_EMOD_MASK) ==
1986 I40E_AQ_VSI_PVLAN_EMOD_MASK))
1987 return; /* already disabled */
1989 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
1990 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
1991 I40E_AQ_VSI_PVLAN_EMOD_NOTHING;
1993 ctxt.seid = vsi->seid;
1994 memcpy(&ctxt.info, &vsi->info, sizeof(vsi->info));
1995 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
1997 dev_info(&vsi->back->pdev->dev,
1998 "%s: update vsi failed, aq_err=%d\n",
1999 __func__, vsi->back->hw.aq.asq_last_status);
2004 * i40e_vlan_rx_register - Setup or shutdown vlan offload
2005 * @netdev: network interface to be adjusted
2006 * @features: netdev features to test if VLAN offload is enabled or not
2008 static void i40e_vlan_rx_register(struct net_device *netdev, u32 features)
2010 struct i40e_netdev_priv *np = netdev_priv(netdev);
2011 struct i40e_vsi *vsi = np->vsi;
2013 if (features & NETIF_F_HW_VLAN_CTAG_RX)
2014 i40e_vlan_stripping_enable(vsi);
2016 i40e_vlan_stripping_disable(vsi);
2020 * i40e_vsi_add_vlan - Add vsi membership for given vlan
2021 * @vsi: the vsi being configured
2022 * @vid: vlan id to be added (0 = untagged only , -1 = any)
2024 int i40e_vsi_add_vlan(struct i40e_vsi *vsi, s16 vid)
2026 struct i40e_mac_filter *f, *add_f;
2027 bool is_netdev, is_vf;
2029 is_vf = (vsi->type == I40E_VSI_SRIOV);
2030 is_netdev = !!(vsi->netdev);
2033 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, vid,
2036 dev_info(&vsi->back->pdev->dev,
2037 "Could not add vlan filter %d for %pM\n",
2038 vid, vsi->netdev->dev_addr);
2043 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2044 add_f = i40e_add_filter(vsi, f->macaddr, vid, is_vf, is_netdev);
2046 dev_info(&vsi->back->pdev->dev,
2047 "Could not add vlan filter %d for %pM\n",
2053 /* Now if we add a vlan tag, make sure to check if it is the first
2054 * tag (i.e. a "tag" -1 does exist) and if so replace the -1 "tag"
2055 * with 0, so we now accept untagged and specified tagged traffic
2056 * (and not any taged and untagged)
2059 if (is_netdev && i40e_find_filter(vsi, vsi->netdev->dev_addr,
2061 is_vf, is_netdev)) {
2062 i40e_del_filter(vsi, vsi->netdev->dev_addr,
2063 I40E_VLAN_ANY, is_vf, is_netdev);
2064 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, 0,
2067 dev_info(&vsi->back->pdev->dev,
2068 "Could not add filter 0 for %pM\n",
2069 vsi->netdev->dev_addr);
2075 /* Do not assume that I40E_VLAN_ANY should be reset to VLAN 0 */
2076 if (vid > 0 && !vsi->info.pvid) {
2077 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2078 if (i40e_find_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2079 is_vf, is_netdev)) {
2080 i40e_del_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2082 add_f = i40e_add_filter(vsi, f->macaddr,
2083 0, is_vf, is_netdev);
2085 dev_info(&vsi->back->pdev->dev,
2086 "Could not add filter 0 for %pM\n",
2094 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
2095 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
2098 return i40e_sync_vsi_filters(vsi);
2102 * i40e_vsi_kill_vlan - Remove vsi membership for given vlan
2103 * @vsi: the vsi being configured
2104 * @vid: vlan id to be removed (0 = untagged only , -1 = any)
2106 * Return: 0 on success or negative otherwise
2108 int i40e_vsi_kill_vlan(struct i40e_vsi *vsi, s16 vid)
2110 struct net_device *netdev = vsi->netdev;
2111 struct i40e_mac_filter *f, *add_f;
2112 bool is_vf, is_netdev;
2113 int filter_count = 0;
2115 is_vf = (vsi->type == I40E_VSI_SRIOV);
2116 is_netdev = !!(netdev);
2119 i40e_del_filter(vsi, netdev->dev_addr, vid, is_vf, is_netdev);
2121 list_for_each_entry(f, &vsi->mac_filter_list, list)
2122 i40e_del_filter(vsi, f->macaddr, vid, is_vf, is_netdev);
2124 /* go through all the filters for this VSI and if there is only
2125 * vid == 0 it means there are no other filters, so vid 0 must
2126 * be replaced with -1. This signifies that we should from now
2127 * on accept any traffic (with any tag present, or untagged)
2129 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2132 ether_addr_equal(netdev->dev_addr, f->macaddr))
2140 if (!filter_count && is_netdev) {
2141 i40e_del_filter(vsi, netdev->dev_addr, 0, is_vf, is_netdev);
2142 f = i40e_add_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY,
2145 dev_info(&vsi->back->pdev->dev,
2146 "Could not add filter %d for %pM\n",
2147 I40E_VLAN_ANY, netdev->dev_addr);
2152 if (!filter_count) {
2153 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2154 i40e_del_filter(vsi, f->macaddr, 0, is_vf, is_netdev);
2155 add_f = i40e_add_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2158 dev_info(&vsi->back->pdev->dev,
2159 "Could not add filter %d for %pM\n",
2160 I40E_VLAN_ANY, f->macaddr);
2166 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
2167 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
2170 return i40e_sync_vsi_filters(vsi);
2174 * i40e_vlan_rx_add_vid - Add a vlan id filter to HW offload
2175 * @netdev: network interface to be adjusted
2176 * @vid: vlan id to be added
2178 * net_device_ops implementation for adding vlan ids
2181 int i40e_vlan_rx_add_vid(struct net_device *netdev,
2182 __always_unused __be16 proto, u16 vid)
2184 static int i40e_vlan_rx_add_vid(struct net_device *netdev,
2185 __always_unused __be16 proto, u16 vid)
2188 struct i40e_netdev_priv *np = netdev_priv(netdev);
2189 struct i40e_vsi *vsi = np->vsi;
2195 netdev_info(netdev, "adding %pM vid=%d\n", netdev->dev_addr, vid);
2197 /* If the network stack called us with vid = 0 then
2198 * it is asking to receive priority tagged packets with
2199 * vlan id 0. Our HW receives them by default when configured
2200 * to receive untagged packets so there is no need to add an
2201 * extra filter for vlan 0 tagged packets.
2204 ret = i40e_vsi_add_vlan(vsi, vid);
2206 if (!ret && (vid < VLAN_N_VID))
2207 set_bit(vid, vsi->active_vlans);
2213 * i40e_vlan_rx_kill_vid - Remove a vlan id filter from HW offload
2214 * @netdev: network interface to be adjusted
2215 * @vid: vlan id to be removed
2217 * net_device_ops implementation for removing vlan ids
2220 int i40e_vlan_rx_kill_vid(struct net_device *netdev,
2221 __always_unused __be16 proto, u16 vid)
2223 static int i40e_vlan_rx_kill_vid(struct net_device *netdev,
2224 __always_unused __be16 proto, u16 vid)
2227 struct i40e_netdev_priv *np = netdev_priv(netdev);
2228 struct i40e_vsi *vsi = np->vsi;
2230 netdev_info(netdev, "removing %pM vid=%d\n", netdev->dev_addr, vid);
2232 /* return code is ignored as there is nothing a user
2233 * can do about failure to remove and a log message was
2234 * already printed from the other function
2236 i40e_vsi_kill_vlan(vsi, vid);
2238 clear_bit(vid, vsi->active_vlans);
2244 * i40e_restore_vlan - Reinstate vlans when vsi/netdev comes back up
2245 * @vsi: the vsi being brought back up
2247 static void i40e_restore_vlan(struct i40e_vsi *vsi)
2254 i40e_vlan_rx_register(vsi->netdev, vsi->netdev->features);
2256 for_each_set_bit(vid, vsi->active_vlans, VLAN_N_VID)
2257 i40e_vlan_rx_add_vid(vsi->netdev, htons(ETH_P_8021Q),
2262 * i40e_vsi_add_pvid - Add pvid for the VSI
2263 * @vsi: the vsi being adjusted
2264 * @vid: the vlan id to set as a PVID
2266 int i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid)
2268 struct i40e_vsi_context ctxt;
2271 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2272 vsi->info.pvid = cpu_to_le16(vid);
2273 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_TAGGED |
2274 I40E_AQ_VSI_PVLAN_INSERT_PVID |
2275 I40E_AQ_VSI_PVLAN_EMOD_STR;
2277 ctxt.seid = vsi->seid;
2278 memcpy(&ctxt.info, &vsi->info, sizeof(vsi->info));
2279 aq_ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2281 dev_info(&vsi->back->pdev->dev,
2282 "%s: update vsi failed, aq_err=%d\n",
2283 __func__, vsi->back->hw.aq.asq_last_status);
2291 * i40e_vsi_remove_pvid - Remove the pvid from the VSI
2292 * @vsi: the vsi being adjusted
2294 * Just use the vlan_rx_register() service to put it back to normal
2296 void i40e_vsi_remove_pvid(struct i40e_vsi *vsi)
2298 i40e_vlan_stripping_disable(vsi);
2304 * i40e_vsi_setup_tx_resources - Allocate VSI Tx queue resources
2305 * @vsi: ptr to the VSI
2307 * If this function returns with an error, then it's possible one or
2308 * more of the rings is populated (while the rest are not). It is the
2309 * callers duty to clean those orphaned rings.
2311 * Return 0 on success, negative on failure
2313 static int i40e_vsi_setup_tx_resources(struct i40e_vsi *vsi)
2317 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2318 err = i40e_setup_tx_descriptors(vsi->tx_rings[i]);
2324 * i40e_vsi_free_tx_resources - Free Tx resources for VSI queues
2325 * @vsi: ptr to the VSI
2327 * Free VSI's transmit software resources
2329 static void i40e_vsi_free_tx_resources(struct i40e_vsi *vsi)
2336 for (i = 0; i < vsi->num_queue_pairs; i++)
2337 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc)
2338 i40e_free_tx_resources(vsi->tx_rings[i]);
2342 * i40e_vsi_setup_rx_resources - Allocate VSI queues Rx resources
2343 * @vsi: ptr to the VSI
2345 * If this function returns with an error, then it's possible one or
2346 * more of the rings is populated (while the rest are not). It is the
2347 * callers duty to clean those orphaned rings.
2349 * Return 0 on success, negative on failure
2351 static int i40e_vsi_setup_rx_resources(struct i40e_vsi *vsi)
2355 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2356 err = i40e_setup_rx_descriptors(vsi->rx_rings[i]);
2358 i40e_fcoe_setup_ddp_resources(vsi);
2364 * i40e_vsi_free_rx_resources - Free Rx Resources for VSI queues
2365 * @vsi: ptr to the VSI
2367 * Free all receive software resources
2369 static void i40e_vsi_free_rx_resources(struct i40e_vsi *vsi)
2376 for (i = 0; i < vsi->num_queue_pairs; i++)
2377 if (vsi->rx_rings[i] && vsi->rx_rings[i]->desc)
2378 i40e_free_rx_resources(vsi->rx_rings[i]);
2380 i40e_fcoe_free_ddp_resources(vsi);
2385 * i40e_configure_tx_ring - Configure a transmit ring context and rest
2386 * @ring: The Tx ring to configure
2388 * Configure the Tx descriptor ring in the HMC context.
2390 static int i40e_configure_tx_ring(struct i40e_ring *ring)
2392 struct i40e_vsi *vsi = ring->vsi;
2393 u16 pf_q = vsi->base_queue + ring->queue_index;
2394 struct i40e_hw *hw = &vsi->back->hw;
2395 struct i40e_hmc_obj_txq tx_ctx;
2396 i40e_status err = 0;
2399 /* some ATR related tx ring init */
2400 if (vsi->back->flags & I40E_FLAG_FD_ATR_ENABLED) {
2401 ring->atr_sample_rate = vsi->back->atr_sample_rate;
2402 ring->atr_count = 0;
2404 ring->atr_sample_rate = 0;
2407 /* initialize XPS */
2408 if (ring->q_vector && ring->netdev &&
2409 vsi->tc_config.numtc <= 1 &&
2410 !test_and_set_bit(__I40E_TX_XPS_INIT_DONE, &ring->state))
2411 netif_set_xps_queue(ring->netdev,
2412 &ring->q_vector->affinity_mask,
2415 /* clear the context structure first */
2416 memset(&tx_ctx, 0, sizeof(tx_ctx));
2418 tx_ctx.new_context = 1;
2419 tx_ctx.base = (ring->dma / 128);
2420 tx_ctx.qlen = ring->count;
2421 tx_ctx.fd_ena = !!(vsi->back->flags & (I40E_FLAG_FD_SB_ENABLED |
2422 I40E_FLAG_FD_ATR_ENABLED));
2424 tx_ctx.fc_ena = (vsi->type == I40E_VSI_FCOE);
2426 tx_ctx.timesync_ena = !!(vsi->back->flags & I40E_FLAG_PTP);
2427 /* FDIR VSI tx ring can still use RS bit and writebacks */
2428 if (vsi->type != I40E_VSI_FDIR)
2429 tx_ctx.head_wb_ena = 1;
2430 tx_ctx.head_wb_addr = ring->dma +
2431 (ring->count * sizeof(struct i40e_tx_desc));
2433 /* As part of VSI creation/update, FW allocates certain
2434 * Tx arbitration queue sets for each TC enabled for
2435 * the VSI. The FW returns the handles to these queue
2436 * sets as part of the response buffer to Add VSI,
2437 * Update VSI, etc. AQ commands. It is expected that
2438 * these queue set handles be associated with the Tx
2439 * queues by the driver as part of the TX queue context
2440 * initialization. This has to be done regardless of
2441 * DCB as by default everything is mapped to TC0.
2443 tx_ctx.rdylist = le16_to_cpu(vsi->info.qs_handle[ring->dcb_tc]);
2444 tx_ctx.rdylist_act = 0;
2446 /* clear the context in the HMC */
2447 err = i40e_clear_lan_tx_queue_context(hw, pf_q);
2449 dev_info(&vsi->back->pdev->dev,
2450 "Failed to clear LAN Tx queue context on Tx ring %d (pf_q %d), error: %d\n",
2451 ring->queue_index, pf_q, err);
2455 /* set the context in the HMC */
2456 err = i40e_set_lan_tx_queue_context(hw, pf_q, &tx_ctx);
2458 dev_info(&vsi->back->pdev->dev,
2459 "Failed to set LAN Tx queue context on Tx ring %d (pf_q %d, error: %d\n",
2460 ring->queue_index, pf_q, err);
2464 /* Now associate this queue with this PCI function */
2465 if (vsi->type == I40E_VSI_VMDQ2)
2466 qtx_ctl = I40E_QTX_CTL_VM_QUEUE;
2468 qtx_ctl = I40E_QTX_CTL_PF_QUEUE;
2469 qtx_ctl |= ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT) &
2470 I40E_QTX_CTL_PF_INDX_MASK);
2471 wr32(hw, I40E_QTX_CTL(pf_q), qtx_ctl);
2474 clear_bit(__I40E_HANG_CHECK_ARMED, &ring->state);
2476 /* cache tail off for easier writes later */
2477 ring->tail = hw->hw_addr + I40E_QTX_TAIL(pf_q);
2483 * i40e_configure_rx_ring - Configure a receive ring context
2484 * @ring: The Rx ring to configure
2486 * Configure the Rx descriptor ring in the HMC context.
2488 static int i40e_configure_rx_ring(struct i40e_ring *ring)
2490 struct i40e_vsi *vsi = ring->vsi;
2491 u32 chain_len = vsi->back->hw.func_caps.rx_buf_chain_len;
2492 u16 pf_q = vsi->base_queue + ring->queue_index;
2493 struct i40e_hw *hw = &vsi->back->hw;
2494 struct i40e_hmc_obj_rxq rx_ctx;
2495 i40e_status err = 0;
2499 /* clear the context structure first */
2500 memset(&rx_ctx, 0, sizeof(rx_ctx));
2502 ring->rx_buf_len = vsi->rx_buf_len;
2503 ring->rx_hdr_len = vsi->rx_hdr_len;
2505 rx_ctx.dbuff = ring->rx_buf_len >> I40E_RXQ_CTX_DBUFF_SHIFT;
2506 rx_ctx.hbuff = ring->rx_hdr_len >> I40E_RXQ_CTX_HBUFF_SHIFT;
2508 rx_ctx.base = (ring->dma / 128);
2509 rx_ctx.qlen = ring->count;
2511 if (vsi->back->flags & I40E_FLAG_16BYTE_RX_DESC_ENABLED) {
2512 set_ring_16byte_desc_enabled(ring);
2518 rx_ctx.dtype = vsi->dtype;
2520 set_ring_ps_enabled(ring);
2521 rx_ctx.hsplit_0 = I40E_RX_SPLIT_L2 |
2523 I40E_RX_SPLIT_TCP_UDP |
2526 rx_ctx.hsplit_0 = 0;
2529 rx_ctx.rxmax = min_t(u16, vsi->max_frame,
2530 (chain_len * ring->rx_buf_len));
2531 if (hw->revision_id == 0)
2532 rx_ctx.lrxqthresh = 0;
2534 rx_ctx.lrxqthresh = 2;
2535 rx_ctx.crcstrip = 1;
2539 rx_ctx.fc_ena = (vsi->type == I40E_VSI_FCOE);
2541 /* set the prefena field to 1 because the manual says to */
2544 /* clear the context in the HMC */
2545 err = i40e_clear_lan_rx_queue_context(hw, pf_q);
2547 dev_info(&vsi->back->pdev->dev,
2548 "Failed to clear LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
2549 ring->queue_index, pf_q, err);
2553 /* set the context in the HMC */
2554 err = i40e_set_lan_rx_queue_context(hw, pf_q, &rx_ctx);
2556 dev_info(&vsi->back->pdev->dev,
2557 "Failed to set LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
2558 ring->queue_index, pf_q, err);
2562 /* cache tail for quicker writes, and clear the reg before use */
2563 ring->tail = hw->hw_addr + I40E_QRX_TAIL(pf_q);
2564 writel(0, ring->tail);
2566 i40e_alloc_rx_buffers(ring, I40E_DESC_UNUSED(ring));
2572 * i40e_vsi_configure_tx - Configure the VSI for Tx
2573 * @vsi: VSI structure describing this set of rings and resources
2575 * Configure the Tx VSI for operation.
2577 static int i40e_vsi_configure_tx(struct i40e_vsi *vsi)
2582 for (i = 0; (i < vsi->num_queue_pairs) && !err; i++)
2583 err = i40e_configure_tx_ring(vsi->tx_rings[i]);
2589 * i40e_vsi_configure_rx - Configure the VSI for Rx
2590 * @vsi: the VSI being configured
2592 * Configure the Rx VSI for operation.
2594 static int i40e_vsi_configure_rx(struct i40e_vsi *vsi)
2599 if (vsi->netdev && (vsi->netdev->mtu > ETH_DATA_LEN))
2600 vsi->max_frame = vsi->netdev->mtu + ETH_HLEN
2601 + ETH_FCS_LEN + VLAN_HLEN;
2603 vsi->max_frame = I40E_RXBUFFER_2048;
2605 /* figure out correct receive buffer length */
2606 switch (vsi->back->flags & (I40E_FLAG_RX_1BUF_ENABLED |
2607 I40E_FLAG_RX_PS_ENABLED)) {
2608 case I40E_FLAG_RX_1BUF_ENABLED:
2609 vsi->rx_hdr_len = 0;
2610 vsi->rx_buf_len = vsi->max_frame;
2611 vsi->dtype = I40E_RX_DTYPE_NO_SPLIT;
2613 case I40E_FLAG_RX_PS_ENABLED:
2614 vsi->rx_hdr_len = I40E_RX_HDR_SIZE;
2615 vsi->rx_buf_len = I40E_RXBUFFER_2048;
2616 vsi->dtype = I40E_RX_DTYPE_HEADER_SPLIT;
2619 vsi->rx_hdr_len = I40E_RX_HDR_SIZE;
2620 vsi->rx_buf_len = I40E_RXBUFFER_2048;
2621 vsi->dtype = I40E_RX_DTYPE_SPLIT_ALWAYS;
2626 /* setup rx buffer for FCoE */
2627 if ((vsi->type == I40E_VSI_FCOE) &&
2628 (vsi->back->flags & I40E_FLAG_FCOE_ENABLED)) {
2629 vsi->rx_hdr_len = 0;
2630 vsi->rx_buf_len = I40E_RXBUFFER_3072;
2631 vsi->max_frame = I40E_RXBUFFER_3072;
2632 vsi->dtype = I40E_RX_DTYPE_NO_SPLIT;
2635 #endif /* I40E_FCOE */
2636 /* round up for the chip's needs */
2637 vsi->rx_hdr_len = ALIGN(vsi->rx_hdr_len,
2638 (1 << I40E_RXQ_CTX_HBUFF_SHIFT));
2639 vsi->rx_buf_len = ALIGN(vsi->rx_buf_len,
2640 (1 << I40E_RXQ_CTX_DBUFF_SHIFT));
2642 /* set up individual rings */
2643 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2644 err = i40e_configure_rx_ring(vsi->rx_rings[i]);
2650 * i40e_vsi_config_dcb_rings - Update rings to reflect DCB TC
2651 * @vsi: ptr to the VSI
2653 static void i40e_vsi_config_dcb_rings(struct i40e_vsi *vsi)
2655 struct i40e_ring *tx_ring, *rx_ring;
2656 u16 qoffset, qcount;
2659 if (!(vsi->back->flags & I40E_FLAG_DCB_ENABLED))
2662 for (n = 0; n < I40E_MAX_TRAFFIC_CLASS; n++) {
2663 if (!(vsi->tc_config.enabled_tc & (1 << n)))
2666 qoffset = vsi->tc_config.tc_info[n].qoffset;
2667 qcount = vsi->tc_config.tc_info[n].qcount;
2668 for (i = qoffset; i < (qoffset + qcount); i++) {
2669 rx_ring = vsi->rx_rings[i];
2670 tx_ring = vsi->tx_rings[i];
2671 rx_ring->dcb_tc = n;
2672 tx_ring->dcb_tc = n;
2678 * i40e_set_vsi_rx_mode - Call set_rx_mode on a VSI
2679 * @vsi: ptr to the VSI
2681 static void i40e_set_vsi_rx_mode(struct i40e_vsi *vsi)
2684 i40e_set_rx_mode(vsi->netdev);
2688 * i40e_fdir_filter_restore - Restore the Sideband Flow Director filters
2689 * @vsi: Pointer to the targeted VSI
2691 * This function replays the hlist on the hw where all the SB Flow Director
2692 * filters were saved.
2694 static void i40e_fdir_filter_restore(struct i40e_vsi *vsi)
2696 struct i40e_fdir_filter *filter;
2697 struct i40e_pf *pf = vsi->back;
2698 struct hlist_node *node;
2700 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
2703 hlist_for_each_entry_safe(filter, node,
2704 &pf->fdir_filter_list, fdir_node) {
2705 i40e_add_del_fdir(vsi, filter, true);
2710 * i40e_vsi_configure - Set up the VSI for action
2711 * @vsi: the VSI being configured
2713 static int i40e_vsi_configure(struct i40e_vsi *vsi)
2717 i40e_set_vsi_rx_mode(vsi);
2718 i40e_restore_vlan(vsi);
2719 i40e_vsi_config_dcb_rings(vsi);
2720 err = i40e_vsi_configure_tx(vsi);
2722 err = i40e_vsi_configure_rx(vsi);
2728 * i40e_vsi_configure_msix - MSIX mode Interrupt Config in the HW
2729 * @vsi: the VSI being configured
2731 static void i40e_vsi_configure_msix(struct i40e_vsi *vsi)
2733 struct i40e_pf *pf = vsi->back;
2734 struct i40e_q_vector *q_vector;
2735 struct i40e_hw *hw = &pf->hw;
2741 /* The interrupt indexing is offset by 1 in the PFINT_ITRn
2742 * and PFINT_LNKLSTn registers, e.g.:
2743 * PFINT_ITRn[0..n-1] gets msix-1..msix-n (qpair interrupts)
2745 qp = vsi->base_queue;
2746 vector = vsi->base_vector;
2747 for (i = 0; i < vsi->num_q_vectors; i++, vector++) {
2748 q_vector = vsi->q_vectors[i];
2749 q_vector->rx.itr = ITR_TO_REG(vsi->rx_itr_setting);
2750 q_vector->rx.latency_range = I40E_LOW_LATENCY;
2751 wr32(hw, I40E_PFINT_ITRN(I40E_RX_ITR, vector - 1),
2753 q_vector->tx.itr = ITR_TO_REG(vsi->tx_itr_setting);
2754 q_vector->tx.latency_range = I40E_LOW_LATENCY;
2755 wr32(hw, I40E_PFINT_ITRN(I40E_TX_ITR, vector - 1),
2758 /* Linked list for the queuepairs assigned to this vector */
2759 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), qp);
2760 for (q = 0; q < q_vector->num_ringpairs; q++) {
2761 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
2762 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
2763 (vector << I40E_QINT_RQCTL_MSIX_INDX_SHIFT) |
2764 (qp << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT)|
2766 << I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT);
2768 wr32(hw, I40E_QINT_RQCTL(qp), val);
2770 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
2771 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
2772 (vector << I40E_QINT_TQCTL_MSIX_INDX_SHIFT) |
2773 ((qp+1) << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT)|
2775 << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
2777 /* Terminate the linked list */
2778 if (q == (q_vector->num_ringpairs - 1))
2779 val |= (I40E_QUEUE_END_OF_LIST
2780 << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
2782 wr32(hw, I40E_QINT_TQCTL(qp), val);
2791 * i40e_enable_misc_int_causes - enable the non-queue interrupts
2792 * @hw: ptr to the hardware info
2794 static void i40e_enable_misc_int_causes(struct i40e_hw *hw)
2798 /* clear things first */
2799 wr32(hw, I40E_PFINT_ICR0_ENA, 0); /* disable all */
2800 rd32(hw, I40E_PFINT_ICR0); /* read to clear */
2802 val = I40E_PFINT_ICR0_ENA_ECC_ERR_MASK |
2803 I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK |
2804 I40E_PFINT_ICR0_ENA_GRST_MASK |
2805 I40E_PFINT_ICR0_ENA_PCI_EXCEPTION_MASK |
2806 I40E_PFINT_ICR0_ENA_GPIO_MASK |
2807 I40E_PFINT_ICR0_ENA_TIMESYNC_MASK |
2808 I40E_PFINT_ICR0_ENA_HMC_ERR_MASK |
2809 I40E_PFINT_ICR0_ENA_VFLR_MASK |
2810 I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
2812 wr32(hw, I40E_PFINT_ICR0_ENA, val);
2814 /* SW_ITR_IDX = 0, but don't change INTENA */
2815 wr32(hw, I40E_PFINT_DYN_CTL0, I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK |
2816 I40E_PFINT_DYN_CTL0_INTENA_MSK_MASK);
2818 /* OTHER_ITR_IDX = 0 */
2819 wr32(hw, I40E_PFINT_STAT_CTL0, 0);
2823 * i40e_configure_msi_and_legacy - Legacy mode interrupt config in the HW
2824 * @vsi: the VSI being configured
2826 static void i40e_configure_msi_and_legacy(struct i40e_vsi *vsi)
2828 struct i40e_q_vector *q_vector = vsi->q_vectors[0];
2829 struct i40e_pf *pf = vsi->back;
2830 struct i40e_hw *hw = &pf->hw;
2833 /* set the ITR configuration */
2834 q_vector->rx.itr = ITR_TO_REG(vsi->rx_itr_setting);
2835 q_vector->rx.latency_range = I40E_LOW_LATENCY;
2836 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), q_vector->rx.itr);
2837 q_vector->tx.itr = ITR_TO_REG(vsi->tx_itr_setting);
2838 q_vector->tx.latency_range = I40E_LOW_LATENCY;
2839 wr32(hw, I40E_PFINT_ITR0(I40E_TX_ITR), q_vector->tx.itr);
2841 i40e_enable_misc_int_causes(hw);
2843 /* FIRSTQ_INDX = 0, FIRSTQ_TYPE = 0 (rx) */
2844 wr32(hw, I40E_PFINT_LNKLST0, 0);
2846 /* Associate the queue pair to the vector and enable the queue int */
2847 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
2848 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
2849 (I40E_QUEUE_TYPE_TX << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
2851 wr32(hw, I40E_QINT_RQCTL(0), val);
2853 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
2854 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
2855 (I40E_QUEUE_END_OF_LIST << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
2857 wr32(hw, I40E_QINT_TQCTL(0), val);
2862 * i40e_irq_dynamic_disable_icr0 - Disable default interrupt generation for icr0
2863 * @pf: board private structure
2865 void i40e_irq_dynamic_disable_icr0(struct i40e_pf *pf)
2867 struct i40e_hw *hw = &pf->hw;
2869 wr32(hw, I40E_PFINT_DYN_CTL0,
2870 I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
2875 * i40e_irq_dynamic_enable_icr0 - Enable default interrupt generation for icr0
2876 * @pf: board private structure
2878 void i40e_irq_dynamic_enable_icr0(struct i40e_pf *pf)
2880 struct i40e_hw *hw = &pf->hw;
2883 val = I40E_PFINT_DYN_CTL0_INTENA_MASK |
2884 I40E_PFINT_DYN_CTL0_CLEARPBA_MASK |
2885 (I40E_ITR_NONE << I40E_PFINT_DYN_CTL0_ITR_INDX_SHIFT);
2887 wr32(hw, I40E_PFINT_DYN_CTL0, val);
2892 * i40e_irq_dynamic_enable - Enable default interrupt generation settings
2893 * @vsi: pointer to a vsi
2894 * @vector: enable a particular Hw Interrupt vector
2896 void i40e_irq_dynamic_enable(struct i40e_vsi *vsi, int vector)
2898 struct i40e_pf *pf = vsi->back;
2899 struct i40e_hw *hw = &pf->hw;
2902 val = I40E_PFINT_DYN_CTLN_INTENA_MASK |
2903 I40E_PFINT_DYN_CTLN_CLEARPBA_MASK |
2904 (I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
2905 wr32(hw, I40E_PFINT_DYN_CTLN(vector - 1), val);
2906 /* skip the flush */
2910 * i40e_irq_dynamic_disable - Disable default interrupt generation settings
2911 * @vsi: pointer to a vsi
2912 * @vector: enable a particular Hw Interrupt vector
2914 void i40e_irq_dynamic_disable(struct i40e_vsi *vsi, int vector)
2916 struct i40e_pf *pf = vsi->back;
2917 struct i40e_hw *hw = &pf->hw;
2920 val = I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT;
2921 wr32(hw, I40E_PFINT_DYN_CTLN(vector - 1), val);
2926 * i40e_msix_clean_rings - MSIX mode Interrupt Handler
2927 * @irq: interrupt number
2928 * @data: pointer to a q_vector
2930 static irqreturn_t i40e_msix_clean_rings(int irq, void *data)
2932 struct i40e_q_vector *q_vector = data;
2934 if (!q_vector->tx.ring && !q_vector->rx.ring)
2937 napi_schedule(&q_vector->napi);
2943 * i40e_vsi_request_irq_msix - Initialize MSI-X interrupts
2944 * @vsi: the VSI being configured
2945 * @basename: name for the vector
2947 * Allocates MSI-X vectors and requests interrupts from the kernel.
2949 static int i40e_vsi_request_irq_msix(struct i40e_vsi *vsi, char *basename)
2951 int q_vectors = vsi->num_q_vectors;
2952 struct i40e_pf *pf = vsi->back;
2953 int base = vsi->base_vector;
2958 for (vector = 0; vector < q_vectors; vector++) {
2959 struct i40e_q_vector *q_vector = vsi->q_vectors[vector];
2961 if (q_vector->tx.ring && q_vector->rx.ring) {
2962 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2963 "%s-%s-%d", basename, "TxRx", rx_int_idx++);
2965 } else if (q_vector->rx.ring) {
2966 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2967 "%s-%s-%d", basename, "rx", rx_int_idx++);
2968 } else if (q_vector->tx.ring) {
2969 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2970 "%s-%s-%d", basename, "tx", tx_int_idx++);
2972 /* skip this unused q_vector */
2975 err = request_irq(pf->msix_entries[base + vector].vector,
2981 dev_info(&pf->pdev->dev,
2982 "%s: request_irq failed, error: %d\n",
2984 goto free_queue_irqs;
2986 /* assign the mask for this irq */
2987 irq_set_affinity_hint(pf->msix_entries[base + vector].vector,
2988 &q_vector->affinity_mask);
2991 vsi->irqs_ready = true;
2997 irq_set_affinity_hint(pf->msix_entries[base + vector].vector,
2999 free_irq(pf->msix_entries[base + vector].vector,
3000 &(vsi->q_vectors[vector]));
3006 * i40e_vsi_disable_irq - Mask off queue interrupt generation on the VSI
3007 * @vsi: the VSI being un-configured
3009 static void i40e_vsi_disable_irq(struct i40e_vsi *vsi)
3011 struct i40e_pf *pf = vsi->back;
3012 struct i40e_hw *hw = &pf->hw;
3013 int base = vsi->base_vector;
3016 for (i = 0; i < vsi->num_queue_pairs; i++) {
3017 wr32(hw, I40E_QINT_TQCTL(vsi->tx_rings[i]->reg_idx), 0);
3018 wr32(hw, I40E_QINT_RQCTL(vsi->rx_rings[i]->reg_idx), 0);
3021 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3022 for (i = vsi->base_vector;
3023 i < (vsi->num_q_vectors + vsi->base_vector); i++)
3024 wr32(hw, I40E_PFINT_DYN_CTLN(i - 1), 0);
3027 for (i = 0; i < vsi->num_q_vectors; i++)
3028 synchronize_irq(pf->msix_entries[i + base].vector);
3030 /* Legacy and MSI mode - this stops all interrupt handling */
3031 wr32(hw, I40E_PFINT_ICR0_ENA, 0);
3032 wr32(hw, I40E_PFINT_DYN_CTL0, 0);
3034 synchronize_irq(pf->pdev->irq);
3039 * i40e_vsi_enable_irq - Enable IRQ for the given VSI
3040 * @vsi: the VSI being configured
3042 static int i40e_vsi_enable_irq(struct i40e_vsi *vsi)
3044 struct i40e_pf *pf = vsi->back;
3047 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3048 for (i = vsi->base_vector;
3049 i < (vsi->num_q_vectors + vsi->base_vector); i++)
3050 i40e_irq_dynamic_enable(vsi, i);
3052 i40e_irq_dynamic_enable_icr0(pf);
3055 i40e_flush(&pf->hw);
3060 * i40e_stop_misc_vector - Stop the vector that handles non-queue events
3061 * @pf: board private structure
3063 static void i40e_stop_misc_vector(struct i40e_pf *pf)
3066 wr32(&pf->hw, I40E_PFINT_ICR0_ENA, 0);
3067 i40e_flush(&pf->hw);
3071 * i40e_intr - MSI/Legacy and non-queue interrupt handler
3072 * @irq: interrupt number
3073 * @data: pointer to a q_vector
3075 * This is the handler used for all MSI/Legacy interrupts, and deals
3076 * with both queue and non-queue interrupts. This is also used in
3077 * MSIX mode to handle the non-queue interrupts.
3079 static irqreturn_t i40e_intr(int irq, void *data)
3081 struct i40e_pf *pf = (struct i40e_pf *)data;
3082 struct i40e_hw *hw = &pf->hw;
3083 irqreturn_t ret = IRQ_NONE;
3084 u32 icr0, icr0_remaining;
3087 icr0 = rd32(hw, I40E_PFINT_ICR0);
3088 ena_mask = rd32(hw, I40E_PFINT_ICR0_ENA);
3090 /* if sharing a legacy IRQ, we might get called w/o an intr pending */
3091 if ((icr0 & I40E_PFINT_ICR0_INTEVENT_MASK) == 0)
3094 /* if interrupt but no bits showing, must be SWINT */
3095 if (((icr0 & ~I40E_PFINT_ICR0_INTEVENT_MASK) == 0) ||
3096 (icr0 & I40E_PFINT_ICR0_SWINT_MASK))
3099 /* only q0 is used in MSI/Legacy mode, and none are used in MSIX */
3100 if (icr0 & I40E_PFINT_ICR0_QUEUE_0_MASK) {
3102 /* temporarily disable queue cause for NAPI processing */
3103 u32 qval = rd32(hw, I40E_QINT_RQCTL(0));
3104 qval &= ~I40E_QINT_RQCTL_CAUSE_ENA_MASK;
3105 wr32(hw, I40E_QINT_RQCTL(0), qval);
3107 qval = rd32(hw, I40E_QINT_TQCTL(0));
3108 qval &= ~I40E_QINT_TQCTL_CAUSE_ENA_MASK;
3109 wr32(hw, I40E_QINT_TQCTL(0), qval);
3111 if (!test_bit(__I40E_DOWN, &pf->state))
3112 napi_schedule(&pf->vsi[pf->lan_vsi]->q_vectors[0]->napi);
3115 if (icr0 & I40E_PFINT_ICR0_ADMINQ_MASK) {
3116 ena_mask &= ~I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
3117 set_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
3120 if (icr0 & I40E_PFINT_ICR0_MAL_DETECT_MASK) {
3121 ena_mask &= ~I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
3122 set_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
3125 if (icr0 & I40E_PFINT_ICR0_VFLR_MASK) {
3126 ena_mask &= ~I40E_PFINT_ICR0_ENA_VFLR_MASK;
3127 set_bit(__I40E_VFLR_EVENT_PENDING, &pf->state);
3130 if (icr0 & I40E_PFINT_ICR0_GRST_MASK) {
3131 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
3132 set_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
3133 ena_mask &= ~I40E_PFINT_ICR0_ENA_GRST_MASK;
3134 val = rd32(hw, I40E_GLGEN_RSTAT);
3135 val = (val & I40E_GLGEN_RSTAT_RESET_TYPE_MASK)
3136 >> I40E_GLGEN_RSTAT_RESET_TYPE_SHIFT;
3137 if (val == I40E_RESET_CORER) {
3139 } else if (val == I40E_RESET_GLOBR) {
3141 } else if (val == I40E_RESET_EMPR) {
3143 set_bit(__I40E_EMP_RESET_REQUESTED, &pf->state);
3147 if (icr0 & I40E_PFINT_ICR0_HMC_ERR_MASK) {
3148 icr0 &= ~I40E_PFINT_ICR0_HMC_ERR_MASK;
3149 dev_info(&pf->pdev->dev, "HMC error interrupt\n");
3152 if (icr0 & I40E_PFINT_ICR0_TIMESYNC_MASK) {
3153 u32 prttsyn_stat = rd32(hw, I40E_PRTTSYN_STAT_0);
3155 if (prttsyn_stat & I40E_PRTTSYN_STAT_0_TXTIME_MASK) {
3156 icr0 &= ~I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
3157 i40e_ptp_tx_hwtstamp(pf);
3161 /* If a critical error is pending we have no choice but to reset the
3163 * Report and mask out any remaining unexpected interrupts.
3165 icr0_remaining = icr0 & ena_mask;
3166 if (icr0_remaining) {
3167 dev_info(&pf->pdev->dev, "unhandled interrupt icr0=0x%08x\n",
3169 if ((icr0_remaining & I40E_PFINT_ICR0_PE_CRITERR_MASK) ||
3170 (icr0_remaining & I40E_PFINT_ICR0_PCI_EXCEPTION_MASK) ||
3171 (icr0_remaining & I40E_PFINT_ICR0_ECC_ERR_MASK)) {
3172 dev_info(&pf->pdev->dev, "device will be reset\n");
3173 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
3174 i40e_service_event_schedule(pf);
3176 ena_mask &= ~icr0_remaining;
3181 /* re-enable interrupt causes */
3182 wr32(hw, I40E_PFINT_ICR0_ENA, ena_mask);
3183 if (!test_bit(__I40E_DOWN, &pf->state)) {
3184 i40e_service_event_schedule(pf);
3185 i40e_irq_dynamic_enable_icr0(pf);
3192 * i40e_clean_fdir_tx_irq - Reclaim resources after transmit completes
3193 * @tx_ring: tx ring to clean
3194 * @budget: how many cleans we're allowed
3196 * Returns true if there's any budget left (e.g. the clean is finished)
3198 static bool i40e_clean_fdir_tx_irq(struct i40e_ring *tx_ring, int budget)
3200 struct i40e_vsi *vsi = tx_ring->vsi;
3201 u16 i = tx_ring->next_to_clean;
3202 struct i40e_tx_buffer *tx_buf;
3203 struct i40e_tx_desc *tx_desc;
3205 tx_buf = &tx_ring->tx_bi[i];
3206 tx_desc = I40E_TX_DESC(tx_ring, i);
3207 i -= tx_ring->count;
3210 struct i40e_tx_desc *eop_desc = tx_buf->next_to_watch;
3212 /* if next_to_watch is not set then there is no work pending */
3216 /* prevent any other reads prior to eop_desc */
3217 read_barrier_depends();
3219 /* if the descriptor isn't done, no work yet to do */
3220 if (!(eop_desc->cmd_type_offset_bsz &
3221 cpu_to_le64(I40E_TX_DESC_DTYPE_DESC_DONE)))
3224 /* clear next_to_watch to prevent false hangs */
3225 tx_buf->next_to_watch = NULL;
3227 tx_desc->buffer_addr = 0;
3228 tx_desc->cmd_type_offset_bsz = 0;
3229 /* move past filter desc */
3234 i -= tx_ring->count;
3235 tx_buf = tx_ring->tx_bi;
3236 tx_desc = I40E_TX_DESC(tx_ring, 0);
3238 /* unmap skb header data */
3239 dma_unmap_single(tx_ring->dev,
3240 dma_unmap_addr(tx_buf, dma),
3241 dma_unmap_len(tx_buf, len),
3243 if (tx_buf->tx_flags & I40E_TX_FLAGS_FD_SB)
3244 kfree(tx_buf->raw_buf);
3246 tx_buf->raw_buf = NULL;
3247 tx_buf->tx_flags = 0;
3248 tx_buf->next_to_watch = NULL;
3249 dma_unmap_len_set(tx_buf, len, 0);
3250 tx_desc->buffer_addr = 0;
3251 tx_desc->cmd_type_offset_bsz = 0;
3253 /* move us past the eop_desc for start of next FD desc */
3258 i -= tx_ring->count;
3259 tx_buf = tx_ring->tx_bi;
3260 tx_desc = I40E_TX_DESC(tx_ring, 0);
3263 /* update budget accounting */
3265 } while (likely(budget));
3267 i += tx_ring->count;
3268 tx_ring->next_to_clean = i;
3270 if (vsi->back->flags & I40E_FLAG_MSIX_ENABLED) {
3271 i40e_irq_dynamic_enable(vsi,
3272 tx_ring->q_vector->v_idx + vsi->base_vector);
3278 * i40e_fdir_clean_ring - Interrupt Handler for FDIR SB ring
3279 * @irq: interrupt number
3280 * @data: pointer to a q_vector
3282 static irqreturn_t i40e_fdir_clean_ring(int irq, void *data)
3284 struct i40e_q_vector *q_vector = data;
3285 struct i40e_vsi *vsi;
3287 if (!q_vector->tx.ring)
3290 vsi = q_vector->tx.ring->vsi;
3291 i40e_clean_fdir_tx_irq(q_vector->tx.ring, vsi->work_limit);
3297 * i40e_map_vector_to_qp - Assigns the queue pair to the vector
3298 * @vsi: the VSI being configured
3299 * @v_idx: vector index
3300 * @qp_idx: queue pair index
3302 static void map_vector_to_qp(struct i40e_vsi *vsi, int v_idx, int qp_idx)
3304 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
3305 struct i40e_ring *tx_ring = vsi->tx_rings[qp_idx];
3306 struct i40e_ring *rx_ring = vsi->rx_rings[qp_idx];
3308 tx_ring->q_vector = q_vector;
3309 tx_ring->next = q_vector->tx.ring;
3310 q_vector->tx.ring = tx_ring;
3311 q_vector->tx.count++;
3313 rx_ring->q_vector = q_vector;
3314 rx_ring->next = q_vector->rx.ring;
3315 q_vector->rx.ring = rx_ring;
3316 q_vector->rx.count++;
3320 * i40e_vsi_map_rings_to_vectors - Maps descriptor rings to vectors
3321 * @vsi: the VSI being configured
3323 * This function maps descriptor rings to the queue-specific vectors
3324 * we were allotted through the MSI-X enabling code. Ideally, we'd have
3325 * one vector per queue pair, but on a constrained vector budget, we
3326 * group the queue pairs as "efficiently" as possible.
3328 static void i40e_vsi_map_rings_to_vectors(struct i40e_vsi *vsi)
3330 int qp_remaining = vsi->num_queue_pairs;
3331 int q_vectors = vsi->num_q_vectors;
3336 /* If we don't have enough vectors for a 1-to-1 mapping, we'll have to
3337 * group them so there are multiple queues per vector.
3338 * It is also important to go through all the vectors available to be
3339 * sure that if we don't use all the vectors, that the remaining vectors
3340 * are cleared. This is especially important when decreasing the
3341 * number of queues in use.
3343 for (; v_start < q_vectors; v_start++) {
3344 struct i40e_q_vector *q_vector = vsi->q_vectors[v_start];
3346 num_ringpairs = DIV_ROUND_UP(qp_remaining, q_vectors - v_start);
3348 q_vector->num_ringpairs = num_ringpairs;
3350 q_vector->rx.count = 0;
3351 q_vector->tx.count = 0;
3352 q_vector->rx.ring = NULL;
3353 q_vector->tx.ring = NULL;
3355 while (num_ringpairs--) {
3356 map_vector_to_qp(vsi, v_start, qp_idx);
3364 * i40e_vsi_request_irq - Request IRQ from the OS
3365 * @vsi: the VSI being configured
3366 * @basename: name for the vector
3368 static int i40e_vsi_request_irq(struct i40e_vsi *vsi, char *basename)
3370 struct i40e_pf *pf = vsi->back;
3373 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
3374 err = i40e_vsi_request_irq_msix(vsi, basename);
3375 else if (pf->flags & I40E_FLAG_MSI_ENABLED)
3376 err = request_irq(pf->pdev->irq, i40e_intr, 0,
3377 pf->misc_int_name, pf);
3379 err = request_irq(pf->pdev->irq, i40e_intr, IRQF_SHARED,
3380 pf->misc_int_name, pf);
3383 dev_info(&pf->pdev->dev, "request_irq failed, Error %d\n", err);
3388 #ifdef CONFIG_NET_POLL_CONTROLLER
3390 * i40e_netpoll - A Polling 'interrupt'handler
3391 * @netdev: network interface device structure
3393 * This is used by netconsole to send skbs without having to re-enable
3394 * interrupts. It's not called while the normal interrupt routine is executing.
3397 void i40e_netpoll(struct net_device *netdev)
3399 static void i40e_netpoll(struct net_device *netdev)
3402 struct i40e_netdev_priv *np = netdev_priv(netdev);
3403 struct i40e_vsi *vsi = np->vsi;
3404 struct i40e_pf *pf = vsi->back;
3407 /* if interface is down do nothing */
3408 if (test_bit(__I40E_DOWN, &vsi->state))
3411 pf->flags |= I40E_FLAG_IN_NETPOLL;
3412 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3413 for (i = 0; i < vsi->num_q_vectors; i++)
3414 i40e_msix_clean_rings(0, vsi->q_vectors[i]);
3416 i40e_intr(pf->pdev->irq, netdev);
3418 pf->flags &= ~I40E_FLAG_IN_NETPOLL;
3423 * i40e_pf_txq_wait - Wait for a PF's Tx queue to be enabled or disabled
3424 * @pf: the PF being configured
3425 * @pf_q: the PF queue
3426 * @enable: enable or disable state of the queue
3428 * This routine will wait for the given Tx queue of the PF to reach the
3429 * enabled or disabled state.
3430 * Returns -ETIMEDOUT in case of failing to reach the requested state after
3431 * multiple retries; else will return 0 in case of success.
3433 static int i40e_pf_txq_wait(struct i40e_pf *pf, int pf_q, bool enable)
3438 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
3439 tx_reg = rd32(&pf->hw, I40E_QTX_ENA(pf_q));
3440 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3443 usleep_range(10, 20);
3445 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
3452 * i40e_vsi_control_tx - Start or stop a VSI's rings
3453 * @vsi: the VSI being configured
3454 * @enable: start or stop the rings
3456 static int i40e_vsi_control_tx(struct i40e_vsi *vsi, bool enable)
3458 struct i40e_pf *pf = vsi->back;
3459 struct i40e_hw *hw = &pf->hw;
3460 int i, j, pf_q, ret = 0;
3463 pf_q = vsi->base_queue;
3464 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
3466 /* warn the TX unit of coming changes */
3467 i40e_pre_tx_queue_cfg(&pf->hw, pf_q, enable);
3469 usleep_range(10, 20);
3471 for (j = 0; j < 50; j++) {
3472 tx_reg = rd32(hw, I40E_QTX_ENA(pf_q));
3473 if (((tx_reg >> I40E_QTX_ENA_QENA_REQ_SHIFT) & 1) ==
3474 ((tx_reg >> I40E_QTX_ENA_QENA_STAT_SHIFT) & 1))
3476 usleep_range(1000, 2000);
3478 /* Skip if the queue is already in the requested state */
3479 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3482 /* turn on/off the queue */
3484 wr32(hw, I40E_QTX_HEAD(pf_q), 0);
3485 tx_reg |= I40E_QTX_ENA_QENA_REQ_MASK;
3487 tx_reg &= ~I40E_QTX_ENA_QENA_REQ_MASK;
3490 wr32(hw, I40E_QTX_ENA(pf_q), tx_reg);
3492 /* wait for the change to finish */
3493 ret = i40e_pf_txq_wait(pf, pf_q, enable);
3495 dev_info(&pf->pdev->dev,
3496 "%s: VSI seid %d Tx ring %d %sable timeout\n",
3497 __func__, vsi->seid, pf_q,
3498 (enable ? "en" : "dis"));
3503 if (hw->revision_id == 0)
3509 * i40e_pf_rxq_wait - Wait for a PF's Rx queue to be enabled or disabled
3510 * @pf: the PF being configured
3511 * @pf_q: the PF queue
3512 * @enable: enable or disable state of the queue
3514 * This routine will wait for the given Rx queue of the PF to reach the
3515 * enabled or disabled state.
3516 * Returns -ETIMEDOUT in case of failing to reach the requested state after
3517 * multiple retries; else will return 0 in case of success.
3519 static int i40e_pf_rxq_wait(struct i40e_pf *pf, int pf_q, bool enable)
3524 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
3525 rx_reg = rd32(&pf->hw, I40E_QRX_ENA(pf_q));
3526 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3529 usleep_range(10, 20);
3531 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
3538 * i40e_vsi_control_rx - Start or stop a VSI's rings
3539 * @vsi: the VSI being configured
3540 * @enable: start or stop the rings
3542 static int i40e_vsi_control_rx(struct i40e_vsi *vsi, bool enable)
3544 struct i40e_pf *pf = vsi->back;
3545 struct i40e_hw *hw = &pf->hw;
3546 int i, j, pf_q, ret = 0;
3549 pf_q = vsi->base_queue;
3550 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
3551 for (j = 0; j < 50; j++) {
3552 rx_reg = rd32(hw, I40E_QRX_ENA(pf_q));
3553 if (((rx_reg >> I40E_QRX_ENA_QENA_REQ_SHIFT) & 1) ==
3554 ((rx_reg >> I40E_QRX_ENA_QENA_STAT_SHIFT) & 1))
3556 usleep_range(1000, 2000);
3559 /* Skip if the queue is already in the requested state */
3560 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3563 /* turn on/off the queue */
3565 rx_reg |= I40E_QRX_ENA_QENA_REQ_MASK;
3567 rx_reg &= ~I40E_QRX_ENA_QENA_REQ_MASK;
3568 wr32(hw, I40E_QRX_ENA(pf_q), rx_reg);
3570 /* wait for the change to finish */
3571 ret = i40e_pf_rxq_wait(pf, pf_q, enable);
3573 dev_info(&pf->pdev->dev,
3574 "%s: VSI seid %d Rx ring %d %sable timeout\n",
3575 __func__, vsi->seid, pf_q,
3576 (enable ? "en" : "dis"));
3585 * i40e_vsi_control_rings - Start or stop a VSI's rings
3586 * @vsi: the VSI being configured
3587 * @enable: start or stop the rings
3589 int i40e_vsi_control_rings(struct i40e_vsi *vsi, bool request)
3593 /* do rx first for enable and last for disable */
3595 ret = i40e_vsi_control_rx(vsi, request);
3598 ret = i40e_vsi_control_tx(vsi, request);
3600 /* Ignore return value, we need to shutdown whatever we can */
3601 i40e_vsi_control_tx(vsi, request);
3602 i40e_vsi_control_rx(vsi, request);
3609 * i40e_vsi_free_irq - Free the irq association with the OS
3610 * @vsi: the VSI being configured
3612 static void i40e_vsi_free_irq(struct i40e_vsi *vsi)
3614 struct i40e_pf *pf = vsi->back;
3615 struct i40e_hw *hw = &pf->hw;
3616 int base = vsi->base_vector;
3620 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3621 if (!vsi->q_vectors)
3624 if (!vsi->irqs_ready)
3627 vsi->irqs_ready = false;
3628 for (i = 0; i < vsi->num_q_vectors; i++) {
3629 u16 vector = i + base;
3631 /* free only the irqs that were actually requested */
3632 if (!vsi->q_vectors[i] ||
3633 !vsi->q_vectors[i]->num_ringpairs)
3636 /* clear the affinity_mask in the IRQ descriptor */
3637 irq_set_affinity_hint(pf->msix_entries[vector].vector,
3639 free_irq(pf->msix_entries[vector].vector,
3642 /* Tear down the interrupt queue link list
3644 * We know that they come in pairs and always
3645 * the Rx first, then the Tx. To clear the
3646 * link list, stick the EOL value into the
3647 * next_q field of the registers.
3649 val = rd32(hw, I40E_PFINT_LNKLSTN(vector - 1));
3650 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
3651 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
3652 val |= I40E_QUEUE_END_OF_LIST
3653 << I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
3654 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), val);
3656 while (qp != I40E_QUEUE_END_OF_LIST) {
3659 val = rd32(hw, I40E_QINT_RQCTL(qp));
3661 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
3662 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
3663 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3664 I40E_QINT_RQCTL_INTEVENT_MASK);
3666 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
3667 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
3669 wr32(hw, I40E_QINT_RQCTL(qp), val);
3671 val = rd32(hw, I40E_QINT_TQCTL(qp));
3673 next = (val & I40E_QINT_TQCTL_NEXTQ_INDX_MASK)
3674 >> I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT;
3676 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
3677 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
3678 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3679 I40E_QINT_TQCTL_INTEVENT_MASK);
3681 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
3682 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
3684 wr32(hw, I40E_QINT_TQCTL(qp), val);
3689 free_irq(pf->pdev->irq, pf);
3691 val = rd32(hw, I40E_PFINT_LNKLST0);
3692 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
3693 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
3694 val |= I40E_QUEUE_END_OF_LIST
3695 << I40E_PFINT_LNKLST0_FIRSTQ_INDX_SHIFT;
3696 wr32(hw, I40E_PFINT_LNKLST0, val);
3698 val = rd32(hw, I40E_QINT_RQCTL(qp));
3699 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
3700 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
3701 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3702 I40E_QINT_RQCTL_INTEVENT_MASK);
3704 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
3705 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
3707 wr32(hw, I40E_QINT_RQCTL(qp), val);
3709 val = rd32(hw, I40E_QINT_TQCTL(qp));
3711 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
3712 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
3713 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3714 I40E_QINT_TQCTL_INTEVENT_MASK);
3716 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
3717 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
3719 wr32(hw, I40E_QINT_TQCTL(qp), val);
3724 * i40e_free_q_vector - Free memory allocated for specific interrupt vector
3725 * @vsi: the VSI being configured
3726 * @v_idx: Index of vector to be freed
3728 * This function frees the memory allocated to the q_vector. In addition if
3729 * NAPI is enabled it will delete any references to the NAPI struct prior
3730 * to freeing the q_vector.
3732 static void i40e_free_q_vector(struct i40e_vsi *vsi, int v_idx)
3734 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
3735 struct i40e_ring *ring;
3740 /* disassociate q_vector from rings */
3741 i40e_for_each_ring(ring, q_vector->tx)
3742 ring->q_vector = NULL;
3744 i40e_for_each_ring(ring, q_vector->rx)
3745 ring->q_vector = NULL;
3747 /* only VSI w/ an associated netdev is set up w/ NAPI */
3749 netif_napi_del(&q_vector->napi);
3751 vsi->q_vectors[v_idx] = NULL;
3753 kfree_rcu(q_vector, rcu);
3757 * i40e_vsi_free_q_vectors - Free memory allocated for interrupt vectors
3758 * @vsi: the VSI being un-configured
3760 * This frees the memory allocated to the q_vectors and
3761 * deletes references to the NAPI struct.
3763 static void i40e_vsi_free_q_vectors(struct i40e_vsi *vsi)
3767 for (v_idx = 0; v_idx < vsi->num_q_vectors; v_idx++)
3768 i40e_free_q_vector(vsi, v_idx);
3772 * i40e_reset_interrupt_capability - Disable interrupt setup in OS
3773 * @pf: board private structure
3775 static void i40e_reset_interrupt_capability(struct i40e_pf *pf)
3777 /* If we're in Legacy mode, the interrupt was cleaned in vsi_close */
3778 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3779 pci_disable_msix(pf->pdev);
3780 kfree(pf->msix_entries);
3781 pf->msix_entries = NULL;
3782 } else if (pf->flags & I40E_FLAG_MSI_ENABLED) {
3783 pci_disable_msi(pf->pdev);
3785 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED);
3789 * i40e_clear_interrupt_scheme - Clear the current interrupt scheme settings
3790 * @pf: board private structure
3792 * We go through and clear interrupt specific resources and reset the structure
3793 * to pre-load conditions
3795 static void i40e_clear_interrupt_scheme(struct i40e_pf *pf)
3799 i40e_put_lump(pf->irq_pile, 0, I40E_PILE_VALID_BIT-1);
3800 for (i = 0; i < pf->num_alloc_vsi; i++)
3802 i40e_vsi_free_q_vectors(pf->vsi[i]);
3803 i40e_reset_interrupt_capability(pf);
3807 * i40e_napi_enable_all - Enable NAPI for all q_vectors in the VSI
3808 * @vsi: the VSI being configured
3810 static void i40e_napi_enable_all(struct i40e_vsi *vsi)
3817 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++)
3818 napi_enable(&vsi->q_vectors[q_idx]->napi);
3822 * i40e_napi_disable_all - Disable NAPI for all q_vectors in the VSI
3823 * @vsi: the VSI being configured
3825 static void i40e_napi_disable_all(struct i40e_vsi *vsi)
3832 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++)
3833 napi_disable(&vsi->q_vectors[q_idx]->napi);
3837 * i40e_vsi_close - Shut down a VSI
3838 * @vsi: the vsi to be quelled
3840 static void i40e_vsi_close(struct i40e_vsi *vsi)
3842 if (!test_and_set_bit(__I40E_DOWN, &vsi->state))
3844 i40e_vsi_free_irq(vsi);
3845 i40e_vsi_free_tx_resources(vsi);
3846 i40e_vsi_free_rx_resources(vsi);
3850 * i40e_quiesce_vsi - Pause a given VSI
3851 * @vsi: the VSI being paused
3853 static void i40e_quiesce_vsi(struct i40e_vsi *vsi)
3855 if (test_bit(__I40E_DOWN, &vsi->state))
3858 set_bit(__I40E_NEEDS_RESTART, &vsi->state);
3859 if (vsi->netdev && netif_running(vsi->netdev)) {
3860 vsi->netdev->netdev_ops->ndo_stop(vsi->netdev);
3862 i40e_vsi_close(vsi);
3867 * i40e_unquiesce_vsi - Resume a given VSI
3868 * @vsi: the VSI being resumed
3870 static void i40e_unquiesce_vsi(struct i40e_vsi *vsi)
3872 if (!test_bit(__I40E_NEEDS_RESTART, &vsi->state))
3875 clear_bit(__I40E_NEEDS_RESTART, &vsi->state);
3876 if (vsi->netdev && netif_running(vsi->netdev))
3877 vsi->netdev->netdev_ops->ndo_open(vsi->netdev);
3879 i40e_vsi_open(vsi); /* this clears the DOWN bit */
3883 * i40e_pf_quiesce_all_vsi - Pause all VSIs on a PF
3886 static void i40e_pf_quiesce_all_vsi(struct i40e_pf *pf)
3890 for (v = 0; v < pf->num_alloc_vsi; v++) {
3892 i40e_quiesce_vsi(pf->vsi[v]);
3897 * i40e_pf_unquiesce_all_vsi - Resume all VSIs on a PF
3900 static void i40e_pf_unquiesce_all_vsi(struct i40e_pf *pf)
3904 for (v = 0; v < pf->num_alloc_vsi; v++) {
3906 i40e_unquiesce_vsi(pf->vsi[v]);
3911 * i40e_dcb_get_num_tc - Get the number of TCs from DCBx config
3912 * @dcbcfg: the corresponding DCBx configuration structure
3914 * Return the number of TCs from given DCBx configuration
3916 static u8 i40e_dcb_get_num_tc(struct i40e_dcbx_config *dcbcfg)
3921 /* Scan the ETS Config Priority Table to find
3922 * traffic class enabled for a given priority
3923 * and use the traffic class index to get the
3924 * number of traffic classes enabled
3926 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
3927 if (dcbcfg->etscfg.prioritytable[i] > num_tc)
3928 num_tc = dcbcfg->etscfg.prioritytable[i];
3931 /* Traffic class index starts from zero so
3932 * increment to return the actual count
3938 * i40e_dcb_get_enabled_tc - Get enabled traffic classes
3939 * @dcbcfg: the corresponding DCBx configuration structure
3941 * Query the current DCB configuration and return the number of
3942 * traffic classes enabled from the given DCBX config
3944 static u8 i40e_dcb_get_enabled_tc(struct i40e_dcbx_config *dcbcfg)
3946 u8 num_tc = i40e_dcb_get_num_tc(dcbcfg);
3950 for (i = 0; i < num_tc; i++)
3951 enabled_tc |= 1 << i;
3957 * i40e_pf_get_num_tc - Get enabled traffic classes for PF
3958 * @pf: PF being queried
3960 * Return number of traffic classes enabled for the given PF
3962 static u8 i40e_pf_get_num_tc(struct i40e_pf *pf)
3964 struct i40e_hw *hw = &pf->hw;
3967 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
3969 /* If DCB is not enabled then always in single TC */
3970 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
3973 /* MFP mode return count of enabled TCs for this PF */
3974 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
3975 enabled_tc = pf->hw.func_caps.enabled_tcmap;
3976 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
3977 if (enabled_tc & (1 << i))
3983 /* SFP mode will be enabled for all TCs on port */
3984 return i40e_dcb_get_num_tc(dcbcfg);
3988 * i40e_pf_get_default_tc - Get bitmap for first enabled TC
3989 * @pf: PF being queried
3991 * Return a bitmap for first enabled traffic class for this PF.
3993 static u8 i40e_pf_get_default_tc(struct i40e_pf *pf)
3995 u8 enabled_tc = pf->hw.func_caps.enabled_tcmap;
3999 return 0x1; /* TC0 */
4001 /* Find the first enabled TC */
4002 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4003 if (enabled_tc & (1 << i))
4011 * i40e_pf_get_pf_tc_map - Get bitmap for enabled traffic classes
4012 * @pf: PF being queried
4014 * Return a bitmap for enabled traffic classes for this PF.
4016 static u8 i40e_pf_get_tc_map(struct i40e_pf *pf)
4018 /* If DCB is not enabled for this PF then just return default TC */
4019 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
4020 return i40e_pf_get_default_tc(pf);
4022 /* MFP mode will have enabled TCs set by FW */
4023 if (pf->flags & I40E_FLAG_MFP_ENABLED)
4024 return pf->hw.func_caps.enabled_tcmap;
4026 /* SFP mode we want PF to be enabled for all TCs */
4027 return i40e_dcb_get_enabled_tc(&pf->hw.local_dcbx_config);
4031 * i40e_vsi_get_bw_info - Query VSI BW Information
4032 * @vsi: the VSI being queried
4034 * Returns 0 on success, negative value on failure
4036 static int i40e_vsi_get_bw_info(struct i40e_vsi *vsi)
4038 struct i40e_aqc_query_vsi_ets_sla_config_resp bw_ets_config = {0};
4039 struct i40e_aqc_query_vsi_bw_config_resp bw_config = {0};
4040 struct i40e_pf *pf = vsi->back;
4041 struct i40e_hw *hw = &pf->hw;
4046 /* Get the VSI level BW configuration */
4047 aq_ret = i40e_aq_query_vsi_bw_config(hw, vsi->seid, &bw_config, NULL);
4049 dev_info(&pf->pdev->dev,
4050 "couldn't get pf vsi bw config, err %d, aq_err %d\n",
4051 aq_ret, pf->hw.aq.asq_last_status);
4055 /* Get the VSI level BW configuration per TC */
4056 aq_ret = i40e_aq_query_vsi_ets_sla_config(hw, vsi->seid, &bw_ets_config,
4059 dev_info(&pf->pdev->dev,
4060 "couldn't get pf vsi ets bw config, err %d, aq_err %d\n",
4061 aq_ret, pf->hw.aq.asq_last_status);
4065 if (bw_config.tc_valid_bits != bw_ets_config.tc_valid_bits) {
4066 dev_info(&pf->pdev->dev,
4067 "Enabled TCs mismatch from querying VSI BW info 0x%08x 0x%08x\n",
4068 bw_config.tc_valid_bits,
4069 bw_ets_config.tc_valid_bits);
4070 /* Still continuing */
4073 vsi->bw_limit = le16_to_cpu(bw_config.port_bw_limit);
4074 vsi->bw_max_quanta = bw_config.max_bw;
4075 tc_bw_max = le16_to_cpu(bw_ets_config.tc_bw_max[0]) |
4076 (le16_to_cpu(bw_ets_config.tc_bw_max[1]) << 16);
4077 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4078 vsi->bw_ets_share_credits[i] = bw_ets_config.share_credits[i];
4079 vsi->bw_ets_limit_credits[i] =
4080 le16_to_cpu(bw_ets_config.credits[i]);
4081 /* 3 bits out of 4 for each TC */
4082 vsi->bw_ets_max_quanta[i] = (u8)((tc_bw_max >> (i*4)) & 0x7);
4089 * i40e_vsi_configure_bw_alloc - Configure VSI BW allocation per TC
4090 * @vsi: the VSI being configured
4091 * @enabled_tc: TC bitmap
4092 * @bw_credits: BW shared credits per TC
4094 * Returns 0 on success, negative value on failure
4096 static int i40e_vsi_configure_bw_alloc(struct i40e_vsi *vsi, u8 enabled_tc,
4099 struct i40e_aqc_configure_vsi_tc_bw_data bw_data;
4103 bw_data.tc_valid_bits = enabled_tc;
4104 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
4105 bw_data.tc_bw_credits[i] = bw_share[i];
4107 aq_ret = i40e_aq_config_vsi_tc_bw(&vsi->back->hw, vsi->seid, &bw_data,
4110 dev_info(&vsi->back->pdev->dev,
4111 "AQ command Config VSI BW allocation per TC failed = %d\n",
4112 vsi->back->hw.aq.asq_last_status);
4116 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
4117 vsi->info.qs_handle[i] = bw_data.qs_handles[i];
4123 * i40e_vsi_config_netdev_tc - Setup the netdev TC configuration
4124 * @vsi: the VSI being configured
4125 * @enabled_tc: TC map to be enabled
4128 static void i40e_vsi_config_netdev_tc(struct i40e_vsi *vsi, u8 enabled_tc)
4130 struct net_device *netdev = vsi->netdev;
4131 struct i40e_pf *pf = vsi->back;
4132 struct i40e_hw *hw = &pf->hw;
4135 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4141 netdev_reset_tc(netdev);
4145 /* Set up actual enabled TCs on the VSI */
4146 if (netdev_set_num_tc(netdev, vsi->tc_config.numtc))
4149 /* set per TC queues for the VSI */
4150 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4151 /* Only set TC queues for enabled tcs
4153 * e.g. For a VSI that has TC0 and TC3 enabled the
4154 * enabled_tc bitmap would be 0x00001001; the driver
4155 * will set the numtc for netdev as 2 that will be
4156 * referenced by the netdev layer as TC 0 and 1.
4158 if (vsi->tc_config.enabled_tc & (1 << i))
4159 netdev_set_tc_queue(netdev,
4160 vsi->tc_config.tc_info[i].netdev_tc,
4161 vsi->tc_config.tc_info[i].qcount,
4162 vsi->tc_config.tc_info[i].qoffset);
4165 /* Assign UP2TC map for the VSI */
4166 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
4167 /* Get the actual TC# for the UP */
4168 u8 ets_tc = dcbcfg->etscfg.prioritytable[i];
4169 /* Get the mapped netdev TC# for the UP */
4170 netdev_tc = vsi->tc_config.tc_info[ets_tc].netdev_tc;
4171 netdev_set_prio_tc_map(netdev, i, netdev_tc);
4176 * i40e_vsi_update_queue_map - Update our copy of VSi info with new queue map
4177 * @vsi: the VSI being configured
4178 * @ctxt: the ctxt buffer returned from AQ VSI update param command
4180 static void i40e_vsi_update_queue_map(struct i40e_vsi *vsi,
4181 struct i40e_vsi_context *ctxt)
4183 /* copy just the sections touched not the entire info
4184 * since not all sections are valid as returned by
4187 vsi->info.mapping_flags = ctxt->info.mapping_flags;
4188 memcpy(&vsi->info.queue_mapping,
4189 &ctxt->info.queue_mapping, sizeof(vsi->info.queue_mapping));
4190 memcpy(&vsi->info.tc_mapping, ctxt->info.tc_mapping,
4191 sizeof(vsi->info.tc_mapping));
4195 * i40e_vsi_config_tc - Configure VSI Tx Scheduler for given TC map
4196 * @vsi: VSI to be configured
4197 * @enabled_tc: TC bitmap
4199 * This configures a particular VSI for TCs that are mapped to the
4200 * given TC bitmap. It uses default bandwidth share for TCs across
4201 * VSIs to configure TC for a particular VSI.
4204 * It is expected that the VSI queues have been quisced before calling
4207 static int i40e_vsi_config_tc(struct i40e_vsi *vsi, u8 enabled_tc)
4209 u8 bw_share[I40E_MAX_TRAFFIC_CLASS] = {0};
4210 struct i40e_vsi_context ctxt;
4214 /* Check if enabled_tc is same as existing or new TCs */
4215 if (vsi->tc_config.enabled_tc == enabled_tc)
4218 /* Enable ETS TCs with equal BW Share for now across all VSIs */
4219 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4220 if (enabled_tc & (1 << i))
4224 ret = i40e_vsi_configure_bw_alloc(vsi, enabled_tc, bw_share);
4226 dev_info(&vsi->back->pdev->dev,
4227 "Failed configuring TC map %d for VSI %d\n",
4228 enabled_tc, vsi->seid);
4232 /* Update Queue Pairs Mapping for currently enabled UPs */
4233 ctxt.seid = vsi->seid;
4234 ctxt.pf_num = vsi->back->hw.pf_id;
4236 ctxt.uplink_seid = vsi->uplink_seid;
4237 memcpy(&ctxt.info, &vsi->info, sizeof(vsi->info));
4238 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
4240 /* Update the VSI after updating the VSI queue-mapping information */
4241 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
4243 dev_info(&vsi->back->pdev->dev,
4244 "update vsi failed, aq_err=%d\n",
4245 vsi->back->hw.aq.asq_last_status);
4248 /* update the local VSI info with updated queue map */
4249 i40e_vsi_update_queue_map(vsi, &ctxt);
4250 vsi->info.valid_sections = 0;
4252 /* Update current VSI BW information */
4253 ret = i40e_vsi_get_bw_info(vsi);
4255 dev_info(&vsi->back->pdev->dev,
4256 "Failed updating vsi bw info, aq_err=%d\n",
4257 vsi->back->hw.aq.asq_last_status);
4261 /* Update the netdev TC setup */
4262 i40e_vsi_config_netdev_tc(vsi, enabled_tc);
4268 * i40e_veb_config_tc - Configure TCs for given VEB
4270 * @enabled_tc: TC bitmap
4272 * Configures given TC bitmap for VEB (switching) element
4274 int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc)
4276 struct i40e_aqc_configure_switching_comp_bw_config_data bw_data = {0};
4277 struct i40e_pf *pf = veb->pf;
4281 /* No TCs or already enabled TCs just return */
4282 if (!enabled_tc || veb->enabled_tc == enabled_tc)
4285 bw_data.tc_valid_bits = enabled_tc;
4286 /* bw_data.absolute_credits is not set (relative) */
4288 /* Enable ETS TCs with equal BW Share for now */
4289 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4290 if (enabled_tc & (1 << i))
4291 bw_data.tc_bw_share_credits[i] = 1;
4294 ret = i40e_aq_config_switch_comp_bw_config(&pf->hw, veb->seid,
4297 dev_info(&pf->pdev->dev,
4298 "veb bw config failed, aq_err=%d\n",
4299 pf->hw.aq.asq_last_status);
4303 /* Update the BW information */
4304 ret = i40e_veb_get_bw_info(veb);
4306 dev_info(&pf->pdev->dev,
4307 "Failed getting veb bw config, aq_err=%d\n",
4308 pf->hw.aq.asq_last_status);
4315 #ifdef CONFIG_I40E_DCB
4317 * i40e_dcb_reconfigure - Reconfigure all VEBs and VSIs
4320 * Reconfigure VEB/VSIs on a given PF; it is assumed that
4321 * the caller would've quiesce all the VSIs before calling
4324 static void i40e_dcb_reconfigure(struct i40e_pf *pf)
4330 /* Enable the TCs available on PF to all VEBs */
4331 tc_map = i40e_pf_get_tc_map(pf);
4332 for (v = 0; v < I40E_MAX_VEB; v++) {
4335 ret = i40e_veb_config_tc(pf->veb[v], tc_map);
4337 dev_info(&pf->pdev->dev,
4338 "Failed configuring TC for VEB seid=%d\n",
4340 /* Will try to configure as many components */
4344 /* Update each VSI */
4345 for (v = 0; v < pf->num_alloc_vsi; v++) {
4349 /* - Enable all TCs for the LAN VSI
4351 * - For FCoE VSI only enable the TC configured
4352 * as per the APP TLV
4354 * - For all others keep them at TC0 for now
4356 if (v == pf->lan_vsi)
4357 tc_map = i40e_pf_get_tc_map(pf);
4359 tc_map = i40e_pf_get_default_tc(pf);
4361 if (pf->vsi[v]->type == I40E_VSI_FCOE)
4362 tc_map = i40e_get_fcoe_tc_map(pf);
4363 #endif /* #ifdef I40E_FCOE */
4365 ret = i40e_vsi_config_tc(pf->vsi[v], tc_map);
4367 dev_info(&pf->pdev->dev,
4368 "Failed configuring TC for VSI seid=%d\n",
4370 /* Will try to configure as many components */
4372 /* Re-configure VSI vectors based on updated TC map */
4373 i40e_vsi_map_rings_to_vectors(pf->vsi[v]);
4374 if (pf->vsi[v]->netdev)
4375 i40e_dcbnl_set_all(pf->vsi[v]);
4381 * i40e_init_pf_dcb - Initialize DCB configuration
4382 * @pf: PF being configured
4384 * Query the current DCB configuration and cache it
4385 * in the hardware structure
4387 static int i40e_init_pf_dcb(struct i40e_pf *pf)
4389 struct i40e_hw *hw = &pf->hw;
4392 if (pf->hw.func_caps.npar_enable)
4395 /* Get the initial DCB configuration */
4396 err = i40e_init_dcb(hw);
4398 /* Device/Function is not DCBX capable */
4399 if ((!hw->func_caps.dcb) ||
4400 (hw->dcbx_status == I40E_DCBX_STATUS_DISABLED)) {
4401 dev_info(&pf->pdev->dev,
4402 "DCBX offload is not supported or is disabled for this PF.\n");
4404 if (pf->flags & I40E_FLAG_MFP_ENABLED)
4408 /* When status is not DISABLED then DCBX in FW */
4409 pf->dcbx_cap = DCB_CAP_DCBX_LLD_MANAGED |
4410 DCB_CAP_DCBX_VER_IEEE;
4412 pf->flags |= I40E_FLAG_DCB_CAPABLE;
4413 /* Enable DCB tagging only when more than one TC */
4414 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
4415 pf->flags |= I40E_FLAG_DCB_ENABLED;
4418 dev_info(&pf->pdev->dev, "AQ Querying DCB configuration failed: %d\n",
4419 pf->hw.aq.asq_last_status);
4425 #endif /* CONFIG_I40E_DCB */
4426 #define SPEED_SIZE 14
4429 * i40e_print_link_message - print link up or down
4430 * @vsi: the VSI for which link needs a message
4432 static void i40e_print_link_message(struct i40e_vsi *vsi, bool isup)
4434 char speed[SPEED_SIZE] = "Unknown";
4435 char fc[FC_SIZE] = "RX/TX";
4438 netdev_info(vsi->netdev, "NIC Link is Down\n");
4442 switch (vsi->back->hw.phy.link_info.link_speed) {
4443 case I40E_LINK_SPEED_40GB:
4444 strlcpy(speed, "40 Gbps", SPEED_SIZE);
4446 case I40E_LINK_SPEED_10GB:
4447 strlcpy(speed, "10 Gbps", SPEED_SIZE);
4449 case I40E_LINK_SPEED_1GB:
4450 strlcpy(speed, "1000 Mbps", SPEED_SIZE);
4452 case I40E_LINK_SPEED_100MB:
4453 strncpy(speed, "100 Mbps", SPEED_SIZE);
4459 switch (vsi->back->hw.fc.current_mode) {
4461 strlcpy(fc, "RX/TX", FC_SIZE);
4463 case I40E_FC_TX_PAUSE:
4464 strlcpy(fc, "TX", FC_SIZE);
4466 case I40E_FC_RX_PAUSE:
4467 strlcpy(fc, "RX", FC_SIZE);
4470 strlcpy(fc, "None", FC_SIZE);
4474 netdev_info(vsi->netdev, "NIC Link is Up %s Full Duplex, Flow Control: %s\n",
4479 * i40e_up_complete - Finish the last steps of bringing up a connection
4480 * @vsi: the VSI being configured
4482 static int i40e_up_complete(struct i40e_vsi *vsi)
4484 struct i40e_pf *pf = vsi->back;
4487 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
4488 i40e_vsi_configure_msix(vsi);
4490 i40e_configure_msi_and_legacy(vsi);
4493 err = i40e_vsi_control_rings(vsi, true);
4497 clear_bit(__I40E_DOWN, &vsi->state);
4498 i40e_napi_enable_all(vsi);
4499 i40e_vsi_enable_irq(vsi);
4501 if ((pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP) &&
4503 i40e_print_link_message(vsi, true);
4504 netif_tx_start_all_queues(vsi->netdev);
4505 netif_carrier_on(vsi->netdev);
4506 } else if (vsi->netdev) {
4507 i40e_print_link_message(vsi, false);
4508 /* need to check for qualified module here*/
4509 if ((pf->hw.phy.link_info.link_info &
4510 I40E_AQ_MEDIA_AVAILABLE) &&
4511 (!(pf->hw.phy.link_info.an_info &
4512 I40E_AQ_QUALIFIED_MODULE)))
4513 netdev_err(vsi->netdev,
4514 "the driver failed to link because an unqualified module was detected.");
4517 /* replay FDIR SB filters */
4518 if (vsi->type == I40E_VSI_FDIR) {
4519 /* reset fd counters */
4520 pf->fd_add_err = pf->fd_atr_cnt = 0;
4521 if (pf->fd_tcp_rule > 0) {
4522 pf->flags &= ~I40E_FLAG_FD_ATR_ENABLED;
4523 dev_info(&pf->pdev->dev, "Forcing ATR off, sideband rules for TCP/IPv4 exist\n");
4524 pf->fd_tcp_rule = 0;
4526 i40e_fdir_filter_restore(vsi);
4528 i40e_service_event_schedule(pf);
4534 * i40e_vsi_reinit_locked - Reset the VSI
4535 * @vsi: the VSI being configured
4537 * Rebuild the ring structs after some configuration
4538 * has changed, e.g. MTU size.
4540 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi)
4542 struct i40e_pf *pf = vsi->back;
4544 WARN_ON(in_interrupt());
4545 while (test_and_set_bit(__I40E_CONFIG_BUSY, &pf->state))
4546 usleep_range(1000, 2000);
4549 /* Give a VF some time to respond to the reset. The
4550 * two second wait is based upon the watchdog cycle in
4553 if (vsi->type == I40E_VSI_SRIOV)
4556 clear_bit(__I40E_CONFIG_BUSY, &pf->state);
4560 * i40e_up - Bring the connection back up after being down
4561 * @vsi: the VSI being configured
4563 int i40e_up(struct i40e_vsi *vsi)
4567 err = i40e_vsi_configure(vsi);
4569 err = i40e_up_complete(vsi);
4575 * i40e_down - Shutdown the connection processing
4576 * @vsi: the VSI being stopped
4578 void i40e_down(struct i40e_vsi *vsi)
4582 /* It is assumed that the caller of this function
4583 * sets the vsi->state __I40E_DOWN bit.
4586 netif_carrier_off(vsi->netdev);
4587 netif_tx_disable(vsi->netdev);
4589 i40e_vsi_disable_irq(vsi);
4590 i40e_vsi_control_rings(vsi, false);
4591 i40e_napi_disable_all(vsi);
4593 for (i = 0; i < vsi->num_queue_pairs; i++) {
4594 i40e_clean_tx_ring(vsi->tx_rings[i]);
4595 i40e_clean_rx_ring(vsi->rx_rings[i]);
4600 * i40e_setup_tc - configure multiple traffic classes
4601 * @netdev: net device to configure
4602 * @tc: number of traffic classes to enable
4605 int i40e_setup_tc(struct net_device *netdev, u8 tc)
4607 static int i40e_setup_tc(struct net_device *netdev, u8 tc)
4610 struct i40e_netdev_priv *np = netdev_priv(netdev);
4611 struct i40e_vsi *vsi = np->vsi;
4612 struct i40e_pf *pf = vsi->back;
4617 /* Check if DCB enabled to continue */
4618 if (!(pf->flags & I40E_FLAG_DCB_ENABLED)) {
4619 netdev_info(netdev, "DCB is not enabled for adapter\n");
4623 /* Check if MFP enabled */
4624 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
4625 netdev_info(netdev, "Configuring TC not supported in MFP mode\n");
4629 /* Check whether tc count is within enabled limit */
4630 if (tc > i40e_pf_get_num_tc(pf)) {
4631 netdev_info(netdev, "TC count greater than enabled on link for adapter\n");
4635 /* Generate TC map for number of tc requested */
4636 for (i = 0; i < tc; i++)
4637 enabled_tc |= (1 << i);
4639 /* Requesting same TC configuration as already enabled */
4640 if (enabled_tc == vsi->tc_config.enabled_tc)
4643 /* Quiesce VSI queues */
4644 i40e_quiesce_vsi(vsi);
4646 /* Configure VSI for enabled TCs */
4647 ret = i40e_vsi_config_tc(vsi, enabled_tc);
4649 netdev_info(netdev, "Failed configuring TC for VSI seid=%d\n",
4655 i40e_unquiesce_vsi(vsi);
4662 * i40e_open - Called when a network interface is made active
4663 * @netdev: network interface device structure
4665 * The open entry point is called when a network interface is made
4666 * active by the system (IFF_UP). At this point all resources needed
4667 * for transmit and receive operations are allocated, the interrupt
4668 * handler is registered with the OS, the netdev watchdog subtask is
4669 * enabled, and the stack is notified that the interface is ready.
4671 * Returns 0 on success, negative value on failure
4674 int i40e_open(struct net_device *netdev)
4676 static int i40e_open(struct net_device *netdev)
4679 struct i40e_netdev_priv *np = netdev_priv(netdev);
4680 struct i40e_vsi *vsi = np->vsi;
4681 struct i40e_pf *pf = vsi->back;
4684 /* disallow open during test or if eeprom is broken */
4685 if (test_bit(__I40E_TESTING, &pf->state) ||
4686 test_bit(__I40E_BAD_EEPROM, &pf->state))
4689 netif_carrier_off(netdev);
4691 err = i40e_vsi_open(vsi);
4695 /* configure global TSO hardware offload settings */
4696 wr32(&pf->hw, I40E_GLLAN_TSOMSK_F, be32_to_cpu(TCP_FLAG_PSH |
4697 TCP_FLAG_FIN) >> 16);
4698 wr32(&pf->hw, I40E_GLLAN_TSOMSK_M, be32_to_cpu(TCP_FLAG_PSH |
4700 TCP_FLAG_CWR) >> 16);
4701 wr32(&pf->hw, I40E_GLLAN_TSOMSK_L, be32_to_cpu(TCP_FLAG_CWR) >> 16);
4703 #ifdef CONFIG_I40E_VXLAN
4704 vxlan_get_rx_port(netdev);
4712 * @vsi: the VSI to open
4714 * Finish initialization of the VSI.
4716 * Returns 0 on success, negative value on failure
4718 int i40e_vsi_open(struct i40e_vsi *vsi)
4720 struct i40e_pf *pf = vsi->back;
4721 char int_name[IFNAMSIZ];
4724 /* allocate descriptors */
4725 err = i40e_vsi_setup_tx_resources(vsi);
4728 err = i40e_vsi_setup_rx_resources(vsi);
4732 err = i40e_vsi_configure(vsi);
4737 snprintf(int_name, sizeof(int_name) - 1, "%s-%s",
4738 dev_driver_string(&pf->pdev->dev), vsi->netdev->name);
4739 err = i40e_vsi_request_irq(vsi, int_name);
4743 /* Notify the stack of the actual queue counts. */
4744 err = netif_set_real_num_tx_queues(vsi->netdev,
4745 vsi->num_queue_pairs);
4747 goto err_set_queues;
4749 err = netif_set_real_num_rx_queues(vsi->netdev,
4750 vsi->num_queue_pairs);
4752 goto err_set_queues;
4754 } else if (vsi->type == I40E_VSI_FDIR) {
4755 snprintf(int_name, sizeof(int_name) - 1, "%s-fdir",
4756 dev_driver_string(&pf->pdev->dev));
4757 err = i40e_vsi_request_irq(vsi, int_name);
4763 err = i40e_up_complete(vsi);
4765 goto err_up_complete;
4772 i40e_vsi_free_irq(vsi);
4774 i40e_vsi_free_rx_resources(vsi);
4776 i40e_vsi_free_tx_resources(vsi);
4777 if (vsi == pf->vsi[pf->lan_vsi])
4778 i40e_do_reset(pf, (1 << __I40E_PF_RESET_REQUESTED));
4784 * i40e_fdir_filter_exit - Cleans up the Flow Director accounting
4785 * @pf: Pointer to pf
4787 * This function destroys the hlist where all the Flow Director
4788 * filters were saved.
4790 static void i40e_fdir_filter_exit(struct i40e_pf *pf)
4792 struct i40e_fdir_filter *filter;
4793 struct hlist_node *node2;
4795 hlist_for_each_entry_safe(filter, node2,
4796 &pf->fdir_filter_list, fdir_node) {
4797 hlist_del(&filter->fdir_node);
4800 pf->fdir_pf_active_filters = 0;
4804 * i40e_close - Disables a network interface
4805 * @netdev: network interface device structure
4807 * The close entry point is called when an interface is de-activated
4808 * by the OS. The hardware is still under the driver's control, but
4809 * this netdev interface is disabled.
4811 * Returns 0, this is not allowed to fail
4814 int i40e_close(struct net_device *netdev)
4816 static int i40e_close(struct net_device *netdev)
4819 struct i40e_netdev_priv *np = netdev_priv(netdev);
4820 struct i40e_vsi *vsi = np->vsi;
4822 i40e_vsi_close(vsi);
4828 * i40e_do_reset - Start a PF or Core Reset sequence
4829 * @pf: board private structure
4830 * @reset_flags: which reset is requested
4832 * The essential difference in resets is that the PF Reset
4833 * doesn't clear the packet buffers, doesn't reset the PE
4834 * firmware, and doesn't bother the other PFs on the chip.
4836 void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags)
4840 WARN_ON(in_interrupt());
4842 if (i40e_check_asq_alive(&pf->hw))
4843 i40e_vc_notify_reset(pf);
4845 /* do the biggest reset indicated */
4846 if (reset_flags & (1 << __I40E_GLOBAL_RESET_REQUESTED)) {
4848 /* Request a Global Reset
4850 * This will start the chip's countdown to the actual full
4851 * chip reset event, and a warning interrupt to be sent
4852 * to all PFs, including the requestor. Our handler
4853 * for the warning interrupt will deal with the shutdown
4854 * and recovery of the switch setup.
4856 dev_dbg(&pf->pdev->dev, "GlobalR requested\n");
4857 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
4858 val |= I40E_GLGEN_RTRIG_GLOBR_MASK;
4859 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
4861 } else if (reset_flags & (1 << __I40E_CORE_RESET_REQUESTED)) {
4863 /* Request a Core Reset
4865 * Same as Global Reset, except does *not* include the MAC/PHY
4867 dev_dbg(&pf->pdev->dev, "CoreR requested\n");
4868 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
4869 val |= I40E_GLGEN_RTRIG_CORER_MASK;
4870 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
4871 i40e_flush(&pf->hw);
4873 } else if (reset_flags & (1 << __I40E_EMP_RESET_REQUESTED)) {
4875 /* Request a Firmware Reset
4877 * Same as Global reset, plus restarting the
4878 * embedded firmware engine.
4880 /* enable EMP Reset */
4881 val = rd32(&pf->hw, I40E_GLGEN_RSTENA_EMP);
4882 val |= I40E_GLGEN_RSTENA_EMP_EMP_RST_ENA_MASK;
4883 wr32(&pf->hw, I40E_GLGEN_RSTENA_EMP, val);
4885 /* force the reset */
4886 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
4887 val |= I40E_GLGEN_RTRIG_EMPFWR_MASK;
4888 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
4889 i40e_flush(&pf->hw);
4891 } else if (reset_flags & (1 << __I40E_PF_RESET_REQUESTED)) {
4893 /* Request a PF Reset
4895 * Resets only the PF-specific registers
4897 * This goes directly to the tear-down and rebuild of
4898 * the switch, since we need to do all the recovery as
4899 * for the Core Reset.
4901 dev_dbg(&pf->pdev->dev, "PFR requested\n");
4902 i40e_handle_reset_warning(pf);
4904 } else if (reset_flags & (1 << __I40E_REINIT_REQUESTED)) {
4907 /* Find the VSI(s) that requested a re-init */
4908 dev_info(&pf->pdev->dev,
4909 "VSI reinit requested\n");
4910 for (v = 0; v < pf->num_alloc_vsi; v++) {
4911 struct i40e_vsi *vsi = pf->vsi[v];
4913 test_bit(__I40E_REINIT_REQUESTED, &vsi->state)) {
4914 i40e_vsi_reinit_locked(pf->vsi[v]);
4915 clear_bit(__I40E_REINIT_REQUESTED, &vsi->state);
4919 /* no further action needed, so return now */
4921 } else if (reset_flags & (1 << __I40E_DOWN_REQUESTED)) {
4924 /* Find the VSI(s) that needs to be brought down */
4925 dev_info(&pf->pdev->dev, "VSI down requested\n");
4926 for (v = 0; v < pf->num_alloc_vsi; v++) {
4927 struct i40e_vsi *vsi = pf->vsi[v];
4929 test_bit(__I40E_DOWN_REQUESTED, &vsi->state)) {
4930 set_bit(__I40E_DOWN, &vsi->state);
4932 clear_bit(__I40E_DOWN_REQUESTED, &vsi->state);
4936 /* no further action needed, so return now */
4939 dev_info(&pf->pdev->dev,
4940 "bad reset request 0x%08x\n", reset_flags);
4945 #ifdef CONFIG_I40E_DCB
4947 * i40e_dcb_need_reconfig - Check if DCB needs reconfig
4948 * @pf: board private structure
4949 * @old_cfg: current DCB config
4950 * @new_cfg: new DCB config
4952 bool i40e_dcb_need_reconfig(struct i40e_pf *pf,
4953 struct i40e_dcbx_config *old_cfg,
4954 struct i40e_dcbx_config *new_cfg)
4956 bool need_reconfig = false;
4958 /* Check if ETS configuration has changed */
4959 if (memcmp(&new_cfg->etscfg,
4961 sizeof(new_cfg->etscfg))) {
4962 /* If Priority Table has changed reconfig is needed */
4963 if (memcmp(&new_cfg->etscfg.prioritytable,
4964 &old_cfg->etscfg.prioritytable,
4965 sizeof(new_cfg->etscfg.prioritytable))) {
4966 need_reconfig = true;
4967 dev_dbg(&pf->pdev->dev, "ETS UP2TC changed.\n");
4970 if (memcmp(&new_cfg->etscfg.tcbwtable,
4971 &old_cfg->etscfg.tcbwtable,
4972 sizeof(new_cfg->etscfg.tcbwtable)))
4973 dev_dbg(&pf->pdev->dev, "ETS TC BW Table changed.\n");
4975 if (memcmp(&new_cfg->etscfg.tsatable,
4976 &old_cfg->etscfg.tsatable,
4977 sizeof(new_cfg->etscfg.tsatable)))
4978 dev_dbg(&pf->pdev->dev, "ETS TSA Table changed.\n");
4981 /* Check if PFC configuration has changed */
4982 if (memcmp(&new_cfg->pfc,
4984 sizeof(new_cfg->pfc))) {
4985 need_reconfig = true;
4986 dev_dbg(&pf->pdev->dev, "PFC config change detected.\n");
4989 /* Check if APP Table has changed */
4990 if (memcmp(&new_cfg->app,
4992 sizeof(new_cfg->app))) {
4993 need_reconfig = true;
4994 dev_dbg(&pf->pdev->dev, "APP Table change detected.\n");
4997 return need_reconfig;
5001 * i40e_handle_lldp_event - Handle LLDP Change MIB event
5002 * @pf: board private structure
5003 * @e: event info posted on ARQ
5005 static int i40e_handle_lldp_event(struct i40e_pf *pf,
5006 struct i40e_arq_event_info *e)
5008 struct i40e_aqc_lldp_get_mib *mib =
5009 (struct i40e_aqc_lldp_get_mib *)&e->desc.params.raw;
5010 struct i40e_hw *hw = &pf->hw;
5011 struct i40e_dcbx_config *dcbx_cfg = &hw->local_dcbx_config;
5012 struct i40e_dcbx_config tmp_dcbx_cfg;
5013 bool need_reconfig = false;
5017 /* Not DCB capable or capability disabled */
5018 if (!(pf->flags & I40E_FLAG_DCB_CAPABLE))
5021 /* Ignore if event is not for Nearest Bridge */
5022 type = ((mib->type >> I40E_AQ_LLDP_BRIDGE_TYPE_SHIFT)
5023 & I40E_AQ_LLDP_BRIDGE_TYPE_MASK);
5024 if (type != I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE)
5027 /* Check MIB Type and return if event for Remote MIB update */
5028 type = mib->type & I40E_AQ_LLDP_MIB_TYPE_MASK;
5029 if (type == I40E_AQ_LLDP_MIB_REMOTE) {
5030 /* Update the remote cached instance and return */
5031 ret = i40e_aq_get_dcb_config(hw, I40E_AQ_LLDP_MIB_REMOTE,
5032 I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE,
5033 &hw->remote_dcbx_config);
5037 /* Convert/store the DCBX data from LLDPDU temporarily */
5038 memset(&tmp_dcbx_cfg, 0, sizeof(tmp_dcbx_cfg));
5039 ret = i40e_lldp_to_dcb_config(e->msg_buf, &tmp_dcbx_cfg);
5041 /* Error in LLDPDU parsing return */
5042 dev_info(&pf->pdev->dev, "Failed parsing LLDPDU from event buffer\n");
5046 /* No change detected in DCBX configs */
5047 if (!memcmp(&tmp_dcbx_cfg, dcbx_cfg, sizeof(tmp_dcbx_cfg))) {
5048 dev_dbg(&pf->pdev->dev, "No change detected in DCBX configuration.\n");
5052 need_reconfig = i40e_dcb_need_reconfig(pf, dcbx_cfg, &tmp_dcbx_cfg);
5054 i40e_dcbnl_flush_apps(pf, &tmp_dcbx_cfg);
5056 /* Overwrite the new configuration */
5057 *dcbx_cfg = tmp_dcbx_cfg;
5062 /* Enable DCB tagging only when more than one TC */
5063 if (i40e_dcb_get_num_tc(dcbx_cfg) > 1)
5064 pf->flags |= I40E_FLAG_DCB_ENABLED;
5066 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
5068 /* Reconfiguration needed quiesce all VSIs */
5069 i40e_pf_quiesce_all_vsi(pf);
5071 /* Changes in configuration update VEB/VSI */
5072 i40e_dcb_reconfigure(pf);
5074 i40e_pf_unquiesce_all_vsi(pf);
5078 #endif /* CONFIG_I40E_DCB */
5081 * i40e_do_reset_safe - Protected reset path for userland calls.
5082 * @pf: board private structure
5083 * @reset_flags: which reset is requested
5086 void i40e_do_reset_safe(struct i40e_pf *pf, u32 reset_flags)
5089 i40e_do_reset(pf, reset_flags);
5094 * i40e_handle_lan_overflow_event - Handler for LAN queue overflow event
5095 * @pf: board private structure
5096 * @e: event info posted on ARQ
5098 * Handler for LAN Queue Overflow Event generated by the firmware for PF
5101 static void i40e_handle_lan_overflow_event(struct i40e_pf *pf,
5102 struct i40e_arq_event_info *e)
5104 struct i40e_aqc_lan_overflow *data =
5105 (struct i40e_aqc_lan_overflow *)&e->desc.params.raw;
5106 u32 queue = le32_to_cpu(data->prtdcb_rupto);
5107 u32 qtx_ctl = le32_to_cpu(data->otx_ctl);
5108 struct i40e_hw *hw = &pf->hw;
5112 dev_dbg(&pf->pdev->dev, "overflow Rx Queue Number = %d QTX_CTL=0x%08x\n",
5115 /* Queue belongs to VF, find the VF and issue VF reset */
5116 if (((qtx_ctl & I40E_QTX_CTL_PFVF_Q_MASK)
5117 >> I40E_QTX_CTL_PFVF_Q_SHIFT) == I40E_QTX_CTL_VF_QUEUE) {
5118 vf_id = (u16)((qtx_ctl & I40E_QTX_CTL_VFVM_INDX_MASK)
5119 >> I40E_QTX_CTL_VFVM_INDX_SHIFT);
5120 vf_id -= hw->func_caps.vf_base_id;
5121 vf = &pf->vf[vf_id];
5122 i40e_vc_notify_vf_reset(vf);
5123 /* Allow VF to process pending reset notification */
5125 i40e_reset_vf(vf, false);
5130 * i40e_service_event_complete - Finish up the service event
5131 * @pf: board private structure
5133 static void i40e_service_event_complete(struct i40e_pf *pf)
5135 BUG_ON(!test_bit(__I40E_SERVICE_SCHED, &pf->state));
5137 /* flush memory to make sure state is correct before next watchog */
5138 smp_mb__before_atomic();
5139 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
5143 * i40e_get_cur_guaranteed_fd_count - Get the consumed guaranteed FD filters
5144 * @pf: board private structure
5146 int i40e_get_cur_guaranteed_fd_count(struct i40e_pf *pf)
5150 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
5151 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK);
5156 * i40e_get_current_fd_count - Get the count of total FD filters programmed
5157 * @pf: board private structure
5159 int i40e_get_current_fd_count(struct i40e_pf *pf)
5162 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
5163 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK) +
5164 ((val & I40E_PFQF_FDSTAT_BEST_CNT_MASK) >>
5165 I40E_PFQF_FDSTAT_BEST_CNT_SHIFT);
5170 * i40e_fdir_check_and_reenable - Function to reenabe FD ATR or SB if disabled
5171 * @pf: board private structure
5173 void i40e_fdir_check_and_reenable(struct i40e_pf *pf)
5175 u32 fcnt_prog, fcnt_avail;
5177 if (test_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state))
5180 /* Check if, FD SB or ATR was auto disabled and if there is enough room
5183 fcnt_prog = i40e_get_cur_guaranteed_fd_count(pf);
5184 fcnt_avail = pf->fdir_pf_filter_count;
5185 if ((fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM)) ||
5186 (pf->fd_add_err == 0) ||
5187 (i40e_get_current_atr_cnt(pf) < pf->fd_atr_cnt)) {
5188 if ((pf->flags & I40E_FLAG_FD_SB_ENABLED) &&
5189 (pf->auto_disable_flags & I40E_FLAG_FD_SB_ENABLED)) {
5190 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED;
5191 dev_info(&pf->pdev->dev, "FD Sideband/ntuple is being enabled since we have space in the table now\n");
5194 /* Wait for some more space to be available to turn on ATR */
5195 if (fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM * 2)) {
5196 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
5197 (pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED)) {
5198 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
5199 dev_info(&pf->pdev->dev, "ATR is being enabled since we have space in the table now\n");
5204 #define I40E_MIN_FD_FLUSH_INTERVAL 10
5206 * i40e_fdir_flush_and_replay - Function to flush all FD filters and replay SB
5207 * @pf: board private structure
5209 static void i40e_fdir_flush_and_replay(struct i40e_pf *pf)
5211 int flush_wait_retry = 50;
5214 if (time_after(jiffies, pf->fd_flush_timestamp +
5215 (I40E_MIN_FD_FLUSH_INTERVAL * HZ))) {
5216 set_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state);
5217 pf->fd_flush_timestamp = jiffies;
5218 pf->auto_disable_flags |= I40E_FLAG_FD_SB_ENABLED;
5219 pf->flags &= ~I40E_FLAG_FD_ATR_ENABLED;
5220 /* flush all filters */
5221 wr32(&pf->hw, I40E_PFQF_CTL_1,
5222 I40E_PFQF_CTL_1_CLEARFDTABLE_MASK);
5223 i40e_flush(&pf->hw);
5227 /* Check FD flush status every 5-6msec */
5228 usleep_range(5000, 6000);
5229 reg = rd32(&pf->hw, I40E_PFQF_CTL_1);
5230 if (!(reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK))
5232 } while (flush_wait_retry--);
5233 if (reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK) {
5234 dev_warn(&pf->pdev->dev, "FD table did not flush, needs more time\n");
5236 /* replay sideband filters */
5237 i40e_fdir_filter_restore(pf->vsi[pf->lan_vsi]);
5239 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
5240 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
5241 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED;
5242 clear_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state);
5243 dev_info(&pf->pdev->dev, "FD Filter table flushed and FD-SB replayed.\n");
5249 * i40e_get_current_atr_count - Get the count of total FD ATR filters programmed
5250 * @pf: board private structure
5252 int i40e_get_current_atr_cnt(struct i40e_pf *pf)
5254 return i40e_get_current_fd_count(pf) - pf->fdir_pf_active_filters;
5257 /* We can see up to 256 filter programming desc in transit if the filters are
5258 * being applied really fast; before we see the first
5259 * filter miss error on Rx queue 0. Accumulating enough error messages before
5260 * reacting will make sure we don't cause flush too often.
5262 #define I40E_MAX_FD_PROGRAM_ERROR 256
5265 * i40e_fdir_reinit_subtask - Worker thread to reinit FDIR filter table
5266 * @pf: board private structure
5268 static void i40e_fdir_reinit_subtask(struct i40e_pf *pf)
5271 /* if interface is down do nothing */
5272 if (test_bit(__I40E_DOWN, &pf->state))
5275 if ((pf->fd_add_err >= I40E_MAX_FD_PROGRAM_ERROR) &&
5276 (i40e_get_current_atr_cnt(pf) >= pf->fd_atr_cnt) &&
5277 (i40e_get_current_atr_cnt(pf) > pf->fdir_pf_filter_count))
5278 i40e_fdir_flush_and_replay(pf);
5280 i40e_fdir_check_and_reenable(pf);
5285 * i40e_vsi_link_event - notify VSI of a link event
5286 * @vsi: vsi to be notified
5287 * @link_up: link up or down
5289 static void i40e_vsi_link_event(struct i40e_vsi *vsi, bool link_up)
5291 if (!vsi || test_bit(__I40E_DOWN, &vsi->state))
5294 switch (vsi->type) {
5299 if (!vsi->netdev || !vsi->netdev_registered)
5303 netif_carrier_on(vsi->netdev);
5304 netif_tx_wake_all_queues(vsi->netdev);
5306 netif_carrier_off(vsi->netdev);
5307 netif_tx_stop_all_queues(vsi->netdev);
5311 case I40E_VSI_SRIOV:
5314 case I40E_VSI_VMDQ2:
5316 case I40E_VSI_MIRROR:
5318 /* there is no notification for other VSIs */
5324 * i40e_veb_link_event - notify elements on the veb of a link event
5325 * @veb: veb to be notified
5326 * @link_up: link up or down
5328 static void i40e_veb_link_event(struct i40e_veb *veb, bool link_up)
5333 if (!veb || !veb->pf)
5337 /* depth first... */
5338 for (i = 0; i < I40E_MAX_VEB; i++)
5339 if (pf->veb[i] && (pf->veb[i]->uplink_seid == veb->seid))
5340 i40e_veb_link_event(pf->veb[i], link_up);
5342 /* ... now the local VSIs */
5343 for (i = 0; i < pf->num_alloc_vsi; i++)
5344 if (pf->vsi[i] && (pf->vsi[i]->uplink_seid == veb->seid))
5345 i40e_vsi_link_event(pf->vsi[i], link_up);
5349 * i40e_link_event - Update netif_carrier status
5350 * @pf: board private structure
5352 static void i40e_link_event(struct i40e_pf *pf)
5354 bool new_link, old_link;
5356 /* set this to force the get_link_status call to refresh state */
5357 pf->hw.phy.get_link_info = true;
5359 old_link = (pf->hw.phy.link_info_old.link_info & I40E_AQ_LINK_UP);
5360 new_link = i40e_get_link_status(&pf->hw);
5362 if (new_link == old_link &&
5363 new_link == netif_carrier_ok(pf->vsi[pf->lan_vsi]->netdev))
5365 if (!test_bit(__I40E_DOWN, &pf->vsi[pf->lan_vsi]->state))
5366 i40e_print_link_message(pf->vsi[pf->lan_vsi], new_link);
5368 /* Notify the base of the switch tree connected to
5369 * the link. Floating VEBs are not notified.
5371 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
5372 i40e_veb_link_event(pf->veb[pf->lan_veb], new_link);
5374 i40e_vsi_link_event(pf->vsi[pf->lan_vsi], new_link);
5377 i40e_vc_notify_link_state(pf);
5379 if (pf->flags & I40E_FLAG_PTP)
5380 i40e_ptp_set_increment(pf);
5384 * i40e_check_hang_subtask - Check for hung queues and dropped interrupts
5385 * @pf: board private structure
5387 * Set the per-queue flags to request a check for stuck queues in the irq
5388 * clean functions, then force interrupts to be sure the irq clean is called.
5390 static void i40e_check_hang_subtask(struct i40e_pf *pf)
5394 /* If we're down or resetting, just bail */
5395 if (test_bit(__I40E_CONFIG_BUSY, &pf->state))
5398 /* for each VSI/netdev
5400 * set the check flag
5402 * force an interrupt
5404 for (v = 0; v < pf->num_alloc_vsi; v++) {
5405 struct i40e_vsi *vsi = pf->vsi[v];
5409 test_bit(__I40E_DOWN, &vsi->state) ||
5410 (vsi->netdev && !netif_carrier_ok(vsi->netdev)))
5413 for (i = 0; i < vsi->num_queue_pairs; i++) {
5414 set_check_for_tx_hang(vsi->tx_rings[i]);
5415 if (test_bit(__I40E_HANG_CHECK_ARMED,
5416 &vsi->tx_rings[i]->state))
5421 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED)) {
5422 wr32(&vsi->back->hw, I40E_PFINT_DYN_CTL0,
5423 (I40E_PFINT_DYN_CTL0_INTENA_MASK |
5424 I40E_PFINT_DYN_CTL0_SWINT_TRIG_MASK));
5426 u16 vec = vsi->base_vector - 1;
5427 u32 val = (I40E_PFINT_DYN_CTLN_INTENA_MASK |
5428 I40E_PFINT_DYN_CTLN_SWINT_TRIG_MASK);
5429 for (i = 0; i < vsi->num_q_vectors; i++, vec++)
5430 wr32(&vsi->back->hw,
5431 I40E_PFINT_DYN_CTLN(vec), val);
5433 i40e_flush(&vsi->back->hw);
5439 * i40e_watchdog_subtask - Check and bring link up
5440 * @pf: board private structure
5442 static void i40e_watchdog_subtask(struct i40e_pf *pf)
5446 /* if interface is down do nothing */
5447 if (test_bit(__I40E_DOWN, &pf->state) ||
5448 test_bit(__I40E_CONFIG_BUSY, &pf->state))
5451 /* Update the stats for active netdevs so the network stack
5452 * can look at updated numbers whenever it cares to
5454 for (i = 0; i < pf->num_alloc_vsi; i++)
5455 if (pf->vsi[i] && pf->vsi[i]->netdev)
5456 i40e_update_stats(pf->vsi[i]);
5458 /* Update the stats for the active switching components */
5459 for (i = 0; i < I40E_MAX_VEB; i++)
5461 i40e_update_veb_stats(pf->veb[i]);
5463 i40e_ptp_rx_hang(pf->vsi[pf->lan_vsi]);
5467 * i40e_reset_subtask - Set up for resetting the device and driver
5468 * @pf: board private structure
5470 static void i40e_reset_subtask(struct i40e_pf *pf)
5472 u32 reset_flags = 0;
5475 if (test_bit(__I40E_REINIT_REQUESTED, &pf->state)) {
5476 reset_flags |= (1 << __I40E_REINIT_REQUESTED);
5477 clear_bit(__I40E_REINIT_REQUESTED, &pf->state);
5479 if (test_bit(__I40E_PF_RESET_REQUESTED, &pf->state)) {
5480 reset_flags |= (1 << __I40E_PF_RESET_REQUESTED);
5481 clear_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
5483 if (test_bit(__I40E_CORE_RESET_REQUESTED, &pf->state)) {
5484 reset_flags |= (1 << __I40E_CORE_RESET_REQUESTED);
5485 clear_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
5487 if (test_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state)) {
5488 reset_flags |= (1 << __I40E_GLOBAL_RESET_REQUESTED);
5489 clear_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
5491 if (test_bit(__I40E_DOWN_REQUESTED, &pf->state)) {
5492 reset_flags |= (1 << __I40E_DOWN_REQUESTED);
5493 clear_bit(__I40E_DOWN_REQUESTED, &pf->state);
5496 /* If there's a recovery already waiting, it takes
5497 * precedence before starting a new reset sequence.
5499 if (test_bit(__I40E_RESET_INTR_RECEIVED, &pf->state)) {
5500 i40e_handle_reset_warning(pf);
5504 /* If we're already down or resetting, just bail */
5506 !test_bit(__I40E_DOWN, &pf->state) &&
5507 !test_bit(__I40E_CONFIG_BUSY, &pf->state))
5508 i40e_do_reset(pf, reset_flags);
5515 * i40e_handle_link_event - Handle link event
5516 * @pf: board private structure
5517 * @e: event info posted on ARQ
5519 static void i40e_handle_link_event(struct i40e_pf *pf,
5520 struct i40e_arq_event_info *e)
5522 struct i40e_hw *hw = &pf->hw;
5523 struct i40e_aqc_get_link_status *status =
5524 (struct i40e_aqc_get_link_status *)&e->desc.params.raw;
5525 struct i40e_link_status *hw_link_info = &hw->phy.link_info;
5527 /* save off old link status information */
5528 memcpy(&pf->hw.phy.link_info_old, hw_link_info,
5529 sizeof(pf->hw.phy.link_info_old));
5531 /* Do a new status request to re-enable LSE reporting
5532 * and load new status information into the hw struct
5533 * This completely ignores any state information
5534 * in the ARQ event info, instead choosing to always
5535 * issue the AQ update link status command.
5537 i40e_link_event(pf);
5539 /* check for unqualified module, if link is down */
5540 if ((status->link_info & I40E_AQ_MEDIA_AVAILABLE) &&
5541 (!(status->an_info & I40E_AQ_QUALIFIED_MODULE)) &&
5542 (!(status->link_info & I40E_AQ_LINK_UP)))
5543 dev_err(&pf->pdev->dev,
5544 "The driver failed to link because an unqualified module was detected.\n");
5548 * i40e_clean_adminq_subtask - Clean the AdminQ rings
5549 * @pf: board private structure
5551 static void i40e_clean_adminq_subtask(struct i40e_pf *pf)
5553 struct i40e_arq_event_info event;
5554 struct i40e_hw *hw = &pf->hw;
5561 /* Do not run clean AQ when PF reset fails */
5562 if (test_bit(__I40E_RESET_FAILED, &pf->state))
5565 /* check for error indications */
5566 val = rd32(&pf->hw, pf->hw.aq.arq.len);
5568 if (val & I40E_PF_ARQLEN_ARQVFE_MASK) {
5569 dev_info(&pf->pdev->dev, "ARQ VF Error detected\n");
5570 val &= ~I40E_PF_ARQLEN_ARQVFE_MASK;
5572 if (val & I40E_PF_ARQLEN_ARQOVFL_MASK) {
5573 dev_info(&pf->pdev->dev, "ARQ Overflow Error detected\n");
5574 val &= ~I40E_PF_ARQLEN_ARQOVFL_MASK;
5576 if (val & I40E_PF_ARQLEN_ARQCRIT_MASK) {
5577 dev_info(&pf->pdev->dev, "ARQ Critical Error detected\n");
5578 val &= ~I40E_PF_ARQLEN_ARQCRIT_MASK;
5581 wr32(&pf->hw, pf->hw.aq.arq.len, val);
5583 val = rd32(&pf->hw, pf->hw.aq.asq.len);
5585 if (val & I40E_PF_ATQLEN_ATQVFE_MASK) {
5586 dev_info(&pf->pdev->dev, "ASQ VF Error detected\n");
5587 val &= ~I40E_PF_ATQLEN_ATQVFE_MASK;
5589 if (val & I40E_PF_ATQLEN_ATQOVFL_MASK) {
5590 dev_info(&pf->pdev->dev, "ASQ Overflow Error detected\n");
5591 val &= ~I40E_PF_ATQLEN_ATQOVFL_MASK;
5593 if (val & I40E_PF_ATQLEN_ATQCRIT_MASK) {
5594 dev_info(&pf->pdev->dev, "ASQ Critical Error detected\n");
5595 val &= ~I40E_PF_ATQLEN_ATQCRIT_MASK;
5598 wr32(&pf->hw, pf->hw.aq.asq.len, val);
5600 event.msg_size = I40E_MAX_AQ_BUF_SIZE;
5601 event.msg_buf = kzalloc(event.msg_size, GFP_KERNEL);
5606 event.msg_size = I40E_MAX_AQ_BUF_SIZE; /* reinit each time */
5607 ret = i40e_clean_arq_element(hw, &event, &pending);
5608 if (ret == I40E_ERR_ADMIN_QUEUE_NO_WORK)
5611 dev_info(&pf->pdev->dev, "ARQ event error %d\n", ret);
5615 opcode = le16_to_cpu(event.desc.opcode);
5618 case i40e_aqc_opc_get_link_status:
5619 i40e_handle_link_event(pf, &event);
5621 case i40e_aqc_opc_send_msg_to_pf:
5622 ret = i40e_vc_process_vf_msg(pf,
5623 le16_to_cpu(event.desc.retval),
5624 le32_to_cpu(event.desc.cookie_high),
5625 le32_to_cpu(event.desc.cookie_low),
5629 case i40e_aqc_opc_lldp_update_mib:
5630 dev_dbg(&pf->pdev->dev, "ARQ: Update LLDP MIB event received\n");
5631 #ifdef CONFIG_I40E_DCB
5633 ret = i40e_handle_lldp_event(pf, &event);
5635 #endif /* CONFIG_I40E_DCB */
5637 case i40e_aqc_opc_event_lan_overflow:
5638 dev_dbg(&pf->pdev->dev, "ARQ LAN queue overflow event received\n");
5639 i40e_handle_lan_overflow_event(pf, &event);
5641 case i40e_aqc_opc_send_msg_to_peer:
5642 dev_info(&pf->pdev->dev, "ARQ: Msg from other pf\n");
5645 dev_info(&pf->pdev->dev,
5646 "ARQ Error: Unknown event 0x%04x received\n",
5650 } while (pending && (i++ < pf->adminq_work_limit));
5652 clear_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
5653 /* re-enable Admin queue interrupt cause */
5654 val = rd32(hw, I40E_PFINT_ICR0_ENA);
5655 val |= I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
5656 wr32(hw, I40E_PFINT_ICR0_ENA, val);
5659 kfree(event.msg_buf);
5663 * i40e_verify_eeprom - make sure eeprom is good to use
5664 * @pf: board private structure
5666 static void i40e_verify_eeprom(struct i40e_pf *pf)
5670 err = i40e_diag_eeprom_test(&pf->hw);
5672 /* retry in case of garbage read */
5673 err = i40e_diag_eeprom_test(&pf->hw);
5675 dev_info(&pf->pdev->dev, "eeprom check failed (%d), Tx/Rx traffic disabled\n",
5677 set_bit(__I40E_BAD_EEPROM, &pf->state);
5681 if (!err && test_bit(__I40E_BAD_EEPROM, &pf->state)) {
5682 dev_info(&pf->pdev->dev, "eeprom check passed, Tx/Rx traffic enabled\n");
5683 clear_bit(__I40E_BAD_EEPROM, &pf->state);
5688 * i40e_reconstitute_veb - rebuild the VEB and anything connected to it
5689 * @veb: pointer to the VEB instance
5691 * This is a recursive function that first builds the attached VSIs then
5692 * recurses in to build the next layer of VEB. We track the connections
5693 * through our own index numbers because the seid's from the HW could
5694 * change across the reset.
5696 static int i40e_reconstitute_veb(struct i40e_veb *veb)
5698 struct i40e_vsi *ctl_vsi = NULL;
5699 struct i40e_pf *pf = veb->pf;
5703 /* build VSI that owns this VEB, temporarily attached to base VEB */
5704 for (v = 0; v < pf->num_alloc_vsi && !ctl_vsi; v++) {
5706 pf->vsi[v]->veb_idx == veb->idx &&
5707 pf->vsi[v]->flags & I40E_VSI_FLAG_VEB_OWNER) {
5708 ctl_vsi = pf->vsi[v];
5713 dev_info(&pf->pdev->dev,
5714 "missing owner VSI for veb_idx %d\n", veb->idx);
5716 goto end_reconstitute;
5718 if (ctl_vsi != pf->vsi[pf->lan_vsi])
5719 ctl_vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
5720 ret = i40e_add_vsi(ctl_vsi);
5722 dev_info(&pf->pdev->dev,
5723 "rebuild of owner VSI failed: %d\n", ret);
5724 goto end_reconstitute;
5726 i40e_vsi_reset_stats(ctl_vsi);
5728 /* create the VEB in the switch and move the VSI onto the VEB */
5729 ret = i40e_add_veb(veb, ctl_vsi);
5731 goto end_reconstitute;
5733 /* create the remaining VSIs attached to this VEB */
5734 for (v = 0; v < pf->num_alloc_vsi; v++) {
5735 if (!pf->vsi[v] || pf->vsi[v] == ctl_vsi)
5738 if (pf->vsi[v]->veb_idx == veb->idx) {
5739 struct i40e_vsi *vsi = pf->vsi[v];
5740 vsi->uplink_seid = veb->seid;
5741 ret = i40e_add_vsi(vsi);
5743 dev_info(&pf->pdev->dev,
5744 "rebuild of vsi_idx %d failed: %d\n",
5746 goto end_reconstitute;
5748 i40e_vsi_reset_stats(vsi);
5752 /* create any VEBs attached to this VEB - RECURSION */
5753 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
5754 if (pf->veb[veb_idx] && pf->veb[veb_idx]->veb_idx == veb->idx) {
5755 pf->veb[veb_idx]->uplink_seid = veb->seid;
5756 ret = i40e_reconstitute_veb(pf->veb[veb_idx]);
5767 * i40e_get_capabilities - get info about the HW
5768 * @pf: the PF struct
5770 static int i40e_get_capabilities(struct i40e_pf *pf)
5772 struct i40e_aqc_list_capabilities_element_resp *cap_buf;
5777 buf_len = 40 * sizeof(struct i40e_aqc_list_capabilities_element_resp);
5779 cap_buf = kzalloc(buf_len, GFP_KERNEL);
5783 /* this loads the data into the hw struct for us */
5784 err = i40e_aq_discover_capabilities(&pf->hw, cap_buf, buf_len,
5786 i40e_aqc_opc_list_func_capabilities,
5788 /* data loaded, buffer no longer needed */
5791 if (pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOMEM) {
5792 /* retry with a larger buffer */
5793 buf_len = data_size;
5794 } else if (pf->hw.aq.asq_last_status != I40E_AQ_RC_OK) {
5795 dev_info(&pf->pdev->dev,
5796 "capability discovery failed: aq=%d\n",
5797 pf->hw.aq.asq_last_status);
5802 if (((pf->hw.aq.fw_maj_ver == 2) && (pf->hw.aq.fw_min_ver < 22)) ||
5803 (pf->hw.aq.fw_maj_ver < 2)) {
5804 pf->hw.func_caps.num_msix_vectors++;
5805 pf->hw.func_caps.num_msix_vectors_vf++;
5808 if (pf->hw.debug_mask & I40E_DEBUG_USER)
5809 dev_info(&pf->pdev->dev,
5810 "pf=%d, num_vfs=%d, msix_pf=%d, msix_vf=%d, fd_g=%d, fd_b=%d, pf_max_q=%d num_vsi=%d\n",
5811 pf->hw.pf_id, pf->hw.func_caps.num_vfs,
5812 pf->hw.func_caps.num_msix_vectors,
5813 pf->hw.func_caps.num_msix_vectors_vf,
5814 pf->hw.func_caps.fd_filters_guaranteed,
5815 pf->hw.func_caps.fd_filters_best_effort,
5816 pf->hw.func_caps.num_tx_qp,
5817 pf->hw.func_caps.num_vsis);
5819 #define DEF_NUM_VSI (1 + (pf->hw.func_caps.fcoe ? 1 : 0) \
5820 + pf->hw.func_caps.num_vfs)
5821 if (pf->hw.revision_id == 0 && (DEF_NUM_VSI > pf->hw.func_caps.num_vsis)) {
5822 dev_info(&pf->pdev->dev,
5823 "got num_vsis %d, setting num_vsis to %d\n",
5824 pf->hw.func_caps.num_vsis, DEF_NUM_VSI);
5825 pf->hw.func_caps.num_vsis = DEF_NUM_VSI;
5831 static int i40e_vsi_clear(struct i40e_vsi *vsi);
5834 * i40e_fdir_sb_setup - initialize the Flow Director resources for Sideband
5835 * @pf: board private structure
5837 static void i40e_fdir_sb_setup(struct i40e_pf *pf)
5839 struct i40e_vsi *vsi;
5842 /* quick workaround for an NVM issue that leaves a critical register
5845 if (!rd32(&pf->hw, I40E_GLQF_HKEY(0))) {
5846 static const u32 hkey[] = {
5847 0xe640d33f, 0xcdfe98ab, 0x73fa7161, 0x0d7a7d36,
5848 0xeacb7d61, 0xaa4f05b6, 0x9c5c89ed, 0xfc425ddb,
5849 0xa4654832, 0xfc7461d4, 0x8f827619, 0xf5c63c21,
5852 for (i = 0; i <= I40E_GLQF_HKEY_MAX_INDEX; i++)
5853 wr32(&pf->hw, I40E_GLQF_HKEY(i), hkey[i]);
5856 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
5859 /* find existing VSI and see if it needs configuring */
5861 for (i = 0; i < pf->num_alloc_vsi; i++) {
5862 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
5868 /* create a new VSI if none exists */
5870 vsi = i40e_vsi_setup(pf, I40E_VSI_FDIR,
5871 pf->vsi[pf->lan_vsi]->seid, 0);
5873 dev_info(&pf->pdev->dev, "Couldn't create FDir VSI\n");
5874 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
5879 i40e_vsi_setup_irqhandler(vsi, i40e_fdir_clean_ring);
5883 * i40e_fdir_teardown - release the Flow Director resources
5884 * @pf: board private structure
5886 static void i40e_fdir_teardown(struct i40e_pf *pf)
5890 i40e_fdir_filter_exit(pf);
5891 for (i = 0; i < pf->num_alloc_vsi; i++) {
5892 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
5893 i40e_vsi_release(pf->vsi[i]);
5900 * i40e_prep_for_reset - prep for the core to reset
5901 * @pf: board private structure
5903 * Close up the VFs and other things in prep for pf Reset.
5905 static void i40e_prep_for_reset(struct i40e_pf *pf)
5907 struct i40e_hw *hw = &pf->hw;
5908 i40e_status ret = 0;
5911 clear_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
5912 if (test_and_set_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
5915 dev_dbg(&pf->pdev->dev, "Tearing down internal switch for reset\n");
5917 /* quiesce the VSIs and their queues that are not already DOWN */
5918 i40e_pf_quiesce_all_vsi(pf);
5920 for (v = 0; v < pf->num_alloc_vsi; v++) {
5922 pf->vsi[v]->seid = 0;
5925 i40e_shutdown_adminq(&pf->hw);
5927 /* call shutdown HMC */
5928 if (hw->hmc.hmc_obj) {
5929 ret = i40e_shutdown_lan_hmc(hw);
5931 dev_warn(&pf->pdev->dev,
5932 "shutdown_lan_hmc failed: %d\n", ret);
5937 * i40e_send_version - update firmware with driver version
5940 static void i40e_send_version(struct i40e_pf *pf)
5942 struct i40e_driver_version dv;
5944 dv.major_version = DRV_VERSION_MAJOR;
5945 dv.minor_version = DRV_VERSION_MINOR;
5946 dv.build_version = DRV_VERSION_BUILD;
5947 dv.subbuild_version = 0;
5948 strlcpy(dv.driver_string, DRV_VERSION, sizeof(dv.driver_string));
5949 i40e_aq_send_driver_version(&pf->hw, &dv, NULL);
5953 * i40e_reset_and_rebuild - reset and rebuild using a saved config
5954 * @pf: board private structure
5955 * @reinit: if the Main VSI needs to re-initialized.
5957 static void i40e_reset_and_rebuild(struct i40e_pf *pf, bool reinit)
5959 struct i40e_hw *hw = &pf->hw;
5960 u8 set_fc_aq_fail = 0;
5964 /* Now we wait for GRST to settle out.
5965 * We don't have to delete the VEBs or VSIs from the hw switch
5966 * because the reset will make them disappear.
5968 ret = i40e_pf_reset(hw);
5970 dev_info(&pf->pdev->dev, "PF reset failed, %d\n", ret);
5971 set_bit(__I40E_RESET_FAILED, &pf->state);
5972 goto clear_recovery;
5976 if (test_bit(__I40E_DOWN, &pf->state))
5977 goto clear_recovery;
5978 dev_dbg(&pf->pdev->dev, "Rebuilding internal switch\n");
5980 /* rebuild the basics for the AdminQ, HMC, and initial HW switch */
5981 ret = i40e_init_adminq(&pf->hw);
5983 dev_info(&pf->pdev->dev, "Rebuild AdminQ failed, %d\n", ret);
5984 goto clear_recovery;
5987 /* re-verify the eeprom if we just had an EMP reset */
5988 if (test_bit(__I40E_EMP_RESET_REQUESTED, &pf->state)) {
5989 clear_bit(__I40E_EMP_RESET_REQUESTED, &pf->state);
5990 i40e_verify_eeprom(pf);
5993 i40e_clear_pxe_mode(hw);
5994 ret = i40e_get_capabilities(pf);
5996 dev_info(&pf->pdev->dev, "i40e_get_capabilities failed, %d\n",
5998 goto end_core_reset;
6001 ret = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
6002 hw->func_caps.num_rx_qp,
6003 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
6005 dev_info(&pf->pdev->dev, "init_lan_hmc failed: %d\n", ret);
6006 goto end_core_reset;
6008 ret = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
6010 dev_info(&pf->pdev->dev, "configure_lan_hmc failed: %d\n", ret);
6011 goto end_core_reset;
6014 #ifdef CONFIG_I40E_DCB
6015 ret = i40e_init_pf_dcb(pf);
6017 dev_info(&pf->pdev->dev, "init_pf_dcb failed: %d\n", ret);
6018 goto end_core_reset;
6020 #endif /* CONFIG_I40E_DCB */
6022 ret = i40e_init_pf_fcoe(pf);
6024 dev_info(&pf->pdev->dev, "init_pf_fcoe failed: %d\n", ret);
6027 /* do basic switch setup */
6028 ret = i40e_setup_pf_switch(pf, reinit);
6030 goto end_core_reset;
6032 /* driver is only interested in link up/down and module qualification
6033 * reports from firmware
6035 ret = i40e_aq_set_phy_int_mask(&pf->hw,
6036 I40E_AQ_EVENT_LINK_UPDOWN |
6037 I40E_AQ_EVENT_MODULE_QUAL_FAIL, NULL);
6039 dev_info(&pf->pdev->dev, "set phy mask fail, aq_err %d\n", ret);
6041 /* make sure our flow control settings are restored */
6042 ret = i40e_set_fc(&pf->hw, &set_fc_aq_fail, true);
6044 dev_info(&pf->pdev->dev, "set fc fail, aq_err %d\n", ret);
6046 /* Rebuild the VSIs and VEBs that existed before reset.
6047 * They are still in our local switch element arrays, so only
6048 * need to rebuild the switch model in the HW.
6050 * If there were VEBs but the reconstitution failed, we'll try
6051 * try to recover minimal use by getting the basic PF VSI working.
6053 if (pf->vsi[pf->lan_vsi]->uplink_seid != pf->mac_seid) {
6054 dev_dbg(&pf->pdev->dev, "attempting to rebuild switch\n");
6055 /* find the one VEB connected to the MAC, and find orphans */
6056 for (v = 0; v < I40E_MAX_VEB; v++) {
6060 if (pf->veb[v]->uplink_seid == pf->mac_seid ||
6061 pf->veb[v]->uplink_seid == 0) {
6062 ret = i40e_reconstitute_veb(pf->veb[v]);
6067 /* If Main VEB failed, we're in deep doodoo,
6068 * so give up rebuilding the switch and set up
6069 * for minimal rebuild of PF VSI.
6070 * If orphan failed, we'll report the error
6071 * but try to keep going.
6073 if (pf->veb[v]->uplink_seid == pf->mac_seid) {
6074 dev_info(&pf->pdev->dev,
6075 "rebuild of switch failed: %d, will try to set up simple PF connection\n",
6077 pf->vsi[pf->lan_vsi]->uplink_seid
6080 } else if (pf->veb[v]->uplink_seid == 0) {
6081 dev_info(&pf->pdev->dev,
6082 "rebuild of orphan VEB failed: %d\n",
6089 if (pf->vsi[pf->lan_vsi]->uplink_seid == pf->mac_seid) {
6090 dev_dbg(&pf->pdev->dev, "attempting to rebuild PF VSI\n");
6091 /* no VEB, so rebuild only the Main VSI */
6092 ret = i40e_add_vsi(pf->vsi[pf->lan_vsi]);
6094 dev_info(&pf->pdev->dev,
6095 "rebuild of Main VSI failed: %d\n", ret);
6096 goto end_core_reset;
6101 ret = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
6103 dev_info(&pf->pdev->dev, "link restart failed, aq_err=%d\n",
6104 pf->hw.aq.asq_last_status);
6107 /* reinit the misc interrupt */
6108 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
6109 ret = i40e_setup_misc_vector(pf);
6111 /* restart the VSIs that were rebuilt and running before the reset */
6112 i40e_pf_unquiesce_all_vsi(pf);
6114 if (pf->num_alloc_vfs) {
6115 for (v = 0; v < pf->num_alloc_vfs; v++)
6116 i40e_reset_vf(&pf->vf[v], true);
6119 /* tell the firmware that we're starting */
6120 i40e_send_version(pf);
6123 clear_bit(__I40E_RESET_FAILED, &pf->state);
6125 clear_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state);
6129 * i40e_handle_reset_warning - prep for the pf to reset, reset and rebuild
6130 * @pf: board private structure
6132 * Close up the VFs and other things in prep for a Core Reset,
6133 * then get ready to rebuild the world.
6135 static void i40e_handle_reset_warning(struct i40e_pf *pf)
6137 i40e_prep_for_reset(pf);
6138 i40e_reset_and_rebuild(pf, false);
6142 * i40e_handle_mdd_event
6143 * @pf: pointer to the pf structure
6145 * Called from the MDD irq handler to identify possibly malicious vfs
6147 static void i40e_handle_mdd_event(struct i40e_pf *pf)
6149 struct i40e_hw *hw = &pf->hw;
6150 bool mdd_detected = false;
6151 bool pf_mdd_detected = false;
6156 if (!test_bit(__I40E_MDD_EVENT_PENDING, &pf->state))
6159 /* find what triggered the MDD event */
6160 reg = rd32(hw, I40E_GL_MDET_TX);
6161 if (reg & I40E_GL_MDET_TX_VALID_MASK) {
6162 u8 pf_num = (reg & I40E_GL_MDET_TX_PF_NUM_MASK) >>
6163 I40E_GL_MDET_TX_PF_NUM_SHIFT;
6164 u8 vf_num = (reg & I40E_GL_MDET_TX_VF_NUM_MASK) >>
6165 I40E_GL_MDET_TX_VF_NUM_SHIFT;
6166 u8 event = (reg & I40E_GL_MDET_TX_EVENT_MASK) >>
6167 I40E_GL_MDET_TX_EVENT_SHIFT;
6168 u8 queue = (reg & I40E_GL_MDET_TX_QUEUE_MASK) >>
6169 I40E_GL_MDET_TX_QUEUE_SHIFT;
6170 if (netif_msg_tx_err(pf))
6171 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on TX queue %d pf number 0x%02x vf number 0x%02x\n",
6172 event, queue, pf_num, vf_num);
6173 wr32(hw, I40E_GL_MDET_TX, 0xffffffff);
6174 mdd_detected = true;
6176 reg = rd32(hw, I40E_GL_MDET_RX);
6177 if (reg & I40E_GL_MDET_RX_VALID_MASK) {
6178 u8 func = (reg & I40E_GL_MDET_RX_FUNCTION_MASK) >>
6179 I40E_GL_MDET_RX_FUNCTION_SHIFT;
6180 u8 event = (reg & I40E_GL_MDET_RX_EVENT_MASK) >>
6181 I40E_GL_MDET_RX_EVENT_SHIFT;
6182 u8 queue = (reg & I40E_GL_MDET_RX_QUEUE_MASK) >>
6183 I40E_GL_MDET_RX_QUEUE_SHIFT;
6184 if (netif_msg_rx_err(pf))
6185 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on RX queue %d of function 0x%02x\n",
6186 event, queue, func);
6187 wr32(hw, I40E_GL_MDET_RX, 0xffffffff);
6188 mdd_detected = true;
6192 reg = rd32(hw, I40E_PF_MDET_TX);
6193 if (reg & I40E_PF_MDET_TX_VALID_MASK) {
6194 wr32(hw, I40E_PF_MDET_TX, 0xFFFF);
6195 dev_info(&pf->pdev->dev, "TX driver issue detected, PF reset issued\n");
6196 pf_mdd_detected = true;
6198 reg = rd32(hw, I40E_PF_MDET_RX);
6199 if (reg & I40E_PF_MDET_RX_VALID_MASK) {
6200 wr32(hw, I40E_PF_MDET_RX, 0xFFFF);
6201 dev_info(&pf->pdev->dev, "RX driver issue detected, PF reset issued\n");
6202 pf_mdd_detected = true;
6204 /* Queue belongs to the PF, initiate a reset */
6205 if (pf_mdd_detected) {
6206 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
6207 i40e_service_event_schedule(pf);
6211 /* see if one of the VFs needs its hand slapped */
6212 for (i = 0; i < pf->num_alloc_vfs && mdd_detected; i++) {
6214 reg = rd32(hw, I40E_VP_MDET_TX(i));
6215 if (reg & I40E_VP_MDET_TX_VALID_MASK) {
6216 wr32(hw, I40E_VP_MDET_TX(i), 0xFFFF);
6217 vf->num_mdd_events++;
6218 dev_info(&pf->pdev->dev, "TX driver issue detected on VF %d\n",
6222 reg = rd32(hw, I40E_VP_MDET_RX(i));
6223 if (reg & I40E_VP_MDET_RX_VALID_MASK) {
6224 wr32(hw, I40E_VP_MDET_RX(i), 0xFFFF);
6225 vf->num_mdd_events++;
6226 dev_info(&pf->pdev->dev, "RX driver issue detected on VF %d\n",
6230 if (vf->num_mdd_events > I40E_DEFAULT_NUM_MDD_EVENTS_ALLOWED) {
6231 dev_info(&pf->pdev->dev,
6232 "Too many MDD events on VF %d, disabled\n", i);
6233 dev_info(&pf->pdev->dev,
6234 "Use PF Control I/F to re-enable the VF\n");
6235 set_bit(I40E_VF_STAT_DISABLED, &vf->vf_states);
6239 /* re-enable mdd interrupt cause */
6240 clear_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
6241 reg = rd32(hw, I40E_PFINT_ICR0_ENA);
6242 reg |= I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
6243 wr32(hw, I40E_PFINT_ICR0_ENA, reg);
6247 #ifdef CONFIG_I40E_VXLAN
6249 * i40e_sync_vxlan_filters_subtask - Sync the VSI filter list with HW
6250 * @pf: board private structure
6252 static void i40e_sync_vxlan_filters_subtask(struct i40e_pf *pf)
6254 struct i40e_hw *hw = &pf->hw;
6260 if (!(pf->flags & I40E_FLAG_VXLAN_FILTER_SYNC))
6263 pf->flags &= ~I40E_FLAG_VXLAN_FILTER_SYNC;
6265 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
6266 if (pf->pending_vxlan_bitmap & (1 << i)) {
6267 pf->pending_vxlan_bitmap &= ~(1 << i);
6268 port = pf->vxlan_ports[i];
6270 i40e_aq_add_udp_tunnel(hw, ntohs(port),
6271 I40E_AQC_TUNNEL_TYPE_VXLAN,
6272 &filter_index, NULL)
6273 : i40e_aq_del_udp_tunnel(hw, i, NULL);
6276 dev_info(&pf->pdev->dev, "Failed to execute AQ command for %s port %d with index %d\n",
6277 port ? "adding" : "deleting",
6278 ntohs(port), port ? i : i);
6280 pf->vxlan_ports[i] = 0;
6282 dev_info(&pf->pdev->dev, "%s port %d with AQ command with index %d\n",
6283 port ? "Added" : "Deleted",
6284 ntohs(port), port ? i : filter_index);
6292 * i40e_service_task - Run the driver's async subtasks
6293 * @work: pointer to work_struct containing our data
6295 static void i40e_service_task(struct work_struct *work)
6297 struct i40e_pf *pf = container_of(work,
6300 unsigned long start_time = jiffies;
6302 /* don't bother with service tasks if a reset is in progress */
6303 if (test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) {
6304 i40e_service_event_complete(pf);
6308 i40e_reset_subtask(pf);
6309 i40e_handle_mdd_event(pf);
6310 i40e_vc_process_vflr_event(pf);
6311 i40e_watchdog_subtask(pf);
6312 i40e_fdir_reinit_subtask(pf);
6313 i40e_check_hang_subtask(pf);
6314 i40e_sync_filters_subtask(pf);
6315 #ifdef CONFIG_I40E_VXLAN
6316 i40e_sync_vxlan_filters_subtask(pf);
6318 i40e_clean_adminq_subtask(pf);
6320 i40e_link_event(pf);
6322 i40e_service_event_complete(pf);
6324 /* If the tasks have taken longer than one timer cycle or there
6325 * is more work to be done, reschedule the service task now
6326 * rather than wait for the timer to tick again.
6328 if (time_after(jiffies, (start_time + pf->service_timer_period)) ||
6329 test_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state) ||
6330 test_bit(__I40E_MDD_EVENT_PENDING, &pf->state) ||
6331 test_bit(__I40E_VFLR_EVENT_PENDING, &pf->state))
6332 i40e_service_event_schedule(pf);
6336 * i40e_service_timer - timer callback
6337 * @data: pointer to PF struct
6339 static void i40e_service_timer(unsigned long data)
6341 struct i40e_pf *pf = (struct i40e_pf *)data;
6343 mod_timer(&pf->service_timer,
6344 round_jiffies(jiffies + pf->service_timer_period));
6345 i40e_service_event_schedule(pf);
6349 * i40e_set_num_rings_in_vsi - Determine number of rings in the VSI
6350 * @vsi: the VSI being configured
6352 static int i40e_set_num_rings_in_vsi(struct i40e_vsi *vsi)
6354 struct i40e_pf *pf = vsi->back;
6356 switch (vsi->type) {
6358 vsi->alloc_queue_pairs = pf->num_lan_qps;
6359 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
6360 I40E_REQ_DESCRIPTOR_MULTIPLE);
6361 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
6362 vsi->num_q_vectors = pf->num_lan_msix;
6364 vsi->num_q_vectors = 1;
6369 vsi->alloc_queue_pairs = 1;
6370 vsi->num_desc = ALIGN(I40E_FDIR_RING_COUNT,
6371 I40E_REQ_DESCRIPTOR_MULTIPLE);
6372 vsi->num_q_vectors = 1;
6375 case I40E_VSI_VMDQ2:
6376 vsi->alloc_queue_pairs = pf->num_vmdq_qps;
6377 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
6378 I40E_REQ_DESCRIPTOR_MULTIPLE);
6379 vsi->num_q_vectors = pf->num_vmdq_msix;
6382 case I40E_VSI_SRIOV:
6383 vsi->alloc_queue_pairs = pf->num_vf_qps;
6384 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
6385 I40E_REQ_DESCRIPTOR_MULTIPLE);
6390 vsi->alloc_queue_pairs = pf->num_fcoe_qps;
6391 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
6392 I40E_REQ_DESCRIPTOR_MULTIPLE);
6393 vsi->num_q_vectors = pf->num_fcoe_msix;
6396 #endif /* I40E_FCOE */
6406 * i40e_vsi_alloc_arrays - Allocate queue and vector pointer arrays for the vsi
6407 * @type: VSI pointer
6408 * @alloc_qvectors: a bool to specify if q_vectors need to be allocated.
6410 * On error: returns error code (negative)
6411 * On success: returns 0
6413 static int i40e_vsi_alloc_arrays(struct i40e_vsi *vsi, bool alloc_qvectors)
6418 /* allocate memory for both Tx and Rx ring pointers */
6419 size = sizeof(struct i40e_ring *) * vsi->alloc_queue_pairs * 2;
6420 vsi->tx_rings = kzalloc(size, GFP_KERNEL);
6423 vsi->rx_rings = &vsi->tx_rings[vsi->alloc_queue_pairs];
6425 if (alloc_qvectors) {
6426 /* allocate memory for q_vector pointers */
6427 size = sizeof(struct i40e_q_vector *) * vsi->num_q_vectors;
6428 vsi->q_vectors = kzalloc(size, GFP_KERNEL);
6429 if (!vsi->q_vectors) {
6437 kfree(vsi->tx_rings);
6442 * i40e_vsi_mem_alloc - Allocates the next available struct vsi in the PF
6443 * @pf: board private structure
6444 * @type: type of VSI
6446 * On error: returns error code (negative)
6447 * On success: returns vsi index in PF (positive)
6449 static int i40e_vsi_mem_alloc(struct i40e_pf *pf, enum i40e_vsi_type type)
6452 struct i40e_vsi *vsi;
6456 /* Need to protect the allocation of the VSIs at the PF level */
6457 mutex_lock(&pf->switch_mutex);
6459 /* VSI list may be fragmented if VSI creation/destruction has
6460 * been happening. We can afford to do a quick scan to look
6461 * for any free VSIs in the list.
6463 * find next empty vsi slot, looping back around if necessary
6466 while (i < pf->num_alloc_vsi && pf->vsi[i])
6468 if (i >= pf->num_alloc_vsi) {
6470 while (i < pf->next_vsi && pf->vsi[i])
6474 if (i < pf->num_alloc_vsi && !pf->vsi[i]) {
6475 vsi_idx = i; /* Found one! */
6478 goto unlock_pf; /* out of VSI slots! */
6482 vsi = kzalloc(sizeof(*vsi), GFP_KERNEL);
6489 set_bit(__I40E_DOWN, &vsi->state);
6492 vsi->rx_itr_setting = pf->rx_itr_default;
6493 vsi->tx_itr_setting = pf->tx_itr_default;
6494 vsi->netdev_registered = false;
6495 vsi->work_limit = I40E_DEFAULT_IRQ_WORK;
6496 INIT_LIST_HEAD(&vsi->mac_filter_list);
6497 vsi->irqs_ready = false;
6499 ret = i40e_set_num_rings_in_vsi(vsi);
6503 ret = i40e_vsi_alloc_arrays(vsi, true);
6507 /* Setup default MSIX irq handler for VSI */
6508 i40e_vsi_setup_irqhandler(vsi, i40e_msix_clean_rings);
6510 pf->vsi[vsi_idx] = vsi;
6515 pf->next_vsi = i - 1;
6518 mutex_unlock(&pf->switch_mutex);
6523 * i40e_vsi_free_arrays - Free queue and vector pointer arrays for the VSI
6524 * @type: VSI pointer
6525 * @free_qvectors: a bool to specify if q_vectors need to be freed.
6527 * On error: returns error code (negative)
6528 * On success: returns 0
6530 static void i40e_vsi_free_arrays(struct i40e_vsi *vsi, bool free_qvectors)
6532 /* free the ring and vector containers */
6533 if (free_qvectors) {
6534 kfree(vsi->q_vectors);
6535 vsi->q_vectors = NULL;
6537 kfree(vsi->tx_rings);
6538 vsi->tx_rings = NULL;
6539 vsi->rx_rings = NULL;
6543 * i40e_vsi_clear - Deallocate the VSI provided
6544 * @vsi: the VSI being un-configured
6546 static int i40e_vsi_clear(struct i40e_vsi *vsi)
6557 mutex_lock(&pf->switch_mutex);
6558 if (!pf->vsi[vsi->idx]) {
6559 dev_err(&pf->pdev->dev, "pf->vsi[%d] is NULL, just free vsi[%d](%p,type %d)\n",
6560 vsi->idx, vsi->idx, vsi, vsi->type);
6564 if (pf->vsi[vsi->idx] != vsi) {
6565 dev_err(&pf->pdev->dev,
6566 "pf->vsi[%d](%p, type %d) != vsi[%d](%p,type %d): no free!\n",
6567 pf->vsi[vsi->idx]->idx,
6569 pf->vsi[vsi->idx]->type,
6570 vsi->idx, vsi, vsi->type);
6574 /* updates the pf for this cleared vsi */
6575 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
6576 i40e_put_lump(pf->irq_pile, vsi->base_vector, vsi->idx);
6578 i40e_vsi_free_arrays(vsi, true);
6580 pf->vsi[vsi->idx] = NULL;
6581 if (vsi->idx < pf->next_vsi)
6582 pf->next_vsi = vsi->idx;
6585 mutex_unlock(&pf->switch_mutex);
6593 * i40e_vsi_clear_rings - Deallocates the Rx and Tx rings for the provided VSI
6594 * @vsi: the VSI being cleaned
6596 static void i40e_vsi_clear_rings(struct i40e_vsi *vsi)
6600 if (vsi->tx_rings && vsi->tx_rings[0]) {
6601 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
6602 kfree_rcu(vsi->tx_rings[i], rcu);
6603 vsi->tx_rings[i] = NULL;
6604 vsi->rx_rings[i] = NULL;
6610 * i40e_alloc_rings - Allocates the Rx and Tx rings for the provided VSI
6611 * @vsi: the VSI being configured
6613 static int i40e_alloc_rings(struct i40e_vsi *vsi)
6615 struct i40e_ring *tx_ring, *rx_ring;
6616 struct i40e_pf *pf = vsi->back;
6619 /* Set basic values in the rings to be used later during open() */
6620 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
6621 /* allocate space for both Tx and Rx in one shot */
6622 tx_ring = kzalloc(sizeof(struct i40e_ring) * 2, GFP_KERNEL);
6626 tx_ring->queue_index = i;
6627 tx_ring->reg_idx = vsi->base_queue + i;
6628 tx_ring->ring_active = false;
6630 tx_ring->netdev = vsi->netdev;
6631 tx_ring->dev = &pf->pdev->dev;
6632 tx_ring->count = vsi->num_desc;
6634 tx_ring->dcb_tc = 0;
6635 vsi->tx_rings[i] = tx_ring;
6637 rx_ring = &tx_ring[1];
6638 rx_ring->queue_index = i;
6639 rx_ring->reg_idx = vsi->base_queue + i;
6640 rx_ring->ring_active = false;
6642 rx_ring->netdev = vsi->netdev;
6643 rx_ring->dev = &pf->pdev->dev;
6644 rx_ring->count = vsi->num_desc;
6646 rx_ring->dcb_tc = 0;
6647 if (pf->flags & I40E_FLAG_16BYTE_RX_DESC_ENABLED)
6648 set_ring_16byte_desc_enabled(rx_ring);
6650 clear_ring_16byte_desc_enabled(rx_ring);
6651 vsi->rx_rings[i] = rx_ring;
6657 i40e_vsi_clear_rings(vsi);
6662 * i40e_reserve_msix_vectors - Reserve MSI-X vectors in the kernel
6663 * @pf: board private structure
6664 * @vectors: the number of MSI-X vectors to request
6666 * Returns the number of vectors reserved, or error
6668 static int i40e_reserve_msix_vectors(struct i40e_pf *pf, int vectors)
6670 vectors = pci_enable_msix_range(pf->pdev, pf->msix_entries,
6671 I40E_MIN_MSIX, vectors);
6673 dev_info(&pf->pdev->dev,
6674 "MSI-X vector reservation failed: %d\n", vectors);
6682 * i40e_init_msix - Setup the MSIX capability
6683 * @pf: board private structure
6685 * Work with the OS to set up the MSIX vectors needed.
6687 * Returns 0 on success, negative on failure
6689 static int i40e_init_msix(struct i40e_pf *pf)
6691 i40e_status err = 0;
6692 struct i40e_hw *hw = &pf->hw;
6696 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
6699 /* The number of vectors we'll request will be comprised of:
6700 * - Add 1 for "other" cause for Admin Queue events, etc.
6701 * - The number of LAN queue pairs
6702 * - Queues being used for RSS.
6703 * We don't need as many as max_rss_size vectors.
6704 * use rss_size instead in the calculation since that
6705 * is governed by number of cpus in the system.
6706 * - assumes symmetric Tx/Rx pairing
6707 * - The number of VMDq pairs
6709 * - The number of FCOE qps.
6711 * Once we count this up, try the request.
6713 * If we can't get what we want, we'll simplify to nearly nothing
6714 * and try again. If that still fails, we punt.
6716 pf->num_lan_msix = pf->num_lan_qps - (pf->rss_size_max - pf->rss_size);
6717 pf->num_vmdq_msix = pf->num_vmdq_qps;
6718 v_budget = 1 + pf->num_lan_msix;
6719 v_budget += (pf->num_vmdq_vsis * pf->num_vmdq_msix);
6720 if (pf->flags & I40E_FLAG_FD_SB_ENABLED)
6724 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
6725 pf->num_fcoe_msix = pf->num_fcoe_qps;
6726 v_budget += pf->num_fcoe_msix;
6730 /* Scale down if necessary, and the rings will share vectors */
6731 v_budget = min_t(int, v_budget, hw->func_caps.num_msix_vectors);
6733 pf->msix_entries = kcalloc(v_budget, sizeof(struct msix_entry),
6735 if (!pf->msix_entries)
6738 for (i = 0; i < v_budget; i++)
6739 pf->msix_entries[i].entry = i;
6740 vec = i40e_reserve_msix_vectors(pf, v_budget);
6742 if (vec != v_budget) {
6743 /* If we have limited resources, we will start with no vectors
6744 * for the special features and then allocate vectors to some
6745 * of these features based on the policy and at the end disable
6746 * the features that did not get any vectors.
6749 pf->num_fcoe_qps = 0;
6750 pf->num_fcoe_msix = 0;
6752 pf->num_vmdq_msix = 0;
6755 if (vec < I40E_MIN_MSIX) {
6756 pf->flags &= ~I40E_FLAG_MSIX_ENABLED;
6757 kfree(pf->msix_entries);
6758 pf->msix_entries = NULL;
6761 } else if (vec == I40E_MIN_MSIX) {
6762 /* Adjust for minimal MSIX use */
6763 pf->num_vmdq_vsis = 0;
6764 pf->num_vmdq_qps = 0;
6765 pf->num_lan_qps = 1;
6766 pf->num_lan_msix = 1;
6768 } else if (vec != v_budget) {
6769 /* reserve the misc vector */
6772 /* Scale vector usage down */
6773 pf->num_vmdq_msix = 1; /* force VMDqs to only one vector */
6774 pf->num_vmdq_vsis = 1;
6776 /* partition out the remaining vectors */
6779 pf->num_lan_msix = 1;
6783 /* give one vector to FCoE */
6784 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
6785 pf->num_lan_msix = 1;
6786 pf->num_fcoe_msix = 1;
6789 pf->num_lan_msix = 2;
6794 /* give one vector to FCoE */
6795 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
6796 pf->num_fcoe_msix = 1;
6800 pf->num_lan_msix = min_t(int, (vec / 2),
6802 pf->num_vmdq_vsis = min_t(int, (vec - pf->num_lan_msix),
6803 I40E_DEFAULT_NUM_VMDQ_VSI);
6808 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
6809 (pf->num_vmdq_msix == 0)) {
6810 dev_info(&pf->pdev->dev, "VMDq disabled, not enough MSI-X vectors\n");
6811 pf->flags &= ~I40E_FLAG_VMDQ_ENABLED;
6815 if ((pf->flags & I40E_FLAG_FCOE_ENABLED) && (pf->num_fcoe_msix == 0)) {
6816 dev_info(&pf->pdev->dev, "FCOE disabled, not enough MSI-X vectors\n");
6817 pf->flags &= ~I40E_FLAG_FCOE_ENABLED;
6824 * i40e_vsi_alloc_q_vector - Allocate memory for a single interrupt vector
6825 * @vsi: the VSI being configured
6826 * @v_idx: index of the vector in the vsi struct
6828 * We allocate one q_vector. If allocation fails we return -ENOMEM.
6830 static int i40e_vsi_alloc_q_vector(struct i40e_vsi *vsi, int v_idx)
6832 struct i40e_q_vector *q_vector;
6834 /* allocate q_vector */
6835 q_vector = kzalloc(sizeof(struct i40e_q_vector), GFP_KERNEL);
6839 q_vector->vsi = vsi;
6840 q_vector->v_idx = v_idx;
6841 cpumask_set_cpu(v_idx, &q_vector->affinity_mask);
6843 netif_napi_add(vsi->netdev, &q_vector->napi,
6844 i40e_napi_poll, NAPI_POLL_WEIGHT);
6846 q_vector->rx.latency_range = I40E_LOW_LATENCY;
6847 q_vector->tx.latency_range = I40E_LOW_LATENCY;
6849 /* tie q_vector and vsi together */
6850 vsi->q_vectors[v_idx] = q_vector;
6856 * i40e_vsi_alloc_q_vectors - Allocate memory for interrupt vectors
6857 * @vsi: the VSI being configured
6859 * We allocate one q_vector per queue interrupt. If allocation fails we
6862 static int i40e_vsi_alloc_q_vectors(struct i40e_vsi *vsi)
6864 struct i40e_pf *pf = vsi->back;
6865 int v_idx, num_q_vectors;
6868 /* if not MSIX, give the one vector only to the LAN VSI */
6869 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
6870 num_q_vectors = vsi->num_q_vectors;
6871 else if (vsi == pf->vsi[pf->lan_vsi])
6876 for (v_idx = 0; v_idx < num_q_vectors; v_idx++) {
6877 err = i40e_vsi_alloc_q_vector(vsi, v_idx);
6886 i40e_free_q_vector(vsi, v_idx);
6892 * i40e_init_interrupt_scheme - Determine proper interrupt scheme
6893 * @pf: board private structure to initialize
6895 static void i40e_init_interrupt_scheme(struct i40e_pf *pf)
6899 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
6900 err = i40e_init_msix(pf);
6902 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED |
6904 I40E_FLAG_FCOE_ENABLED |
6906 I40E_FLAG_RSS_ENABLED |
6907 I40E_FLAG_DCB_CAPABLE |
6908 I40E_FLAG_SRIOV_ENABLED |
6909 I40E_FLAG_FD_SB_ENABLED |
6910 I40E_FLAG_FD_ATR_ENABLED |
6911 I40E_FLAG_VMDQ_ENABLED);
6913 /* rework the queue expectations without MSIX */
6914 i40e_determine_queue_usage(pf);
6918 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED) &&
6919 (pf->flags & I40E_FLAG_MSI_ENABLED)) {
6920 dev_info(&pf->pdev->dev, "MSI-X not available, trying MSI\n");
6921 err = pci_enable_msi(pf->pdev);
6923 dev_info(&pf->pdev->dev, "MSI init failed - %d\n", err);
6924 pf->flags &= ~I40E_FLAG_MSI_ENABLED;
6928 if (!(pf->flags & (I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED)))
6929 dev_info(&pf->pdev->dev, "MSI-X and MSI not available, falling back to Legacy IRQ\n");
6931 /* track first vector for misc interrupts */
6932 err = i40e_get_lump(pf, pf->irq_pile, 1, I40E_PILE_VALID_BIT-1);
6936 * i40e_setup_misc_vector - Setup the misc vector to handle non queue events
6937 * @pf: board private structure
6939 * This sets up the handler for MSIX 0, which is used to manage the
6940 * non-queue interrupts, e.g. AdminQ and errors. This is not used
6941 * when in MSI or Legacy interrupt mode.
6943 static int i40e_setup_misc_vector(struct i40e_pf *pf)
6945 struct i40e_hw *hw = &pf->hw;
6948 /* Only request the irq if this is the first time through, and
6949 * not when we're rebuilding after a Reset
6951 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) {
6952 err = request_irq(pf->msix_entries[0].vector,
6953 i40e_intr, 0, pf->misc_int_name, pf);
6955 dev_info(&pf->pdev->dev,
6956 "request_irq for %s failed: %d\n",
6957 pf->misc_int_name, err);
6962 i40e_enable_misc_int_causes(hw);
6964 /* associate no queues to the misc vector */
6965 wr32(hw, I40E_PFINT_LNKLST0, I40E_QUEUE_END_OF_LIST);
6966 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), I40E_ITR_8K);
6970 i40e_irq_dynamic_enable_icr0(pf);
6976 * i40e_config_rss - Prepare for RSS if used
6977 * @pf: board private structure
6979 static int i40e_config_rss(struct i40e_pf *pf)
6981 /* Set of random keys generated using kernel random number generator */
6982 static const u32 seed[I40E_PFQF_HKEY_MAX_INDEX + 1] = {0x41b01687,
6983 0x183cfd8c, 0xce880440, 0x580cbc3c, 0x35897377,
6984 0x328b25e1, 0x4fa98922, 0xb7d90c14, 0xd5bad70d,
6985 0xcd15a2c1, 0xe8580225, 0x4a1e9d11, 0xfe5731be};
6986 struct i40e_hw *hw = &pf->hw;
6992 /* Fill out hash function seed */
6993 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
6994 wr32(hw, I40E_PFQF_HKEY(i), seed[i]);
6996 /* By default we enable TCP/UDP with IPv4/IPv6 ptypes */
6997 hena = (u64)rd32(hw, I40E_PFQF_HENA(0)) |
6998 ((u64)rd32(hw, I40E_PFQF_HENA(1)) << 32);
6999 hena |= I40E_DEFAULT_RSS_HENA;
7000 wr32(hw, I40E_PFQF_HENA(0), (u32)hena);
7001 wr32(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32));
7003 /* Check capability and Set table size and register per hw expectation*/
7004 reg_val = rd32(hw, I40E_PFQF_CTL_0);
7005 if (hw->func_caps.rss_table_size == 512) {
7006 reg_val |= I40E_PFQF_CTL_0_HASHLUTSIZE_512;
7007 pf->rss_table_size = 512;
7009 pf->rss_table_size = 128;
7010 reg_val &= ~I40E_PFQF_CTL_0_HASHLUTSIZE_512;
7012 wr32(hw, I40E_PFQF_CTL_0, reg_val);
7014 /* Populate the LUT with max no. of queues in round robin fashion */
7015 for (i = 0, j = 0; i < pf->rss_table_size; i++, j++) {
7017 /* The assumption is that lan qp count will be the highest
7018 * qp count for any PF VSI that needs RSS.
7019 * If multiple VSIs need RSS support, all the qp counts
7020 * for those VSIs should be a power of 2 for RSS to work.
7021 * If LAN VSI is the only consumer for RSS then this requirement
7024 if (j == pf->rss_size)
7026 /* lut = 4-byte sliding window of 4 lut entries */
7027 lut = (lut << 8) | (j &
7028 ((0x1 << pf->hw.func_caps.rss_table_entry_width) - 1));
7029 /* On i = 3, we have 4 entries in lut; write to the register */
7031 wr32(hw, I40E_PFQF_HLUT(i >> 2), lut);
7039 * i40e_reconfig_rss_queues - change number of queues for rss and rebuild
7040 * @pf: board private structure
7041 * @queue_count: the requested queue count for rss.
7043 * returns 0 if rss is not enabled, if enabled returns the final rss queue
7044 * count which may be different from the requested queue count.
7046 int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count)
7048 if (!(pf->flags & I40E_FLAG_RSS_ENABLED))
7051 queue_count = min_t(int, queue_count, pf->rss_size_max);
7053 if (queue_count != pf->rss_size) {
7054 i40e_prep_for_reset(pf);
7056 pf->rss_size = queue_count;
7058 i40e_reset_and_rebuild(pf, true);
7059 i40e_config_rss(pf);
7061 dev_info(&pf->pdev->dev, "RSS count: %d\n", pf->rss_size);
7062 return pf->rss_size;
7066 * i40e_sw_init - Initialize general software structures (struct i40e_pf)
7067 * @pf: board private structure to initialize
7069 * i40e_sw_init initializes the Adapter private data structure.
7070 * Fields are initialized based on PCI device information and
7071 * OS network device settings (MTU size).
7073 static int i40e_sw_init(struct i40e_pf *pf)
7078 pf->msg_enable = netif_msg_init(I40E_DEFAULT_MSG_ENABLE,
7079 (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK));
7080 pf->hw.debug_mask = pf->msg_enable | I40E_DEBUG_DIAG;
7081 if (debug != -1 && debug != I40E_DEFAULT_MSG_ENABLE) {
7082 if (I40E_DEBUG_USER & debug)
7083 pf->hw.debug_mask = debug;
7084 pf->msg_enable = netif_msg_init((debug & ~I40E_DEBUG_USER),
7085 I40E_DEFAULT_MSG_ENABLE);
7088 /* Set default capability flags */
7089 pf->flags = I40E_FLAG_RX_CSUM_ENABLED |
7090 I40E_FLAG_MSI_ENABLED |
7091 I40E_FLAG_MSIX_ENABLED |
7092 I40E_FLAG_RX_1BUF_ENABLED;
7094 /* Set default ITR */
7095 pf->rx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_RX_DEF;
7096 pf->tx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_TX_DEF;
7098 /* Depending on PF configurations, it is possible that the RSS
7099 * maximum might end up larger than the available queues
7101 pf->rss_size_max = 0x1 << pf->hw.func_caps.rss_table_entry_width;
7103 pf->rss_size_max = min_t(int, pf->rss_size_max,
7104 pf->hw.func_caps.num_tx_qp);
7105 if (pf->hw.func_caps.rss) {
7106 pf->flags |= I40E_FLAG_RSS_ENABLED;
7107 pf->rss_size = min_t(int, pf->rss_size_max, num_online_cpus());
7110 /* MFP mode enabled */
7111 if (pf->hw.func_caps.npar_enable || pf->hw.func_caps.mfp_mode_1) {
7112 pf->flags |= I40E_FLAG_MFP_ENABLED;
7113 dev_info(&pf->pdev->dev, "MFP mode Enabled\n");
7116 /* FW/NVM is not yet fixed in this regard */
7117 if ((pf->hw.func_caps.fd_filters_guaranteed > 0) ||
7118 (pf->hw.func_caps.fd_filters_best_effort > 0)) {
7119 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
7120 pf->atr_sample_rate = I40E_DEFAULT_ATR_SAMPLE_RATE;
7121 /* Setup a counter for fd_atr per pf */
7122 pf->fd_atr_cnt_idx = I40E_FD_ATR_STAT_IDX(pf->hw.pf_id);
7123 if (!(pf->flags & I40E_FLAG_MFP_ENABLED)) {
7124 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
7125 /* Setup a counter for fd_sb per pf */
7126 pf->fd_sb_cnt_idx = I40E_FD_SB_STAT_IDX(pf->hw.pf_id);
7128 dev_info(&pf->pdev->dev,
7129 "Flow Director Sideband mode Disabled in MFP mode\n");
7131 pf->fdir_pf_filter_count =
7132 pf->hw.func_caps.fd_filters_guaranteed;
7133 pf->hw.fdir_shared_filter_count =
7134 pf->hw.func_caps.fd_filters_best_effort;
7137 if (pf->hw.func_caps.vmdq) {
7138 pf->flags |= I40E_FLAG_VMDQ_ENABLED;
7139 pf->num_vmdq_vsis = I40E_DEFAULT_NUM_VMDQ_VSI;
7140 pf->num_vmdq_qps = I40E_DEFAULT_QUEUES_PER_VMDQ;
7144 err = i40e_init_pf_fcoe(pf);
7146 dev_info(&pf->pdev->dev, "init_pf_fcoe failed: %d\n", err);
7148 #endif /* I40E_FCOE */
7149 #ifdef CONFIG_PCI_IOV
7150 if (pf->hw.func_caps.num_vfs) {
7151 pf->num_vf_qps = I40E_DEFAULT_QUEUES_PER_VF;
7152 pf->flags |= I40E_FLAG_SRIOV_ENABLED;
7153 pf->num_req_vfs = min_t(int,
7154 pf->hw.func_caps.num_vfs,
7157 #endif /* CONFIG_PCI_IOV */
7158 pf->eeprom_version = 0xDEAD;
7159 pf->lan_veb = I40E_NO_VEB;
7160 pf->lan_vsi = I40E_NO_VSI;
7162 /* set up queue assignment tracking */
7163 size = sizeof(struct i40e_lump_tracking)
7164 + (sizeof(u16) * pf->hw.func_caps.num_tx_qp);
7165 pf->qp_pile = kzalloc(size, GFP_KERNEL);
7170 pf->qp_pile->num_entries = pf->hw.func_caps.num_tx_qp;
7171 pf->qp_pile->search_hint = 0;
7173 /* set up vector assignment tracking */
7174 size = sizeof(struct i40e_lump_tracking)
7175 + (sizeof(u16) * pf->hw.func_caps.num_msix_vectors);
7176 pf->irq_pile = kzalloc(size, GFP_KERNEL);
7177 if (!pf->irq_pile) {
7182 pf->irq_pile->num_entries = pf->hw.func_caps.num_msix_vectors;
7183 pf->irq_pile->search_hint = 0;
7185 pf->tx_timeout_recovery_level = 1;
7187 mutex_init(&pf->switch_mutex);
7194 * i40e_set_ntuple - set the ntuple feature flag and take action
7195 * @pf: board private structure to initialize
7196 * @features: the feature set that the stack is suggesting
7198 * returns a bool to indicate if reset needs to happen
7200 bool i40e_set_ntuple(struct i40e_pf *pf, netdev_features_t features)
7202 bool need_reset = false;
7204 /* Check if Flow Director n-tuple support was enabled or disabled. If
7205 * the state changed, we need to reset.
7207 if (features & NETIF_F_NTUPLE) {
7208 /* Enable filters and mark for reset */
7209 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
7211 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
7213 /* turn off filters, mark for reset and clear SW filter list */
7214 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
7216 i40e_fdir_filter_exit(pf);
7218 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
7219 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED;
7220 /* reset fd counters */
7221 pf->fd_add_err = pf->fd_atr_cnt = pf->fd_tcp_rule = 0;
7222 pf->fdir_pf_active_filters = 0;
7223 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
7224 dev_info(&pf->pdev->dev, "ATR re-enabled.\n");
7225 /* if ATR was auto disabled it can be re-enabled. */
7226 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
7227 (pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED))
7228 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
7234 * i40e_set_features - set the netdev feature flags
7235 * @netdev: ptr to the netdev being adjusted
7236 * @features: the feature set that the stack is suggesting
7238 static int i40e_set_features(struct net_device *netdev,
7239 netdev_features_t features)
7241 struct i40e_netdev_priv *np = netdev_priv(netdev);
7242 struct i40e_vsi *vsi = np->vsi;
7243 struct i40e_pf *pf = vsi->back;
7246 if (features & NETIF_F_HW_VLAN_CTAG_RX)
7247 i40e_vlan_stripping_enable(vsi);
7249 i40e_vlan_stripping_disable(vsi);
7251 need_reset = i40e_set_ntuple(pf, features);
7254 i40e_do_reset(pf, (1 << __I40E_PF_RESET_REQUESTED));
7259 #ifdef CONFIG_I40E_VXLAN
7261 * i40e_get_vxlan_port_idx - Lookup a possibly offloaded for Rx UDP port
7262 * @pf: board private structure
7263 * @port: The UDP port to look up
7265 * Returns the index number or I40E_MAX_PF_UDP_OFFLOAD_PORTS if port not found
7267 static u8 i40e_get_vxlan_port_idx(struct i40e_pf *pf, __be16 port)
7271 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
7272 if (pf->vxlan_ports[i] == port)
7280 * i40e_add_vxlan_port - Get notifications about VXLAN ports that come up
7281 * @netdev: This physical port's netdev
7282 * @sa_family: Socket Family that VXLAN is notifying us about
7283 * @port: New UDP port number that VXLAN started listening to
7285 static void i40e_add_vxlan_port(struct net_device *netdev,
7286 sa_family_t sa_family, __be16 port)
7288 struct i40e_netdev_priv *np = netdev_priv(netdev);
7289 struct i40e_vsi *vsi = np->vsi;
7290 struct i40e_pf *pf = vsi->back;
7294 if (sa_family == AF_INET6)
7297 idx = i40e_get_vxlan_port_idx(pf, port);
7299 /* Check if port already exists */
7300 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
7301 netdev_info(netdev, "Port %d already offloaded\n", ntohs(port));
7305 /* Now check if there is space to add the new port */
7306 next_idx = i40e_get_vxlan_port_idx(pf, 0);
7308 if (next_idx == I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
7309 netdev_info(netdev, "Maximum number of UDP ports reached, not adding port %d\n",
7314 /* New port: add it and mark its index in the bitmap */
7315 pf->vxlan_ports[next_idx] = port;
7316 pf->pending_vxlan_bitmap |= (1 << next_idx);
7318 pf->flags |= I40E_FLAG_VXLAN_FILTER_SYNC;
7322 * i40e_del_vxlan_port - Get notifications about VXLAN ports that go away
7323 * @netdev: This physical port's netdev
7324 * @sa_family: Socket Family that VXLAN is notifying us about
7325 * @port: UDP port number that VXLAN stopped listening to
7327 static void i40e_del_vxlan_port(struct net_device *netdev,
7328 sa_family_t sa_family, __be16 port)
7330 struct i40e_netdev_priv *np = netdev_priv(netdev);
7331 struct i40e_vsi *vsi = np->vsi;
7332 struct i40e_pf *pf = vsi->back;
7335 if (sa_family == AF_INET6)
7338 idx = i40e_get_vxlan_port_idx(pf, port);
7340 /* Check if port already exists */
7341 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
7342 /* if port exists, set it to 0 (mark for deletion)
7343 * and make it pending
7345 pf->vxlan_ports[idx] = 0;
7347 pf->pending_vxlan_bitmap |= (1 << idx);
7349 pf->flags |= I40E_FLAG_VXLAN_FILTER_SYNC;
7351 netdev_warn(netdev, "Port %d was not found, not deleting\n",
7357 static int i40e_get_phys_port_id(struct net_device *netdev,
7358 struct netdev_phys_port_id *ppid)
7360 struct i40e_netdev_priv *np = netdev_priv(netdev);
7361 struct i40e_pf *pf = np->vsi->back;
7362 struct i40e_hw *hw = &pf->hw;
7364 if (!(pf->flags & I40E_FLAG_PORT_ID_VALID))
7367 ppid->id_len = min_t(int, sizeof(hw->mac.port_addr), sizeof(ppid->id));
7368 memcpy(ppid->id, hw->mac.port_addr, ppid->id_len);
7374 #ifdef USE_CONST_DEV_UC_CHAR
7375 static int i40e_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
7376 struct net_device *dev,
7377 const unsigned char *addr,
7380 static int i40e_ndo_fdb_add(struct ndmsg *ndm,
7381 struct net_device *dev,
7382 unsigned char *addr,
7386 struct i40e_netdev_priv *np = netdev_priv(dev);
7387 struct i40e_pf *pf = np->vsi->back;
7390 if (!(pf->flags & I40E_FLAG_SRIOV_ENABLED))
7393 /* Hardware does not support aging addresses so if a
7394 * ndm_state is given only allow permanent addresses
7396 if (ndm->ndm_state && !(ndm->ndm_state & NUD_PERMANENT)) {
7397 netdev_info(dev, "FDB only supports static addresses\n");
7401 if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr))
7402 err = dev_uc_add_excl(dev, addr);
7403 else if (is_multicast_ether_addr(addr))
7404 err = dev_mc_add_excl(dev, addr);
7408 /* Only return duplicate errors if NLM_F_EXCL is set */
7409 if (err == -EEXIST && !(flags & NLM_F_EXCL))
7415 #ifndef USE_DEFAULT_FDB_DEL_DUMP
7416 #ifdef USE_CONST_DEV_UC_CHAR
7417 static int i40e_ndo_fdb_del(struct ndmsg *ndm,
7418 struct net_device *dev,
7419 const unsigned char *addr)
7421 static int i40e_ndo_fdb_del(struct ndmsg *ndm,
7422 struct net_device *dev,
7423 unsigned char *addr)
7426 struct i40e_netdev_priv *np = netdev_priv(dev);
7427 struct i40e_pf *pf = np->vsi->back;
7428 int err = -EOPNOTSUPP;
7430 if (ndm->ndm_state & NUD_PERMANENT) {
7431 netdev_info(dev, "FDB only supports static addresses\n");
7435 if (pf->flags & I40E_FLAG_SRIOV_ENABLED) {
7436 if (is_unicast_ether_addr(addr))
7437 err = dev_uc_del(dev, addr);
7438 else if (is_multicast_ether_addr(addr))
7439 err = dev_mc_del(dev, addr);
7447 static int i40e_ndo_fdb_dump(struct sk_buff *skb,
7448 struct netlink_callback *cb,
7449 struct net_device *dev,
7450 struct net_device *filter_dev,
7453 struct i40e_netdev_priv *np = netdev_priv(dev);
7454 struct i40e_pf *pf = np->vsi->back;
7456 if (pf->flags & I40E_FLAG_SRIOV_ENABLED)
7457 idx = ndo_dflt_fdb_dump(skb, cb, dev, filter_dev, idx);
7462 #endif /* USE_DEFAULT_FDB_DEL_DUMP */
7463 #endif /* HAVE_FDB_OPS */
7464 static const struct net_device_ops i40e_netdev_ops = {
7465 .ndo_open = i40e_open,
7466 .ndo_stop = i40e_close,
7467 .ndo_start_xmit = i40e_lan_xmit_frame,
7468 .ndo_get_stats64 = i40e_get_netdev_stats_struct,
7469 .ndo_set_rx_mode = i40e_set_rx_mode,
7470 .ndo_validate_addr = eth_validate_addr,
7471 .ndo_set_mac_address = i40e_set_mac,
7472 .ndo_change_mtu = i40e_change_mtu,
7473 .ndo_do_ioctl = i40e_ioctl,
7474 .ndo_tx_timeout = i40e_tx_timeout,
7475 .ndo_vlan_rx_add_vid = i40e_vlan_rx_add_vid,
7476 .ndo_vlan_rx_kill_vid = i40e_vlan_rx_kill_vid,
7477 #ifdef CONFIG_NET_POLL_CONTROLLER
7478 .ndo_poll_controller = i40e_netpoll,
7480 .ndo_setup_tc = i40e_setup_tc,
7482 .ndo_fcoe_enable = i40e_fcoe_enable,
7483 .ndo_fcoe_disable = i40e_fcoe_disable,
7485 .ndo_set_features = i40e_set_features,
7486 .ndo_set_vf_mac = i40e_ndo_set_vf_mac,
7487 .ndo_set_vf_vlan = i40e_ndo_set_vf_port_vlan,
7488 .ndo_set_vf_rate = i40e_ndo_set_vf_bw,
7489 .ndo_get_vf_config = i40e_ndo_get_vf_config,
7490 .ndo_set_vf_link_state = i40e_ndo_set_vf_link_state,
7491 .ndo_set_vf_spoofchk = i40e_ndo_set_vf_spoofchk,
7492 #ifdef CONFIG_I40E_VXLAN
7493 .ndo_add_vxlan_port = i40e_add_vxlan_port,
7494 .ndo_del_vxlan_port = i40e_del_vxlan_port,
7496 .ndo_get_phys_port_id = i40e_get_phys_port_id,
7498 .ndo_fdb_add = i40e_ndo_fdb_add,
7499 #ifndef USE_DEFAULT_FDB_DEL_DUMP
7500 .ndo_fdb_del = i40e_ndo_fdb_del,
7501 .ndo_fdb_dump = i40e_ndo_fdb_dump,
7507 * i40e_config_netdev - Setup the netdev flags
7508 * @vsi: the VSI being configured
7510 * Returns 0 on success, negative value on failure
7512 static int i40e_config_netdev(struct i40e_vsi *vsi)
7514 u8 brdcast[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
7515 struct i40e_pf *pf = vsi->back;
7516 struct i40e_hw *hw = &pf->hw;
7517 struct i40e_netdev_priv *np;
7518 struct net_device *netdev;
7519 u8 mac_addr[ETH_ALEN];
7522 etherdev_size = sizeof(struct i40e_netdev_priv);
7523 netdev = alloc_etherdev_mq(etherdev_size, vsi->alloc_queue_pairs);
7527 vsi->netdev = netdev;
7528 np = netdev_priv(netdev);
7531 netdev->hw_enc_features |= NETIF_F_IP_CSUM |
7532 NETIF_F_GSO_UDP_TUNNEL |
7535 netdev->features = NETIF_F_SG |
7539 NETIF_F_GSO_UDP_TUNNEL |
7540 NETIF_F_HW_VLAN_CTAG_TX |
7541 NETIF_F_HW_VLAN_CTAG_RX |
7542 NETIF_F_HW_VLAN_CTAG_FILTER |
7551 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
7552 netdev->features |= NETIF_F_NTUPLE;
7554 /* copy netdev features into list of user selectable features */
7555 netdev->hw_features |= netdev->features;
7557 if (vsi->type == I40E_VSI_MAIN) {
7558 SET_NETDEV_DEV(netdev, &pf->pdev->dev);
7559 ether_addr_copy(mac_addr, hw->mac.perm_addr);
7560 /* The following steps are necessary to prevent reception
7561 * of tagged packets - some older NVM configurations load a
7562 * default a MAC-VLAN filter that accepts any tagged packet
7563 * which must be replaced by a normal filter.
7565 if (!i40e_rm_default_mac_filter(vsi, mac_addr))
7566 i40e_add_filter(vsi, mac_addr,
7567 I40E_VLAN_ANY, false, true);
7569 /* relate the VSI_VMDQ name to the VSI_MAIN name */
7570 snprintf(netdev->name, IFNAMSIZ, "%sv%%d",
7571 pf->vsi[pf->lan_vsi]->netdev->name);
7572 random_ether_addr(mac_addr);
7573 i40e_add_filter(vsi, mac_addr, I40E_VLAN_ANY, false, false);
7575 i40e_add_filter(vsi, brdcast, I40E_VLAN_ANY, false, false);
7577 ether_addr_copy(netdev->dev_addr, mac_addr);
7578 ether_addr_copy(netdev->perm_addr, mac_addr);
7579 /* vlan gets same features (except vlan offload)
7580 * after any tweaks for specific VSI types
7582 netdev->vlan_features = netdev->features & ~(NETIF_F_HW_VLAN_CTAG_TX |
7583 NETIF_F_HW_VLAN_CTAG_RX |
7584 NETIF_F_HW_VLAN_CTAG_FILTER);
7585 netdev->priv_flags |= IFF_UNICAST_FLT;
7586 netdev->priv_flags |= IFF_SUPP_NOFCS;
7587 /* Setup netdev TC information */
7588 i40e_vsi_config_netdev_tc(vsi, vsi->tc_config.enabled_tc);
7590 netdev->netdev_ops = &i40e_netdev_ops;
7591 netdev->watchdog_timeo = 5 * HZ;
7592 i40e_set_ethtool_ops(netdev);
7594 i40e_fcoe_config_netdev(netdev, vsi);
7601 * i40e_vsi_delete - Delete a VSI from the switch
7602 * @vsi: the VSI being removed
7604 * Returns 0 on success, negative value on failure
7606 static void i40e_vsi_delete(struct i40e_vsi *vsi)
7608 /* remove default VSI is not allowed */
7609 if (vsi == vsi->back->vsi[vsi->back->lan_vsi])
7612 i40e_aq_delete_element(&vsi->back->hw, vsi->seid, NULL);
7616 * i40e_add_vsi - Add a VSI to the switch
7617 * @vsi: the VSI being configured
7619 * This initializes a VSI context depending on the VSI type to be added and
7620 * passes it down to the add_vsi aq command.
7622 static int i40e_add_vsi(struct i40e_vsi *vsi)
7625 struct i40e_mac_filter *f, *ftmp;
7626 struct i40e_pf *pf = vsi->back;
7627 struct i40e_hw *hw = &pf->hw;
7628 struct i40e_vsi_context ctxt;
7629 u8 enabled_tc = 0x1; /* TC0 enabled */
7632 memset(&ctxt, 0, sizeof(ctxt));
7633 switch (vsi->type) {
7635 /* The PF's main VSI is already setup as part of the
7636 * device initialization, so we'll not bother with
7637 * the add_vsi call, but we will retrieve the current
7640 ctxt.seid = pf->main_vsi_seid;
7641 ctxt.pf_num = pf->hw.pf_id;
7643 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
7644 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
7646 dev_info(&pf->pdev->dev,
7647 "couldn't get pf vsi config, err %d, aq_err %d\n",
7648 ret, pf->hw.aq.asq_last_status);
7651 memcpy(&vsi->info, &ctxt.info, sizeof(ctxt.info));
7652 vsi->info.valid_sections = 0;
7654 vsi->seid = ctxt.seid;
7655 vsi->id = ctxt.vsi_number;
7657 enabled_tc = i40e_pf_get_tc_map(pf);
7659 /* MFP mode setup queue map and update VSI */
7660 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
7661 memset(&ctxt, 0, sizeof(ctxt));
7662 ctxt.seid = pf->main_vsi_seid;
7663 ctxt.pf_num = pf->hw.pf_id;
7665 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
7666 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
7668 dev_info(&pf->pdev->dev,
7669 "update vsi failed, aq_err=%d\n",
7670 pf->hw.aq.asq_last_status);
7674 /* update the local VSI info queue map */
7675 i40e_vsi_update_queue_map(vsi, &ctxt);
7676 vsi->info.valid_sections = 0;
7678 /* Default/Main VSI is only enabled for TC0
7679 * reconfigure it to enable all TCs that are
7680 * available on the port in SFP mode.
7682 ret = i40e_vsi_config_tc(vsi, enabled_tc);
7684 dev_info(&pf->pdev->dev,
7685 "failed to configure TCs for main VSI tc_map 0x%08x, err %d, aq_err %d\n",
7687 pf->hw.aq.asq_last_status);
7694 ctxt.pf_num = hw->pf_id;
7696 ctxt.uplink_seid = vsi->uplink_seid;
7697 ctxt.connection_type = 0x1; /* regular data port */
7698 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
7699 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
7702 case I40E_VSI_VMDQ2:
7703 ctxt.pf_num = hw->pf_id;
7705 ctxt.uplink_seid = vsi->uplink_seid;
7706 ctxt.connection_type = 0x1; /* regular data port */
7707 ctxt.flags = I40E_AQ_VSI_TYPE_VMDQ2;
7709 ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
7711 /* This VSI is connected to VEB so the switch_id
7712 * should be set to zero by default.
7714 ctxt.info.switch_id = 0;
7715 ctxt.info.switch_id |= cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
7717 /* Setup the VSI tx/rx queue map for TC0 only for now */
7718 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
7721 case I40E_VSI_SRIOV:
7722 ctxt.pf_num = hw->pf_id;
7723 ctxt.vf_num = vsi->vf_id + hw->func_caps.vf_base_id;
7724 ctxt.uplink_seid = vsi->uplink_seid;
7725 ctxt.connection_type = 0x1; /* regular data port */
7726 ctxt.flags = I40E_AQ_VSI_TYPE_VF;
7728 ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
7730 /* This VSI is connected to VEB so the switch_id
7731 * should be set to zero by default.
7733 ctxt.info.switch_id = cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
7735 ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
7736 ctxt.info.port_vlan_flags |= I40E_AQ_VSI_PVLAN_MODE_ALL;
7737 if (pf->vf[vsi->vf_id].spoofchk) {
7738 ctxt.info.valid_sections |=
7739 cpu_to_le16(I40E_AQ_VSI_PROP_SECURITY_VALID);
7740 ctxt.info.sec_flags |=
7741 (I40E_AQ_VSI_SEC_FLAG_ENABLE_VLAN_CHK |
7742 I40E_AQ_VSI_SEC_FLAG_ENABLE_MAC_CHK);
7744 /* Setup the VSI tx/rx queue map for TC0 only for now */
7745 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
7750 ret = i40e_fcoe_vsi_init(vsi, &ctxt);
7752 dev_info(&pf->pdev->dev, "failed to initialize FCoE VSI\n");
7757 #endif /* I40E_FCOE */
7762 if (vsi->type != I40E_VSI_MAIN) {
7763 ret = i40e_aq_add_vsi(hw, &ctxt, NULL);
7765 dev_info(&vsi->back->pdev->dev,
7766 "add vsi failed, aq_err=%d\n",
7767 vsi->back->hw.aq.asq_last_status);
7771 memcpy(&vsi->info, &ctxt.info, sizeof(ctxt.info));
7772 vsi->info.valid_sections = 0;
7773 vsi->seid = ctxt.seid;
7774 vsi->id = ctxt.vsi_number;
7777 /* If macvlan filters already exist, force them to get loaded */
7778 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
7782 if (f->is_laa && vsi->type == I40E_VSI_MAIN) {
7783 struct i40e_aqc_remove_macvlan_element_data element;
7785 memset(&element, 0, sizeof(element));
7786 ether_addr_copy(element.mac_addr, f->macaddr);
7787 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
7788 ret = i40e_aq_remove_macvlan(hw, vsi->seid,
7791 /* some older FW has a different default */
7793 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
7794 i40e_aq_remove_macvlan(hw, vsi->seid,
7798 i40e_aq_mac_address_write(hw,
7799 I40E_AQC_WRITE_TYPE_LAA_WOL,
7804 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
7805 pf->flags |= I40E_FLAG_FILTER_SYNC;
7808 /* Update VSI BW information */
7809 ret = i40e_vsi_get_bw_info(vsi);
7811 dev_info(&pf->pdev->dev,
7812 "couldn't get vsi bw info, err %d, aq_err %d\n",
7813 ret, pf->hw.aq.asq_last_status);
7814 /* VSI is already added so not tearing that up */
7823 * i40e_vsi_release - Delete a VSI and free its resources
7824 * @vsi: the VSI being removed
7826 * Returns 0 on success or < 0 on error
7828 int i40e_vsi_release(struct i40e_vsi *vsi)
7830 struct i40e_mac_filter *f, *ftmp;
7831 struct i40e_veb *veb = NULL;
7838 /* release of a VEB-owner or last VSI is not allowed */
7839 if (vsi->flags & I40E_VSI_FLAG_VEB_OWNER) {
7840 dev_info(&pf->pdev->dev, "VSI %d has existing VEB %d\n",
7841 vsi->seid, vsi->uplink_seid);
7844 if (vsi == pf->vsi[pf->lan_vsi] &&
7845 !test_bit(__I40E_DOWN, &pf->state)) {
7846 dev_info(&pf->pdev->dev, "Can't remove PF VSI\n");
7850 uplink_seid = vsi->uplink_seid;
7851 if (vsi->type != I40E_VSI_SRIOV) {
7852 if (vsi->netdev_registered) {
7853 vsi->netdev_registered = false;
7855 /* results in a call to i40e_close() */
7856 unregister_netdev(vsi->netdev);
7859 i40e_vsi_close(vsi);
7861 i40e_vsi_disable_irq(vsi);
7864 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list)
7865 i40e_del_filter(vsi, f->macaddr, f->vlan,
7866 f->is_vf, f->is_netdev);
7867 i40e_sync_vsi_filters(vsi);
7869 i40e_vsi_delete(vsi);
7870 i40e_vsi_free_q_vectors(vsi);
7872 free_netdev(vsi->netdev);
7875 i40e_vsi_clear_rings(vsi);
7876 i40e_vsi_clear(vsi);
7878 /* If this was the last thing on the VEB, except for the
7879 * controlling VSI, remove the VEB, which puts the controlling
7880 * VSI onto the next level down in the switch.
7882 * Well, okay, there's one more exception here: don't remove
7883 * the orphan VEBs yet. We'll wait for an explicit remove request
7884 * from up the network stack.
7886 for (n = 0, i = 0; i < pf->num_alloc_vsi; i++) {
7888 pf->vsi[i]->uplink_seid == uplink_seid &&
7889 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
7890 n++; /* count the VSIs */
7893 for (i = 0; i < I40E_MAX_VEB; i++) {
7896 if (pf->veb[i]->uplink_seid == uplink_seid)
7897 n++; /* count the VEBs */
7898 if (pf->veb[i]->seid == uplink_seid)
7901 if (n == 0 && veb && veb->uplink_seid != 0)
7902 i40e_veb_release(veb);
7908 * i40e_vsi_setup_vectors - Set up the q_vectors for the given VSI
7909 * @vsi: ptr to the VSI
7911 * This should only be called after i40e_vsi_mem_alloc() which allocates the
7912 * corresponding SW VSI structure and initializes num_queue_pairs for the
7913 * newly allocated VSI.
7915 * Returns 0 on success or negative on failure
7917 static int i40e_vsi_setup_vectors(struct i40e_vsi *vsi)
7920 struct i40e_pf *pf = vsi->back;
7922 if (vsi->q_vectors[0]) {
7923 dev_info(&pf->pdev->dev, "VSI %d has existing q_vectors\n",
7928 if (vsi->base_vector) {
7929 dev_info(&pf->pdev->dev, "VSI %d has non-zero base vector %d\n",
7930 vsi->seid, vsi->base_vector);
7934 ret = i40e_vsi_alloc_q_vectors(vsi);
7936 dev_info(&pf->pdev->dev,
7937 "failed to allocate %d q_vector for VSI %d, ret=%d\n",
7938 vsi->num_q_vectors, vsi->seid, ret);
7939 vsi->num_q_vectors = 0;
7940 goto vector_setup_out;
7943 if (vsi->num_q_vectors)
7944 vsi->base_vector = i40e_get_lump(pf, pf->irq_pile,
7945 vsi->num_q_vectors, vsi->idx);
7946 if (vsi->base_vector < 0) {
7947 dev_info(&pf->pdev->dev,
7948 "failed to get queue tracking for VSI %d, err=%d\n",
7949 vsi->seid, vsi->base_vector);
7950 i40e_vsi_free_q_vectors(vsi);
7952 goto vector_setup_out;
7960 * i40e_vsi_reinit_setup - return and reallocate resources for a VSI
7961 * @vsi: pointer to the vsi.
7963 * This re-allocates a vsi's queue resources.
7965 * Returns pointer to the successfully allocated and configured VSI sw struct
7966 * on success, otherwise returns NULL on failure.
7968 static struct i40e_vsi *i40e_vsi_reinit_setup(struct i40e_vsi *vsi)
7970 struct i40e_pf *pf = vsi->back;
7974 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
7975 i40e_vsi_clear_rings(vsi);
7977 i40e_vsi_free_arrays(vsi, false);
7978 i40e_set_num_rings_in_vsi(vsi);
7979 ret = i40e_vsi_alloc_arrays(vsi, false);
7983 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs, vsi->idx);
7985 dev_info(&pf->pdev->dev, "VSI %d get_lump failed %d\n",
7989 vsi->base_queue = ret;
7991 /* Update the FW view of the VSI. Force a reset of TC and queue
7992 * layout configurations.
7994 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
7995 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
7996 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
7997 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
7999 /* assign it some queues */
8000 ret = i40e_alloc_rings(vsi);
8004 /* map all of the rings to the q_vectors */
8005 i40e_vsi_map_rings_to_vectors(vsi);
8009 i40e_vsi_free_q_vectors(vsi);
8010 if (vsi->netdev_registered) {
8011 vsi->netdev_registered = false;
8012 unregister_netdev(vsi->netdev);
8013 free_netdev(vsi->netdev);
8016 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
8018 i40e_vsi_clear(vsi);
8023 * i40e_vsi_setup - Set up a VSI by a given type
8024 * @pf: board private structure
8026 * @uplink_seid: the switch element to link to
8027 * @param1: usage depends upon VSI type. For VF types, indicates VF id
8029 * This allocates the sw VSI structure and its queue resources, then add a VSI
8030 * to the identified VEB.
8032 * Returns pointer to the successfully allocated and configure VSI sw struct on
8033 * success, otherwise returns NULL on failure.
8035 struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 type,
8036 u16 uplink_seid, u32 param1)
8038 struct i40e_vsi *vsi = NULL;
8039 struct i40e_veb *veb = NULL;
8043 /* The requested uplink_seid must be either
8044 * - the PF's port seid
8045 * no VEB is needed because this is the PF
8046 * or this is a Flow Director special case VSI
8047 * - seid of an existing VEB
8048 * - seid of a VSI that owns an existing VEB
8049 * - seid of a VSI that doesn't own a VEB
8050 * a new VEB is created and the VSI becomes the owner
8051 * - seid of the PF VSI, which is what creates the first VEB
8052 * this is a special case of the previous
8054 * Find which uplink_seid we were given and create a new VEB if needed
8056 for (i = 0; i < I40E_MAX_VEB; i++) {
8057 if (pf->veb[i] && pf->veb[i]->seid == uplink_seid) {
8063 if (!veb && uplink_seid != pf->mac_seid) {
8065 for (i = 0; i < pf->num_alloc_vsi; i++) {
8066 if (pf->vsi[i] && pf->vsi[i]->seid == uplink_seid) {
8072 dev_info(&pf->pdev->dev, "no such uplink_seid %d\n",
8077 if (vsi->uplink_seid == pf->mac_seid)
8078 veb = i40e_veb_setup(pf, 0, pf->mac_seid, vsi->seid,
8079 vsi->tc_config.enabled_tc);
8080 else if ((vsi->flags & I40E_VSI_FLAG_VEB_OWNER) == 0)
8081 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
8082 vsi->tc_config.enabled_tc);
8084 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
8085 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
8089 dev_info(&pf->pdev->dev, "couldn't add VEB\n");
8093 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
8094 uplink_seid = veb->seid;
8097 /* get vsi sw struct */
8098 v_idx = i40e_vsi_mem_alloc(pf, type);
8101 vsi = pf->vsi[v_idx];
8105 vsi->veb_idx = (veb ? veb->idx : I40E_NO_VEB);
8107 if (type == I40E_VSI_MAIN)
8108 pf->lan_vsi = v_idx;
8109 else if (type == I40E_VSI_SRIOV)
8110 vsi->vf_id = param1;
8111 /* assign it some queues */
8112 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs,
8115 dev_info(&pf->pdev->dev, "VSI %d get_lump failed %d\n",
8119 vsi->base_queue = ret;
8121 /* get a VSI from the hardware */
8122 vsi->uplink_seid = uplink_seid;
8123 ret = i40e_add_vsi(vsi);
8127 switch (vsi->type) {
8128 /* setup the netdev if needed */
8130 case I40E_VSI_VMDQ2:
8132 ret = i40e_config_netdev(vsi);
8135 ret = register_netdev(vsi->netdev);
8138 vsi->netdev_registered = true;
8139 netif_carrier_off(vsi->netdev);
8140 #ifdef CONFIG_I40E_DCB
8141 /* Setup DCB netlink interface */
8142 i40e_dcbnl_setup(vsi);
8143 #endif /* CONFIG_I40E_DCB */
8147 /* set up vectors and rings if needed */
8148 ret = i40e_vsi_setup_vectors(vsi);
8152 ret = i40e_alloc_rings(vsi);
8156 /* map all of the rings to the q_vectors */
8157 i40e_vsi_map_rings_to_vectors(vsi);
8159 i40e_vsi_reset_stats(vsi);
8163 /* no netdev or rings for the other VSI types */
8170 i40e_vsi_free_q_vectors(vsi);
8172 if (vsi->netdev_registered) {
8173 vsi->netdev_registered = false;
8174 unregister_netdev(vsi->netdev);
8175 free_netdev(vsi->netdev);
8179 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
8181 i40e_vsi_clear(vsi);
8187 * i40e_veb_get_bw_info - Query VEB BW information
8188 * @veb: the veb to query
8190 * Query the Tx scheduler BW configuration data for given VEB
8192 static int i40e_veb_get_bw_info(struct i40e_veb *veb)
8194 struct i40e_aqc_query_switching_comp_ets_config_resp ets_data;
8195 struct i40e_aqc_query_switching_comp_bw_config_resp bw_data;
8196 struct i40e_pf *pf = veb->pf;
8197 struct i40e_hw *hw = &pf->hw;
8202 ret = i40e_aq_query_switch_comp_bw_config(hw, veb->seid,
8205 dev_info(&pf->pdev->dev,
8206 "query veb bw config failed, aq_err=%d\n",
8207 hw->aq.asq_last_status);
8211 ret = i40e_aq_query_switch_comp_ets_config(hw, veb->seid,
8214 dev_info(&pf->pdev->dev,
8215 "query veb bw ets config failed, aq_err=%d\n",
8216 hw->aq.asq_last_status);
8220 veb->bw_limit = le16_to_cpu(ets_data.port_bw_limit);
8221 veb->bw_max_quanta = ets_data.tc_bw_max;
8222 veb->is_abs_credits = bw_data.absolute_credits_enable;
8223 tc_bw_max = le16_to_cpu(bw_data.tc_bw_max[0]) |
8224 (le16_to_cpu(bw_data.tc_bw_max[1]) << 16);
8225 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
8226 veb->bw_tc_share_credits[i] = bw_data.tc_bw_share_credits[i];
8227 veb->bw_tc_limit_credits[i] =
8228 le16_to_cpu(bw_data.tc_bw_limits[i]);
8229 veb->bw_tc_max_quanta[i] = ((tc_bw_max >> (i*4)) & 0x7);
8237 * i40e_veb_mem_alloc - Allocates the next available struct veb in the PF
8238 * @pf: board private structure
8240 * On error: returns error code (negative)
8241 * On success: returns vsi index in PF (positive)
8243 static int i40e_veb_mem_alloc(struct i40e_pf *pf)
8246 struct i40e_veb *veb;
8249 /* Need to protect the allocation of switch elements at the PF level */
8250 mutex_lock(&pf->switch_mutex);
8252 /* VEB list may be fragmented if VEB creation/destruction has
8253 * been happening. We can afford to do a quick scan to look
8254 * for any free slots in the list.
8256 * find next empty veb slot, looping back around if necessary
8259 while ((i < I40E_MAX_VEB) && (pf->veb[i] != NULL))
8261 if (i >= I40E_MAX_VEB) {
8263 goto err_alloc_veb; /* out of VEB slots! */
8266 veb = kzalloc(sizeof(*veb), GFP_KERNEL);
8273 veb->enabled_tc = 1;
8278 mutex_unlock(&pf->switch_mutex);
8283 * i40e_switch_branch_release - Delete a branch of the switch tree
8284 * @branch: where to start deleting
8286 * This uses recursion to find the tips of the branch to be
8287 * removed, deleting until we get back to and can delete this VEB.
8289 static void i40e_switch_branch_release(struct i40e_veb *branch)
8291 struct i40e_pf *pf = branch->pf;
8292 u16 branch_seid = branch->seid;
8293 u16 veb_idx = branch->idx;
8296 /* release any VEBs on this VEB - RECURSION */
8297 for (i = 0; i < I40E_MAX_VEB; i++) {
8300 if (pf->veb[i]->uplink_seid == branch->seid)
8301 i40e_switch_branch_release(pf->veb[i]);
8304 /* Release the VSIs on this VEB, but not the owner VSI.
8306 * NOTE: Removing the last VSI on a VEB has the SIDE EFFECT of removing
8307 * the VEB itself, so don't use (*branch) after this loop.
8309 for (i = 0; i < pf->num_alloc_vsi; i++) {
8312 if (pf->vsi[i]->uplink_seid == branch_seid &&
8313 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
8314 i40e_vsi_release(pf->vsi[i]);
8318 /* There's one corner case where the VEB might not have been
8319 * removed, so double check it here and remove it if needed.
8320 * This case happens if the veb was created from the debugfs
8321 * commands and no VSIs were added to it.
8323 if (pf->veb[veb_idx])
8324 i40e_veb_release(pf->veb[veb_idx]);
8328 * i40e_veb_clear - remove veb struct
8329 * @veb: the veb to remove
8331 static void i40e_veb_clear(struct i40e_veb *veb)
8337 struct i40e_pf *pf = veb->pf;
8339 mutex_lock(&pf->switch_mutex);
8340 if (pf->veb[veb->idx] == veb)
8341 pf->veb[veb->idx] = NULL;
8342 mutex_unlock(&pf->switch_mutex);
8349 * i40e_veb_release - Delete a VEB and free its resources
8350 * @veb: the VEB being removed
8352 void i40e_veb_release(struct i40e_veb *veb)
8354 struct i40e_vsi *vsi = NULL;
8360 /* find the remaining VSI and check for extras */
8361 for (i = 0; i < pf->num_alloc_vsi; i++) {
8362 if (pf->vsi[i] && pf->vsi[i]->uplink_seid == veb->seid) {
8368 dev_info(&pf->pdev->dev,
8369 "can't remove VEB %d with %d VSIs left\n",
8374 /* move the remaining VSI to uplink veb */
8375 vsi->flags &= ~I40E_VSI_FLAG_VEB_OWNER;
8376 if (veb->uplink_seid) {
8377 vsi->uplink_seid = veb->uplink_seid;
8378 if (veb->uplink_seid == pf->mac_seid)
8379 vsi->veb_idx = I40E_NO_VEB;
8381 vsi->veb_idx = veb->veb_idx;
8384 vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
8385 vsi->veb_idx = pf->vsi[pf->lan_vsi]->veb_idx;
8388 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
8389 i40e_veb_clear(veb);
8393 * i40e_add_veb - create the VEB in the switch
8394 * @veb: the VEB to be instantiated
8395 * @vsi: the controlling VSI
8397 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi)
8399 bool is_default = false;
8400 bool is_cloud = false;
8403 /* get a VEB from the hardware */
8404 ret = i40e_aq_add_veb(&veb->pf->hw, veb->uplink_seid, vsi->seid,
8405 veb->enabled_tc, is_default,
8406 is_cloud, &veb->seid, NULL);
8408 dev_info(&veb->pf->pdev->dev,
8409 "couldn't add VEB, err %d, aq_err %d\n",
8410 ret, veb->pf->hw.aq.asq_last_status);
8414 /* get statistics counter */
8415 ret = i40e_aq_get_veb_parameters(&veb->pf->hw, veb->seid, NULL, NULL,
8416 &veb->stats_idx, NULL, NULL, NULL);
8418 dev_info(&veb->pf->pdev->dev,
8419 "couldn't get VEB statistics idx, err %d, aq_err %d\n",
8420 ret, veb->pf->hw.aq.asq_last_status);
8423 ret = i40e_veb_get_bw_info(veb);
8425 dev_info(&veb->pf->pdev->dev,
8426 "couldn't get VEB bw info, err %d, aq_err %d\n",
8427 ret, veb->pf->hw.aq.asq_last_status);
8428 i40e_aq_delete_element(&veb->pf->hw, veb->seid, NULL);
8432 vsi->uplink_seid = veb->seid;
8433 vsi->veb_idx = veb->idx;
8434 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
8440 * i40e_veb_setup - Set up a VEB
8441 * @pf: board private structure
8442 * @flags: VEB setup flags
8443 * @uplink_seid: the switch element to link to
8444 * @vsi_seid: the initial VSI seid
8445 * @enabled_tc: Enabled TC bit-map
8447 * This allocates the sw VEB structure and links it into the switch
8448 * It is possible and legal for this to be a duplicate of an already
8449 * existing VEB. It is also possible for both uplink and vsi seids
8450 * to be zero, in order to create a floating VEB.
8452 * Returns pointer to the successfully allocated VEB sw struct on
8453 * success, otherwise returns NULL on failure.
8455 struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags,
8456 u16 uplink_seid, u16 vsi_seid,
8459 struct i40e_veb *veb, *uplink_veb = NULL;
8460 int vsi_idx, veb_idx;
8463 /* if one seid is 0, the other must be 0 to create a floating relay */
8464 if ((uplink_seid == 0 || vsi_seid == 0) &&
8465 (uplink_seid + vsi_seid != 0)) {
8466 dev_info(&pf->pdev->dev,
8467 "one, not both seid's are 0: uplink=%d vsi=%d\n",
8468 uplink_seid, vsi_seid);
8472 /* make sure there is such a vsi and uplink */
8473 for (vsi_idx = 0; vsi_idx < pf->num_alloc_vsi; vsi_idx++)
8474 if (pf->vsi[vsi_idx] && pf->vsi[vsi_idx]->seid == vsi_seid)
8476 if (vsi_idx >= pf->num_alloc_vsi && vsi_seid != 0) {
8477 dev_info(&pf->pdev->dev, "vsi seid %d not found\n",
8482 if (uplink_seid && uplink_seid != pf->mac_seid) {
8483 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
8484 if (pf->veb[veb_idx] &&
8485 pf->veb[veb_idx]->seid == uplink_seid) {
8486 uplink_veb = pf->veb[veb_idx];
8491 dev_info(&pf->pdev->dev,
8492 "uplink seid %d not found\n", uplink_seid);
8497 /* get veb sw struct */
8498 veb_idx = i40e_veb_mem_alloc(pf);
8501 veb = pf->veb[veb_idx];
8503 veb->uplink_seid = uplink_seid;
8504 veb->veb_idx = (uplink_veb ? uplink_veb->idx : I40E_NO_VEB);
8505 veb->enabled_tc = (enabled_tc ? enabled_tc : 0x1);
8507 /* create the VEB in the switch */
8508 ret = i40e_add_veb(veb, pf->vsi[vsi_idx]);
8511 if (vsi_idx == pf->lan_vsi)
8512 pf->lan_veb = veb->idx;
8517 i40e_veb_clear(veb);
8523 * i40e_setup_pf_switch_element - set pf vars based on switch type
8524 * @pf: board private structure
8525 * @ele: element we are building info from
8526 * @num_reported: total number of elements
8527 * @printconfig: should we print the contents
8529 * helper function to assist in extracting a few useful SEID values.
8531 static void i40e_setup_pf_switch_element(struct i40e_pf *pf,
8532 struct i40e_aqc_switch_config_element_resp *ele,
8533 u16 num_reported, bool printconfig)
8535 u16 downlink_seid = le16_to_cpu(ele->downlink_seid);
8536 u16 uplink_seid = le16_to_cpu(ele->uplink_seid);
8537 u8 element_type = ele->element_type;
8538 u16 seid = le16_to_cpu(ele->seid);
8541 dev_info(&pf->pdev->dev,
8542 "type=%d seid=%d uplink=%d downlink=%d\n",
8543 element_type, seid, uplink_seid, downlink_seid);
8545 switch (element_type) {
8546 case I40E_SWITCH_ELEMENT_TYPE_MAC:
8547 pf->mac_seid = seid;
8549 case I40E_SWITCH_ELEMENT_TYPE_VEB:
8551 if (uplink_seid != pf->mac_seid)
8553 if (pf->lan_veb == I40E_NO_VEB) {
8556 /* find existing or else empty VEB */
8557 for (v = 0; v < I40E_MAX_VEB; v++) {
8558 if (pf->veb[v] && (pf->veb[v]->seid == seid)) {
8563 if (pf->lan_veb == I40E_NO_VEB) {
8564 v = i40e_veb_mem_alloc(pf);
8571 pf->veb[pf->lan_veb]->seid = seid;
8572 pf->veb[pf->lan_veb]->uplink_seid = pf->mac_seid;
8573 pf->veb[pf->lan_veb]->pf = pf;
8574 pf->veb[pf->lan_veb]->veb_idx = I40E_NO_VEB;
8576 case I40E_SWITCH_ELEMENT_TYPE_VSI:
8577 if (num_reported != 1)
8579 /* This is immediately after a reset so we can assume this is
8582 pf->mac_seid = uplink_seid;
8583 pf->pf_seid = downlink_seid;
8584 pf->main_vsi_seid = seid;
8586 dev_info(&pf->pdev->dev,
8587 "pf_seid=%d main_vsi_seid=%d\n",
8588 pf->pf_seid, pf->main_vsi_seid);
8590 case I40E_SWITCH_ELEMENT_TYPE_PF:
8591 case I40E_SWITCH_ELEMENT_TYPE_VF:
8592 case I40E_SWITCH_ELEMENT_TYPE_EMP:
8593 case I40E_SWITCH_ELEMENT_TYPE_BMC:
8594 case I40E_SWITCH_ELEMENT_TYPE_PE:
8595 case I40E_SWITCH_ELEMENT_TYPE_PA:
8596 /* ignore these for now */
8599 dev_info(&pf->pdev->dev, "unknown element type=%d seid=%d\n",
8600 element_type, seid);
8606 * i40e_fetch_switch_configuration - Get switch config from firmware
8607 * @pf: board private structure
8608 * @printconfig: should we print the contents
8610 * Get the current switch configuration from the device and
8611 * extract a few useful SEID values.
8613 int i40e_fetch_switch_configuration(struct i40e_pf *pf, bool printconfig)
8615 struct i40e_aqc_get_switch_config_resp *sw_config;
8621 aq_buf = kzalloc(I40E_AQ_LARGE_BUF, GFP_KERNEL);
8625 sw_config = (struct i40e_aqc_get_switch_config_resp *)aq_buf;
8627 u16 num_reported, num_total;
8629 ret = i40e_aq_get_switch_config(&pf->hw, sw_config,
8633 dev_info(&pf->pdev->dev,
8634 "get switch config failed %d aq_err=%x\n",
8635 ret, pf->hw.aq.asq_last_status);
8640 num_reported = le16_to_cpu(sw_config->header.num_reported);
8641 num_total = le16_to_cpu(sw_config->header.num_total);
8644 dev_info(&pf->pdev->dev,
8645 "header: %d reported %d total\n",
8646 num_reported, num_total);
8648 for (i = 0; i < num_reported; i++) {
8649 struct i40e_aqc_switch_config_element_resp *ele =
8650 &sw_config->element[i];
8652 i40e_setup_pf_switch_element(pf, ele, num_reported,
8655 } while (next_seid != 0);
8662 * i40e_setup_pf_switch - Setup the HW switch on startup or after reset
8663 * @pf: board private structure
8664 * @reinit: if the Main VSI needs to re-initialized.
8666 * Returns 0 on success, negative value on failure
8668 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit)
8672 /* find out what's out there already */
8673 ret = i40e_fetch_switch_configuration(pf, false);
8675 dev_info(&pf->pdev->dev,
8676 "couldn't fetch switch config, err %d, aq_err %d\n",
8677 ret, pf->hw.aq.asq_last_status);
8680 i40e_pf_reset_stats(pf);
8682 /* first time setup */
8683 if (pf->lan_vsi == I40E_NO_VSI || reinit) {
8684 struct i40e_vsi *vsi = NULL;
8687 /* Set up the PF VSI associated with the PF's main VSI
8688 * that is already in the HW switch
8690 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
8691 uplink_seid = pf->veb[pf->lan_veb]->seid;
8693 uplink_seid = pf->mac_seid;
8694 if (pf->lan_vsi == I40E_NO_VSI)
8695 vsi = i40e_vsi_setup(pf, I40E_VSI_MAIN, uplink_seid, 0);
8697 vsi = i40e_vsi_reinit_setup(pf->vsi[pf->lan_vsi]);
8699 dev_info(&pf->pdev->dev, "setup of MAIN VSI failed\n");
8700 i40e_fdir_teardown(pf);
8704 /* force a reset of TC and queue layout configurations */
8705 u8 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
8706 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
8707 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
8708 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
8710 i40e_vlan_stripping_disable(pf->vsi[pf->lan_vsi]);
8712 i40e_fdir_sb_setup(pf);
8714 /* Setup static PF queue filter control settings */
8715 ret = i40e_setup_pf_filter_control(pf);
8717 dev_info(&pf->pdev->dev, "setup_pf_filter_control failed: %d\n",
8719 /* Failure here should not stop continuing other steps */
8722 /* enable RSS in the HW, even for only one queue, as the stack can use
8725 if ((pf->flags & I40E_FLAG_RSS_ENABLED))
8726 i40e_config_rss(pf);
8728 /* fill in link information and enable LSE reporting */
8729 i40e_update_link_info(&pf->hw, true);
8730 i40e_link_event(pf);
8732 /* Initialize user-specific link properties */
8733 pf->fc_autoneg_status = ((pf->hw.phy.link_info.an_info &
8734 I40E_AQ_AN_COMPLETED) ? true : false);
8736 /* fill in link information and enable LSE reporting */
8737 i40e_update_link_info(&pf->hw, true);
8738 i40e_link_event(pf);
8740 /* Initialize user-specific link properties */
8741 pf->fc_autoneg_status = ((pf->hw.phy.link_info.an_info &
8742 I40E_AQ_AN_COMPLETED) ? true : false);
8750 * i40e_determine_queue_usage - Work out queue distribution
8751 * @pf: board private structure
8753 static void i40e_determine_queue_usage(struct i40e_pf *pf)
8757 pf->num_lan_qps = 0;
8759 pf->num_fcoe_qps = 0;
8762 /* Find the max queues to be put into basic use. We'll always be
8763 * using TC0, whether or not DCB is running, and TC0 will get the
8766 queues_left = pf->hw.func_caps.num_tx_qp;
8768 if ((queues_left == 1) ||
8769 !(pf->flags & I40E_FLAG_MSIX_ENABLED)) {
8770 /* one qp for PF, no queues for anything else */
8772 pf->rss_size = pf->num_lan_qps = 1;
8774 /* make sure all the fancies are disabled */
8775 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
8777 I40E_FLAG_FCOE_ENABLED |
8779 I40E_FLAG_FD_SB_ENABLED |
8780 I40E_FLAG_FD_ATR_ENABLED |
8781 I40E_FLAG_DCB_CAPABLE |
8782 I40E_FLAG_SRIOV_ENABLED |
8783 I40E_FLAG_VMDQ_ENABLED);
8784 } else if (!(pf->flags & (I40E_FLAG_RSS_ENABLED |
8785 I40E_FLAG_FD_SB_ENABLED |
8786 I40E_FLAG_FD_ATR_ENABLED |
8787 I40E_FLAG_DCB_CAPABLE))) {
8789 pf->rss_size = pf->num_lan_qps = 1;
8790 queues_left -= pf->num_lan_qps;
8792 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
8794 I40E_FLAG_FCOE_ENABLED |
8796 I40E_FLAG_FD_SB_ENABLED |
8797 I40E_FLAG_FD_ATR_ENABLED |
8798 I40E_FLAG_DCB_ENABLED |
8799 I40E_FLAG_VMDQ_ENABLED);
8801 /* Not enough queues for all TCs */
8802 if ((pf->flags & I40E_FLAG_DCB_CAPABLE) &&
8803 (queues_left < I40E_MAX_TRAFFIC_CLASS)) {
8804 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
8805 dev_info(&pf->pdev->dev, "not enough queues for DCB. DCB is disabled.\n");
8807 pf->num_lan_qps = pf->rss_size_max;
8808 queues_left -= pf->num_lan_qps;
8812 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
8813 if (I40E_DEFAULT_FCOE <= queues_left) {
8814 pf->num_fcoe_qps = I40E_DEFAULT_FCOE;
8815 } else if (I40E_MINIMUM_FCOE <= queues_left) {
8816 pf->num_fcoe_qps = I40E_MINIMUM_FCOE;
8818 pf->num_fcoe_qps = 0;
8819 pf->flags &= ~I40E_FLAG_FCOE_ENABLED;
8820 dev_info(&pf->pdev->dev, "not enough queues for FCoE. FCoE feature will be disabled\n");
8823 queues_left -= pf->num_fcoe_qps;
8827 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
8828 if (queues_left > 1) {
8829 queues_left -= 1; /* save 1 queue for FD */
8831 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
8832 dev_info(&pf->pdev->dev, "not enough queues for Flow Director. Flow Director feature is disabled\n");
8836 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
8837 pf->num_vf_qps && pf->num_req_vfs && queues_left) {
8838 pf->num_req_vfs = min_t(int, pf->num_req_vfs,
8839 (queues_left / pf->num_vf_qps));
8840 queues_left -= (pf->num_req_vfs * pf->num_vf_qps);
8843 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
8844 pf->num_vmdq_vsis && pf->num_vmdq_qps && queues_left) {
8845 pf->num_vmdq_vsis = min_t(int, pf->num_vmdq_vsis,
8846 (queues_left / pf->num_vmdq_qps));
8847 queues_left -= (pf->num_vmdq_vsis * pf->num_vmdq_qps);
8850 pf->queues_left = queues_left;
8852 dev_info(&pf->pdev->dev, "fcoe queues = %d\n", pf->num_fcoe_qps);
8857 * i40e_setup_pf_filter_control - Setup PF static filter control
8858 * @pf: PF to be setup
8860 * i40e_setup_pf_filter_control sets up a pf's initial filter control
8861 * settings. If PE/FCoE are enabled then it will also set the per PF
8862 * based filter sizes required for them. It also enables Flow director,
8863 * ethertype and macvlan type filter settings for the pf.
8865 * Returns 0 on success, negative on failure
8867 static int i40e_setup_pf_filter_control(struct i40e_pf *pf)
8869 struct i40e_filter_control_settings *settings = &pf->filter_settings;
8871 settings->hash_lut_size = I40E_HASH_LUT_SIZE_128;
8873 /* Flow Director is enabled */
8874 if (pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED))
8875 settings->enable_fdir = true;
8877 /* Ethtype and MACVLAN filters enabled for PF */
8878 settings->enable_ethtype = true;
8879 settings->enable_macvlan = true;
8881 if (i40e_set_filter_control(&pf->hw, settings))
8887 #define INFO_STRING_LEN 255
8888 static void i40e_print_features(struct i40e_pf *pf)
8890 struct i40e_hw *hw = &pf->hw;
8893 string = kzalloc(INFO_STRING_LEN, GFP_KERNEL);
8895 dev_err(&pf->pdev->dev, "Features string allocation failed\n");
8901 buf += sprintf(string, "Features: PF-id[%d] ", hw->pf_id);
8902 #ifdef CONFIG_PCI_IOV
8903 buf += sprintf(buf, "VFs: %d ", pf->num_req_vfs);
8905 buf += sprintf(buf, "VSIs: %d QP: %d ", pf->hw.func_caps.num_vsis,
8906 pf->vsi[pf->lan_vsi]->num_queue_pairs);
8908 if (pf->flags & I40E_FLAG_RSS_ENABLED)
8909 buf += sprintf(buf, "RSS ");
8910 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED)
8911 buf += sprintf(buf, "FD_ATR ");
8912 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
8913 buf += sprintf(buf, "FD_SB ");
8914 buf += sprintf(buf, "NTUPLE ");
8916 if (pf->flags & I40E_FLAG_DCB_CAPABLE)
8917 buf += sprintf(buf, "DCB ");
8918 if (pf->flags & I40E_FLAG_PTP)
8919 buf += sprintf(buf, "PTP ");
8921 if (pf->flags & I40E_FLAG_FCOE_ENABLED)
8922 buf += sprintf(buf, "FCOE ");
8925 BUG_ON(buf > (string + INFO_STRING_LEN));
8926 dev_info(&pf->pdev->dev, "%s\n", string);
8931 * i40e_probe - Device initialization routine
8932 * @pdev: PCI device information struct
8933 * @ent: entry in i40e_pci_tbl
8935 * i40e_probe initializes a pf identified by a pci_dev structure.
8936 * The OS initialization, configuring of the pf private structure,
8937 * and a hardware reset occur.
8939 * Returns 0 on success, negative on failure
8941 static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
8945 static u16 pfs_found;
8951 err = pci_enable_device_mem(pdev);
8955 /* set up for high or low dma */
8956 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
8958 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
8961 "DMA configuration failed: 0x%x\n", err);
8966 /* set up pci connections */
8967 err = pci_request_selected_regions(pdev, pci_select_bars(pdev,
8968 IORESOURCE_MEM), i40e_driver_name);
8970 dev_info(&pdev->dev,
8971 "pci_request_selected_regions failed %d\n", err);
8975 pci_enable_pcie_error_reporting(pdev);
8976 pci_set_master(pdev);
8978 /* Now that we have a PCI connection, we need to do the
8979 * low level device setup. This is primarily setting up
8980 * the Admin Queue structures and then querying for the
8981 * device's current profile information.
8983 pf = kzalloc(sizeof(*pf), GFP_KERNEL);
8990 set_bit(__I40E_DOWN, &pf->state);
8994 hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
8995 pci_resource_len(pdev, 0));
8998 dev_info(&pdev->dev, "ioremap(0x%04x, 0x%04x) failed: 0x%x\n",
8999 (unsigned int)pci_resource_start(pdev, 0),
9000 (unsigned int)pci_resource_len(pdev, 0), err);
9003 hw->vendor_id = pdev->vendor;
9004 hw->device_id = pdev->device;
9005 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
9006 hw->subsystem_vendor_id = pdev->subsystem_vendor;
9007 hw->subsystem_device_id = pdev->subsystem_device;
9008 hw->bus.device = PCI_SLOT(pdev->devfn);
9009 hw->bus.func = PCI_FUNC(pdev->devfn);
9010 pf->instance = pfs_found;
9012 /* do a special CORER for clearing PXE mode once at init */
9013 if (hw->revision_id == 0 &&
9014 (rd32(hw, I40E_GLLAN_RCTL_0) & I40E_GLLAN_RCTL_0_PXE_MODE_MASK)) {
9015 wr32(hw, I40E_GLGEN_RTRIG, I40E_GLGEN_RTRIG_CORER_MASK);
9020 i40e_clear_pxe_mode(hw);
9023 /* Reset here to make sure all is clean and to define PF 'n' */
9025 err = i40e_pf_reset(hw);
9027 dev_info(&pdev->dev, "Initial pf_reset failed: %d\n", err);
9032 hw->aq.num_arq_entries = I40E_AQ_LEN;
9033 hw->aq.num_asq_entries = I40E_AQ_LEN;
9034 hw->aq.arq_buf_size = I40E_MAX_AQ_BUF_SIZE;
9035 hw->aq.asq_buf_size = I40E_MAX_AQ_BUF_SIZE;
9036 pf->adminq_work_limit = I40E_AQ_WORK_LIMIT;
9037 snprintf(pf->misc_int_name, sizeof(pf->misc_int_name) - 1,
9039 dev_driver_string(&pf->pdev->dev), pf->hw.pf_id);
9041 err = i40e_init_shared_code(hw);
9043 dev_info(&pdev->dev, "init_shared_code failed: %d\n", err);
9047 /* set up a default setting for link flow control */
9048 pf->hw.fc.requested_mode = I40E_FC_NONE;
9050 err = i40e_init_adminq(hw);
9051 dev_info(&pdev->dev, "%s\n", i40e_fw_version_str(hw));
9053 dev_info(&pdev->dev,
9054 "The driver for the device stopped because the NVM image is newer than expected. You must install the most recent version of the network driver.\n");
9058 if (hw->aq.api_maj_ver == I40E_FW_API_VERSION_MAJOR &&
9059 hw->aq.api_min_ver > I40E_FW_API_VERSION_MINOR)
9060 dev_info(&pdev->dev,
9061 "The driver for the device detected a newer version of the NVM image than expected. Please install the most recent version of the network driver.\n");
9062 else if (hw->aq.api_maj_ver < I40E_FW_API_VERSION_MAJOR ||
9063 hw->aq.api_min_ver < (I40E_FW_API_VERSION_MINOR - 1))
9064 dev_info(&pdev->dev,
9065 "The driver for the device detected an older version of the NVM image than expected. Please update the NVM image.\n");
9068 i40e_verify_eeprom(pf);
9070 /* Rev 0 hardware was never productized */
9071 if (hw->revision_id < 1)
9072 dev_warn(&pdev->dev, "This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\n");
9074 i40e_clear_pxe_mode(hw);
9075 err = i40e_get_capabilities(pf);
9077 goto err_adminq_setup;
9079 err = i40e_sw_init(pf);
9081 dev_info(&pdev->dev, "sw_init failed: %d\n", err);
9085 err = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
9086 hw->func_caps.num_rx_qp,
9087 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
9089 dev_info(&pdev->dev, "init_lan_hmc failed: %d\n", err);
9090 goto err_init_lan_hmc;
9093 err = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
9095 dev_info(&pdev->dev, "configure_lan_hmc failed: %d\n", err);
9097 goto err_configure_lan_hmc;
9100 i40e_get_mac_addr(hw, hw->mac.addr);
9101 if (!is_valid_ether_addr(hw->mac.addr)) {
9102 dev_info(&pdev->dev, "invalid MAC address %pM\n", hw->mac.addr);
9106 dev_info(&pdev->dev, "MAC address: %pM\n", hw->mac.addr);
9107 ether_addr_copy(hw->mac.perm_addr, hw->mac.addr);
9108 i40e_get_port_mac_addr(hw, hw->mac.port_addr);
9109 if (is_valid_ether_addr(hw->mac.port_addr))
9110 pf->flags |= I40E_FLAG_PORT_ID_VALID;
9112 err = i40e_get_san_mac_addr(hw, hw->mac.san_addr);
9114 dev_info(&pdev->dev,
9115 "(non-fatal) SAN MAC retrieval failed: %d\n", err);
9116 if (!is_valid_ether_addr(hw->mac.san_addr)) {
9117 dev_warn(&pdev->dev, "invalid SAN MAC address %pM, falling back to LAN MAC\n",
9119 ether_addr_copy(hw->mac.san_addr, hw->mac.addr);
9121 dev_info(&pf->pdev->dev, "SAN MAC: %pM\n", hw->mac.san_addr);
9122 #endif /* I40E_FCOE */
9124 pci_set_drvdata(pdev, pf);
9125 pci_save_state(pdev);
9126 #ifdef CONFIG_I40E_DCB
9127 err = i40e_init_pf_dcb(pf);
9129 dev_info(&pdev->dev, "init_pf_dcb failed: %d\n", err);
9130 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
9131 /* Continue without DCB enabled */
9133 #endif /* CONFIG_I40E_DCB */
9135 /* set up periodic task facility */
9136 setup_timer(&pf->service_timer, i40e_service_timer, (unsigned long)pf);
9137 pf->service_timer_period = HZ;
9139 INIT_WORK(&pf->service_task, i40e_service_task);
9140 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
9141 pf->flags |= I40E_FLAG_NEED_LINK_UPDATE;
9142 pf->link_check_timeout = jiffies;
9144 /* WoL defaults to disabled */
9146 device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en);
9148 /* set up the main switch operations */
9149 i40e_determine_queue_usage(pf);
9150 i40e_init_interrupt_scheme(pf);
9152 /* The number of VSIs reported by the FW is the minimum guaranteed
9153 * to us; HW supports far more and we share the remaining pool with
9154 * the other PFs. We allocate space for more than the guarantee with
9155 * the understanding that we might not get them all later.
9157 if (pf->hw.func_caps.num_vsis < I40E_MIN_VSI_ALLOC)
9158 pf->num_alloc_vsi = I40E_MIN_VSI_ALLOC;
9160 pf->num_alloc_vsi = pf->hw.func_caps.num_vsis;
9162 /* Set up the *vsi struct and our local tracking of the MAIN PF vsi. */
9163 len = sizeof(struct i40e_vsi *) * pf->num_alloc_vsi;
9164 pf->vsi = kzalloc(len, GFP_KERNEL);
9167 goto err_switch_setup;
9170 err = i40e_setup_pf_switch(pf, false);
9172 dev_info(&pdev->dev, "setup_pf_switch failed: %d\n", err);
9175 /* if FDIR VSI was set up, start it now */
9176 for (i = 0; i < pf->num_alloc_vsi; i++) {
9177 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
9178 i40e_vsi_open(pf->vsi[i]);
9183 /* driver is only interested in link up/down and module qualification
9184 * reports from firmware
9186 err = i40e_aq_set_phy_int_mask(&pf->hw,
9187 I40E_AQ_EVENT_LINK_UPDOWN |
9188 I40E_AQ_EVENT_MODULE_QUAL_FAIL, NULL);
9190 dev_info(&pf->pdev->dev, "set phy mask fail, aq_err %d\n", err);
9193 err = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
9195 dev_info(&pf->pdev->dev, "link restart failed, aq_err=%d\n",
9196 pf->hw.aq.asq_last_status);
9199 /* The main driver is (mostly) up and happy. We need to set this state
9200 * before setting up the misc vector or we get a race and the vector
9201 * ends up disabled forever.
9203 clear_bit(__I40E_DOWN, &pf->state);
9205 /* In case of MSIX we are going to setup the misc vector right here
9206 * to handle admin queue events etc. In case of legacy and MSI
9207 * the misc functionality and queue processing is combined in
9208 * the same vector and that gets setup at open.
9210 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
9211 err = i40e_setup_misc_vector(pf);
9213 dev_info(&pdev->dev,
9214 "setup of misc vector failed: %d\n", err);
9219 #ifdef CONFIG_PCI_IOV
9220 /* prep for VF support */
9221 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
9222 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
9223 !test_bit(__I40E_BAD_EEPROM, &pf->state)) {
9226 /* disable link interrupts for VFs */
9227 val = rd32(hw, I40E_PFGEN_PORTMDIO_NUM);
9228 val &= ~I40E_PFGEN_PORTMDIO_NUM_VFLINK_STAT_ENA_MASK;
9229 wr32(hw, I40E_PFGEN_PORTMDIO_NUM, val);
9232 if (pci_num_vf(pdev)) {
9233 dev_info(&pdev->dev,
9234 "Active VFs found, allocating resources.\n");
9235 err = i40e_alloc_vfs(pf, pci_num_vf(pdev));
9237 dev_info(&pdev->dev,
9238 "Error %d allocating resources for existing VFs\n",
9242 #endif /* CONFIG_PCI_IOV */
9246 i40e_dbg_pf_init(pf);
9248 /* tell the firmware that we're starting */
9249 i40e_send_version(pf);
9251 /* since everything's happy, start the service_task timer */
9252 mod_timer(&pf->service_timer,
9253 round_jiffies(jiffies + pf->service_timer_period));
9256 /* create FCoE interface */
9257 i40e_fcoe_vsi_setup(pf);
9260 /* Get the negotiated link width and speed from PCI config space */
9261 pcie_capability_read_word(pf->pdev, PCI_EXP_LNKSTA, &link_status);
9263 i40e_set_pci_config_data(hw, link_status);
9265 dev_info(&pdev->dev, "PCI-Express: %s %s\n",
9266 (hw->bus.speed == i40e_bus_speed_8000 ? "Speed 8.0GT/s" :
9267 hw->bus.speed == i40e_bus_speed_5000 ? "Speed 5.0GT/s" :
9268 hw->bus.speed == i40e_bus_speed_2500 ? "Speed 2.5GT/s" :
9270 (hw->bus.width == i40e_bus_width_pcie_x8 ? "Width x8" :
9271 hw->bus.width == i40e_bus_width_pcie_x4 ? "Width x4" :
9272 hw->bus.width == i40e_bus_width_pcie_x2 ? "Width x2" :
9273 hw->bus.width == i40e_bus_width_pcie_x1 ? "Width x1" :
9276 if (hw->bus.width < i40e_bus_width_pcie_x8 ||
9277 hw->bus.speed < i40e_bus_speed_8000) {
9278 dev_warn(&pdev->dev, "PCI-Express bandwidth available for this device may be insufficient for optimal performance.\n");
9279 dev_warn(&pdev->dev, "Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\n");
9282 /* print a string summarizing features */
9283 i40e_print_features(pf);
9287 /* Unwind what we've done if something failed in the setup */
9289 set_bit(__I40E_DOWN, &pf->state);
9290 i40e_clear_interrupt_scheme(pf);
9293 i40e_reset_interrupt_capability(pf);
9294 del_timer_sync(&pf->service_timer);
9296 err_configure_lan_hmc:
9297 (void)i40e_shutdown_lan_hmc(hw);
9300 kfree(pf->irq_pile);
9303 (void)i40e_shutdown_adminq(hw);
9305 iounmap(hw->hw_addr);
9309 pci_disable_pcie_error_reporting(pdev);
9310 pci_release_selected_regions(pdev,
9311 pci_select_bars(pdev, IORESOURCE_MEM));
9314 pci_disable_device(pdev);
9319 * i40e_remove - Device removal routine
9320 * @pdev: PCI device information struct
9322 * i40e_remove is called by the PCI subsystem to alert the driver
9323 * that is should release a PCI device. This could be caused by a
9324 * Hot-Plug event, or because the driver is going to be removed from
9327 static void i40e_remove(struct pci_dev *pdev)
9329 struct i40e_pf *pf = pci_get_drvdata(pdev);
9330 i40e_status ret_code;
9333 i40e_dbg_pf_exit(pf);
9337 /* no more scheduling of any task */
9338 set_bit(__I40E_DOWN, &pf->state);
9339 del_timer_sync(&pf->service_timer);
9340 cancel_work_sync(&pf->service_task);
9342 if (pf->flags & I40E_FLAG_SRIOV_ENABLED) {
9344 pf->flags &= ~I40E_FLAG_SRIOV_ENABLED;
9347 i40e_fdir_teardown(pf);
9349 /* If there is a switch structure or any orphans, remove them.
9350 * This will leave only the PF's VSI remaining.
9352 for (i = 0; i < I40E_MAX_VEB; i++) {
9356 if (pf->veb[i]->uplink_seid == pf->mac_seid ||
9357 pf->veb[i]->uplink_seid == 0)
9358 i40e_switch_branch_release(pf->veb[i]);
9361 /* Now we can shutdown the PF's VSI, just before we kill
9364 if (pf->vsi[pf->lan_vsi])
9365 i40e_vsi_release(pf->vsi[pf->lan_vsi]);
9367 i40e_stop_misc_vector(pf);
9368 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
9369 synchronize_irq(pf->msix_entries[0].vector);
9370 free_irq(pf->msix_entries[0].vector, pf);
9373 /* shutdown and destroy the HMC */
9374 if (pf->hw.hmc.hmc_obj) {
9375 ret_code = i40e_shutdown_lan_hmc(&pf->hw);
9377 dev_warn(&pdev->dev,
9378 "Failed to destroy the HMC resources: %d\n",
9382 /* shutdown the adminq */
9383 ret_code = i40e_shutdown_adminq(&pf->hw);
9385 dev_warn(&pdev->dev,
9386 "Failed to destroy the Admin Queue resources: %d\n",
9389 /* Clear all dynamic memory lists of rings, q_vectors, and VSIs */
9390 i40e_clear_interrupt_scheme(pf);
9391 for (i = 0; i < pf->num_alloc_vsi; i++) {
9393 i40e_vsi_clear_rings(pf->vsi[i]);
9394 i40e_vsi_clear(pf->vsi[i]);
9399 for (i = 0; i < I40E_MAX_VEB; i++) {
9405 kfree(pf->irq_pile);
9408 iounmap(pf->hw.hw_addr);
9410 pci_release_selected_regions(pdev,
9411 pci_select_bars(pdev, IORESOURCE_MEM));
9413 pci_disable_pcie_error_reporting(pdev);
9414 pci_disable_device(pdev);
9418 * i40e_pci_error_detected - warning that something funky happened in PCI land
9419 * @pdev: PCI device information struct
9421 * Called to warn that something happened and the error handling steps
9422 * are in progress. Allows the driver to quiesce things, be ready for
9425 static pci_ers_result_t i40e_pci_error_detected(struct pci_dev *pdev,
9426 enum pci_channel_state error)
9428 struct i40e_pf *pf = pci_get_drvdata(pdev);
9430 dev_info(&pdev->dev, "%s: error %d\n", __func__, error);
9432 /* shutdown all operations */
9433 if (!test_bit(__I40E_SUSPENDED, &pf->state)) {
9435 i40e_prep_for_reset(pf);
9439 /* Request a slot reset */
9440 return PCI_ERS_RESULT_NEED_RESET;
9444 * i40e_pci_error_slot_reset - a PCI slot reset just happened
9445 * @pdev: PCI device information struct
9447 * Called to find if the driver can work with the device now that
9448 * the pci slot has been reset. If a basic connection seems good
9449 * (registers are readable and have sane content) then return a
9450 * happy little PCI_ERS_RESULT_xxx.
9452 static pci_ers_result_t i40e_pci_error_slot_reset(struct pci_dev *pdev)
9454 struct i40e_pf *pf = pci_get_drvdata(pdev);
9455 pci_ers_result_t result;
9459 dev_info(&pdev->dev, "%s\n", __func__);
9460 if (pci_enable_device_mem(pdev)) {
9461 dev_info(&pdev->dev,
9462 "Cannot re-enable PCI device after reset.\n");
9463 result = PCI_ERS_RESULT_DISCONNECT;
9465 pci_set_master(pdev);
9466 pci_restore_state(pdev);
9467 pci_save_state(pdev);
9468 pci_wake_from_d3(pdev, false);
9470 reg = rd32(&pf->hw, I40E_GLGEN_RTRIG);
9472 result = PCI_ERS_RESULT_RECOVERED;
9474 result = PCI_ERS_RESULT_DISCONNECT;
9477 err = pci_cleanup_aer_uncorrect_error_status(pdev);
9479 dev_info(&pdev->dev,
9480 "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n",
9482 /* non-fatal, continue */
9489 * i40e_pci_error_resume - restart operations after PCI error recovery
9490 * @pdev: PCI device information struct
9492 * Called to allow the driver to bring things back up after PCI error
9493 * and/or reset recovery has finished.
9495 static void i40e_pci_error_resume(struct pci_dev *pdev)
9497 struct i40e_pf *pf = pci_get_drvdata(pdev);
9499 dev_info(&pdev->dev, "%s\n", __func__);
9500 if (test_bit(__I40E_SUSPENDED, &pf->state))
9504 i40e_handle_reset_warning(pf);
9509 * i40e_shutdown - PCI callback for shutting down
9510 * @pdev: PCI device information struct
9512 static void i40e_shutdown(struct pci_dev *pdev)
9514 struct i40e_pf *pf = pci_get_drvdata(pdev);
9515 struct i40e_hw *hw = &pf->hw;
9517 set_bit(__I40E_SUSPENDED, &pf->state);
9518 set_bit(__I40E_DOWN, &pf->state);
9520 i40e_prep_for_reset(pf);
9523 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
9524 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
9526 if (system_state == SYSTEM_POWER_OFF) {
9527 pci_wake_from_d3(pdev, pf->wol_en);
9528 pci_set_power_state(pdev, PCI_D3hot);
9534 * i40e_suspend - PCI callback for moving to D3
9535 * @pdev: PCI device information struct
9537 static int i40e_suspend(struct pci_dev *pdev, pm_message_t state)
9539 struct i40e_pf *pf = pci_get_drvdata(pdev);
9540 struct i40e_hw *hw = &pf->hw;
9542 set_bit(__I40E_SUSPENDED, &pf->state);
9543 set_bit(__I40E_DOWN, &pf->state);
9545 i40e_prep_for_reset(pf);
9548 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
9549 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
9551 pci_wake_from_d3(pdev, pf->wol_en);
9552 pci_set_power_state(pdev, PCI_D3hot);
9558 * i40e_resume - PCI callback for waking up from D3
9559 * @pdev: PCI device information struct
9561 static int i40e_resume(struct pci_dev *pdev)
9563 struct i40e_pf *pf = pci_get_drvdata(pdev);
9566 pci_set_power_state(pdev, PCI_D0);
9567 pci_restore_state(pdev);
9568 /* pci_restore_state() clears dev->state_saves, so
9569 * call pci_save_state() again to restore it.
9571 pci_save_state(pdev);
9573 err = pci_enable_device_mem(pdev);
9576 "%s: Cannot enable PCI device from suspend\n",
9580 pci_set_master(pdev);
9582 /* no wakeup events while running */
9583 pci_wake_from_d3(pdev, false);
9585 /* handling the reset will rebuild the device state */
9586 if (test_and_clear_bit(__I40E_SUSPENDED, &pf->state)) {
9587 clear_bit(__I40E_DOWN, &pf->state);
9589 i40e_reset_and_rebuild(pf, false);
9597 static const struct pci_error_handlers i40e_err_handler = {
9598 .error_detected = i40e_pci_error_detected,
9599 .slot_reset = i40e_pci_error_slot_reset,
9600 .resume = i40e_pci_error_resume,
9603 static struct pci_driver i40e_driver = {
9604 .name = i40e_driver_name,
9605 .id_table = i40e_pci_tbl,
9606 .probe = i40e_probe,
9607 .remove = i40e_remove,
9609 .suspend = i40e_suspend,
9610 .resume = i40e_resume,
9612 .shutdown = i40e_shutdown,
9613 .err_handler = &i40e_err_handler,
9614 .sriov_configure = i40e_pci_sriov_configure,
9618 * i40e_init_module - Driver registration routine
9620 * i40e_init_module is the first routine called when the driver is
9621 * loaded. All it does is register with the PCI subsystem.
9623 static int __init i40e_init_module(void)
9625 pr_info("%s: %s - version %s\n", i40e_driver_name,
9626 i40e_driver_string, i40e_driver_version_str);
9627 pr_info("%s: %s\n", i40e_driver_name, i40e_copyright);
9629 return pci_register_driver(&i40e_driver);
9631 module_init(i40e_init_module);
9634 * i40e_exit_module - Driver exit cleanup routine
9636 * i40e_exit_module is called just before the driver is removed
9639 static void __exit i40e_exit_module(void)
9641 pci_unregister_driver(&i40e_driver);
9644 module_exit(i40e_exit_module);