2 * Fast Ethernet Controller (FEC) driver for Motorola MPC8xx.
3 * Copyright (c) 1997 Dan Malek (dmalek@jlc.net)
5 * Right now, I am very wasteful with the buffers. I allocate memory
6 * pages and then divide them into 2K frame buffers. This way I know I
7 * have buffers large enough to hold one frame within one buffer descriptor.
8 * Once I get this working, I will use 64 or 128 byte CPM buffers, which
9 * will be much more memory efficient and will easily handle lots of
12 * Much better multiple PHY support by Magnus Damm.
13 * Copyright (c) 2000 Ericsson Radio Systems AB.
15 * Support for FEC controller of ColdFire processors.
16 * Copyright (c) 2001-2005 Greg Ungerer (gerg@snapgear.com)
18 * Bug fixes and cleanup by Philippe De Muyter (phdm@macqel.be)
19 * Copyright (c) 2004-2006 Macq Electronique SA.
21 * Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
24 #include <linux/module.h>
25 #include <linux/kernel.h>
26 #include <linux/string.h>
27 #include <linux/ptrace.h>
28 #include <linux/errno.h>
29 #include <linux/ioport.h>
30 #include <linux/slab.h>
31 #include <linux/interrupt.h>
32 #include <linux/init.h>
33 #include <linux/delay.h>
34 #include <linux/netdevice.h>
35 #include <linux/etherdevice.h>
36 #include <linux/skbuff.h>
40 #include <linux/tcp.h>
41 #include <linux/udp.h>
42 #include <linux/icmp.h>
43 #include <linux/spinlock.h>
44 #include <linux/workqueue.h>
45 #include <linux/bitops.h>
47 #include <linux/irq.h>
48 #include <linux/clk.h>
49 #include <linux/platform_device.h>
50 #include <linux/phy.h>
51 #include <linux/fec.h>
53 #include <linux/of_device.h>
54 #include <linux/of_gpio.h>
55 #include <linux/of_net.h>
56 #include <linux/pinctrl/consumer.h>
57 #include <linux/regulator/consumer.h>
59 #include <asm/cacheflush.h>
63 #if defined(CONFIG_ARM)
64 #define FEC_ALIGNMENT 0xf
66 #define FEC_ALIGNMENT 0x3
69 #define DRIVER_NAME "fec"
70 #define FEC_NAPI_WEIGHT 64
72 /* Pause frame feild and FIFO threshold */
73 #define FEC_ENET_FCE (1 << 5)
74 #define FEC_ENET_RSEM_V 0x84
75 #define FEC_ENET_RSFL_V 16
76 #define FEC_ENET_RAEM_V 0x8
77 #define FEC_ENET_RAFL_V 0x8
78 #define FEC_ENET_OPD_V 0xFFF0
80 /* Controller is ENET-MAC */
81 #define FEC_QUIRK_ENET_MAC (1 << 0)
82 /* Controller needs driver to swap frame */
83 #define FEC_QUIRK_SWAP_FRAME (1 << 1)
84 /* Controller uses gasket */
85 #define FEC_QUIRK_USE_GASKET (1 << 2)
86 /* Controller has GBIT support */
87 #define FEC_QUIRK_HAS_GBIT (1 << 3)
88 /* Controller has extend desc buffer */
89 #define FEC_QUIRK_HAS_BUFDESC_EX (1 << 4)
91 static struct platform_device_id fec_devtype[] = {
93 /* keep it for coldfire */
98 .driver_data = FEC_QUIRK_USE_GASKET,
104 .driver_data = FEC_QUIRK_ENET_MAC | FEC_QUIRK_SWAP_FRAME,
107 .driver_data = FEC_QUIRK_ENET_MAC | FEC_QUIRK_HAS_GBIT |
108 FEC_QUIRK_HAS_BUFDESC_EX,
111 .driver_data = FEC_QUIRK_ENET_MAC,
116 MODULE_DEVICE_TABLE(platform, fec_devtype);
119 IMX25_FEC = 1, /* runs on i.mx25/50/53 */
120 IMX27_FEC, /* runs on i.mx27/35/51 */
126 static const struct of_device_id fec_dt_ids[] = {
127 { .compatible = "fsl,imx25-fec", .data = &fec_devtype[IMX25_FEC], },
128 { .compatible = "fsl,imx27-fec", .data = &fec_devtype[IMX27_FEC], },
129 { .compatible = "fsl,imx28-fec", .data = &fec_devtype[IMX28_FEC], },
130 { .compatible = "fsl,imx6q-fec", .data = &fec_devtype[IMX6Q_FEC], },
131 { .compatible = "fsl,mvf-fec", .data = &fec_devtype[MVF_FEC], },
134 MODULE_DEVICE_TABLE(of, fec_dt_ids);
136 static unsigned char macaddr[ETH_ALEN];
137 module_param_array(macaddr, byte, NULL, 0);
138 MODULE_PARM_DESC(macaddr, "FEC Ethernet MAC address");
140 #if defined(CONFIG_M5272)
142 * Some hardware gets it MAC address out of local flash memory.
143 * if this is non-zero then assume it is the address to get MAC from.
145 #if defined(CONFIG_NETtel)
146 #define FEC_FLASHMAC 0xf0006006
147 #elif defined(CONFIG_GILBARCONAP) || defined(CONFIG_SCALES)
148 #define FEC_FLASHMAC 0xf0006000
149 #elif defined(CONFIG_CANCam)
150 #define FEC_FLASHMAC 0xf0020000
151 #elif defined (CONFIG_M5272C3)
152 #define FEC_FLASHMAC (0xffe04000 + 4)
153 #elif defined(CONFIG_MOD5272)
154 #define FEC_FLASHMAC 0xffc0406b
156 #define FEC_FLASHMAC 0
158 #endif /* CONFIG_M5272 */
160 #if (((RX_RING_SIZE + TX_RING_SIZE) * 32) > PAGE_SIZE)
161 #error "FEC: descriptor ring size constants too large"
164 /* Interrupt events/masks. */
165 #define FEC_ENET_HBERR ((uint)0x80000000) /* Heartbeat error */
166 #define FEC_ENET_BABR ((uint)0x40000000) /* Babbling receiver */
167 #define FEC_ENET_BABT ((uint)0x20000000) /* Babbling transmitter */
168 #define FEC_ENET_GRA ((uint)0x10000000) /* Graceful stop complete */
169 #define FEC_ENET_TXF ((uint)0x08000000) /* Full frame transmitted */
170 #define FEC_ENET_TXB ((uint)0x04000000) /* A buffer was transmitted */
171 #define FEC_ENET_RXF ((uint)0x02000000) /* Full frame received */
172 #define FEC_ENET_RXB ((uint)0x01000000) /* A buffer was received */
173 #define FEC_ENET_MII ((uint)0x00800000) /* MII interrupt */
174 #define FEC_ENET_EBERR ((uint)0x00400000) /* SDMA bus error */
176 #define FEC_DEFAULT_IMASK (FEC_ENET_TXF | FEC_ENET_RXF | FEC_ENET_MII)
177 #define FEC_RX_DISABLED_IMASK (FEC_DEFAULT_IMASK & (~FEC_ENET_RXF))
179 /* The FEC stores dest/src/type, data, and checksum for receive packets.
181 #define PKT_MAXBUF_SIZE 1518
182 #define PKT_MINBUF_SIZE 64
183 #define PKT_MAXBLR_SIZE 1520
185 /* FEC receive acceleration */
186 #define FEC_RACC_IPDIS (1 << 1)
187 #define FEC_RACC_PRODIS (1 << 2)
188 #define FEC_RACC_OPTIONS (FEC_RACC_IPDIS | FEC_RACC_PRODIS)
191 * The 5270/5271/5280/5282/532x RX control register also contains maximum frame
192 * size bits. Other FEC hardware does not, so we need to take that into
193 * account when setting it.
195 #if defined(CONFIG_M523x) || defined(CONFIG_M527x) || defined(CONFIG_M528x) || \
196 defined(CONFIG_M520x) || defined(CONFIG_M532x) || defined(CONFIG_ARM)
197 #define OPT_FRAME_SIZE (PKT_MAXBUF_SIZE << 16)
199 #define OPT_FRAME_SIZE 0
202 /* FEC MII MMFR bits definition */
203 #define FEC_MMFR_ST (1 << 30)
204 #define FEC_MMFR_OP_READ (2 << 28)
205 #define FEC_MMFR_OP_WRITE (1 << 28)
206 #define FEC_MMFR_PA(v) ((v & 0x1f) << 23)
207 #define FEC_MMFR_RA(v) ((v & 0x1f) << 18)
208 #define FEC_MMFR_TA (2 << 16)
209 #define FEC_MMFR_DATA(v) (v & 0xffff)
211 #define FEC_MII_TIMEOUT 30000 /* us */
213 /* Transmitter timeout */
214 #define TX_TIMEOUT (2 * HZ)
216 #define FEC_PAUSE_FLAG_AUTONEG 0x1
217 #define FEC_PAUSE_FLAG_ENABLE 0x2
221 static struct bufdesc *fec_enet_get_nextdesc(struct bufdesc *bdp, int is_ex)
223 struct bufdesc_ex *ex = (struct bufdesc_ex *)bdp;
225 return (struct bufdesc *)(ex + 1);
230 static struct bufdesc *fec_enet_get_prevdesc(struct bufdesc *bdp, int is_ex)
232 struct bufdesc_ex *ex = (struct bufdesc_ex *)bdp;
234 return (struct bufdesc *)(ex - 1);
239 static void *swap_buffer(void *bufaddr, int len)
242 unsigned int *buf = bufaddr;
244 for (i = 0; i < (len + 3) / 4; i++, buf++)
245 *buf = cpu_to_be32(*buf);
251 fec_enet_clear_csum(struct sk_buff *skb, struct net_device *ndev)
253 /* Only run for packets requiring a checksum. */
254 if (skb->ip_summed != CHECKSUM_PARTIAL)
257 if (unlikely(skb_cow_head(skb, 0)))
260 *(__sum16 *)(skb->head + skb->csum_start + skb->csum_offset) = 0;
266 fec_enet_start_xmit(struct sk_buff *skb, struct net_device *ndev)
268 struct fec_enet_private *fep = netdev_priv(ndev);
269 const struct platform_device_id *id_entry =
270 platform_get_device_id(fep->pdev);
273 unsigned short status;
277 /* Link is down or auto-negotiation is in progress. */
278 return NETDEV_TX_BUSY;
281 /* Fill in a Tx ring entry */
284 status = bdp->cbd_sc;
286 if (status & BD_ENET_TX_READY) {
287 /* Ooops. All transmit buffers are full. Bail out.
288 * This should not happen, since ndev->tbusy should be set.
290 netdev_err(ndev, "tx queue full!\n");
291 return NETDEV_TX_BUSY;
294 /* Protocol checksum off-load for TCP and UDP. */
295 if (fec_enet_clear_csum(skb, ndev)) {
300 /* Clear all of the status flags */
301 status &= ~BD_ENET_TX_STATS;
303 /* Set buffer length and buffer pointer */
305 bdp->cbd_datlen = skb->len;
308 * On some FEC implementations data must be aligned on
309 * 4-byte boundaries. Use bounce buffers to copy data
310 * and get it aligned. Ugh.
313 index = (struct bufdesc_ex *)bdp -
314 (struct bufdesc_ex *)fep->tx_bd_base;
316 index = bdp - fep->tx_bd_base;
318 if (((unsigned long) bufaddr) & FEC_ALIGNMENT) {
319 memcpy(fep->tx_bounce[index], skb->data, skb->len);
320 bufaddr = fep->tx_bounce[index];
324 * Some design made an incorrect assumption on endian mode of
325 * the system that it's running on. As the result, driver has to
326 * swap every frame going to and coming from the controller.
328 if (id_entry->driver_data & FEC_QUIRK_SWAP_FRAME)
329 swap_buffer(bufaddr, skb->len);
331 /* Save skb pointer */
332 fep->tx_skbuff[index] = skb;
334 /* Push the data cache so the CPM does not get stale memory
337 bdp->cbd_bufaddr = dma_map_single(&fep->pdev->dev, bufaddr,
338 FEC_ENET_TX_FRSIZE, DMA_TO_DEVICE);
340 /* Send it on its way. Tell FEC it's ready, interrupt when done,
341 * it's the last BD of the frame, and to put the CRC on the end.
343 status |= (BD_ENET_TX_READY | BD_ENET_TX_INTR
344 | BD_ENET_TX_LAST | BD_ENET_TX_TC);
345 bdp->cbd_sc = status;
347 if (fep->bufdesc_ex) {
349 struct bufdesc_ex *ebdp = (struct bufdesc_ex *)bdp;
351 if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP &&
353 ebdp->cbd_esc = (BD_ENET_TX_TS | BD_ENET_TX_INT);
354 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
356 ebdp->cbd_esc = BD_ENET_TX_INT;
358 /* Enable protocol checksum flags
359 * We do not bother with the IP Checksum bits as they
360 * are done by the kernel
362 if (skb->ip_summed == CHECKSUM_PARTIAL)
363 ebdp->cbd_esc |= BD_ENET_TX_PINS;
366 /* If this was the last BD in the ring, start at the beginning again. */
367 if (status & BD_ENET_TX_WRAP)
368 bdp = fep->tx_bd_base;
370 bdp = fec_enet_get_nextdesc(bdp, fep->bufdesc_ex);
374 if (fep->cur_tx == fep->dirty_tx)
375 netif_stop_queue(ndev);
377 /* Trigger transmission start */
378 writel(0, fep->hwp + FEC_X_DES_ACTIVE);
380 skb_tx_timestamp(skb);
385 /* Init RX & TX buffer descriptors
387 static void fec_enet_bd_init(struct net_device *dev)
389 struct fec_enet_private *fep = netdev_priv(dev);
393 /* Initialize the receive buffer descriptors. */
394 bdp = fep->rx_bd_base;
395 for (i = 0; i < RX_RING_SIZE; i++) {
397 /* Initialize the BD for every fragment in the page. */
398 if (bdp->cbd_bufaddr)
399 bdp->cbd_sc = BD_ENET_RX_EMPTY;
402 bdp = fec_enet_get_nextdesc(bdp, fep->bufdesc_ex);
405 /* Set the last buffer to wrap */
406 bdp = fec_enet_get_prevdesc(bdp, fep->bufdesc_ex);
407 bdp->cbd_sc |= BD_SC_WRAP;
409 fep->cur_rx = fep->rx_bd_base;
411 /* ...and the same for transmit */
412 bdp = fep->tx_bd_base;
414 for (i = 0; i < TX_RING_SIZE; i++) {
416 /* Initialize the BD for every fragment in the page. */
418 if (bdp->cbd_bufaddr && fep->tx_skbuff[i]) {
419 dev_kfree_skb_any(fep->tx_skbuff[i]);
420 fep->tx_skbuff[i] = NULL;
422 bdp->cbd_bufaddr = 0;
423 bdp = fec_enet_get_nextdesc(bdp, fep->bufdesc_ex);
426 /* Set the last buffer to wrap */
427 bdp = fec_enet_get_prevdesc(bdp, fep->bufdesc_ex);
428 bdp->cbd_sc |= BD_SC_WRAP;
432 /* This function is called to start or restart the FEC during a link
433 * change. This only happens when switching between half and full
437 fec_restart(struct net_device *ndev, int duplex)
439 struct fec_enet_private *fep = netdev_priv(ndev);
440 const struct platform_device_id *id_entry =
441 platform_get_device_id(fep->pdev);
445 u32 rcntl = OPT_FRAME_SIZE | 0x04;
446 u32 ecntl = 0x2; /* ETHEREN */
448 /* Whack a reset. We should wait for this. */
449 writel(1, fep->hwp + FEC_ECNTRL);
453 * enet-mac reset will reset mac address registers too,
454 * so need to reconfigure it.
456 if (id_entry->driver_data & FEC_QUIRK_ENET_MAC) {
457 memcpy(&temp_mac, ndev->dev_addr, ETH_ALEN);
458 writel(cpu_to_be32(temp_mac[0]), fep->hwp + FEC_ADDR_LOW);
459 writel(cpu_to_be32(temp_mac[1]), fep->hwp + FEC_ADDR_HIGH);
462 /* Clear any outstanding interrupt. */
463 writel(0xffc00000, fep->hwp + FEC_IEVENT);
465 /* Reset all multicast. */
466 writel(0, fep->hwp + FEC_GRP_HASH_TABLE_HIGH);
467 writel(0, fep->hwp + FEC_GRP_HASH_TABLE_LOW);
469 writel(0, fep->hwp + FEC_HASH_TABLE_HIGH);
470 writel(0, fep->hwp + FEC_HASH_TABLE_LOW);
473 /* Set maximum receive buffer size. */
474 writel(PKT_MAXBLR_SIZE, fep->hwp + FEC_R_BUFF_SIZE);
476 fec_enet_bd_init(ndev);
478 /* Set receive and transmit descriptor base. */
479 writel(fep->bd_dma, fep->hwp + FEC_R_DES_START);
481 writel((unsigned long)fep->bd_dma + sizeof(struct bufdesc_ex)
482 * RX_RING_SIZE, fep->hwp + FEC_X_DES_START);
484 writel((unsigned long)fep->bd_dma + sizeof(struct bufdesc)
485 * RX_RING_SIZE, fep->hwp + FEC_X_DES_START);
488 for (i = 0; i <= TX_RING_MOD_MASK; i++) {
489 if (fep->tx_skbuff[i]) {
490 dev_kfree_skb_any(fep->tx_skbuff[i]);
491 fep->tx_skbuff[i] = NULL;
495 /* Enable MII mode */
498 writel(0x04, fep->hwp + FEC_X_CNTRL);
502 writel(0x0, fep->hwp + FEC_X_CNTRL);
505 fep->full_duplex = duplex;
508 writel(fep->phy_speed, fep->hwp + FEC_MII_SPEED);
510 /* set RX checksum */
511 val = readl(fep->hwp + FEC_RACC);
512 if (fep->csum_flags & FLAG_RX_CSUM_ENABLED)
513 val |= FEC_RACC_OPTIONS;
515 val &= ~FEC_RACC_OPTIONS;
516 writel(val, fep->hwp + FEC_RACC);
519 * The phy interface and speed need to get configured
520 * differently on enet-mac.
522 if (id_entry->driver_data & FEC_QUIRK_ENET_MAC) {
523 /* Enable flow control and length check */
524 rcntl |= 0x40000000 | 0x00000020;
526 /* RGMII, RMII or MII */
527 if (fep->phy_interface == PHY_INTERFACE_MODE_RGMII)
529 else if (fep->phy_interface == PHY_INTERFACE_MODE_RMII)
534 /* 1G, 100M or 10M */
536 if (fep->phy_dev->speed == SPEED_1000)
538 else if (fep->phy_dev->speed == SPEED_100)
544 #ifdef FEC_MIIGSK_ENR
545 if (id_entry->driver_data & FEC_QUIRK_USE_GASKET) {
547 /* disable the gasket and wait */
548 writel(0, fep->hwp + FEC_MIIGSK_ENR);
549 while (readl(fep->hwp + FEC_MIIGSK_ENR) & 4)
553 * configure the gasket:
554 * RMII, 50 MHz, no loopback, no echo
555 * MII, 25 MHz, no loopback, no echo
557 cfgr = (fep->phy_interface == PHY_INTERFACE_MODE_RMII)
558 ? BM_MIIGSK_CFGR_RMII : BM_MIIGSK_CFGR_MII;
559 if (fep->phy_dev && fep->phy_dev->speed == SPEED_10)
560 cfgr |= BM_MIIGSK_CFGR_FRCONT_10M;
561 writel(cfgr, fep->hwp + FEC_MIIGSK_CFGR);
563 /* re-enable the gasket */
564 writel(2, fep->hwp + FEC_MIIGSK_ENR);
569 /* enable pause frame*/
570 if ((fep->pause_flag & FEC_PAUSE_FLAG_ENABLE) ||
571 ((fep->pause_flag & FEC_PAUSE_FLAG_AUTONEG) &&
572 fep->phy_dev && fep->phy_dev->pause)) {
573 rcntl |= FEC_ENET_FCE;
575 /* set FIFO threshold parameter to reduce overrun */
576 writel(FEC_ENET_RSEM_V, fep->hwp + FEC_R_FIFO_RSEM);
577 writel(FEC_ENET_RSFL_V, fep->hwp + FEC_R_FIFO_RSFL);
578 writel(FEC_ENET_RAEM_V, fep->hwp + FEC_R_FIFO_RAEM);
579 writel(FEC_ENET_RAFL_V, fep->hwp + FEC_R_FIFO_RAFL);
582 writel(FEC_ENET_OPD_V, fep->hwp + FEC_OPD);
584 rcntl &= ~FEC_ENET_FCE;
587 writel(rcntl, fep->hwp + FEC_R_CNTRL);
589 if (id_entry->driver_data & FEC_QUIRK_ENET_MAC) {
590 /* enable ENET endian swap */
592 /* enable ENET store and forward mode */
593 writel(1 << 8, fep->hwp + FEC_X_WMRK);
599 /* And last, enable the transmit and receive processing */
600 writel(ecntl, fep->hwp + FEC_ECNTRL);
601 writel(0, fep->hwp + FEC_R_DES_ACTIVE);
604 fec_ptp_start_cyclecounter(ndev);
606 /* Enable interrupts we wish to service */
607 writel(FEC_DEFAULT_IMASK, fep->hwp + FEC_IMASK);
611 fec_stop(struct net_device *ndev)
613 struct fec_enet_private *fep = netdev_priv(ndev);
614 const struct platform_device_id *id_entry =
615 platform_get_device_id(fep->pdev);
616 u32 rmii_mode = readl(fep->hwp + FEC_R_CNTRL) & (1 << 8);
618 /* We cannot expect a graceful transmit stop without link !!! */
620 writel(1, fep->hwp + FEC_X_CNTRL); /* Graceful transmit stop */
622 if (!(readl(fep->hwp + FEC_IEVENT) & FEC_ENET_GRA))
623 netdev_err(ndev, "Graceful transmit stop did not complete!\n");
626 /* Whack a reset. We should wait for this. */
627 writel(1, fep->hwp + FEC_ECNTRL);
629 writel(fep->phy_speed, fep->hwp + FEC_MII_SPEED);
630 writel(FEC_DEFAULT_IMASK, fep->hwp + FEC_IMASK);
632 /* We have to keep ENET enabled to have MII interrupt stay working */
633 if (id_entry->driver_data & FEC_QUIRK_ENET_MAC) {
634 writel(2, fep->hwp + FEC_ECNTRL);
635 writel(rmii_mode, fep->hwp + FEC_R_CNTRL);
641 fec_timeout(struct net_device *ndev)
643 struct fec_enet_private *fep = netdev_priv(ndev);
645 ndev->stats.tx_errors++;
647 fec_restart(ndev, fep->full_duplex);
648 netif_wake_queue(ndev);
652 fec_enet_tx(struct net_device *ndev)
654 struct fec_enet_private *fep;
656 unsigned short status;
660 fep = netdev_priv(ndev);
663 /* get next bdp of dirty_tx */
664 if (bdp->cbd_sc & BD_ENET_TX_WRAP)
665 bdp = fep->tx_bd_base;
667 bdp = fec_enet_get_nextdesc(bdp, fep->bufdesc_ex);
669 while (((status = bdp->cbd_sc) & BD_ENET_TX_READY) == 0) {
671 /* current queue is empty */
672 if (bdp == fep->cur_tx)
676 index = (struct bufdesc_ex *)bdp -
677 (struct bufdesc_ex *)fep->tx_bd_base;
679 index = bdp - fep->tx_bd_base;
681 dma_unmap_single(&fep->pdev->dev, bdp->cbd_bufaddr,
682 FEC_ENET_TX_FRSIZE, DMA_TO_DEVICE);
683 bdp->cbd_bufaddr = 0;
685 skb = fep->tx_skbuff[index];
687 /* Check for errors. */
688 if (status & (BD_ENET_TX_HB | BD_ENET_TX_LC |
689 BD_ENET_TX_RL | BD_ENET_TX_UN |
691 ndev->stats.tx_errors++;
692 if (status & BD_ENET_TX_HB) /* No heartbeat */
693 ndev->stats.tx_heartbeat_errors++;
694 if (status & BD_ENET_TX_LC) /* Late collision */
695 ndev->stats.tx_window_errors++;
696 if (status & BD_ENET_TX_RL) /* Retrans limit */
697 ndev->stats.tx_aborted_errors++;
698 if (status & BD_ENET_TX_UN) /* Underrun */
699 ndev->stats.tx_fifo_errors++;
700 if (status & BD_ENET_TX_CSL) /* Carrier lost */
701 ndev->stats.tx_carrier_errors++;
703 ndev->stats.tx_packets++;
706 if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_IN_PROGRESS) &&
708 struct skb_shared_hwtstamps shhwtstamps;
710 struct bufdesc_ex *ebdp = (struct bufdesc_ex *)bdp;
712 memset(&shhwtstamps, 0, sizeof(shhwtstamps));
713 spin_lock_irqsave(&fep->tmreg_lock, flags);
714 shhwtstamps.hwtstamp = ns_to_ktime(
715 timecounter_cyc2time(&fep->tc, ebdp->ts));
716 spin_unlock_irqrestore(&fep->tmreg_lock, flags);
717 skb_tstamp_tx(skb, &shhwtstamps);
720 if (status & BD_ENET_TX_READY)
721 netdev_err(ndev, "HEY! Enet xmit interrupt and TX_READY\n");
723 /* Deferred means some collisions occurred during transmit,
724 * but we eventually sent the packet OK.
726 if (status & BD_ENET_TX_DEF)
727 ndev->stats.collisions++;
729 /* Free the sk buffer associated with this last transmit */
730 dev_kfree_skb_any(skb);
731 fep->tx_skbuff[index] = NULL;
735 /* Update pointer to next buffer descriptor to be transmitted */
736 if (status & BD_ENET_TX_WRAP)
737 bdp = fep->tx_bd_base;
739 bdp = fec_enet_get_nextdesc(bdp, fep->bufdesc_ex);
741 /* Since we have freed up a buffer, the ring is no longer full
743 if (fep->dirty_tx != fep->cur_tx) {
744 if (netif_queue_stopped(ndev))
745 netif_wake_queue(ndev);
752 /* During a receive, the cur_rx points to the current incoming buffer.
753 * When we update through the ring, if the next incoming buffer has
754 * not been given to the system, we just set the empty indicator,
755 * effectively tossing the packet.
758 fec_enet_rx(struct net_device *ndev, int budget)
760 struct fec_enet_private *fep = netdev_priv(ndev);
761 const struct platform_device_id *id_entry =
762 platform_get_device_id(fep->pdev);
764 unsigned short status;
768 int pkt_received = 0;
774 /* First, grab all of the stats for the incoming packet.
775 * These get messed up if we get called due to a busy condition.
779 while (!((status = bdp->cbd_sc) & BD_ENET_RX_EMPTY)) {
781 if (pkt_received >= budget)
785 /* Since we have allocated space to hold a complete frame,
786 * the last indicator should be set.
788 if ((status & BD_ENET_RX_LAST) == 0)
789 netdev_err(ndev, "rcv is not +last\n");
792 goto rx_processing_done;
794 /* Check for errors. */
795 if (status & (BD_ENET_RX_LG | BD_ENET_RX_SH | BD_ENET_RX_NO |
796 BD_ENET_RX_CR | BD_ENET_RX_OV)) {
797 ndev->stats.rx_errors++;
798 if (status & (BD_ENET_RX_LG | BD_ENET_RX_SH)) {
799 /* Frame too long or too short. */
800 ndev->stats.rx_length_errors++;
802 if (status & BD_ENET_RX_NO) /* Frame alignment */
803 ndev->stats.rx_frame_errors++;
804 if (status & BD_ENET_RX_CR) /* CRC Error */
805 ndev->stats.rx_crc_errors++;
806 if (status & BD_ENET_RX_OV) /* FIFO overrun */
807 ndev->stats.rx_fifo_errors++;
810 /* Report late collisions as a frame error.
811 * On this error, the BD is closed, but we don't know what we
812 * have in the buffer. So, just drop this frame on the floor.
814 if (status & BD_ENET_RX_CL) {
815 ndev->stats.rx_errors++;
816 ndev->stats.rx_frame_errors++;
817 goto rx_processing_done;
820 /* Process the incoming frame. */
821 ndev->stats.rx_packets++;
822 pkt_len = bdp->cbd_datlen;
823 ndev->stats.rx_bytes += pkt_len;
824 data = (__u8*)__va(bdp->cbd_bufaddr);
826 dma_unmap_single(&fep->pdev->dev, bdp->cbd_bufaddr,
827 FEC_ENET_TX_FRSIZE, DMA_FROM_DEVICE);
829 if (id_entry->driver_data & FEC_QUIRK_SWAP_FRAME)
830 swap_buffer(data, pkt_len);
832 /* This does 16 byte alignment, exactly what we need.
833 * The packet length includes FCS, but we don't want to
834 * include that when passing upstream as it messes up
835 * bridging applications.
837 skb = netdev_alloc_skb(ndev, pkt_len - 4 + NET_IP_ALIGN);
839 if (unlikely(!skb)) {
840 ndev->stats.rx_dropped++;
842 skb_reserve(skb, NET_IP_ALIGN);
843 skb_put(skb, pkt_len - 4); /* Make room */
844 skb_copy_to_linear_data(skb, data, pkt_len - 4);
845 skb->protocol = eth_type_trans(skb, ndev);
847 /* Get receive timestamp from the skb */
848 if (fep->hwts_rx_en && fep->bufdesc_ex) {
849 struct skb_shared_hwtstamps *shhwtstamps =
852 struct bufdesc_ex *ebdp =
853 (struct bufdesc_ex *)bdp;
855 memset(shhwtstamps, 0, sizeof(*shhwtstamps));
857 spin_lock_irqsave(&fep->tmreg_lock, flags);
858 shhwtstamps->hwtstamp = ns_to_ktime(
859 timecounter_cyc2time(&fep->tc, ebdp->ts));
860 spin_unlock_irqrestore(&fep->tmreg_lock, flags);
863 if (fep->bufdesc_ex &&
864 (fep->csum_flags & FLAG_RX_CSUM_ENABLED)) {
865 struct bufdesc_ex *ebdp =
866 (struct bufdesc_ex *)bdp;
867 if (!(ebdp->cbd_esc & FLAG_RX_CSUM_ERROR)) {
869 skb->ip_summed = CHECKSUM_UNNECESSARY;
871 skb_checksum_none_assert(skb);
875 if (!skb_defer_rx_timestamp(skb))
876 napi_gro_receive(&fep->napi, skb);
879 bdp->cbd_bufaddr = dma_map_single(&fep->pdev->dev, data,
880 FEC_ENET_TX_FRSIZE, DMA_FROM_DEVICE);
882 /* Clear the status flags for this buffer */
883 status &= ~BD_ENET_RX_STATS;
885 /* Mark the buffer empty */
886 status |= BD_ENET_RX_EMPTY;
887 bdp->cbd_sc = status;
889 if (fep->bufdesc_ex) {
890 struct bufdesc_ex *ebdp = (struct bufdesc_ex *)bdp;
892 ebdp->cbd_esc = BD_ENET_RX_INT;
897 /* Update BD pointer to next entry */
898 if (status & BD_ENET_RX_WRAP)
899 bdp = fep->rx_bd_base;
901 bdp = fec_enet_get_nextdesc(bdp, fep->bufdesc_ex);
902 /* Doing this here will keep the FEC running while we process
903 * incoming frames. On a heavily loaded network, we should be
904 * able to keep up at the expense of system resources.
906 writel(0, fep->hwp + FEC_R_DES_ACTIVE);
914 fec_enet_interrupt(int irq, void *dev_id)
916 struct net_device *ndev = dev_id;
917 struct fec_enet_private *fep = netdev_priv(ndev);
919 irqreturn_t ret = IRQ_NONE;
922 int_events = readl(fep->hwp + FEC_IEVENT);
923 writel(int_events, fep->hwp + FEC_IEVENT);
925 if (int_events & (FEC_ENET_RXF | FEC_ENET_TXF)) {
928 /* Disable the RX interrupt */
929 if (napi_schedule_prep(&fep->napi)) {
930 writel(FEC_RX_DISABLED_IMASK,
931 fep->hwp + FEC_IMASK);
932 __napi_schedule(&fep->napi);
936 if (int_events & FEC_ENET_MII) {
938 complete(&fep->mdio_done);
940 } while (int_events);
945 static int fec_enet_rx_napi(struct napi_struct *napi, int budget)
947 struct net_device *ndev = napi->dev;
948 int pkts = fec_enet_rx(ndev, budget);
949 struct fec_enet_private *fep = netdev_priv(ndev);
955 writel(FEC_DEFAULT_IMASK, fep->hwp + FEC_IMASK);
960 /* ------------------------------------------------------------------------- */
961 static void fec_get_mac(struct net_device *ndev)
963 struct fec_enet_private *fep = netdev_priv(ndev);
964 struct fec_platform_data *pdata = fep->pdev->dev.platform_data;
965 unsigned char *iap, tmpaddr[ETH_ALEN];
968 * try to get mac address in following order:
970 * 1) module parameter via kernel command line in form
971 * fec.macaddr=0x00,0x04,0x9f,0x01,0x30,0xe0
976 * 2) from device tree data
978 if (!is_valid_ether_addr(iap)) {
979 struct device_node *np = fep->pdev->dev.of_node;
981 const char *mac = of_get_mac_address(np);
983 iap = (unsigned char *) mac;
988 * 3) from flash or fuse (via platform data)
990 if (!is_valid_ether_addr(iap)) {
993 iap = (unsigned char *)FEC_FLASHMAC;
996 iap = (unsigned char *)&pdata->mac;
1001 * 4) FEC mac registers set by bootloader
1003 if (!is_valid_ether_addr(iap)) {
1004 *((unsigned long *) &tmpaddr[0]) =
1005 be32_to_cpu(readl(fep->hwp + FEC_ADDR_LOW));
1006 *((unsigned short *) &tmpaddr[4]) =
1007 be16_to_cpu(readl(fep->hwp + FEC_ADDR_HIGH) >> 16);
1011 memcpy(ndev->dev_addr, iap, ETH_ALEN);
1013 /* Adjust MAC if using macaddr */
1015 ndev->dev_addr[ETH_ALEN-1] = macaddr[ETH_ALEN-1] + fep->dev_id;
1018 /* ------------------------------------------------------------------------- */
1023 static void fec_enet_adjust_link(struct net_device *ndev)
1025 struct fec_enet_private *fep = netdev_priv(ndev);
1026 struct phy_device *phy_dev = fep->phy_dev;
1027 unsigned long flags;
1029 int status_change = 0;
1031 spin_lock_irqsave(&fep->hw_lock, flags);
1033 /* Prevent a state halted on mii error */
1034 if (fep->mii_timeout && phy_dev->state == PHY_HALTED) {
1035 phy_dev->state = PHY_RESUMING;
1039 if (phy_dev->link) {
1041 fep->link = phy_dev->link;
1045 if (fep->full_duplex != phy_dev->duplex)
1048 if (phy_dev->speed != fep->speed) {
1049 fep->speed = phy_dev->speed;
1053 /* if any of the above changed restart the FEC */
1055 fec_restart(ndev, phy_dev->duplex);
1059 fep->link = phy_dev->link;
1065 spin_unlock_irqrestore(&fep->hw_lock, flags);
1068 phy_print_status(phy_dev);
1071 static int fec_enet_mdio_read(struct mii_bus *bus, int mii_id, int regnum)
1073 struct fec_enet_private *fep = bus->priv;
1074 unsigned long time_left;
1076 fep->mii_timeout = 0;
1077 init_completion(&fep->mdio_done);
1079 /* start a read op */
1080 writel(FEC_MMFR_ST | FEC_MMFR_OP_READ |
1081 FEC_MMFR_PA(mii_id) | FEC_MMFR_RA(regnum) |
1082 FEC_MMFR_TA, fep->hwp + FEC_MII_DATA);
1084 /* wait for end of transfer */
1085 time_left = wait_for_completion_timeout(&fep->mdio_done,
1086 usecs_to_jiffies(FEC_MII_TIMEOUT));
1087 if (time_left == 0) {
1088 fep->mii_timeout = 1;
1089 netdev_err(fep->netdev, "MDIO read timeout\n");
1094 return FEC_MMFR_DATA(readl(fep->hwp + FEC_MII_DATA));
1097 static int fec_enet_mdio_write(struct mii_bus *bus, int mii_id, int regnum,
1100 struct fec_enet_private *fep = bus->priv;
1101 unsigned long time_left;
1103 fep->mii_timeout = 0;
1104 init_completion(&fep->mdio_done);
1106 /* start a write op */
1107 writel(FEC_MMFR_ST | FEC_MMFR_OP_WRITE |
1108 FEC_MMFR_PA(mii_id) | FEC_MMFR_RA(regnum) |
1109 FEC_MMFR_TA | FEC_MMFR_DATA(value),
1110 fep->hwp + FEC_MII_DATA);
1112 /* wait for end of transfer */
1113 time_left = wait_for_completion_timeout(&fep->mdio_done,
1114 usecs_to_jiffies(FEC_MII_TIMEOUT));
1115 if (time_left == 0) {
1116 fep->mii_timeout = 1;
1117 netdev_err(fep->netdev, "MDIO write timeout\n");
1124 static int fec_enet_mdio_reset(struct mii_bus *bus)
1129 static int fec_enet_mii_probe(struct net_device *ndev)
1131 struct fec_enet_private *fep = netdev_priv(ndev);
1132 const struct platform_device_id *id_entry =
1133 platform_get_device_id(fep->pdev);
1134 struct phy_device *phy_dev = NULL;
1135 char mdio_bus_id[MII_BUS_ID_SIZE];
1136 char phy_name[MII_BUS_ID_SIZE + 3];
1138 int dev_id = fep->dev_id;
1140 fep->phy_dev = NULL;
1142 /* check for attached phy */
1143 for (phy_id = 0; (phy_id < PHY_MAX_ADDR); phy_id++) {
1144 if ((fep->mii_bus->phy_mask & (1 << phy_id)))
1146 if (fep->mii_bus->phy_map[phy_id] == NULL)
1148 if (fep->mii_bus->phy_map[phy_id]->phy_id == 0)
1152 strncpy(mdio_bus_id, fep->mii_bus->id, MII_BUS_ID_SIZE);
1156 if (phy_id >= PHY_MAX_ADDR) {
1157 netdev_info(ndev, "no PHY, assuming direct connection to switch\n");
1158 strncpy(mdio_bus_id, "fixed-0", MII_BUS_ID_SIZE);
1162 snprintf(phy_name, sizeof(phy_name), PHY_ID_FMT, mdio_bus_id, phy_id);
1163 phy_dev = phy_connect(ndev, phy_name, &fec_enet_adjust_link,
1164 fep->phy_interface);
1165 if (IS_ERR(phy_dev)) {
1166 netdev_err(ndev, "could not attach to PHY\n");
1167 return PTR_ERR(phy_dev);
1170 /* mask with MAC supported features */
1171 if (id_entry->driver_data & FEC_QUIRK_HAS_GBIT) {
1172 phy_dev->supported &= PHY_GBIT_FEATURES;
1173 phy_dev->supported |= SUPPORTED_Pause;
1176 phy_dev->supported &= PHY_BASIC_FEATURES;
1178 phy_dev->advertising = phy_dev->supported;
1180 fep->phy_dev = phy_dev;
1182 fep->full_duplex = 0;
1184 netdev_info(ndev, "Freescale FEC PHY driver [%s] (mii_bus:phy_addr=%s, irq=%d)\n",
1185 fep->phy_dev->drv->name, dev_name(&fep->phy_dev->dev),
1191 static int fec_enet_mii_init(struct platform_device *pdev)
1193 static struct mii_bus *fec0_mii_bus;
1194 struct net_device *ndev = platform_get_drvdata(pdev);
1195 struct fec_enet_private *fep = netdev_priv(ndev);
1196 const struct platform_device_id *id_entry =
1197 platform_get_device_id(fep->pdev);
1198 int err = -ENXIO, i;
1201 * The dual fec interfaces are not equivalent with enet-mac.
1202 * Here are the differences:
1204 * - fec0 supports MII & RMII modes while fec1 only supports RMII
1205 * - fec0 acts as the 1588 time master while fec1 is slave
1206 * - external phys can only be configured by fec0
1208 * That is to say fec1 can not work independently. It only works
1209 * when fec0 is working. The reason behind this design is that the
1210 * second interface is added primarily for Switch mode.
1212 * Because of the last point above, both phys are attached on fec0
1213 * mdio interface in board design, and need to be configured by
1216 if ((id_entry->driver_data & FEC_QUIRK_ENET_MAC) && fep->dev_id > 0) {
1217 /* fec1 uses fec0 mii_bus */
1218 if (mii_cnt && fec0_mii_bus) {
1219 fep->mii_bus = fec0_mii_bus;
1226 fep->mii_timeout = 0;
1229 * Set MII speed to 2.5 MHz (= clk_get_rate() / 2 * phy_speed)
1231 * The formula for FEC MDC is 'ref_freq / (MII_SPEED x 2)' while
1232 * for ENET-MAC is 'ref_freq / ((MII_SPEED + 1) x 2)'. The i.MX28
1233 * Reference Manual has an error on this, and gets fixed on i.MX6Q
1236 fep->phy_speed = DIV_ROUND_UP(clk_get_rate(fep->clk_ahb), 5000000);
1237 if (id_entry->driver_data & FEC_QUIRK_ENET_MAC)
1239 fep->phy_speed <<= 1;
1240 writel(fep->phy_speed, fep->hwp + FEC_MII_SPEED);
1242 fep->mii_bus = mdiobus_alloc();
1243 if (fep->mii_bus == NULL) {
1248 fep->mii_bus->name = "fec_enet_mii_bus";
1249 fep->mii_bus->read = fec_enet_mdio_read;
1250 fep->mii_bus->write = fec_enet_mdio_write;
1251 fep->mii_bus->reset = fec_enet_mdio_reset;
1252 snprintf(fep->mii_bus->id, MII_BUS_ID_SIZE, "%s-%x",
1253 pdev->name, fep->dev_id + 1);
1254 fep->mii_bus->priv = fep;
1255 fep->mii_bus->parent = &pdev->dev;
1257 fep->mii_bus->irq = kmalloc(sizeof(int) * PHY_MAX_ADDR, GFP_KERNEL);
1258 if (!fep->mii_bus->irq) {
1260 goto err_out_free_mdiobus;
1263 for (i = 0; i < PHY_MAX_ADDR; i++)
1264 fep->mii_bus->irq[i] = PHY_POLL;
1266 if (mdiobus_register(fep->mii_bus))
1267 goto err_out_free_mdio_irq;
1271 /* save fec0 mii_bus */
1272 if (id_entry->driver_data & FEC_QUIRK_ENET_MAC)
1273 fec0_mii_bus = fep->mii_bus;
1277 err_out_free_mdio_irq:
1278 kfree(fep->mii_bus->irq);
1279 err_out_free_mdiobus:
1280 mdiobus_free(fep->mii_bus);
1285 static void fec_enet_mii_remove(struct fec_enet_private *fep)
1287 if (--mii_cnt == 0) {
1288 mdiobus_unregister(fep->mii_bus);
1289 kfree(fep->mii_bus->irq);
1290 mdiobus_free(fep->mii_bus);
1294 static int fec_enet_get_settings(struct net_device *ndev,
1295 struct ethtool_cmd *cmd)
1297 struct fec_enet_private *fep = netdev_priv(ndev);
1298 struct phy_device *phydev = fep->phy_dev;
1303 return phy_ethtool_gset(phydev, cmd);
1306 static int fec_enet_set_settings(struct net_device *ndev,
1307 struct ethtool_cmd *cmd)
1309 struct fec_enet_private *fep = netdev_priv(ndev);
1310 struct phy_device *phydev = fep->phy_dev;
1315 return phy_ethtool_sset(phydev, cmd);
1318 static void fec_enet_get_drvinfo(struct net_device *ndev,
1319 struct ethtool_drvinfo *info)
1321 struct fec_enet_private *fep = netdev_priv(ndev);
1323 strlcpy(info->driver, fep->pdev->dev.driver->name,
1324 sizeof(info->driver));
1325 strlcpy(info->version, "Revision: 1.0", sizeof(info->version));
1326 strlcpy(info->bus_info, dev_name(&ndev->dev), sizeof(info->bus_info));
1329 static int fec_enet_get_ts_info(struct net_device *ndev,
1330 struct ethtool_ts_info *info)
1332 struct fec_enet_private *fep = netdev_priv(ndev);
1334 if (fep->bufdesc_ex) {
1336 info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE |
1337 SOF_TIMESTAMPING_RX_SOFTWARE |
1338 SOF_TIMESTAMPING_SOFTWARE |
1339 SOF_TIMESTAMPING_TX_HARDWARE |
1340 SOF_TIMESTAMPING_RX_HARDWARE |
1341 SOF_TIMESTAMPING_RAW_HARDWARE;
1343 info->phc_index = ptp_clock_index(fep->ptp_clock);
1345 info->phc_index = -1;
1347 info->tx_types = (1 << HWTSTAMP_TX_OFF) |
1348 (1 << HWTSTAMP_TX_ON);
1350 info->rx_filters = (1 << HWTSTAMP_FILTER_NONE) |
1351 (1 << HWTSTAMP_FILTER_ALL);
1354 return ethtool_op_get_ts_info(ndev, info);
1358 static void fec_enet_get_pauseparam(struct net_device *ndev,
1359 struct ethtool_pauseparam *pause)
1361 struct fec_enet_private *fep = netdev_priv(ndev);
1363 pause->autoneg = (fep->pause_flag & FEC_PAUSE_FLAG_AUTONEG) != 0;
1364 pause->tx_pause = (fep->pause_flag & FEC_PAUSE_FLAG_ENABLE) != 0;
1365 pause->rx_pause = pause->tx_pause;
1368 static int fec_enet_set_pauseparam(struct net_device *ndev,
1369 struct ethtool_pauseparam *pause)
1371 struct fec_enet_private *fep = netdev_priv(ndev);
1373 if (pause->tx_pause != pause->rx_pause) {
1375 "hardware only support enable/disable both tx and rx");
1379 fep->pause_flag = 0;
1381 /* tx pause must be same as rx pause */
1382 fep->pause_flag |= pause->rx_pause ? FEC_PAUSE_FLAG_ENABLE : 0;
1383 fep->pause_flag |= pause->autoneg ? FEC_PAUSE_FLAG_AUTONEG : 0;
1385 if (pause->rx_pause || pause->autoneg) {
1386 fep->phy_dev->supported |= ADVERTISED_Pause;
1387 fep->phy_dev->advertising |= ADVERTISED_Pause;
1389 fep->phy_dev->supported &= ~ADVERTISED_Pause;
1390 fep->phy_dev->advertising &= ~ADVERTISED_Pause;
1393 if (pause->autoneg) {
1394 if (netif_running(ndev))
1396 phy_start_aneg(fep->phy_dev);
1398 if (netif_running(ndev))
1399 fec_restart(ndev, 0);
1404 static const struct ethtool_ops fec_enet_ethtool_ops = {
1405 .get_pauseparam = fec_enet_get_pauseparam,
1406 .set_pauseparam = fec_enet_set_pauseparam,
1407 .get_settings = fec_enet_get_settings,
1408 .set_settings = fec_enet_set_settings,
1409 .get_drvinfo = fec_enet_get_drvinfo,
1410 .get_link = ethtool_op_get_link,
1411 .get_ts_info = fec_enet_get_ts_info,
1414 static int fec_enet_ioctl(struct net_device *ndev, struct ifreq *rq, int cmd)
1416 struct fec_enet_private *fep = netdev_priv(ndev);
1417 struct phy_device *phydev = fep->phy_dev;
1419 if (!netif_running(ndev))
1425 if (cmd == SIOCSHWTSTAMP && fep->bufdesc_ex)
1426 return fec_ptp_ioctl(ndev, rq, cmd);
1428 return phy_mii_ioctl(phydev, rq, cmd);
1431 static void fec_enet_free_buffers(struct net_device *ndev)
1433 struct fec_enet_private *fep = netdev_priv(ndev);
1435 struct sk_buff *skb;
1436 struct bufdesc *bdp;
1438 bdp = fep->rx_bd_base;
1439 for (i = 0; i < RX_RING_SIZE; i++) {
1440 skb = fep->rx_skbuff[i];
1442 if (bdp->cbd_bufaddr)
1443 dma_unmap_single(&fep->pdev->dev, bdp->cbd_bufaddr,
1444 FEC_ENET_RX_FRSIZE, DMA_FROM_DEVICE);
1447 bdp = fec_enet_get_nextdesc(bdp, fep->bufdesc_ex);
1450 bdp = fep->tx_bd_base;
1451 for (i = 0; i < TX_RING_SIZE; i++)
1452 kfree(fep->tx_bounce[i]);
1455 static int fec_enet_alloc_buffers(struct net_device *ndev)
1457 struct fec_enet_private *fep = netdev_priv(ndev);
1459 struct sk_buff *skb;
1460 struct bufdesc *bdp;
1462 bdp = fep->rx_bd_base;
1463 for (i = 0; i < RX_RING_SIZE; i++) {
1464 skb = netdev_alloc_skb(ndev, FEC_ENET_RX_FRSIZE);
1466 fec_enet_free_buffers(ndev);
1469 fep->rx_skbuff[i] = skb;
1471 bdp->cbd_bufaddr = dma_map_single(&fep->pdev->dev, skb->data,
1472 FEC_ENET_RX_FRSIZE, DMA_FROM_DEVICE);
1473 bdp->cbd_sc = BD_ENET_RX_EMPTY;
1475 if (fep->bufdesc_ex) {
1476 struct bufdesc_ex *ebdp = (struct bufdesc_ex *)bdp;
1477 ebdp->cbd_esc = BD_ENET_RX_INT;
1480 bdp = fec_enet_get_nextdesc(bdp, fep->bufdesc_ex);
1483 /* Set the last buffer to wrap. */
1484 bdp = fec_enet_get_prevdesc(bdp, fep->bufdesc_ex);
1485 bdp->cbd_sc |= BD_SC_WRAP;
1487 bdp = fep->tx_bd_base;
1488 for (i = 0; i < TX_RING_SIZE; i++) {
1489 fep->tx_bounce[i] = kmalloc(FEC_ENET_TX_FRSIZE, GFP_KERNEL);
1492 bdp->cbd_bufaddr = 0;
1494 if (fep->bufdesc_ex) {
1495 struct bufdesc_ex *ebdp = (struct bufdesc_ex *)bdp;
1496 ebdp->cbd_esc = BD_ENET_TX_INT;
1499 bdp = fec_enet_get_nextdesc(bdp, fep->bufdesc_ex);
1502 /* Set the last buffer to wrap. */
1503 bdp = fec_enet_get_prevdesc(bdp, fep->bufdesc_ex);
1504 bdp->cbd_sc |= BD_SC_WRAP;
1510 fec_enet_open(struct net_device *ndev)
1512 struct fec_enet_private *fep = netdev_priv(ndev);
1515 napi_enable(&fep->napi);
1517 /* I should reset the ring buffers here, but I don't yet know
1518 * a simple way to do that.
1521 ret = fec_enet_alloc_buffers(ndev);
1525 /* Probe and connect to PHY when open the interface */
1526 ret = fec_enet_mii_probe(ndev);
1528 fec_enet_free_buffers(ndev);
1531 phy_start(fep->phy_dev);
1532 netif_start_queue(ndev);
1538 fec_enet_close(struct net_device *ndev)
1540 struct fec_enet_private *fep = netdev_priv(ndev);
1542 /* Don't know what to do yet. */
1543 napi_disable(&fep->napi);
1545 netif_stop_queue(ndev);
1549 phy_stop(fep->phy_dev);
1550 phy_disconnect(fep->phy_dev);
1553 fec_enet_free_buffers(ndev);
1558 /* Set or clear the multicast filter for this adaptor.
1559 * Skeleton taken from sunlance driver.
1560 * The CPM Ethernet implementation allows Multicast as well as individual
1561 * MAC address filtering. Some of the drivers check to make sure it is
1562 * a group multicast address, and discard those that are not. I guess I
1563 * will do the same for now, but just remove the test if you want
1564 * individual filtering as well (do the upper net layers want or support
1565 * this kind of feature?).
1568 #define HASH_BITS 6 /* #bits in hash */
1569 #define CRC32_POLY 0xEDB88320
1571 static void set_multicast_list(struct net_device *ndev)
1573 struct fec_enet_private *fep = netdev_priv(ndev);
1574 struct netdev_hw_addr *ha;
1575 unsigned int i, bit, data, crc, tmp;
1578 if (ndev->flags & IFF_PROMISC) {
1579 tmp = readl(fep->hwp + FEC_R_CNTRL);
1581 writel(tmp, fep->hwp + FEC_R_CNTRL);
1585 tmp = readl(fep->hwp + FEC_R_CNTRL);
1587 writel(tmp, fep->hwp + FEC_R_CNTRL);
1589 if (ndev->flags & IFF_ALLMULTI) {
1590 /* Catch all multicast addresses, so set the
1593 writel(0xffffffff, fep->hwp + FEC_GRP_HASH_TABLE_HIGH);
1594 writel(0xffffffff, fep->hwp + FEC_GRP_HASH_TABLE_LOW);
1599 /* Clear filter and add the addresses in hash register
1601 writel(0, fep->hwp + FEC_GRP_HASH_TABLE_HIGH);
1602 writel(0, fep->hwp + FEC_GRP_HASH_TABLE_LOW);
1604 netdev_for_each_mc_addr(ha, ndev) {
1605 /* calculate crc32 value of mac address */
1608 for (i = 0; i < ndev->addr_len; i++) {
1610 for (bit = 0; bit < 8; bit++, data >>= 1) {
1612 (((crc ^ data) & 1) ? CRC32_POLY : 0);
1616 /* only upper 6 bits (HASH_BITS) are used
1617 * which point to specific bit in he hash registers
1619 hash = (crc >> (32 - HASH_BITS)) & 0x3f;
1622 tmp = readl(fep->hwp + FEC_GRP_HASH_TABLE_HIGH);
1623 tmp |= 1 << (hash - 32);
1624 writel(tmp, fep->hwp + FEC_GRP_HASH_TABLE_HIGH);
1626 tmp = readl(fep->hwp + FEC_GRP_HASH_TABLE_LOW);
1628 writel(tmp, fep->hwp + FEC_GRP_HASH_TABLE_LOW);
1633 /* Set a MAC change in hardware. */
1635 fec_set_mac_address(struct net_device *ndev, void *p)
1637 struct fec_enet_private *fep = netdev_priv(ndev);
1638 struct sockaddr *addr = p;
1640 if (!is_valid_ether_addr(addr->sa_data))
1641 return -EADDRNOTAVAIL;
1643 memcpy(ndev->dev_addr, addr->sa_data, ndev->addr_len);
1645 writel(ndev->dev_addr[3] | (ndev->dev_addr[2] << 8) |
1646 (ndev->dev_addr[1] << 16) | (ndev->dev_addr[0] << 24),
1647 fep->hwp + FEC_ADDR_LOW);
1648 writel((ndev->dev_addr[5] << 16) | (ndev->dev_addr[4] << 24),
1649 fep->hwp + FEC_ADDR_HIGH);
1653 #ifdef CONFIG_NET_POLL_CONTROLLER
1655 * fec_poll_controller - FEC Poll controller function
1656 * @dev: The FEC network adapter
1658 * Polled functionality used by netconsole and others in non interrupt mode
1661 static void fec_poll_controller(struct net_device *dev)
1664 struct fec_enet_private *fep = netdev_priv(dev);
1666 for (i = 0; i < FEC_IRQ_NUM; i++) {
1667 if (fep->irq[i] > 0) {
1668 disable_irq(fep->irq[i]);
1669 fec_enet_interrupt(fep->irq[i], dev);
1670 enable_irq(fep->irq[i]);
1676 static int fec_set_features(struct net_device *netdev,
1677 netdev_features_t features)
1679 struct fec_enet_private *fep = netdev_priv(netdev);
1680 netdev_features_t changed = features ^ netdev->features;
1682 netdev->features = features;
1684 /* Receive checksum has been changed */
1685 if (changed & NETIF_F_RXCSUM) {
1686 if (features & NETIF_F_RXCSUM)
1687 fep->csum_flags |= FLAG_RX_CSUM_ENABLED;
1689 fep->csum_flags &= ~FLAG_RX_CSUM_ENABLED;
1691 if (netif_running(netdev)) {
1693 fec_restart(netdev, fep->phy_dev->duplex);
1694 netif_wake_queue(netdev);
1696 fec_restart(netdev, fep->phy_dev->duplex);
1703 static const struct net_device_ops fec_netdev_ops = {
1704 .ndo_open = fec_enet_open,
1705 .ndo_stop = fec_enet_close,
1706 .ndo_start_xmit = fec_enet_start_xmit,
1707 .ndo_set_rx_mode = set_multicast_list,
1708 .ndo_change_mtu = eth_change_mtu,
1709 .ndo_validate_addr = eth_validate_addr,
1710 .ndo_tx_timeout = fec_timeout,
1711 .ndo_set_mac_address = fec_set_mac_address,
1712 .ndo_do_ioctl = fec_enet_ioctl,
1713 #ifdef CONFIG_NET_POLL_CONTROLLER
1714 .ndo_poll_controller = fec_poll_controller,
1716 .ndo_set_features = fec_set_features,
1720 * XXX: We need to clean up on failure exits here.
1723 static int fec_enet_init(struct net_device *ndev)
1725 struct fec_enet_private *fep = netdev_priv(ndev);
1726 struct bufdesc *cbd_base;
1728 /* Allocate memory for buffer descriptors. */
1729 cbd_base = dma_alloc_coherent(NULL, PAGE_SIZE, &fep->bd_dma,
1734 memset(cbd_base, 0, PAGE_SIZE);
1735 spin_lock_init(&fep->hw_lock);
1739 /* Get the Ethernet address */
1742 /* Set receive and transmit descriptor base. */
1743 fep->rx_bd_base = cbd_base;
1744 if (fep->bufdesc_ex)
1745 fep->tx_bd_base = (struct bufdesc *)
1746 (((struct bufdesc_ex *)cbd_base) + RX_RING_SIZE);
1748 fep->tx_bd_base = cbd_base + RX_RING_SIZE;
1750 /* The FEC Ethernet specific entries in the device structure */
1751 ndev->watchdog_timeo = TX_TIMEOUT;
1752 ndev->netdev_ops = &fec_netdev_ops;
1753 ndev->ethtool_ops = &fec_enet_ethtool_ops;
1755 writel(FEC_RX_DISABLED_IMASK, fep->hwp + FEC_IMASK);
1756 netif_napi_add(ndev, &fep->napi, fec_enet_rx_napi, FEC_NAPI_WEIGHT);
1758 /* enable hw accelerator */
1759 ndev->features |= (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM
1761 ndev->hw_features |= (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM
1763 fep->csum_flags |= FLAG_RX_CSUM_ENABLED;
1765 fec_restart(ndev, 0);
1771 static void fec_reset_phy(struct platform_device *pdev)
1775 struct device_node *np = pdev->dev.of_node;
1780 of_property_read_u32(np, "phy-reset-duration", &msec);
1781 /* A sane reset duration should not be longer than 1s */
1785 phy_reset = of_get_named_gpio(np, "phy-reset-gpios", 0);
1786 if (!gpio_is_valid(phy_reset))
1789 err = devm_gpio_request_one(&pdev->dev, phy_reset,
1790 GPIOF_OUT_INIT_LOW, "phy-reset");
1792 dev_err(&pdev->dev, "failed to get phy-reset-gpios: %d\n", err);
1796 gpio_set_value(phy_reset, 1);
1798 #else /* CONFIG_OF */
1799 static void fec_reset_phy(struct platform_device *pdev)
1802 * In case of platform probe, the reset has been done
1806 #endif /* CONFIG_OF */
1809 fec_probe(struct platform_device *pdev)
1811 struct fec_enet_private *fep;
1812 struct fec_platform_data *pdata;
1813 struct net_device *ndev;
1814 int i, irq, ret = 0;
1816 const struct of_device_id *of_id;
1818 struct pinctrl *pinctrl;
1819 struct regulator *reg_phy;
1821 of_id = of_match_device(fec_dt_ids, &pdev->dev);
1823 pdev->id_entry = of_id->data;
1825 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1829 /* Init network device */
1830 ndev = alloc_etherdev(sizeof(struct fec_enet_private));
1834 SET_NETDEV_DEV(ndev, &pdev->dev);
1836 /* setup board info structure */
1837 fep = netdev_priv(ndev);
1839 /* default enable pause frame auto negotiation */
1840 if (pdev->id_entry &&
1841 (pdev->id_entry->driver_data & FEC_QUIRK_HAS_GBIT))
1842 fep->pause_flag |= FEC_PAUSE_FLAG_AUTONEG;
1844 fep->hwp = devm_request_and_ioremap(&pdev->dev, r);
1846 fep->dev_id = dev_id++;
1848 fep->bufdesc_ex = 0;
1852 goto failed_ioremap;
1855 platform_set_drvdata(pdev, ndev);
1857 ret = of_get_phy_mode(pdev->dev.of_node);
1859 pdata = pdev->dev.platform_data;
1861 fep->phy_interface = pdata->phy;
1863 fep->phy_interface = PHY_INTERFACE_MODE_MII;
1865 fep->phy_interface = ret;
1868 pinctrl = devm_pinctrl_get_select_default(&pdev->dev);
1869 if (IS_ERR(pinctrl)) {
1870 ret = PTR_ERR(pinctrl);
1874 fep->clk_ipg = devm_clk_get(&pdev->dev, "ipg");
1875 if (IS_ERR(fep->clk_ipg)) {
1876 ret = PTR_ERR(fep->clk_ipg);
1880 fep->clk_ahb = devm_clk_get(&pdev->dev, "ahb");
1881 if (IS_ERR(fep->clk_ahb)) {
1882 ret = PTR_ERR(fep->clk_ahb);
1886 fep->clk_ptp = devm_clk_get(&pdev->dev, "ptp");
1888 pdev->id_entry->driver_data & FEC_QUIRK_HAS_BUFDESC_EX;
1889 if (IS_ERR(fep->clk_ptp)) {
1890 ret = PTR_ERR(fep->clk_ptp);
1891 fep->bufdesc_ex = 0;
1894 clk_prepare_enable(fep->clk_ahb);
1895 clk_prepare_enable(fep->clk_ipg);
1896 if (!IS_ERR(fep->clk_ptp))
1897 clk_prepare_enable(fep->clk_ptp);
1899 reg_phy = devm_regulator_get(&pdev->dev, "phy");
1900 if (!IS_ERR(reg_phy)) {
1901 ret = regulator_enable(reg_phy);
1904 "Failed to enable phy regulator: %d\n", ret);
1905 goto failed_regulator;
1909 fec_reset_phy(pdev);
1911 if (fep->bufdesc_ex)
1912 fec_ptp_init(ndev, pdev);
1914 ret = fec_enet_init(ndev);
1918 for (i = 0; i < FEC_IRQ_NUM; i++) {
1919 irq = platform_get_irq(pdev, i);
1926 ret = request_irq(irq, fec_enet_interrupt, IRQF_DISABLED, pdev->name, ndev);
1929 irq = platform_get_irq(pdev, i);
1930 free_irq(irq, ndev);
1936 ret = fec_enet_mii_init(pdev);
1938 goto failed_mii_init;
1940 /* Carrier starts down, phylib will bring it up */
1941 netif_carrier_off(ndev);
1943 ret = register_netdev(ndev);
1945 goto failed_register;
1947 if (fep->bufdesc_ex && fep->ptp_clock)
1948 netdev_info(ndev, "registered PHC device %d\n", fep->dev_id);
1953 fec_enet_mii_remove(fep);
1956 for (i = 0; i < FEC_IRQ_NUM; i++) {
1957 irq = platform_get_irq(pdev, i);
1959 free_irq(irq, ndev);
1963 clk_disable_unprepare(fep->clk_ahb);
1964 clk_disable_unprepare(fep->clk_ipg);
1965 if (!IS_ERR(fep->clk_ptp))
1966 clk_disable_unprepare(fep->clk_ptp);
1976 fec_drv_remove(struct platform_device *pdev)
1978 struct net_device *ndev = platform_get_drvdata(pdev);
1979 struct fec_enet_private *fep = netdev_priv(ndev);
1982 unregister_netdev(ndev);
1983 fec_enet_mii_remove(fep);
1984 del_timer_sync(&fep->time_keep);
1985 clk_disable_unprepare(fep->clk_ptp);
1987 ptp_clock_unregister(fep->ptp_clock);
1988 clk_disable_unprepare(fep->clk_ahb);
1989 clk_disable_unprepare(fep->clk_ipg);
1990 for (i = 0; i < FEC_IRQ_NUM; i++) {
1991 int irq = platform_get_irq(pdev, i);
1993 free_irq(irq, ndev);
1997 platform_set_drvdata(pdev, NULL);
2002 #ifdef CONFIG_PM_SLEEP
2004 fec_suspend(struct device *dev)
2006 struct net_device *ndev = dev_get_drvdata(dev);
2007 struct fec_enet_private *fep = netdev_priv(ndev);
2009 if (netif_running(ndev)) {
2011 netif_device_detach(ndev);
2013 clk_disable_unprepare(fep->clk_ahb);
2014 clk_disable_unprepare(fep->clk_ipg);
2020 fec_resume(struct device *dev)
2022 struct net_device *ndev = dev_get_drvdata(dev);
2023 struct fec_enet_private *fep = netdev_priv(ndev);
2025 clk_prepare_enable(fep->clk_ahb);
2026 clk_prepare_enable(fep->clk_ipg);
2027 if (netif_running(ndev)) {
2028 fec_restart(ndev, fep->full_duplex);
2029 netif_device_attach(ndev);
2034 #endif /* CONFIG_PM_SLEEP */
2036 static SIMPLE_DEV_PM_OPS(fec_pm_ops, fec_suspend, fec_resume);
2038 static struct platform_driver fec_driver = {
2040 .name = DRIVER_NAME,
2041 .owner = THIS_MODULE,
2043 .of_match_table = fec_dt_ids,
2045 .id_table = fec_devtype,
2047 .remove = fec_drv_remove,
2050 module_platform_driver(fec_driver);
2052 MODULE_LICENSE("GPL");