drivers/net/ethernet/emulex/benet/be_cmds.h

   1 /*
   2  * Copyright (C) 2005 - 2011 Emulex
   3  * All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or
   6  * modify it under the terms of the GNU General Public License version 2
   7  * as published by the Free Software Foundation.  The full GNU General
   8  * Public License is included in this distribution in the file called COPYING.
   9  *
  10  * Contact Information:
  11  * linux-drivers@emulex.com
  12  *
  13  * Emulex
  14  * 3333 Susan Street
  15  * Costa Mesa, CA 92626
  16  */
  17
  18 /*
  19  * The driver sends configuration and managements command requests to the
  20  * firmware in the BE. These requests are communicated to the processor
  21  * using Work Request Blocks (WRBs) submitted to the MCC-WRB ring or via one
  22  * WRB inside a MAILBOX.
  23  * The commands are serviced by the ARM processor in the BladeEngine's MPU.
  24  */
  25
  26 struct be_sge {
  27         u32 pa_lo;
  28         u32 pa_hi;
  29         u32 len;
  30 };
  31
  32 #define MCC_WRB_EMBEDDED_MASK   1       /* bit 0 of dword 0*/
  33 #define MCC_WRB_SGE_CNT_SHIFT   3       /* bits 3 - 7 of dword 0 */
  34 #define MCC_WRB_SGE_CNT_MASK    0x1F    /* bits 3 - 7 of dword 0 */
  35 struct be_mcc_wrb {
  36         u32 embedded;           /* dword 0 */
  37         u32 payload_length;     /* dword 1 */
  38         u32 tag0;               /* dword 2 */
  39         u32 tag1;               /* dword 3 */
  40         u32 rsvd;               /* dword 4 */
  41         union {
  42                 u8 embedded_payload[236]; /* used by embedded cmds */
  43                 struct be_sge sgl[19];    /* used by non-embedded cmds */
  44         } payload;
  45 };
  46
  47 #define CQE_FLAGS_VALID_MASK            (1 << 31)
  48 #define CQE_FLAGS_ASYNC_MASK            (1 << 30)
  49 #define CQE_FLAGS_COMPLETED_MASK        (1 << 28)
  50 #define CQE_FLAGS_CONSUMED_MASK         (1 << 27)
  51
  52 /* Completion Status */
  53 enum {
  54         MCC_STATUS_SUCCESS = 0,
  55         MCC_STATUS_FAILED = 1,
  56         MCC_STATUS_ILLEGAL_REQUEST = 2,
  57         MCC_STATUS_ILLEGAL_FIELD = 3,
  58         MCC_STATUS_INSUFFICIENT_BUFFER = 4,
  59         MCC_STATUS_UNAUTHORIZED_REQUEST = 5,
  60         MCC_STATUS_NOT_SUPPORTED = 66
  61 };
  62
  63 #define CQE_STATUS_COMPL_MASK           0xFFFF
  64 #define CQE_STATUS_COMPL_SHIFT          0       /* bits 0 - 15 */
  65 #define CQE_STATUS_EXTD_MASK            0xFFFF
  66 #define CQE_STATUS_EXTD_SHIFT           16      /* bits 16 - 31 */
  67
  68 struct be_mcc_compl {
  69         u32 status;             /* dword 0 */
  70         u32 tag0;               /* dword 1 */
  71         u32 tag1;               /* dword 2 */
  72         u32 flags;              /* dword 3 */
  73 };
  74
  75 /* When the async bit of mcc_compl is set, the last 4 bytes of
  76  * mcc_compl is interpreted as follows:
  77  */
  78 #define ASYNC_TRAILER_EVENT_CODE_SHIFT  8       /* bits 8 - 15 */
  79 #define ASYNC_TRAILER_EVENT_CODE_MASK   0xFF
  80 #define ASYNC_TRAILER_EVENT_TYPE_SHIFT  16
  81 #define ASYNC_TRAILER_EVENT_TYPE_MASK   0xFF
  82 #define ASYNC_EVENT_CODE_LINK_STATE     0x1
  83 #define ASYNC_EVENT_CODE_GRP_5          0x5
  84 #define ASYNC_EVENT_QOS_SPEED           0x1
  85 #define ASYNC_EVENT_COS_PRIORITY        0x2
  86 #define ASYNC_EVENT_PVID_STATE          0x3
  87 struct be_async_event_trailer {
  88         u32 code;
  89 };
  90
  91 enum {
  92         LINK_DOWN       = 0x0,
  93         LINK_UP         = 0x1
  94 };
  95 #define LINK_STATUS_MASK                        0x1
  96 #define LOGICAL_LINK_STATUS_MASK                0x2
  97
  98 /* When the event code of an async trailer is link-state, the mcc_compl
  99  * must be interpreted as follows
 100  */
 101 struct be_async_event_link_state {
 102         u8 physical_port;
 103         u8 port_link_status;
 104         u8 port_duplex;
 105         u8 port_speed;
 106         u8 port_fault;
 107         u8 rsvd0[7];
 108         struct be_async_event_trailer trailer;
 109 } __packed;
 110
 111 /* When the event code of an async trailer is GRP-5 and event_type is QOS_SPEED
 112  * the mcc_compl must be interpreted as follows
 113  */
 114 struct be_async_event_grp5_qos_link_speed {
 115         u8 physical_port;
 116         u8 rsvd[5];
 117         u16 qos_link_speed;
 118         u32 event_tag;
 119         struct be_async_event_trailer trailer;
 120 } __packed;
 121
 122 /* When the event code of an async trailer is GRP5 and event type is
 123  * CoS-Priority, the mcc_compl must be interpreted as follows
 124  */
 125 struct be_async_event_grp5_cos_priority {
 126         u8 physical_port;
 127         u8 available_priority_bmap;
 128         u8 reco_default_priority;
 129         u8 valid;
 130         u8 rsvd0;
 131         u8 event_tag;
 132         struct be_async_event_trailer trailer;
 133 } __packed;
 134
 135 /* When the event code of an async trailer is GRP5 and event type is
 136  * PVID state, the mcc_compl must be interpreted as follows
 137  */
 138 struct be_async_event_grp5_pvid_state {
 139         u8 enabled;
 140         u8 rsvd0;
 141         u16 tag;
 142         u32 event_tag;
 143         u32 rsvd1;
 144         struct be_async_event_trailer trailer;
 145 } __packed;
 146
 147 struct be_mcc_mailbox {
 148         struct be_mcc_wrb wrb;
 149         struct be_mcc_compl compl;
 150 };
 151
 152 #define CMD_SUBSYSTEM_COMMON    0x1
 153 #define CMD_SUBSYSTEM_ETH       0x3
 154 #define CMD_SUBSYSTEM_LOWLEVEL  0xb
 155
 156 #define OPCODE_COMMON_NTWK_MAC_QUERY                    1
 157 #define OPCODE_COMMON_NTWK_MAC_SET                      2
 158 #define OPCODE_COMMON_NTWK_MULTICAST_SET                3
 159 #define OPCODE_COMMON_NTWK_VLAN_CONFIG                  4
 160 #define OPCODE_COMMON_NTWK_LINK_STATUS_QUERY            5
 161 #define OPCODE_COMMON_READ_FLASHROM                     6
 162 #define OPCODE_COMMON_WRITE_FLASHROM                    7
 163 #define OPCODE_COMMON_CQ_CREATE                         12
 164 #define OPCODE_COMMON_EQ_CREATE                         13
 165 #define OPCODE_COMMON_MCC_CREATE                        21
 166 #define OPCODE_COMMON_SET_QOS                           28
 167 #define OPCODE_COMMON_MCC_CREATE_EXT                    90
 168 #define OPCODE_COMMON_SEEPROM_READ                      30
 169 #define OPCODE_COMMON_GET_CNTL_ATTRIBUTES               32
 170 #define OPCODE_COMMON_NTWK_RX_FILTER                    34
 171 #define OPCODE_COMMON_GET_FW_VERSION                    35
 172 #define OPCODE_COMMON_SET_FLOW_CONTROL                  36
 173 #define OPCODE_COMMON_GET_FLOW_CONTROL                  37
 174 #define OPCODE_COMMON_SET_FRAME_SIZE                    39
 175 #define OPCODE_COMMON_MODIFY_EQ_DELAY                   41
 176 #define OPCODE_COMMON_FIRMWARE_CONFIG                   42
 177 #define OPCODE_COMMON_NTWK_INTERFACE_CREATE             50
 178 #define OPCODE_COMMON_NTWK_INTERFACE_DESTROY            51
 179 #define OPCODE_COMMON_MCC_DESTROY                       53
 180 #define OPCODE_COMMON_CQ_DESTROY                        54
 181 #define OPCODE_COMMON_EQ_DESTROY                        55
 182 #define OPCODE_COMMON_QUERY_FIRMWARE_CONFIG             58
 183 #define OPCODE_COMMON_NTWK_PMAC_ADD                     59
 184 #define OPCODE_COMMON_NTWK_PMAC_DEL                     60
 185 #define OPCODE_COMMON_FUNCTION_RESET                    61
 186 #define OPCODE_COMMON_MANAGE_FAT                        68
 187 #define OPCODE_COMMON_ENABLE_DISABLE_BEACON             69
 188 #define OPCODE_COMMON_GET_BEACON_STATE                  70
 189 #define OPCODE_COMMON_READ_TRANSRECV_DATA               73
 190 #define OPCODE_COMMON_GET_PORT_NAME                     77
 191 #define OPCODE_COMMON_GET_PHY_DETAILS                   102
 192 #define OPCODE_COMMON_SET_DRIVER_FUNCTION_CAP           103
 193 #define OPCODE_COMMON_GET_CNTL_ADDITIONAL_ATTRIBUTES    121
 194 #define OPCODE_COMMON_GET_EXT_FAT_CAPABILITES           125
 195 #define OPCODE_COMMON_SET_EXT_FAT_CAPABILITES           126
 196 #define OPCODE_COMMON_GET_MAC_LIST                      147
 197 #define OPCODE_COMMON_SET_MAC_LIST                      148
 198 #define OPCODE_COMMON_GET_HSW_CONFIG                    152
 199 #define OPCODE_COMMON_SET_HSW_CONFIG                    153
 200 #define OPCODE_COMMON_READ_OBJECT                       171
 201 #define OPCODE_COMMON_WRITE_OBJECT                      172
 202
 203 #define OPCODE_ETH_RSS_CONFIG                           1
 204 #define OPCODE_ETH_ACPI_CONFIG                          2
 205 #define OPCODE_ETH_PROMISCUOUS                          3
 206 #define OPCODE_ETH_GET_STATISTICS                       4
 207 #define OPCODE_ETH_TX_CREATE                            7
 208 #define OPCODE_ETH_RX_CREATE                            8
 209 #define OPCODE_ETH_TX_DESTROY                           9
 210 #define OPCODE_ETH_RX_DESTROY                           10
 211 #define OPCODE_ETH_ACPI_WOL_MAGIC_CONFIG                12
 212 #define OPCODE_ETH_GET_PPORT_STATS                      18
 213
 214 #define OPCODE_LOWLEVEL_HOST_DDR_DMA                    17
 215 #define OPCODE_LOWLEVEL_LOOPBACK_TEST                   18
 216 #define OPCODE_LOWLEVEL_SET_LOOPBACK_MODE               19
 217
 218 struct be_cmd_req_hdr {
 219         u8 opcode;              /* dword 0 */
 220         u8 subsystem;           /* dword 0 */
 221         u8 port_number;         /* dword 0 */
 222         u8 domain;              /* dword 0 */
 223         u32 timeout;            /* dword 1 */
 224         u32 request_length;     /* dword 2 */
 225         u8 version;             /* dword 3 */
 226         u8 rsvd[3];             /* dword 3 */
 227 };
 228
 229 #define RESP_HDR_INFO_OPCODE_SHIFT      0       /* bits 0 - 7 */
 230 #define RESP_HDR_INFO_SUBSYS_SHIFT      8       /* bits 8 - 15 */
 231 struct be_cmd_resp_hdr {
 232         u8 opcode;              /* dword 0 */
 233         u8 subsystem;           /* dword 0 */
 234         u8 rsvd[2];             /* dword 0 */
 235         u8 status;              /* dword 1 */
 236         u8 add_status;          /* dword 1 */
 237         u8 rsvd1[2];            /* dword 1 */
 238         u32 response_length;    /* dword 2 */
 239         u32 actual_resp_len;    /* dword 3 */
 240 };
 241
 242 struct phys_addr {
 243         u32 lo;
 244         u32 hi;
 245 };
 246
 247 /**************************
 248  * BE Command definitions *
 249  **************************/
 250
 251 /* Pseudo amap definition in which each bit of the actual structure is defined
 252  * as a byte: used to calculate offset/shift/mask of each field */
 253 struct amap_eq_context {
 254         u8 cidx[13];            /* dword 0*/
 255         u8 rsvd0[3];            /* dword 0*/
 256         u8 epidx[13];           /* dword 0*/
 257         u8 valid;               /* dword 0*/
 258         u8 rsvd1;               /* dword 0*/
 259         u8 size;                /* dword 0*/
 260         u8 pidx[13];            /* dword 1*/
 261         u8 rsvd2[3];            /* dword 1*/
 262         u8 pd[10];              /* dword 1*/
 263         u8 count[3];            /* dword 1*/
 264         u8 solevent;            /* dword 1*/
 265         u8 stalled;             /* dword 1*/
 266         u8 armed;               /* dword 1*/
 267         u8 rsvd3[4];            /* dword 2*/
 268         u8 func[8];             /* dword 2*/
 269         u8 rsvd4;               /* dword 2*/
 270         u8 delaymult[10];       /* dword 2*/
 271         u8 rsvd5[2];            /* dword 2*/
 272         u8 phase[2];            /* dword 2*/
 273         u8 nodelay;             /* dword 2*/
 274         u8 rsvd6[4];            /* dword 2*/
 275         u8 rsvd7[32];           /* dword 3*/
 276 } __packed;
 277
 278 struct be_cmd_req_eq_create {
 279         struct be_cmd_req_hdr hdr;
 280         u16 num_pages;          /* sword */
 281         u16 rsvd0;              /* sword */
 282         u8 context[sizeof(struct amap_eq_context) / 8];
 283         struct phys_addr pages[8];
 284 } __packed;
 285
 286 struct be_cmd_resp_eq_create {
 287         struct be_cmd_resp_hdr resp_hdr;
 288         u16 eq_id;              /* sword */
 289         u16 rsvd0;              /* sword */
 290 } __packed;
 291
 292 /******************** Mac query ***************************/
 293 enum {
 294         MAC_ADDRESS_TYPE_STORAGE = 0x0,
 295         MAC_ADDRESS_TYPE_NETWORK = 0x1,
 296         MAC_ADDRESS_TYPE_PD = 0x2,
 297         MAC_ADDRESS_TYPE_MANAGEMENT = 0x3
 298 };
 299
 300 struct mac_addr {
 301         u16 size_of_struct;
 302         u8 addr[ETH_ALEN];
 303 } __packed;
 304
 305 struct be_cmd_req_mac_query {
 306         struct be_cmd_req_hdr hdr;
 307         u8 type;
 308         u8 permanent;
 309         u16 if_id;
 310         u32 pmac_id;
 311 } __packed;
 312
 313 struct be_cmd_resp_mac_query {
 314         struct be_cmd_resp_hdr hdr;
 315         struct mac_addr mac;
 316 };
 317
 318 /******************** PMac Add ***************************/
 319 struct be_cmd_req_pmac_add {
 320         struct be_cmd_req_hdr hdr;
 321         u32 if_id;
 322         u8 mac_address[ETH_ALEN];
 323         u8 rsvd0[2];
 324 } __packed;
 325
 326 struct be_cmd_resp_pmac_add {
 327         struct be_cmd_resp_hdr hdr;
 328         u32 pmac_id;
 329 };
 330
 331 /******************** PMac Del ***************************/
 332 struct be_cmd_req_pmac_del {
 333         struct be_cmd_req_hdr hdr;
 334         u32 if_id;
 335         u32 pmac_id;
 336 };
 337
 338 /******************** Create CQ ***************************/
 339 /* Pseudo amap definition in which each bit of the actual structure is defined
 340  * as a byte: used to calculate offset/shift/mask of each field */
 341 struct amap_cq_context_be {
 342         u8 cidx[11];            /* dword 0*/
 343         u8 rsvd0;               /* dword 0*/
 344         u8 coalescwm[2];        /* dword 0*/
 345         u8 nodelay;             /* dword 0*/
 346         u8 epidx[11];           /* dword 0*/
 347         u8 rsvd1;               /* dword 0*/
 348         u8 count[2];            /* dword 0*/
 349         u8 valid;               /* dword 0*/
 350         u8 solevent;            /* dword 0*/
 351         u8 eventable;           /* dword 0*/
 352         u8 pidx[11];            /* dword 1*/
 353         u8 rsvd2;               /* dword 1*/
 354         u8 pd[10];              /* dword 1*/
 355         u8 eqid[8];             /* dword 1*/
 356         u8 stalled;             /* dword 1*/
 357         u8 armed;               /* dword 1*/
 358         u8 rsvd3[4];            /* dword 2*/
 359         u8 func[8];             /* dword 2*/
 360         u8 rsvd4[20];           /* dword 2*/
 361         u8 rsvd5[32];           /* dword 3*/
 362 } __packed;
 363
 364 struct amap_cq_context_lancer {
 365         u8 rsvd0[12];           /* dword 0*/
 366         u8 coalescwm[2];        /* dword 0*/
 367         u8 nodelay;             /* dword 0*/
 368         u8 rsvd1[12];           /* dword 0*/
 369         u8 count[2];            /* dword 0*/
 370         u8 valid;               /* dword 0*/
 371         u8 rsvd2;               /* dword 0*/
 372         u8 eventable;           /* dword 0*/
 373         u8 eqid[16];            /* dword 1*/
 374         u8 rsvd3[15];           /* dword 1*/
 375         u8 armed;               /* dword 1*/
 376         u8 rsvd4[32];           /* dword 2*/
 377         u8 rsvd5[32];           /* dword 3*/
 378 } __packed;
 379
 380 struct be_cmd_req_cq_create {
 381         struct be_cmd_req_hdr hdr;
 382         u16 num_pages;
 383         u8 page_size;
 384         u8 rsvd0;
 385         u8 context[sizeof(struct amap_cq_context_be) / 8];
 386         struct phys_addr pages[8];
 387 } __packed;
 388
 389
 390 struct be_cmd_resp_cq_create {
 391         struct be_cmd_resp_hdr hdr;
 392         u16 cq_id;
 393         u16 rsvd0;
 394 } __packed;
 395
 396 struct be_cmd_req_get_fat {
 397         struct be_cmd_req_hdr hdr;
 398         u32 fat_operation;
 399         u32 read_log_offset;
 400         u32 read_log_length;
 401         u32 data_buffer_size;
 402         u32 data_buffer[1];
 403 } __packed;
 404
 405 struct be_cmd_resp_get_fat {
 406         struct be_cmd_resp_hdr hdr;
 407         u32 log_size;
 408         u32 read_log_length;
 409         u32 rsvd[2];
 410         u32 data_buffer[1];
 411 } __packed;
 412
 413
 414 /******************** Create MCCQ ***************************/
 415 /* Pseudo amap definition in which each bit of the actual structure is defined
 416  * as a byte: used to calculate offset/shift/mask of each field */
 417 struct amap_mcc_context_be {
 418         u8 con_index[14];
 419         u8 rsvd0[2];
 420         u8 ring_size[4];
 421         u8 fetch_wrb;
 422         u8 fetch_r2t;
 423         u8 cq_id[10];
 424         u8 prod_index[14];
 425         u8 fid[8];
 426         u8 pdid[9];
 427         u8 valid;
 428         u8 rsvd1[32];
 429         u8 rsvd2[32];
 430 } __packed;
 431
 432 struct amap_mcc_context_lancer {
 433         u8 async_cq_id[16];
 434         u8 ring_size[4];
 435         u8 rsvd0[12];
 436         u8 rsvd1[31];
 437         u8 valid;
 438         u8 async_cq_valid[1];
 439         u8 rsvd2[31];
 440         u8 rsvd3[32];
 441 } __packed;
 442
 443 struct be_cmd_req_mcc_create {
 444         struct be_cmd_req_hdr hdr;
 445         u16 num_pages;
 446         u16 cq_id;
 447         u8 context[sizeof(struct amap_mcc_context_be) / 8];
 448         struct phys_addr pages[8];
 449 } __packed;
 450
 451 struct be_cmd_req_mcc_ext_create {
 452         struct be_cmd_req_hdr hdr;
 453         u16 num_pages;
 454         u16 cq_id;
 455         u32 async_event_bitmap[1];
 456         u8 context[sizeof(struct amap_mcc_context_be) / 8];
 457         struct phys_addr pages[8];
 458 } __packed;
 459
 460 struct be_cmd_resp_mcc_create {
 461         struct be_cmd_resp_hdr hdr;
 462         u16 id;
 463         u16 rsvd0;
 464 } __packed;
 465
 466 /******************** Create TxQ ***************************/
 467 #define BE_ETH_TX_RING_TYPE_STANDARD            2
 468 #define BE_ULP1_NUM                             1
 469
 470 /* Pseudo amap definition in which each bit of the actual structure is defined
 471  * as a byte: used to calculate offset/shift/mask of each field */
 472 struct amap_tx_context {
 473         u8 if_id[16];           /* dword 0 */
 474         u8 tx_ring_size[4];     /* dword 0 */
 475         u8 rsvd1[26];           /* dword 0 */
 476         u8 pci_func_id[8];      /* dword 1 */
 477         u8 rsvd2[9];            /* dword 1 */
 478         u8 ctx_valid;           /* dword 1 */
 479         u8 cq_id_send[16];      /* dword 2 */
 480         u8 rsvd3[16];           /* dword 2 */
 481         u8 rsvd4[32];           /* dword 3 */
 482         u8 rsvd5[32];           /* dword 4 */
 483         u8 rsvd6[32];           /* dword 5 */
 484         u8 rsvd7[32];           /* dword 6 */
 485         u8 rsvd8[32];           /* dword 7 */
 486         u8 rsvd9[32];           /* dword 8 */
 487         u8 rsvd10[32];          /* dword 9 */
 488         u8 rsvd11[32];          /* dword 10 */
 489         u8 rsvd12[32];          /* dword 11 */
 490         u8 rsvd13[32];          /* dword 12 */
 491         u8 rsvd14[32];          /* dword 13 */
 492         u8 rsvd15[32];          /* dword 14 */
 493         u8 rsvd16[32];          /* dword 15 */
 494 } __packed;
 495
 496 struct be_cmd_req_eth_tx_create {
 497         struct be_cmd_req_hdr hdr;
 498         u8 num_pages;
 499         u8 ulp_num;
 500         u8 type;
 501         u8 bound_port;
 502         u8 context[sizeof(struct amap_tx_context) / 8];
 503         struct phys_addr pages[8];
 504 } __packed;
 505
 506 struct be_cmd_resp_eth_tx_create {
 507         struct be_cmd_resp_hdr hdr;
 508         u16 cid;
 509         u16 rsvd0;
 510 } __packed;
 511
 512 /******************** Create RxQ ***************************/
 513 struct be_cmd_req_eth_rx_create {
 514         struct be_cmd_req_hdr hdr;
 515         u16 cq_id;
 516         u8 frag_size;
 517         u8 num_pages;
 518         struct phys_addr pages[2];
 519         u32 interface_id;
 520         u16 max_frame_size;
 521         u16 rsvd0;
 522         u32 rss_queue;
 523 } __packed;
 524
 525 struct be_cmd_resp_eth_rx_create {
 526         struct be_cmd_resp_hdr hdr;
 527         u16 id;
 528         u8 rss_id;
 529         u8 rsvd0;
 530 } __packed;
 531
 532 /******************** Q Destroy  ***************************/
 533 /* Type of Queue to be destroyed */
 534 enum {
 535         QTYPE_EQ = 1,
 536         QTYPE_CQ,
 537         QTYPE_TXQ,
 538         QTYPE_RXQ,
 539         QTYPE_MCCQ
 540 };
 541
 542 struct be_cmd_req_q_destroy {
 543         struct be_cmd_req_hdr hdr;
 544         u16 id;
 545         u16 bypass_flush;       /* valid only for rx q destroy */
 546 } __packed;
 547
 548 /************ I/f Create (it's actually I/f Config Create)**********/
 549
 550 /* Capability flags for the i/f */
 551 enum be_if_flags {
 552         BE_IF_FLAGS_RSS = 0x4,
 553         BE_IF_FLAGS_PROMISCUOUS = 0x8,
 554         BE_IF_FLAGS_BROADCAST = 0x10,
 555         BE_IF_FLAGS_UNTAGGED = 0x20,
 556         BE_IF_FLAGS_ULP = 0x40,
 557         BE_IF_FLAGS_VLAN_PROMISCUOUS = 0x80,
 558         BE_IF_FLAGS_VLAN = 0x100,
 559         BE_IF_FLAGS_MCAST_PROMISCUOUS = 0x200,
 560         BE_IF_FLAGS_PASS_L2_ERRORS = 0x400,
 561         BE_IF_FLAGS_PASS_L3L4_ERRORS = 0x800,
 562         BE_IF_FLAGS_MULTICAST = 0x1000
 563 };
 564
 565 /* An RX interface is an object with one or more MAC addresses and
 566  * filtering capabilities. */
 567 struct be_cmd_req_if_create {
 568         struct be_cmd_req_hdr hdr;
 569         u32 version;            /* ignore currently */
 570         u32 capability_flags;
 571         u32 enable_flags;
 572         u8 mac_addr[ETH_ALEN];
 573         u8 rsvd0;
 574         u8 pmac_invalid; /* if set, don't attach the mac addr to the i/f */
 575         u32 vlan_tag;    /* not used currently */
 576 } __packed;
 577
 578 struct be_cmd_resp_if_create {
 579         struct be_cmd_resp_hdr hdr;
 580         u32 interface_id;
 581         u32 pmac_id;
 582 };
 583
 584 /****** I/f Destroy(it's actually I/f Config Destroy )**********/
 585 struct be_cmd_req_if_destroy {
 586         struct be_cmd_req_hdr hdr;
 587         u32 interface_id;
 588 };
 589
 590 /*************** HW Stats Get **********************************/
 591 struct be_port_rxf_stats_v0 {
 592         u32 rx_bytes_lsd;       /* dword 0*/
 593         u32 rx_bytes_msd;       /* dword 1*/
 594         u32 rx_total_frames;    /* dword 2*/
 595         u32 rx_unicast_frames;  /* dword 3*/
 596         u32 rx_multicast_frames;        /* dword 4*/
 597         u32 rx_broadcast_frames;        /* dword 5*/
 598         u32 rx_crc_errors;      /* dword 6*/
 599         u32 rx_alignment_symbol_errors; /* dword 7*/
 600         u32 rx_pause_frames;    /* dword 8*/
 601         u32 rx_control_frames;  /* dword 9*/
 602         u32 rx_in_range_errors; /* dword 10*/
 603         u32 rx_out_range_errors;        /* dword 11*/
 604         u32 rx_frame_too_long;  /* dword 12*/
 605         u32 rx_address_mismatch_drops;  /* dword 13*/
 606         u32 rx_vlan_mismatch_drops;     /* dword 14*/
 607         u32 rx_dropped_too_small;       /* dword 15*/
 608         u32 rx_dropped_too_short;       /* dword 16*/
 609         u32 rx_dropped_header_too_small;        /* dword 17*/
 610         u32 rx_dropped_tcp_length;      /* dword 18*/
 611         u32 rx_dropped_runt;    /* dword 19*/
 612         u32 rx_64_byte_packets; /* dword 20*/
 613         u32 rx_65_127_byte_packets;     /* dword 21*/
 614         u32 rx_128_256_byte_packets;    /* dword 22*/
 615         u32 rx_256_511_byte_packets;    /* dword 23*/
 616         u32 rx_512_1023_byte_packets;   /* dword 24*/
 617         u32 rx_1024_1518_byte_packets;  /* dword 25*/
 618         u32 rx_1519_2047_byte_packets;  /* dword 26*/
 619         u32 rx_2048_4095_byte_packets;  /* dword 27*/
 620         u32 rx_4096_8191_byte_packets;  /* dword 28*/
 621         u32 rx_8192_9216_byte_packets;  /* dword 29*/
 622         u32 rx_ip_checksum_errs;        /* dword 30*/
 623         u32 rx_tcp_checksum_errs;       /* dword 31*/
 624         u32 rx_udp_checksum_errs;       /* dword 32*/
 625         u32 rx_non_rss_packets; /* dword 33*/
 626         u32 rx_ipv4_packets;    /* dword 34*/
 627         u32 rx_ipv6_packets;    /* dword 35*/
 628         u32 rx_ipv4_bytes_lsd;  /* dword 36*/
 629         u32 rx_ipv4_bytes_msd;  /* dword 37*/
 630         u32 rx_ipv6_bytes_lsd;  /* dword 38*/
 631         u32 rx_ipv6_bytes_msd;  /* dword 39*/
 632         u32 rx_chute1_packets;  /* dword 40*/
 633         u32 rx_chute2_packets;  /* dword 41*/
 634         u32 rx_chute3_packets;  /* dword 42*/
 635         u32 rx_management_packets;      /* dword 43*/
 636         u32 rx_switched_unicast_packets;        /* dword 44*/
 637         u32 rx_switched_multicast_packets;      /* dword 45*/
 638         u32 rx_switched_broadcast_packets;      /* dword 46*/
 639         u32 tx_bytes_lsd;       /* dword 47*/
 640         u32 tx_bytes_msd;       /* dword 48*/
 641         u32 tx_unicastframes;   /* dword 49*/
 642         u32 tx_multicastframes; /* dword 50*/
 643         u32 tx_broadcastframes; /* dword 51*/
 644         u32 tx_pauseframes;     /* dword 52*/
 645         u32 tx_controlframes;   /* dword 53*/
 646         u32 tx_64_byte_packets; /* dword 54*/
 647         u32 tx_65_127_byte_packets;     /* dword 55*/
 648         u32 tx_128_256_byte_packets;    /* dword 56*/
 649         u32 tx_256_511_byte_packets;    /* dword 57*/
 650         u32 tx_512_1023_byte_packets;   /* dword 58*/
 651         u32 tx_1024_1518_byte_packets;  /* dword 59*/
 652         u32 tx_1519_2047_byte_packets;  /* dword 60*/
 653         u32 tx_2048_4095_byte_packets;  /* dword 61*/
 654         u32 tx_4096_8191_byte_packets;  /* dword 62*/
 655         u32 tx_8192_9216_byte_packets;  /* dword 63*/
 656         u32 rx_fifo_overflow;   /* dword 64*/
 657         u32 rx_input_fifo_overflow;     /* dword 65*/
 658 };
 659
 660 struct be_rxf_stats_v0 {
 661         struct be_port_rxf_stats_v0 port[2];
 662         u32 rx_drops_no_pbuf;   /* dword 132*/
 663         u32 rx_drops_no_txpb;   /* dword 133*/
 664         u32 rx_drops_no_erx_descr;      /* dword 134*/
 665         u32 rx_drops_no_tpre_descr;     /* dword 135*/
 666         u32 management_rx_port_packets; /* dword 136*/
 667         u32 management_rx_port_bytes;   /* dword 137*/
 668         u32 management_rx_port_pause_frames;    /* dword 138*/
 669         u32 management_rx_port_errors;  /* dword 139*/
 670         u32 management_tx_port_packets; /* dword 140*/
 671         u32 management_tx_port_bytes;   /* dword 141*/
 672         u32 management_tx_port_pause;   /* dword 142*/
 673         u32 management_rx_port_rxfifo_overflow; /* dword 143*/
 674         u32 rx_drops_too_many_frags;    /* dword 144*/
 675         u32 rx_drops_invalid_ring;      /* dword 145*/
 676         u32 forwarded_packets;  /* dword 146*/
 677         u32 rx_drops_mtu;       /* dword 147*/
 678         u32 rsvd0[7];
 679         u32 port0_jabber_events;
 680         u32 port1_jabber_events;
 681         u32 rsvd1[6];
 682 };
 683
 684 struct be_erx_stats_v0 {
 685         u32 rx_drops_no_fragments[44];     /* dwordS 0 to 43*/
 686         u32 rsvd[4];
 687 };
 688
 689 struct be_pmem_stats {
 690         u32 eth_red_drops;
 691         u32 rsvd[5];
 692 };
 693
 694 struct be_hw_stats_v0 {
 695         struct be_rxf_stats_v0 rxf;
 696         u32 rsvd[48];
 697         struct be_erx_stats_v0 erx;
 698         struct be_pmem_stats pmem;
 699 };
 700
 701 struct be_cmd_req_get_stats_v0 {
 702         struct be_cmd_req_hdr hdr;
 703         u8 rsvd[sizeof(struct be_hw_stats_v0)];
 704 };
 705
 706 struct be_cmd_resp_get_stats_v0 {
 707         struct be_cmd_resp_hdr hdr;
 708         struct be_hw_stats_v0 hw_stats;
 709 };
 710
 711 struct lancer_pport_stats {
 712         u32 tx_packets_lo;
 713         u32 tx_packets_hi;
 714         u32 tx_unicast_packets_lo;
 715         u32 tx_unicast_packets_hi;
 716         u32 tx_multicast_packets_lo;
 717         u32 tx_multicast_packets_hi;
 718         u32 tx_broadcast_packets_lo;
 719         u32 tx_broadcast_packets_hi;
 720         u32 tx_bytes_lo;
 721         u32 tx_bytes_hi;
 722         u32 tx_unicast_bytes_lo;
 723         u32 tx_unicast_bytes_hi;
 724         u32 tx_multicast_bytes_lo;
 725         u32 tx_multicast_bytes_hi;
 726         u32 tx_broadcast_bytes_lo;
 727         u32 tx_broadcast_bytes_hi;
 728         u32 tx_discards_lo;
 729         u32 tx_discards_hi;
 730         u32 tx_errors_lo;
 731         u32 tx_errors_hi;
 732         u32 tx_pause_frames_lo;
 733         u32 tx_pause_frames_hi;
 734         u32 tx_pause_on_frames_lo;
 735         u32 tx_pause_on_frames_hi;
 736         u32 tx_pause_off_frames_lo;
 737         u32 tx_pause_off_frames_hi;
 738         u32 tx_internal_mac_errors_lo;
 739         u32 tx_internal_mac_errors_hi;
 740         u32 tx_control_frames_lo;
 741         u32 tx_control_frames_hi;
 742         u32 tx_packets_64_bytes_lo;
 743         u32 tx_packets_64_bytes_hi;
 744         u32 tx_packets_65_to_127_bytes_lo;
 745         u32 tx_packets_65_to_127_bytes_hi;
 746         u32 tx_packets_128_to_255_bytes_lo;
 747         u32 tx_packets_128_to_255_bytes_hi;
 748         u32 tx_packets_256_to_511_bytes_lo;
 749         u32 tx_packets_256_to_511_bytes_hi;
 750         u32 tx_packets_512_to_1023_bytes_lo;
 751         u32 tx_packets_512_to_1023_bytes_hi;
 752         u32 tx_packets_1024_to_1518_bytes_lo;
 753         u32 tx_packets_1024_to_1518_bytes_hi;
 754         u32 tx_packets_1519_to_2047_bytes_lo;
 755         u32 tx_packets_1519_to_2047_bytes_hi;
 756         u32 tx_packets_2048_to_4095_bytes_lo;
 757         u32 tx_packets_2048_to_4095_bytes_hi;
 758         u32 tx_packets_4096_to_8191_bytes_lo;
 759         u32 tx_packets_4096_to_8191_bytes_hi;
 760         u32 tx_packets_8192_to_9216_bytes_lo;
 761         u32 tx_packets_8192_to_9216_bytes_hi;
 762         u32 tx_lso_packets_lo;
 763         u32 tx_lso_packets_hi;
 764         u32 rx_packets_lo;
 765         u32 rx_packets_hi;
 766         u32 rx_unicast_packets_lo;
 767         u32 rx_unicast_packets_hi;
 768         u32 rx_multicast_packets_lo;
 769         u32 rx_multicast_packets_hi;
 770         u32 rx_broadcast_packets_lo;
 771         u32 rx_broadcast_packets_hi;
 772         u32 rx_bytes_lo;
 773         u32 rx_bytes_hi;
 774         u32 rx_unicast_bytes_lo;
 775         u32 rx_unicast_bytes_hi;
 776         u32 rx_multicast_bytes_lo;
 777         u32 rx_multicast_bytes_hi;
 778         u32 rx_broadcast_bytes_lo;
 779         u32 rx_broadcast_bytes_hi;
 780         u32 rx_unknown_protos;
 781         u32 rsvd_69; /* Word 69 is reserved */
 782         u32 rx_discards_lo;
 783         u32 rx_discards_hi;
 784         u32 rx_errors_lo;
 785         u32 rx_errors_hi;
 786         u32 rx_crc_errors_lo;
 787         u32 rx_crc_errors_hi;
 788         u32 rx_alignment_errors_lo;
 789         u32 rx_alignment_errors_hi;
 790         u32 rx_symbol_errors_lo;
 791         u32 rx_symbol_errors_hi;
 792         u32 rx_pause_frames_lo;
 793         u32 rx_pause_frames_hi;
 794         u32 rx_pause_on_frames_lo;
 795         u32 rx_pause_on_frames_hi;
 796         u32 rx_pause_off_frames_lo;
 797         u32 rx_pause_off_frames_hi;
 798         u32 rx_frames_too_long_lo;
 799         u32 rx_frames_too_long_hi;
 800         u32 rx_internal_mac_errors_lo;
 801         u32 rx_internal_mac_errors_hi;
 802         u32 rx_undersize_packets;
 803         u32 rx_oversize_packets;
 804         u32 rx_fragment_packets;
 805         u32 rx_jabbers;
 806         u32 rx_control_frames_lo;
 807         u32 rx_control_frames_hi;
 808         u32 rx_control_frames_unknown_opcode_lo;
 809         u32 rx_control_frames_unknown_opcode_hi;
 810         u32 rx_in_range_errors;
 811         u32 rx_out_of_range_errors;
 812         u32 rx_address_mismatch_drops;
 813         u32 rx_vlan_mismatch_drops;
 814         u32 rx_dropped_too_small;
 815         u32 rx_dropped_too_short;
 816         u32 rx_dropped_header_too_small;
 817         u32 rx_dropped_invalid_tcp_length;
 818         u32 rx_dropped_runt;
 819         u32 rx_ip_checksum_errors;
 820         u32 rx_tcp_checksum_errors;
 821         u32 rx_udp_checksum_errors;
 822         u32 rx_non_rss_packets;
 823         u32 rsvd_111;
 824         u32 rx_ipv4_packets_lo;
 825         u32 rx_ipv4_packets_hi;
 826         u32 rx_ipv6_packets_lo;
 827         u32 rx_ipv6_packets_hi;
 828         u32 rx_ipv4_bytes_lo;
 829         u32 rx_ipv4_bytes_hi;
 830         u32 rx_ipv6_bytes_lo;
 831         u32 rx_ipv6_bytes_hi;
 832         u32 rx_nic_packets_lo;
 833         u32 rx_nic_packets_hi;
 834         u32 rx_tcp_packets_lo;
 835         u32 rx_tcp_packets_hi;
 836         u32 rx_iscsi_packets_lo;
 837         u32 rx_iscsi_packets_hi;
 838         u32 rx_management_packets_lo;
 839         u32 rx_management_packets_hi;
 840         u32 rx_switched_unicast_packets_lo;
 841         u32 rx_switched_unicast_packets_hi;
 842         u32 rx_switched_multicast_packets_lo;
 843         u32 rx_switched_multicast_packets_hi;
 844         u32 rx_switched_broadcast_packets_lo;
 845         u32 rx_switched_broadcast_packets_hi;
 846         u32 num_forwards_lo;
 847         u32 num_forwards_hi;
 848         u32 rx_fifo_overflow;
 849         u32 rx_input_fifo_overflow;
 850         u32 rx_drops_too_many_frags_lo;
 851         u32 rx_drops_too_many_frags_hi;
 852         u32 rx_drops_invalid_queue;
 853         u32 rsvd_141;
 854         u32 rx_drops_mtu_lo;
 855         u32 rx_drops_mtu_hi;
 856         u32 rx_packets_64_bytes_lo;
 857         u32 rx_packets_64_bytes_hi;
 858         u32 rx_packets_65_to_127_bytes_lo;
 859         u32 rx_packets_65_to_127_bytes_hi;
 860         u32 rx_packets_128_to_255_bytes_lo;
 861         u32 rx_packets_128_to_255_bytes_hi;
 862         u32 rx_packets_256_to_511_bytes_lo;
 863         u32 rx_packets_256_to_511_bytes_hi;
 864         u32 rx_packets_512_to_1023_bytes_lo;
 865         u32 rx_packets_512_to_1023_bytes_hi;
 866         u32 rx_packets_1024_to_1518_bytes_lo;
 867         u32 rx_packets_1024_to_1518_bytes_hi;
 868         u32 rx_packets_1519_to_2047_bytes_lo;
 869         u32 rx_packets_1519_to_2047_bytes_hi;
 870         u32 rx_packets_2048_to_4095_bytes_lo;
 871         u32 rx_packets_2048_to_4095_bytes_hi;
 872         u32 rx_packets_4096_to_8191_bytes_lo;
 873         u32 rx_packets_4096_to_8191_bytes_hi;
 874         u32 rx_packets_8192_to_9216_bytes_lo;
 875         u32 rx_packets_8192_to_9216_bytes_hi;
 876 };
 877
 878 struct pport_stats_params {
 879         u16 pport_num;
 880         u8 rsvd;
 881         u8 reset_stats;
 882 };
 883
 884 struct lancer_cmd_req_pport_stats {
 885         struct be_cmd_req_hdr hdr;
 886         union {
 887                 struct pport_stats_params params;
 888                 u8 rsvd[sizeof(struct lancer_pport_stats)];
 889         } cmd_params;
 890 };
 891
 892 struct lancer_cmd_resp_pport_stats {
 893         struct be_cmd_resp_hdr hdr;
 894         struct lancer_pport_stats pport_stats;
 895 };
 896
 897 static inline struct lancer_pport_stats*
 898         pport_stats_from_cmd(struct be_adapter *adapter)
 899 {
 900         struct lancer_cmd_resp_pport_stats *cmd = adapter->stats_cmd.va;
 901         return &cmd->pport_stats;
 902 }
 903
 904 struct be_cmd_req_get_cntl_addnl_attribs {
 905         struct be_cmd_req_hdr hdr;
 906         u8 rsvd[8];
 907 };
 908
 909 struct be_cmd_resp_get_cntl_addnl_attribs {
 910         struct be_cmd_resp_hdr hdr;
 911         u16 ipl_file_number;
 912         u8 ipl_file_version;
 913         u8 rsvd0;
 914         u8 on_die_temperature; /* in degrees centigrade*/
 915         u8 rsvd1[3];
 916 };
 917
 918 struct be_cmd_req_vlan_config {
 919         struct be_cmd_req_hdr hdr;
 920         u8 interface_id;
 921         u8 promiscuous;
 922         u8 untagged;
 923         u8 num_vlan;
 924         u16 normal_vlan[64];
 925 } __packed;
 926
 927 /******************* RX FILTER ******************************/
 928 #define BE_MAX_MC               64 /* set mcast promisc if > 64 */
 929 struct macaddr {
 930         u8 byte[ETH_ALEN];
 931 };
 932
 933 struct be_cmd_req_rx_filter {
 934         struct be_cmd_req_hdr hdr;
 935         u32 global_flags_mask;
 936         u32 global_flags;
 937         u32 if_flags_mask;
 938         u32 if_flags;
 939         u32 if_id;
 940         u32 mcast_num;
 941         struct macaddr mcast_mac[BE_MAX_MC];
 942 };
 943
 944 /******************** Link Status Query *******************/
 945 struct be_cmd_req_link_status {
 946         struct be_cmd_req_hdr hdr;
 947         u32 rsvd;
 948 };
 949
 950 enum {
 951         PHY_LINK_DUPLEX_NONE = 0x0,
 952         PHY_LINK_DUPLEX_HALF = 0x1,
 953         PHY_LINK_DUPLEX_FULL = 0x2
 954 };
 955
 956 enum {
 957         PHY_LINK_SPEED_ZERO = 0x0,      /* => No link */
 958         PHY_LINK_SPEED_10MBPS = 0x1,
 959         PHY_LINK_SPEED_100MBPS = 0x2,
 960         PHY_LINK_SPEED_1GBPS = 0x3,
 961         PHY_LINK_SPEED_10GBPS = 0x4
 962 };
 963
 964 struct be_cmd_resp_link_status {
 965         struct be_cmd_resp_hdr hdr;
 966         u8 physical_port;
 967         u8 mac_duplex;
 968         u8 mac_speed;
 969         u8 mac_fault;
 970         u8 mgmt_mac_duplex;
 971         u8 mgmt_mac_speed;
 972         u16 link_speed;
 973         u8 logical_link_status;
 974         u8 rsvd1[3];
 975 } __packed;
 976
 977 /******************** Port Identification ***************************/
 978 /*    Identifies the type of port attached to NIC     */
 979 struct be_cmd_req_port_type {
 980         struct be_cmd_req_hdr hdr;
 981         u32 page_num;
 982         u32 port;
 983 };
 984
 985 enum {
 986         TR_PAGE_A0 = 0xa0,
 987         TR_PAGE_A2 = 0xa2
 988 };
 989
 990 struct be_cmd_resp_port_type {
 991         struct be_cmd_resp_hdr hdr;
 992         u32 page_num;
 993         u32 port;
 994         struct data {
 995                 u8 identifier;
 996                 u8 identifier_ext;
 997                 u8 connector;
 998                 u8 transceiver[8];
 999                 u8 rsvd0[3];
1000                 u8 length_km;
1001                 u8 length_hm;
1002                 u8 length_om1;
1003                 u8 length_om2;
1004                 u8 length_cu;
1005                 u8 length_cu_m;
1006                 u8 vendor_name[16];
1007                 u8 rsvd;
1008                 u8 vendor_oui[3];
1009                 u8 vendor_pn[16];
1010                 u8 vendor_rev[4];
1011         } data;
1012 };
1013
1014 /******************** Get FW Version *******************/
1015 struct be_cmd_req_get_fw_version {
1016         struct be_cmd_req_hdr hdr;
1017         u8 rsvd0[FW_VER_LEN];
1018         u8 rsvd1[FW_VER_LEN];
1019 } __packed;
1020
1021 struct be_cmd_resp_get_fw_version {
1022         struct be_cmd_resp_hdr hdr;
1023         u8 firmware_version_string[FW_VER_LEN];
1024         u8 fw_on_flash_version_string[FW_VER_LEN];
1025 } __packed;
1026
1027 /******************** Set Flow Contrl *******************/
1028 struct be_cmd_req_set_flow_control {
1029         struct be_cmd_req_hdr hdr;
1030         u16 tx_flow_control;
1031         u16 rx_flow_control;
1032 } __packed;
1033
1034 /******************** Get Flow Contrl *******************/
1035 struct be_cmd_req_get_flow_control {
1036         struct be_cmd_req_hdr hdr;
1037         u32 rsvd;
1038 };
1039
1040 struct be_cmd_resp_get_flow_control {
1041         struct be_cmd_resp_hdr hdr;
1042         u16 tx_flow_control;
1043         u16 rx_flow_control;
1044 } __packed;
1045
1046 /******************** Modify EQ Delay *******************/
1047 struct be_cmd_req_modify_eq_delay {
1048         struct be_cmd_req_hdr hdr;
1049         u32 num_eq;
1050         struct {
1051                 u32 eq_id;
1052                 u32 phase;
1053                 u32 delay_multiplier;
1054         } delay[8];
1055 } __packed;
1056
1057 struct be_cmd_resp_modify_eq_delay {
1058         struct be_cmd_resp_hdr hdr;
1059         u32 rsvd0;
1060 } __packed;
1061
1062 /******************** Get FW Config *******************/
1063 #define BE_FUNCTION_CAPS_RSS                    0x2
1064 /* The HW can come up in either of the following multi-channel modes
1065  * based on the skew/IPL.
1066  */
1067 #define RDMA_ENABLED                            0x4
1068 #define FLEX10_MODE                             0x400
1069 #define VNIC_MODE                               0x20000
1070 #define UMC_ENABLED                             0x1000000
1071 struct be_cmd_req_query_fw_cfg {
1072         struct be_cmd_req_hdr hdr;
1073         u32 rsvd[31];
1074 };
1075
1076 struct be_cmd_resp_query_fw_cfg {
1077         struct be_cmd_resp_hdr hdr;
1078         u32 be_config_number;
1079         u32 asic_revision;
1080         u32 phys_port;
1081         u32 function_mode;
1082         u32 rsvd[26];
1083         u32 function_caps;
1084 };
1085
1086 /******************** RSS Config ****************************************/
1087 /* RSS type             Input parameters used to compute RX hash
1088  * RSS_ENABLE_IPV4      SRC IPv4, DST IPv4
1089  * RSS_ENABLE_TCP_IPV4  SRC IPv4, DST IPv4, TCP SRC PORT, TCP DST PORT
1090  * RSS_ENABLE_IPV6      SRC IPv6, DST IPv6
1091  * RSS_ENABLE_TCP_IPV6  SRC IPv6, DST IPv6, TCP SRC PORT, TCP DST PORT
1092  * RSS_ENABLE_UDP_IPV4  SRC IPv4, DST IPv4, UDP SRC PORT, UDP DST PORT
1093  * RSS_ENABLE_UDP_IPV6  SRC IPv6, DST IPv6, UDP SRC PORT, UDP DST PORT
1094  *
1095  * When multiple RSS types are enabled, HW picks the best hash policy
1096  * based on the type of the received packet.
1097  */
1098 #define RSS_ENABLE_NONE                         0x0
1099 #define RSS_ENABLE_IPV4                         0x1
1100 #define RSS_ENABLE_TCP_IPV4                     0x2
1101 #define RSS_ENABLE_IPV6                         0x4
1102 #define RSS_ENABLE_TCP_IPV6                     0x8
1103 #define RSS_ENABLE_UDP_IPV4                     0x10
1104 #define RSS_ENABLE_UDP_IPV6                     0x20
1105
1106 struct be_cmd_req_rss_config {
1107         struct be_cmd_req_hdr hdr;
1108         u32 if_id;
1109         u16 enable_rss;
1110         u16 cpu_table_size_log2;
1111         u32 hash[10];
1112         u8 cpu_table[128];
1113         u8 flush;
1114         u8 rsvd0[3];
1115 };
1116
1117 /******************** Port Beacon ***************************/
1118
1119 #define BEACON_STATE_ENABLED            0x1
1120 #define BEACON_STATE_DISABLED           0x0
1121
1122 struct be_cmd_req_enable_disable_beacon {
1123         struct be_cmd_req_hdr hdr;
1124         u8  port_num;
1125         u8  beacon_state;
1126         u8  beacon_duration;
1127         u8  status_duration;
1128 } __packed;
1129
1130 struct be_cmd_resp_enable_disable_beacon {
1131         struct be_cmd_resp_hdr resp_hdr;
1132         u32 rsvd0;
1133 } __packed;
1134
1135 struct be_cmd_req_get_beacon_state {
1136         struct be_cmd_req_hdr hdr;
1137         u8  port_num;
1138         u8  rsvd0;
1139         u16 rsvd1;
1140 } __packed;
1141
1142 struct be_cmd_resp_get_beacon_state {
1143         struct be_cmd_resp_hdr resp_hdr;
1144         u8 beacon_state;
1145         u8 rsvd0[3];
1146 } __packed;
1147
1148 /****************** Firmware Flash ******************/
1149 struct flashrom_params {
1150         u32 op_code;
1151         u32 op_type;
1152         u32 data_buf_size;
1153         u32 offset;
1154         u8 data_buf[4];
1155 };
1156
1157 struct be_cmd_write_flashrom {
1158         struct be_cmd_req_hdr hdr;
1159         struct flashrom_params params;
1160 };
1161
1162 /**************** Lancer Firmware Flash ************/
1163 struct amap_lancer_write_obj_context {
1164         u8 write_length[24];
1165         u8 reserved1[7];
1166         u8 eof;
1167 } __packed;
1168
1169 struct lancer_cmd_req_write_object {
1170         struct be_cmd_req_hdr hdr;
1171         u8 context[sizeof(struct amap_lancer_write_obj_context) / 8];
1172         u32 write_offset;
1173         u8 object_name[104];
1174         u32 descriptor_count;
1175         u32 buf_len;
1176         u32 addr_low;
1177         u32 addr_high;
1178 };
1179
1180 #define LANCER_NO_RESET_NEEDED          0x00
1181 #define LANCER_FW_RESET_NEEDED          0x02
1182 struct lancer_cmd_resp_write_object {
1183         u8 opcode;
1184         u8 subsystem;
1185         u8 rsvd1[2];
1186         u8 status;
1187         u8 additional_status;
1188         u8 rsvd2[2];
1189         u32 resp_len;
1190         u32 actual_resp_len;
1191         u32 actual_write_len;
1192         u8 change_status;
1193         u8 rsvd3[3];
1194 };
1195
1196 /************************ Lancer Read FW info **************/
1197 #define LANCER_READ_FILE_CHUNK                  (32*1024)
1198 #define LANCER_READ_FILE_EOF_MASK               0x80000000
1199
1200 #define LANCER_FW_DUMP_FILE                     "/dbg/dump.bin"
1201 #define LANCER_VPD_PF_FILE                      "/vpd/ntr_pf.vpd"
1202 #define LANCER_VPD_VF_FILE                      "/vpd/ntr_vf.vpd"
1203
1204 struct lancer_cmd_req_read_object {
1205         struct be_cmd_req_hdr hdr;
1206         u32 desired_read_len;
1207         u32 read_offset;
1208         u8 object_name[104];
1209         u32 descriptor_count;
1210         u32 buf_len;
1211         u32 addr_low;
1212         u32 addr_high;
1213 };
1214
1215 struct lancer_cmd_resp_read_object {
1216         u8 opcode;
1217         u8 subsystem;
1218         u8 rsvd1[2];
1219         u8 status;
1220         u8 additional_status;
1221         u8 rsvd2[2];
1222         u32 resp_len;
1223         u32 actual_resp_len;
1224         u32 actual_read_len;
1225         u32 eof;
1226 };
1227
1228 /************************ WOL *******************************/
1229 struct be_cmd_req_acpi_wol_magic_config{
1230         struct be_cmd_req_hdr hdr;
1231         u32 rsvd0[145];
1232         u8 magic_mac[6];
1233         u8 rsvd2[2];
1234 } __packed;
1235
1236 struct be_cmd_req_acpi_wol_magic_config_v1 {
1237         struct be_cmd_req_hdr hdr;
1238         u8 rsvd0[2];
1239         u8 query_options;
1240         u8 rsvd1[5];
1241         u32 rsvd2[288];
1242         u8 magic_mac[6];
1243         u8 rsvd3[22];
1244 } __packed;
1245
1246 struct be_cmd_resp_acpi_wol_magic_config_v1 {
1247         struct be_cmd_resp_hdr hdr;
1248         u8 rsvd0[2];
1249         u8 wol_settings;
1250         u8 rsvd1[5];
1251         u32 rsvd2[295];
1252 } __packed;
1253
1254 #define BE_GET_WOL_CAP                  2
1255
1256 #define BE_WOL_CAP                      0x1
1257 #define BE_PME_D0_CAP                   0x8
1258 #define BE_PME_D1_CAP                   0x10
1259 #define BE_PME_D2_CAP                   0x20
1260 #define BE_PME_D3HOT_CAP                0x40
1261 #define BE_PME_D3COLD_CAP               0x80
1262
1263 /********************** LoopBack test *********************/
1264 struct be_cmd_req_loopback_test {
1265         struct be_cmd_req_hdr hdr;
1266         u32 loopback_type;
1267         u32 num_pkts;
1268         u64 pattern;
1269         u32 src_port;
1270         u32 dest_port;
1271         u32 pkt_size;
1272 };
1273
1274 struct be_cmd_resp_loopback_test {
1275         struct be_cmd_resp_hdr resp_hdr;
1276         u32    status;
1277         u32    num_txfer;
1278         u32    num_rx;
1279         u32    miscomp_off;
1280         u32    ticks_compl;
1281 };
1282
1283 struct be_cmd_req_set_lmode {
1284         struct be_cmd_req_hdr hdr;
1285         u8 src_port;
1286         u8 dest_port;
1287         u8 loopback_type;
1288         u8 loopback_state;
1289 };
1290
1291 struct be_cmd_resp_set_lmode {
1292         struct be_cmd_resp_hdr resp_hdr;
1293         u8 rsvd0[4];
1294 };
1295
1296 /********************** DDR DMA test *********************/
1297 struct be_cmd_req_ddrdma_test {
1298         struct be_cmd_req_hdr hdr;
1299         u64 pattern;
1300         u32 byte_count;
1301         u32 rsvd0;
1302         u8  snd_buff[4096];
1303         u8  rsvd1[4096];
1304 };
1305
1306 struct be_cmd_resp_ddrdma_test {
1307         struct be_cmd_resp_hdr hdr;
1308         u64 pattern;
1309         u32 byte_cnt;
1310         u32 snd_err;
1311         u8  rsvd0[4096];
1312         u8  rcv_buff[4096];
1313 };
1314
1315 /*********************** SEEPROM Read ***********************/
1316
1317 #define BE_READ_SEEPROM_LEN 1024
1318 struct be_cmd_req_seeprom_read {
1319         struct be_cmd_req_hdr hdr;
1320         u8 rsvd0[BE_READ_SEEPROM_LEN];
1321 };
1322
1323 struct be_cmd_resp_seeprom_read {
1324         struct be_cmd_req_hdr hdr;
1325         u8 seeprom_data[BE_READ_SEEPROM_LEN];
1326 };
1327
1328 enum {
1329         PHY_TYPE_CX4_10GB = 0,
1330         PHY_TYPE_XFP_10GB,
1331         PHY_TYPE_SFP_1GB,
1332         PHY_TYPE_SFP_PLUS_10GB,
1333         PHY_TYPE_KR_10GB,
1334         PHY_TYPE_KX4_10GB,
1335         PHY_TYPE_BASET_10GB,
1336         PHY_TYPE_BASET_1GB,
1337         PHY_TYPE_BASEX_1GB,
1338         PHY_TYPE_SGMII,
1339         PHY_TYPE_DISABLED = 255
1340 };
1341
1342 #define BE_SUPPORTED_SPEED_NONE         0
1343 #define BE_SUPPORTED_SPEED_10MBPS       1
1344 #define BE_SUPPORTED_SPEED_100MBPS      2
1345 #define BE_SUPPORTED_SPEED_1GBPS        4
1346 #define BE_SUPPORTED_SPEED_10GBPS       8
1347
1348 #define BE_AN_EN                        0x2
1349 #define BE_PAUSE_SYM_EN                 0x80
1350
1351 /* MAC speed valid values */
1352 #define SPEED_DEFAULT  0x0
1353 #define SPEED_FORCED_10GB  0x1
1354 #define SPEED_FORCED_1GB  0x2
1355 #define SPEED_AUTONEG_10GB  0x3
1356 #define SPEED_AUTONEG_1GB  0x4
1357 #define SPEED_AUTONEG_100MB  0x5
1358 #define SPEED_AUTONEG_10GB_1GB 0x6
1359 #define SPEED_AUTONEG_10GB_1GB_100MB 0x7
1360 #define SPEED_AUTONEG_1GB_100MB  0x8
1361 #define SPEED_AUTONEG_10MB  0x9
1362 #define SPEED_AUTONEG_1GB_100MB_10MB 0xa
1363 #define SPEED_AUTONEG_100MB_10MB 0xb
1364 #define SPEED_FORCED_100MB  0xc
1365 #define SPEED_FORCED_10MB  0xd
1366
1367 struct be_cmd_req_get_phy_info {
1368         struct be_cmd_req_hdr hdr;
1369         u8 rsvd0[24];
1370 };
1371
1372 struct be_phy_info {
1373         u16 phy_type;
1374         u16 interface_type;
1375         u32 misc_params;
1376         u16 ext_phy_details;
1377         u16 rsvd;
1378         u16 auto_speeds_supported;
1379         u16 fixed_speeds_supported;
1380         u32 future_use[2];
1381 };
1382
1383 struct be_cmd_resp_get_phy_info {
1384         struct be_cmd_req_hdr hdr;
1385         struct be_phy_info phy_info;
1386 };
1387
1388 /*********************** Set QOS ***********************/
1389
1390 #define BE_QOS_BITS_NIC                         1
1391
1392 struct be_cmd_req_set_qos {
1393         struct be_cmd_req_hdr hdr;
1394         u32 valid_bits;
1395         u32 max_bps_nic;
1396         u32 rsvd[7];
1397 };
1398
1399 struct be_cmd_resp_set_qos {
1400         struct be_cmd_resp_hdr hdr;
1401         u32 rsvd;
1402 };
1403
1404 /*********************** Controller Attributes ***********************/
1405 struct be_cmd_req_cntl_attribs {
1406         struct be_cmd_req_hdr hdr;
1407 };
1408
1409 struct be_cmd_resp_cntl_attribs {
1410         struct be_cmd_resp_hdr hdr;
1411         struct mgmt_controller_attrib attribs;
1412 };
1413
1414 /*********************** Set driver function ***********************/
1415 #define CAPABILITY_SW_TIMESTAMPS        2
1416 #define CAPABILITY_BE3_NATIVE_ERX_API   4
1417
1418 struct be_cmd_req_set_func_cap {
1419         struct be_cmd_req_hdr hdr;
1420         u32 valid_cap_flags;
1421         u32 cap_flags;
1422         u8 rsvd[212];
1423 };
1424
1425 struct be_cmd_resp_set_func_cap {
1426         struct be_cmd_resp_hdr hdr;
1427         u32 valid_cap_flags;
1428         u32 cap_flags;
1429         u8 rsvd[212];
1430 };
1431
1432 /******************** GET/SET_MACLIST  **************************/
1433 #define BE_MAX_MAC                      64
1434 struct be_cmd_req_get_mac_list {
1435         struct be_cmd_req_hdr hdr;
1436         u8 mac_type;
1437         u8 perm_override;
1438         u16 iface_id;
1439         u32 mac_id;
1440         u32 rsvd[3];
1441 } __packed;
1442
1443 struct get_list_macaddr {
1444         u16 mac_addr_size;
1445         union {
1446                 u8 macaddr[6];
1447                 struct {
1448                         u8 rsvd[2];
1449                         u32 mac_id;
1450                 } __packed s_mac_id;
1451         } __packed mac_addr_id;
1452 } __packed;
1453
1454 struct be_cmd_resp_get_mac_list {
1455         struct be_cmd_resp_hdr hdr;
1456         struct get_list_macaddr fd_macaddr; /* Factory default mac */
1457         struct get_list_macaddr macid_macaddr; /* soft mac */
1458         u8 true_mac_count;
1459         u8 pseudo_mac_count;
1460         u8 mac_list_size;
1461         u8 rsvd;
1462         /* perm override mac */
1463         struct get_list_macaddr macaddr_list[BE_MAX_MAC];
1464 } __packed;
1465
1466 struct be_cmd_req_set_mac_list {
1467         struct be_cmd_req_hdr hdr;
1468         u8 mac_count;
1469         u8 rsvd1;
1470         u16 rsvd2;
1471         struct macaddr mac[BE_MAX_MAC];
1472 } __packed;
1473
1474 /*********************** HSW Config ***********************/
1475 struct amap_set_hsw_context {
1476         u8 interface_id[16];
1477         u8 rsvd0[14];
1478         u8 pvid_valid;
1479         u8 rsvd1;
1480         u8 rsvd2[16];
1481         u8 pvid[16];
1482         u8 rsvd3[32];
1483         u8 rsvd4[32];
1484         u8 rsvd5[32];
1485 } __packed;
1486
1487 struct be_cmd_req_set_hsw_config {
1488         struct be_cmd_req_hdr hdr;
1489         u8 context[sizeof(struct amap_set_hsw_context) / 8];
1490 } __packed;
1491
1492 struct be_cmd_resp_set_hsw_config {
1493         struct be_cmd_resp_hdr hdr;
1494         u32 rsvd;
1495 };
1496
1497 struct amap_get_hsw_req_context {
1498         u8 interface_id[16];
1499         u8 rsvd0[14];
1500         u8 pvid_valid;
1501         u8 pport;
1502 } __packed;
1503
1504 struct amap_get_hsw_resp_context {
1505         u8 rsvd1[16];
1506         u8 pvid[16];
1507         u8 rsvd2[32];
1508         u8 rsvd3[32];
1509         u8 rsvd4[32];
1510 } __packed;
1511
1512 struct be_cmd_req_get_hsw_config {
1513         struct be_cmd_req_hdr hdr;
1514         u8 context[sizeof(struct amap_get_hsw_req_context) / 8];
1515 } __packed;
1516
1517 struct be_cmd_resp_get_hsw_config {
1518         struct be_cmd_resp_hdr hdr;
1519         u8 context[sizeof(struct amap_get_hsw_resp_context) / 8];
1520         u32 rsvd;
1521 };
1522
1523 /******************* get port names ***************/
1524 struct be_cmd_req_get_port_name {
1525         struct be_cmd_req_hdr hdr;
1526         u32 rsvd0;
1527 };
1528
1529 struct be_cmd_resp_get_port_name {
1530         struct be_cmd_req_hdr hdr;
1531         u8 port_name[4];
1532 };
1533
1534 /*************** HW Stats Get v1 **********************************/
1535 #define BE_TXP_SW_SZ                    48
1536 struct be_port_rxf_stats_v1 {
1537         u32 rsvd0[12];
1538         u32 rx_crc_errors;
1539         u32 rx_alignment_symbol_errors;
1540         u32 rx_pause_frames;
1541         u32 rx_priority_pause_frames;
1542         u32 rx_control_frames;
1543         u32 rx_in_range_errors;
1544         u32 rx_out_range_errors;
1545         u32 rx_frame_too_long;
1546         u32 rx_address_mismatch_drops;
1547         u32 rx_dropped_too_small;
1548         u32 rx_dropped_too_short;
1549         u32 rx_dropped_header_too_small;
1550         u32 rx_dropped_tcp_length;
1551         u32 rx_dropped_runt;
1552         u32 rsvd1[10];
1553         u32 rx_ip_checksum_errs;
1554         u32 rx_tcp_checksum_errs;
1555         u32 rx_udp_checksum_errs;
1556         u32 rsvd2[7];
1557         u32 rx_switched_unicast_packets;
1558         u32 rx_switched_multicast_packets;
1559         u32 rx_switched_broadcast_packets;
1560         u32 rsvd3[3];
1561         u32 tx_pauseframes;
1562         u32 tx_priority_pauseframes;
1563         u32 tx_controlframes;
1564         u32 rsvd4[10];
1565         u32 rxpp_fifo_overflow_drop;
1566         u32 rx_input_fifo_overflow_drop;
1567         u32 pmem_fifo_overflow_drop;
1568         u32 jabber_events;
1569         u32 rsvd5[3];
1570 };
1571
1572
1573 struct be_rxf_stats_v1 {
1574         struct be_port_rxf_stats_v1 port[4];
1575         u32 rsvd0[2];
1576         u32 rx_drops_no_pbuf;
1577         u32 rx_drops_no_txpb;
1578         u32 rx_drops_no_erx_descr;
1579         u32 rx_drops_no_tpre_descr;
1580         u32 rsvd1[6];
1581         u32 rx_drops_too_many_frags;
1582         u32 rx_drops_invalid_ring;
1583         u32 forwarded_packets;
1584         u32 rx_drops_mtu;
1585         u32 rsvd2[14];
1586 };
1587
1588 struct be_erx_stats_v1 {
1589         u32 rx_drops_no_fragments[68];     /* dwordS 0 to 67*/
1590         u32 rsvd[4];
1591 };
1592
1593 struct be_hw_stats_v1 {
1594         struct be_rxf_stats_v1 rxf;
1595         u32 rsvd0[BE_TXP_SW_SZ];
1596         struct be_erx_stats_v1 erx;
1597         struct be_pmem_stats pmem;
1598         u32 rsvd1[18];
1599 };
1600
1601 struct be_cmd_req_get_stats_v1 {
1602         struct be_cmd_req_hdr hdr;
1603         u8 rsvd[sizeof(struct be_hw_stats_v1)];
1604 };
1605
1606 struct be_cmd_resp_get_stats_v1 {
1607         struct be_cmd_resp_hdr hdr;
1608         struct be_hw_stats_v1 hw_stats;
1609 };
1610
1611 static inline void *hw_stats_from_cmd(struct be_adapter *adapter)
1612 {
1613         if (adapter->generation == BE_GEN3) {
1614                 struct be_cmd_resp_get_stats_v1 *cmd = adapter->stats_cmd.va;
1615
1616                 return &cmd->hw_stats;
1617         } else {
1618                 struct be_cmd_resp_get_stats_v0 *cmd = adapter->stats_cmd.va;
1619
1620                 return &cmd->hw_stats;
1621         }
1622 }
1623
1624 static inline void *be_erx_stats_from_cmd(struct be_adapter *adapter)
1625 {
1626         if (adapter->generation == BE_GEN3) {
1627                 struct be_hw_stats_v1 *hw_stats = hw_stats_from_cmd(adapter);
1628
1629                 return &hw_stats->erx;
1630         } else {
1631                 struct be_hw_stats_v0 *hw_stats = hw_stats_from_cmd(adapter);
1632
1633                 return &hw_stats->erx;
1634         }
1635 }
1636
1637
1638 /************** get fat capabilites *******************/
1639 #define MAX_MODULES 27
1640 #define MAX_MODES 4
1641 #define MODE_UART 0
1642 #define FW_LOG_LEVEL_DEFAULT 48
1643 #define FW_LOG_LEVEL_FATAL 64
1644
1645 struct ext_fat_mode {
1646         u8 mode;
1647         u8 rsvd0;
1648         u16 port_mask;
1649         u32 dbg_lvl;
1650         u64 fun_mask;
1651 } __packed;
1652
1653 struct ext_fat_modules {
1654         u8 modules_str[32];
1655         u32 modules_id;
1656         u32 num_modes;
1657         struct ext_fat_mode trace_lvl[MAX_MODES];
1658 } __packed;
1659
1660 struct be_fat_conf_params {
1661         u32 max_log_entries;
1662         u32 log_entry_size;
1663         u8 log_type;
1664         u8 max_log_funs;
1665         u8 max_log_ports;
1666         u8 rsvd0;
1667         u32 supp_modes;
1668         u32 num_modules;
1669         struct ext_fat_modules module[MAX_MODULES];
1670 } __packed;
1671
1672 struct be_cmd_req_get_ext_fat_caps {
1673         struct be_cmd_req_hdr hdr;
1674         u32 parameter_type;
1675 };
1676
1677 struct be_cmd_resp_get_ext_fat_caps {
1678         struct be_cmd_resp_hdr hdr;
1679         struct be_fat_conf_params get_params;
1680 };
1681
1682 struct be_cmd_req_set_ext_fat_caps {
1683         struct be_cmd_req_hdr hdr;
1684         struct be_fat_conf_params set_params;
1685 };
1686
1687 extern int be_pci_fnum_get(struct be_adapter *adapter);
1688 extern int be_fw_wait_ready(struct be_adapter *adapter);
1689 extern int be_cmd_mac_addr_query(struct be_adapter *adapter, u8 *mac_addr,
1690                         u8 type, bool permanent, u32 if_handle, u32 pmac_id);
1691 extern int be_cmd_pmac_add(struct be_adapter *adapter, u8 *mac_addr,
1692                         u32 if_id, u32 *pmac_id, u32 domain);
1693 extern int be_cmd_pmac_del(struct be_adapter *adapter, u32 if_id,
1694                         int pmac_id, u32 domain);
1695 extern int be_cmd_if_create(struct be_adapter *adapter, u32 cap_flags,
1696                             u32 en_flags, u32 *if_handle, u32 domain);
1697 extern int be_cmd_if_destroy(struct be_adapter *adapter, int if_handle,
1698                         u32 domain);
1699 extern int be_cmd_eq_create(struct be_adapter *adapter,
1700                         struct be_queue_info *eq, int eq_delay);
1701 extern int be_cmd_cq_create(struct be_adapter *adapter,
1702                         struct be_queue_info *cq, struct be_queue_info *eq,
1703                         bool no_delay, int num_cqe_dma_coalesce);
1704 extern int be_cmd_mccq_create(struct be_adapter *adapter,
1705                         struct be_queue_info *mccq,
1706                         struct be_queue_info *cq);
1707 extern int be_cmd_txq_create(struct be_adapter *adapter,
1708                         struct be_queue_info *txq,
1709                         struct be_queue_info *cq);
1710 extern int be_cmd_rxq_create(struct be_adapter *adapter,
1711                         struct be_queue_info *rxq, u16 cq_id,
1712                         u16 frag_size, u32 if_id, u32 rss, u8 *rss_id);
1713 extern int be_cmd_q_destroy(struct be_adapter *adapter, struct be_queue_info *q,
1714                         int type);
1715 extern int be_cmd_rxq_destroy(struct be_adapter *adapter,
1716                         struct be_queue_info *q);
1717 extern int be_cmd_link_status_query(struct be_adapter *adapter, u8 *mac_speed,
1718                                     u16 *link_speed, u8 *link_status, u32 dom);
1719 extern int be_cmd_reset(struct be_adapter *adapter);
1720 extern int be_cmd_get_stats(struct be_adapter *adapter,
1721                         struct be_dma_mem *nonemb_cmd);
1722 extern int lancer_cmd_get_pport_stats(struct be_adapter *adapter,
1723                         struct be_dma_mem *nonemb_cmd);
1724 extern int be_cmd_get_fw_ver(struct be_adapter *adapter, char *fw_ver,
1725                 char *fw_on_flash);
1726
1727 extern int be_cmd_modify_eqd(struct be_adapter *adapter, u32 eq_id, u32 eqd);
1728 extern int be_cmd_vlan_config(struct be_adapter *adapter, u32 if_id,
1729                         u16 *vtag_array, u32 num, bool untagged,
1730                         bool promiscuous);
1731 extern int be_cmd_rx_filter(struct be_adapter *adapter, u32 flags, u32 status);
1732 extern int be_cmd_set_flow_control(struct be_adapter *adapter,
1733                         u32 tx_fc, u32 rx_fc);
1734 extern int be_cmd_get_flow_control(struct be_adapter *adapter,
1735                         u32 *tx_fc, u32 *rx_fc);
1736 extern int be_cmd_query_fw_cfg(struct be_adapter *adapter,
1737                         u32 *port_num, u32 *function_mode, u32 *function_caps);
1738 extern int be_cmd_reset_function(struct be_adapter *adapter);
1739 extern int be_cmd_rss_config(struct be_adapter *adapter, u8 *rsstable,
1740                         u16 table_size);
1741 extern int be_process_mcc(struct be_adapter *adapter);
1742 extern int be_cmd_set_beacon_state(struct be_adapter *adapter,
1743                         u8 port_num, u8 beacon, u8 status, u8 state);
1744 extern int be_cmd_get_beacon_state(struct be_adapter *adapter,
1745                         u8 port_num, u32 *state);
1746 extern int be_cmd_write_flashrom(struct be_adapter *adapter,
1747                         struct be_dma_mem *cmd, u32 flash_oper,
1748                         u32 flash_opcode, u32 buf_size);
1749 extern int lancer_cmd_write_object(struct be_adapter *adapter,
1750                                    struct be_dma_mem *cmd,
1751                                    u32 data_size, u32 data_offset,
1752                                    const char *obj_name,
1753                                    u32 *data_written, u8 *change_status,
1754                                    u8 *addn_status);
1755 int lancer_cmd_read_object(struct be_adapter *adapter, struct be_dma_mem *cmd,
1756                 u32 data_size, u32 data_offset, const char *obj_name,
1757                 u32 *data_read, u32 *eof, u8 *addn_status);
1758 int be_cmd_get_flash_crc(struct be_adapter *adapter, u8 *flashed_crc,
1759                                 int offset);
1760 extern int be_cmd_enable_magic_wol(struct be_adapter *adapter, u8 *mac,
1761                                 struct be_dma_mem *nonemb_cmd);
1762 extern int be_cmd_fw_init(struct be_adapter *adapter);
1763 extern int be_cmd_fw_clean(struct be_adapter *adapter);
1764 extern void be_async_mcc_enable(struct be_adapter *adapter);
1765 extern void be_async_mcc_disable(struct be_adapter *adapter);
1766 extern int be_cmd_loopback_test(struct be_adapter *adapter, u32 port_num,
1767                                 u32 loopback_type, u32 pkt_size,
1768                                 u32 num_pkts, u64 pattern);
1769 extern int be_cmd_ddr_dma_test(struct be_adapter *adapter, u64 pattern,
1770                         u32 byte_cnt, struct be_dma_mem *cmd);
1771 extern int be_cmd_get_seeprom_data(struct be_adapter *adapter,
1772                                 struct be_dma_mem *nonemb_cmd);
1773 extern int be_cmd_set_loopback(struct be_adapter *adapter, u8 port_num,
1774                                 u8 loopback_type, u8 enable);
1775 extern int be_cmd_get_phy_info(struct be_adapter *adapter);
1776 extern int be_cmd_set_qos(struct be_adapter *adapter, u32 bps, u32 domain);
1777 extern void be_detect_error(struct be_adapter *adapter);
1778 extern int be_cmd_get_die_temperature(struct be_adapter *adapter);
1779 extern int be_cmd_get_cntl_attributes(struct be_adapter *adapter);
1780 extern int be_cmd_req_native_mode(struct be_adapter *adapter);
1781 extern int be_cmd_get_reg_len(struct be_adapter *adapter, u32 *log_size);
1782 extern void be_cmd_get_regs(struct be_adapter *adapter, u32 buf_len, void *buf);
1783 extern int be_cmd_get_mac_from_list(struct be_adapter *adapter, u8 *mac,
1784                                     bool *pmac_id_active, u32 *pmac_id,
1785                                     u8 domain);
1786 extern int be_cmd_set_mac_list(struct be_adapter *adapter, u8 *mac_array,
1787                                                 u8 mac_count, u32 domain);
1788 extern int be_cmd_set_hsw_config(struct be_adapter *adapter, u16 pvid,
1789                         u32 domain, u16 intf_id);
1790 extern int be_cmd_get_hsw_config(struct be_adapter *adapter, u16 *pvid,
1791                         u32 domain, u16 intf_id);
1792 extern int be_cmd_get_acpi_wol_cap(struct be_adapter *adapter);
1793 extern int be_cmd_get_ext_fat_capabilites(struct be_adapter *adapter,
1794                                           struct be_dma_mem *cmd);
1795 extern int be_cmd_set_ext_fat_capabilites(struct be_adapter *adapter,
1796                                           struct be_dma_mem *cmd,
1797                                           struct be_fat_conf_params *cfgs);
1798 extern int lancer_wait_ready(struct be_adapter *adapter);
1799 extern int lancer_test_and_set_rdy_state(struct be_adapter *adapter);
1800 extern int be_cmd_query_port_name(struct be_adapter *adapter, u8 *port_name);
1801