2 * Copyright (C) 2005 - 2013 Emulex
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License version 2
7 * as published by the Free Software Foundation. The full GNU General
8 * Public License is included in this distribution in the file called COPYING.
10 * Contact Information:
11 * linux-drivers@emulex.com
15 * Costa Mesa, CA 92626
21 #include <linux/pci.h>
22 #include <linux/etherdevice.h>
23 #include <linux/delay.h>
27 #include <linux/if_vlan.h>
28 #include <linux/workqueue.h>
29 #include <linux/interrupt.h>
30 #include <linux/firmware.h>
31 #include <linux/slab.h>
32 #include <linux/u64_stats_sync.h>
37 #define DRV_VER "4.9.134.0u"
38 #define DRV_NAME "be2net"
39 #define BE_NAME "Emulex BladeEngine2"
40 #define BE3_NAME "Emulex BladeEngine3"
41 #define OC_NAME "Emulex OneConnect"
42 #define OC_NAME_BE OC_NAME "(be3)"
43 #define OC_NAME_LANCER OC_NAME "(Lancer)"
44 #define OC_NAME_SH OC_NAME "(Skyhawk)"
45 #define DRV_DESC "Emulex OneConnect 10Gbps NIC Driver"
47 #define BE_VENDOR_ID 0x19a2
48 #define EMULEX_VENDOR_ID 0x10df
49 #define BE_DEVICE_ID1 0x211
50 #define BE_DEVICE_ID2 0x221
51 #define OC_DEVICE_ID1 0x700 /* Device Id for BE2 cards */
52 #define OC_DEVICE_ID2 0x710 /* Device Id for BE3 cards */
53 #define OC_DEVICE_ID3 0xe220 /* Device id for Lancer cards */
54 #define OC_DEVICE_ID4 0xe228 /* Device id for VF in Lancer */
55 #define OC_DEVICE_ID5 0x720 /* Device Id for Skyhawk cards */
56 #define OC_DEVICE_ID6 0x728 /* Device id for VF in SkyHawk */
57 #define OC_SUBSYS_DEVICE_ID1 0xE602
58 #define OC_SUBSYS_DEVICE_ID2 0xE642
59 #define OC_SUBSYS_DEVICE_ID3 0xE612
60 #define OC_SUBSYS_DEVICE_ID4 0xE652
62 static inline char *nic_name(struct pci_dev *pdev)
64 switch (pdev->device) {
71 return OC_NAME_LANCER;
82 /* Number of bytes of an RX frame that are copied to skb->data */
83 #define BE_HDR_LEN ((u16) 64)
84 /* allocate extra space to allow tunneling decapsulation without head reallocation */
85 #define BE_RX_SKB_ALLOC_SIZE (BE_HDR_LEN + 64)
87 #define BE_MAX_JUMBO_FRAME_SIZE 9018
88 #define BE_MIN_MTU 256
90 #define BE_NUM_VLANS_SUPPORTED 64
91 #define BE_MAX_EQD 96u
92 #define BE_MAX_TX_FRAG_COUNT 30
94 #define EVNT_Q_LEN 1024
96 #define TX_CQ_LEN 1024
97 #define RX_Q_LEN 1024 /* Does not support any other value */
98 #define RX_CQ_LEN 1024
99 #define MCC_Q_LEN 128 /* total size not to exceed 8 pages */
100 #define MCC_CQ_LEN 256
102 #define BE2_MAX_RSS_QS 4
103 #define BE3_MAX_RSS_QS 16
104 #define BE3_MAX_TX_QS 16
105 #define BE3_MAX_EVT_QS 16
108 #define MAX_EVT_QS 32
111 #define MAX_ROCE_EQS 5
112 #define MAX_MSIX_VECTORS 32
113 #define MIN_MSIX_VECTORS 1
114 #define BE_TX_BUDGET 256
115 #define BE_NAPI_WEIGHT 64
116 #define MAX_RX_POST BE_NAPI_WEIGHT /* Frags posted at a time */
117 #define RX_FRAGS_REFILL_WM (RX_Q_LEN - MAX_RX_POST)
119 #define MAX_VFS 30 /* Max VFs supported by BE3 FW */
120 #define FW_VER_LEN 32
128 struct be_queue_info {
129 struct be_dma_mem dma_mem;
131 u16 entry_size; /* Size of an element in the queue */
135 atomic_t used; /* Number of valid elements in the queue */
138 static inline u32 MODULO(u16 val, u16 limit)
140 BUG_ON(limit & (limit - 1));
141 return val & (limit - 1);
144 static inline void index_adv(u16 *index, u16 val, u16 limit)
146 *index = MODULO((*index + val), limit);
149 static inline void index_inc(u16 *index, u16 limit)
151 *index = MODULO((*index + 1), limit);
154 static inline void *queue_head_node(struct be_queue_info *q)
156 return q->dma_mem.va + q->head * q->entry_size;
159 static inline void *queue_tail_node(struct be_queue_info *q)
161 return q->dma_mem.va + q->tail * q->entry_size;
164 static inline void *queue_index_node(struct be_queue_info *q, u16 index)
166 return q->dma_mem.va + index * q->entry_size;
169 static inline void queue_head_inc(struct be_queue_info *q)
171 index_inc(&q->head, q->len);
174 static inline void index_dec(u16 *index, u16 limit)
176 *index = MODULO((*index - 1), limit);
179 static inline void queue_tail_inc(struct be_queue_info *q)
181 index_inc(&q->tail, q->len);
185 struct be_queue_info q;
188 /* Adaptive interrupt coalescing (AIC) info */
190 u32 min_eqd; /* in usecs */
191 u32 max_eqd; /* in usecs */
192 u32 eqd; /* configured val when aic is off */
193 u32 cur_eqd; /* in usecs */
195 u8 idx; /* array index */
199 struct napi_struct napi;
200 struct be_adapter *adapter;
201 } ____cacheline_aligned_in_smp;
204 struct be_queue_info q;
205 struct be_queue_info cq;
217 struct u64_stats_sync sync;
218 struct u64_stats_sync sync_compl;
223 struct be_queue_info q;
224 struct be_queue_info cq;
225 /* Remember the skbs that were transmitted */
226 struct sk_buff *sent_skb_list[TX_Q_LEN];
227 struct be_tx_stats stats;
228 } ____cacheline_aligned_in_smp;
230 /* Struct to remember the pages posted for rx frags */
231 struct be_rx_page_info {
233 DEFINE_DMA_UNMAP_ADDR(bus);
243 u32 rx_drops_no_skbs; /* skb allocation errors */
244 u32 rx_drops_no_frags; /* HW has no fetched frags */
245 u32 rx_post_fail; /* page post alloc failures */
248 u32 rx_compl_err; /* completions with err set */
249 u32 rx_pps; /* pkts per second */
250 struct u64_stats_sync sync;
253 struct be_rx_compl_info {
274 struct be_adapter *adapter;
275 struct be_queue_info q;
276 struct be_queue_info cq;
277 struct be_rx_compl_info rxcp;
278 struct be_rx_page_info page_info_tbl[RX_Q_LEN];
279 struct be_rx_stats stats;
281 bool rx_post_starved; /* Zero rx frags have been posted to BE */
282 } ____cacheline_aligned_in_smp;
284 struct be_drv_stats {
285 u32 be_on_die_temperature;
287 u32 rx_drops_no_pbuf;
288 u32 rx_drops_no_txpb;
289 u32 rx_drops_no_erx_descr;
290 u32 rx_drops_no_tpre_descr;
291 u32 rx_drops_too_many_frags;
292 u32 forwarded_packets;
295 u32 rx_alignment_symbol_errors;
297 u32 rx_priority_pause_frames;
298 u32 rx_control_frames;
299 u32 rx_in_range_errors;
300 u32 rx_out_range_errors;
301 u32 rx_frame_too_long;
302 u32 rx_address_filtered;
303 u32 rx_dropped_too_small;
304 u32 rx_dropped_too_short;
305 u32 rx_dropped_header_too_small;
306 u32 rx_dropped_tcp_length;
308 u32 rx_ip_checksum_errs;
309 u32 rx_tcp_checksum_errs;
310 u32 rx_udp_checksum_errs;
312 u32 tx_priority_pauseframes;
313 u32 tx_controlframes;
314 u32 rxpp_fifo_overflow_drop;
315 u32 rx_input_fifo_overflow_drop;
316 u32 pmem_fifo_overflow_drop;
321 unsigned char mac_addr[ETH_ALEN];
334 #define BE_FLAGS_LINK_STATUS_INIT 1
335 #define BE_FLAGS_WORKER_SCHEDULED (1 << 3)
336 #define BE_FLAGS_NAPI_ENABLED (1 << 9)
337 #define BE_UC_PMAC_COUNT 30
338 #define BE_VF_UC_PMAC_COUNT 2
339 #define BE_FLAGS_QNQ_ASYNC_EVT_RCVD (1 << 11)
341 /* Ethtool set_dump flags */
342 #define LANCER_INITIATE_FW_DUMP 0x1
352 u16 auto_speeds_supported;
353 u16 fixed_speeds_supported;
360 struct be_resources {
361 u16 max_vfs; /* Total VFs "really" supported by FW/HW */
366 u16 max_uc_mac; /* Max UC MACs programmable */
367 u16 max_vlans; /* Number of vlans supported */
373 struct pci_dev *pdev;
374 struct net_device *netdev;
376 u8 __iomem *csr; /* CSR BAR used only for BE2/3 */
377 u8 __iomem *db; /* Door Bell */
379 struct mutex mbox_lock; /* For serializing mbox cmds to BE card */
380 struct be_dma_mem mbox_mem;
381 /* Mbox mem is adjusted to align to 16 bytes. The allocated addr
382 * is stored for freeing purpose */
383 struct be_dma_mem mbox_mem_alloced;
385 struct be_mcc_obj mcc_obj;
386 spinlock_t mcc_lock; /* For serializing mcc cmds to BE card */
387 spinlock_t mcc_cq_lock;
389 u16 cfg_num_qs; /* configured via set-channels */
392 struct be_eq_obj eq_obj[MAX_EVT_QS];
393 struct msix_entry msix_entries[MAX_MSIX_VECTORS];
398 struct be_tx_obj tx_obj[MAX_TX_QS];
402 struct be_rx_obj rx_obj[MAX_RX_QS];
403 u32 big_page_size; /* Compounded page size shared by rx wrbs */
405 struct be_drv_stats drv_stats;
407 u8 vlan_tag[VLAN_N_VID];
408 u8 vlan_prio_bmap; /* Available Priority BitMap */
409 u16 recommended_prio; /* Recommended Priority */
410 struct be_dma_mem rx_filter; /* Cmd DMA mem for rx-filter */
412 struct be_dma_mem stats_cmd;
413 /* Work queue used to perform periodic tasks like getting statistics */
414 struct delayed_work work;
417 struct delayed_work func_recovery_work;
420 /* Ethtool knobs and info */
421 char fw_ver[FW_VER_LEN];
422 char fw_on_flash[FW_VER_LEN];
423 int if_handle; /* Used to configure filtering */
424 u32 *pmac_id; /* MAC addr handle used by BE card */
425 u32 beacon_state; /* for set_phys_id */
435 u32 rx_fc; /* Rx flow control */
436 u32 tx_fc; /* Tx flow control */
444 u32 num_msix_roce_vec;
445 struct ocrdma_dev *ocrdma_dev;
446 struct list_head entry;
449 struct completion flash_compl;
451 struct be_resources res; /* resources available for the func */
452 u16 num_vfs; /* Number of VFs provisioned by PF */
454 struct be_vf_cfg *vf_cfg;
462 u32 uc_macs; /* Count of secondary UC MAC programmed */
466 int be_get_temp_freq;
471 #define be_physfn(adapter) (!adapter->virtfn)
472 #define sriov_enabled(adapter) (adapter->num_vfs > 0)
473 #define sriov_want(adapter) (be_max_vfs(adapter) && num_vfs && \
475 #define for_all_vfs(adapter, vf_cfg, i) \
476 for (i = 0, vf_cfg = &adapter->vf_cfg[i]; i < adapter->num_vfs; \
482 #define be_max_vlans(adapter) (adapter->res.max_vlans)
483 #define be_max_uc(adapter) (adapter->res.max_uc_mac)
484 #define be_max_mc(adapter) (adapter->res.max_mcast_mac)
485 #define be_max_vfs(adapter) (adapter->res.max_vfs)
486 #define be_max_rss(adapter) (adapter->res.max_rss_qs)
487 #define be_max_txqs(adapter) (adapter->res.max_tx_qs)
488 #define be_max_prio_txqs(adapter) (adapter->res.max_prio_tx_qs)
489 #define be_max_rxqs(adapter) (adapter->res.max_rx_qs)
490 #define be_max_eqs(adapter) (adapter->res.max_evt_qs)
491 #define be_if_cap_flags(adapter) (adapter->res.if_cap_flags)
493 static inline u16 be_max_qs(struct be_adapter *adapter)
495 /* If no RSS, need atleast the one def RXQ */
496 u16 num = max_t(u16, be_max_rss(adapter), 1);
498 num = min(num, be_max_eqs(adapter));
499 return min_t(u16, num, num_online_cpus());
502 #define lancer_chip(adapter) (adapter->pdev->device == OC_DEVICE_ID3 || \
503 adapter->pdev->device == OC_DEVICE_ID4)
505 #define skyhawk_chip(adapter) (adapter->pdev->device == OC_DEVICE_ID5 || \
506 adapter->pdev->device == OC_DEVICE_ID6)
508 #define BE3_chip(adapter) (adapter->pdev->device == BE_DEVICE_ID2 || \
509 adapter->pdev->device == OC_DEVICE_ID2)
511 #define BE2_chip(adapter) (adapter->pdev->device == BE_DEVICE_ID1 || \
512 adapter->pdev->device == OC_DEVICE_ID1)
514 #define BEx_chip(adapter) (BE3_chip(adapter) || BE2_chip(adapter))
516 #define be_roce_supported(adapter) (skyhawk_chip(adapter) && \
517 (adapter->function_mode & RDMA_ENABLED))
519 extern const struct ethtool_ops be_ethtool_ops;
521 #define msix_enabled(adapter) (adapter->num_msix_vec > 0)
522 #define num_irqs(adapter) (msix_enabled(adapter) ? \
523 adapter->num_msix_vec : 1)
524 #define tx_stats(txo) (&(txo)->stats)
525 #define rx_stats(rxo) (&(rxo)->stats)
527 /* The default RXQ is the last RXQ */
528 #define default_rxo(adpt) (&adpt->rx_obj[adpt->num_rx_qs - 1])
530 #define for_all_rx_queues(adapter, rxo, i) \
531 for (i = 0, rxo = &adapter->rx_obj[i]; i < adapter->num_rx_qs; \
534 /* Skip the default non-rss queue (last one)*/
535 #define for_all_rss_queues(adapter, rxo, i) \
536 for (i = 0, rxo = &adapter->rx_obj[i]; i < (adapter->num_rx_qs - 1);\
539 #define for_all_tx_queues(adapter, txo, i) \
540 for (i = 0, txo = &adapter->tx_obj[i]; i < adapter->num_tx_qs; \
543 #define for_all_evt_queues(adapter, eqo, i) \
544 for (i = 0, eqo = &adapter->eq_obj[i]; i < adapter->num_evt_qs; \
547 #define is_mcc_eqo(eqo) (eqo->idx == 0)
548 #define mcc_eqo(adapter) (&adapter->eq_obj[0])
550 #define PAGE_SHIFT_4K 12
551 #define PAGE_SIZE_4K (1 << PAGE_SHIFT_4K)
553 /* Returns number of pages spanned by the data starting at the given addr */
554 #define PAGES_4K_SPANNED(_address, size) \
555 ((u32)((((size_t)(_address) & (PAGE_SIZE_4K - 1)) + \
556 (size) + (PAGE_SIZE_4K - 1)) >> PAGE_SHIFT_4K))
558 /* Returns bit offset within a DWORD of a bitfield */
559 #define AMAP_BIT_OFFSET(_struct, field) \
560 (((size_t)&(((_struct *)0)->field))%32)
562 /* Returns the bit mask of the field that is NOT shifted into location. */
563 static inline u32 amap_mask(u32 bitsize)
565 return (bitsize == 32 ? 0xFFFFFFFF : (1 << bitsize) - 1);
569 amap_set(void *ptr, u32 dw_offset, u32 mask, u32 offset, u32 value)
571 u32 *dw = (u32 *) ptr + dw_offset;
572 *dw &= ~(mask << offset);
573 *dw |= (mask & value) << offset;
576 #define AMAP_SET_BITS(_struct, field, ptr, val) \
578 offsetof(_struct, field)/32, \
579 amap_mask(sizeof(((_struct *)0)->field)), \
580 AMAP_BIT_OFFSET(_struct, field), \
583 static inline u32 amap_get(void *ptr, u32 dw_offset, u32 mask, u32 offset)
585 u32 *dw = (u32 *) ptr;
586 return mask & (*(dw + dw_offset) >> offset);
589 #define AMAP_GET_BITS(_struct, field, ptr) \
591 offsetof(_struct, field)/32, \
592 amap_mask(sizeof(((_struct *)0)->field)), \
593 AMAP_BIT_OFFSET(_struct, field))
595 #define be_dws_cpu_to_le(wrb, len) swap_dws(wrb, len)
596 #define be_dws_le_to_cpu(wrb, len) swap_dws(wrb, len)
597 static inline void swap_dws(void *wrb, int len)
603 *dw = cpu_to_le32(*dw);
607 #endif /* __BIG_ENDIAN */
610 static inline u8 is_tcp_pkt(struct sk_buff *skb)
614 if (ip_hdr(skb)->version == 4)
615 val = (ip_hdr(skb)->protocol == IPPROTO_TCP);
616 else if (ip_hdr(skb)->version == 6)
617 val = (ipv6_hdr(skb)->nexthdr == NEXTHDR_TCP);
622 static inline u8 is_udp_pkt(struct sk_buff *skb)
626 if (ip_hdr(skb)->version == 4)
627 val = (ip_hdr(skb)->protocol == IPPROTO_UDP);
628 else if (ip_hdr(skb)->version == 6)
629 val = (ipv6_hdr(skb)->nexthdr == NEXTHDR_UDP);
634 static inline bool is_ipv4_pkt(struct sk_buff *skb)
636 return skb->protocol == htons(ETH_P_IP) && ip_hdr(skb)->version == 4;
639 static inline void be_vf_eth_addr_generate(struct be_adapter *adapter, u8 *mac)
643 addr = jhash(adapter->netdev->dev_addr, ETH_ALEN, 0);
645 mac[5] = (u8)(addr & 0xFF);
646 mac[4] = (u8)((addr >> 8) & 0xFF);
647 mac[3] = (u8)((addr >> 16) & 0xFF);
648 /* Use the OUI from the current MAC address */
649 memcpy(mac, adapter->netdev->dev_addr, 3);
652 static inline bool be_multi_rxq(const struct be_adapter *adapter)
654 return adapter->num_rx_qs > 1;
657 static inline bool be_error(struct be_adapter *adapter)
659 return adapter->eeh_error || adapter->hw_error || adapter->fw_timeout;
662 static inline bool be_hw_error(struct be_adapter *adapter)
664 return adapter->eeh_error || adapter->hw_error;
667 static inline void be_clear_all_error(struct be_adapter *adapter)
669 adapter->eeh_error = false;
670 adapter->hw_error = false;
671 adapter->fw_timeout = false;
674 static inline bool be_is_wol_excluded(struct be_adapter *adapter)
676 struct pci_dev *pdev = adapter->pdev;
678 if (!be_physfn(adapter))
681 switch (pdev->subsystem_device) {
682 case OC_SUBSYS_DEVICE_ID1:
683 case OC_SUBSYS_DEVICE_ID2:
684 case OC_SUBSYS_DEVICE_ID3:
685 case OC_SUBSYS_DEVICE_ID4:
692 static inline int qnq_async_evt_rcvd(struct be_adapter *adapter)
694 return adapter->flags & BE_FLAGS_QNQ_ASYNC_EVT_RCVD;
697 extern void be_cq_notify(struct be_adapter *adapter, u16 qid, bool arm,
699 extern void be_link_status_update(struct be_adapter *adapter, u8 link_status);
700 extern void be_parse_stats(struct be_adapter *adapter);
701 extern int be_load_fw(struct be_adapter *adapter, u8 *func);
702 extern bool be_is_wol_supported(struct be_adapter *adapter);
703 extern bool be_pause_supported(struct be_adapter *adapter);
704 extern u32 be_get_fw_log_level(struct be_adapter *adapter);
705 int be_update_queues(struct be_adapter *adapter);
706 int be_poll(struct napi_struct *napi, int budget);
709 * internal function to initialize-cleanup roce device.
711 extern void be_roce_dev_add(struct be_adapter *);
712 extern void be_roce_dev_remove(struct be_adapter *);
715 * internal function to open-close roce device during ifup-ifdown.
717 extern void be_roce_dev_open(struct be_adapter *);
718 extern void be_roce_dev_close(struct be_adapter *);