1 /*******************************************************************************
4 Copyright(c) 1999 - 2006 Intel Corporation. All rights reserved.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 2 of the License, or (at your option)
11 This program is distributed in the hope that it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
16 You should have received a copy of the GNU General Public License along with
17 this program; if not, write to the Free Software Foundation, Inc., 59
18 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
20 The full GNU General Public License is included in this distribution in the
24 Linux NICS <linux.nics@intel.com>
25 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
26 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
28 *******************************************************************************/
30 /* ethtool support for e1000 */
34 #include <asm/uaccess.h>
37 char stat_string[ETH_GSTRING_LEN];
42 #define E1000_STAT(m) sizeof(((struct e1000_adapter *)0)->m), \
43 offsetof(struct e1000_adapter, m)
44 static const struct e1000_stats e1000_gstrings_stats[] = {
45 { "rx_packets", E1000_STAT(net_stats.rx_packets) },
46 { "tx_packets", E1000_STAT(net_stats.tx_packets) },
47 { "rx_bytes", E1000_STAT(net_stats.rx_bytes) },
48 { "tx_bytes", E1000_STAT(net_stats.tx_bytes) },
49 { "rx_errors", E1000_STAT(net_stats.rx_errors) },
50 { "tx_errors", E1000_STAT(net_stats.tx_errors) },
51 { "tx_dropped", E1000_STAT(net_stats.tx_dropped) },
52 { "multicast", E1000_STAT(net_stats.multicast) },
53 { "collisions", E1000_STAT(net_stats.collisions) },
54 { "rx_length_errors", E1000_STAT(net_stats.rx_length_errors) },
55 { "rx_over_errors", E1000_STAT(net_stats.rx_over_errors) },
56 { "rx_crc_errors", E1000_STAT(net_stats.rx_crc_errors) },
57 { "rx_frame_errors", E1000_STAT(net_stats.rx_frame_errors) },
58 { "rx_no_buffer_count", E1000_STAT(stats.rnbc) },
59 { "rx_missed_errors", E1000_STAT(net_stats.rx_missed_errors) },
60 { "tx_aborted_errors", E1000_STAT(net_stats.tx_aborted_errors) },
61 { "tx_carrier_errors", E1000_STAT(net_stats.tx_carrier_errors) },
62 { "tx_fifo_errors", E1000_STAT(net_stats.tx_fifo_errors) },
63 { "tx_heartbeat_errors", E1000_STAT(net_stats.tx_heartbeat_errors) },
64 { "tx_window_errors", E1000_STAT(net_stats.tx_window_errors) },
65 { "tx_abort_late_coll", E1000_STAT(stats.latecol) },
66 { "tx_deferred_ok", E1000_STAT(stats.dc) },
67 { "tx_single_coll_ok", E1000_STAT(stats.scc) },
68 { "tx_multi_coll_ok", E1000_STAT(stats.mcc) },
69 { "tx_timeout_count", E1000_STAT(tx_timeout_count) },
70 { "rx_long_length_errors", E1000_STAT(stats.roc) },
71 { "rx_short_length_errors", E1000_STAT(stats.ruc) },
72 { "rx_align_errors", E1000_STAT(stats.algnerrc) },
73 { "tx_tcp_seg_good", E1000_STAT(stats.tsctc) },
74 { "tx_tcp_seg_failed", E1000_STAT(stats.tsctfc) },
75 { "rx_flow_control_xon", E1000_STAT(stats.xonrxc) },
76 { "rx_flow_control_xoff", E1000_STAT(stats.xoffrxc) },
77 { "tx_flow_control_xon", E1000_STAT(stats.xontxc) },
78 { "tx_flow_control_xoff", E1000_STAT(stats.xofftxc) },
79 { "rx_long_byte_count", E1000_STAT(stats.gorcl) },
80 { "rx_csum_offload_good", E1000_STAT(hw_csum_good) },
81 { "rx_csum_offload_errors", E1000_STAT(hw_csum_err) },
82 { "rx_header_split", E1000_STAT(rx_hdr_split) },
83 { "alloc_rx_buff_failed", E1000_STAT(alloc_rx_buff_failed) },
86 #define E1000_QUEUE_STATS_LEN 0
87 #define E1000_GLOBAL_STATS_LEN \
88 sizeof(e1000_gstrings_stats) / sizeof(struct e1000_stats)
89 #define E1000_STATS_LEN (E1000_GLOBAL_STATS_LEN + E1000_QUEUE_STATS_LEN)
90 static const char e1000_gstrings_test[][ETH_GSTRING_LEN] = {
91 "Register test (offline)", "Eeprom test (offline)",
92 "Interrupt test (offline)", "Loopback test (offline)",
93 "Link test (on/offline)"
95 #define E1000_TEST_LEN sizeof(e1000_gstrings_test) / ETH_GSTRING_LEN
98 e1000_get_settings(struct net_device *netdev, struct ethtool_cmd *ecmd)
100 struct e1000_adapter *adapter = netdev_priv(netdev);
101 struct e1000_hw *hw = &adapter->hw;
103 if (hw->media_type == e1000_media_type_copper) {
105 ecmd->supported = (SUPPORTED_10baseT_Half |
106 SUPPORTED_10baseT_Full |
107 SUPPORTED_100baseT_Half |
108 SUPPORTED_100baseT_Full |
109 SUPPORTED_1000baseT_Full|
113 ecmd->advertising = ADVERTISED_TP;
115 if (hw->autoneg == 1) {
116 ecmd->advertising |= ADVERTISED_Autoneg;
118 /* the e1000 autoneg seems to match ethtool nicely */
120 ecmd->advertising |= hw->autoneg_advertised;
123 ecmd->port = PORT_TP;
124 ecmd->phy_address = hw->phy_addr;
126 if (hw->mac_type == e1000_82543)
127 ecmd->transceiver = XCVR_EXTERNAL;
129 ecmd->transceiver = XCVR_INTERNAL;
132 ecmd->supported = (SUPPORTED_1000baseT_Full |
136 ecmd->advertising = (ADVERTISED_1000baseT_Full |
140 ecmd->port = PORT_FIBRE;
142 if (hw->mac_type >= e1000_82545)
143 ecmd->transceiver = XCVR_INTERNAL;
145 ecmd->transceiver = XCVR_EXTERNAL;
148 if (netif_carrier_ok(adapter->netdev)) {
150 e1000_get_speed_and_duplex(hw, &adapter->link_speed,
151 &adapter->link_duplex);
152 ecmd->speed = adapter->link_speed;
154 /* unfortunatly FULL_DUPLEX != DUPLEX_FULL
155 * and HALF_DUPLEX != DUPLEX_HALF */
157 if (adapter->link_duplex == FULL_DUPLEX)
158 ecmd->duplex = DUPLEX_FULL;
160 ecmd->duplex = DUPLEX_HALF;
166 ecmd->autoneg = ((hw->media_type == e1000_media_type_fiber) ||
167 hw->autoneg) ? AUTONEG_ENABLE : AUTONEG_DISABLE;
172 e1000_set_settings(struct net_device *netdev, struct ethtool_cmd *ecmd)
174 struct e1000_adapter *adapter = netdev_priv(netdev);
175 struct e1000_hw *hw = &adapter->hw;
177 /* When SoL/IDER sessions are active, autoneg/speed/duplex
178 * cannot be changed */
179 if (e1000_check_phy_reset_block(hw)) {
180 DPRINTK(DRV, ERR, "Cannot change link characteristics "
181 "when SoL/IDER is active.\n");
185 if (ecmd->autoneg == AUTONEG_ENABLE) {
187 if (hw->media_type == e1000_media_type_fiber)
188 hw->autoneg_advertised = ADVERTISED_1000baseT_Full |
192 hw->autoneg_advertised = ADVERTISED_10baseT_Half |
193 ADVERTISED_10baseT_Full |
194 ADVERTISED_100baseT_Half |
195 ADVERTISED_100baseT_Full |
196 ADVERTISED_1000baseT_Full|
199 ecmd->advertising = hw->autoneg_advertised;
201 if (e1000_set_spd_dplx(adapter, ecmd->speed + ecmd->duplex))
206 if (netif_running(adapter->netdev))
207 e1000_reinit_locked(adapter);
209 e1000_reset(adapter);
215 e1000_get_pauseparam(struct net_device *netdev,
216 struct ethtool_pauseparam *pause)
218 struct e1000_adapter *adapter = netdev_priv(netdev);
219 struct e1000_hw *hw = &adapter->hw;
222 (adapter->fc_autoneg ? AUTONEG_ENABLE : AUTONEG_DISABLE);
224 if (hw->fc == e1000_fc_rx_pause)
226 else if (hw->fc == e1000_fc_tx_pause)
228 else if (hw->fc == e1000_fc_full) {
235 e1000_set_pauseparam(struct net_device *netdev,
236 struct ethtool_pauseparam *pause)
238 struct e1000_adapter *adapter = netdev_priv(netdev);
239 struct e1000_hw *hw = &adapter->hw;
241 adapter->fc_autoneg = pause->autoneg;
243 if (pause->rx_pause && pause->tx_pause)
244 hw->fc = e1000_fc_full;
245 else if (pause->rx_pause && !pause->tx_pause)
246 hw->fc = e1000_fc_rx_pause;
247 else if (!pause->rx_pause && pause->tx_pause)
248 hw->fc = e1000_fc_tx_pause;
249 else if (!pause->rx_pause && !pause->tx_pause)
250 hw->fc = e1000_fc_none;
252 hw->original_fc = hw->fc;
254 if (adapter->fc_autoneg == AUTONEG_ENABLE) {
255 if (netif_running(adapter->netdev))
256 e1000_reinit_locked(adapter);
258 e1000_reset(adapter);
260 return ((hw->media_type == e1000_media_type_fiber) ?
261 e1000_setup_link(hw) : e1000_force_mac_fc(hw));
267 e1000_get_rx_csum(struct net_device *netdev)
269 struct e1000_adapter *adapter = netdev_priv(netdev);
270 return adapter->rx_csum;
274 e1000_set_rx_csum(struct net_device *netdev, uint32_t data)
276 struct e1000_adapter *adapter = netdev_priv(netdev);
277 adapter->rx_csum = data;
279 if (netif_running(netdev))
280 e1000_reinit_locked(adapter);
282 e1000_reset(adapter);
287 e1000_get_tx_csum(struct net_device *netdev)
289 return (netdev->features & NETIF_F_HW_CSUM) != 0;
293 e1000_set_tx_csum(struct net_device *netdev, uint32_t data)
295 struct e1000_adapter *adapter = netdev_priv(netdev);
297 if (adapter->hw.mac_type < e1000_82543) {
304 netdev->features |= NETIF_F_HW_CSUM;
306 netdev->features &= ~NETIF_F_HW_CSUM;
313 e1000_set_tso(struct net_device *netdev, uint32_t data)
315 struct e1000_adapter *adapter = netdev_priv(netdev);
316 if ((adapter->hw.mac_type < e1000_82544) ||
317 (adapter->hw.mac_type == e1000_82547))
318 return data ? -EINVAL : 0;
321 netdev->features |= NETIF_F_TSO;
323 netdev->features &= ~NETIF_F_TSO;
325 DPRINTK(PROBE, INFO, "TSO is %s\n", data ? "Enabled" : "Disabled");
326 adapter->tso_force = TRUE;
329 #endif /* NETIF_F_TSO */
332 e1000_get_msglevel(struct net_device *netdev)
334 struct e1000_adapter *adapter = netdev_priv(netdev);
335 return adapter->msg_enable;
339 e1000_set_msglevel(struct net_device *netdev, uint32_t data)
341 struct e1000_adapter *adapter = netdev_priv(netdev);
342 adapter->msg_enable = data;
346 e1000_get_regs_len(struct net_device *netdev)
348 #define E1000_REGS_LEN 32
349 return E1000_REGS_LEN * sizeof(uint32_t);
353 e1000_get_regs(struct net_device *netdev,
354 struct ethtool_regs *regs, void *p)
356 struct e1000_adapter *adapter = netdev_priv(netdev);
357 struct e1000_hw *hw = &adapter->hw;
358 uint32_t *regs_buff = p;
361 memset(p, 0, E1000_REGS_LEN * sizeof(uint32_t));
363 regs->version = (1 << 24) | (hw->revision_id << 16) | hw->device_id;
365 regs_buff[0] = E1000_READ_REG(hw, CTRL);
366 regs_buff[1] = E1000_READ_REG(hw, STATUS);
368 regs_buff[2] = E1000_READ_REG(hw, RCTL);
369 regs_buff[3] = E1000_READ_REG(hw, RDLEN);
370 regs_buff[4] = E1000_READ_REG(hw, RDH);
371 regs_buff[5] = E1000_READ_REG(hw, RDT);
372 regs_buff[6] = E1000_READ_REG(hw, RDTR);
374 regs_buff[7] = E1000_READ_REG(hw, TCTL);
375 regs_buff[8] = E1000_READ_REG(hw, TDLEN);
376 regs_buff[9] = E1000_READ_REG(hw, TDH);
377 regs_buff[10] = E1000_READ_REG(hw, TDT);
378 regs_buff[11] = E1000_READ_REG(hw, TIDV);
380 regs_buff[12] = adapter->hw.phy_type; /* PHY type (IGP=1, M88=0) */
381 if (hw->phy_type == e1000_phy_igp) {
382 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
383 IGP01E1000_PHY_AGC_A);
384 e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_A &
385 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
386 regs_buff[13] = (uint32_t)phy_data; /* cable length */
387 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
388 IGP01E1000_PHY_AGC_B);
389 e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_B &
390 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
391 regs_buff[14] = (uint32_t)phy_data; /* cable length */
392 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
393 IGP01E1000_PHY_AGC_C);
394 e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_C &
395 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
396 regs_buff[15] = (uint32_t)phy_data; /* cable length */
397 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
398 IGP01E1000_PHY_AGC_D);
399 e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_D &
400 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
401 regs_buff[16] = (uint32_t)phy_data; /* cable length */
402 regs_buff[17] = 0; /* extended 10bt distance (not needed) */
403 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT, 0x0);
404 e1000_read_phy_reg(hw, IGP01E1000_PHY_PORT_STATUS &
405 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
406 regs_buff[18] = (uint32_t)phy_data; /* cable polarity */
407 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
408 IGP01E1000_PHY_PCS_INIT_REG);
409 e1000_read_phy_reg(hw, IGP01E1000_PHY_PCS_INIT_REG &
410 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
411 regs_buff[19] = (uint32_t)phy_data; /* cable polarity */
412 regs_buff[20] = 0; /* polarity correction enabled (always) */
413 regs_buff[22] = 0; /* phy receive errors (unavailable) */
414 regs_buff[23] = regs_buff[18]; /* mdix mode */
415 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT, 0x0);
417 e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_STATUS, &phy_data);
418 regs_buff[13] = (uint32_t)phy_data; /* cable length */
419 regs_buff[14] = 0; /* Dummy (to align w/ IGP phy reg dump) */
420 regs_buff[15] = 0; /* Dummy (to align w/ IGP phy reg dump) */
421 regs_buff[16] = 0; /* Dummy (to align w/ IGP phy reg dump) */
422 e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data);
423 regs_buff[17] = (uint32_t)phy_data; /* extended 10bt distance */
424 regs_buff[18] = regs_buff[13]; /* cable polarity */
425 regs_buff[19] = 0; /* Dummy (to align w/ IGP phy reg dump) */
426 regs_buff[20] = regs_buff[17]; /* polarity correction */
427 /* phy receive errors */
428 regs_buff[22] = adapter->phy_stats.receive_errors;
429 regs_buff[23] = regs_buff[13]; /* mdix mode */
431 regs_buff[21] = adapter->phy_stats.idle_errors; /* phy idle errors */
432 e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_data);
433 regs_buff[24] = (uint32_t)phy_data; /* phy local receiver status */
434 regs_buff[25] = regs_buff[24]; /* phy remote receiver status */
435 if (hw->mac_type >= e1000_82540 &&
436 hw->media_type == e1000_media_type_copper) {
437 regs_buff[26] = E1000_READ_REG(hw, MANC);
442 e1000_get_eeprom_len(struct net_device *netdev)
444 struct e1000_adapter *adapter = netdev_priv(netdev);
445 return adapter->hw.eeprom.word_size * 2;
449 e1000_get_eeprom(struct net_device *netdev,
450 struct ethtool_eeprom *eeprom, uint8_t *bytes)
452 struct e1000_adapter *adapter = netdev_priv(netdev);
453 struct e1000_hw *hw = &adapter->hw;
454 uint16_t *eeprom_buff;
455 int first_word, last_word;
459 if (eeprom->len == 0)
462 eeprom->magic = hw->vendor_id | (hw->device_id << 16);
464 first_word = eeprom->offset >> 1;
465 last_word = (eeprom->offset + eeprom->len - 1) >> 1;
467 eeprom_buff = kmalloc(sizeof(uint16_t) *
468 (last_word - first_word + 1), GFP_KERNEL);
472 if (hw->eeprom.type == e1000_eeprom_spi)
473 ret_val = e1000_read_eeprom(hw, first_word,
474 last_word - first_word + 1,
477 for (i = 0; i < last_word - first_word + 1; i++)
478 if ((ret_val = e1000_read_eeprom(hw, first_word + i, 1,
483 /* Device's eeprom is always little-endian, word addressable */
484 for (i = 0; i < last_word - first_word + 1; i++)
485 le16_to_cpus(&eeprom_buff[i]);
487 memcpy(bytes, (uint8_t *)eeprom_buff + (eeprom->offset & 1),
495 e1000_set_eeprom(struct net_device *netdev,
496 struct ethtool_eeprom *eeprom, uint8_t *bytes)
498 struct e1000_adapter *adapter = netdev_priv(netdev);
499 struct e1000_hw *hw = &adapter->hw;
500 uint16_t *eeprom_buff;
502 int max_len, first_word, last_word, ret_val = 0;
505 if (eeprom->len == 0)
508 if (eeprom->magic != (hw->vendor_id | (hw->device_id << 16)))
511 max_len = hw->eeprom.word_size * 2;
513 first_word = eeprom->offset >> 1;
514 last_word = (eeprom->offset + eeprom->len - 1) >> 1;
515 eeprom_buff = kmalloc(max_len, GFP_KERNEL);
519 ptr = (void *)eeprom_buff;
521 if (eeprom->offset & 1) {
522 /* need read/modify/write of first changed EEPROM word */
523 /* only the second byte of the word is being modified */
524 ret_val = e1000_read_eeprom(hw, first_word, 1,
528 if (((eeprom->offset + eeprom->len) & 1) && (ret_val == 0)) {
529 /* need read/modify/write of last changed EEPROM word */
530 /* only the first byte of the word is being modified */
531 ret_val = e1000_read_eeprom(hw, last_word, 1,
532 &eeprom_buff[last_word - first_word]);
535 /* Device's eeprom is always little-endian, word addressable */
536 for (i = 0; i < last_word - first_word + 1; i++)
537 le16_to_cpus(&eeprom_buff[i]);
539 memcpy(ptr, bytes, eeprom->len);
541 for (i = 0; i < last_word - first_word + 1; i++)
542 eeprom_buff[i] = cpu_to_le16(eeprom_buff[i]);
544 ret_val = e1000_write_eeprom(hw, first_word,
545 last_word - first_word + 1, eeprom_buff);
547 /* Update the checksum over the first part of the EEPROM if needed
548 * and flush shadow RAM for 82573 conrollers */
549 if ((ret_val == 0) && ((first_word <= EEPROM_CHECKSUM_REG) ||
550 (hw->mac_type == e1000_82573)))
551 e1000_update_eeprom_checksum(hw);
558 e1000_get_drvinfo(struct net_device *netdev,
559 struct ethtool_drvinfo *drvinfo)
561 struct e1000_adapter *adapter = netdev_priv(netdev);
562 char firmware_version[32];
563 uint16_t eeprom_data;
565 strncpy(drvinfo->driver, e1000_driver_name, 32);
566 strncpy(drvinfo->version, e1000_driver_version, 32);
568 /* EEPROM image version # is reported as firmware version # for
569 * 8257{1|2|3} controllers */
570 e1000_read_eeprom(&adapter->hw, 5, 1, &eeprom_data);
571 switch (adapter->hw.mac_type) {
575 case e1000_80003es2lan:
576 sprintf(firmware_version, "%d.%d-%d",
577 (eeprom_data & 0xF000) >> 12,
578 (eeprom_data & 0x0FF0) >> 4,
579 eeprom_data & 0x000F);
582 sprintf(firmware_version, "N/A");
585 strncpy(drvinfo->fw_version, firmware_version, 32);
586 strncpy(drvinfo->bus_info, pci_name(adapter->pdev), 32);
587 drvinfo->n_stats = E1000_STATS_LEN;
588 drvinfo->testinfo_len = E1000_TEST_LEN;
589 drvinfo->regdump_len = e1000_get_regs_len(netdev);
590 drvinfo->eedump_len = e1000_get_eeprom_len(netdev);
594 e1000_get_ringparam(struct net_device *netdev,
595 struct ethtool_ringparam *ring)
597 struct e1000_adapter *adapter = netdev_priv(netdev);
598 e1000_mac_type mac_type = adapter->hw.mac_type;
599 struct e1000_tx_ring *txdr = adapter->tx_ring;
600 struct e1000_rx_ring *rxdr = adapter->rx_ring;
602 ring->rx_max_pending = (mac_type < e1000_82544) ? E1000_MAX_RXD :
604 ring->tx_max_pending = (mac_type < e1000_82544) ? E1000_MAX_TXD :
606 ring->rx_mini_max_pending = 0;
607 ring->rx_jumbo_max_pending = 0;
608 ring->rx_pending = rxdr->count;
609 ring->tx_pending = txdr->count;
610 ring->rx_mini_pending = 0;
611 ring->rx_jumbo_pending = 0;
615 e1000_set_ringparam(struct net_device *netdev,
616 struct ethtool_ringparam *ring)
618 struct e1000_adapter *adapter = netdev_priv(netdev);
619 e1000_mac_type mac_type = adapter->hw.mac_type;
620 struct e1000_tx_ring *txdr, *tx_old, *tx_new;
621 struct e1000_rx_ring *rxdr, *rx_old, *rx_new;
622 int i, err, tx_ring_size, rx_ring_size;
624 if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
627 tx_ring_size = sizeof(struct e1000_tx_ring) * adapter->num_tx_queues;
628 rx_ring_size = sizeof(struct e1000_rx_ring) * adapter->num_rx_queues;
630 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
633 if (netif_running(adapter->netdev))
636 tx_old = adapter->tx_ring;
637 rx_old = adapter->rx_ring;
639 adapter->tx_ring = kmalloc(tx_ring_size, GFP_KERNEL);
640 if (!adapter->tx_ring) {
644 memset(adapter->tx_ring, 0, tx_ring_size);
646 adapter->rx_ring = kmalloc(rx_ring_size, GFP_KERNEL);
647 if (!adapter->rx_ring) {
648 kfree(adapter->tx_ring);
652 memset(adapter->rx_ring, 0, rx_ring_size);
654 txdr = adapter->tx_ring;
655 rxdr = adapter->rx_ring;
657 rxdr->count = max(ring->rx_pending,(uint32_t)E1000_MIN_RXD);
658 rxdr->count = min(rxdr->count,(uint32_t)(mac_type < e1000_82544 ?
659 E1000_MAX_RXD : E1000_MAX_82544_RXD));
660 E1000_ROUNDUP(rxdr->count, REQ_RX_DESCRIPTOR_MULTIPLE);
662 txdr->count = max(ring->tx_pending,(uint32_t)E1000_MIN_TXD);
663 txdr->count = min(txdr->count,(uint32_t)(mac_type < e1000_82544 ?
664 E1000_MAX_TXD : E1000_MAX_82544_TXD));
665 E1000_ROUNDUP(txdr->count, REQ_TX_DESCRIPTOR_MULTIPLE);
667 for (i = 0; i < adapter->num_tx_queues; i++)
668 txdr[i].count = txdr->count;
669 for (i = 0; i < adapter->num_rx_queues; i++)
670 rxdr[i].count = rxdr->count;
672 if (netif_running(adapter->netdev)) {
673 /* Try to get new resources before deleting old */
674 if ((err = e1000_setup_all_rx_resources(adapter)))
676 if ((err = e1000_setup_all_tx_resources(adapter)))
679 /* save the new, restore the old in order to free it,
680 * then restore the new back again */
682 rx_new = adapter->rx_ring;
683 tx_new = adapter->tx_ring;
684 adapter->rx_ring = rx_old;
685 adapter->tx_ring = tx_old;
686 e1000_free_all_rx_resources(adapter);
687 e1000_free_all_tx_resources(adapter);
690 adapter->rx_ring = rx_new;
691 adapter->tx_ring = tx_new;
692 if ((err = e1000_up(adapter)))
696 clear_bit(__E1000_RESETTING, &adapter->flags);
700 e1000_free_all_rx_resources(adapter);
702 adapter->rx_ring = rx_old;
703 adapter->tx_ring = tx_old;
706 clear_bit(__E1000_RESETTING, &adapter->flags);
710 #define REG_PATTERN_TEST(R, M, W) \
712 uint32_t pat, value; \
714 {0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF}; \
715 for (pat = 0; pat < sizeof(test)/sizeof(test[0]); pat++) { \
716 E1000_WRITE_REG(&adapter->hw, R, (test[pat] & W)); \
717 value = E1000_READ_REG(&adapter->hw, R); \
718 if (value != (test[pat] & W & M)) { \
719 DPRINTK(DRV, ERR, "pattern test reg %04X failed: got " \
720 "0x%08X expected 0x%08X\n", \
721 E1000_##R, value, (test[pat] & W & M)); \
722 *data = (adapter->hw.mac_type < e1000_82543) ? \
723 E1000_82542_##R : E1000_##R; \
729 #define REG_SET_AND_CHECK(R, M, W) \
732 E1000_WRITE_REG(&adapter->hw, R, W & M); \
733 value = E1000_READ_REG(&adapter->hw, R); \
734 if ((W & M) != (value & M)) { \
735 DPRINTK(DRV, ERR, "set/check reg %04X test failed: got 0x%08X "\
736 "expected 0x%08X\n", E1000_##R, (value & M), (W & M)); \
737 *data = (adapter->hw.mac_type < e1000_82543) ? \
738 E1000_82542_##R : E1000_##R; \
744 e1000_reg_test(struct e1000_adapter *adapter, uint64_t *data)
746 uint32_t value, before, after;
749 /* The status register is Read Only, so a write should fail.
750 * Some bits that get toggled are ignored.
752 switch (adapter->hw.mac_type) {
753 /* there are several bits on newer hardware that are r/w */
756 case e1000_80003es2lan:
767 before = E1000_READ_REG(&adapter->hw, STATUS);
768 value = (E1000_READ_REG(&adapter->hw, STATUS) & toggle);
769 E1000_WRITE_REG(&adapter->hw, STATUS, toggle);
770 after = E1000_READ_REG(&adapter->hw, STATUS) & toggle;
771 if (value != after) {
772 DPRINTK(DRV, ERR, "failed STATUS register test got: "
773 "0x%08X expected: 0x%08X\n", after, value);
777 /* restore previous status */
778 E1000_WRITE_REG(&adapter->hw, STATUS, before);
780 REG_PATTERN_TEST(FCAL, 0xFFFFFFFF, 0xFFFFFFFF);
781 REG_PATTERN_TEST(FCAH, 0x0000FFFF, 0xFFFFFFFF);
782 REG_PATTERN_TEST(FCT, 0x0000FFFF, 0xFFFFFFFF);
783 REG_PATTERN_TEST(VET, 0x0000FFFF, 0xFFFFFFFF);
784 REG_PATTERN_TEST(RDTR, 0x0000FFFF, 0xFFFFFFFF);
785 REG_PATTERN_TEST(RDBAH, 0xFFFFFFFF, 0xFFFFFFFF);
786 REG_PATTERN_TEST(RDLEN, 0x000FFF80, 0x000FFFFF);
787 REG_PATTERN_TEST(RDH, 0x0000FFFF, 0x0000FFFF);
788 REG_PATTERN_TEST(RDT, 0x0000FFFF, 0x0000FFFF);
789 REG_PATTERN_TEST(FCRTH, 0x0000FFF8, 0x0000FFF8);
790 REG_PATTERN_TEST(FCTTV, 0x0000FFFF, 0x0000FFFF);
791 REG_PATTERN_TEST(TIPG, 0x3FFFFFFF, 0x3FFFFFFF);
792 REG_PATTERN_TEST(TDBAH, 0xFFFFFFFF, 0xFFFFFFFF);
793 REG_PATTERN_TEST(TDLEN, 0x000FFF80, 0x000FFFFF);
795 REG_SET_AND_CHECK(RCTL, 0xFFFFFFFF, 0x00000000);
796 REG_SET_AND_CHECK(RCTL, 0x06DFB3FE, 0x003FFFFB);
797 REG_SET_AND_CHECK(TCTL, 0xFFFFFFFF, 0x00000000);
799 if (adapter->hw.mac_type >= e1000_82543) {
801 REG_SET_AND_CHECK(RCTL, 0x06DFB3FE, 0xFFFFFFFF);
802 REG_PATTERN_TEST(RDBAL, 0xFFFFFFF0, 0xFFFFFFFF);
803 REG_PATTERN_TEST(TXCW, 0xC000FFFF, 0x0000FFFF);
804 REG_PATTERN_TEST(TDBAL, 0xFFFFFFF0, 0xFFFFFFFF);
805 REG_PATTERN_TEST(TIDV, 0x0000FFFF, 0x0000FFFF);
807 for (i = 0; i < E1000_RAR_ENTRIES; i++) {
808 REG_PATTERN_TEST(RA + ((i << 1) << 2), 0xFFFFFFFF,
810 REG_PATTERN_TEST(RA + (((i << 1) + 1) << 2), 0x8003FFFF,
816 REG_SET_AND_CHECK(RCTL, 0xFFFFFFFF, 0x01FFFFFF);
817 REG_PATTERN_TEST(RDBAL, 0xFFFFF000, 0xFFFFFFFF);
818 REG_PATTERN_TEST(TXCW, 0x0000FFFF, 0x0000FFFF);
819 REG_PATTERN_TEST(TDBAL, 0xFFFFF000, 0xFFFFFFFF);
823 for (i = 0; i < E1000_MC_TBL_SIZE; i++)
824 REG_PATTERN_TEST(MTA + (i << 2), 0xFFFFFFFF, 0xFFFFFFFF);
831 e1000_eeprom_test(struct e1000_adapter *adapter, uint64_t *data)
834 uint16_t checksum = 0;
838 /* Read and add up the contents of the EEPROM */
839 for (i = 0; i < (EEPROM_CHECKSUM_REG + 1); i++) {
840 if ((e1000_read_eeprom(&adapter->hw, i, 1, &temp)) < 0) {
847 /* If Checksum is not Correct return error else test passed */
848 if ((checksum != (uint16_t) EEPROM_SUM) && !(*data))
855 e1000_test_intr(int irq,
857 struct pt_regs *regs)
859 struct net_device *netdev = (struct net_device *) data;
860 struct e1000_adapter *adapter = netdev_priv(netdev);
862 adapter->test_icr |= E1000_READ_REG(&adapter->hw, ICR);
868 e1000_intr_test(struct e1000_adapter *adapter, uint64_t *data)
870 struct net_device *netdev = adapter->netdev;
871 uint32_t mask, i=0, shared_int = TRUE;
872 uint32_t irq = adapter->pdev->irq;
876 /* Hook up test interrupt handler just for this test */
877 if (!request_irq(irq, &e1000_test_intr, SA_PROBEIRQ, netdev->name,
880 } else if (request_irq(irq, &e1000_test_intr, SA_SHIRQ,
881 netdev->name, netdev)){
885 DPRINTK(PROBE,INFO, "testing %s interrupt\n",
886 (shared_int ? "shared" : "unshared"));
888 /* Disable all the interrupts */
889 E1000_WRITE_REG(&adapter->hw, IMC, 0xFFFFFFFF);
892 /* Test each interrupt */
893 for (; i < 10; i++) {
895 /* Interrupt to test */
899 /* Disable the interrupt to be reported in
900 * the cause register and then force the same
901 * interrupt and see if one gets posted. If
902 * an interrupt was posted to the bus, the
905 adapter->test_icr = 0;
906 E1000_WRITE_REG(&adapter->hw, IMC, mask);
907 E1000_WRITE_REG(&adapter->hw, ICS, mask);
910 if (adapter->test_icr & mask) {
916 /* Enable the interrupt to be reported in
917 * the cause register and then force the same
918 * interrupt and see if one gets posted. If
919 * an interrupt was not posted to the bus, the
922 adapter->test_icr = 0;
923 E1000_WRITE_REG(&adapter->hw, IMS, mask);
924 E1000_WRITE_REG(&adapter->hw, ICS, mask);
927 if (!(adapter->test_icr & mask)) {
933 /* Disable the other interrupts to be reported in
934 * the cause register and then force the other
935 * interrupts and see if any get posted. If
936 * an interrupt was posted to the bus, the
939 adapter->test_icr = 0;
940 E1000_WRITE_REG(&adapter->hw, IMC, ~mask & 0x00007FFF);
941 E1000_WRITE_REG(&adapter->hw, ICS, ~mask & 0x00007FFF);
944 if (adapter->test_icr) {
951 /* Disable all the interrupts */
952 E1000_WRITE_REG(&adapter->hw, IMC, 0xFFFFFFFF);
955 /* Unhook test interrupt handler */
956 free_irq(irq, netdev);
962 e1000_free_desc_rings(struct e1000_adapter *adapter)
964 struct e1000_tx_ring *txdr = &adapter->test_tx_ring;
965 struct e1000_rx_ring *rxdr = &adapter->test_rx_ring;
966 struct pci_dev *pdev = adapter->pdev;
969 if (txdr->desc && txdr->buffer_info) {
970 for (i = 0; i < txdr->count; i++) {
971 if (txdr->buffer_info[i].dma)
972 pci_unmap_single(pdev, txdr->buffer_info[i].dma,
973 txdr->buffer_info[i].length,
975 if (txdr->buffer_info[i].skb)
976 dev_kfree_skb(txdr->buffer_info[i].skb);
980 if (rxdr->desc && rxdr->buffer_info) {
981 for (i = 0; i < rxdr->count; i++) {
982 if (rxdr->buffer_info[i].dma)
983 pci_unmap_single(pdev, rxdr->buffer_info[i].dma,
984 rxdr->buffer_info[i].length,
986 if (rxdr->buffer_info[i].skb)
987 dev_kfree_skb(rxdr->buffer_info[i].skb);
992 pci_free_consistent(pdev, txdr->size, txdr->desc, txdr->dma);
996 pci_free_consistent(pdev, rxdr->size, rxdr->desc, rxdr->dma);
1000 kfree(txdr->buffer_info);
1001 txdr->buffer_info = NULL;
1002 kfree(rxdr->buffer_info);
1003 rxdr->buffer_info = NULL;
1009 e1000_setup_desc_rings(struct e1000_adapter *adapter)
1011 struct e1000_tx_ring *txdr = &adapter->test_tx_ring;
1012 struct e1000_rx_ring *rxdr = &adapter->test_rx_ring;
1013 struct pci_dev *pdev = adapter->pdev;
1015 int size, i, ret_val;
1017 /* Setup Tx descriptor ring and Tx buffers */
1020 txdr->count = E1000_DEFAULT_TXD;
1022 size = txdr->count * sizeof(struct e1000_buffer);
1023 if (!(txdr->buffer_info = kmalloc(size, GFP_KERNEL))) {
1027 memset(txdr->buffer_info, 0, size);
1029 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
1030 E1000_ROUNDUP(txdr->size, 4096);
1031 if (!(txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma))) {
1035 memset(txdr->desc, 0, txdr->size);
1036 txdr->next_to_use = txdr->next_to_clean = 0;
1038 E1000_WRITE_REG(&adapter->hw, TDBAL,
1039 ((uint64_t) txdr->dma & 0x00000000FFFFFFFF));
1040 E1000_WRITE_REG(&adapter->hw, TDBAH, ((uint64_t) txdr->dma >> 32));
1041 E1000_WRITE_REG(&adapter->hw, TDLEN,
1042 txdr->count * sizeof(struct e1000_tx_desc));
1043 E1000_WRITE_REG(&adapter->hw, TDH, 0);
1044 E1000_WRITE_REG(&adapter->hw, TDT, 0);
1045 E1000_WRITE_REG(&adapter->hw, TCTL,
1046 E1000_TCTL_PSP | E1000_TCTL_EN |
1047 E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT |
1048 E1000_FDX_COLLISION_DISTANCE << E1000_COLD_SHIFT);
1050 for (i = 0; i < txdr->count; i++) {
1051 struct e1000_tx_desc *tx_desc = E1000_TX_DESC(*txdr, i);
1052 struct sk_buff *skb;
1053 unsigned int size = 1024;
1055 if (!(skb = alloc_skb(size, GFP_KERNEL))) {
1060 txdr->buffer_info[i].skb = skb;
1061 txdr->buffer_info[i].length = skb->len;
1062 txdr->buffer_info[i].dma =
1063 pci_map_single(pdev, skb->data, skb->len,
1065 tx_desc->buffer_addr = cpu_to_le64(txdr->buffer_info[i].dma);
1066 tx_desc->lower.data = cpu_to_le32(skb->len);
1067 tx_desc->lower.data |= cpu_to_le32(E1000_TXD_CMD_EOP |
1068 E1000_TXD_CMD_IFCS |
1070 tx_desc->upper.data = 0;
1073 /* Setup Rx descriptor ring and Rx buffers */
1076 rxdr->count = E1000_DEFAULT_RXD;
1078 size = rxdr->count * sizeof(struct e1000_buffer);
1079 if (!(rxdr->buffer_info = kmalloc(size, GFP_KERNEL))) {
1083 memset(rxdr->buffer_info, 0, size);
1085 rxdr->size = rxdr->count * sizeof(struct e1000_rx_desc);
1086 if (!(rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma))) {
1090 memset(rxdr->desc, 0, rxdr->size);
1091 rxdr->next_to_use = rxdr->next_to_clean = 0;
1093 rctl = E1000_READ_REG(&adapter->hw, RCTL);
1094 E1000_WRITE_REG(&adapter->hw, RCTL, rctl & ~E1000_RCTL_EN);
1095 E1000_WRITE_REG(&adapter->hw, RDBAL,
1096 ((uint64_t) rxdr->dma & 0xFFFFFFFF));
1097 E1000_WRITE_REG(&adapter->hw, RDBAH, ((uint64_t) rxdr->dma >> 32));
1098 E1000_WRITE_REG(&adapter->hw, RDLEN, rxdr->size);
1099 E1000_WRITE_REG(&adapter->hw, RDH, 0);
1100 E1000_WRITE_REG(&adapter->hw, RDT, 0);
1101 rctl = E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_SZ_2048 |
1102 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1103 (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
1104 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
1106 for (i = 0; i < rxdr->count; i++) {
1107 struct e1000_rx_desc *rx_desc = E1000_RX_DESC(*rxdr, i);
1108 struct sk_buff *skb;
1110 if (!(skb = alloc_skb(E1000_RXBUFFER_2048 + NET_IP_ALIGN,
1115 skb_reserve(skb, NET_IP_ALIGN);
1116 rxdr->buffer_info[i].skb = skb;
1117 rxdr->buffer_info[i].length = E1000_RXBUFFER_2048;
1118 rxdr->buffer_info[i].dma =
1119 pci_map_single(pdev, skb->data, E1000_RXBUFFER_2048,
1120 PCI_DMA_FROMDEVICE);
1121 rx_desc->buffer_addr = cpu_to_le64(rxdr->buffer_info[i].dma);
1122 memset(skb->data, 0x00, skb->len);
1128 e1000_free_desc_rings(adapter);
1133 e1000_phy_disable_receiver(struct e1000_adapter *adapter)
1135 /* Write out to PHY registers 29 and 30 to disable the Receiver. */
1136 e1000_write_phy_reg(&adapter->hw, 29, 0x001F);
1137 e1000_write_phy_reg(&adapter->hw, 30, 0x8FFC);
1138 e1000_write_phy_reg(&adapter->hw, 29, 0x001A);
1139 e1000_write_phy_reg(&adapter->hw, 30, 0x8FF0);
1143 e1000_phy_reset_clk_and_crs(struct e1000_adapter *adapter)
1147 /* Because we reset the PHY above, we need to re-force TX_CLK in the
1148 * Extended PHY Specific Control Register to 25MHz clock. This
1149 * value defaults back to a 2.5MHz clock when the PHY is reset.
1151 e1000_read_phy_reg(&adapter->hw, M88E1000_EXT_PHY_SPEC_CTRL, &phy_reg);
1152 phy_reg |= M88E1000_EPSCR_TX_CLK_25;
1153 e1000_write_phy_reg(&adapter->hw,
1154 M88E1000_EXT_PHY_SPEC_CTRL, phy_reg);
1156 /* In addition, because of the s/w reset above, we need to enable
1157 * CRS on TX. This must be set for both full and half duplex
1160 e1000_read_phy_reg(&adapter->hw, M88E1000_PHY_SPEC_CTRL, &phy_reg);
1161 phy_reg |= M88E1000_PSCR_ASSERT_CRS_ON_TX;
1162 e1000_write_phy_reg(&adapter->hw,
1163 M88E1000_PHY_SPEC_CTRL, phy_reg);
1167 e1000_nonintegrated_phy_loopback(struct e1000_adapter *adapter)
1172 /* Setup the Device Control Register for PHY loopback test. */
1174 ctrl_reg = E1000_READ_REG(&adapter->hw, CTRL);
1175 ctrl_reg |= (E1000_CTRL_ILOS | /* Invert Loss-Of-Signal */
1176 E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
1177 E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
1178 E1000_CTRL_SPD_1000 | /* Force Speed to 1000 */
1179 E1000_CTRL_FD); /* Force Duplex to FULL */
1181 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl_reg);
1183 /* Read the PHY Specific Control Register (0x10) */
1184 e1000_read_phy_reg(&adapter->hw, M88E1000_PHY_SPEC_CTRL, &phy_reg);
1186 /* Clear Auto-Crossover bits in PHY Specific Control Register
1189 phy_reg &= ~M88E1000_PSCR_AUTO_X_MODE;
1190 e1000_write_phy_reg(&adapter->hw, M88E1000_PHY_SPEC_CTRL, phy_reg);
1192 /* Perform software reset on the PHY */
1193 e1000_phy_reset(&adapter->hw);
1195 /* Have to setup TX_CLK and TX_CRS after software reset */
1196 e1000_phy_reset_clk_and_crs(adapter);
1198 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x8100);
1200 /* Wait for reset to complete. */
1203 /* Have to setup TX_CLK and TX_CRS after software reset */
1204 e1000_phy_reset_clk_and_crs(adapter);
1206 /* Write out to PHY registers 29 and 30 to disable the Receiver. */
1207 e1000_phy_disable_receiver(adapter);
1209 /* Set the loopback bit in the PHY control register. */
1210 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_reg);
1211 phy_reg |= MII_CR_LOOPBACK;
1212 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_reg);
1214 /* Setup TX_CLK and TX_CRS one more time. */
1215 e1000_phy_reset_clk_and_crs(adapter);
1217 /* Check Phy Configuration */
1218 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_reg);
1219 if (phy_reg != 0x4100)
1222 e1000_read_phy_reg(&adapter->hw, M88E1000_EXT_PHY_SPEC_CTRL, &phy_reg);
1223 if (phy_reg != 0x0070)
1226 e1000_read_phy_reg(&adapter->hw, 29, &phy_reg);
1227 if (phy_reg != 0x001A)
1234 e1000_integrated_phy_loopback(struct e1000_adapter *adapter)
1236 uint32_t ctrl_reg = 0;
1237 uint32_t stat_reg = 0;
1239 adapter->hw.autoneg = FALSE;
1241 if (adapter->hw.phy_type == e1000_phy_m88) {
1242 /* Auto-MDI/MDIX Off */
1243 e1000_write_phy_reg(&adapter->hw,
1244 M88E1000_PHY_SPEC_CTRL, 0x0808);
1245 /* reset to update Auto-MDI/MDIX */
1246 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x9140);
1248 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x8140);
1249 } else if (adapter->hw.phy_type == e1000_phy_gg82563) {
1250 e1000_write_phy_reg(&adapter->hw,
1251 GG82563_PHY_KMRN_MODE_CTRL,
1254 /* force 1000, set loopback */
1255 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x4140);
1257 /* Now set up the MAC to the same speed/duplex as the PHY. */
1258 ctrl_reg = E1000_READ_REG(&adapter->hw, CTRL);
1259 ctrl_reg &= ~E1000_CTRL_SPD_SEL; /* Clear the speed sel bits */
1260 ctrl_reg |= (E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
1261 E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
1262 E1000_CTRL_SPD_1000 |/* Force Speed to 1000 */
1263 E1000_CTRL_FD); /* Force Duplex to FULL */
1265 if (adapter->hw.media_type == e1000_media_type_copper &&
1266 adapter->hw.phy_type == e1000_phy_m88) {
1267 ctrl_reg |= E1000_CTRL_ILOS; /* Invert Loss of Signal */
1269 /* Set the ILOS bit on the fiber Nic is half
1270 * duplex link is detected. */
1271 stat_reg = E1000_READ_REG(&adapter->hw, STATUS);
1272 if ((stat_reg & E1000_STATUS_FD) == 0)
1273 ctrl_reg |= (E1000_CTRL_ILOS | E1000_CTRL_SLU);
1276 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl_reg);
1278 /* Disable the receiver on the PHY so when a cable is plugged in, the
1279 * PHY does not begin to autoneg when a cable is reconnected to the NIC.
1281 if (adapter->hw.phy_type == e1000_phy_m88)
1282 e1000_phy_disable_receiver(adapter);
1290 e1000_set_phy_loopback(struct e1000_adapter *adapter)
1292 uint16_t phy_reg = 0;
1295 switch (adapter->hw.mac_type) {
1297 if (adapter->hw.media_type == e1000_media_type_copper) {
1298 /* Attempt to setup Loopback mode on Non-integrated PHY.
1299 * Some PHY registers get corrupted at random, so
1300 * attempt this 10 times.
1302 while (e1000_nonintegrated_phy_loopback(adapter) &&
1312 case e1000_82545_rev_3:
1314 case e1000_82546_rev_3:
1316 case e1000_82541_rev_2:
1318 case e1000_82547_rev_2:
1322 case e1000_80003es2lan:
1323 return e1000_integrated_phy_loopback(adapter);
1327 /* Default PHY loopback work is to read the MII
1328 * control register and assert bit 14 (loopback mode).
1330 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_reg);
1331 phy_reg |= MII_CR_LOOPBACK;
1332 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_reg);
1341 e1000_setup_loopback_test(struct e1000_adapter *adapter)
1343 struct e1000_hw *hw = &adapter->hw;
1346 if (hw->media_type == e1000_media_type_fiber ||
1347 hw->media_type == e1000_media_type_internal_serdes) {
1348 switch (hw->mac_type) {
1351 case e1000_82545_rev_3:
1352 case e1000_82546_rev_3:
1353 return e1000_set_phy_loopback(adapter);
1357 #define E1000_SERDES_LB_ON 0x410
1358 e1000_set_phy_loopback(adapter);
1359 E1000_WRITE_REG(hw, SCTL, E1000_SERDES_LB_ON);
1364 rctl = E1000_READ_REG(hw, RCTL);
1365 rctl |= E1000_RCTL_LBM_TCVR;
1366 E1000_WRITE_REG(hw, RCTL, rctl);
1369 } else if (hw->media_type == e1000_media_type_copper)
1370 return e1000_set_phy_loopback(adapter);
1376 e1000_loopback_cleanup(struct e1000_adapter *adapter)
1378 struct e1000_hw *hw = &adapter->hw;
1382 rctl = E1000_READ_REG(hw, RCTL);
1383 rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
1384 E1000_WRITE_REG(hw, RCTL, rctl);
1386 switch (hw->mac_type) {
1389 if (hw->media_type == e1000_media_type_fiber ||
1390 hw->media_type == e1000_media_type_internal_serdes) {
1391 #define E1000_SERDES_LB_OFF 0x400
1392 E1000_WRITE_REG(hw, SCTL, E1000_SERDES_LB_OFF);
1399 case e1000_82545_rev_3:
1400 case e1000_82546_rev_3:
1403 if (hw->phy_type == e1000_phy_gg82563) {
1404 e1000_write_phy_reg(hw,
1405 GG82563_PHY_KMRN_MODE_CTRL,
1408 e1000_read_phy_reg(hw, PHY_CTRL, &phy_reg);
1409 if (phy_reg & MII_CR_LOOPBACK) {
1410 phy_reg &= ~MII_CR_LOOPBACK;
1411 e1000_write_phy_reg(hw, PHY_CTRL, phy_reg);
1412 e1000_phy_reset(hw);
1419 e1000_create_lbtest_frame(struct sk_buff *skb, unsigned int frame_size)
1421 memset(skb->data, 0xFF, frame_size);
1423 memset(&skb->data[frame_size / 2], 0xAA, frame_size / 2 - 1);
1424 memset(&skb->data[frame_size / 2 + 10], 0xBE, 1);
1425 memset(&skb->data[frame_size / 2 + 12], 0xAF, 1);
1429 e1000_check_lbtest_frame(struct sk_buff *skb, unsigned int frame_size)
1432 if (*(skb->data + 3) == 0xFF) {
1433 if ((*(skb->data + frame_size / 2 + 10) == 0xBE) &&
1434 (*(skb->data + frame_size / 2 + 12) == 0xAF)) {
1442 e1000_run_loopback_test(struct e1000_adapter *adapter)
1444 struct e1000_tx_ring *txdr = &adapter->test_tx_ring;
1445 struct e1000_rx_ring *rxdr = &adapter->test_rx_ring;
1446 struct pci_dev *pdev = adapter->pdev;
1447 int i, j, k, l, lc, good_cnt, ret_val=0;
1450 E1000_WRITE_REG(&adapter->hw, RDT, rxdr->count - 1);
1452 /* Calculate the loop count based on the largest descriptor ring
1453 * The idea is to wrap the largest ring a number of times using 64
1454 * send/receive pairs during each loop
1457 if (rxdr->count <= txdr->count)
1458 lc = ((txdr->count / 64) * 2) + 1;
1460 lc = ((rxdr->count / 64) * 2) + 1;
1463 for (j = 0; j <= lc; j++) { /* loop count loop */
1464 for (i = 0; i < 64; i++) { /* send the packets */
1465 e1000_create_lbtest_frame(txdr->buffer_info[i].skb,
1467 pci_dma_sync_single_for_device(pdev,
1468 txdr->buffer_info[k].dma,
1469 txdr->buffer_info[k].length,
1471 if (unlikely(++k == txdr->count)) k = 0;
1473 E1000_WRITE_REG(&adapter->hw, TDT, k);
1475 time = jiffies; /* set the start time for the receive */
1477 do { /* receive the sent packets */
1478 pci_dma_sync_single_for_cpu(pdev,
1479 rxdr->buffer_info[l].dma,
1480 rxdr->buffer_info[l].length,
1481 PCI_DMA_FROMDEVICE);
1483 ret_val = e1000_check_lbtest_frame(
1484 rxdr->buffer_info[l].skb,
1488 if (unlikely(++l == rxdr->count)) l = 0;
1489 /* time + 20 msecs (200 msecs on 2.4) is more than
1490 * enough time to complete the receives, if it's
1491 * exceeded, break and error off
1493 } while (good_cnt < 64 && jiffies < (time + 20));
1494 if (good_cnt != 64) {
1495 ret_val = 13; /* ret_val is the same as mis-compare */
1498 if (jiffies >= (time + 2)) {
1499 ret_val = 14; /* error code for time out error */
1502 } /* end loop count loop */
1507 e1000_loopback_test(struct e1000_adapter *adapter, uint64_t *data)
1509 /* PHY loopback cannot be performed if SoL/IDER
1510 * sessions are active */
1511 if (e1000_check_phy_reset_block(&adapter->hw)) {
1512 DPRINTK(DRV, ERR, "Cannot do PHY loopback test "
1513 "when SoL/IDER is active.\n");
1518 if ((*data = e1000_setup_desc_rings(adapter)))
1520 if ((*data = e1000_setup_loopback_test(adapter)))
1522 *data = e1000_run_loopback_test(adapter);
1523 e1000_loopback_cleanup(adapter);
1526 e1000_free_desc_rings(adapter);
1532 e1000_link_test(struct e1000_adapter *adapter, uint64_t *data)
1535 if (adapter->hw.media_type == e1000_media_type_internal_serdes) {
1537 adapter->hw.serdes_link_down = TRUE;
1539 /* On some blade server designs, link establishment
1540 * could take as long as 2-3 minutes */
1542 e1000_check_for_link(&adapter->hw);
1543 if (adapter->hw.serdes_link_down == FALSE)
1546 } while (i++ < 3750);
1550 e1000_check_for_link(&adapter->hw);
1551 if (adapter->hw.autoneg) /* if auto_neg is set wait for it */
1554 if (!(E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU)) {
1562 e1000_diag_test_count(struct net_device *netdev)
1564 return E1000_TEST_LEN;
1568 e1000_diag_test(struct net_device *netdev,
1569 struct ethtool_test *eth_test, uint64_t *data)
1571 struct e1000_adapter *adapter = netdev_priv(netdev);
1572 boolean_t if_running = netif_running(netdev);
1574 set_bit(__E1000_DRIVER_TESTING, &adapter->flags);
1575 if (eth_test->flags == ETH_TEST_FL_OFFLINE) {
1578 /* save speed, duplex, autoneg settings */
1579 uint16_t autoneg_advertised = adapter->hw.autoneg_advertised;
1580 uint8_t forced_speed_duplex = adapter->hw.forced_speed_duplex;
1581 uint8_t autoneg = adapter->hw.autoneg;
1583 /* Link test performed before hardware reset so autoneg doesn't
1584 * interfere with test result */
1585 if (e1000_link_test(adapter, &data[4]))
1586 eth_test->flags |= ETH_TEST_FL_FAILED;
1589 /* indicate we're in test mode */
1592 e1000_reset(adapter);
1594 if (e1000_reg_test(adapter, &data[0]))
1595 eth_test->flags |= ETH_TEST_FL_FAILED;
1597 e1000_reset(adapter);
1598 if (e1000_eeprom_test(adapter, &data[1]))
1599 eth_test->flags |= ETH_TEST_FL_FAILED;
1601 e1000_reset(adapter);
1602 if (e1000_intr_test(adapter, &data[2]))
1603 eth_test->flags |= ETH_TEST_FL_FAILED;
1605 e1000_reset(adapter);
1606 if (e1000_loopback_test(adapter, &data[3]))
1607 eth_test->flags |= ETH_TEST_FL_FAILED;
1609 /* restore speed, duplex, autoneg settings */
1610 adapter->hw.autoneg_advertised = autoneg_advertised;
1611 adapter->hw.forced_speed_duplex = forced_speed_duplex;
1612 adapter->hw.autoneg = autoneg;
1614 e1000_reset(adapter);
1615 clear_bit(__E1000_DRIVER_TESTING, &adapter->flags);
1620 if (e1000_link_test(adapter, &data[4]))
1621 eth_test->flags |= ETH_TEST_FL_FAILED;
1623 /* Offline tests aren't run; pass by default */
1629 clear_bit(__E1000_DRIVER_TESTING, &adapter->flags);
1631 msleep_interruptible(4 * 1000);
1635 e1000_get_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
1637 struct e1000_adapter *adapter = netdev_priv(netdev);
1638 struct e1000_hw *hw = &adapter->hw;
1640 switch (adapter->hw.device_id) {
1641 case E1000_DEV_ID_82542:
1642 case E1000_DEV_ID_82543GC_FIBER:
1643 case E1000_DEV_ID_82543GC_COPPER:
1644 case E1000_DEV_ID_82544EI_FIBER:
1645 case E1000_DEV_ID_82546EB_QUAD_COPPER:
1646 case E1000_DEV_ID_82545EM_FIBER:
1647 case E1000_DEV_ID_82545EM_COPPER:
1648 case E1000_DEV_ID_82546GB_QUAD_COPPER:
1653 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
1654 /* device id 10B5 port-A supports wol */
1655 if (!adapter->ksp3_port_a) {
1659 /* KSP3 does not suppport UCAST wake-ups for any interface */
1660 wol->supported = WAKE_MCAST | WAKE_BCAST | WAKE_MAGIC;
1662 if (adapter->wol & E1000_WUFC_EX)
1663 DPRINTK(DRV, ERR, "Interface does not support "
1664 "directed (unicast) frame wake-up packets\n");
1668 case E1000_DEV_ID_82546EB_FIBER:
1669 case E1000_DEV_ID_82546GB_FIBER:
1670 case E1000_DEV_ID_82571EB_FIBER:
1671 /* Wake events only supported on port A for dual fiber */
1672 if (E1000_READ_REG(hw, STATUS) & E1000_STATUS_FUNC_1) {
1680 wol->supported = WAKE_UCAST | WAKE_MCAST |
1681 WAKE_BCAST | WAKE_MAGIC;
1685 if (adapter->wol & E1000_WUFC_EX)
1686 wol->wolopts |= WAKE_UCAST;
1687 if (adapter->wol & E1000_WUFC_MC)
1688 wol->wolopts |= WAKE_MCAST;
1689 if (adapter->wol & E1000_WUFC_BC)
1690 wol->wolopts |= WAKE_BCAST;
1691 if (adapter->wol & E1000_WUFC_MAG)
1692 wol->wolopts |= WAKE_MAGIC;
1698 e1000_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
1700 struct e1000_adapter *adapter = netdev_priv(netdev);
1701 struct e1000_hw *hw = &adapter->hw;
1703 switch (adapter->hw.device_id) {
1704 case E1000_DEV_ID_82542:
1705 case E1000_DEV_ID_82543GC_FIBER:
1706 case E1000_DEV_ID_82543GC_COPPER:
1707 case E1000_DEV_ID_82544EI_FIBER:
1708 case E1000_DEV_ID_82546EB_QUAD_COPPER:
1709 case E1000_DEV_ID_82546GB_QUAD_COPPER:
1710 case E1000_DEV_ID_82545EM_FIBER:
1711 case E1000_DEV_ID_82545EM_COPPER:
1712 return wol->wolopts ? -EOPNOTSUPP : 0;
1714 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
1715 /* device id 10B5 port-A supports wol */
1716 if (!adapter->ksp3_port_a)
1717 return wol->wolopts ? -EOPNOTSUPP : 0;
1719 if (wol->wolopts & WAKE_UCAST) {
1720 DPRINTK(DRV, ERR, "Interface does not support "
1721 "directed (unicast) frame wake-up packets\n");
1725 case E1000_DEV_ID_82546EB_FIBER:
1726 case E1000_DEV_ID_82546GB_FIBER:
1727 case E1000_DEV_ID_82571EB_FIBER:
1728 /* Wake events only supported on port A for dual fiber */
1729 if (E1000_READ_REG(hw, STATUS) & E1000_STATUS_FUNC_1)
1730 return wol->wolopts ? -EOPNOTSUPP : 0;
1734 if (wol->wolopts & (WAKE_PHY | WAKE_ARP | WAKE_MAGICSECURE))
1739 if (wol->wolopts & WAKE_UCAST)
1740 adapter->wol |= E1000_WUFC_EX;
1741 if (wol->wolopts & WAKE_MCAST)
1742 adapter->wol |= E1000_WUFC_MC;
1743 if (wol->wolopts & WAKE_BCAST)
1744 adapter->wol |= E1000_WUFC_BC;
1745 if (wol->wolopts & WAKE_MAGIC)
1746 adapter->wol |= E1000_WUFC_MAG;
1752 /* toggle LED 4 times per second = 2 "blinks" per second */
1753 #define E1000_ID_INTERVAL (HZ/4)
1755 /* bit defines for adapter->led_status */
1756 #define E1000_LED_ON 0
1759 e1000_led_blink_callback(unsigned long data)
1761 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
1763 if (test_and_change_bit(E1000_LED_ON, &adapter->led_status))
1764 e1000_led_off(&adapter->hw);
1766 e1000_led_on(&adapter->hw);
1768 mod_timer(&adapter->blink_timer, jiffies + E1000_ID_INTERVAL);
1772 e1000_phys_id(struct net_device *netdev, uint32_t data)
1774 struct e1000_adapter *adapter = netdev_priv(netdev);
1776 if (!data || data > (uint32_t)(MAX_SCHEDULE_TIMEOUT / HZ))
1777 data = (uint32_t)(MAX_SCHEDULE_TIMEOUT / HZ);
1779 if (adapter->hw.mac_type < e1000_82571) {
1780 if (!adapter->blink_timer.function) {
1781 init_timer(&adapter->blink_timer);
1782 adapter->blink_timer.function = e1000_led_blink_callback;
1783 adapter->blink_timer.data = (unsigned long) adapter;
1785 e1000_setup_led(&adapter->hw);
1786 mod_timer(&adapter->blink_timer, jiffies);
1787 msleep_interruptible(data * 1000);
1788 del_timer_sync(&adapter->blink_timer);
1789 } else if (adapter->hw.mac_type < e1000_82573) {
1790 E1000_WRITE_REG(&adapter->hw, LEDCTL,
1791 (E1000_LEDCTL_LED2_BLINK_RATE |
1792 E1000_LEDCTL_LED0_BLINK | E1000_LEDCTL_LED2_BLINK |
1793 (E1000_LEDCTL_MODE_LED_ON << E1000_LEDCTL_LED2_MODE_SHIFT) |
1794 (E1000_LEDCTL_MODE_LINK_ACTIVITY << E1000_LEDCTL_LED0_MODE_SHIFT) |
1795 (E1000_LEDCTL_MODE_LED_OFF << E1000_LEDCTL_LED1_MODE_SHIFT)));
1796 msleep_interruptible(data * 1000);
1798 E1000_WRITE_REG(&adapter->hw, LEDCTL,
1799 (E1000_LEDCTL_LED2_BLINK_RATE |
1800 E1000_LEDCTL_LED1_BLINK | E1000_LEDCTL_LED2_BLINK |
1801 (E1000_LEDCTL_MODE_LED_ON << E1000_LEDCTL_LED2_MODE_SHIFT) |
1802 (E1000_LEDCTL_MODE_LINK_ACTIVITY << E1000_LEDCTL_LED1_MODE_SHIFT) |
1803 (E1000_LEDCTL_MODE_LED_OFF << E1000_LEDCTL_LED0_MODE_SHIFT)));
1804 msleep_interruptible(data * 1000);
1807 e1000_led_off(&adapter->hw);
1808 clear_bit(E1000_LED_ON, &adapter->led_status);
1809 e1000_cleanup_led(&adapter->hw);
1815 e1000_nway_reset(struct net_device *netdev)
1817 struct e1000_adapter *adapter = netdev_priv(netdev);
1818 if (netif_running(netdev))
1819 e1000_reinit_locked(adapter);
1824 e1000_get_stats_count(struct net_device *netdev)
1826 return E1000_STATS_LEN;
1830 e1000_get_ethtool_stats(struct net_device *netdev,
1831 struct ethtool_stats *stats, uint64_t *data)
1833 struct e1000_adapter *adapter = netdev_priv(netdev);
1836 e1000_update_stats(adapter);
1837 for (i = 0; i < E1000_GLOBAL_STATS_LEN; i++) {
1838 char *p = (char *)adapter+e1000_gstrings_stats[i].stat_offset;
1839 data[i] = (e1000_gstrings_stats[i].sizeof_stat ==
1840 sizeof(uint64_t)) ? *(uint64_t *)p : *(uint32_t *)p;
1842 /* BUG_ON(i != E1000_STATS_LEN); */
1846 e1000_get_strings(struct net_device *netdev, uint32_t stringset, uint8_t *data)
1851 switch (stringset) {
1853 memcpy(data, *e1000_gstrings_test,
1854 E1000_TEST_LEN*ETH_GSTRING_LEN);
1857 for (i = 0; i < E1000_GLOBAL_STATS_LEN; i++) {
1858 memcpy(p, e1000_gstrings_stats[i].stat_string,
1860 p += ETH_GSTRING_LEN;
1862 /* BUG_ON(p - data != E1000_STATS_LEN * ETH_GSTRING_LEN); */
1867 static struct ethtool_ops e1000_ethtool_ops = {
1868 .get_settings = e1000_get_settings,
1869 .set_settings = e1000_set_settings,
1870 .get_drvinfo = e1000_get_drvinfo,
1871 .get_regs_len = e1000_get_regs_len,
1872 .get_regs = e1000_get_regs,
1873 .get_wol = e1000_get_wol,
1874 .set_wol = e1000_set_wol,
1875 .get_msglevel = e1000_get_msglevel,
1876 .set_msglevel = e1000_set_msglevel,
1877 .nway_reset = e1000_nway_reset,
1878 .get_link = ethtool_op_get_link,
1879 .get_eeprom_len = e1000_get_eeprom_len,
1880 .get_eeprom = e1000_get_eeprom,
1881 .set_eeprom = e1000_set_eeprom,
1882 .get_ringparam = e1000_get_ringparam,
1883 .set_ringparam = e1000_set_ringparam,
1884 .get_pauseparam = e1000_get_pauseparam,
1885 .set_pauseparam = e1000_set_pauseparam,
1886 .get_rx_csum = e1000_get_rx_csum,
1887 .set_rx_csum = e1000_set_rx_csum,
1888 .get_tx_csum = e1000_get_tx_csum,
1889 .set_tx_csum = e1000_set_tx_csum,
1890 .get_sg = ethtool_op_get_sg,
1891 .set_sg = ethtool_op_set_sg,
1893 .get_tso = ethtool_op_get_tso,
1894 .set_tso = e1000_set_tso,
1896 .self_test_count = e1000_diag_test_count,
1897 .self_test = e1000_diag_test,
1898 .get_strings = e1000_get_strings,
1899 .phys_id = e1000_phys_id,
1900 .get_stats_count = e1000_get_stats_count,
1901 .get_ethtool_stats = e1000_get_ethtool_stats,
1902 .get_perm_addr = ethtool_op_get_perm_addr,
1905 void e1000_set_ethtool_ops(struct net_device *netdev)
1907 SET_ETHTOOL_OPS(netdev, &e1000_ethtool_ops);