2 * Platform CAN bus driver for Bosch C_CAN controller
4 * Copyright (C) 2010 ST Microelectronics
5 * Bhupesh Sharma <bhupesh.sharma@st.com>
7 * Borrowed heavily from the C_CAN driver originally written by:
9 * - Sascha Hauer, Marc Kleine-Budde, Pengutronix <s.hauer@pengutronix.de>
10 * - Simon Kallweit, intefo AG <simon.kallweit@intefo.ch>
12 * Bosch C_CAN controller is compliant to CAN protocol version 2.0 part A and B.
13 * Bosch C_CAN user manual can be obtained from:
14 * http://www.semiconductors.bosch.de/media/en/pdf/ipmodules_1/c_can/
15 * users_manual_c_can.pdf
17 * This file is licensed under the terms of the GNU General Public
18 * License version 2. This program is licensed "as is" without any
19 * warranty of any kind, whether express or implied.
22 #include <linux/kernel.h>
23 #include <linux/module.h>
24 #include <linux/interrupt.h>
25 #include <linux/delay.h>
26 #include <linux/netdevice.h>
27 #include <linux/if_arp.h>
28 #include <linux/if_ether.h>
29 #include <linux/list.h>
31 #include <linux/platform_device.h>
32 #include <linux/clk.h>
34 #include <linux/can/dev.h>
39 * 16-bit c_can registers can be arranged differently in the memory
40 * architecture of different implementations. For example: 16-bit
41 * registers can be aligned to a 16-bit boundary or 32-bit boundary etc.
42 * Handle the same by providing a common read/write interface.
44 static u16 c_can_plat_read_reg_aligned_to_16bit(struct c_can_priv *priv,
47 return readw(priv->base + priv->regs[index]);
50 static void c_can_plat_write_reg_aligned_to_16bit(struct c_can_priv *priv,
51 enum reg index, u16 val)
53 writew(val, priv->base + priv->regs[index]);
56 static u16 c_can_plat_read_reg_aligned_to_32bit(struct c_can_priv *priv,
59 return readw(priv->base + 2 * priv->regs[index]);
62 static void c_can_plat_write_reg_aligned_to_32bit(struct c_can_priv *priv,
63 enum reg index, u16 val)
65 writew(val, priv->base + 2 * priv->regs[index]);
68 static int __devinit c_can_plat_probe(struct platform_device *pdev)
72 struct net_device *dev;
73 struct c_can_priv *priv;
74 const struct platform_device_id *id;
77 #ifdef CONFIG_HAVE_CLK
80 /* get the appropriate clk */
81 clk = clk_get(&pdev->dev, NULL);
83 dev_err(&pdev->dev, "no clock defined\n");
89 /* get the platform data */
90 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
91 irq = platform_get_irq(pdev, 0);
92 if (!mem || irq <= 0) {
97 if (!request_mem_region(mem->start, resource_size(mem),
99 dev_err(&pdev->dev, "resource unavailable\n");
104 addr = ioremap(mem->start, resource_size(mem));
106 dev_err(&pdev->dev, "failed to map can port\n");
108 goto exit_release_mem;
111 /* allocate the c_can device */
112 dev = alloc_c_can_dev();
118 priv = netdev_priv(dev);
119 id = platform_get_device_id(pdev);
120 switch (id->driver_data) {
122 priv->regs = reg_map_c_can;
123 switch (mem->flags & IORESOURCE_MEM_TYPE_MASK) {
124 case IORESOURCE_MEM_32BIT:
125 priv->read_reg = c_can_plat_read_reg_aligned_to_32bit;
126 priv->write_reg = c_can_plat_write_reg_aligned_to_32bit;
128 case IORESOURCE_MEM_16BIT:
130 priv->read_reg = c_can_plat_read_reg_aligned_to_16bit;
131 priv->write_reg = c_can_plat_write_reg_aligned_to_16bit;
136 priv->regs = reg_map_d_can;
137 priv->can.ctrlmode_supported |= CAN_CTRLMODE_3_SAMPLES;
138 priv->read_reg = c_can_plat_read_reg_aligned_to_16bit;
139 priv->write_reg = c_can_plat_write_reg_aligned_to_16bit;
143 goto exit_free_device;
148 #ifdef CONFIG_HAVE_CLK
149 priv->can.clock.freq = clk_get_rate(clk);
153 platform_set_drvdata(pdev, dev);
154 SET_NETDEV_DEV(dev, &pdev->dev);
156 ret = register_c_can_dev(dev);
158 dev_err(&pdev->dev, "registering %s failed (err=%d)\n",
159 KBUILD_MODNAME, ret);
160 goto exit_free_device;
163 dev_info(&pdev->dev, "%s device registered (regs=%p, irq=%d)\n",
164 KBUILD_MODNAME, priv->base, dev->irq);
168 platform_set_drvdata(pdev, NULL);
173 release_mem_region(mem->start, resource_size(mem));
175 #ifdef CONFIG_HAVE_CLK
179 dev_err(&pdev->dev, "probe failed\n");
184 static int __devexit c_can_plat_remove(struct platform_device *pdev)
186 struct net_device *dev = platform_get_drvdata(pdev);
187 struct c_can_priv *priv = netdev_priv(dev);
188 struct resource *mem;
190 unregister_c_can_dev(dev);
191 platform_set_drvdata(pdev, NULL);
196 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
197 release_mem_region(mem->start, resource_size(mem));
199 #ifdef CONFIG_HAVE_CLK
206 static const struct platform_device_id c_can_id_table[] = {
208 .name = KBUILD_MODNAME,
209 .driver_data = C_CAN_DEVTYPE,
212 .driver_data = C_CAN_DEVTYPE,
215 .driver_data = D_CAN_DEVTYPE,
220 static struct platform_driver c_can_plat_driver = {
222 .name = KBUILD_MODNAME,
223 .owner = THIS_MODULE,
225 .probe = c_can_plat_probe,
226 .remove = __devexit_p(c_can_plat_remove),
227 .id_table = c_can_id_table,
230 module_platform_driver(c_can_plat_driver);
232 MODULE_AUTHOR("Bhupesh Sharma <bhupesh.sharma@st.com>");
233 MODULE_LICENSE("GPL v2");
234 MODULE_DESCRIPTION("Platform CAN bus driver for Bosch C_CAN controller");