Merge branch 'hwmon-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/groec...
[pandora-kernel.git] / drivers / net / bnx2x / bnx2x_dcb.h
1 /* bnx2x_dcb.h: Broadcom Everest network driver.
2  *
3  * Copyright 2009-2010 Broadcom Corporation
4  *
5  * Unless you and Broadcom execute a separate written software license
6  * agreement governing use of this software, this software is licensed to you
7  * under the terms of the GNU General Public License version 2, available
8  * at http://www.gnu.org/licenses/old-licenses/gpl-2.0.html (the "GPL").
9  *
10  * Notwithstanding the above, under no circumstances may you combine this
11  * software in any way with any other Broadcom software provided under a
12  * license other than the GPL, without Broadcom's express prior written
13  * consent.
14  *
15  * Maintained by: Eilon Greenstein <eilong@broadcom.com>
16  * Written by: Dmitry Kravkov
17  *
18  */
19 #ifndef BNX2X_DCB_H
20 #define BNX2X_DCB_H
21
22 #include "bnx2x_hsi.h"
23
24 #define LLFC_DRIVER_TRAFFIC_TYPE_MAX 3 /* NW, iSCSI, FCoE */
25 struct bnx2x_dcbx_app_params {
26         u32 enabled;
27         u32 traffic_type_priority[LLFC_DRIVER_TRAFFIC_TYPE_MAX];
28 };
29
30 #define E2_NUM_OF_COS                   2
31 #define BNX2X_DCBX_COS_NOT_STRICT       0
32 #define BNX2X_DCBX_COS_LOW_STRICT       1
33 #define BNX2X_DCBX_COS_HIGH_STRICT      2
34
35 struct bnx2x_dcbx_cos_params {
36         u32     bw_tbl;
37         u32     pri_bitmask;
38         u8      strict;
39         u8      pauseable;
40 };
41
42 struct bnx2x_dcbx_pg_params {
43         u32 enabled;
44         u8 num_of_cos; /* valid COS entries */
45         struct bnx2x_dcbx_cos_params    cos_params[E2_NUM_OF_COS];
46 };
47
48 struct bnx2x_dcbx_pfc_params {
49         u32 enabled;
50         u32 priority_non_pauseable_mask;
51 };
52
53 struct bnx2x_dcbx_port_params {
54         struct bnx2x_dcbx_pfc_params pfc;
55         struct bnx2x_dcbx_pg_params  ets;
56         struct bnx2x_dcbx_app_params app;
57 };
58
59 #define BNX2X_DCBX_CONFIG_INV_VALUE                     (0xFFFFFFFF)
60 #define BNX2X_DCBX_OVERWRITE_SETTINGS_DISABLE           0
61 #define BNX2X_DCBX_OVERWRITE_SETTINGS_ENABLE            1
62 #define BNX2X_DCBX_OVERWRITE_SETTINGS_INVALID   (BNX2X_DCBX_CONFIG_INV_VALUE)
63
64 /*******************************************************************************
65  * LLDP protocol configuration parameters.
66  ******************************************************************************/
67 struct bnx2x_config_lldp_params {
68         u32 overwrite_settings;
69         u32 msg_tx_hold;
70         u32 msg_fast_tx;
71         u32 tx_credit_max;
72         u32 msg_tx_interval;
73         u32 tx_fast;
74 };
75
76 struct bnx2x_admin_priority_app_table {
77                 u32 valid;
78                 u32 priority;
79 #define INVALID_TRAFFIC_TYPE_PRIORITY   (0xFFFFFFFF)
80                 u32 traffic_type;
81 #define TRAFFIC_TYPE_ETH                0
82 #define TRAFFIC_TYPE_PORT               1
83                 u32 app_id;
84 };
85
86 /*******************************************************************************
87  * DCBX protocol configuration parameters.
88  ******************************************************************************/
89 struct bnx2x_config_dcbx_params {
90         u32 overwrite_settings;
91         u32 admin_dcbx_version;
92         u32 admin_ets_enable;
93         u32 admin_pfc_enable;
94         u32 admin_tc_supported_tx_enable;
95         u32 admin_ets_configuration_tx_enable;
96         u32 admin_ets_recommendation_tx_enable;
97         u32 admin_pfc_tx_enable;
98         u32 admin_application_priority_tx_enable;
99         u32 admin_ets_willing;
100         u32 admin_ets_reco_valid;
101         u32 admin_pfc_willing;
102         u32 admin_app_priority_willing;
103         u32 admin_configuration_bw_precentage[8];
104         u32 admin_configuration_ets_pg[8];
105         u32 admin_recommendation_bw_precentage[8];
106         u32 admin_recommendation_ets_pg[8];
107         u32 admin_pfc_bitmap;
108         struct bnx2x_admin_priority_app_table admin_priority_app_table[4];
109         u32 admin_default_priority;
110 };
111
112 #define GET_FLAGS(flags, bits)          ((flags) & (bits))
113 #define SET_FLAGS(flags, bits)          ((flags) |= (bits))
114 #define RESET_FLAGS(flags, bits)        ((flags) &= ~(bits))
115
116 enum {
117         DCBX_READ_LOCAL_MIB,
118         DCBX_READ_REMOTE_MIB
119 };
120
121 #define ETH_TYPE_FCOE           (0x8906)
122 #define TCP_PORT_ISCSI          (0xCBC)
123
124 #define PFC_VALUE_FRAME_SIZE                            (512)
125 #define PFC_QUANTA_IN_NANOSEC_FROM_SPEED_MEGA(mega_speed)  \
126                                 ((1000 * PFC_VALUE_FRAME_SIZE)/(mega_speed))
127
128 #define PFC_BRB1_REG_HIGH_LLFC_LOW_THRESHOLD                    130
129 #define PFC_BRB1_REG_HIGH_LLFC_HIGH_THRESHOLD                   170
130
131
132
133 struct cos_entry_help_data {
134         u32                     pri_join_mask;
135         u32                     cos_bw;
136         u8                      strict;
137         bool                    pausable;
138 };
139
140 struct cos_help_data {
141         struct cos_entry_help_data      data[E2_NUM_OF_COS];
142         u8                              num_of_cos;
143 };
144
145 #define DCBX_ILLEGAL_PG                         (0xFF)
146 #define DCBX_PFC_PRI_MASK                       (0xFF)
147 #define DCBX_STRICT_PRIORITY                    (15)
148 #define DCBX_INVALID_COS_BW                     (0xFFFFFFFF)
149 #define DCBX_PFC_PRI_NON_PAUSE_MASK(bp)         \
150                         ((bp)->dcbx_port_params.pfc.priority_non_pauseable_mask)
151 #define DCBX_PFC_PRI_PAUSE_MASK(bp)             \
152                                         ((u8)~DCBX_PFC_PRI_NON_PAUSE_MASK(bp))
153 #define DCBX_PFC_PRI_GET_PAUSE(bp, pg_pri)      \
154                                 ((pg_pri) & (DCBX_PFC_PRI_PAUSE_MASK(bp)))
155 #define DCBX_PFC_PRI_GET_NON_PAUSE(bp, pg_pri)  \
156                         (DCBX_PFC_PRI_NON_PAUSE_MASK(bp) & (pg_pri))
157 #define IS_DCBX_PFC_PRI_ONLY_PAUSE(bp, pg_pri)  \
158                         (pg_pri == DCBX_PFC_PRI_GET_PAUSE((bp), (pg_pri)))
159 #define IS_DCBX_PFC_PRI_ONLY_NON_PAUSE(bp, pg_pri)\
160                         ((pg_pri) == DCBX_PFC_PRI_GET_NON_PAUSE((bp), (pg_pri)))
161 #define IS_DCBX_PFC_PRI_MIX_PAUSE(bp, pg_pri)   \
162                         (!(IS_DCBX_PFC_PRI_ONLY_NON_PAUSE((bp), (pg_pri)) || \
163                          IS_DCBX_PFC_PRI_ONLY_PAUSE((bp), (pg_pri))))
164
165
166 struct pg_entry_help_data {
167         u8      num_of_dif_pri;
168         u8      pg;
169         u32     pg_priority;
170 };
171
172 struct pg_help_data {
173         struct pg_entry_help_data       data[LLFC_DRIVER_TRAFFIC_TYPE_MAX];
174         u8                              num_of_pg;
175 };
176
177 /* forward DCB/PFC related declarations */
178 struct bnx2x;
179 void bnx2x_dcb_init_intmem_pfc(struct bnx2x *bp);
180 void bnx2x_dcbx_update(struct work_struct *work);
181 void bnx2x_dcbx_init_params(struct bnx2x *bp);
182 void bnx2x_dcbx_set_state(struct bnx2x *bp, bool dcb_on, u32 dcbx_enabled);
183
184 enum {
185         BNX2X_DCBX_STATE_NEG_RECEIVED = 0x1,
186         BNX2X_DCBX_STATE_TX_PAUSED = 0x2,
187         BNX2X_DCBX_STATE_TX_RELEASED = 0x4
188 };
189 void bnx2x_dcbx_set_params(struct bnx2x *bp, u32 state);
190
191 /* DCB netlink */
192 #ifdef BCM_DCBNL
193 extern const struct dcbnl_rtnl_ops bnx2x_dcbnl_ops;
194 int bnx2x_dcbnl_update_applist(struct bnx2x *bp, bool delall);
195 #endif /* BCM_DCBNL */
196
197 #endif /* BNX2X_DCB_H */