2 * Linux network driver for Brocade Converged Network Adapter.
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License (GPL) Version 2 as
6 * published by the Free Software Foundation
8 * This program is distributed in the hope that it will be useful, but
9 * WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
11 * General Public License for more details.
14 * Copyright (c) 2005-2010 Brocade Communications Systems, Inc.
18 #ifndef __BNA_TYPES_H__
19 #define __BNA_TYPES_H__
27 * Forward declarations
43 * Enums, primitive data types
48 BNA_STATUS_T_DISABLED = 0,
49 BNA_STATUS_T_ENABLED = 1
52 enum bna_cleanup_type {
62 BNA_CB_INVALID_MAC = 4,
63 BNA_CB_MCAST_LIST_FULL = 5,
64 BNA_CB_UCAST_CAM_FULL = 6,
84 enum bna_res_req_type {
85 BNA_RES_MEM_T_COM = 0,
86 BNA_RES_MEM_T_ATTR = 1,
87 BNA_RES_MEM_T_FWTRC = 2,
88 BNA_RES_MEM_T_STATS = 3,
89 BNA_RES_MEM_T_SWSTATS = 4,
90 BNA_RES_MEM_T_IBIDX = 5,
91 BNA_RES_MEM_T_IB_ARRAY = 6,
92 BNA_RES_MEM_T_INTR_ARRAY = 7,
93 BNA_RES_MEM_T_IDXSEG_ARRAY = 8,
94 BNA_RES_MEM_T_TX_ARRAY = 9,
95 BNA_RES_MEM_T_TXQ_ARRAY = 10,
96 BNA_RES_MEM_T_RX_ARRAY = 11,
97 BNA_RES_MEM_T_RXP_ARRAY = 12,
98 BNA_RES_MEM_T_RXQ_ARRAY = 13,
99 BNA_RES_MEM_T_UCMAC_ARRAY = 14,
100 BNA_RES_MEM_T_MCMAC_ARRAY = 15,
101 BNA_RES_MEM_T_RIT_ENTRY = 16,
102 BNA_RES_MEM_T_RIT_SEGMENT = 17,
103 BNA_RES_INTR_T_MBOX = 18,
107 enum bna_tx_res_req_type {
108 BNA_TX_RES_MEM_T_TCB = 0,
109 BNA_TX_RES_MEM_T_UNMAPQ = 1,
110 BNA_TX_RES_MEM_T_QPT = 2,
111 BNA_TX_RES_MEM_T_SWQPT = 3,
112 BNA_TX_RES_MEM_T_PAGE = 4,
113 BNA_TX_RES_INTR_T_TXCMPL = 5,
117 enum bna_rx_mem_type {
118 BNA_RX_RES_MEM_T_CCB = 0, /* CQ context */
119 BNA_RX_RES_MEM_T_RCB = 1, /* CQ context */
120 BNA_RX_RES_MEM_T_UNMAPQ = 2, /* UnmapQ for RxQs */
121 BNA_RX_RES_MEM_T_CQPT = 3, /* CQ QPT */
122 BNA_RX_RES_MEM_T_CSWQPT = 4, /* S/W QPT */
123 BNA_RX_RES_MEM_T_CQPT_PAGE = 5, /* CQPT page */
124 BNA_RX_RES_MEM_T_HQPT = 6, /* RX QPT */
125 BNA_RX_RES_MEM_T_DQPT = 7, /* RX QPT */
126 BNA_RX_RES_MEM_T_HSWQPT = 8, /* RX s/w QPT */
127 BNA_RX_RES_MEM_T_DSWQPT = 9, /* RX s/w QPT */
128 BNA_RX_RES_MEM_T_DPAGE = 10, /* RX s/w QPT */
129 BNA_RX_RES_MEM_T_HPAGE = 11, /* RX s/w QPT */
130 BNA_RX_RES_T_INTR = 12, /* Rx interrupts */
131 BNA_RX_RES_T_MAX = 13
134 enum bna_mbox_state {
140 BNA_TX_T_REGULAR = 0,
141 BNA_TX_T_LOOPBACK = 1,
145 BNA_TX_F_PORT_STARTED = 1,
146 BNA_TX_F_ENABLED = 2,
147 BNA_TX_F_PRIO_LOCK = 4,
150 enum bna_tx_mod_flags {
151 BNA_TX_MOD_F_PORT_STARTED = 1,
152 BNA_TX_MOD_F_PORT_LOOPBACK = 2,
156 BNA_RX_T_REGULAR = 0,
157 BNA_RX_T_LOOPBACK = 1,
167 BNA_RXMODE_PROMISC = 1,
168 BNA_RXMODE_ALLMULTI = 2
175 RX_E_RXF_STARTED = 4,
176 RX_E_RXF_STOPPED = 5,
177 RX_E_RXQ_STOPPED = 6,
182 BNA_RX_RXF_START_WAIT = 2,
184 BNA_RX_RXF_STOP_WAIT = 4,
185 BNA_RX_RXQ_STOP_WAIT = 5,
189 BNA_RX_F_ENABLE = 0x01, /* bnad enabled rxf */
190 BNA_RX_F_PORT_ENABLED = 0x02, /* Port object is enabled */
191 BNA_RX_F_PORT_FAILED = 0x04, /* Port in failed state */
194 enum bna_rx_mod_flags {
195 BNA_RX_MOD_F_PORT_STARTED = 1,
196 BNA_RX_MOD_F_PORT_LOOPBACK = 2,
199 enum bna_rxf_oper_state {
200 BNA_RXF_OPER_STATE_RUNNING = 0x01, /* rxf operational */
201 BNA_RXF_OPER_STATE_PAUSED = 0x02, /* rxf in PAUSED state */
205 BNA_RXF_FL_STOP_PENDING = 0x01,
206 BNA_RXF_FL_FAILED = 0x02,
207 BNA_RXF_FL_RSS_CONFIG_PENDING = 0x04,
208 BNA_RXF_FL_OPERSTATE_CHANGED = 0x08,
209 BNA_RXF_FL_RXF_ENABLED = 0x10,
210 BNA_RXF_FL_VLAN_CONFIG_PENDING = 0x20,
217 RXF_E_CAM_FLTR_MOD = 4,
220 RXF_E_CAM_FLTR_RESP = 7,
223 RXF_E_STAT_CLEARED = 10,
228 BNA_RXF_START_WAIT = 2,
229 BNA_RXF_CAM_FLTR_MOD_WAIT = 3,
231 BNA_RXF_CAM_FLTR_CLR_WAIT = 5,
232 BNA_RXF_STOP_WAIT = 6,
233 BNA_RXF_PAUSE_WAIT = 7,
234 BNA_RXF_RESUME_WAIT = 8,
235 BNA_RXF_STAT_CLR_WAIT = 9,
239 BNA_PORT_T_REGULAR = 0,
240 BNA_PORT_T_LOOPBACK_INTERNAL = 1,
241 BNA_PORT_T_LOOPBACK_EXTERNAL = 2,
244 enum bna_link_status {
250 enum bna_llport_flags {
251 BNA_LLPORT_F_ADMIN_UP = 1,
252 BNA_LLPORT_F_PORT_ENABLED = 2,
253 BNA_LLPORT_F_RX_STARTED = 4
256 enum bna_port_flags {
257 BNA_PORT_F_DEVICE_READY = 1,
258 BNA_PORT_F_ENABLED = 2,
259 BNA_PORT_F_PAUSE_CHANGED = 4,
260 BNA_PORT_F_MTU_CHANGED = 8
264 BNA_PKT_RATE_10K = 10000,
265 BNA_PKT_RATE_20K = 20000,
266 BNA_PKT_RATE_30K = 30000,
267 BNA_PKT_RATE_40K = 40000,
268 BNA_PKT_RATE_50K = 50000,
269 BNA_PKT_RATE_60K = 60000,
270 BNA_PKT_RATE_70K = 70000,
271 BNA_PKT_RATE_80K = 80000,
274 enum bna_dim_load_types {
275 BNA_LOAD_T_HIGH_4 = 0, /* 80K <= r */
276 BNA_LOAD_T_HIGH_3 = 1, /* 60K <= r < 80K */
277 BNA_LOAD_T_HIGH_2 = 2, /* 50K <= r < 60K */
278 BNA_LOAD_T_HIGH_1 = 3, /* 40K <= r < 50K */
279 BNA_LOAD_T_LOW_1 = 4, /* 30K <= r < 40K */
280 BNA_LOAD_T_LOW_2 = 5, /* 20K <= r < 30K */
281 BNA_LOAD_T_LOW_3 = 6, /* 10K <= r < 20K */
282 BNA_LOAD_T_LOW_4 = 7, /* r < 10K */
286 enum bna_dim_bias_types {
287 BNA_BIAS_T_SMALL = 0, /* small pkts > (large pkts * 2) */
288 BNA_BIAS_T_LARGE = 1, /* Not BNA_BIAS_T_SMALL */
293 /* This should be the first one */
298 struct bna_mem_descr {
301 struct bna_dma_addr dma;
304 struct bna_mem_info {
305 enum bna_mem_type mem_type;
308 u32 align_sz; /* 0/1 = no alignment */
309 struct bna_mem_descr *mdl;
310 void *cookie; /* For bnad to unmap dma later */
313 struct bna_intr_descr {
317 struct bna_intr_info {
318 enum bna_intr_type intr_type;
320 struct bna_intr_descr *idl;
324 struct bna_mem_info mem_info;
325 struct bna_intr_info intr_info;
328 struct bna_res_info {
329 enum bna_res_type res_type;
330 union bna_res_u res_u;
335 struct bna_dma_addr hw_qpt_ptr;
351 enum bna_intr_type intr_type;
354 void (*ready_cbfn)(struct bnad *bnad, enum bna_cb_status status);
355 struct bnad *ready_cbarg;
357 void (*stop_cbfn)(struct bnad *bnad, enum bna_cb_status status);
358 struct bnad *stop_cbarg;
370 /* This should be the first one */
373 struct bfa_mbox_cmd cmd;
375 /* Callback for port, tx, rx, rxf */
376 void (*cbfn)(void *arg, int status);
380 struct bna_mbox_mod {
381 enum bna_mbox_state state;
382 struct list_head posted_q;
394 /* Pause configuration */
395 struct bna_pause_config {
396 enum bna_status tx_pause;
397 enum bna_status rx_pause;
402 enum bna_llport_flags flags;
404 enum bna_port_type type;
406 enum bna_link_status link_status;
408 int rx_started_count;
410 void (*stop_cbfn)(struct bna_port *, enum bna_cb_status);
412 struct bna_mbox_qe mbox_qe;
419 enum bna_port_flags flags;
421 enum bna_port_type type;
423 struct bna_llport llport;
425 struct bna_pause_config pause_config;
429 /* Callback for bna_port_disable(), port_stop() */
430 void (*stop_cbfn)(void *, enum bna_cb_status);
433 /* Callback for bna_port_pause_config() */
434 void (*pause_cbfn)(struct bnad *, enum bna_cb_status);
436 /* Callback for bna_port_mtu_set() */
437 void (*mtu_cbfn)(struct bnad *, enum bna_cb_status);
439 void (*link_cbfn)(struct bnad *, enum bna_link_status);
441 struct bfa_wc chld_stop_wc;
443 struct bna_mbox_qe mbox_qe;
454 /* IB index segment structure */
455 struct bna_ibidx_seg {
456 /* This should be the first one */
460 u8 ib_idx_tbl_offset;
463 /* Interrupt structure */
465 /* This should be the first one */
469 enum bna_intr_type intr_type;
475 /* Doorbell structure */
476 struct bna_ib_dbell {
477 void *__iomem doorbell_addr;
481 /* Interrupt timer configuration */
482 struct bna_ib_config {
483 u8 coalescing_timeo; /* Unit is 5usec. */
488 enum ib_flags ctrl_flags;
493 /* This should be the first one */
501 struct bna_dma_addr ib_seg_host_addr;
502 void *ib_seg_host_addr_kva;
503 u32 idx_mask; /* Size >= BNA_IBIDX_MAX_SEGSIZE */
505 struct bna_ibidx_seg *idx_seg;
507 struct bna_ib_dbell door_bell;
509 struct bna_intr *intr;
511 struct bna_ib_config ib_config;
516 /* IB module - keeps track of IBs and interrupts */
518 struct bna_ib *ib; /* BFI_MAX_IB entries */
519 struct bna_intr *intr; /* BFI_MAX_IB entries */
520 struct bna_ibidx_seg *idx_seg; /* BNA_IBIDX_TOTAL_SEGS */
522 struct list_head ib_free_q;
524 struct list_head ibidx_seg_pool[BFI_IBIDX_TOTAL_POOLS];
526 struct list_head intr_free_q;
527 struct list_head intr_active_q;
538 /* Tx datapath control structure */
539 #define BNA_Q_NAME_SIZE 16
546 volatile u32 *hw_consumer_index;
548 void *__iomem q_dbell;
549 struct bna_ib_dbell *i_dbell;
555 enum bna_intr_type intr_type;
557 u8 priority; /* Current priority */
558 unsigned long flags; /* Used by bnad as required */
560 char name[BNA_Q_NAME_SIZE];
563 /* TxQ QPT and configuration */
565 /* This should be the first one */
583 /* TxF structure (hardware Tx Function) */
586 enum txf_flags ctrl_flags;
592 /* This should be the first one */
596 enum bna_tx_flags flags;
598 enum bna_tx_type type;
600 struct list_head txq_q;
603 /* Tx event handlers */
604 void (*tcb_setup_cbfn)(struct bnad *, struct bna_tcb *);
605 void (*tcb_destroy_cbfn)(struct bnad *, struct bna_tcb *);
606 void (*tx_stall_cbfn)(struct bnad *, struct bna_tcb *);
607 void (*tx_resume_cbfn)(struct bnad *, struct bna_tcb *);
608 void (*tx_cleanup_cbfn)(struct bnad *, struct bna_tcb *);
610 /* callback for bna_tx_disable(), bna_tx_stop() */
611 void (*stop_cbfn)(void *arg, struct bna_tx *tx,
612 enum bna_cb_status status);
615 /* callback for bna_tx_prio_set() */
616 void (*prio_change_cbfn)(struct bnad *bnad, struct bna_tx *tx,
617 enum bna_cb_status status);
619 struct bfa_wc txq_stop_wc;
621 struct bna_mbox_qe mbox_qe;
624 void *priv; /* bnad's cookie */
627 struct bna_tx_config {
630 enum bna_tx_type tx_type;
633 struct bna_tx_event_cbfn {
635 void (*tcb_setup_cbfn)(struct bnad *, struct bna_tcb *);
636 void (*tcb_destroy_cbfn)(struct bnad *, struct bna_tcb *);
638 void (*tx_stall_cbfn)(struct bnad *, struct bna_tcb *);
639 void (*tx_resume_cbfn)(struct bnad *, struct bna_tcb *);
640 void (*tx_cleanup_cbfn)(struct bnad *, struct bna_tcb *);
643 /* Tx module - keeps track of free, active tx objects */
645 struct bna_tx *tx; /* BFI_MAX_TXQ entries */
646 struct bna_txq *txq; /* BFI_MAX_TXQ entries */
648 struct list_head tx_free_q;
649 struct list_head tx_active_q;
651 struct list_head txq_free_q;
653 /* callback for bna_tx_mod_stop() */
654 void (*stop_cbfn)(struct bna_port *port,
655 enum bna_cb_status status);
657 struct bfa_wc tx_stop_wc;
659 enum bna_tx_mod_flags flags;
671 * Receive Indirection Table
675 /* One row of RIT table */
676 struct bna_rit_entry {
677 u8 large_rxq_id; /* used for either large or data buffers */
678 u8 small_rxq_id; /* used for either small or header buffers */
682 struct bna_rit_segment {
688 * max_rit_size: Varies per RIT segment depending on how RIT is
693 struct bna_rit_entry *rit;
697 struct bna_rit_entry *rit;
698 struct bna_rit_segment *rit_segment;
700 struct list_head rit_seg_pool[BFI_RIT_SEG_TOTAL_POOLS];
709 /* Rx datapath control structure */
717 void *__iomem q_dbell;
728 /* RxQ structure - QPT, configuration */
744 u64 rx_packets_with_error;
745 u64 rxbuf_alloc_failed;
752 struct bna_rxq *data;
755 struct bna_rxq *small;
756 struct bna_rxq *large;
759 struct bna_rxq *only;
760 struct bna_rxq *reserved;
764 /* Packet rate for Dynamic Interrupt Moderation */
765 struct bna_pkt_rate {
770 /* Completion control structure */
775 volatile u32 *hw_producer_index;
777 struct bna_ib_dbell *i_dbell;
778 struct bna_rcb *rcb[2];
779 void *ctrl; /* For bnad */
780 struct bna_pkt_rate pkt_rate;
787 enum bna_intr_type intr_type;
789 u8 rx_coalescing_timeo; /* For NAPI */
791 char name[BNA_Q_NAME_SIZE];
794 /* CQ QPT, configuration */
807 struct bna_rss_config {
808 enum rss_hash_type hash_type;
810 u32 toeplitz_hash_key[BFI_RSS_HASH_KEY_LEN];
813 struct bna_hds_config {
814 enum hds_header_type hdr_type;
818 /* This structure is used during RX creation */
819 struct bna_rx_config {
820 enum bna_rx_type rx_type;
822 enum bna_rxp_type rxp_type;
826 * Small/Large (or Header/Data) buffer size to be configured
827 * for SLR and HDS queue type. Large buffer size comes from
832 enum bna_status rss_status;
833 struct bna_rss_config rss_config;
835 enum bna_status hds_status;
836 struct bna_hds_config hds_config;
838 enum bna_status vlan_strip_status;
841 /* Rx Path structure - one per MSIX vector/CPU */
843 /* This should be the first one */
846 enum bna_rxp_type type;
852 /* MSI-x vector number for configuring RSS */
855 struct bna_mbox_qe mbox_qe;
858 /* HDS configuration structure */
860 enum hds_header_type hdr_type;
864 /* RSS configuration structure */
866 enum rss_hash_type hash_type;
868 u32 toeplitz_hash_key[BFI_RSS_HASH_KEY_LEN];
871 /* RxF structure (hardware Rx Function) */
875 enum rxf_flags ctrl_flags;
876 u16 default_vlan_tag;
877 enum bna_rxf_oper_state rxf_oper_state;
878 enum bna_status hds_status;
879 struct bna_rxf_hds hds_cfg;
880 enum bna_status rss_status;
881 struct bna_rxf_rss rss_cfg;
882 struct bna_rit_segment *rit_segment;
885 struct bna_mbox_qe mbox_qe;
888 /* callback for bna_rxf_start() */
889 void (*start_cbfn) (struct bna_rx *rx, enum bna_cb_status status);
890 struct bna_rx *start_cbarg;
892 /* callback for bna_rxf_stop() */
893 void (*stop_cbfn) (struct bna_rx *rx, enum bna_cb_status status);
894 struct bna_rx *stop_cbarg;
896 /* callback for bna_rxf_receive_enable() / bna_rxf_receive_disable() */
897 void (*oper_state_cbfn) (struct bnad *bnad, struct bna_rx *rx,
898 enum bna_cb_status status);
899 struct bnad *oper_state_cbarg;
903 * bna_rxf_ucast_set()
904 * bna_rxf_{ucast/mcast}_add(),
905 * bna_rxf_{ucast/mcast}_del(),
908 void (*cam_fltr_cbfn)(struct bnad *bnad, struct bna_rx *rx,
909 enum bna_cb_status status);
910 struct bnad *cam_fltr_cbarg;
912 enum bna_rxf_flags rxf_flags;
914 /* List of unicast addresses yet to be applied to h/w */
915 struct list_head ucast_pending_add_q;
916 struct list_head ucast_pending_del_q;
917 int ucast_pending_set;
918 /* ucast addresses applied to the h/w */
919 struct list_head ucast_active_q;
920 struct bna_mac *ucast_active_mac;
922 /* List of multicast addresses yet to be applied to h/w */
923 struct list_head mcast_pending_add_q;
924 struct list_head mcast_pending_del_q;
925 /* multicast addresses applied to the h/w */
926 struct list_head mcast_active_q;
928 /* Rx modes yet to be applied to h/w */
929 enum bna_rxmode rxmode_pending;
930 enum bna_rxmode rxmode_pending_bitmask;
931 /* Rx modes applied to h/w */
932 enum bna_rxmode rxmode_active;
934 enum bna_status vlan_filter_status;
935 u32 vlan_filter_table[(BFI_MAX_VLAN + 1) / 32];
940 /* This should be the first one */
945 enum bna_rx_type type;
947 /* list-head for RX path objects */
948 struct list_head rxp_q;
952 enum bna_rx_flags rx_flags;
954 struct bna_mbox_qe mbox_qe;
956 struct bfa_wc rxq_stop_wc;
958 /* Rx event handlers */
959 void (*rcb_setup_cbfn)(struct bnad *, struct bna_rcb *);
960 void (*rcb_destroy_cbfn)(struct bnad *, struct bna_rcb *);
961 void (*ccb_setup_cbfn)(struct bnad *, struct bna_ccb *);
962 void (*ccb_destroy_cbfn)(struct bnad *, struct bna_ccb *);
963 void (*rx_cleanup_cbfn)(struct bnad *, struct bna_ccb *);
964 void (*rx_post_cbfn)(struct bnad *, struct bna_rcb *);
966 /* callback for bna_rx_disable(), bna_rx_stop() */
967 void (*stop_cbfn)(void *arg, struct bna_rx *rx,
968 enum bna_cb_status status);
972 void *priv; /* bnad's cookie */
975 struct bna_rx_event_cbfn {
977 void (*rcb_setup_cbfn)(struct bnad *, struct bna_rcb *);
978 void (*rcb_destroy_cbfn)(struct bnad *, struct bna_rcb *);
979 void (*ccb_setup_cbfn)(struct bnad *, struct bna_ccb *);
980 void (*ccb_destroy_cbfn)(struct bnad *, struct bna_ccb *);
982 void (*rx_cleanup_cbfn)(struct bnad *, struct bna_ccb *);
983 void (*rx_post_cbfn)(struct bnad *, struct bna_rcb *);
986 /* Rx module - keeps track of free, active rx objects */
988 struct bna *bna; /* back pointer to parent */
989 struct bna_rx *rx; /* BFI_MAX_RXQ entries */
990 struct bna_rxp *rxp; /* BFI_MAX_RXQ entries */
991 struct bna_rxq *rxq; /* BFI_MAX_RXQ entries */
993 struct list_head rx_free_q;
994 struct list_head rx_active_q;
997 struct list_head rxp_free_q;
1000 struct list_head rxq_free_q;
1003 enum bna_rx_mod_flags flags;
1005 /* callback for bna_rx_mod_stop() */
1006 void (*stop_cbfn)(struct bna_port *port,
1007 enum bna_cb_status status);
1009 struct bfa_wc rx_stop_wc;
1010 u32 dim_vector[BNA_LOAD_T_MAX][BNA_BIAS_T_MAX];
1020 struct bna_ucam_mod {
1021 struct bna_mac *ucmac; /* BFI_MAX_UCMAC entries */
1022 struct list_head free_q;
1027 struct bna_mcam_mod {
1028 struct bna_mac *mcmac; /* BFI_MAX_MCMAC entries */
1029 struct list_head free_q;
1040 struct bna_tx_stats {
1048 struct bna_rx_stats {
1058 int num_active_ucast;
1059 int num_active_mcast;
1061 int vlan_filter_status;
1062 u32 vlan_filter_table[(BFI_MAX_VLAN + 1) / 32];
1067 struct bna_sw_stats {
1075 struct bna_tx_stats tx_stats[BFI_MAX_TXQ];
1076 struct bna_rx_stats rx_stats[BFI_MAX_RXQ];
1082 struct bfi_ll_stats *hw_stats;
1083 struct bna_sw_stats *sw_stats;
1093 struct bfa_pcidev pcidev;
1097 struct bna_chip_regs regs;
1099 struct bna_dma_addr hw_stats_dma;
1100 struct bna_stats stats;
1102 struct bna_device device;
1105 struct bna_mbox_mod mbox_mod;
1107 struct bna_port port;
1109 struct bna_tx_mod tx_mod;
1111 struct bna_rx_mod rx_mod;
1113 struct bna_ib_mod ib_mod;
1115 struct bna_ucam_mod ucam_mod;
1116 struct bna_mcam_mod mcam_mod;
1118 struct bna_rit_mod rit_mod;
1122 struct bna_mbox_qe mbox_qe;
1127 #endif /* __BNA_TYPES_H__ */