drivers/net/benet/be_cmds.h

   1 /*
   2  * Copyright (C) 2005 - 2010 ServerEngines
   3  * All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or
   6  * modify it under the terms of the GNU General Public License version 2
   7  * as published by the Free Software Foundation.  The full GNU General
   8  * Public License is included in this distribution in the file called COPYING.
   9  *
  10  * Contact Information:
  11  * linux-drivers@serverengines.com
  12  *
  13  * ServerEngines
  14  * 209 N. Fair Oaks Ave
  15  * Sunnyvale, CA 94085
  16  */
  17
  18 /*
  19  * The driver sends configuration and managements command requests to the
  20  * firmware in the BE. These requests are communicated to the processor
  21  * using Work Request Blocks (WRBs) submitted to the MCC-WRB ring or via one
  22  * WRB inside a MAILBOX.
  23  * The commands are serviced by the ARM processor in the BladeEngine's MPU.
  24  */
  25
  26 struct be_sge {
  27         u32 pa_lo;
  28         u32 pa_hi;
  29         u32 len;
  30 };
  31
  32 #define MCC_WRB_EMBEDDED_MASK   1       /* bit 0 of dword 0*/
  33 #define MCC_WRB_SGE_CNT_SHIFT   3       /* bits 3 - 7 of dword 0 */
  34 #define MCC_WRB_SGE_CNT_MASK    0x1F    /* bits 3 - 7 of dword 0 */
  35 struct be_mcc_wrb {
  36         u32 embedded;           /* dword 0 */
  37         u32 payload_length;     /* dword 1 */
  38         u32 tag0;               /* dword 2 */
  39         u32 tag1;               /* dword 3 */
  40         u32 rsvd;               /* dword 4 */
  41         union {
  42                 u8 embedded_payload[236]; /* used by embedded cmds */
  43                 struct be_sge sgl[19];    /* used by non-embedded cmds */
  44         } payload;
  45 };
  46
  47 #define CQE_FLAGS_VALID_MASK            (1 << 31)
  48 #define CQE_FLAGS_ASYNC_MASK            (1 << 30)
  49 #define CQE_FLAGS_COMPLETED_MASK        (1 << 28)
  50 #define CQE_FLAGS_CONSUMED_MASK         (1 << 27)
  51
  52 /* Completion Status */
  53 enum {
  54         MCC_STATUS_SUCCESS = 0x0,
  55 /* The client does not have sufficient privileges to execute the command */
  56         MCC_STATUS_INSUFFICIENT_PRIVILEGES = 0x1,
  57 /* A parameter in the command was invalid. */
  58         MCC_STATUS_INVALID_PARAMETER = 0x2,
  59 /* There are insufficient chip resources to execute the command */
  60         MCC_STATUS_INSUFFICIENT_RESOURCES = 0x3,
  61 /* The command is completing because the queue was getting flushed */
  62         MCC_STATUS_QUEUE_FLUSHING = 0x4,
  63 /* The command is completing with a DMA error */
  64         MCC_STATUS_DMA_FAILED = 0x5,
  65         MCC_STATUS_NOT_SUPPORTED = 66
  66 };
  67
  68 #define CQE_STATUS_COMPL_MASK           0xFFFF
  69 #define CQE_STATUS_COMPL_SHIFT          0       /* bits 0 - 15 */
  70 #define CQE_STATUS_EXTD_MASK            0xFFFF
  71 #define CQE_STATUS_EXTD_SHIFT           16      /* bits 16 - 31 */
  72
  73 struct be_mcc_compl {
  74         u32 status;             /* dword 0 */
  75         u32 tag0;               /* dword 1 */
  76         u32 tag1;               /* dword 2 */
  77         u32 flags;              /* dword 3 */
  78 };
  79
  80 /* When the async bit of mcc_compl is set, the last 4 bytes of
  81  * mcc_compl is interpreted as follows:
  82  */
  83 #define ASYNC_TRAILER_EVENT_CODE_SHIFT  8       /* bits 8 - 15 */
  84 #define ASYNC_TRAILER_EVENT_CODE_MASK   0xFF
  85 #define ASYNC_EVENT_CODE_LINK_STATE     0x1
  86 struct be_async_event_trailer {
  87         u32 code;
  88 };
  89
  90 enum {
  91         ASYNC_EVENT_LINK_DOWN   = 0x0,
  92         ASYNC_EVENT_LINK_UP     = 0x1
  93 };
  94
  95 /* When the event code of an async trailer is link-state, the mcc_compl
  96  * must be interpreted as follows
  97  */
  98 struct be_async_event_link_state {
  99         u8 physical_port;
 100         u8 port_link_status;
 101         u8 port_duplex;
 102         u8 port_speed;
 103         u8 port_fault;
 104         u8 rsvd0[7];
 105         struct be_async_event_trailer trailer;
 106 } __packed;
 107
 108 struct be_mcc_mailbox {
 109         struct be_mcc_wrb wrb;
 110         struct be_mcc_compl compl;
 111 };
 112
 113 #define CMD_SUBSYSTEM_COMMON    0x1
 114 #define CMD_SUBSYSTEM_ETH       0x3
 115 #define CMD_SUBSYSTEM_LOWLEVEL  0xb
 116
 117 #define OPCODE_COMMON_NTWK_MAC_QUERY                    1
 118 #define OPCODE_COMMON_NTWK_MAC_SET                      2
 119 #define OPCODE_COMMON_NTWK_MULTICAST_SET                3
 120 #define OPCODE_COMMON_NTWK_VLAN_CONFIG                  4
 121 #define OPCODE_COMMON_NTWK_LINK_STATUS_QUERY            5
 122 #define OPCODE_COMMON_READ_FLASHROM                     6
 123 #define OPCODE_COMMON_WRITE_FLASHROM                    7
 124 #define OPCODE_COMMON_CQ_CREATE                         12
 125 #define OPCODE_COMMON_EQ_CREATE                         13
 126 #define OPCODE_COMMON_MCC_CREATE                        21
 127 #define OPCODE_COMMON_SET_QOS                           28
 128 #define OPCODE_COMMON_SEEPROM_READ                      30
 129 #define OPCODE_COMMON_NTWK_RX_FILTER                    34
 130 #define OPCODE_COMMON_GET_FW_VERSION                    35
 131 #define OPCODE_COMMON_SET_FLOW_CONTROL                  36
 132 #define OPCODE_COMMON_GET_FLOW_CONTROL                  37
 133 #define OPCODE_COMMON_SET_FRAME_SIZE                    39
 134 #define OPCODE_COMMON_MODIFY_EQ_DELAY                   41
 135 #define OPCODE_COMMON_FIRMWARE_CONFIG                   42
 136 #define OPCODE_COMMON_NTWK_INTERFACE_CREATE             50
 137 #define OPCODE_COMMON_NTWK_INTERFACE_DESTROY            51
 138 #define OPCODE_COMMON_MCC_DESTROY                       53
 139 #define OPCODE_COMMON_CQ_DESTROY                        54
 140 #define OPCODE_COMMON_EQ_DESTROY                        55
 141 #define OPCODE_COMMON_QUERY_FIRMWARE_CONFIG             58
 142 #define OPCODE_COMMON_NTWK_PMAC_ADD                     59
 143 #define OPCODE_COMMON_NTWK_PMAC_DEL                     60
 144 #define OPCODE_COMMON_FUNCTION_RESET                    61
 145 #define OPCODE_COMMON_ENABLE_DISABLE_BEACON             69
 146 #define OPCODE_COMMON_GET_BEACON_STATE                  70
 147 #define OPCODE_COMMON_READ_TRANSRECV_DATA               73
 148 #define OPCODE_COMMON_GET_PHY_DETAILS                   102
 149
 150 #define OPCODE_ETH_RSS_CONFIG                           1
 151 #define OPCODE_ETH_ACPI_CONFIG                          2
 152 #define OPCODE_ETH_PROMISCUOUS                          3
 153 #define OPCODE_ETH_GET_STATISTICS                       4
 154 #define OPCODE_ETH_TX_CREATE                            7
 155 #define OPCODE_ETH_RX_CREATE                            8
 156 #define OPCODE_ETH_TX_DESTROY                           9
 157 #define OPCODE_ETH_RX_DESTROY                           10
 158 #define OPCODE_ETH_ACPI_WOL_MAGIC_CONFIG                12
 159
 160 #define OPCODE_LOWLEVEL_HOST_DDR_DMA                    17
 161 #define OPCODE_LOWLEVEL_LOOPBACK_TEST                   18
 162 #define OPCODE_LOWLEVEL_SET_LOOPBACK_MODE               19
 163
 164 struct be_cmd_req_hdr {
 165         u8 opcode;              /* dword 0 */
 166         u8 subsystem;           /* dword 0 */
 167         u8 port_number;         /* dword 0 */
 168         u8 domain;              /* dword 0 */
 169         u32 timeout;            /* dword 1 */
 170         u32 request_length;     /* dword 2 */
 171         u8 version;             /* dword 3 */
 172         u8 rsvd[3];             /* dword 3 */
 173 };
 174
 175 #define RESP_HDR_INFO_OPCODE_SHIFT      0       /* bits 0 - 7 */
 176 #define RESP_HDR_INFO_SUBSYS_SHIFT      8       /* bits 8 - 15 */
 177 struct be_cmd_resp_hdr {
 178         u32 info;               /* dword 0 */
 179         u32 status;             /* dword 1 */
 180         u32 response_length;    /* dword 2 */
 181         u32 actual_resp_len;    /* dword 3 */
 182 };
 183
 184 struct phys_addr {
 185         u32 lo;
 186         u32 hi;
 187 };
 188
 189 /**************************
 190  * BE Command definitions *
 191  **************************/
 192
 193 /* Pseudo amap definition in which each bit of the actual structure is defined
 194  * as a byte: used to calculate offset/shift/mask of each field */
 195 struct amap_eq_context {
 196         u8 cidx[13];            /* dword 0*/
 197         u8 rsvd0[3];            /* dword 0*/
 198         u8 epidx[13];           /* dword 0*/
 199         u8 valid;               /* dword 0*/
 200         u8 rsvd1;               /* dword 0*/
 201         u8 size;                /* dword 0*/
 202         u8 pidx[13];            /* dword 1*/
 203         u8 rsvd2[3];            /* dword 1*/
 204         u8 pd[10];              /* dword 1*/
 205         u8 count[3];            /* dword 1*/
 206         u8 solevent;            /* dword 1*/
 207         u8 stalled;             /* dword 1*/
 208         u8 armed;               /* dword 1*/
 209         u8 rsvd3[4];            /* dword 2*/
 210         u8 func[8];             /* dword 2*/
 211         u8 rsvd4;               /* dword 2*/
 212         u8 delaymult[10];       /* dword 2*/
 213         u8 rsvd5[2];            /* dword 2*/
 214         u8 phase[2];            /* dword 2*/
 215         u8 nodelay;             /* dword 2*/
 216         u8 rsvd6[4];            /* dword 2*/
 217         u8 rsvd7[32];           /* dword 3*/
 218 } __packed;
 219
 220 struct be_cmd_req_eq_create {
 221         struct be_cmd_req_hdr hdr;
 222         u16 num_pages;          /* sword */
 223         u16 rsvd0;              /* sword */
 224         u8 context[sizeof(struct amap_eq_context) / 8];
 225         struct phys_addr pages[8];
 226 } __packed;
 227
 228 struct be_cmd_resp_eq_create {
 229         struct be_cmd_resp_hdr resp_hdr;
 230         u16 eq_id;              /* sword */
 231         u16 rsvd0;              /* sword */
 232 } __packed;
 233
 234 /******************** Mac query ***************************/
 235 enum {
 236         MAC_ADDRESS_TYPE_STORAGE = 0x0,
 237         MAC_ADDRESS_TYPE_NETWORK = 0x1,
 238         MAC_ADDRESS_TYPE_PD = 0x2,
 239         MAC_ADDRESS_TYPE_MANAGEMENT = 0x3
 240 };
 241
 242 struct mac_addr {
 243         u16 size_of_struct;
 244         u8 addr[ETH_ALEN];
 245 } __packed;
 246
 247 struct be_cmd_req_mac_query {
 248         struct be_cmd_req_hdr hdr;
 249         u8 type;
 250         u8 permanent;
 251         u16 if_id;
 252 } __packed;
 253
 254 struct be_cmd_resp_mac_query {
 255         struct be_cmd_resp_hdr hdr;
 256         struct mac_addr mac;
 257 };
 258
 259 /******************** PMac Add ***************************/
 260 struct be_cmd_req_pmac_add {
 261         struct be_cmd_req_hdr hdr;
 262         u32 if_id;
 263         u8 mac_address[ETH_ALEN];
 264         u8 rsvd0[2];
 265 } __packed;
 266
 267 struct be_cmd_resp_pmac_add {
 268         struct be_cmd_resp_hdr hdr;
 269         u32 pmac_id;
 270 };
 271
 272 /******************** PMac Del ***************************/
 273 struct be_cmd_req_pmac_del {
 274         struct be_cmd_req_hdr hdr;
 275         u32 if_id;
 276         u32 pmac_id;
 277 };
 278
 279 /******************** Create CQ ***************************/
 280 /* Pseudo amap definition in which each bit of the actual structure is defined
 281  * as a byte: used to calculate offset/shift/mask of each field */
 282 struct amap_cq_context {
 283         u8 cidx[11];            /* dword 0*/
 284         u8 rsvd0;               /* dword 0*/
 285         u8 coalescwm[2];        /* dword 0*/
 286         u8 nodelay;             /* dword 0*/
 287         u8 epidx[11];           /* dword 0*/
 288         u8 rsvd1;               /* dword 0*/
 289         u8 count[2];            /* dword 0*/
 290         u8 valid;               /* dword 0*/
 291         u8 solevent;            /* dword 0*/
 292         u8 eventable;           /* dword 0*/
 293         u8 pidx[11];            /* dword 1*/
 294         u8 rsvd2;               /* dword 1*/
 295         u8 pd[10];              /* dword 1*/
 296         u8 eqid[8];             /* dword 1*/
 297         u8 stalled;             /* dword 1*/
 298         u8 armed;               /* dword 1*/
 299         u8 rsvd3[4];            /* dword 2*/
 300         u8 func[8];             /* dword 2*/
 301         u8 rsvd4[20];           /* dword 2*/
 302         u8 rsvd5[32];           /* dword 3*/
 303 } __packed;
 304
 305 struct be_cmd_req_cq_create {
 306         struct be_cmd_req_hdr hdr;
 307         u16 num_pages;
 308         u16 rsvd0;
 309         u8 context[sizeof(struct amap_cq_context) / 8];
 310         struct phys_addr pages[8];
 311 } __packed;
 312
 313 struct be_cmd_resp_cq_create {
 314         struct be_cmd_resp_hdr hdr;
 315         u16 cq_id;
 316         u16 rsvd0;
 317 } __packed;
 318
 319 /******************** Create MCCQ ***************************/
 320 /* Pseudo amap definition in which each bit of the actual structure is defined
 321  * as a byte: used to calculate offset/shift/mask of each field */
 322 struct amap_mcc_context {
 323         u8 con_index[14];
 324         u8 rsvd0[2];
 325         u8 ring_size[4];
 326         u8 fetch_wrb;
 327         u8 fetch_r2t;
 328         u8 cq_id[10];
 329         u8 prod_index[14];
 330         u8 fid[8];
 331         u8 pdid[9];
 332         u8 valid;
 333         u8 rsvd1[32];
 334         u8 rsvd2[32];
 335 } __packed;
 336
 337 struct be_cmd_req_mcc_create {
 338         struct be_cmd_req_hdr hdr;
 339         u16 num_pages;
 340         u16 rsvd0;
 341         u8 context[sizeof(struct amap_mcc_context) / 8];
 342         struct phys_addr pages[8];
 343 } __packed;
 344
 345 struct be_cmd_resp_mcc_create {
 346         struct be_cmd_resp_hdr hdr;
 347         u16 id;
 348         u16 rsvd0;
 349 } __packed;
 350
 351 /******************** Create TxQ ***************************/
 352 #define BE_ETH_TX_RING_TYPE_STANDARD            2
 353 #define BE_ULP1_NUM                             1
 354
 355 /* Pseudo amap definition in which each bit of the actual structure is defined
 356  * as a byte: used to calculate offset/shift/mask of each field */
 357 struct amap_tx_context {
 358         u8 rsvd0[16];           /* dword 0 */
 359         u8 tx_ring_size[4];     /* dword 0 */
 360         u8 rsvd1[26];           /* dword 0 */
 361         u8 pci_func_id[8];      /* dword 1 */
 362         u8 rsvd2[9];            /* dword 1 */
 363         u8 ctx_valid;           /* dword 1 */
 364         u8 cq_id_send[16];      /* dword 2 */
 365         u8 rsvd3[16];           /* dword 2 */
 366         u8 rsvd4[32];           /* dword 3 */
 367         u8 rsvd5[32];           /* dword 4 */
 368         u8 rsvd6[32];           /* dword 5 */
 369         u8 rsvd7[32];           /* dword 6 */
 370         u8 rsvd8[32];           /* dword 7 */
 371         u8 rsvd9[32];           /* dword 8 */
 372         u8 rsvd10[32];          /* dword 9 */
 373         u8 rsvd11[32];          /* dword 10 */
 374         u8 rsvd12[32];          /* dword 11 */
 375         u8 rsvd13[32];          /* dword 12 */
 376         u8 rsvd14[32];          /* dword 13 */
 377         u8 rsvd15[32];          /* dword 14 */
 378         u8 rsvd16[32];          /* dword 15 */
 379 } __packed;
 380
 381 struct be_cmd_req_eth_tx_create {
 382         struct be_cmd_req_hdr hdr;
 383         u8 num_pages;
 384         u8 ulp_num;
 385         u8 type;
 386         u8 bound_port;
 387         u8 context[sizeof(struct amap_tx_context) / 8];
 388         struct phys_addr pages[8];
 389 } __packed;
 390
 391 struct be_cmd_resp_eth_tx_create {
 392         struct be_cmd_resp_hdr hdr;
 393         u16 cid;
 394         u16 rsvd0;
 395 } __packed;
 396
 397 /******************** Create RxQ ***************************/
 398 struct be_cmd_req_eth_rx_create {
 399         struct be_cmd_req_hdr hdr;
 400         u16 cq_id;
 401         u8 frag_size;
 402         u8 num_pages;
 403         struct phys_addr pages[2];
 404         u32 interface_id;
 405         u16 max_frame_size;
 406         u16 rsvd0;
 407         u32 rss_queue;
 408 } __packed;
 409
 410 struct be_cmd_resp_eth_rx_create {
 411         struct be_cmd_resp_hdr hdr;
 412         u16 id;
 413         u8 rss_id;
 414         u8 rsvd0;
 415 } __packed;
 416
 417 /******************** Q Destroy  ***************************/
 418 /* Type of Queue to be destroyed */
 419 enum {
 420         QTYPE_EQ = 1,
 421         QTYPE_CQ,
 422         QTYPE_TXQ,
 423         QTYPE_RXQ,
 424         QTYPE_MCCQ
 425 };
 426
 427 struct be_cmd_req_q_destroy {
 428         struct be_cmd_req_hdr hdr;
 429         u16 id;
 430         u16 bypass_flush;       /* valid only for rx q destroy */
 431 } __packed;
 432
 433 /************ I/f Create (it's actually I/f Config Create)**********/
 434
 435 /* Capability flags for the i/f */
 436 enum be_if_flags {
 437         BE_IF_FLAGS_RSS = 0x4,
 438         BE_IF_FLAGS_PROMISCUOUS = 0x8,
 439         BE_IF_FLAGS_BROADCAST = 0x10,
 440         BE_IF_FLAGS_UNTAGGED = 0x20,
 441         BE_IF_FLAGS_ULP = 0x40,
 442         BE_IF_FLAGS_VLAN_PROMISCUOUS = 0x80,
 443         BE_IF_FLAGS_VLAN = 0x100,
 444         BE_IF_FLAGS_MCAST_PROMISCUOUS = 0x200,
 445         BE_IF_FLAGS_PASS_L2_ERRORS = 0x400,
 446         BE_IF_FLAGS_PASS_L3L4_ERRORS = 0x800
 447 };
 448
 449 /* An RX interface is an object with one or more MAC addresses and
 450  * filtering capabilities. */
 451 struct be_cmd_req_if_create {
 452         struct be_cmd_req_hdr hdr;
 453         u32 version;            /* ignore currently */
 454         u32 capability_flags;
 455         u32 enable_flags;
 456         u8 mac_addr[ETH_ALEN];
 457         u8 rsvd0;
 458         u8 pmac_invalid; /* if set, don't attach the mac addr to the i/f */
 459         u32 vlan_tag;    /* not used currently */
 460 } __packed;
 461
 462 struct be_cmd_resp_if_create {
 463         struct be_cmd_resp_hdr hdr;
 464         u32 interface_id;
 465         u32 pmac_id;
 466 };
 467
 468 /****** I/f Destroy(it's actually I/f Config Destroy )**********/
 469 struct be_cmd_req_if_destroy {
 470         struct be_cmd_req_hdr hdr;
 471         u32 interface_id;
 472 };
 473
 474 /*************** HW Stats Get **********************************/
 475 struct be_port_rxf_stats {
 476         u32 rx_bytes_lsd;       /* dword 0*/
 477         u32 rx_bytes_msd;       /* dword 1*/
 478         u32 rx_total_frames;    /* dword 2*/
 479         u32 rx_unicast_frames;  /* dword 3*/
 480         u32 rx_multicast_frames;        /* dword 4*/
 481         u32 rx_broadcast_frames;        /* dword 5*/
 482         u32 rx_crc_errors;      /* dword 6*/
 483         u32 rx_alignment_symbol_errors; /* dword 7*/
 484         u32 rx_pause_frames;    /* dword 8*/
 485         u32 rx_control_frames;  /* dword 9*/
 486         u32 rx_in_range_errors; /* dword 10*/
 487         u32 rx_out_range_errors;        /* dword 11*/
 488         u32 rx_frame_too_long;  /* dword 12*/
 489         u32 rx_address_match_errors;    /* dword 13*/
 490         u32 rx_vlan_mismatch;   /* dword 14*/
 491         u32 rx_dropped_too_small;       /* dword 15*/
 492         u32 rx_dropped_too_short;       /* dword 16*/
 493         u32 rx_dropped_header_too_small;        /* dword 17*/
 494         u32 rx_dropped_tcp_length;      /* dword 18*/
 495         u32 rx_dropped_runt;    /* dword 19*/
 496         u32 rx_64_byte_packets; /* dword 20*/
 497         u32 rx_65_127_byte_packets;     /* dword 21*/
 498         u32 rx_128_256_byte_packets;    /* dword 22*/
 499         u32 rx_256_511_byte_packets;    /* dword 23*/
 500         u32 rx_512_1023_byte_packets;   /* dword 24*/
 501         u32 rx_1024_1518_byte_packets;  /* dword 25*/
 502         u32 rx_1519_2047_byte_packets;  /* dword 26*/
 503         u32 rx_2048_4095_byte_packets;  /* dword 27*/
 504         u32 rx_4096_8191_byte_packets;  /* dword 28*/
 505         u32 rx_8192_9216_byte_packets;  /* dword 29*/
 506         u32 rx_ip_checksum_errs;        /* dword 30*/
 507         u32 rx_tcp_checksum_errs;       /* dword 31*/
 508         u32 rx_udp_checksum_errs;       /* dword 32*/
 509         u32 rx_non_rss_packets; /* dword 33*/
 510         u32 rx_ipv4_packets;    /* dword 34*/
 511         u32 rx_ipv6_packets;    /* dword 35*/
 512         u32 rx_ipv4_bytes_lsd;  /* dword 36*/
 513         u32 rx_ipv4_bytes_msd;  /* dword 37*/
 514         u32 rx_ipv6_bytes_lsd;  /* dword 38*/
 515         u32 rx_ipv6_bytes_msd;  /* dword 39*/
 516         u32 rx_chute1_packets;  /* dword 40*/
 517         u32 rx_chute2_packets;  /* dword 41*/
 518         u32 rx_chute3_packets;  /* dword 42*/
 519         u32 rx_management_packets;      /* dword 43*/
 520         u32 rx_switched_unicast_packets;        /* dword 44*/
 521         u32 rx_switched_multicast_packets;      /* dword 45*/
 522         u32 rx_switched_broadcast_packets;      /* dword 46*/
 523         u32 tx_bytes_lsd;       /* dword 47*/
 524         u32 tx_bytes_msd;       /* dword 48*/
 525         u32 tx_unicastframes;   /* dword 49*/
 526         u32 tx_multicastframes; /* dword 50*/
 527         u32 tx_broadcastframes; /* dword 51*/
 528         u32 tx_pauseframes;     /* dword 52*/
 529         u32 tx_controlframes;   /* dword 53*/
 530         u32 tx_64_byte_packets; /* dword 54*/
 531         u32 tx_65_127_byte_packets;     /* dword 55*/
 532         u32 tx_128_256_byte_packets;    /* dword 56*/
 533         u32 tx_256_511_byte_packets;    /* dword 57*/
 534         u32 tx_512_1023_byte_packets;   /* dword 58*/
 535         u32 tx_1024_1518_byte_packets;  /* dword 59*/
 536         u32 tx_1519_2047_byte_packets;  /* dword 60*/
 537         u32 tx_2048_4095_byte_packets;  /* dword 61*/
 538         u32 tx_4096_8191_byte_packets;  /* dword 62*/
 539         u32 tx_8192_9216_byte_packets;  /* dword 63*/
 540         u32 rx_fifo_overflow;   /* dword 64*/
 541         u32 rx_input_fifo_overflow;     /* dword 65*/
 542 };
 543
 544 struct be_rxf_stats {
 545         struct be_port_rxf_stats port[2];
 546         u32 rx_drops_no_pbuf;   /* dword 132*/
 547         u32 rx_drops_no_txpb;   /* dword 133*/
 548         u32 rx_drops_no_erx_descr;      /* dword 134*/
 549         u32 rx_drops_no_tpre_descr;     /* dword 135*/
 550         u32 management_rx_port_packets; /* dword 136*/
 551         u32 management_rx_port_bytes;   /* dword 137*/
 552         u32 management_rx_port_pause_frames;    /* dword 138*/
 553         u32 management_rx_port_errors;  /* dword 139*/
 554         u32 management_tx_port_packets; /* dword 140*/
 555         u32 management_tx_port_bytes;   /* dword 141*/
 556         u32 management_tx_port_pause;   /* dword 142*/
 557         u32 management_rx_port_rxfifo_overflow; /* dword 143*/
 558         u32 rx_drops_too_many_frags;    /* dword 144*/
 559         u32 rx_drops_invalid_ring;      /* dword 145*/
 560         u32 forwarded_packets;  /* dword 146*/
 561         u32 rx_drops_mtu;       /* dword 147*/
 562         u32 rsvd0[15];
 563 };
 564
 565 struct be_erx_stats {
 566         u32 rx_drops_no_fragments[44];     /* dwordS 0 to 43*/
 567         u32 debug_wdma_sent_hold;          /* dword 44*/
 568         u32 debug_wdma_pbfree_sent_hold;   /* dword 45*/
 569         u32 debug_wdma_zerobyte_pbfree_sent_hold; /* dword 46*/
 570         u32 debug_pmem_pbuf_dealloc;       /* dword 47*/
 571 };
 572
 573 struct be_hw_stats {
 574         struct be_rxf_stats rxf;
 575         u32 rsvd[48];
 576         struct be_erx_stats erx;
 577 };
 578
 579 struct be_cmd_req_get_stats {
 580         struct be_cmd_req_hdr hdr;
 581         u8 rsvd[sizeof(struct be_hw_stats)];
 582 };
 583
 584 struct be_cmd_resp_get_stats {
 585         struct be_cmd_resp_hdr hdr;
 586         struct be_hw_stats hw_stats;
 587 };
 588
 589 struct be_cmd_req_vlan_config {
 590         struct be_cmd_req_hdr hdr;
 591         u8 interface_id;
 592         u8 promiscuous;
 593         u8 untagged;
 594         u8 num_vlan;
 595         u16 normal_vlan[64];
 596 } __packed;
 597
 598 struct be_cmd_req_promiscuous_config {
 599         struct be_cmd_req_hdr hdr;
 600         u8 port0_promiscuous;
 601         u8 port1_promiscuous;
 602         u16 rsvd0;
 603 } __packed;
 604
 605 /******************** Multicast MAC Config *******************/
 606 #define BE_MAX_MC               64 /* set mcast promisc if > 64 */
 607 struct macaddr {
 608         u8 byte[ETH_ALEN];
 609 };
 610
 611 struct be_cmd_req_mcast_mac_config {
 612         struct be_cmd_req_hdr hdr;
 613         u16 num_mac;
 614         u8 promiscuous;
 615         u8 interface_id;
 616         struct macaddr mac[BE_MAX_MC];
 617 } __packed;
 618
 619 static inline struct be_hw_stats *
 620 hw_stats_from_cmd(struct be_cmd_resp_get_stats *cmd)
 621 {
 622         return &cmd->hw_stats;
 623 }
 624
 625 /******************** Link Status Query *******************/
 626 struct be_cmd_req_link_status {
 627         struct be_cmd_req_hdr hdr;
 628         u32 rsvd;
 629 };
 630
 631 enum {
 632         PHY_LINK_DUPLEX_NONE = 0x0,
 633         PHY_LINK_DUPLEX_HALF = 0x1,
 634         PHY_LINK_DUPLEX_FULL = 0x2
 635 };
 636
 637 enum {
 638         PHY_LINK_SPEED_ZERO = 0x0,      /* => No link */
 639         PHY_LINK_SPEED_10MBPS = 0x1,
 640         PHY_LINK_SPEED_100MBPS = 0x2,
 641         PHY_LINK_SPEED_1GBPS = 0x3,
 642         PHY_LINK_SPEED_10GBPS = 0x4
 643 };
 644
 645 struct be_cmd_resp_link_status {
 646         struct be_cmd_resp_hdr hdr;
 647         u8 physical_port;
 648         u8 mac_duplex;
 649         u8 mac_speed;
 650         u8 mac_fault;
 651         u8 mgmt_mac_duplex;
 652         u8 mgmt_mac_speed;
 653         u16 link_speed;
 654         u32 rsvd0;
 655 } __packed;
 656
 657 /******************** Port Identification ***************************/
 658 /*    Identifies the type of port attached to NIC     */
 659 struct be_cmd_req_port_type {
 660         struct be_cmd_req_hdr hdr;
 661         u32 page_num;
 662         u32 port;
 663 };
 664
 665 enum {
 666         TR_PAGE_A0 = 0xa0,
 667         TR_PAGE_A2 = 0xa2
 668 };
 669
 670 struct be_cmd_resp_port_type {
 671         struct be_cmd_resp_hdr hdr;
 672         u32 page_num;
 673         u32 port;
 674         struct data {
 675                 u8 identifier;
 676                 u8 identifier_ext;
 677                 u8 connector;
 678                 u8 transceiver[8];
 679                 u8 rsvd0[3];
 680                 u8 length_km;
 681                 u8 length_hm;
 682                 u8 length_om1;
 683                 u8 length_om2;
 684                 u8 length_cu;
 685                 u8 length_cu_m;
 686                 u8 vendor_name[16];
 687                 u8 rsvd;
 688                 u8 vendor_oui[3];
 689                 u8 vendor_pn[16];
 690                 u8 vendor_rev[4];
 691         } data;
 692 };
 693
 694 /******************** Get FW Version *******************/
 695 struct be_cmd_req_get_fw_version {
 696         struct be_cmd_req_hdr hdr;
 697         u8 rsvd0[FW_VER_LEN];
 698         u8 rsvd1[FW_VER_LEN];
 699 } __packed;
 700
 701 struct be_cmd_resp_get_fw_version {
 702         struct be_cmd_resp_hdr hdr;
 703         u8 firmware_version_string[FW_VER_LEN];
 704         u8 fw_on_flash_version_string[FW_VER_LEN];
 705 } __packed;
 706
 707 /******************** Set Flow Contrl *******************/
 708 struct be_cmd_req_set_flow_control {
 709         struct be_cmd_req_hdr hdr;
 710         u16 tx_flow_control;
 711         u16 rx_flow_control;
 712 } __packed;
 713
 714 /******************** Get Flow Contrl *******************/
 715 struct be_cmd_req_get_flow_control {
 716         struct be_cmd_req_hdr hdr;
 717         u32 rsvd;
 718 };
 719
 720 struct be_cmd_resp_get_flow_control {
 721         struct be_cmd_resp_hdr hdr;
 722         u16 tx_flow_control;
 723         u16 rx_flow_control;
 724 } __packed;
 725
 726 /******************** Modify EQ Delay *******************/
 727 struct be_cmd_req_modify_eq_delay {
 728         struct be_cmd_req_hdr hdr;
 729         u32 num_eq;
 730         struct {
 731                 u32 eq_id;
 732                 u32 phase;
 733                 u32 delay_multiplier;
 734         } delay[8];
 735 } __packed;
 736
 737 struct be_cmd_resp_modify_eq_delay {
 738         struct be_cmd_resp_hdr hdr;
 739         u32 rsvd0;
 740 } __packed;
 741
 742 /******************** Get FW Config *******************/
 743 #define BE_FUNCTION_CAPS_RSS                    0x2
 744 struct be_cmd_req_query_fw_cfg {
 745         struct be_cmd_req_hdr hdr;
 746         u32 rsvd[31];
 747 };
 748
 749 struct be_cmd_resp_query_fw_cfg {
 750         struct be_cmd_resp_hdr hdr;
 751         u32 be_config_number;
 752         u32 asic_revision;
 753         u32 phys_port;
 754         u32 function_mode;
 755         u32 rsvd[26];
 756         u32 function_caps;
 757 };
 758
 759 /******************** RSS Config *******************/
 760 /* RSS types */
 761 #define RSS_ENABLE_NONE                         0x0
 762 #define RSS_ENABLE_IPV4                         0x1
 763 #define RSS_ENABLE_TCP_IPV4                     0x2
 764 #define RSS_ENABLE_IPV6                         0x4
 765 #define RSS_ENABLE_TCP_IPV6                     0x8
 766
 767 struct be_cmd_req_rss_config {
 768         struct be_cmd_req_hdr hdr;
 769         u32 if_id;
 770         u16 enable_rss;
 771         u16 cpu_table_size_log2;
 772         u32 hash[10];
 773         u8 cpu_table[128];
 774         u8 flush;
 775         u8 rsvd0[3];
 776 };
 777
 778 /******************** Port Beacon ***************************/
 779
 780 #define BEACON_STATE_ENABLED            0x1
 781 #define BEACON_STATE_DISABLED           0x0
 782
 783 struct be_cmd_req_enable_disable_beacon {
 784         struct be_cmd_req_hdr hdr;
 785         u8  port_num;
 786         u8  beacon_state;
 787         u8  beacon_duration;
 788         u8  status_duration;
 789 } __packed;
 790
 791 struct be_cmd_resp_enable_disable_beacon {
 792         struct be_cmd_resp_hdr resp_hdr;
 793         u32 rsvd0;
 794 } __packed;
 795
 796 struct be_cmd_req_get_beacon_state {
 797         struct be_cmd_req_hdr hdr;
 798         u8  port_num;
 799         u8  rsvd0;
 800         u16 rsvd1;
 801 } __packed;
 802
 803 struct be_cmd_resp_get_beacon_state {
 804         struct be_cmd_resp_hdr resp_hdr;
 805         u8 beacon_state;
 806         u8 rsvd0[3];
 807 } __packed;
 808
 809 /****************** Firmware Flash ******************/
 810 struct flashrom_params {
 811         u32 op_code;
 812         u32 op_type;
 813         u32 data_buf_size;
 814         u32 offset;
 815         u8 data_buf[4];
 816 };
 817
 818 struct be_cmd_write_flashrom {
 819         struct be_cmd_req_hdr hdr;
 820         struct flashrom_params params;
 821 };
 822
 823 /************************ WOL *******************************/
 824 struct be_cmd_req_acpi_wol_magic_config{
 825         struct be_cmd_req_hdr hdr;
 826         u32 rsvd0[145];
 827         u8 magic_mac[6];
 828         u8 rsvd2[2];
 829 } __packed;
 830
 831 /********************** LoopBack test *********************/
 832 struct be_cmd_req_loopback_test {
 833         struct be_cmd_req_hdr hdr;
 834         u32 loopback_type;
 835         u32 num_pkts;
 836         u64 pattern;
 837         u32 src_port;
 838         u32 dest_port;
 839         u32 pkt_size;
 840 };
 841
 842 struct be_cmd_resp_loopback_test {
 843         struct be_cmd_resp_hdr resp_hdr;
 844         u32    status;
 845         u32    num_txfer;
 846         u32    num_rx;
 847         u32    miscomp_off;
 848         u32    ticks_compl;
 849 };
 850
 851 struct be_cmd_req_set_lmode {
 852         struct be_cmd_req_hdr hdr;
 853         u8 src_port;
 854         u8 dest_port;
 855         u8 loopback_type;
 856         u8 loopback_state;
 857 };
 858
 859 struct be_cmd_resp_set_lmode {
 860         struct be_cmd_resp_hdr resp_hdr;
 861         u8 rsvd0[4];
 862 };
 863
 864 /********************** DDR DMA test *********************/
 865 struct be_cmd_req_ddrdma_test {
 866         struct be_cmd_req_hdr hdr;
 867         u64 pattern;
 868         u32 byte_count;
 869         u32 rsvd0;
 870         u8  snd_buff[4096];
 871         u8  rsvd1[4096];
 872 };
 873
 874 struct be_cmd_resp_ddrdma_test {
 875         struct be_cmd_resp_hdr hdr;
 876         u64 pattern;
 877         u32 byte_cnt;
 878         u32 snd_err;
 879         u8  rsvd0[4096];
 880         u8  rcv_buff[4096];
 881 };
 882
 883 /*********************** SEEPROM Read ***********************/
 884
 885 #define BE_READ_SEEPROM_LEN 1024
 886 struct be_cmd_req_seeprom_read {
 887         struct be_cmd_req_hdr hdr;
 888         u8 rsvd0[BE_READ_SEEPROM_LEN];
 889 };
 890
 891 struct be_cmd_resp_seeprom_read {
 892         struct be_cmd_req_hdr hdr;
 893         u8 seeprom_data[BE_READ_SEEPROM_LEN];
 894 };
 895
 896 enum {
 897         PHY_TYPE_CX4_10GB = 0,
 898         PHY_TYPE_XFP_10GB,
 899         PHY_TYPE_SFP_1GB,
 900         PHY_TYPE_SFP_PLUS_10GB,
 901         PHY_TYPE_KR_10GB,
 902         PHY_TYPE_KX4_10GB,
 903         PHY_TYPE_BASET_10GB,
 904         PHY_TYPE_BASET_1GB,
 905         PHY_TYPE_DISABLED = 255
 906 };
 907
 908 struct be_cmd_req_get_phy_info {
 909         struct be_cmd_req_hdr hdr;
 910         u8 rsvd0[24];
 911 };
 912 struct be_cmd_resp_get_phy_info {
 913         struct be_cmd_req_hdr hdr;
 914         u16 phy_type;
 915         u16 interface_type;
 916         u32 misc_params;
 917         u32 future_use[4];
 918 };
 919
 920 /*********************** Set QOS ***********************/
 921
 922 #define BE_QOS_BITS_NIC                         1
 923
 924 struct be_cmd_req_set_qos {
 925         struct be_cmd_req_hdr hdr;
 926         u32 valid_bits;
 927         u32 max_bps_nic;
 928         u32 rsvd[7];
 929 };
 930
 931 struct be_cmd_resp_set_qos {
 932         struct be_cmd_resp_hdr hdr;
 933         u32 rsvd;
 934 };
 935
 936 extern int be_pci_fnum_get(struct be_adapter *adapter);
 937 extern int be_cmd_POST(struct be_adapter *adapter);
 938 extern int be_cmd_mac_addr_query(struct be_adapter *adapter, u8 *mac_addr,
 939                         u8 type, bool permanent, u32 if_handle);
 940 extern int be_cmd_pmac_add(struct be_adapter *adapter, u8 *mac_addr,
 941                         u32 if_id, u32 *pmac_id);
 942 extern int be_cmd_pmac_del(struct be_adapter *adapter, u32 if_id, u32 pmac_id);
 943 extern int be_cmd_if_create(struct be_adapter *adapter, u32 cap_flags,
 944                         u32 en_flags, u8 *mac, bool pmac_invalid,
 945                         u32 *if_handle, u32 *pmac_id, u32 domain);
 946 extern int be_cmd_if_destroy(struct be_adapter *adapter, u32 if_handle);
 947 extern int be_cmd_eq_create(struct be_adapter *adapter,
 948                         struct be_queue_info *eq, int eq_delay);
 949 extern int be_cmd_cq_create(struct be_adapter *adapter,
 950                         struct be_queue_info *cq, struct be_queue_info *eq,
 951                         bool sol_evts, bool no_delay,
 952                         int num_cqe_dma_coalesce);
 953 extern int be_cmd_mccq_create(struct be_adapter *adapter,
 954                         struct be_queue_info *mccq,
 955                         struct be_queue_info *cq);
 956 extern int be_cmd_txq_create(struct be_adapter *adapter,
 957                         struct be_queue_info *txq,
 958                         struct be_queue_info *cq);
 959 extern int be_cmd_rxq_create(struct be_adapter *adapter,
 960                         struct be_queue_info *rxq, u16 cq_id,
 961                         u16 frag_size, u16 max_frame_size, u32 if_id,
 962                         u32 rss, u8 *rss_id);
 963 extern int be_cmd_q_destroy(struct be_adapter *adapter, struct be_queue_info *q,
 964                         int type);
 965 extern int be_cmd_link_status_query(struct be_adapter *adapter,
 966                         bool *link_up, u8 *mac_speed, u16 *link_speed);
 967 extern int be_cmd_reset(struct be_adapter *adapter);
 968 extern int be_cmd_get_stats(struct be_adapter *adapter,
 969                         struct be_dma_mem *nonemb_cmd);
 970 extern int be_cmd_get_fw_ver(struct be_adapter *adapter, char *fw_ver);
 971
 972 extern int be_cmd_modify_eqd(struct be_adapter *adapter, u32 eq_id, u32 eqd);
 973 extern int be_cmd_vlan_config(struct be_adapter *adapter, u32 if_id,
 974                         u16 *vtag_array, u32 num, bool untagged,
 975                         bool promiscuous);
 976 extern int be_cmd_promiscuous_config(struct be_adapter *adapter,
 977                         u8 port_num, bool en);
 978 extern int be_cmd_multicast_set(struct be_adapter *adapter, u32 if_id,
 979                         struct net_device *netdev, struct be_dma_mem *mem);
 980 extern int be_cmd_set_flow_control(struct be_adapter *adapter,
 981                         u32 tx_fc, u32 rx_fc);
 982 extern int be_cmd_get_flow_control(struct be_adapter *adapter,
 983                         u32 *tx_fc, u32 *rx_fc);
 984 extern int be_cmd_query_fw_cfg(struct be_adapter *adapter,
 985                         u32 *port_num, u32 *function_mode, u32 *function_caps);
 986 extern int be_cmd_reset_function(struct be_adapter *adapter);
 987 extern int be_cmd_rss_config(struct be_adapter *adapter, u8 *rsstable,
 988                         u16 table_size);
 989 extern int be_process_mcc(struct be_adapter *adapter, int *status);
 990 extern int be_cmd_set_beacon_state(struct be_adapter *adapter,
 991                         u8 port_num, u8 beacon, u8 status, u8 state);
 992 extern int be_cmd_get_beacon_state(struct be_adapter *adapter,
 993                         u8 port_num, u32 *state);
 994 extern int be_cmd_read_port_type(struct be_adapter *adapter, u32 port,
 995                                         u8 *connector);
 996 extern int be_cmd_write_flashrom(struct be_adapter *adapter,
 997                         struct be_dma_mem *cmd, u32 flash_oper,
 998                         u32 flash_opcode, u32 buf_size);
 999 int be_cmd_get_flash_crc(struct be_adapter *adapter, u8 *flashed_crc,
1000                                 int offset);
1001 extern int be_cmd_enable_magic_wol(struct be_adapter *adapter, u8 *mac,
1002                                 struct be_dma_mem *nonemb_cmd);
1003 extern int be_cmd_fw_init(struct be_adapter *adapter);
1004 extern int be_cmd_fw_clean(struct be_adapter *adapter);
1005 extern void be_async_mcc_enable(struct be_adapter *adapter);
1006 extern void be_async_mcc_disable(struct be_adapter *adapter);
1007 extern int be_cmd_loopback_test(struct be_adapter *adapter, u32 port_num,
1008                                 u32 loopback_type, u32 pkt_size,
1009                                 u32 num_pkts, u64 pattern);
1010 extern int be_cmd_ddr_dma_test(struct be_adapter *adapter, u64 pattern,
1011                         u32 byte_cnt, struct be_dma_mem *cmd);
1012 extern int be_cmd_get_seeprom_data(struct be_adapter *adapter,
1013                                 struct be_dma_mem *nonemb_cmd);
1014 extern int be_cmd_set_loopback(struct be_adapter *adapter, u8 port_num,
1015                                 u8 loopback_type, u8 enable);
1016 extern int be_cmd_get_phy_info(struct be_adapter *adapter,
1017                 struct be_dma_mem *cmd);
1018 extern int be_cmd_set_qos(struct be_adapter *adapter, u32 bps, u32 domain);
1019 extern void be_detect_dump_ue(struct be_adapter *adapter);
1020