drivers/net/arm/ixp4xx_eth.c

   1 /*
   2  * Intel IXP4xx Ethernet driver for Linux
   3  *
   4  * Copyright (C) 2007 Krzysztof Halasa <khc@pm.waw.pl>
   5  *
   6  * This program is free software; you can redistribute it and/or modify it
   7  * under the terms of version 2 of the GNU General Public License
   8  * as published by the Free Software Foundation.
   9  *
  10  * Ethernet port config (0x00 is not present on IXP42X):
  11  *
  12  * logical port         0x00            0x10            0x20
  13  * NPE                  0 (NPE-A)       1 (NPE-B)       2 (NPE-C)
  14  * physical PortId      2               0               1
  15  * TX queue             23              24              25
  16  * RX-free queue        26              27              28
  17  * TX-done queue is always 31, per-port RX and TX-ready queues are configurable
  18  *
  19  *
  20  * Queue entries:
  21  * bits 0 -> 1  - NPE ID (RX and TX-done)
  22  * bits 0 -> 2  - priority (TX, per 802.1D)
  23  * bits 3 -> 4  - port ID (user-set?)
  24  * bits 5 -> 31 - physical descriptor address
  25  */
  26
  27 #include <linux/delay.h>
  28 #include <linux/dma-mapping.h>
  29 #include <linux/dmapool.h>
  30 #include <linux/etherdevice.h>
  31 #include <linux/io.h>
  32 #include <linux/kernel.h>
  33 #include <linux/phy.h>
  34 #include <linux/platform_device.h>
  35 #include <mach/npe.h>
  36 #include <mach/qmgr.h>
  37
  38 #define DEBUG_QUEUES            0
  39 #define DEBUG_DESC              0
  40 #define DEBUG_RX                0
  41 #define DEBUG_TX                0
  42 #define DEBUG_PKT_BYTES         0
  43 #define DEBUG_MDIO              0
  44 #define DEBUG_CLOSE             0
  45
  46 #define DRV_NAME                "ixp4xx_eth"
  47
  48 #define MAX_NPES                3
  49
  50 #define RX_DESCS                64 /* also length of all RX queues */
  51 #define TX_DESCS                16 /* also length of all TX queues */
  52 #define TXDONE_QUEUE_LEN        64 /* dwords */
  53
  54 #define POOL_ALLOC_SIZE         (sizeof(struct desc) * (RX_DESCS + TX_DESCS))
  55 #define REGS_SIZE               0x1000
  56 #define MAX_MRU                 1536 /* 0x600 */
  57 #define RX_BUFF_SIZE            ALIGN((NET_IP_ALIGN) + MAX_MRU, 4)
  58
  59 #define NAPI_WEIGHT             16
  60 #define MDIO_INTERVAL           (3 * HZ)
  61 #define MAX_MDIO_RETRIES        100 /* microseconds, typically 30 cycles */
  62 #define MAX_CLOSE_WAIT          1000 /* microseconds, typically 2-3 cycles */
  63
  64 #define NPE_ID(port_id)         ((port_id) >> 4)
  65 #define PHYSICAL_ID(port_id)    ((NPE_ID(port_id) + 2) % 3)
  66 #define TX_QUEUE(port_id)       (NPE_ID(port_id) + 23)
  67 #define RXFREE_QUEUE(port_id)   (NPE_ID(port_id) + 26)
  68 #define TXDONE_QUEUE            31
  69
  70 /* TX Control Registers */
  71 #define TX_CNTRL0_TX_EN         0x01
  72 #define TX_CNTRL0_HALFDUPLEX    0x02
  73 #define TX_CNTRL0_RETRY         0x04
  74 #define TX_CNTRL0_PAD_EN        0x08
  75 #define TX_CNTRL0_APPEND_FCS    0x10
  76 #define TX_CNTRL0_2DEFER        0x20
  77 #define TX_CNTRL0_RMII          0x40 /* reduced MII */
  78 #define TX_CNTRL1_RETRIES       0x0F /* 4 bits */
  79
  80 /* RX Control Registers */
  81 #define RX_CNTRL0_RX_EN         0x01
  82 #define RX_CNTRL0_PADSTRIP_EN   0x02
  83 #define RX_CNTRL0_SEND_FCS      0x04
  84 #define RX_CNTRL0_PAUSE_EN      0x08
  85 #define RX_CNTRL0_LOOP_EN       0x10
  86 #define RX_CNTRL0_ADDR_FLTR_EN  0x20
  87 #define RX_CNTRL0_RX_RUNT_EN    0x40
  88 #define RX_CNTRL0_BCAST_DIS     0x80
  89 #define RX_CNTRL1_DEFER_EN      0x01
  90
  91 /* Core Control Register */
  92 #define CORE_RESET              0x01
  93 #define CORE_RX_FIFO_FLUSH      0x02
  94 #define CORE_TX_FIFO_FLUSH      0x04
  95 #define CORE_SEND_JAM           0x08
  96 #define CORE_MDC_EN             0x10 /* MDIO using NPE-B ETH-0 only */
  97
  98 #define DEFAULT_TX_CNTRL0       (TX_CNTRL0_TX_EN | TX_CNTRL0_RETRY |    \
  99                                  TX_CNTRL0_PAD_EN | TX_CNTRL0_APPEND_FCS | \
 100                                  TX_CNTRL0_2DEFER)
 101 #define DEFAULT_RX_CNTRL0       RX_CNTRL0_RX_EN
 102 #define DEFAULT_CORE_CNTRL      CORE_MDC_EN
 103
 104
 105 /* NPE message codes */
 106 #define NPE_GETSTATUS                   0x00
 107 #define NPE_EDB_SETPORTADDRESS          0x01
 108 #define NPE_EDB_GETMACADDRESSDATABASE   0x02
 109 #define NPE_EDB_SETMACADDRESSSDATABASE  0x03
 110 #define NPE_GETSTATS                    0x04
 111 #define NPE_RESETSTATS                  0x05
 112 #define NPE_SETMAXFRAMELENGTHS          0x06
 113 #define NPE_VLAN_SETRXTAGMODE           0x07
 114 #define NPE_VLAN_SETDEFAULTRXVID        0x08
 115 #define NPE_VLAN_SETPORTVLANTABLEENTRY  0x09
 116 #define NPE_VLAN_SETPORTVLANTABLERANGE  0x0A
 117 #define NPE_VLAN_SETRXQOSENTRY          0x0B
 118 #define NPE_VLAN_SETPORTIDEXTRACTIONMODE 0x0C
 119 #define NPE_STP_SETBLOCKINGSTATE        0x0D
 120 #define NPE_FW_SETFIREWALLMODE          0x0E
 121 #define NPE_PC_SETFRAMECONTROLDURATIONID 0x0F
 122 #define NPE_PC_SETAPMACTABLE            0x11
 123 #define NPE_SETLOOPBACK_MODE            0x12
 124 #define NPE_PC_SETBSSIDTABLE            0x13
 125 #define NPE_ADDRESS_FILTER_CONFIG       0x14
 126 #define NPE_APPENDFCSCONFIG             0x15
 127 #define NPE_NOTIFY_MAC_RECOVERY_DONE    0x16
 128 #define NPE_MAC_RECOVERY_START          0x17
 129
 130
 131 #ifdef __ARMEB__
 132 typedef struct sk_buff buffer_t;
 133 #define free_buffer dev_kfree_skb
 134 #define free_buffer_irq dev_kfree_skb_irq
 135 #else
 136 typedef void buffer_t;
 137 #define free_buffer kfree
 138 #define free_buffer_irq kfree
 139 #endif
 140
 141 struct eth_regs {
 142         u32 tx_control[2], __res1[2];           /* 000 */
 143         u32 rx_control[2], __res2[2];           /* 010 */
 144         u32 random_seed, __res3[3];             /* 020 */
 145         u32 partial_empty_threshold, __res4;    /* 030 */
 146         u32 partial_full_threshold, __res5;     /* 038 */
 147         u32 tx_start_bytes, __res6[3];          /* 040 */
 148         u32 tx_deferral, rx_deferral, __res7[2];/* 050 */
 149         u32 tx_2part_deferral[2], __res8[2];    /* 060 */
 150         u32 slot_time, __res9[3];               /* 070 */
 151         u32 mdio_command[4];                    /* 080 */
 152         u32 mdio_status[4];                     /* 090 */
 153         u32 mcast_mask[6], __res10[2];          /* 0A0 */
 154         u32 mcast_addr[6], __res11[2];          /* 0C0 */
 155         u32 int_clock_threshold, __res12[3];    /* 0E0 */
 156         u32 hw_addr[6], __res13[61];            /* 0F0 */
 157         u32 core_control;                       /* 1FC */
 158 };
 159
 160 struct port {
 161         struct resource *mem_res;
 162         struct eth_regs __iomem *regs;
 163         struct npe *npe;
 164         struct net_device *netdev;
 165         struct napi_struct napi;
 166         struct phy_device *phydev;
 167         struct eth_plat_info *plat;
 168         buffer_t *rx_buff_tab[RX_DESCS], *tx_buff_tab[TX_DESCS];
 169         struct desc *desc_tab;  /* coherent */
 170         u32 desc_tab_phys;
 171         int id;                 /* logical port ID */
 172         int speed, duplex;
 173         u8 firmware[4];
 174 };
 175
 176 /* NPE message structure */
 177 struct msg {
 178 #ifdef __ARMEB__
 179         u8 cmd, eth_id, byte2, byte3;
 180         u8 byte4, byte5, byte6, byte7;
 181 #else
 182         u8 byte3, byte2, eth_id, cmd;
 183         u8 byte7, byte6, byte5, byte4;
 184 #endif
 185 };
 186
 187 /* Ethernet packet descriptor */
 188 struct desc {
 189         u32 next;               /* pointer to next buffer, unused */
 190
 191 #ifdef __ARMEB__
 192         u16 buf_len;            /* buffer length */
 193         u16 pkt_len;            /* packet length */
 194         u32 data;               /* pointer to data buffer in RAM */
 195         u8 dest_id;
 196         u8 src_id;
 197         u16 flags;
 198         u8 qos;
 199         u8 padlen;
 200         u16 vlan_tci;
 201 #else
 202         u16 pkt_len;            /* packet length */
 203         u16 buf_len;            /* buffer length */
 204         u32 data;               /* pointer to data buffer in RAM */
 205         u16 flags;
 206         u8 src_id;
 207         u8 dest_id;
 208         u16 vlan_tci;
 209         u8 padlen;
 210         u8 qos;
 211 #endif
 212
 213 #ifdef __ARMEB__
 214         u8 dst_mac_0, dst_mac_1, dst_mac_2, dst_mac_3;
 215         u8 dst_mac_4, dst_mac_5, src_mac_0, src_mac_1;
 216         u8 src_mac_2, src_mac_3, src_mac_4, src_mac_5;
 217 #else
 218         u8 dst_mac_3, dst_mac_2, dst_mac_1, dst_mac_0;
 219         u8 src_mac_1, src_mac_0, dst_mac_5, dst_mac_4;
 220         u8 src_mac_5, src_mac_4, src_mac_3, src_mac_2;
 221 #endif
 222 };
 223
 224
 225 #define rx_desc_phys(port, n)   ((port)->desc_tab_phys +                \
 226                                  (n) * sizeof(struct desc))
 227 #define rx_desc_ptr(port, n)    (&(port)->desc_tab[n])
 228
 229 #define tx_desc_phys(port, n)   ((port)->desc_tab_phys +                \
 230                                  ((n) + RX_DESCS) * sizeof(struct desc))
 231 #define tx_desc_ptr(port, n)    (&(port)->desc_tab[(n) + RX_DESCS])
 232
 233 #ifndef __ARMEB__
 234 static inline void memcpy_swab32(u32 *dest, u32 *src, int cnt)
 235 {
 236         int i;
 237         for (i = 0; i < cnt; i++)
 238                 dest[i] = swab32(src[i]);
 239 }
 240 #endif
 241
 242 static spinlock_t mdio_lock;
 243 static struct eth_regs __iomem *mdio_regs; /* mdio command and status only */
 244 struct mii_bus *mdio_bus;
 245 static int ports_open;
 246 static struct port *npe_port_tab[MAX_NPES];
 247 static struct dma_pool *dma_pool;
 248
 249
 250 static int ixp4xx_mdio_cmd(struct mii_bus *bus, int phy_id, int location,
 251                            int write, u16 cmd)
 252 {
 253         int cycles = 0;
 254
 255         if (__raw_readl(&mdio_regs->mdio_command[3]) & 0x80) {
 256                 printk(KERN_ERR "%s: MII not ready to transmit\n", bus->name);
 257                 return -1;
 258         }
 259
 260         if (write) {
 261                 __raw_writel(cmd & 0xFF, &mdio_regs->mdio_command[0]);
 262                 __raw_writel(cmd >> 8, &mdio_regs->mdio_command[1]);
 263         }
 264         __raw_writel(((phy_id << 5) | location) & 0xFF,
 265                      &mdio_regs->mdio_command[2]);
 266         __raw_writel((phy_id >> 3) | (write << 2) | 0x80 /* GO */,
 267                      &mdio_regs->mdio_command[3]);
 268
 269         while ((cycles < MAX_MDIO_RETRIES) &&
 270                (__raw_readl(&mdio_regs->mdio_command[3]) & 0x80)) {
 271                 udelay(1);
 272                 cycles++;
 273         }
 274
 275         if (cycles == MAX_MDIO_RETRIES) {
 276                 printk(KERN_ERR "%s #%i: MII write failed\n", bus->name,
 277                        phy_id);
 278                 return -1;
 279         }
 280
 281 #if DEBUG_MDIO
 282         printk(KERN_DEBUG "%s #%i: mdio_%s() took %i cycles\n", bus->name,
 283                phy_id, write ? "write" : "read", cycles);
 284 #endif
 285
 286         if (write)
 287                 return 0;
 288
 289         if (__raw_readl(&mdio_regs->mdio_status[3]) & 0x80) {
 290 #if DEBUG_MDIO
 291                 printk(KERN_DEBUG "%s #%i: MII read failed\n", bus->name,
 292                        phy_id);
 293 #endif
 294                 return 0xFFFF; /* don't return error */
 295         }
 296
 297         return (__raw_readl(&mdio_regs->mdio_status[0]) & 0xFF) |
 298                 ((__raw_readl(&mdio_regs->mdio_status[1]) & 0xFF) << 8);
 299 }
 300
 301 static int ixp4xx_mdio_read(struct mii_bus *bus, int phy_id, int location)
 302 {
 303         unsigned long flags;
 304         int ret;
 305
 306         spin_lock_irqsave(&mdio_lock, flags);
 307         ret = ixp4xx_mdio_cmd(bus, phy_id, location, 0, 0);
 308         spin_unlock_irqrestore(&mdio_lock, flags);
 309 #if DEBUG_MDIO
 310         printk(KERN_DEBUG "%s #%i: MII read [%i] -> 0x%X\n", bus->name,
 311                phy_id, location, ret);
 312 #endif
 313         return ret;
 314 }
 315
 316 static int ixp4xx_mdio_write(struct mii_bus *bus, int phy_id, int location,
 317                              u16 val)
 318 {
 319         unsigned long flags;
 320         int ret;
 321
 322         spin_lock_irqsave(&mdio_lock, flags);
 323         ret = ixp4xx_mdio_cmd(bus, phy_id, location, 1, val);
 324         spin_unlock_irqrestore(&mdio_lock, flags);
 325 #if DEBUG_MDIO
 326         printk(KERN_DEBUG "%s #%i: MII read [%i] <- 0x%X, err = %i\n",
 327                bus->name, phy_id, location, val, ret);
 328 #endif
 329         return ret;
 330 }
 331
 332 static int ixp4xx_mdio_register(void)
 333 {
 334         int err;
 335
 336         if (!(mdio_bus = mdiobus_alloc()))
 337                 return -ENOMEM;
 338
 339         /* All MII PHY accesses use NPE-B Ethernet registers */
 340         spin_lock_init(&mdio_lock);
 341         mdio_regs = (struct eth_regs __iomem *)IXP4XX_EthB_BASE_VIRT;
 342         __raw_writel(DEFAULT_CORE_CNTRL, &mdio_regs->core_control);
 343
 344         mdio_bus->name = "IXP4xx MII Bus";
 345         mdio_bus->read = &ixp4xx_mdio_read;
 346         mdio_bus->write = &ixp4xx_mdio_write;
 347         strcpy(mdio_bus->id, "0");
 348
 349         if ((err = mdiobus_register(mdio_bus)))
 350                 mdiobus_free(mdio_bus);
 351         return err;
 352 }
 353
 354 static void ixp4xx_mdio_remove(void)
 355 {
 356         mdiobus_unregister(mdio_bus);
 357         mdiobus_free(mdio_bus);
 358 }
 359
 360
 361 static void ixp4xx_adjust_link(struct net_device *dev)
 362 {
 363         struct port *port = netdev_priv(dev);
 364         struct phy_device *phydev = port->phydev;
 365
 366         if (!phydev->link) {
 367                 if (port->speed) {
 368                         port->speed = 0;
 369                         printk(KERN_INFO "%s: link down\n", dev->name);
 370                 }
 371                 return;
 372         }
 373
 374         if (port->speed == phydev->speed && port->duplex == phydev->duplex)
 375                 return;
 376
 377         port->speed = phydev->speed;
 378         port->duplex = phydev->duplex;
 379
 380         if (port->duplex)
 381                 __raw_writel(DEFAULT_TX_CNTRL0 & ~TX_CNTRL0_HALFDUPLEX,
 382                              &port->regs->tx_control[0]);
 383         else
 384                 __raw_writel(DEFAULT_TX_CNTRL0 | TX_CNTRL0_HALFDUPLEX,
 385                              &port->regs->tx_control[0]);
 386
 387         printk(KERN_INFO "%s: link up, speed %u Mb/s, %s duplex\n",
 388                dev->name, port->speed, port->duplex ? "full" : "half");
 389 }
 390
 391
 392 static inline void debug_pkt(struct net_device *dev, const char *func,
 393                              u8 *data, int len)
 394 {
 395 #if DEBUG_PKT_BYTES
 396         int i;
 397
 398         printk(KERN_DEBUG "%s: %s(%i) ", dev->name, func, len);
 399         for (i = 0; i < len; i++) {
 400                 if (i >= DEBUG_PKT_BYTES)
 401                         break;
 402                 printk("%s%02X",
 403                        ((i == 6) || (i == 12) || (i >= 14)) ? " " : "",
 404                        data[i]);
 405         }
 406         printk("\n");
 407 #endif
 408 }
 409
 410
 411 static inline void debug_desc(u32 phys, struct desc *desc)
 412 {
 413 #if DEBUG_DESC
 414         printk(KERN_DEBUG "%X: %X %3X %3X %08X %2X < %2X %4X %X"
 415                " %X %X %02X%02X%02X%02X%02X%02X < %02X%02X%02X%02X%02X%02X\n",
 416                phys, desc->next, desc->buf_len, desc->pkt_len,
 417                desc->data, desc->dest_id, desc->src_id, desc->flags,
 418                desc->qos, desc->padlen, desc->vlan_tci,
 419                desc->dst_mac_0, desc->dst_mac_1, desc->dst_mac_2,
 420                desc->dst_mac_3, desc->dst_mac_4, desc->dst_mac_5,
 421                desc->src_mac_0, desc->src_mac_1, desc->src_mac_2,
 422                desc->src_mac_3, desc->src_mac_4, desc->src_mac_5);
 423 #endif
 424 }
 425
 426 static inline void debug_queue(unsigned int queue, int is_get, u32 phys)
 427 {
 428 #if DEBUG_QUEUES
 429         static struct {
 430                 int queue;
 431                 char *name;
 432         } names[] = {
 433                 { TX_QUEUE(0x10), "TX#0 " },
 434                 { TX_QUEUE(0x20), "TX#1 " },
 435                 { TX_QUEUE(0x00), "TX#2 " },
 436                 { RXFREE_QUEUE(0x10), "RX-free#0 " },
 437                 { RXFREE_QUEUE(0x20), "RX-free#1 " },
 438                 { RXFREE_QUEUE(0x00), "RX-free#2 " },
 439                 { TXDONE_QUEUE, "TX-done " },
 440         };
 441         int i;
 442
 443         for (i = 0; i < ARRAY_SIZE(names); i++)
 444                 if (names[i].queue == queue)
 445                         break;
 446
 447         printk(KERN_DEBUG "Queue %i %s%s %X\n", queue,
 448                i < ARRAY_SIZE(names) ? names[i].name : "",
 449                is_get ? "->" : "<-", phys);
 450 #endif
 451 }
 452
 453 static inline u32 queue_get_entry(unsigned int queue)
 454 {
 455         u32 phys = qmgr_get_entry(queue);
 456         debug_queue(queue, 1, phys);
 457         return phys;
 458 }
 459
 460 static inline int queue_get_desc(unsigned int queue, struct port *port,
 461                                  int is_tx)
 462 {
 463         u32 phys, tab_phys, n_desc;
 464         struct desc *tab;
 465
 466         if (!(phys = queue_get_entry(queue)))
 467                 return -1;
 468
 469         phys &= ~0x1F; /* mask out non-address bits */
 470         tab_phys = is_tx ? tx_desc_phys(port, 0) : rx_desc_phys(port, 0);
 471         tab = is_tx ? tx_desc_ptr(port, 0) : rx_desc_ptr(port, 0);
 472         n_desc = (phys - tab_phys) / sizeof(struct desc);
 473         BUG_ON(n_desc >= (is_tx ? TX_DESCS : RX_DESCS));
 474         debug_desc(phys, &tab[n_desc]);
 475         BUG_ON(tab[n_desc].next);
 476         return n_desc;
 477 }
 478
 479 static inline void queue_put_desc(unsigned int queue, u32 phys,
 480                                   struct desc *desc)
 481 {
 482         debug_queue(queue, 0, phys);
 483         debug_desc(phys, desc);
 484         BUG_ON(phys & 0x1F);
 485         qmgr_put_entry(queue, phys);
 486         BUG_ON(qmgr_stat_overflow(queue));
 487 }
 488
 489
 490 static inline void dma_unmap_tx(struct port *port, struct desc *desc)
 491 {
 492 #ifdef __ARMEB__
 493         dma_unmap_single(&port->netdev->dev, desc->data,
 494                          desc->buf_len, DMA_TO_DEVICE);
 495 #else
 496         dma_unmap_single(&port->netdev->dev, desc->data & ~3,
 497                          ALIGN((desc->data & 3) + desc->buf_len, 4),
 498                          DMA_TO_DEVICE);
 499 #endif
 500 }
 501
 502
 503 static void eth_rx_irq(void *pdev)
 504 {
 505         struct net_device *dev = pdev;
 506         struct port *port = netdev_priv(dev);
 507
 508 #if DEBUG_RX
 509         printk(KERN_DEBUG "%s: eth_rx_irq\n", dev->name);
 510 #endif
 511         qmgr_disable_irq(port->plat->rxq);
 512         netif_rx_schedule(dev, &port->napi);
 513 }
 514
 515 static int eth_poll(struct napi_struct *napi, int budget)
 516 {
 517         struct port *port = container_of(napi, struct port, napi);
 518         struct net_device *dev = port->netdev;
 519         unsigned int rxq = port->plat->rxq, rxfreeq = RXFREE_QUEUE(port->id);
 520         int received = 0;
 521
 522 #if DEBUG_RX
 523         printk(KERN_DEBUG "%s: eth_poll\n", dev->name);
 524 #endif
 525
 526         while (received < budget) {
 527                 struct sk_buff *skb;
 528                 struct desc *desc;
 529                 int n;
 530 #ifdef __ARMEB__
 531                 struct sk_buff *temp;
 532                 u32 phys;
 533 #endif
 534
 535                 if ((n = queue_get_desc(rxq, port, 0)) < 0) {
 536 #if DEBUG_RX
 537                         printk(KERN_DEBUG "%s: eth_poll netif_rx_complete\n",
 538                                dev->name);
 539 #endif
 540                         netif_rx_complete(dev, napi);
 541                         qmgr_enable_irq(rxq);
 542                         if (!qmgr_stat_empty(rxq) &&
 543                             netif_rx_reschedule(dev, napi)) {
 544 #if DEBUG_RX
 545                                 printk(KERN_DEBUG "%s: eth_poll"
 546                                        " netif_rx_reschedule successed\n",
 547                                        dev->name);
 548 #endif
 549                                 qmgr_disable_irq(rxq);
 550                                 continue;
 551                         }
 552 #if DEBUG_RX
 553                         printk(KERN_DEBUG "%s: eth_poll all done\n",
 554                                dev->name);
 555 #endif
 556                         return received; /* all work done */
 557                 }
 558
 559                 desc = rx_desc_ptr(port, n);
 560
 561 #ifdef __ARMEB__
 562                 if ((skb = netdev_alloc_skb(dev, RX_BUFF_SIZE))) {
 563                         phys = dma_map_single(&dev->dev, skb->data,
 564                                               RX_BUFF_SIZE, DMA_FROM_DEVICE);
 565                         if (dma_mapping_error(&dev->dev, phys)) {
 566                                 dev_kfree_skb(skb);
 567                                 skb = NULL;
 568                         }
 569                 }
 570 #else
 571                 skb = netdev_alloc_skb(dev,
 572                                        ALIGN(NET_IP_ALIGN + desc->pkt_len, 4));
 573 #endif
 574
 575                 if (!skb) {
 576                         dev->stats.rx_dropped++;
 577                         /* put the desc back on RX-ready queue */
 578                         desc->buf_len = MAX_MRU;
 579                         desc->pkt_len = 0;
 580                         queue_put_desc(rxfreeq, rx_desc_phys(port, n), desc);
 581                         continue;
 582                 }
 583
 584                 /* process received frame */
 585 #ifdef __ARMEB__
 586                 temp = skb;
 587                 skb = port->rx_buff_tab[n];
 588                 dma_unmap_single(&dev->dev, desc->data - NET_IP_ALIGN,
 589                                  RX_BUFF_SIZE, DMA_FROM_DEVICE);
 590 #else
 591                 dma_sync_single(&dev->dev, desc->data - NET_IP_ALIGN,
 592                                 RX_BUFF_SIZE, DMA_FROM_DEVICE);
 593                 memcpy_swab32((u32 *)skb->data, (u32 *)port->rx_buff_tab[n],
 594                               ALIGN(NET_IP_ALIGN + desc->pkt_len, 4) / 4);
 595 #endif
 596                 skb_reserve(skb, NET_IP_ALIGN);
 597                 skb_put(skb, desc->pkt_len);
 598
 599                 debug_pkt(dev, "eth_poll", skb->data, skb->len);
 600
 601                 skb->protocol = eth_type_trans(skb, dev);
 602                 dev->stats.rx_packets++;
 603                 dev->stats.rx_bytes += skb->len;
 604                 netif_receive_skb(skb);
 605
 606                 /* put the new buffer on RX-free queue */
 607 #ifdef __ARMEB__
 608                 port->rx_buff_tab[n] = temp;
 609                 desc->data = phys + NET_IP_ALIGN;
 610 #endif
 611                 desc->buf_len = MAX_MRU;
 612                 desc->pkt_len = 0;
 613                 queue_put_desc(rxfreeq, rx_desc_phys(port, n), desc);
 614                 received++;
 615         }
 616
 617 #if DEBUG_RX
 618         printk(KERN_DEBUG "eth_poll(): end, not all work done\n");
 619 #endif
 620         return received;                /* not all work done */
 621 }
 622
 623
 624 static void eth_txdone_irq(void *unused)
 625 {
 626         u32 phys;
 627
 628 #if DEBUG_TX
 629         printk(KERN_DEBUG DRV_NAME ": eth_txdone_irq\n");
 630 #endif
 631         while ((phys = queue_get_entry(TXDONE_QUEUE)) != 0) {
 632                 u32 npe_id, n_desc;
 633                 struct port *port;
 634                 struct desc *desc;
 635                 int start;
 636
 637                 npe_id = phys & 3;
 638                 BUG_ON(npe_id >= MAX_NPES);
 639                 port = npe_port_tab[npe_id];
 640                 BUG_ON(!port);
 641                 phys &= ~0x1F; /* mask out non-address bits */
 642                 n_desc = (phys - tx_desc_phys(port, 0)) / sizeof(struct desc);
 643                 BUG_ON(n_desc >= TX_DESCS);
 644                 desc = tx_desc_ptr(port, n_desc);
 645                 debug_desc(phys, desc);
 646
 647                 if (port->tx_buff_tab[n_desc]) { /* not the draining packet */
 648                         port->netdev->stats.tx_packets++;
 649                         port->netdev->stats.tx_bytes += desc->pkt_len;
 650
 651                         dma_unmap_tx(port, desc);
 652 #if DEBUG_TX
 653                         printk(KERN_DEBUG "%s: eth_txdone_irq free %p\n",
 654                                port->netdev->name, port->tx_buff_tab[n_desc]);
 655 #endif
 656                         free_buffer_irq(port->tx_buff_tab[n_desc]);
 657                         port->tx_buff_tab[n_desc] = NULL;
 658                 }
 659
 660                 start = qmgr_stat_empty(port->plat->txreadyq);
 661                 queue_put_desc(port->plat->txreadyq, phys, desc);
 662                 if (start) {
 663 #if DEBUG_TX
 664                         printk(KERN_DEBUG "%s: eth_txdone_irq xmit ready\n",
 665                                port->netdev->name);
 666 #endif
 667                         netif_wake_queue(port->netdev);
 668                 }
 669         }
 670 }
 671
 672 static int eth_xmit(struct sk_buff *skb, struct net_device *dev)
 673 {
 674         struct port *port = netdev_priv(dev);
 675         unsigned int txreadyq = port->plat->txreadyq;
 676         int len, offset, bytes, n;
 677         void *mem;
 678         u32 phys;
 679         struct desc *desc;
 680
 681 #if DEBUG_TX
 682         printk(KERN_DEBUG "%s: eth_xmit\n", dev->name);
 683 #endif
 684
 685         if (unlikely(skb->len > MAX_MRU)) {
 686                 dev_kfree_skb(skb);
 687                 dev->stats.tx_errors++;
 688                 return NETDEV_TX_OK;
 689         }
 690
 691         debug_pkt(dev, "eth_xmit", skb->data, skb->len);
 692
 693         len = skb->len;
 694 #ifdef __ARMEB__
 695         offset = 0; /* no need to keep alignment */
 696         bytes = len;
 697         mem = skb->data;
 698 #else
 699         offset = (int)skb->data & 3; /* keep 32-bit alignment */
 700         bytes = ALIGN(offset + len, 4);
 701         if (!(mem = kmalloc(bytes, GFP_ATOMIC))) {
 702                 dev_kfree_skb(skb);
 703                 dev->stats.tx_dropped++;
 704                 return NETDEV_TX_OK;
 705         }
 706         memcpy_swab32(mem, (u32 *)((int)skb->data & ~3), bytes / 4);
 707         dev_kfree_skb(skb);
 708 #endif
 709
 710         phys = dma_map_single(&dev->dev, mem, bytes, DMA_TO_DEVICE);
 711         if (dma_mapping_error(&dev->dev, phys)) {
 712 #ifdef __ARMEB__
 713                 dev_kfree_skb(skb);
 714 #else
 715                 kfree(mem);
 716 #endif
 717                 dev->stats.tx_dropped++;
 718                 return NETDEV_TX_OK;
 719         }
 720
 721         n = queue_get_desc(txreadyq, port, 1);
 722         BUG_ON(n < 0);
 723         desc = tx_desc_ptr(port, n);
 724
 725 #ifdef __ARMEB__
 726         port->tx_buff_tab[n] = skb;
 727 #else
 728         port->tx_buff_tab[n] = mem;
 729 #endif
 730         desc->data = phys + offset;
 731         desc->buf_len = desc->pkt_len = len;
 732
 733         /* NPE firmware pads short frames with zeros internally */
 734         wmb();
 735         queue_put_desc(TX_QUEUE(port->id), tx_desc_phys(port, n), desc);
 736         dev->trans_start = jiffies;
 737
 738         if (qmgr_stat_empty(txreadyq)) {
 739 #if DEBUG_TX
 740                 printk(KERN_DEBUG "%s: eth_xmit queue full\n", dev->name);
 741 #endif
 742                 netif_stop_queue(dev);
 743                 /* we could miss TX ready interrupt */
 744                 if (!qmgr_stat_empty(txreadyq)) {
 745 #if DEBUG_TX
 746                         printk(KERN_DEBUG "%s: eth_xmit ready again\n",
 747                                dev->name);
 748 #endif
 749                         netif_wake_queue(dev);
 750                 }
 751         }
 752
 753 #if DEBUG_TX
 754         printk(KERN_DEBUG "%s: eth_xmit end\n", dev->name);
 755 #endif
 756         return NETDEV_TX_OK;
 757 }
 758
 759
 760 static void eth_set_mcast_list(struct net_device *dev)
 761 {
 762         struct port *port = netdev_priv(dev);
 763         struct dev_mc_list *mclist = dev->mc_list;
 764         u8 diffs[ETH_ALEN], *addr;
 765         int cnt = dev->mc_count, i;
 766
 767         if ((dev->flags & IFF_PROMISC) || !mclist || !cnt) {
 768                 __raw_writel(DEFAULT_RX_CNTRL0 & ~RX_CNTRL0_ADDR_FLTR_EN,
 769                              &port->regs->rx_control[0]);
 770                 return;
 771         }
 772
 773         memset(diffs, 0, ETH_ALEN);
 774         addr = mclist->dmi_addr; /* first MAC address */
 775
 776         while (--cnt && (mclist = mclist->next))
 777                 for (i = 0; i < ETH_ALEN; i++)
 778                         diffs[i] |= addr[i] ^ mclist->dmi_addr[i];
 779
 780         for (i = 0; i < ETH_ALEN; i++) {
 781                 __raw_writel(addr[i], &port->regs->mcast_addr[i]);
 782                 __raw_writel(~diffs[i], &port->regs->mcast_mask[i]);
 783         }
 784
 785         __raw_writel(DEFAULT_RX_CNTRL0 | RX_CNTRL0_ADDR_FLTR_EN,
 786                      &port->regs->rx_control[0]);
 787 }
 788
 789
 790 static int eth_ioctl(struct net_device *dev, struct ifreq *req, int cmd)
 791 {
 792         struct port *port = netdev_priv(dev);
 793
 794         if (!netif_running(dev))
 795                 return -EINVAL;
 796         return phy_mii_ioctl(port->phydev, if_mii(req), cmd);
 797 }
 798
 799 /* ethtool support */
 800
 801 static void ixp4xx_get_drvinfo(struct net_device *dev,
 802                                struct ethtool_drvinfo *info)
 803 {
 804         struct port *port = netdev_priv(dev);
 805         strcpy(info->driver, DRV_NAME);
 806         snprintf(info->fw_version, sizeof(info->fw_version), "%u:%u:%u:%u",
 807                  port->firmware[0], port->firmware[1],
 808                  port->firmware[2], port->firmware[3]);
 809         strcpy(info->bus_info, "internal");
 810 }
 811
 812 static int ixp4xx_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
 813 {
 814         struct port *port = netdev_priv(dev);
 815         return phy_ethtool_gset(port->phydev, cmd);
 816 }
 817
 818 static int ixp4xx_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
 819 {
 820         struct port *port = netdev_priv(dev);
 821         return phy_ethtool_sset(port->phydev, cmd);
 822 }
 823
 824 static int ixp4xx_nway_reset(struct net_device *dev)
 825 {
 826         struct port *port = netdev_priv(dev);
 827         return phy_start_aneg(port->phydev);
 828 }
 829
 830 static struct ethtool_ops ixp4xx_ethtool_ops = {
 831         .get_drvinfo = ixp4xx_get_drvinfo,
 832         .get_settings = ixp4xx_get_settings,
 833         .set_settings = ixp4xx_set_settings,
 834         .nway_reset = ixp4xx_nway_reset,
 835         .get_link = ethtool_op_get_link,
 836 };
 837
 838
 839 static int request_queues(struct port *port)
 840 {
 841         int err;
 842
 843         err = qmgr_request_queue(RXFREE_QUEUE(port->id), RX_DESCS, 0, 0);
 844         if (err)
 845                 return err;
 846
 847         err = qmgr_request_queue(port->plat->rxq, RX_DESCS, 0, 0);
 848         if (err)
 849                 goto rel_rxfree;
 850
 851         err = qmgr_request_queue(TX_QUEUE(port->id), TX_DESCS, 0, 0);
 852         if (err)
 853                 goto rel_rx;
 854
 855         err = qmgr_request_queue(port->plat->txreadyq, TX_DESCS, 0, 0);
 856         if (err)
 857                 goto rel_tx;
 858
 859         /* TX-done queue handles skbs sent out by the NPEs */
 860         if (!ports_open) {
 861                 err = qmgr_request_queue(TXDONE_QUEUE, TXDONE_QUEUE_LEN, 0, 0);
 862                 if (err)
 863                         goto rel_txready;
 864         }
 865         return 0;
 866
 867 rel_txready:
 868         qmgr_release_queue(port->plat->txreadyq);
 869 rel_tx:
 870         qmgr_release_queue(TX_QUEUE(port->id));
 871 rel_rx:
 872         qmgr_release_queue(port->plat->rxq);
 873 rel_rxfree:
 874         qmgr_release_queue(RXFREE_QUEUE(port->id));
 875         printk(KERN_DEBUG "%s: unable to request hardware queues\n",
 876                port->netdev->name);
 877         return err;
 878 }
 879
 880 static void release_queues(struct port *port)
 881 {
 882         qmgr_release_queue(RXFREE_QUEUE(port->id));
 883         qmgr_release_queue(port->plat->rxq);
 884         qmgr_release_queue(TX_QUEUE(port->id));
 885         qmgr_release_queue(port->plat->txreadyq);
 886
 887         if (!ports_open)
 888                 qmgr_release_queue(TXDONE_QUEUE);
 889 }
 890
 891 static int init_queues(struct port *port)
 892 {
 893         int i;
 894
 895         if (!ports_open)
 896                 if (!(dma_pool = dma_pool_create(DRV_NAME, NULL,
 897                                                  POOL_ALLOC_SIZE, 32, 0)))
 898                         return -ENOMEM;
 899
 900         if (!(port->desc_tab = dma_pool_alloc(dma_pool, GFP_KERNEL,
 901                                               &port->desc_tab_phys)))
 902                 return -ENOMEM;
 903         memset(port->desc_tab, 0, POOL_ALLOC_SIZE);
 904         memset(port->rx_buff_tab, 0, sizeof(port->rx_buff_tab)); /* tables */
 905         memset(port->tx_buff_tab, 0, sizeof(port->tx_buff_tab));
 906
 907         /* Setup RX buffers */
 908         for (i = 0; i < RX_DESCS; i++) {
 909                 struct desc *desc = rx_desc_ptr(port, i);
 910                 buffer_t *buff; /* skb or kmalloc()ated memory */
 911                 void *data;
 912 #ifdef __ARMEB__
 913                 if (!(buff = netdev_alloc_skb(port->netdev, RX_BUFF_SIZE)))
 914                         return -ENOMEM;
 915                 data = buff->data;
 916 #else
 917                 if (!(buff = kmalloc(RX_BUFF_SIZE, GFP_KERNEL)))
 918                         return -ENOMEM;
 919                 data = buff;
 920 #endif
 921                 desc->buf_len = MAX_MRU;
 922                 desc->data = dma_map_single(&port->netdev->dev, data,
 923                                             RX_BUFF_SIZE, DMA_FROM_DEVICE);
 924                 if (dma_mapping_error(&port->netdev->dev, desc->data)) {
 925                         free_buffer(buff);
 926                         return -EIO;
 927                 }
 928                 desc->data += NET_IP_ALIGN;
 929                 port->rx_buff_tab[i] = buff;
 930         }
 931
 932         return 0;
 933 }
 934
 935 static void destroy_queues(struct port *port)
 936 {
 937         int i;
 938
 939         if (port->desc_tab) {
 940                 for (i = 0; i < RX_DESCS; i++) {
 941                         struct desc *desc = rx_desc_ptr(port, i);
 942                         buffer_t *buff = port->rx_buff_tab[i];
 943                         if (buff) {
 944                                 dma_unmap_single(&port->netdev->dev,
 945                                                  desc->data - NET_IP_ALIGN,
 946                                                  RX_BUFF_SIZE, DMA_FROM_DEVICE);
 947                                 free_buffer(buff);
 948                         }
 949                 }
 950                 for (i = 0; i < TX_DESCS; i++) {
 951                         struct desc *desc = tx_desc_ptr(port, i);
 952                         buffer_t *buff = port->tx_buff_tab[i];
 953                         if (buff) {
 954                                 dma_unmap_tx(port, desc);
 955                                 free_buffer(buff);
 956                         }
 957                 }
 958                 dma_pool_free(dma_pool, port->desc_tab, port->desc_tab_phys);
 959                 port->desc_tab = NULL;
 960         }
 961
 962         if (!ports_open && dma_pool) {
 963                 dma_pool_destroy(dma_pool);
 964                 dma_pool = NULL;
 965         }
 966 }
 967
 968 static int eth_open(struct net_device *dev)
 969 {
 970         struct port *port = netdev_priv(dev);
 971         struct npe *npe = port->npe;
 972         struct msg msg;
 973         int i, err;
 974
 975         if (!npe_running(npe)) {
 976                 err = npe_load_firmware(npe, npe_name(npe), &dev->dev);
 977                 if (err)
 978                         return err;
 979
 980                 if (npe_recv_message(npe, &msg, "ETH_GET_STATUS")) {
 981                         printk(KERN_ERR "%s: %s not responding\n", dev->name,
 982                                npe_name(npe));
 983                         return -EIO;
 984                 }
 985                 port->firmware[0] = msg.byte4;
 986                 port->firmware[1] = msg.byte5;
 987                 port->firmware[2] = msg.byte6;
 988                 port->firmware[3] = msg.byte7;
 989         }
 990
 991         memset(&msg, 0, sizeof(msg));
 992         msg.cmd = NPE_VLAN_SETRXQOSENTRY;
 993         msg.eth_id = port->id;
 994         msg.byte5 = port->plat->rxq | 0x80;
 995         msg.byte7 = port->plat->rxq << 4;
 996         for (i = 0; i < 8; i++) {
 997                 msg.byte3 = i;
 998                 if (npe_send_recv_message(port->npe, &msg, "ETH_SET_RXQ"))
 999                         return -EIO;
1000         }
1001
1002         msg.cmd = NPE_EDB_SETPORTADDRESS;
1003         msg.eth_id = PHYSICAL_ID(port->id);
1004         msg.byte2 = dev->dev_addr[0];
1005         msg.byte3 = dev->dev_addr[1];
1006         msg.byte4 = dev->dev_addr[2];
1007         msg.byte5 = dev->dev_addr[3];
1008         msg.byte6 = dev->dev_addr[4];
1009         msg.byte7 = dev->dev_addr[5];
1010         if (npe_send_recv_message(port->npe, &msg, "ETH_SET_MAC"))
1011                 return -EIO;
1012
1013         memset(&msg, 0, sizeof(msg));
1014         msg.cmd = NPE_FW_SETFIREWALLMODE;
1015         msg.eth_id = port->id;
1016         if (npe_send_recv_message(port->npe, &msg, "ETH_SET_FIREWALL_MODE"))
1017                 return -EIO;
1018
1019         if ((err = request_queues(port)) != 0)
1020                 return err;
1021
1022         if ((err = init_queues(port)) != 0) {
1023                 destroy_queues(port);
1024                 release_queues(port);
1025                 return err;
1026         }
1027
1028         port->speed = 0;        /* force "link up" message */
1029         phy_start(port->phydev);
1030
1031         for (i = 0; i < ETH_ALEN; i++)
1032                 __raw_writel(dev->dev_addr[i], &port->regs->hw_addr[i]);
1033         __raw_writel(0x08, &port->regs->random_seed);
1034         __raw_writel(0x12, &port->regs->partial_empty_threshold);
1035         __raw_writel(0x30, &port->regs->partial_full_threshold);
1036         __raw_writel(0x08, &port->regs->tx_start_bytes);
1037         __raw_writel(0x15, &port->regs->tx_deferral);
1038         __raw_writel(0x08, &port->regs->tx_2part_deferral[0]);
1039         __raw_writel(0x07, &port->regs->tx_2part_deferral[1]);
1040         __raw_writel(0x80, &port->regs->slot_time);
1041         __raw_writel(0x01, &port->regs->int_clock_threshold);
1042
1043         /* Populate queues with buffers, no failure after this point */
1044         for (i = 0; i < TX_DESCS; i++)
1045                 queue_put_desc(port->plat->txreadyq,
1046                                tx_desc_phys(port, i), tx_desc_ptr(port, i));
1047
1048         for (i = 0; i < RX_DESCS; i++)
1049                 queue_put_desc(RXFREE_QUEUE(port->id),
1050                                rx_desc_phys(port, i), rx_desc_ptr(port, i));
1051
1052         __raw_writel(TX_CNTRL1_RETRIES, &port->regs->tx_control[1]);
1053         __raw_writel(DEFAULT_TX_CNTRL0, &port->regs->tx_control[0]);
1054         __raw_writel(0, &port->regs->rx_control[1]);
1055         __raw_writel(DEFAULT_RX_CNTRL0, &port->regs->rx_control[0]);
1056
1057         napi_enable(&port->napi);
1058         eth_set_mcast_list(dev);
1059         netif_start_queue(dev);
1060
1061         qmgr_set_irq(port->plat->rxq, QUEUE_IRQ_SRC_NOT_EMPTY,
1062                      eth_rx_irq, dev);
1063         if (!ports_open) {
1064                 qmgr_set_irq(TXDONE_QUEUE, QUEUE_IRQ_SRC_NOT_EMPTY,
1065                              eth_txdone_irq, NULL);
1066                 qmgr_enable_irq(TXDONE_QUEUE);
1067         }
1068         ports_open++;
1069         /* we may already have RX data, enables IRQ */
1070         netif_rx_schedule(dev, &port->napi);
1071         return 0;
1072 }
1073
1074 static int eth_close(struct net_device *dev)
1075 {
1076         struct port *port = netdev_priv(dev);
1077         struct msg msg;
1078         int buffs = RX_DESCS; /* allocated RX buffers */
1079         int i;
1080
1081         ports_open--;
1082         qmgr_disable_irq(port->plat->rxq);
1083         napi_disable(&port->napi);
1084         netif_stop_queue(dev);
1085
1086         while (queue_get_desc(RXFREE_QUEUE(port->id), port, 0) >= 0)
1087                 buffs--;
1088
1089         memset(&msg, 0, sizeof(msg));
1090         msg.cmd = NPE_SETLOOPBACK_MODE;
1091         msg.eth_id = port->id;
1092         msg.byte3 = 1;
1093         if (npe_send_recv_message(port->npe, &msg, "ETH_ENABLE_LOOPBACK"))
1094                 printk(KERN_CRIT "%s: unable to enable loopback\n", dev->name);
1095
1096         i = 0;
1097         do {                    /* drain RX buffers */
1098                 while (queue_get_desc(port->plat->rxq, port, 0) >= 0)
1099                         buffs--;
1100                 if (!buffs)
1101                         break;
1102                 if (qmgr_stat_empty(TX_QUEUE(port->id))) {
1103                         /* we have to inject some packet */
1104                         struct desc *desc;
1105                         u32 phys;
1106                         int n = queue_get_desc(port->plat->txreadyq, port, 1);
1107                         BUG_ON(n < 0);
1108                         desc = tx_desc_ptr(port, n);
1109                         phys = tx_desc_phys(port, n);
1110                         desc->buf_len = desc->pkt_len = 1;
1111                         wmb();
1112                         queue_put_desc(TX_QUEUE(port->id), phys, desc);
1113                 }
1114                 udelay(1);
1115         } while (++i < MAX_CLOSE_WAIT);
1116
1117         if (buffs)
1118                 printk(KERN_CRIT "%s: unable to drain RX queue, %i buffer(s)"
1119                        " left in NPE\n", dev->name, buffs);
1120 #if DEBUG_CLOSE
1121         if (!buffs)
1122                 printk(KERN_DEBUG "Draining RX queue took %i cycles\n", i);
1123 #endif
1124
1125         buffs = TX_DESCS;
1126         while (queue_get_desc(TX_QUEUE(port->id), port, 1) >= 0)
1127                 buffs--; /* cancel TX */
1128
1129         i = 0;
1130         do {
1131                 while (queue_get_desc(port->plat->txreadyq, port, 1) >= 0)
1132                         buffs--;
1133                 if (!buffs)
1134                         break;
1135         } while (++i < MAX_CLOSE_WAIT);
1136
1137         if (buffs)
1138                 printk(KERN_CRIT "%s: unable to drain TX queue, %i buffer(s) "
1139                        "left in NPE\n", dev->name, buffs);
1140 #if DEBUG_CLOSE
1141         if (!buffs)
1142                 printk(KERN_DEBUG "Draining TX queues took %i cycles\n", i);
1143 #endif
1144
1145         msg.byte3 = 0;
1146         if (npe_send_recv_message(port->npe, &msg, "ETH_DISABLE_LOOPBACK"))
1147                 printk(KERN_CRIT "%s: unable to disable loopback\n",
1148                        dev->name);
1149
1150         phy_stop(port->phydev);
1151
1152         if (!ports_open)
1153                 qmgr_disable_irq(TXDONE_QUEUE);
1154         destroy_queues(port);
1155         release_queues(port);
1156         return 0;
1157 }
1158
1159 static int __devinit eth_init_one(struct platform_device *pdev)
1160 {
1161         struct port *port;
1162         struct net_device *dev;
1163         struct eth_plat_info *plat = pdev->dev.platform_data;
1164         u32 regs_phys;
1165         char phy_id[BUS_ID_SIZE];
1166         int err;
1167
1168         if (!(dev = alloc_etherdev(sizeof(struct port))))
1169                 return -ENOMEM;
1170
1171         SET_NETDEV_DEV(dev, &pdev->dev);
1172         port = netdev_priv(dev);
1173         port->netdev = dev;
1174         port->id = pdev->id;
1175
1176         switch (port->id) {
1177         case IXP4XX_ETH_NPEA:
1178                 port->regs = (struct eth_regs __iomem *)IXP4XX_EthA_BASE_VIRT;
1179                 regs_phys  = IXP4XX_EthA_BASE_PHYS;
1180                 break;
1181         case IXP4XX_ETH_NPEB:
1182                 port->regs = (struct eth_regs __iomem *)IXP4XX_EthB_BASE_VIRT;
1183                 regs_phys  = IXP4XX_EthB_BASE_PHYS;
1184                 break;
1185         case IXP4XX_ETH_NPEC:
1186                 port->regs = (struct eth_regs __iomem *)IXP4XX_EthC_BASE_VIRT;
1187                 regs_phys  = IXP4XX_EthC_BASE_PHYS;
1188                 break;
1189         default:
1190                 err = -ENOSYS;
1191                 goto err_free;
1192         }
1193
1194         dev->open = eth_open;
1195         dev->hard_start_xmit = eth_xmit;
1196         dev->stop = eth_close;
1197         dev->do_ioctl = eth_ioctl;
1198         dev->ethtool_ops = &ixp4xx_ethtool_ops;
1199         dev->set_multicast_list = eth_set_mcast_list;
1200         dev->tx_queue_len = 100;
1201
1202         netif_napi_add(dev, &port->napi, eth_poll, NAPI_WEIGHT);
1203
1204         if (!(port->npe = npe_request(NPE_ID(port->id)))) {
1205                 err = -EIO;
1206                 goto err_free;
1207         }
1208
1209         if (register_netdev(dev)) {
1210                 err = -EIO;
1211                 goto err_npe_rel;
1212         }
1213
1214         port->mem_res = request_mem_region(regs_phys, REGS_SIZE, dev->name);
1215         if (!port->mem_res) {
1216                 err = -EBUSY;
1217                 goto err_unreg;
1218         }
1219
1220         port->plat = plat;
1221         npe_port_tab[NPE_ID(port->id)] = port;
1222         memcpy(dev->dev_addr, plat->hwaddr, ETH_ALEN);
1223
1224         platform_set_drvdata(pdev, dev);
1225
1226         __raw_writel(DEFAULT_CORE_CNTRL | CORE_RESET,
1227                      &port->regs->core_control);
1228         udelay(50);
1229         __raw_writel(DEFAULT_CORE_CNTRL, &port->regs->core_control);
1230         udelay(50);
1231
1232         snprintf(phy_id, BUS_ID_SIZE, PHY_ID_FMT, "0", plat->phy);
1233         port->phydev = phy_connect(dev, phy_id, &ixp4xx_adjust_link, 0,
1234                                    PHY_INTERFACE_MODE_MII);
1235         if (IS_ERR(port->phydev)) {
1236                 printk(KERN_ERR "%s: Could not attach to PHY\n", dev->name);
1237                 return PTR_ERR(port->phydev);
1238         }
1239
1240         port->phydev->irq = PHY_POLL;
1241
1242         printk(KERN_INFO "%s: MII PHY %i on %s\n", dev->name, plat->phy,
1243                npe_name(port->npe));
1244
1245         return 0;
1246
1247 err_unreg:
1248         unregister_netdev(dev);
1249 err_npe_rel:
1250         npe_release(port->npe);
1251 err_free:
1252         free_netdev(dev);
1253         return err;
1254 }
1255
1256 static int __devexit eth_remove_one(struct platform_device *pdev)
1257 {
1258         struct net_device *dev = platform_get_drvdata(pdev);
1259         struct port *port = netdev_priv(dev);
1260
1261         unregister_netdev(dev);
1262         npe_port_tab[NPE_ID(port->id)] = NULL;
1263         platform_set_drvdata(pdev, NULL);
1264         npe_release(port->npe);
1265         release_resource(port->mem_res);
1266         free_netdev(dev);
1267         return 0;
1268 }
1269
1270 static struct platform_driver ixp4xx_eth_driver = {
1271         .driver.name    = DRV_NAME,
1272         .probe          = eth_init_one,
1273         .remove         = eth_remove_one,
1274 };
1275
1276 static int __init eth_init_module(void)
1277 {
1278         int err;
1279         if (!(ixp4xx_read_feature_bits() & IXP4XX_FEATURE_NPEB_ETH0))
1280                 return -ENOSYS;
1281
1282         if ((err = ixp4xx_mdio_register()))
1283                 return err;
1284         return platform_driver_register(&ixp4xx_eth_driver);
1285 }
1286
1287 static void __exit eth_cleanup_module(void)
1288 {
1289         platform_driver_unregister(&ixp4xx_eth_driver);
1290         ixp4xx_mdio_remove();
1291 }
1292
1293 MODULE_AUTHOR("Krzysztof Halasa");
1294 MODULE_DESCRIPTION("Intel IXP4xx Ethernet driver");
1295 MODULE_LICENSE("GPL v2");
1296 MODULE_ALIAS("platform:ixp4xx_eth");
1297 module_init(eth_init_module);
1298 module_exit(eth_cleanup_module);