1 /* EtherLinkXL.c: A 3Com EtherLink PCI III/XL ethernet driver for linux. */
3 Written 1996-1999 by Donald Becker.
5 This software may be used and distributed according to the terms
6 of the GNU General Public License, incorporated herein by reference.
8 This driver is for the 3Com "Vortex" and "Boomerang" series ethercards.
9 Members of the series include Fast EtherLink 3c590/3c592/3c595/3c597
10 and the EtherLink XL 3c900 and 3c905 cards.
12 Problem reports and questions should be directed to
15 The author may be reached as becker@scyld.com, or C/O
16 Scyld Computing Corporation
17 410 Severn Ave., Suite 210
20 Linux Kernel Additions:
22 0.99H+lk0.9 - David S. Miller - softnet, PCI DMA updates
23 0.99H+lk1.0 - Jeff Garzik <jgarzik@pobox.com>
24 Remove compatibility defines for kernel versions < 2.2.x.
25 Update for new 2.3.x module interface
26 LK1.1.2 (March 19, 2000)
27 * New PCI interface (jgarzik)
29 LK1.1.3 25 April 2000, Andrew Morton <andrewm@uow.edu.au>
30 - Merged with 3c575_cb.c
31 - Don't set RxComplete in boomerang interrupt enable reg
32 - spinlock in vortex_timer to protect mdio functions
33 - disable local interrupts around call to vortex_interrupt in
34 vortex_tx_timeout() (So vortex_interrupt can use spin_lock())
35 - Select window 3 in vortex_timer()'s write to Wn3_MAC_Ctrl
36 - In vortex_start_xmit(), move the lock to _after_ we've altered
37 vp->cur_tx and vp->tx_full. This defeats the race between
38 vortex_start_xmit() and vortex_interrupt which was identified
40 - Merged back support for six new cards from various sources
41 - Set vortex_have_pci if pci_module_init returns zero (fixes cardbus
43 - Tell it that 3c905C has NWAY for 100bT autoneg
44 - Fix handling of SetStatusEnd in 'Too much work..' code, as
45 per 2.3.99's 3c575_cb (Dave Hinds).
46 - Split ISR into two for vortex & boomerang
47 - Fix MOD_INC/DEC races
48 - Handle resource allocation failures.
49 - Fix 3CCFE575CT LED polarity
50 - Make tx_interrupt_mitigation the default
52 LK1.1.4 25 April 2000, Andrew Morton <andrewm@uow.edu.au>
53 - Add extra TxReset to vortex_up() to fix 575_cb hotplug initialisation probs.
54 - Put vortex_info_tbl into __devinitdata
55 - In the vortex_error StatsFull HACK, disable stats in vp->intr_enable as well
57 - Increased the loop counter in issue_and_wait from 2,000 to 4,000.
59 LK1.1.5 28 April 2000, andrewm
60 - Added powerpc defines (John Daniel <jdaniel@etresoft.com> said these work...)
61 - Some extra diagnostics
62 - In vortex_error(), reset the Tx on maxCollisions. Otherwise most
63 chips usually get a Tx timeout.
64 - Added extra_reset module parm
65 - Replaced some inline timer manip with mod_timer
66 (Franois romieu <Francois.Romieu@nic.fr>)
67 - In vortex_up(), don't make Wn3_config initialisation dependent upon has_nway
68 (this came across from 3c575_cb).
70 LK1.1.6 06 Jun 2000, andrewm
71 - Backed out the PPC defines.
72 - Use del_timer_sync(), mod_timer().
73 - Fix wrapped ulong comparison in boomerang_rx()
74 - Add IS_TORNADO, use it to suppress 3c905C checksum error msg
75 (Donald Becker, I Lee Hetherington <ilh@sls.lcs.mit.edu>)
76 - Replace union wn3_config with BFINS/BFEXT manipulation for
77 sparc64 (Pete Zaitcev, Peter Jones)
78 - In vortex_error, do_tx_reset and vortex_tx_timeout(Vortex):
79 do a netif_wake_queue() to better recover from errors. (Anders Pedersen,
81 - Print a warning on out-of-memory (rate limited to 1 per 10 secs)
82 - Added two more Cardbus 575 NICs: 5b57 and 6564 (Paul Wagland)
84 LK1.1.7 2 Jul 2000 andrewm
85 - Better handling of shared IRQs
86 - Reset the transmitter on a Tx reclaim error
87 - Fixed crash under OOM during vortex_open() (Mark Hemment)
88 - Fix Rx cessation problem during OOM (help from Mark Hemment)
89 - The spinlocks around the mdio access were blocking interrupts for 300uS.
90 Fix all this to use spin_lock_bh() within mdio_read/write
91 - Only write to TxFreeThreshold if it's a boomerang - other NICs don't
93 - Added 802.3x MAC-layer flow control support
95 LK1.1.8 13 Aug 2000 andrewm
96 - Ignore request_region() return value - already reserved if Cardbus.
97 - Merged some additional Cardbus flags from Don's 0.99Qk
98 - Some fixes for 3c556 (Fred Maciel)
99 - Fix for EISA initialisation (Jan Rekorajski)
100 - Renamed MII_XCVR_PWR and EEPROM_230 to align with 3c575_cb and D. Becker's drivers
101 - Fixed MII_XCVR_PWR for 3CCFE575CT
102 - Added INVERT_LED_PWR, used it.
103 - Backed out the extra_reset stuff
105 LK1.1.9 12 Sep 2000 andrewm
106 - Backed out the tx_reset_resume flags. It was a no-op.
107 - In vortex_error, don't reset the Tx on txReclaim errors
108 - In vortex_error, don't reset the Tx on maxCollisions errors.
109 Hence backed out all the DownListPtr logic here.
110 - In vortex_error, give Tornado cards a partial TxReset on
111 maxCollisions (David Hinds). Defined MAX_COLLISION_RESET for this.
112 - Redid some driver flags and device names based on pcmcia_cs-3.1.20.
113 - Fixed a bug where, if vp->tx_full is set when the interface
114 is downed, it remains set when the interface is upped. Bad
117 LK1.1.10 17 Sep 2000 andrewm
118 - Added EEPROM_8BIT for 3c555 (Fred Maciel)
119 - Added experimental support for the 3c556B Laptop Hurricane (Louis Gerbarg)
120 - Add HAS_NWAY to "3c900 Cyclone 10Mbps TPO"
122 LK1.1.11 13 Nov 2000 andrewm
123 - Dump MOD_INC/DEC_USE_COUNT, use SET_MODULE_OWNER
125 LK1.1.12 1 Jan 2001 andrewm (2.4.0-pre1)
126 - Call pci_enable_device before we request our IRQ (Tobias Ringstrom)
127 - Add 3c590 PCI latency timer hack to vortex_probe1 (from 0.99Ra)
128 - Added extended issue_and_wait for the 3c905CX.
129 - Look for an MII on PHY index 24 first (3c905CX oddity).
130 - Add HAS_NWAY to 3cSOHO100-TX (Brett Frankenberger)
131 - Don't free skbs we don't own on oom path in vortex_open().
134 - Added explicit `medialock' flag so we can truly
135 lock the media type down with `options'.
136 - "check ioremap return and some tidbits" (Arnaldo Carvalho de Melo <acme@conectiva.com.br>)
137 - Added and used EEPROM_NORESET for 3c556B PM resumes.
138 - Fixed leakage of vp->rx_ring.
139 - Break out separate HAS_HWCKSM device capability flag.
140 - Kill vp->tx_full (ANK)
141 - Merge zerocopy fragment handling (ANK?)
144 - Enable WOL. Can be turned on with `enable_wol' module option.
145 - EISA and PCI initialisation fixes (jgarzik, Manfred Spraul)
146 - If a device's internalconfig register reports it has NWAY,
147 use it, even if autoselect is enabled.
149 LK1.1.15 6 June 2001 akpm
150 - Prevent double counting of received bytes (Lars Christensen)
151 - Add ethtool support (jgarzik)
152 - Add module parm descriptions (Andrzej M. Krzysztofowicz)
153 - Implemented alloc_etherdev() API
154 - Special-case the 'Tx error 82' message.
156 LK1.1.16 18 July 2001 akpm
157 - Make NETIF_F_SG dependent upon nr_free_highpages(), not on CONFIG_HIGHMEM
158 - Lessen verbosity of bootup messages
159 - Fix WOL - use new PM API functions.
160 - Use netif_running() instead of vp->open in suspend/resume.
161 - Don't reset the interface logic on open/close/rmmod. It upsets
162 autonegotiation, and hence DHCP (from 0.99T).
163 - Back out EEPROM_NORESET flag because of the above (we do it for all
165 - Correct 3c982 identification string
166 - Rename wait_for_completion() to issue_and_wait() to avoid completion.h
169 LK1.1.17 18Dec01 akpm
170 - PCI ID 9805 is a Python-T, not a dual-port Cyclone. Apparently.
172 - Mask our advertised modes (vp->advertising) with our capabilities
173 (MII reg5) when deciding which duplex mode to use.
174 - Add `global_options' as default for options[]. Ditto global_enable_wol,
177 LK1.1.18 01Jul02 akpm
178 - Fix for undocumented transceiver power-up bit on some 3c566B's
179 (Donald Becker, Rahul Karnik)
181 - See http://www.zip.com.au/~akpm/linux/#3c59x-2.3 for more details.
182 - Also see Documentation/networking/vortex.txt
184 LK1.1.19 10Nov02 Marc Zyngier <maz@wild-wind.fr.eu.org>
185 - EISA sysfs integration.
189 * FIXME: This driver _could_ support MTU changing, but doesn't. See Don's hamachi.c implementation
190 * as well as other drivers
192 * NOTE: If you make 'vortex_debug' a constant (#define vortex_debug 0) the driver shrinks by 2k
193 * due to dead code elimination. There will be some performance benefits from this due to
194 * elimination of all the tests and reduced cache footprint.
198 #define DRV_NAME "3c59x"
202 /* A few values that may be tweaked. */
203 /* Keep the ring sizes a power of two for efficiency. */
204 #define TX_RING_SIZE 16
205 #define RX_RING_SIZE 32
206 #define PKT_BUF_SZ 1536 /* Size of each temporary Rx buffer.*/
208 /* "Knobs" that adjust features and parameters. */
209 /* Set the copy breakpoint for the copy-only-tiny-frames scheme.
210 Setting to > 1512 effectively disables this feature. */
212 static int rx_copybreak = 200;
214 /* ARM systems perform better by disregarding the bus-master
215 transfer capability of these cards. -- rmk */
216 static int rx_copybreak = 1513;
218 /* Allow setting MTU to a larger size, bypassing the normal ethernet setup. */
219 static const int mtu = 1500;
220 /* Maximum events (Rx packets, etc.) to handle at each interrupt. */
221 static int max_interrupt_work = 32;
222 /* Tx timeout interval (millisecs) */
223 static int watchdog = 5000;
225 /* Allow aggregation of Tx interrupts. Saves CPU load at the cost
226 * of possible Tx stalls if the system is blocking interrupts
227 * somewhere else. Undefine this to disable.
229 #define tx_interrupt_mitigation 1
231 /* Put out somewhat more debugging messages. (0: no msg, 1 minimal .. 6). */
232 #define vortex_debug debug
234 static int vortex_debug = VORTEX_DEBUG;
236 static int vortex_debug = 1;
239 #include <linux/config.h>
240 #include <linux/module.h>
241 #include <linux/kernel.h>
242 #include <linux/string.h>
243 #include <linux/timer.h>
244 #include <linux/errno.h>
245 #include <linux/in.h>
246 #include <linux/ioport.h>
247 #include <linux/slab.h>
248 #include <linux/interrupt.h>
249 #include <linux/pci.h>
250 #include <linux/mii.h>
251 #include <linux/init.h>
252 #include <linux/netdevice.h>
253 #include <linux/etherdevice.h>
254 #include <linux/skbuff.h>
255 #include <linux/ethtool.h>
256 #include <linux/highmem.h>
257 #include <linux/eisa.h>
258 #include <linux/bitops.h>
259 #include <linux/jiffies.h>
260 #include <asm/irq.h> /* For NR_IRQS only. */
262 #include <asm/uaccess.h>
264 /* Kernel compatibility defines, some common to David Hinds' PCMCIA package.
265 This is only in the support-all-kernels source code. */
267 #define RUN_AT(x) (jiffies + (x))
269 #include <linux/delay.h>
272 static char version[] __devinitdata =
273 DRV_NAME ": Donald Becker and others. www.scyld.com/network/vortex.html\n";
275 MODULE_AUTHOR("Donald Becker <becker@scyld.com>");
276 MODULE_DESCRIPTION("3Com 3c59x/3c9xx ethernet driver ");
277 MODULE_LICENSE("GPL");
280 /* Operational parameter that usually are not changed. */
282 /* The Vortex size is twice that of the original EtherLinkIII series: the
283 runtime register window, window 1, is now always mapped in.
284 The Boomerang size is twice as large as the Vortex -- it has additional
285 bus master control registers. */
286 #define VORTEX_TOTAL_SIZE 0x20
287 #define BOOMERANG_TOTAL_SIZE 0x40
289 /* Set iff a MII transceiver on any interface requires mdio preamble.
290 This only set with the original DP83840 on older 3c905 boards, so the extra
291 code size of a per-interface flag is not worthwhile. */
292 static char mii_preamble_required;
294 #define PFX DRV_NAME ": "
301 I. Board Compatibility
303 This device driver is designed for the 3Com FastEtherLink and FastEtherLink
304 XL, 3Com's PCI to 10/100baseT adapters. It also works with the 10Mbs
305 versions of the FastEtherLink cards. The supported product IDs are
306 3c590, 3c592, 3c595, 3c597, 3c900, 3c905
308 The related ISA 3c515 is supported with a separate driver, 3c515.c, included
309 with the kernel source or available from
310 cesdis.gsfc.nasa.gov:/pub/linux/drivers/3c515.html
312 II. Board-specific settings
314 PCI bus devices are configured by the system at boot time, so no jumpers
315 need to be set on the board. The system BIOS should be set to assign the
316 PCI INTA signal to an otherwise unused system IRQ line.
318 The EEPROM settings for media type and forced-full-duplex are observed.
319 The EEPROM media type should be left at the default "autoselect" unless using
320 10base2 or AUI connections which cannot be reliably detected.
322 III. Driver operation
324 The 3c59x series use an interface that's very similar to the previous 3c5x9
325 series. The primary interface is two programmed-I/O FIFOs, with an
326 alternate single-contiguous-region bus-master transfer (see next).
328 The 3c900 "Boomerang" series uses a full-bus-master interface with separate
329 lists of transmit and receive descriptors, similar to the AMD LANCE/PCnet,
330 DEC Tulip and Intel Speedo3. The first chip version retains a compatible
331 programmed-I/O interface that has been removed in 'B' and subsequent board
334 One extension that is advertised in a very large font is that the adapters
335 are capable of being bus masters. On the Vortex chip this capability was
336 only for a single contiguous region making it far less useful than the full
337 bus master capability. There is a significant performance impact of taking
338 an extra interrupt or polling for the completion of each transfer, as well
339 as difficulty sharing the single transfer engine between the transmit and
340 receive threads. Using DMA transfers is a win only with large blocks or
341 with the flawed versions of the Intel Orion motherboard PCI controller.
343 The Boomerang chip's full-bus-master interface is useful, and has the
344 currently-unused advantages over other similar chips that queued transmit
345 packets may be reordered and receive buffer groups are associated with a
348 With full-bus-master support, this driver uses a "RX_COPYBREAK" scheme.
349 Rather than a fixed intermediate receive buffer, this scheme allocates
350 full-sized skbuffs as receive buffers. The value RX_COPYBREAK is used as
351 the copying breakpoint: it is chosen to trade-off the memory wasted by
352 passing the full-sized skbuff to the queue layer for all frames vs. the
353 copying cost of copying a frame to a correctly-sized skbuff.
355 IIIC. Synchronization
356 The driver runs as two independent, single-threaded flows of control. One
357 is the send-packet routine, which enforces single-threaded use by the
358 dev->tbusy flag. The other thread is the interrupt handler, which is single
359 threaded by the hardware and other software.
363 Thanks to Cameron Spitzer and Terry Murphy of 3Com for providing development
364 3c590, 3c595, and 3c900 boards.
365 The name "Vortex" is the internal 3Com project name for the PCI ASIC, and
366 the EISA version is called "Demon". According to Terry these names come
367 from rides at the local amusement park.
369 The new chips support both ethernet (1.5K) and FDDI (4.5K) packet sizes!
370 This driver only supports ethernet packets because of the skbuff allocation
374 /* This table drives the PCI probe routines. It's mostly boilerplate in all
375 of the drivers, and will likely be provided by some future kernel.
381 enum { IS_VORTEX=1, IS_BOOMERANG=2, IS_CYCLONE=4, IS_TORNADO=8,
382 EEPROM_8BIT=0x10, /* AKPM: Uses 0x230 as the base bitmaps for EEPROM reads */
383 HAS_PWR_CTRL=0x20, HAS_MII=0x40, HAS_NWAY=0x80, HAS_CB_FNS=0x100,
384 INVERT_MII_PWR=0x200, INVERT_LED_PWR=0x400, MAX_COLLISION_RESET=0x800,
385 EEPROM_OFFSET=0x1000, HAS_HWCKSM=0x2000, WNO_XCVR_PWR=0x4000,
386 EXTRA_PREAMBLE=0x8000, EEPROM_RESET=0x10000, };
437 /* note: this array directly indexed by above enums, and MUST
438 * be kept in sync with both the enums above, and the PCI device
441 static struct vortex_chip_info {
446 } vortex_info_tbl[] __devinitdata = {
447 {"3c590 Vortex 10Mbps",
448 PCI_USES_MASTER, IS_VORTEX, 32, },
449 {"3c592 EISA 10Mbps Demon/Vortex", /* AKPM: from Don's 3c59x_cb.c 0.49H */
450 PCI_USES_MASTER, IS_VORTEX, 32, },
451 {"3c597 EISA Fast Demon/Vortex", /* AKPM: from Don's 3c59x_cb.c 0.49H */
452 PCI_USES_MASTER, IS_VORTEX, 32, },
453 {"3c595 Vortex 100baseTx",
454 PCI_USES_MASTER, IS_VORTEX, 32, },
455 {"3c595 Vortex 100baseT4",
456 PCI_USES_MASTER, IS_VORTEX, 32, },
458 {"3c595 Vortex 100base-MII",
459 PCI_USES_MASTER, IS_VORTEX, 32, },
460 {"3c900 Boomerang 10baseT",
461 PCI_USES_MASTER, IS_BOOMERANG|EEPROM_RESET, 64, },
462 {"3c900 Boomerang 10Mbps Combo",
463 PCI_USES_MASTER, IS_BOOMERANG|EEPROM_RESET, 64, },
464 {"3c900 Cyclone 10Mbps TPO", /* AKPM: from Don's 0.99M */
465 PCI_USES_MASTER, IS_CYCLONE|HAS_HWCKSM, 128, },
466 {"3c900 Cyclone 10Mbps Combo",
467 PCI_USES_MASTER, IS_CYCLONE|HAS_HWCKSM, 128, },
469 {"3c900 Cyclone 10Mbps TPC", /* AKPM: from Don's 0.99M */
470 PCI_USES_MASTER, IS_CYCLONE|HAS_HWCKSM, 128, },
471 {"3c900B-FL Cyclone 10base-FL",
472 PCI_USES_MASTER, IS_CYCLONE|HAS_HWCKSM, 128, },
473 {"3c905 Boomerang 100baseTx",
474 PCI_USES_MASTER, IS_BOOMERANG|HAS_MII|EEPROM_RESET, 64, },
475 {"3c905 Boomerang 100baseT4",
476 PCI_USES_MASTER, IS_BOOMERANG|HAS_MII|EEPROM_RESET, 64, },
477 {"3c905B Cyclone 100baseTx",
478 PCI_USES_MASTER, IS_CYCLONE|HAS_NWAY|HAS_HWCKSM|EXTRA_PREAMBLE, 128, },
480 {"3c905B Cyclone 10/100/BNC",
481 PCI_USES_MASTER, IS_CYCLONE|HAS_NWAY|HAS_HWCKSM, 128, },
482 {"3c905B-FX Cyclone 100baseFx",
483 PCI_USES_MASTER, IS_CYCLONE|HAS_HWCKSM, 128, },
485 PCI_USES_MASTER, IS_TORNADO|HAS_NWAY|HAS_HWCKSM|EXTRA_PREAMBLE, 128, },
486 {"3c920B-EMB-WNM (ATI Radeon 9100 IGP)",
487 PCI_USES_MASTER, IS_TORNADO|HAS_MII|HAS_HWCKSM, 128, },
489 PCI_USES_MASTER, IS_CYCLONE|HAS_HWCKSM, 128, },
492 PCI_USES_MASTER, IS_CYCLONE|HAS_NWAY|HAS_HWCKSM, 128, },
493 {"3cSOHO100-TX Hurricane",
494 PCI_USES_MASTER, IS_CYCLONE|HAS_NWAY|HAS_HWCKSM, 128, },
495 {"3c555 Laptop Hurricane",
496 PCI_USES_MASTER, IS_CYCLONE|EEPROM_8BIT|HAS_HWCKSM, 128, },
497 {"3c556 Laptop Tornado",
498 PCI_USES_MASTER, IS_TORNADO|HAS_NWAY|EEPROM_8BIT|HAS_CB_FNS|INVERT_MII_PWR|
500 {"3c556B Laptop Hurricane",
501 PCI_USES_MASTER, IS_TORNADO|HAS_NWAY|EEPROM_OFFSET|HAS_CB_FNS|INVERT_MII_PWR|
502 WNO_XCVR_PWR|HAS_HWCKSM, 128, },
504 {"3c575 [Megahertz] 10/100 LAN CardBus",
505 PCI_USES_MASTER, IS_BOOMERANG|HAS_MII|EEPROM_8BIT, 128, },
506 {"3c575 Boomerang CardBus",
507 PCI_USES_MASTER, IS_BOOMERANG|HAS_MII|EEPROM_8BIT, 128, },
508 {"3CCFE575BT Cyclone CardBus",
509 PCI_USES_MASTER, IS_CYCLONE|HAS_NWAY|HAS_CB_FNS|EEPROM_8BIT|
510 INVERT_LED_PWR|HAS_HWCKSM, 128, },
511 {"3CCFE575CT Tornado CardBus",
512 PCI_USES_MASTER, IS_TORNADO|HAS_NWAY|HAS_CB_FNS|EEPROM_8BIT|INVERT_MII_PWR|
513 MAX_COLLISION_RESET|HAS_HWCKSM, 128, },
514 {"3CCFE656 Cyclone CardBus",
515 PCI_USES_MASTER, IS_CYCLONE|HAS_NWAY|HAS_CB_FNS|EEPROM_8BIT|INVERT_MII_PWR|
516 INVERT_LED_PWR|HAS_HWCKSM, 128, },
518 {"3CCFEM656B Cyclone+Winmodem CardBus",
519 PCI_USES_MASTER, IS_CYCLONE|HAS_NWAY|HAS_CB_FNS|EEPROM_8BIT|INVERT_MII_PWR|
520 INVERT_LED_PWR|HAS_HWCKSM, 128, },
521 {"3CXFEM656C Tornado+Winmodem CardBus", /* From pcmcia-cs-3.1.5 */
522 PCI_USES_MASTER, IS_TORNADO|HAS_NWAY|HAS_CB_FNS|EEPROM_8BIT|INVERT_MII_PWR|
523 MAX_COLLISION_RESET|HAS_HWCKSM, 128, },
524 {"3c450 HomePNA Tornado", /* AKPM: from Don's 0.99Q */
525 PCI_USES_MASTER, IS_TORNADO|HAS_NWAY|HAS_HWCKSM, 128, },
527 PCI_USES_MASTER, IS_TORNADO|HAS_NWAY|HAS_HWCKSM, 128, },
528 {"3c982 Hydra Dual Port A",
529 PCI_USES_MASTER, IS_TORNADO|HAS_HWCKSM|HAS_NWAY, 128, },
531 {"3c982 Hydra Dual Port B",
532 PCI_USES_MASTER, IS_TORNADO|HAS_HWCKSM|HAS_NWAY, 128, },
534 PCI_USES_MASTER, IS_CYCLONE|HAS_NWAY|HAS_HWCKSM|EXTRA_PREAMBLE, 128, },
535 {"3c920B-EMB-WNM Tornado",
536 PCI_USES_MASTER, IS_TORNADO|HAS_NWAY|HAS_HWCKSM, 128, },
538 {NULL,}, /* NULL terminated list. */
542 static struct pci_device_id vortex_pci_tbl[] = {
543 { 0x10B7, 0x5900, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C590 },
544 { 0x10B7, 0x5920, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C592 },
545 { 0x10B7, 0x5970, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C597 },
546 { 0x10B7, 0x5950, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C595_1 },
547 { 0x10B7, 0x5951, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C595_2 },
549 { 0x10B7, 0x5952, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C595_3 },
550 { 0x10B7, 0x9000, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C900_1 },
551 { 0x10B7, 0x9001, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C900_2 },
552 { 0x10B7, 0x9004, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C900_3 },
553 { 0x10B7, 0x9005, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C900_4 },
555 { 0x10B7, 0x9006, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C900_5 },
556 { 0x10B7, 0x900A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C900B_FL },
557 { 0x10B7, 0x9050, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C905_1 },
558 { 0x10B7, 0x9051, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C905_2 },
559 { 0x10B7, 0x9055, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C905B_1 },
561 { 0x10B7, 0x9058, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C905B_2 },
562 { 0x10B7, 0x905A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C905B_FX },
563 { 0x10B7, 0x9200, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C905C },
564 { 0x10B7, 0x9202, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C9202 },
565 { 0x10B7, 0x9800, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C980 },
566 { 0x10B7, 0x9805, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C9805 },
568 { 0x10B7, 0x7646, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3CSOHO100_TX },
569 { 0x10B7, 0x5055, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C555 },
570 { 0x10B7, 0x6055, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C556 },
571 { 0x10B7, 0x6056, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C556B },
572 { 0x10B7, 0x5b57, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C575 },
574 { 0x10B7, 0x5057, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C575_1 },
575 { 0x10B7, 0x5157, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3CCFE575 },
576 { 0x10B7, 0x5257, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3CCFE575CT },
577 { 0x10B7, 0x6560, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3CCFE656 },
578 { 0x10B7, 0x6562, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3CCFEM656 },
580 { 0x10B7, 0x6564, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3CCFEM656_1 },
581 { 0x10B7, 0x4500, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C450 },
582 { 0x10B7, 0x9201, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C920 },
583 { 0x10B7, 0x1201, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C982A },
584 { 0x10B7, 0x1202, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C982B },
586 { 0x10B7, 0x9056, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_905BT4 },
587 { 0x10B7, 0x9210, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_920B_EMB_WNM },
589 {0,} /* 0 terminated list. */
591 MODULE_DEVICE_TABLE(pci, vortex_pci_tbl);
594 /* Operational definitions.
595 These are not used by other compilation units and thus are not
596 exported in a ".h" file.
598 First the windows. There are eight register windows, with the command
599 and status registers available in each.
601 #define EL3WINDOW(win_num) iowrite16(SelectWindow + (win_num), ioaddr + EL3_CMD)
603 #define EL3_STATUS 0x0e
605 /* The top five bits written to EL3_CMD are a command, the lower
606 11 bits are the parameter, if applicable.
607 Note that 11 parameters bits was fine for ethernet, but the new chip
608 can handle FDDI length frames (~4500 octets) and now parameters count
609 32-bit 'Dwords' rather than octets. */
612 TotalReset = 0<<11, SelectWindow = 1<<11, StartCoax = 2<<11,
613 RxDisable = 3<<11, RxEnable = 4<<11, RxReset = 5<<11,
614 UpStall = 6<<11, UpUnstall = (6<<11)+1,
615 DownStall = (6<<11)+2, DownUnstall = (6<<11)+3,
616 RxDiscard = 8<<11, TxEnable = 9<<11, TxDisable = 10<<11, TxReset = 11<<11,
617 FakeIntr = 12<<11, AckIntr = 13<<11, SetIntrEnb = 14<<11,
618 SetStatusEnb = 15<<11, SetRxFilter = 16<<11, SetRxThreshold = 17<<11,
619 SetTxThreshold = 18<<11, SetTxStart = 19<<11,
620 StartDMAUp = 20<<11, StartDMADown = (20<<11)+1, StatsEnable = 21<<11,
621 StatsDisable = 22<<11, StopCoax = 23<<11, SetFilterBit = 25<<11,};
623 /* The SetRxFilter command accepts the following classes: */
625 RxStation = 1, RxMulticast = 2, RxBroadcast = 4, RxProm = 8 };
627 /* Bits in the general status register. */
629 IntLatch = 0x0001, HostError = 0x0002, TxComplete = 0x0004,
630 TxAvailable = 0x0008, RxComplete = 0x0010, RxEarly = 0x0020,
631 IntReq = 0x0040, StatsFull = 0x0080,
632 DMADone = 1<<8, DownComplete = 1<<9, UpComplete = 1<<10,
633 DMAInProgress = 1<<11, /* DMA controller is still busy.*/
634 CmdInProgress = 1<<12, /* EL3_CMD is still busy.*/
637 /* Register window 1 offsets, the window used in normal operation.
638 On the Vortex this window is always mapped at offsets 0x10-0x1f. */
640 TX_FIFO = 0x10, RX_FIFO = 0x10, RxErrors = 0x14,
641 RxStatus = 0x18, Timer=0x1A, TxStatus = 0x1B,
642 TxFree = 0x1C, /* Remaining free bytes in Tx buffer. */
645 Wn0EepromCmd = 10, /* Window 0: EEPROM command register. */
646 Wn0EepromData = 12, /* Window 0: EEPROM results register. */
647 IntrStatus=0x0E, /* Valid in all windows. */
649 enum Win0_EEPROM_bits {
650 EEPROM_Read = 0x80, EEPROM_WRITE = 0x40, EEPROM_ERASE = 0xC0,
651 EEPROM_EWENB = 0x30, /* Enable erasing/writing for 10 msec. */
652 EEPROM_EWDIS = 0x00, /* Disable EWENB before 10 msec timeout. */
654 /* EEPROM locations. */
656 PhysAddr01=0, PhysAddr23=1, PhysAddr45=2, ModelID=3,
657 EtherLink3ID=7, IFXcvrIO=8, IRQLine=9,
658 NodeAddr01=10, NodeAddr23=11, NodeAddr45=12,
659 DriverTune=13, Checksum=15};
661 enum Window2 { /* Window 2. */
664 enum Window3 { /* Window 3: MAC/config bits. */
665 Wn3_Config=0, Wn3_MaxPktSize=4, Wn3_MAC_Ctrl=6, Wn3_Options=8,
668 #define BFEXT(value, offset, bitcount) \
669 ((((unsigned long)(value)) >> (offset)) & ((1 << (bitcount)) - 1))
671 #define BFINS(lhs, rhs, offset, bitcount) \
672 (((lhs) & ~((((1 << (bitcount)) - 1)) << (offset))) | \
673 (((rhs) & ((1 << (bitcount)) - 1)) << (offset)))
675 #define RAM_SIZE(v) BFEXT(v, 0, 3)
676 #define RAM_WIDTH(v) BFEXT(v, 3, 1)
677 #define RAM_SPEED(v) BFEXT(v, 4, 2)
678 #define ROM_SIZE(v) BFEXT(v, 6, 2)
679 #define RAM_SPLIT(v) BFEXT(v, 16, 2)
680 #define XCVR(v) BFEXT(v, 20, 4)
681 #define AUTOSELECT(v) BFEXT(v, 24, 1)
683 enum Window4 { /* Window 4: Xcvr/media bits. */
684 Wn4_FIFODiag = 4, Wn4_NetDiag = 6, Wn4_PhysicalMgmt=8, Wn4_Media = 10,
686 enum Win4_Media_bits {
687 Media_SQE = 0x0008, /* Enable SQE error counting for AUI. */
688 Media_10TP = 0x00C0, /* Enable link beat and jabber for 10baseT. */
689 Media_Lnk = 0x0080, /* Enable just link beat for 100TX/100FX. */
690 Media_LnkBeat = 0x0800,
692 enum Window7 { /* Window 7: Bus Master control. */
693 Wn7_MasterAddr = 0, Wn7_VlanEtherType=4, Wn7_MasterLen = 6,
694 Wn7_MasterStatus = 12,
696 /* Boomerang bus master control registers. */
698 PktStatus = 0x20, DownListPtr = 0x24, FragAddr = 0x28, FragLen = 0x2c,
699 TxFreeThreshold = 0x2f, UpPktStatus = 0x30, UpListPtr = 0x38,
702 /* The Rx and Tx descriptor lists.
703 Caution Alpha hackers: these types are 32 bits! Note also the 8 byte
704 alignment contraint on tx_ring[] and rx_ring[]. */
705 #define LAST_FRAG 0x80000000 /* Last Addr/Len pair in descriptor. */
706 #define DN_COMPLETE 0x00010000 /* This packet has been downloaded */
707 struct boom_rx_desc {
708 u32 next; /* Last entry points to 0. */
710 u32 addr; /* Up to 63 addr/len pairs possible. */
711 s32 length; /* Set LAST_FRAG to indicate last pair. */
713 /* Values for the Rx status entry. */
714 enum rx_desc_status {
715 RxDComplete=0x00008000, RxDError=0x4000,
716 /* See boomerang_rx() for actual error bits */
717 IPChksumErr=1<<25, TCPChksumErr=1<<26, UDPChksumErr=1<<27,
718 IPChksumValid=1<<29, TCPChksumValid=1<<30, UDPChksumValid=1<<31,
722 #define DO_ZEROCOPY 1
724 #define DO_ZEROCOPY 0
727 struct boom_tx_desc {
728 u32 next; /* Last entry points to 0. */
729 s32 status; /* bits 0:12 length, others see below. */
734 } frag[1+MAX_SKB_FRAGS];
741 /* Values for the Tx status entry. */
742 enum tx_desc_status {
743 CRCDisable=0x2000, TxDComplete=0x8000,
744 AddIPChksum=0x02000000, AddTCPChksum=0x04000000, AddUDPChksum=0x08000000,
745 TxIntrUploaded=0x80000000, /* IRQ when in FIFO, but maybe not sent. */
748 /* Chip features we care about in vp->capabilities, read from the EEPROM. */
749 enum ChipCaps { CapBusMaster=0x20, CapPwrMgmt=0x2000 };
751 struct vortex_extra_stats {
752 unsigned long tx_deferred;
753 unsigned long tx_max_collisions;
754 unsigned long tx_multiple_collisions;
755 unsigned long tx_single_collisions;
756 unsigned long rx_bad_ssd;
759 struct vortex_private {
760 /* The Rx and Tx rings should be quad-word-aligned. */
761 struct boom_rx_desc* rx_ring;
762 struct boom_tx_desc* tx_ring;
763 dma_addr_t rx_ring_dma;
764 dma_addr_t tx_ring_dma;
765 /* The addresses of transmit- and receive-in-place skbuffs. */
766 struct sk_buff* rx_skbuff[RX_RING_SIZE];
767 struct sk_buff* tx_skbuff[TX_RING_SIZE];
768 unsigned int cur_rx, cur_tx; /* The next free ring entry */
769 unsigned int dirty_rx, dirty_tx; /* The ring entries to be free()ed. */
770 struct net_device_stats stats; /* Generic stats */
771 struct vortex_extra_stats xstats; /* NIC-specific extra stats */
772 struct sk_buff *tx_skb; /* Packet being eaten by bus master ctrl. */
773 dma_addr_t tx_skb_dma; /* Allocated DMA address for bus master ctrl DMA. */
775 /* PCI configuration space information. */
776 struct device *gendev;
777 void __iomem *ioaddr; /* IO address space */
778 void __iomem *cb_fn_base; /* CardBus function status addr space. */
780 /* Some values here only for performance evaluation and path-coverage */
781 int rx_nocopy, rx_copy, queued_packet, rx_csumhits;
784 /* The remainder are related to chip state, mostly media selection. */
785 struct timer_list timer; /* Media selection timer. */
786 struct timer_list rx_oom_timer; /* Rx skb allocation retry timer */
787 int options; /* User-settable misc. driver options. */
788 unsigned int media_override:4, /* Passed-in media type. */
789 default_media:4, /* Read from the EEPROM/Wn3_Config. */
790 full_duplex:1, autoselect:1,
791 bus_master:1, /* Vortex can only do a fragment bus-m. */
792 full_bus_master_tx:1, full_bus_master_rx:2, /* Boomerang */
793 flow_ctrl:1, /* Use 802.3x flow control (PAUSE only) */
794 partner_flow_ctrl:1, /* Partner supports flow control */
796 enable_wol:1, /* Wake-on-LAN is enabled */
797 pm_state_valid:1, /* pci_dev->saved_config_space has sane contents */
800 must_free_region:1, /* Flag: if zero, Cardbus owns the I/O region */
801 large_frames:1; /* accept large frames */
805 u16 available_media; /* From Wn3_Options. */
806 u16 capabilities, info1, info2; /* Various, from EEPROM. */
807 u16 advertising; /* NWay media advertisement */
808 unsigned char phys[2]; /* MII device addresses. */
809 u16 deferred; /* Resend these interrupts when we
810 * bale from the ISR */
811 u16 io_size; /* Size of PCI region (for release_region) */
812 spinlock_t lock; /* Serialise access to device & its vortex_private */
813 struct mii_if_info mii; /* MII lib hooks/info */
817 #define DEVICE_PCI(dev) (((dev)->bus == &pci_bus_type) ? to_pci_dev((dev)) : NULL)
819 #define DEVICE_PCI(dev) NULL
822 #define VORTEX_PCI(vp) (((vp)->gendev) ? DEVICE_PCI((vp)->gendev) : NULL)
825 #define DEVICE_EISA(dev) (((dev)->bus == &eisa_bus_type) ? to_eisa_device((dev)) : NULL)
827 #define DEVICE_EISA(dev) NULL
830 #define VORTEX_EISA(vp) (((vp)->gendev) ? DEVICE_EISA((vp)->gendev) : NULL)
832 /* The action to take with a media selection timer tick.
833 Note that we deviate from the 3Com order by checking 10base2 before AUI.
836 XCVR_10baseT=0, XCVR_AUI, XCVR_10baseTOnly, XCVR_10base2, XCVR_100baseTx,
837 XCVR_100baseFx, XCVR_MII=6, XCVR_NWAY=8, XCVR_ExtMII=9, XCVR_Default=10,
840 static const struct media_table {
842 unsigned int media_bits:16, /* Bits to set in Wn4_Media register. */
843 mask:8, /* The transceiver-present bit in Wn3_Config.*/
844 next:8; /* The media type to try next. */
845 int wait; /* Time before we check media status. */
847 { "10baseT", Media_10TP,0x08, XCVR_10base2, (14*HZ)/10},
848 { "10Mbs AUI", Media_SQE, 0x20, XCVR_Default, (1*HZ)/10},
849 { "undefined", 0, 0x80, XCVR_10baseT, 10000},
850 { "10base2", 0, 0x10, XCVR_AUI, (1*HZ)/10},
851 { "100baseTX", Media_Lnk, 0x02, XCVR_100baseFx, (14*HZ)/10},
852 { "100baseFX", Media_Lnk, 0x04, XCVR_MII, (14*HZ)/10},
853 { "MII", 0, 0x41, XCVR_10baseT, 3*HZ },
854 { "undefined", 0, 0x01, XCVR_10baseT, 10000},
855 { "Autonegotiate", 0, 0x41, XCVR_10baseT, 3*HZ},
856 { "MII-External", 0, 0x41, XCVR_10baseT, 3*HZ },
857 { "Default", 0, 0xFF, XCVR_10baseT, 10000},
861 const char str[ETH_GSTRING_LEN];
862 } ethtool_stats_keys[] = {
864 { "tx_max_collisions" },
865 { "tx_multiple_collisions" },
866 { "tx_single_collisions" },
870 /* number of ETHTOOL_GSTATS u64's */
871 #define VORTEX_NUM_STATS 5
873 static int vortex_probe1(struct device *gendev, void __iomem *ioaddr, int irq,
874 int chip_idx, int card_idx);
875 static void vortex_up(struct net_device *dev);
876 static void vortex_down(struct net_device *dev, int final);
877 static int vortex_open(struct net_device *dev);
878 static void mdio_sync(void __iomem *ioaddr, int bits);
879 static int mdio_read(struct net_device *dev, int phy_id, int location);
880 static void mdio_write(struct net_device *vp, int phy_id, int location, int value);
881 static void vortex_timer(unsigned long arg);
882 static void rx_oom_timer(unsigned long arg);
883 static int vortex_start_xmit(struct sk_buff *skb, struct net_device *dev);
884 static int boomerang_start_xmit(struct sk_buff *skb, struct net_device *dev);
885 static int vortex_rx(struct net_device *dev);
886 static int boomerang_rx(struct net_device *dev);
887 static irqreturn_t vortex_interrupt(int irq, void *dev_id, struct pt_regs *regs);
888 static irqreturn_t boomerang_interrupt(int irq, void *dev_id, struct pt_regs *regs);
889 static int vortex_close(struct net_device *dev);
890 static void dump_tx_ring(struct net_device *dev);
891 static void update_stats(void __iomem *ioaddr, struct net_device *dev);
892 static struct net_device_stats *vortex_get_stats(struct net_device *dev);
893 static void set_rx_mode(struct net_device *dev);
895 static int vortex_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
897 static void vortex_tx_timeout(struct net_device *dev);
898 static void acpi_set_WOL(struct net_device *dev);
899 static struct ethtool_ops vortex_ethtool_ops;
900 static void set_8021q_mode(struct net_device *dev, int enable);
902 /* This driver uses 'options' to pass the media type, full-duplex flag, etc. */
903 /* Option count limit only -- unlimited interfaces are supported. */
905 static int options[MAX_UNITS] = { [0 ... MAX_UNITS-1] = -1 };
906 static int full_duplex[MAX_UNITS] = {[0 ... MAX_UNITS-1] = -1 };
907 static int hw_checksums[MAX_UNITS] = {[0 ... MAX_UNITS-1] = -1 };
908 static int flow_ctrl[MAX_UNITS] = {[0 ... MAX_UNITS-1] = -1 };
909 static int enable_wol[MAX_UNITS] = {[0 ... MAX_UNITS-1] = -1 };
910 static int use_mmio[MAX_UNITS] = {[0 ... MAX_UNITS-1] = -1 };
911 static int global_options = -1;
912 static int global_full_duplex = -1;
913 static int global_enable_wol = -1;
914 static int global_use_mmio = -1;
916 /* Variables to work-around the Compaq PCI BIOS32 problem. */
917 static int compaq_ioaddr, compaq_irq, compaq_device_id = 0x5900;
918 static struct net_device *compaq_net_device;
920 static int vortex_cards_found;
922 module_param(debug, int, 0);
923 module_param(global_options, int, 0);
924 module_param_array(options, int, NULL, 0);
925 module_param(global_full_duplex, int, 0);
926 module_param_array(full_duplex, int, NULL, 0);
927 module_param_array(hw_checksums, int, NULL, 0);
928 module_param_array(flow_ctrl, int, NULL, 0);
929 module_param(global_enable_wol, int, 0);
930 module_param_array(enable_wol, int, NULL, 0);
931 module_param(rx_copybreak, int, 0);
932 module_param(max_interrupt_work, int, 0);
933 module_param(compaq_ioaddr, int, 0);
934 module_param(compaq_irq, int, 0);
935 module_param(compaq_device_id, int, 0);
936 module_param(watchdog, int, 0);
937 module_param(global_use_mmio, int, 0);
938 module_param_array(use_mmio, int, NULL, 0);
939 MODULE_PARM_DESC(debug, "3c59x debug level (0-6)");
940 MODULE_PARM_DESC(options, "3c59x: Bits 0-3: media type, bit 4: bus mastering, bit 9: full duplex");
941 MODULE_PARM_DESC(global_options, "3c59x: same as options, but applies to all NICs if options is unset");
942 MODULE_PARM_DESC(full_duplex, "3c59x full duplex setting(s) (1)");
943 MODULE_PARM_DESC(global_full_duplex, "3c59x: same as full_duplex, but applies to all NICs if full_duplex is unset");
944 MODULE_PARM_DESC(hw_checksums, "3c59x Hardware checksum checking by adapter(s) (0-1)");
945 MODULE_PARM_DESC(flow_ctrl, "3c59x 802.3x flow control usage (PAUSE only) (0-1)");
946 MODULE_PARM_DESC(enable_wol, "3c59x: Turn on Wake-on-LAN for adapter(s) (0-1)");
947 MODULE_PARM_DESC(global_enable_wol, "3c59x: same as enable_wol, but applies to all NICs if enable_wol is unset");
948 MODULE_PARM_DESC(rx_copybreak, "3c59x copy breakpoint for copy-only-tiny-frames");
949 MODULE_PARM_DESC(max_interrupt_work, "3c59x maximum events handled per interrupt");
950 MODULE_PARM_DESC(compaq_ioaddr, "3c59x PCI I/O base address (Compaq BIOS problem workaround)");
951 MODULE_PARM_DESC(compaq_irq, "3c59x PCI IRQ number (Compaq BIOS problem workaround)");
952 MODULE_PARM_DESC(compaq_device_id, "3c59x PCI device ID (Compaq BIOS problem workaround)");
953 MODULE_PARM_DESC(watchdog, "3c59x transmit timeout in milliseconds");
954 MODULE_PARM_DESC(global_use_mmio, "3c59x: same as use_mmio, but applies to all NICs if options is unset");
955 MODULE_PARM_DESC(use_mmio, "3c59x: use memory-mapped PCI I/O resource (0-1)");
957 #ifdef CONFIG_NET_POLL_CONTROLLER
958 static void poll_vortex(struct net_device *dev)
960 struct vortex_private *vp = netdev_priv(dev);
962 local_save_flags(flags);
964 (vp->full_bus_master_rx ? boomerang_interrupt:vortex_interrupt)(dev->irq,dev,NULL);
965 local_irq_restore(flags);
971 static int vortex_suspend(struct pci_dev *pdev, pm_message_t state)
973 struct net_device *dev = pci_get_drvdata(pdev);
975 if (dev && dev->priv) {
976 if (netif_running(dev)) {
977 netif_device_detach(dev);
980 pci_save_state(pdev);
981 pci_enable_wake(pdev, pci_choose_state(pdev, state), 0);
982 free_irq(dev->irq, dev);
983 pci_disable_device(pdev);
984 pci_set_power_state(pdev, pci_choose_state(pdev, state));
989 static int vortex_resume(struct pci_dev *pdev)
991 struct net_device *dev = pci_get_drvdata(pdev);
992 struct vortex_private *vp = netdev_priv(dev);
995 pci_set_power_state(pdev, PCI_D0);
996 pci_restore_state(pdev);
997 pci_enable_device(pdev);
998 pci_set_master(pdev);
999 if (request_irq(dev->irq, vp->full_bus_master_rx ?
1000 &boomerang_interrupt : &vortex_interrupt, SA_SHIRQ, dev->name, dev)) {
1001 printk(KERN_WARNING "%s: Could not reserve IRQ %d\n", dev->name, dev->irq);
1002 pci_disable_device(pdev);
1005 if (netif_running(dev)) {
1007 netif_device_attach(dev);
1013 #endif /* CONFIG_PM */
1016 static struct eisa_device_id vortex_eisa_ids[] = {
1017 { "TCM5920", CH_3C592 },
1018 { "TCM5970", CH_3C597 },
1022 static int vortex_eisa_probe(struct device *device);
1023 static int vortex_eisa_remove(struct device *device);
1025 static struct eisa_driver vortex_eisa_driver = {
1026 .id_table = vortex_eisa_ids,
1029 .probe = vortex_eisa_probe,
1030 .remove = vortex_eisa_remove
1034 static int vortex_eisa_probe(struct device *device)
1036 void __iomem *ioaddr;
1037 struct eisa_device *edev;
1039 edev = to_eisa_device(device);
1041 if (!request_region(edev->base_addr, VORTEX_TOTAL_SIZE, DRV_NAME))
1044 ioaddr = ioport_map(edev->base_addr, VORTEX_TOTAL_SIZE);
1046 if (vortex_probe1(device, ioaddr, ioread16(ioaddr + 0xC88) >> 12,
1047 edev->id.driver_data, vortex_cards_found)) {
1048 release_region(edev->base_addr, VORTEX_TOTAL_SIZE);
1052 vortex_cards_found++;
1057 static int vortex_eisa_remove(struct device *device)
1059 struct eisa_device *edev;
1060 struct net_device *dev;
1061 struct vortex_private *vp;
1062 void __iomem *ioaddr;
1064 edev = to_eisa_device(device);
1065 dev = eisa_get_drvdata(edev);
1068 printk("vortex_eisa_remove called for Compaq device!\n");
1072 vp = netdev_priv(dev);
1073 ioaddr = vp->ioaddr;
1075 unregister_netdev(dev);
1076 iowrite16(TotalReset|0x14, ioaddr + EL3_CMD);
1077 release_region(dev->base_addr, VORTEX_TOTAL_SIZE);
1084 /* returns count found (>= 0), or negative on error */
1085 static int __init vortex_eisa_init(void)
1088 int orig_cards_found = vortex_cards_found;
1093 err = eisa_driver_register (&vortex_eisa_driver);
1096 * Because of the way EISA bus is probed, we cannot assume
1097 * any device have been found when we exit from
1098 * eisa_driver_register (the bus root driver may not be
1099 * initialized yet). So we blindly assume something was
1100 * found, and let the sysfs magic happend...
1106 /* Special code to work-around the Compaq PCI BIOS32 problem. */
1107 if (compaq_ioaddr) {
1108 vortex_probe1(NULL, ioport_map(compaq_ioaddr, VORTEX_TOTAL_SIZE),
1109 compaq_irq, compaq_device_id, vortex_cards_found++);
1112 return vortex_cards_found - orig_cards_found + eisa_found;
1115 /* returns count (>= 0), or negative on error */
1116 static int __devinit vortex_init_one(struct pci_dev *pdev,
1117 const struct pci_device_id *ent)
1119 int rc, unit, pci_bar;
1120 struct vortex_chip_info *vci;
1121 void __iomem *ioaddr;
1123 /* wake up and enable device */
1124 rc = pci_enable_device(pdev);
1128 unit = vortex_cards_found;
1130 if (global_use_mmio < 0 && (unit >= MAX_UNITS || use_mmio[unit] < 0)) {
1131 /* Determine the default if the user didn't override us */
1132 vci = &vortex_info_tbl[ent->driver_data];
1133 pci_bar = vci->drv_flags & (IS_CYCLONE | IS_TORNADO) ? 1 : 0;
1134 } else if (unit < MAX_UNITS && use_mmio[unit] >= 0)
1135 pci_bar = use_mmio[unit] ? 1 : 0;
1137 pci_bar = global_use_mmio ? 1 : 0;
1139 ioaddr = pci_iomap(pdev, pci_bar, 0);
1140 if (!ioaddr) /* If mapping fails, fall-back to BAR 0... */
1141 ioaddr = pci_iomap(pdev, 0, 0);
1143 rc = vortex_probe1(&pdev->dev, ioaddr, pdev->irq,
1144 ent->driver_data, unit);
1146 pci_disable_device(pdev);
1150 vortex_cards_found++;
1157 * Start up the PCI/EISA device which is described by *gendev.
1158 * Return 0 on success.
1160 * NOTE: pdev can be NULL, for the case of a Compaq device
1162 static int __devinit vortex_probe1(struct device *gendev,
1163 void __iomem *ioaddr, int irq,
1164 int chip_idx, int card_idx)
1166 struct vortex_private *vp;
1168 unsigned int eeprom[0x40], checksum = 0; /* EEPROM contents */
1170 struct net_device *dev;
1171 static int printed_version;
1172 int retval, print_info;
1173 struct vortex_chip_info * const vci = &vortex_info_tbl[chip_idx];
1174 char *print_name = "3c59x";
1175 struct pci_dev *pdev = NULL;
1176 struct eisa_device *edev = NULL;
1178 if (!printed_version) {
1180 printed_version = 1;
1184 if ((pdev = DEVICE_PCI(gendev))) {
1185 print_name = pci_name(pdev);
1188 if ((edev = DEVICE_EISA(gendev))) {
1189 print_name = edev->dev.bus_id;
1193 dev = alloc_etherdev(sizeof(*vp));
1196 printk (KERN_ERR PFX "unable to allocate etherdev, aborting\n");
1199 SET_MODULE_OWNER(dev);
1200 SET_NETDEV_DEV(dev, gendev);
1201 vp = netdev_priv(dev);
1203 option = global_options;
1205 /* The lower four bits are the media type. */
1206 if (dev->mem_start) {
1208 * The 'options' param is passed in as the third arg to the
1209 * LILO 'ether=' argument for non-modular use
1211 option = dev->mem_start;
1213 else if (card_idx < MAX_UNITS) {
1214 if (options[card_idx] >= 0)
1215 option = options[card_idx];
1219 if (option & 0x8000)
1221 if (option & 0x4000)
1223 if (option & 0x0400)
1227 print_info = (vortex_debug > 1);
1229 printk (KERN_INFO "See Documentation/networking/vortex.txt\n");
1231 printk(KERN_INFO "%s: 3Com %s %s at %p.\n",
1233 pdev ? "PCI" : "EISA",
1237 dev->base_addr = (unsigned long)ioaddr;
1240 vp->ioaddr = ioaddr;
1241 vp->large_frames = mtu > 1500;
1242 vp->drv_flags = vci->drv_flags;
1243 vp->has_nway = (vci->drv_flags & HAS_NWAY) ? 1 : 0;
1244 vp->io_size = vci->io_size;
1245 vp->card_idx = card_idx;
1247 /* module list only for Compaq device */
1248 if (gendev == NULL) {
1249 compaq_net_device = dev;
1252 /* PCI-only startup logic */
1254 /* EISA resources already marked, so only PCI needs to do this here */
1255 /* Ignore return value, because Cardbus drivers already allocate for us */
1256 if (request_region(dev->base_addr, vci->io_size, print_name) != NULL)
1257 vp->must_free_region = 1;
1259 /* enable bus-mastering if necessary */
1260 if (vci->flags & PCI_USES_MASTER)
1261 pci_set_master(pdev);
1263 if (vci->drv_flags & IS_VORTEX) {
1265 u8 new_latency = 248;
1267 /* Check the PCI latency value. On the 3c590 series the latency timer
1268 must be set to the maximum value to avoid data corruption that occurs
1269 when the timer expires during a transfer. This bug exists the Vortex
1271 pci_read_config_byte(pdev, PCI_LATENCY_TIMER, &pci_latency);
1272 if (pci_latency < new_latency) {
1273 printk(KERN_INFO "%s: Overriding PCI latency"
1274 " timer (CFLT) setting of %d, new value is %d.\n",
1275 print_name, pci_latency, new_latency);
1276 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, new_latency);
1281 spin_lock_init(&vp->lock);
1282 vp->gendev = gendev;
1284 vp->mii.mdio_read = mdio_read;
1285 vp->mii.mdio_write = mdio_write;
1286 vp->mii.phy_id_mask = 0x1f;
1287 vp->mii.reg_num_mask = 0x1f;
1289 /* Makes sure rings are at least 16 byte aligned. */
1290 vp->rx_ring = pci_alloc_consistent(pdev, sizeof(struct boom_rx_desc) * RX_RING_SIZE
1291 + sizeof(struct boom_tx_desc) * TX_RING_SIZE,
1294 if (vp->rx_ring == 0)
1297 vp->tx_ring = (struct boom_tx_desc *)(vp->rx_ring + RX_RING_SIZE);
1298 vp->tx_ring_dma = vp->rx_ring_dma + sizeof(struct boom_rx_desc) * RX_RING_SIZE;
1300 /* if we are a PCI driver, we store info in pdev->driver_data
1301 * instead of a module list */
1303 pci_set_drvdata(pdev, dev);
1305 eisa_set_drvdata(edev, dev);
1307 vp->media_override = 7;
1309 vp->media_override = ((option & 7) == 2) ? 0 : option & 15;
1310 if (vp->media_override != 7)
1312 vp->full_duplex = (option & 0x200) ? 1 : 0;
1313 vp->bus_master = (option & 16) ? 1 : 0;
1316 if (global_full_duplex > 0)
1317 vp->full_duplex = 1;
1318 if (global_enable_wol > 0)
1321 if (card_idx < MAX_UNITS) {
1322 if (full_duplex[card_idx] > 0)
1323 vp->full_duplex = 1;
1324 if (flow_ctrl[card_idx] > 0)
1326 if (enable_wol[card_idx] > 0)
1330 vp->mii.force_media = vp->full_duplex;
1331 vp->options = option;
1332 /* Read the station address from the EEPROM. */
1337 if (vci->drv_flags & EEPROM_8BIT)
1339 else if (vci->drv_flags & EEPROM_OFFSET)
1340 base = EEPROM_Read + 0x30;
1344 for (i = 0; i < 0x40; i++) {
1346 iowrite16(base + i, ioaddr + Wn0EepromCmd);
1347 /* Pause for at least 162 us. for the read to take place. */
1348 for (timer = 10; timer >= 0; timer--) {
1350 if ((ioread16(ioaddr + Wn0EepromCmd) & 0x8000) == 0)
1353 eeprom[i] = ioread16(ioaddr + Wn0EepromData);
1356 for (i = 0; i < 0x18; i++)
1357 checksum ^= eeprom[i];
1358 checksum = (checksum ^ (checksum >> 8)) & 0xff;
1359 if (checksum != 0x00) { /* Grrr, needless incompatible change 3Com. */
1361 checksum ^= eeprom[i++];
1362 checksum = (checksum ^ (checksum >> 8)) & 0xff;
1364 if ((checksum != 0x00) && !(vci->drv_flags & IS_TORNADO))
1365 printk(" ***INVALID CHECKSUM %4.4x*** ", checksum);
1366 for (i = 0; i < 3; i++)
1367 ((u16 *)dev->dev_addr)[i] = htons(eeprom[i + 10]);
1368 memcpy(dev->perm_addr, dev->dev_addr, dev->addr_len);
1370 for (i = 0; i < 6; i++)
1371 printk("%c%2.2x", i ? ':' : ' ', dev->dev_addr[i]);
1373 /* Unfortunately an all zero eeprom passes the checksum and this
1374 gets found in the wild in failure cases. Crypto is hard 8) */
1375 if (!is_valid_ether_addr(dev->dev_addr)) {
1377 printk(KERN_ERR "*** EEPROM MAC address is invalid.\n");
1378 goto free_ring; /* With every pack */
1381 for (i = 0; i < 6; i++)
1382 iowrite8(dev->dev_addr[i], ioaddr + i);
1385 printk(", IRQ %d\n", dev->irq);
1386 /* Tell them about an invalid IRQ. */
1387 if (dev->irq <= 0 || dev->irq >= NR_IRQS)
1388 printk(KERN_WARNING " *** Warning: IRQ %d is unlikely to work! ***\n",
1392 step = (ioread8(ioaddr + Wn4_NetDiag) & 0x1e) >> 1;
1394 printk(KERN_INFO " product code %02x%02x rev %02x.%d date %02d-"
1395 "%02d-%02d\n", eeprom[6]&0xff, eeprom[6]>>8, eeprom[0x14],
1396 step, (eeprom[4]>>5) & 15, eeprom[4] & 31, eeprom[4]>>9);
1400 if (pdev && vci->drv_flags & HAS_CB_FNS) {
1403 vp->cb_fn_base = pci_iomap(pdev, 2, 0);
1404 if (!vp->cb_fn_base) {
1410 printk(KERN_INFO "%s: CardBus functions mapped %8.8lx->%p\n",
1411 print_name, pci_resource_start(pdev, 2),
1416 n = ioread16(ioaddr + Wn2_ResetOptions) & ~0x4010;
1417 if (vp->drv_flags & INVERT_LED_PWR)
1419 if (vp->drv_flags & INVERT_MII_PWR)
1421 iowrite16(n, ioaddr + Wn2_ResetOptions);
1422 if (vp->drv_flags & WNO_XCVR_PWR) {
1424 iowrite16(0x0800, ioaddr);
1428 /* Extract our information from the EEPROM data. */
1429 vp->info1 = eeprom[13];
1430 vp->info2 = eeprom[15];
1431 vp->capabilities = eeprom[16];
1433 if (vp->info1 & 0x8000) {
1434 vp->full_duplex = 1;
1436 printk(KERN_INFO "Full duplex capable\n");
1440 static const char * const ram_split[] = {"5:3", "3:1", "1:1", "3:5"};
1441 unsigned int config;
1443 vp->available_media = ioread16(ioaddr + Wn3_Options);
1444 if ((vp->available_media & 0xff) == 0) /* Broken 3c916 */
1445 vp->available_media = 0x40;
1446 config = ioread32(ioaddr + Wn3_Config);
1448 printk(KERN_DEBUG " Internal config register is %4.4x, "
1449 "transceivers %#x.\n", config, ioread16(ioaddr + Wn3_Options));
1450 printk(KERN_INFO " %dK %s-wide RAM %s Rx:Tx split, %s%s interface.\n",
1451 8 << RAM_SIZE(config),
1452 RAM_WIDTH(config) ? "word" : "byte",
1453 ram_split[RAM_SPLIT(config)],
1454 AUTOSELECT(config) ? "autoselect/" : "",
1455 XCVR(config) > XCVR_ExtMII ? "<invalid transceiver>" :
1456 media_tbl[XCVR(config)].name);
1458 vp->default_media = XCVR(config);
1459 if (vp->default_media == XCVR_NWAY)
1461 vp->autoselect = AUTOSELECT(config);
1464 if (vp->media_override != 7) {
1465 printk(KERN_INFO "%s: Media override to transceiver type %d (%s).\n",
1466 print_name, vp->media_override,
1467 media_tbl[vp->media_override].name);
1468 dev->if_port = vp->media_override;
1470 dev->if_port = vp->default_media;
1472 if ((vp->available_media & 0x40) || (vci->drv_flags & HAS_NWAY) ||
1473 dev->if_port == XCVR_MII || dev->if_port == XCVR_NWAY) {
1474 int phy, phy_idx = 0;
1476 mii_preamble_required++;
1477 if (vp->drv_flags & EXTRA_PREAMBLE)
1478 mii_preamble_required++;
1479 mdio_sync(ioaddr, 32);
1480 mdio_read(dev, 24, MII_BMSR);
1481 for (phy = 0; phy < 32 && phy_idx < 1; phy++) {
1482 int mii_status, phyx;
1485 * For the 3c905CX we look at index 24 first, because it bogusly
1486 * reports an external PHY at all indices
1494 mii_status = mdio_read(dev, phyx, MII_BMSR);
1495 if (mii_status && mii_status != 0xffff) {
1496 vp->phys[phy_idx++] = phyx;
1498 printk(KERN_INFO " MII transceiver found at address %d,"
1499 " status %4x.\n", phyx, mii_status);
1501 if ((mii_status & 0x0040) == 0)
1502 mii_preamble_required++;
1505 mii_preamble_required--;
1507 printk(KERN_WARNING" ***WARNING*** No MII transceivers found!\n");
1510 vp->advertising = mdio_read(dev, vp->phys[0], MII_ADVERTISE);
1511 if (vp->full_duplex) {
1512 /* Only advertise the FD media types. */
1513 vp->advertising &= ~0x02A0;
1514 mdio_write(dev, vp->phys[0], 4, vp->advertising);
1517 vp->mii.phy_id = vp->phys[0];
1520 if (vp->capabilities & CapBusMaster) {
1521 vp->full_bus_master_tx = 1;
1523 printk(KERN_INFO " Enabling bus-master transmits and %s receives.\n",
1524 (vp->info2 & 1) ? "early" : "whole-frame" );
1526 vp->full_bus_master_rx = (vp->info2 & 1) ? 1 : 2;
1527 vp->bus_master = 0; /* AKPM: vortex only */
1530 /* The 3c59x-specific entries in the device structure. */
1531 dev->open = vortex_open;
1532 if (vp->full_bus_master_tx) {
1533 dev->hard_start_xmit = boomerang_start_xmit;
1534 /* Actually, it still should work with iommu. */
1535 if (card_idx < MAX_UNITS &&
1536 ((hw_checksums[card_idx] == -1 && (vp->drv_flags & HAS_HWCKSM)) ||
1537 hw_checksums[card_idx] == 1)) {
1538 dev->features |= NETIF_F_IP_CSUM | NETIF_F_SG;
1541 dev->hard_start_xmit = vortex_start_xmit;
1545 printk(KERN_INFO "%s: scatter/gather %sabled. h/w checksums %sabled\n",
1547 (dev->features & NETIF_F_SG) ? "en":"dis",
1548 (dev->features & NETIF_F_IP_CSUM) ? "en":"dis");
1551 dev->stop = vortex_close;
1552 dev->get_stats = vortex_get_stats;
1554 dev->do_ioctl = vortex_ioctl;
1556 dev->ethtool_ops = &vortex_ethtool_ops;
1557 dev->set_multicast_list = set_rx_mode;
1558 dev->tx_timeout = vortex_tx_timeout;
1559 dev->watchdog_timeo = (watchdog * HZ) / 1000;
1560 #ifdef CONFIG_NET_POLL_CONTROLLER
1561 dev->poll_controller = poll_vortex;
1564 vp->pm_state_valid = 1;
1565 pci_save_state(VORTEX_PCI(vp));
1568 retval = register_netdev(dev);
1573 pci_free_consistent(pdev,
1574 sizeof(struct boom_rx_desc) * RX_RING_SIZE
1575 + sizeof(struct boom_tx_desc) * TX_RING_SIZE,
1579 if (vp->must_free_region)
1580 release_region(dev->base_addr, vci->io_size);
1582 printk(KERN_ERR PFX "vortex_probe1 fails. Returns %d\n", retval);
1588 issue_and_wait(struct net_device *dev, int cmd)
1590 struct vortex_private *vp = netdev_priv(dev);
1591 void __iomem *ioaddr = vp->ioaddr;
1594 iowrite16(cmd, ioaddr + EL3_CMD);
1595 for (i = 0; i < 2000; i++) {
1596 if (!(ioread16(ioaddr + EL3_STATUS) & CmdInProgress))
1600 /* OK, that didn't work. Do it the slow way. One second */
1601 for (i = 0; i < 100000; i++) {
1602 if (!(ioread16(ioaddr + EL3_STATUS) & CmdInProgress)) {
1603 if (vortex_debug > 1)
1604 printk(KERN_INFO "%s: command 0x%04x took %d usecs\n",
1605 dev->name, cmd, i * 10);
1610 printk(KERN_ERR "%s: command 0x%04x did not complete! Status=0x%x\n",
1611 dev->name, cmd, ioread16(ioaddr + EL3_STATUS));
1615 vortex_set_duplex(struct net_device *dev)
1617 struct vortex_private *vp = netdev_priv(dev);
1618 void __iomem *ioaddr = vp->ioaddr;
1620 printk(KERN_INFO "%s: setting %s-duplex.\n",
1621 dev->name, (vp->full_duplex) ? "full" : "half");
1624 /* Set the full-duplex bit. */
1625 iowrite16(((vp->info1 & 0x8000) || vp->full_duplex ? 0x20 : 0) |
1626 (vp->large_frames ? 0x40 : 0) |
1627 ((vp->full_duplex && vp->flow_ctrl && vp->partner_flow_ctrl) ?
1629 ioaddr + Wn3_MAC_Ctrl);
1632 static void vortex_check_media(struct net_device *dev, unsigned int init)
1634 struct vortex_private *vp = netdev_priv(dev);
1635 unsigned int ok_to_print = 0;
1637 if (vortex_debug > 3)
1640 if (mii_check_media(&vp->mii, ok_to_print, init)) {
1641 vp->full_duplex = vp->mii.full_duplex;
1642 vortex_set_duplex(dev);
1644 vortex_set_duplex(dev);
1649 vortex_up(struct net_device *dev)
1651 struct vortex_private *vp = netdev_priv(dev);
1652 void __iomem *ioaddr = vp->ioaddr;
1653 unsigned int config;
1654 int i, mii_reg1, mii_reg5;
1656 if (VORTEX_PCI(vp)) {
1657 pci_set_power_state(VORTEX_PCI(vp), PCI_D0); /* Go active */
1658 if (vp->pm_state_valid)
1659 pci_restore_state(VORTEX_PCI(vp));
1660 pci_enable_device(VORTEX_PCI(vp));
1663 /* Before initializing select the active media port. */
1665 config = ioread32(ioaddr + Wn3_Config);
1667 if (vp->media_override != 7) {
1668 printk(KERN_INFO "%s: Media override to transceiver %d (%s).\n",
1669 dev->name, vp->media_override,
1670 media_tbl[vp->media_override].name);
1671 dev->if_port = vp->media_override;
1672 } else if (vp->autoselect) {
1674 if (vortex_debug > 1)
1675 printk(KERN_INFO "%s: using NWAY device table, not %d\n",
1676 dev->name, dev->if_port);
1677 dev->if_port = XCVR_NWAY;
1679 /* Find first available media type, starting with 100baseTx. */
1680 dev->if_port = XCVR_100baseTx;
1681 while (! (vp->available_media & media_tbl[dev->if_port].mask))
1682 dev->if_port = media_tbl[dev->if_port].next;
1683 if (vortex_debug > 1)
1684 printk(KERN_INFO "%s: first available media type: %s\n",
1685 dev->name, media_tbl[dev->if_port].name);
1688 dev->if_port = vp->default_media;
1689 if (vortex_debug > 1)
1690 printk(KERN_INFO "%s: using default media %s\n",
1691 dev->name, media_tbl[dev->if_port].name);
1694 init_timer(&vp->timer);
1695 vp->timer.expires = RUN_AT(media_tbl[dev->if_port].wait);
1696 vp->timer.data = (unsigned long)dev;
1697 vp->timer.function = vortex_timer; /* timer handler */
1698 add_timer(&vp->timer);
1700 init_timer(&vp->rx_oom_timer);
1701 vp->rx_oom_timer.data = (unsigned long)dev;
1702 vp->rx_oom_timer.function = rx_oom_timer;
1704 if (vortex_debug > 1)
1705 printk(KERN_DEBUG "%s: Initial media type %s.\n",
1706 dev->name, media_tbl[dev->if_port].name);
1708 vp->full_duplex = vp->mii.force_media;
1709 config = BFINS(config, dev->if_port, 20, 4);
1710 if (vortex_debug > 6)
1711 printk(KERN_DEBUG "vortex_up(): writing 0x%x to InternalConfig\n", config);
1712 iowrite32(config, ioaddr + Wn3_Config);
1714 if (dev->if_port == XCVR_MII || dev->if_port == XCVR_NWAY) {
1716 mii_reg1 = mdio_read(dev, vp->phys[0], MII_BMSR);
1717 mii_reg5 = mdio_read(dev, vp->phys[0], MII_LPA);
1718 vp->partner_flow_ctrl = ((mii_reg5 & 0x0400) != 0);
1720 vortex_check_media(dev, 1);
1723 vortex_set_duplex(dev);
1725 issue_and_wait(dev, TxReset);
1727 * Don't reset the PHY - that upsets autonegotiation during DHCP operations.
1729 issue_and_wait(dev, RxReset|0x04);
1732 iowrite16(SetStatusEnb | 0x00, ioaddr + EL3_CMD);
1734 if (vortex_debug > 1) {
1736 printk(KERN_DEBUG "%s: vortex_up() irq %d media status %4.4x.\n",
1737 dev->name, dev->irq, ioread16(ioaddr + Wn4_Media));
1740 /* Set the station address and mask in window 2 each time opened. */
1742 for (i = 0; i < 6; i++)
1743 iowrite8(dev->dev_addr[i], ioaddr + i);
1744 for (; i < 12; i+=2)
1745 iowrite16(0, ioaddr + i);
1747 if (vp->cb_fn_base) {
1748 unsigned short n = ioread16(ioaddr + Wn2_ResetOptions) & ~0x4010;
1749 if (vp->drv_flags & INVERT_LED_PWR)
1751 if (vp->drv_flags & INVERT_MII_PWR)
1753 iowrite16(n, ioaddr + Wn2_ResetOptions);
1756 if (dev->if_port == XCVR_10base2)
1757 /* Start the thinnet transceiver. We should really wait 50ms...*/
1758 iowrite16(StartCoax, ioaddr + EL3_CMD);
1759 if (dev->if_port != XCVR_NWAY) {
1761 iowrite16((ioread16(ioaddr + Wn4_Media) & ~(Media_10TP|Media_SQE)) |
1762 media_tbl[dev->if_port].media_bits, ioaddr + Wn4_Media);
1765 /* Switch to the stats window, and clear all stats by reading. */
1766 iowrite16(StatsDisable, ioaddr + EL3_CMD);
1768 for (i = 0; i < 10; i++)
1769 ioread8(ioaddr + i);
1770 ioread16(ioaddr + 10);
1771 ioread16(ioaddr + 12);
1772 /* New: On the Vortex we must also clear the BadSSD counter. */
1774 ioread8(ioaddr + 12);
1775 /* ..and on the Boomerang we enable the extra statistics bits. */
1776 iowrite16(0x0040, ioaddr + Wn4_NetDiag);
1778 /* Switch to register set 7 for normal use. */
1781 if (vp->full_bus_master_rx) { /* Boomerang bus master. */
1782 vp->cur_rx = vp->dirty_rx = 0;
1783 /* Initialize the RxEarly register as recommended. */
1784 iowrite16(SetRxThreshold + (1536>>2), ioaddr + EL3_CMD);
1785 iowrite32(0x0020, ioaddr + PktStatus);
1786 iowrite32(vp->rx_ring_dma, ioaddr + UpListPtr);
1788 if (vp->full_bus_master_tx) { /* Boomerang bus master Tx. */
1789 vp->cur_tx = vp->dirty_tx = 0;
1790 if (vp->drv_flags & IS_BOOMERANG)
1791 iowrite8(PKT_BUF_SZ>>8, ioaddr + TxFreeThreshold); /* Room for a packet. */
1792 /* Clear the Rx, Tx rings. */
1793 for (i = 0; i < RX_RING_SIZE; i++) /* AKPM: this is done in vortex_open, too */
1794 vp->rx_ring[i].status = 0;
1795 for (i = 0; i < TX_RING_SIZE; i++)
1796 vp->tx_skbuff[i] = NULL;
1797 iowrite32(0, ioaddr + DownListPtr);
1799 /* Set receiver mode: presumably accept b-case and phys addr only. */
1801 /* enable 802.1q tagged frames */
1802 set_8021q_mode(dev, 1);
1803 iowrite16(StatsEnable, ioaddr + EL3_CMD); /* Turn on statistics. */
1805 iowrite16(RxEnable, ioaddr + EL3_CMD); /* Enable the receiver. */
1806 iowrite16(TxEnable, ioaddr + EL3_CMD); /* Enable transmitter. */
1807 /* Allow status bits to be seen. */
1808 vp->status_enable = SetStatusEnb | HostError|IntReq|StatsFull|TxComplete|
1809 (vp->full_bus_master_tx ? DownComplete : TxAvailable) |
1810 (vp->full_bus_master_rx ? UpComplete : RxComplete) |
1811 (vp->bus_master ? DMADone : 0);
1812 vp->intr_enable = SetIntrEnb | IntLatch | TxAvailable |
1813 (vp->full_bus_master_rx ? 0 : RxComplete) |
1814 StatsFull | HostError | TxComplete | IntReq
1815 | (vp->bus_master ? DMADone : 0) | UpComplete | DownComplete;
1816 iowrite16(vp->status_enable, ioaddr + EL3_CMD);
1817 /* Ack all pending events, and set active indicator mask. */
1818 iowrite16(AckIntr | IntLatch | TxAvailable | RxEarly | IntReq,
1820 iowrite16(vp->intr_enable, ioaddr + EL3_CMD);
1821 if (vp->cb_fn_base) /* The PCMCIA people are idiots. */
1822 iowrite32(0x8000, vp->cb_fn_base + 4);
1823 netif_start_queue (dev);
1827 vortex_open(struct net_device *dev)
1829 struct vortex_private *vp = netdev_priv(dev);
1833 /* Use the now-standard shared IRQ implementation. */
1834 if ((retval = request_irq(dev->irq, vp->full_bus_master_rx ?
1835 &boomerang_interrupt : &vortex_interrupt, SA_SHIRQ, dev->name, dev))) {
1836 printk(KERN_ERR "%s: Could not reserve IRQ %d\n", dev->name, dev->irq);
1840 if (vp->full_bus_master_rx) { /* Boomerang bus master. */
1841 if (vortex_debug > 2)
1842 printk(KERN_DEBUG "%s: Filling in the Rx ring.\n", dev->name);
1843 for (i = 0; i < RX_RING_SIZE; i++) {
1844 struct sk_buff *skb;
1845 vp->rx_ring[i].next = cpu_to_le32(vp->rx_ring_dma + sizeof(struct boom_rx_desc) * (i+1));
1846 vp->rx_ring[i].status = 0; /* Clear complete bit. */
1847 vp->rx_ring[i].length = cpu_to_le32(PKT_BUF_SZ | LAST_FRAG);
1848 skb = dev_alloc_skb(PKT_BUF_SZ);
1849 vp->rx_skbuff[i] = skb;
1851 break; /* Bad news! */
1852 skb->dev = dev; /* Mark as being used by this device. */
1853 skb_reserve(skb, 2); /* Align IP on 16 byte boundaries */
1854 vp->rx_ring[i].addr = cpu_to_le32(pci_map_single(VORTEX_PCI(vp), skb->data, PKT_BUF_SZ, PCI_DMA_FROMDEVICE));
1856 if (i != RX_RING_SIZE) {
1858 printk(KERN_EMERG "%s: no memory for rx ring\n", dev->name);
1859 for (j = 0; j < i; j++) {
1860 if (vp->rx_skbuff[j]) {
1861 dev_kfree_skb(vp->rx_skbuff[j]);
1862 vp->rx_skbuff[j] = NULL;
1868 /* Wrap the ring. */
1869 vp->rx_ring[i-1].next = cpu_to_le32(vp->rx_ring_dma);
1876 free_irq(dev->irq, dev);
1878 if (vortex_debug > 1)
1879 printk(KERN_ERR "%s: vortex_open() fails: returning %d\n", dev->name, retval);
1884 vortex_timer(unsigned long data)
1886 struct net_device *dev = (struct net_device *)data;
1887 struct vortex_private *vp = netdev_priv(dev);
1888 void __iomem *ioaddr = vp->ioaddr;
1889 int next_tick = 60*HZ;
1891 int media_status, old_window;
1893 if (vortex_debug > 2) {
1894 printk(KERN_DEBUG "%s: Media selection timer tick happened, %s.\n",
1895 dev->name, media_tbl[dev->if_port].name);
1896 printk(KERN_DEBUG "dev->watchdog_timeo=%d\n", dev->watchdog_timeo);
1899 disable_irq(dev->irq);
1900 old_window = ioread16(ioaddr + EL3_CMD) >> 13;
1902 media_status = ioread16(ioaddr + Wn4_Media);
1903 switch (dev->if_port) {
1904 case XCVR_10baseT: case XCVR_100baseTx: case XCVR_100baseFx:
1905 if (media_status & Media_LnkBeat) {
1906 netif_carrier_on(dev);
1908 if (vortex_debug > 1)
1909 printk(KERN_DEBUG "%s: Media %s has link beat, %x.\n",
1910 dev->name, media_tbl[dev->if_port].name, media_status);
1912 netif_carrier_off(dev);
1913 if (vortex_debug > 1) {
1914 printk(KERN_DEBUG "%s: Media %s has no link beat, %x.\n",
1915 dev->name, media_tbl[dev->if_port].name, media_status);
1919 case XCVR_MII: case XCVR_NWAY:
1922 spin_lock_bh(&vp->lock);
1923 vortex_check_media(dev, 0);
1924 spin_unlock_bh(&vp->lock);
1927 default: /* Other media types handled by Tx timeouts. */
1928 if (vortex_debug > 1)
1929 printk(KERN_DEBUG "%s: Media %s has no indication, %x.\n",
1930 dev->name, media_tbl[dev->if_port].name, media_status);
1934 if (!netif_carrier_ok(dev))
1938 goto leave_media_alone;
1941 unsigned int config;
1944 dev->if_port = media_tbl[dev->if_port].next;
1945 } while ( ! (vp->available_media & media_tbl[dev->if_port].mask));
1946 if (dev->if_port == XCVR_Default) { /* Go back to default. */
1947 dev->if_port = vp->default_media;
1948 if (vortex_debug > 1)
1949 printk(KERN_DEBUG "%s: Media selection failing, using default "
1951 dev->name, media_tbl[dev->if_port].name);
1953 if (vortex_debug > 1)
1954 printk(KERN_DEBUG "%s: Media selection failed, now trying "
1956 dev->name, media_tbl[dev->if_port].name);
1957 next_tick = media_tbl[dev->if_port].wait;
1959 iowrite16((media_status & ~(Media_10TP|Media_SQE)) |
1960 media_tbl[dev->if_port].media_bits, ioaddr + Wn4_Media);
1963 config = ioread32(ioaddr + Wn3_Config);
1964 config = BFINS(config, dev->if_port, 20, 4);
1965 iowrite32(config, ioaddr + Wn3_Config);
1967 iowrite16(dev->if_port == XCVR_10base2 ? StartCoax : StopCoax,
1969 if (vortex_debug > 1)
1970 printk(KERN_DEBUG "wrote 0x%08x to Wn3_Config\n", config);
1971 /* AKPM: FIXME: Should reset Rx & Tx here. P60 of 3c90xc.pdf */
1975 if (vortex_debug > 2)
1976 printk(KERN_DEBUG "%s: Media selection timer finished, %s.\n",
1977 dev->name, media_tbl[dev->if_port].name);
1979 EL3WINDOW(old_window);
1980 enable_irq(dev->irq);
1981 mod_timer(&vp->timer, RUN_AT(next_tick));
1983 iowrite16(FakeIntr, ioaddr + EL3_CMD);
1987 static void vortex_tx_timeout(struct net_device *dev)
1989 struct vortex_private *vp = netdev_priv(dev);
1990 void __iomem *ioaddr = vp->ioaddr;
1992 printk(KERN_ERR "%s: transmit timed out, tx_status %2.2x status %4.4x.\n",
1993 dev->name, ioread8(ioaddr + TxStatus),
1994 ioread16(ioaddr + EL3_STATUS));
1996 printk(KERN_ERR " diagnostics: net %04x media %04x dma %08x fifo %04x\n",
1997 ioread16(ioaddr + Wn4_NetDiag),
1998 ioread16(ioaddr + Wn4_Media),
1999 ioread32(ioaddr + PktStatus),
2000 ioread16(ioaddr + Wn4_FIFODiag));
2001 /* Slight code bloat to be user friendly. */
2002 if ((ioread8(ioaddr + TxStatus) & 0x88) == 0x88)
2003 printk(KERN_ERR "%s: Transmitter encountered 16 collisions --"
2004 " network cable problem?\n", dev->name);
2005 if (ioread16(ioaddr + EL3_STATUS) & IntLatch) {
2006 printk(KERN_ERR "%s: Interrupt posted but not delivered --"
2007 " IRQ blocked by another device?\n", dev->name);
2008 /* Bad idea here.. but we might as well handle a few events. */
2011 * Block interrupts because vortex_interrupt does a bare spin_lock()
2013 unsigned long flags;
2014 local_irq_save(flags);
2015 if (vp->full_bus_master_tx)
2016 boomerang_interrupt(dev->irq, dev, NULL);
2018 vortex_interrupt(dev->irq, dev, NULL);
2019 local_irq_restore(flags);
2023 if (vortex_debug > 0)
2026 issue_and_wait(dev, TxReset);
2028 vp->stats.tx_errors++;
2029 if (vp->full_bus_master_tx) {
2030 printk(KERN_DEBUG "%s: Resetting the Tx ring pointer.\n", dev->name);
2031 if (vp->cur_tx - vp->dirty_tx > 0 && ioread32(ioaddr + DownListPtr) == 0)
2032 iowrite32(vp->tx_ring_dma + (vp->dirty_tx % TX_RING_SIZE) * sizeof(struct boom_tx_desc),
2033 ioaddr + DownListPtr);
2034 if (vp->cur_tx - vp->dirty_tx < TX_RING_SIZE)
2035 netif_wake_queue (dev);
2036 if (vp->drv_flags & IS_BOOMERANG)
2037 iowrite8(PKT_BUF_SZ>>8, ioaddr + TxFreeThreshold);
2038 iowrite16(DownUnstall, ioaddr + EL3_CMD);
2040 vp->stats.tx_dropped++;
2041 netif_wake_queue(dev);
2044 /* Issue Tx Enable */
2045 iowrite16(TxEnable, ioaddr + EL3_CMD);
2046 dev->trans_start = jiffies;
2048 /* Switch to register set 7 for normal use. */
2053 * Handle uncommon interrupt sources. This is a separate routine to minimize
2057 vortex_error(struct net_device *dev, int status)
2059 struct vortex_private *vp = netdev_priv(dev);
2060 void __iomem *ioaddr = vp->ioaddr;
2061 int do_tx_reset = 0, reset_mask = 0;
2062 unsigned char tx_status = 0;
2064 if (vortex_debug > 2) {
2065 printk(KERN_ERR "%s: vortex_error(), status=0x%x\n", dev->name, status);
2068 if (status & TxComplete) { /* Really "TxError" for us. */
2069 tx_status = ioread8(ioaddr + TxStatus);
2070 /* Presumably a tx-timeout. We must merely re-enable. */
2071 if (vortex_debug > 2
2072 || (tx_status != 0x88 && vortex_debug > 0)) {
2073 printk(KERN_ERR "%s: Transmit error, Tx status register %2.2x.\n",
2074 dev->name, tx_status);
2075 if (tx_status == 0x82) {
2076 printk(KERN_ERR "Probably a duplex mismatch. See "
2077 "Documentation/networking/vortex.txt\n");
2081 if (tx_status & 0x14) vp->stats.tx_fifo_errors++;
2082 if (tx_status & 0x38) vp->stats.tx_aborted_errors++;
2083 if (tx_status & 0x08) vp->xstats.tx_max_collisions++;
2084 iowrite8(0, ioaddr + TxStatus);
2085 if (tx_status & 0x30) { /* txJabber or txUnderrun */
2087 } else if ((tx_status & 0x08) && (vp->drv_flags & MAX_COLLISION_RESET)) { /* maxCollisions */
2089 reset_mask = 0x0108; /* Reset interface logic, but not download logic */
2090 } else { /* Merely re-enable the transmitter. */
2091 iowrite16(TxEnable, ioaddr + EL3_CMD);
2095 if (status & RxEarly) { /* Rx early is unused. */
2097 iowrite16(AckIntr | RxEarly, ioaddr + EL3_CMD);
2099 if (status & StatsFull) { /* Empty statistics. */
2100 static int DoneDidThat;
2101 if (vortex_debug > 4)
2102 printk(KERN_DEBUG "%s: Updating stats.\n", dev->name);
2103 update_stats(ioaddr, dev);
2104 /* HACK: Disable statistics as an interrupt source. */
2105 /* This occurs when we have the wrong media type! */
2106 if (DoneDidThat == 0 &&
2107 ioread16(ioaddr + EL3_STATUS) & StatsFull) {
2108 printk(KERN_WARNING "%s: Updating statistics failed, disabling "
2109 "stats as an interrupt source.\n", dev->name);
2111 iowrite16(SetIntrEnb | (ioread16(ioaddr + 10) & ~StatsFull), ioaddr + EL3_CMD);
2112 vp->intr_enable &= ~StatsFull;
2117 if (status & IntReq) { /* Restore all interrupt sources. */
2118 iowrite16(vp->status_enable, ioaddr + EL3_CMD);
2119 iowrite16(vp->intr_enable, ioaddr + EL3_CMD);
2121 if (status & HostError) {
2124 fifo_diag = ioread16(ioaddr + Wn4_FIFODiag);
2125 printk(KERN_ERR "%s: Host error, FIFO diagnostic register %4.4x.\n",
2126 dev->name, fifo_diag);
2127 /* Adapter failure requires Tx/Rx reset and reinit. */
2128 if (vp->full_bus_master_tx) {
2129 int bus_status = ioread32(ioaddr + PktStatus);
2130 /* 0x80000000 PCI master abort. */
2131 /* 0x40000000 PCI target abort. */
2133 printk(KERN_ERR "%s: PCI bus error, bus status %8.8x\n", dev->name, bus_status);
2135 /* In this case, blow the card away */
2136 /* Must not enter D3 or we can't legally issue the reset! */
2137 vortex_down(dev, 0);
2138 issue_and_wait(dev, TotalReset | 0xff);
2139 vortex_up(dev); /* AKPM: bug. vortex_up() assumes that the rx ring is full. It may not be. */
2140 } else if (fifo_diag & 0x0400)
2142 if (fifo_diag & 0x3000) {
2143 /* Reset Rx fifo and upload logic */
2144 issue_and_wait(dev, RxReset|0x07);
2145 /* Set the Rx filter to the current state. */
2147 /* enable 802.1q VLAN tagged frames */
2148 set_8021q_mode(dev, 1);
2149 iowrite16(RxEnable, ioaddr + EL3_CMD); /* Re-enable the receiver. */
2150 iowrite16(AckIntr | HostError, ioaddr + EL3_CMD);
2155 issue_and_wait(dev, TxReset|reset_mask);
2156 iowrite16(TxEnable, ioaddr + EL3_CMD);
2157 if (!vp->full_bus_master_tx)
2158 netif_wake_queue(dev);
2163 vortex_start_xmit(struct sk_buff *skb, struct net_device *dev)
2165 struct vortex_private *vp = netdev_priv(dev);
2166 void __iomem *ioaddr = vp->ioaddr;
2168 /* Put out the doubleword header... */
2169 iowrite32(skb->len, ioaddr + TX_FIFO);
2170 if (vp->bus_master) {
2171 /* Set the bus-master controller to transfer the packet. */
2172 int len = (skb->len + 3) & ~3;
2173 iowrite32(vp->tx_skb_dma = pci_map_single(VORTEX_PCI(vp), skb->data, len, PCI_DMA_TODEVICE),
2174 ioaddr + Wn7_MasterAddr);
2175 iowrite16(len, ioaddr + Wn7_MasterLen);
2177 iowrite16(StartDMADown, ioaddr + EL3_CMD);
2178 /* netif_wake_queue() will be called at the DMADone interrupt. */
2180 /* ... and the packet rounded to a doubleword. */
2181 iowrite32_rep(ioaddr + TX_FIFO, skb->data, (skb->len + 3) >> 2);
2182 dev_kfree_skb (skb);
2183 if (ioread16(ioaddr + TxFree) > 1536) {
2184 netif_start_queue (dev); /* AKPM: redundant? */
2186 /* Interrupt us when the FIFO has room for max-sized packet. */
2187 netif_stop_queue(dev);
2188 iowrite16(SetTxThreshold + (1536>>2), ioaddr + EL3_CMD);
2192 dev->trans_start = jiffies;
2194 /* Clear the Tx status stack. */
2199 while (--i > 0 && (tx_status = ioread8(ioaddr + TxStatus)) > 0) {
2200 if (tx_status & 0x3C) { /* A Tx-disabling error occurred. */
2201 if (vortex_debug > 2)
2202 printk(KERN_DEBUG "%s: Tx error, status %2.2x.\n",
2203 dev->name, tx_status);
2204 if (tx_status & 0x04) vp->stats.tx_fifo_errors++;
2205 if (tx_status & 0x38) vp->stats.tx_aborted_errors++;
2206 if (tx_status & 0x30) {
2207 issue_and_wait(dev, TxReset);
2209 iowrite16(TxEnable, ioaddr + EL3_CMD);
2211 iowrite8(0x00, ioaddr + TxStatus); /* Pop the status stack. */
2218 boomerang_start_xmit(struct sk_buff *skb, struct net_device *dev)
2220 struct vortex_private *vp = netdev_priv(dev);
2221 void __iomem *ioaddr = vp->ioaddr;
2222 /* Calculate the next Tx descriptor entry. */
2223 int entry = vp->cur_tx % TX_RING_SIZE;
2224 struct boom_tx_desc *prev_entry = &vp->tx_ring[(vp->cur_tx-1) % TX_RING_SIZE];
2225 unsigned long flags;
2227 if (vortex_debug > 6) {
2228 printk(KERN_DEBUG "boomerang_start_xmit()\n");
2229 printk(KERN_DEBUG "%s: Trying to send a packet, Tx index %d.\n",
2230 dev->name, vp->cur_tx);
2233 if (vp->cur_tx - vp->dirty_tx >= TX_RING_SIZE) {
2234 if (vortex_debug > 0)
2235 printk(KERN_WARNING "%s: BUG! Tx Ring full, refusing to send buffer.\n",
2237 netif_stop_queue(dev);
2241 vp->tx_skbuff[entry] = skb;
2243 vp->tx_ring[entry].next = 0;
2245 if (skb->ip_summed != CHECKSUM_HW)
2246 vp->tx_ring[entry].status = cpu_to_le32(skb->len | TxIntrUploaded);
2248 vp->tx_ring[entry].status = cpu_to_le32(skb->len | TxIntrUploaded | AddTCPChksum | AddUDPChksum);
2250 if (!skb_shinfo(skb)->nr_frags) {
2251 vp->tx_ring[entry].frag[0].addr = cpu_to_le32(pci_map_single(VORTEX_PCI(vp), skb->data,
2252 skb->len, PCI_DMA_TODEVICE));
2253 vp->tx_ring[entry].frag[0].length = cpu_to_le32(skb->len | LAST_FRAG);
2257 vp->tx_ring[entry].frag[0].addr = cpu_to_le32(pci_map_single(VORTEX_PCI(vp), skb->data,
2258 skb->len-skb->data_len, PCI_DMA_TODEVICE));
2259 vp->tx_ring[entry].frag[0].length = cpu_to_le32(skb->len-skb->data_len);
2261 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
2262 skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
2264 vp->tx_ring[entry].frag[i+1].addr =
2265 cpu_to_le32(pci_map_single(VORTEX_PCI(vp),
2266 (void*)page_address(frag->page) + frag->page_offset,
2267 frag->size, PCI_DMA_TODEVICE));
2269 if (i == skb_shinfo(skb)->nr_frags-1)
2270 vp->tx_ring[entry].frag[i+1].length = cpu_to_le32(frag->size|LAST_FRAG);
2272 vp->tx_ring[entry].frag[i+1].length = cpu_to_le32(frag->size);
2276 vp->tx_ring[entry].addr = cpu_to_le32(pci_map_single(VORTEX_PCI(vp), skb->data, skb->len, PCI_DMA_TODEVICE));
2277 vp->tx_ring[entry].length = cpu_to_le32(skb->len | LAST_FRAG);
2278 vp->tx_ring[entry].status = cpu_to_le32(skb->len | TxIntrUploaded);
2281 spin_lock_irqsave(&vp->lock, flags);
2282 /* Wait for the stall to complete. */
2283 issue_and_wait(dev, DownStall);
2284 prev_entry->next = cpu_to_le32(vp->tx_ring_dma + entry * sizeof(struct boom_tx_desc));
2285 if (ioread32(ioaddr + DownListPtr) == 0) {
2286 iowrite32(vp->tx_ring_dma + entry * sizeof(struct boom_tx_desc), ioaddr + DownListPtr);
2287 vp->queued_packet++;
2291 if (vp->cur_tx - vp->dirty_tx > TX_RING_SIZE - 1) {
2292 netif_stop_queue (dev);
2293 } else { /* Clear previous interrupt enable. */
2294 #if defined(tx_interrupt_mitigation)
2295 /* Dubious. If in boomeang_interrupt "faster" cyclone ifdef
2296 * were selected, this would corrupt DN_COMPLETE. No?
2298 prev_entry->status &= cpu_to_le32(~TxIntrUploaded);
2301 iowrite16(DownUnstall, ioaddr + EL3_CMD);
2302 spin_unlock_irqrestore(&vp->lock, flags);
2303 dev->trans_start = jiffies;
2307 /* The interrupt handler does all of the Rx thread work and cleans up
2308 after the Tx thread. */
2311 * This is the ISR for the vortex series chips.
2312 * full_bus_master_tx == 0 && full_bus_master_rx == 0
2316 vortex_interrupt(int irq, void *dev_id, struct pt_regs *regs)
2318 struct net_device *dev = dev_id;
2319 struct vortex_private *vp = netdev_priv(dev);
2320 void __iomem *ioaddr;
2322 int work_done = max_interrupt_work;
2325 ioaddr = vp->ioaddr;
2326 spin_lock(&vp->lock);
2328 status = ioread16(ioaddr + EL3_STATUS);
2330 if (vortex_debug > 6)
2331 printk("vortex_interrupt(). status=0x%4x\n", status);
2333 if ((status & IntLatch) == 0)
2334 goto handler_exit; /* No interrupt: shared IRQs cause this */
2337 if (status & IntReq) {
2338 status |= vp->deferred;
2342 if (status == 0xffff) /* h/w no longer present (hotplug)? */
2345 if (vortex_debug > 4)
2346 printk(KERN_DEBUG "%s: interrupt, status %4.4x, latency %d ticks.\n",
2347 dev->name, status, ioread8(ioaddr + Timer));
2350 if (vortex_debug > 5)
2351 printk(KERN_DEBUG "%s: In interrupt loop, status %4.4x.\n",
2353 if (status & RxComplete)
2356 if (status & TxAvailable) {
2357 if (vortex_debug > 5)
2358 printk(KERN_DEBUG " TX room bit was handled.\n");
2359 /* There's room in the FIFO for a full-sized packet. */
2360 iowrite16(AckIntr | TxAvailable, ioaddr + EL3_CMD);
2361 netif_wake_queue (dev);
2364 if (status & DMADone) {
2365 if (ioread16(ioaddr + Wn7_MasterStatus) & 0x1000) {
2366 iowrite16(0x1000, ioaddr + Wn7_MasterStatus); /* Ack the event. */
2367 pci_unmap_single(VORTEX_PCI(vp), vp->tx_skb_dma, (vp->tx_skb->len + 3) & ~3, PCI_DMA_TODEVICE);
2368 dev_kfree_skb_irq(vp->tx_skb); /* Release the transferred buffer */
2369 if (ioread16(ioaddr + TxFree) > 1536) {
2371 * AKPM: FIXME: I don't think we need this. If the queue was stopped due to
2372 * insufficient FIFO room, the TxAvailable test will succeed and call
2373 * netif_wake_queue()
2375 netif_wake_queue(dev);
2376 } else { /* Interrupt when FIFO has room for max-sized packet. */
2377 iowrite16(SetTxThreshold + (1536>>2), ioaddr + EL3_CMD);
2378 netif_stop_queue(dev);
2382 /* Check for all uncommon interrupts at once. */
2383 if (status & (HostError | RxEarly | StatsFull | TxComplete | IntReq)) {
2384 if (status == 0xffff)
2386 vortex_error(dev, status);
2389 if (--work_done < 0) {
2390 printk(KERN_WARNING "%s: Too much work in interrupt, status "
2391 "%4.4x.\n", dev->name, status);
2392 /* Disable all pending interrupts. */
2394 vp->deferred |= status;
2395 iowrite16(SetStatusEnb | (~vp->deferred & vp->status_enable),
2397 iowrite16(AckIntr | (vp->deferred & 0x7ff), ioaddr + EL3_CMD);
2398 } while ((status = ioread16(ioaddr + EL3_CMD)) & IntLatch);
2399 /* The timer will reenable interrupts. */
2400 mod_timer(&vp->timer, jiffies + 1*HZ);
2403 /* Acknowledge the IRQ. */
2404 iowrite16(AckIntr | IntReq | IntLatch, ioaddr + EL3_CMD);
2405 } while ((status = ioread16(ioaddr + EL3_STATUS)) & (IntLatch | RxComplete));
2407 if (vortex_debug > 4)
2408 printk(KERN_DEBUG "%s: exiting interrupt, status %4.4x.\n",
2411 spin_unlock(&vp->lock);
2412 return IRQ_RETVAL(handled);
2416 * This is the ISR for the boomerang series chips.
2417 * full_bus_master_tx == 1 && full_bus_master_rx == 1
2421 boomerang_interrupt(int irq, void *dev_id, struct pt_regs *regs)
2423 struct net_device *dev = dev_id;
2424 struct vortex_private *vp = netdev_priv(dev);
2425 void __iomem *ioaddr;
2427 int work_done = max_interrupt_work;
2429 ioaddr = vp->ioaddr;
2432 * It seems dopey to put the spinlock this early, but we could race against vortex_tx_timeout
2433 * and boomerang_start_xmit
2435 spin_lock(&vp->lock);
2437 status = ioread16(ioaddr + EL3_STATUS);
2439 if (vortex_debug > 6)
2440 printk(KERN_DEBUG "boomerang_interrupt. status=0x%4x\n", status);
2442 if ((status & IntLatch) == 0)
2443 goto handler_exit; /* No interrupt: shared IRQs can cause this */
2445 if (status == 0xffff) { /* h/w no longer present (hotplug)? */
2446 if (vortex_debug > 1)
2447 printk(KERN_DEBUG "boomerang_interrupt(1): status = 0xffff\n");
2451 if (status & IntReq) {
2452 status |= vp->deferred;
2456 if (vortex_debug > 4)
2457 printk(KERN_DEBUG "%s: interrupt, status %4.4x, latency %d ticks.\n",
2458 dev->name, status, ioread8(ioaddr + Timer));
2460 if (vortex_debug > 5)
2461 printk(KERN_DEBUG "%s: In interrupt loop, status %4.4x.\n",
2463 if (status & UpComplete) {
2464 iowrite16(AckIntr | UpComplete, ioaddr + EL3_CMD);
2465 if (vortex_debug > 5)
2466 printk(KERN_DEBUG "boomerang_interrupt->boomerang_rx\n");
2470 if (status & DownComplete) {
2471 unsigned int dirty_tx = vp->dirty_tx;
2473 iowrite16(AckIntr | DownComplete, ioaddr + EL3_CMD);
2474 while (vp->cur_tx - dirty_tx > 0) {
2475 int entry = dirty_tx % TX_RING_SIZE;
2476 #if 1 /* AKPM: the latter is faster, but cyclone-only */
2477 if (ioread32(ioaddr + DownListPtr) ==
2478 vp->tx_ring_dma + entry * sizeof(struct boom_tx_desc))
2479 break; /* It still hasn't been processed. */
2481 if ((vp->tx_ring[entry].status & DN_COMPLETE) == 0)
2482 break; /* It still hasn't been processed. */
2485 if (vp->tx_skbuff[entry]) {
2486 struct sk_buff *skb = vp->tx_skbuff[entry];
2489 for (i=0; i<=skb_shinfo(skb)->nr_frags; i++)
2490 pci_unmap_single(VORTEX_PCI(vp),
2491 le32_to_cpu(vp->tx_ring[entry].frag[i].addr),
2492 le32_to_cpu(vp->tx_ring[entry].frag[i].length)&0xFFF,
2495 pci_unmap_single(VORTEX_PCI(vp),
2496 le32_to_cpu(vp->tx_ring[entry].addr), skb->len, PCI_DMA_TODEVICE);
2498 dev_kfree_skb_irq(skb);
2499 vp->tx_skbuff[entry] = NULL;
2501 printk(KERN_DEBUG "boomerang_interrupt: no skb!\n");
2503 /* vp->stats.tx_packets++; Counted below. */
2506 vp->dirty_tx = dirty_tx;
2507 if (vp->cur_tx - dirty_tx <= TX_RING_SIZE - 1) {
2508 if (vortex_debug > 6)
2509 printk(KERN_DEBUG "boomerang_interrupt: wake queue\n");
2510 netif_wake_queue (dev);
2514 /* Check for all uncommon interrupts at once. */
2515 if (status & (HostError | RxEarly | StatsFull | TxComplete | IntReq))
2516 vortex_error(dev, status);
2518 if (--work_done < 0) {
2519 printk(KERN_WARNING "%s: Too much work in interrupt, status "
2520 "%4.4x.\n", dev->name, status);
2521 /* Disable all pending interrupts. */
2523 vp->deferred |= status;
2524 iowrite16(SetStatusEnb | (~vp->deferred & vp->status_enable),
2526 iowrite16(AckIntr | (vp->deferred & 0x7ff), ioaddr + EL3_CMD);
2527 } while ((status = ioread16(ioaddr + EL3_CMD)) & IntLatch);
2528 /* The timer will reenable interrupts. */
2529 mod_timer(&vp->timer, jiffies + 1*HZ);
2532 /* Acknowledge the IRQ. */
2533 iowrite16(AckIntr | IntReq | IntLatch, ioaddr + EL3_CMD);
2534 if (vp->cb_fn_base) /* The PCMCIA people are idiots. */
2535 iowrite32(0x8000, vp->cb_fn_base + 4);
2537 } while ((status = ioread16(ioaddr + EL3_STATUS)) & IntLatch);
2539 if (vortex_debug > 4)
2540 printk(KERN_DEBUG "%s: exiting interrupt, status %4.4x.\n",
2543 spin_unlock(&vp->lock);
2547 static int vortex_rx(struct net_device *dev)
2549 struct vortex_private *vp = netdev_priv(dev);
2550 void __iomem *ioaddr = vp->ioaddr;
2554 if (vortex_debug > 5)
2555 printk(KERN_DEBUG "vortex_rx(): status %4.4x, rx_status %4.4x.\n",
2556 ioread16(ioaddr+EL3_STATUS), ioread16(ioaddr+RxStatus));
2557 while ((rx_status = ioread16(ioaddr + RxStatus)) > 0) {
2558 if (rx_status & 0x4000) { /* Error, update stats. */
2559 unsigned char rx_error = ioread8(ioaddr + RxErrors);
2560 if (vortex_debug > 2)
2561 printk(KERN_DEBUG " Rx error: status %2.2x.\n", rx_error);
2562 vp->stats.rx_errors++;
2563 if (rx_error & 0x01) vp->stats.rx_over_errors++;
2564 if (rx_error & 0x02) vp->stats.rx_length_errors++;
2565 if (rx_error & 0x04) vp->stats.rx_frame_errors++;
2566 if (rx_error & 0x08) vp->stats.rx_crc_errors++;
2567 if (rx_error & 0x10) vp->stats.rx_length_errors++;
2569 /* The packet length: up to 4.5K!. */
2570 int pkt_len = rx_status & 0x1fff;
2571 struct sk_buff *skb;
2573 skb = dev_alloc_skb(pkt_len + 5);
2574 if (vortex_debug > 4)
2575 printk(KERN_DEBUG "Receiving packet size %d status %4.4x.\n",
2576 pkt_len, rx_status);
2579 skb_reserve(skb, 2); /* Align IP on 16 byte boundaries */
2580 /* 'skb_put()' points to the start of sk_buff data area. */
2581 if (vp->bus_master &&
2582 ! (ioread16(ioaddr + Wn7_MasterStatus) & 0x8000)) {
2583 dma_addr_t dma = pci_map_single(VORTEX_PCI(vp), skb_put(skb, pkt_len),
2584 pkt_len, PCI_DMA_FROMDEVICE);
2585 iowrite32(dma, ioaddr + Wn7_MasterAddr);
2586 iowrite16((skb->len + 3) & ~3, ioaddr + Wn7_MasterLen);
2587 iowrite16(StartDMAUp, ioaddr + EL3_CMD);
2588 while (ioread16(ioaddr + Wn7_MasterStatus) & 0x8000)
2590 pci_unmap_single(VORTEX_PCI(vp), dma, pkt_len, PCI_DMA_FROMDEVICE);
2592 ioread32_rep(ioaddr + RX_FIFO,
2593 skb_put(skb, pkt_len),
2594 (pkt_len + 3) >> 2);
2596 iowrite16(RxDiscard, ioaddr + EL3_CMD); /* Pop top Rx packet. */
2597 skb->protocol = eth_type_trans(skb, dev);
2599 dev->last_rx = jiffies;
2600 vp->stats.rx_packets++;
2601 /* Wait a limited time to go to next packet. */
2602 for (i = 200; i >= 0; i--)
2603 if ( ! (ioread16(ioaddr + EL3_STATUS) & CmdInProgress))
2606 } else if (vortex_debug > 0)
2607 printk(KERN_NOTICE "%s: No memory to allocate a sk_buff of "
2608 "size %d.\n", dev->name, pkt_len);
2609 vp->stats.rx_dropped++;
2611 issue_and_wait(dev, RxDiscard);
2618 boomerang_rx(struct net_device *dev)
2620 struct vortex_private *vp = netdev_priv(dev);
2621 int entry = vp->cur_rx % RX_RING_SIZE;
2622 void __iomem *ioaddr = vp->ioaddr;
2624 int rx_work_limit = vp->dirty_rx + RX_RING_SIZE - vp->cur_rx;
2626 if (vortex_debug > 5)
2627 printk(KERN_DEBUG "boomerang_rx(): status %4.4x\n", ioread16(ioaddr+EL3_STATUS));
2629 while ((rx_status = le32_to_cpu(vp->rx_ring[entry].status)) & RxDComplete){
2630 if (--rx_work_limit < 0)
2632 if (rx_status & RxDError) { /* Error, update stats. */
2633 unsigned char rx_error = rx_status >> 16;
2634 if (vortex_debug > 2)
2635 printk(KERN_DEBUG " Rx error: status %2.2x.\n", rx_error);
2636 vp->stats.rx_errors++;
2637 if (rx_error & 0x01) vp->stats.rx_over_errors++;
2638 if (rx_error & 0x02) vp->stats.rx_length_errors++;
2639 if (rx_error & 0x04) vp->stats.rx_frame_errors++;
2640 if (rx_error & 0x08) vp->stats.rx_crc_errors++;
2641 if (rx_error & 0x10) vp->stats.rx_length_errors++;
2643 /* The packet length: up to 4.5K!. */
2644 int pkt_len = rx_status & 0x1fff;
2645 struct sk_buff *skb;
2646 dma_addr_t dma = le32_to_cpu(vp->rx_ring[entry].addr);
2648 if (vortex_debug > 4)
2649 printk(KERN_DEBUG "Receiving packet size %d status %4.4x.\n",
2650 pkt_len, rx_status);
2652 /* Check if the packet is long enough to just accept without
2653 copying to a properly sized skbuff. */
2654 if (pkt_len < rx_copybreak && (skb = dev_alloc_skb(pkt_len + 2)) != 0) {
2656 skb_reserve(skb, 2); /* Align IP on 16 byte boundaries */
2657 pci_dma_sync_single_for_cpu(VORTEX_PCI(vp), dma, PKT_BUF_SZ, PCI_DMA_FROMDEVICE);
2658 /* 'skb_put()' points to the start of sk_buff data area. */
2659 memcpy(skb_put(skb, pkt_len),
2660 vp->rx_skbuff[entry]->data,
2662 pci_dma_sync_single_for_device(VORTEX_PCI(vp), dma, PKT_BUF_SZ, PCI_DMA_FROMDEVICE);
2665 /* Pass up the skbuff already on the Rx ring. */
2666 skb = vp->rx_skbuff[entry];
2667 vp->rx_skbuff[entry] = NULL;
2668 skb_put(skb, pkt_len);
2669 pci_unmap_single(VORTEX_PCI(vp), dma, PKT_BUF_SZ, PCI_DMA_FROMDEVICE);
2672 skb->protocol = eth_type_trans(skb, dev);
2673 { /* Use hardware checksum info. */
2674 int csum_bits = rx_status & 0xee000000;
2676 (csum_bits == (IPChksumValid | TCPChksumValid) ||
2677 csum_bits == (IPChksumValid | UDPChksumValid))) {
2678 skb->ip_summed = CHECKSUM_UNNECESSARY;
2683 dev->last_rx = jiffies;
2684 vp->stats.rx_packets++;
2686 entry = (++vp->cur_rx) % RX_RING_SIZE;
2688 /* Refill the Rx ring buffers. */
2689 for (; vp->cur_rx - vp->dirty_rx > 0; vp->dirty_rx++) {
2690 struct sk_buff *skb;
2691 entry = vp->dirty_rx % RX_RING_SIZE;
2692 if (vp->rx_skbuff[entry] == NULL) {
2693 skb = dev_alloc_skb(PKT_BUF_SZ);
2695 static unsigned long last_jif;
2696 if (time_after(jiffies, last_jif + 10 * HZ)) {
2697 printk(KERN_WARNING "%s: memory shortage\n", dev->name);
2700 if ((vp->cur_rx - vp->dirty_rx) == RX_RING_SIZE)
2701 mod_timer(&vp->rx_oom_timer, RUN_AT(HZ * 1));
2702 break; /* Bad news! */
2704 skb->dev = dev; /* Mark as being used by this device. */
2705 skb_reserve(skb, 2); /* Align IP on 16 byte boundaries */
2706 vp->rx_ring[entry].addr = cpu_to_le32(pci_map_single(VORTEX_PCI(vp), skb->data, PKT_BUF_SZ, PCI_DMA_FROMDEVICE));
2707 vp->rx_skbuff[entry] = skb;
2709 vp->rx_ring[entry].status = 0; /* Clear complete bit. */
2710 iowrite16(UpUnstall, ioaddr + EL3_CMD);
2716 * If we've hit a total OOM refilling the Rx ring we poll once a second
2717 * for some memory. Otherwise there is no way to restart the rx process.
2720 rx_oom_timer(unsigned long arg)
2722 struct net_device *dev = (struct net_device *)arg;
2723 struct vortex_private *vp = netdev_priv(dev);
2725 spin_lock_irq(&vp->lock);
2726 if ((vp->cur_rx - vp->dirty_rx) == RX_RING_SIZE) /* This test is redundant, but makes me feel good */
2728 if (vortex_debug > 1) {
2729 printk(KERN_DEBUG "%s: rx_oom_timer %s\n", dev->name,
2730 ((vp->cur_rx - vp->dirty_rx) != RX_RING_SIZE) ? "succeeded" : "retrying");
2732 spin_unlock_irq(&vp->lock);
2736 vortex_down(struct net_device *dev, int final_down)
2738 struct vortex_private *vp = netdev_priv(dev);
2739 void __iomem *ioaddr = vp->ioaddr;
2741 netif_stop_queue (dev);
2743 del_timer_sync(&vp->rx_oom_timer);
2744 del_timer_sync(&vp->timer);
2746 /* Turn off statistics ASAP. We update vp->stats below. */
2747 iowrite16(StatsDisable, ioaddr + EL3_CMD);
2749 /* Disable the receiver and transmitter. */
2750 iowrite16(RxDisable, ioaddr + EL3_CMD);
2751 iowrite16(TxDisable, ioaddr + EL3_CMD);
2753 /* Disable receiving 802.1q tagged frames */
2754 set_8021q_mode(dev, 0);
2756 if (dev->if_port == XCVR_10base2)
2757 /* Turn off thinnet power. Green! */
2758 iowrite16(StopCoax, ioaddr + EL3_CMD);
2760 iowrite16(SetIntrEnb | 0x0000, ioaddr + EL3_CMD);
2762 update_stats(ioaddr, dev);
2763 if (vp->full_bus_master_rx)
2764 iowrite32(0, ioaddr + UpListPtr);
2765 if (vp->full_bus_master_tx)
2766 iowrite32(0, ioaddr + DownListPtr);
2768 if (final_down && VORTEX_PCI(vp)) {
2769 vp->pm_state_valid = 1;
2770 pci_save_state(VORTEX_PCI(vp));
2776 vortex_close(struct net_device *dev)
2778 struct vortex_private *vp = netdev_priv(dev);
2779 void __iomem *ioaddr = vp->ioaddr;
2782 if (netif_device_present(dev))
2783 vortex_down(dev, 1);
2785 if (vortex_debug > 1) {
2786 printk(KERN_DEBUG"%s: vortex_close() status %4.4x, Tx status %2.2x.\n",
2787 dev->name, ioread16(ioaddr + EL3_STATUS), ioread8(ioaddr + TxStatus));
2788 printk(KERN_DEBUG "%s: vortex close stats: rx_nocopy %d rx_copy %d"
2789 " tx_queued %d Rx pre-checksummed %d.\n",
2790 dev->name, vp->rx_nocopy, vp->rx_copy, vp->queued_packet, vp->rx_csumhits);
2794 if (vp->rx_csumhits &&
2795 (vp->drv_flags & HAS_HWCKSM) == 0 &&
2796 (vp->card_idx >= MAX_UNITS || hw_checksums[vp->card_idx] == -1)) {
2797 printk(KERN_WARNING "%s supports hardware checksums, and we're "
2798 "not using them!\n", dev->name);
2802 free_irq(dev->irq, dev);
2804 if (vp->full_bus_master_rx) { /* Free Boomerang bus master Rx buffers. */
2805 for (i = 0; i < RX_RING_SIZE; i++)
2806 if (vp->rx_skbuff[i]) {
2807 pci_unmap_single( VORTEX_PCI(vp), le32_to_cpu(vp->rx_ring[i].addr),
2808 PKT_BUF_SZ, PCI_DMA_FROMDEVICE);
2809 dev_kfree_skb(vp->rx_skbuff[i]);
2810 vp->rx_skbuff[i] = NULL;
2813 if (vp->full_bus_master_tx) { /* Free Boomerang bus master Tx buffers. */
2814 for (i = 0; i < TX_RING_SIZE; i++) {
2815 if (vp->tx_skbuff[i]) {
2816 struct sk_buff *skb = vp->tx_skbuff[i];
2820 for (k=0; k<=skb_shinfo(skb)->nr_frags; k++)
2821 pci_unmap_single(VORTEX_PCI(vp),
2822 le32_to_cpu(vp->tx_ring[i].frag[k].addr),
2823 le32_to_cpu(vp->tx_ring[i].frag[k].length)&0xFFF,
2826 pci_unmap_single(VORTEX_PCI(vp), le32_to_cpu(vp->tx_ring[i].addr), skb->len, PCI_DMA_TODEVICE);
2829 vp->tx_skbuff[i] = NULL;
2838 dump_tx_ring(struct net_device *dev)
2840 if (vortex_debug > 0) {
2841 struct vortex_private *vp = netdev_priv(dev);
2842 void __iomem *ioaddr = vp->ioaddr;
2844 if (vp->full_bus_master_tx) {
2846 int stalled = ioread32(ioaddr + PktStatus) & 0x04; /* Possible racy. But it's only debug stuff */
2848 printk(KERN_ERR " Flags; bus-master %d, dirty %d(%d) current %d(%d)\n",
2849 vp->full_bus_master_tx,
2850 vp->dirty_tx, vp->dirty_tx % TX_RING_SIZE,
2851 vp->cur_tx, vp->cur_tx % TX_RING_SIZE);
2852 printk(KERN_ERR " Transmit list %8.8x vs. %p.\n",
2853 ioread32(ioaddr + DownListPtr),
2854 &vp->tx_ring[vp->dirty_tx % TX_RING_SIZE]);
2855 issue_and_wait(dev, DownStall);
2856 for (i = 0; i < TX_RING_SIZE; i++) {
2857 printk(KERN_ERR " %d: @%p length %8.8x status %8.8x\n", i,
2860 le32_to_cpu(vp->tx_ring[i].frag[0].length),
2862 le32_to_cpu(vp->tx_ring[i].length),
2864 le32_to_cpu(vp->tx_ring[i].status));
2867 iowrite16(DownUnstall, ioaddr + EL3_CMD);
2872 static struct net_device_stats *vortex_get_stats(struct net_device *dev)
2874 struct vortex_private *vp = netdev_priv(dev);
2875 void __iomem *ioaddr = vp->ioaddr;
2876 unsigned long flags;
2878 if (netif_device_present(dev)) { /* AKPM: Used to be netif_running */
2879 spin_lock_irqsave (&vp->lock, flags);
2880 update_stats(ioaddr, dev);
2881 spin_unlock_irqrestore (&vp->lock, flags);
2886 /* Update statistics.
2887 Unlike with the EL3 we need not worry about interrupts changing
2888 the window setting from underneath us, but we must still guard
2889 against a race condition with a StatsUpdate interrupt updating the
2890 table. This is done by checking that the ASM (!) code generated uses
2891 atomic updates with '+='.
2893 static void update_stats(void __iomem *ioaddr, struct net_device *dev)
2895 struct vortex_private *vp = netdev_priv(dev);
2896 int old_window = ioread16(ioaddr + EL3_CMD);
2898 if (old_window == 0xffff) /* Chip suspended or ejected. */
2900 /* Unlike the 3c5x9 we need not turn off stats updates while reading. */
2901 /* Switch to the stats window, and read everything. */
2903 vp->stats.tx_carrier_errors += ioread8(ioaddr + 0);
2904 vp->stats.tx_heartbeat_errors += ioread8(ioaddr + 1);
2905 vp->stats.tx_window_errors += ioread8(ioaddr + 4);
2906 vp->stats.rx_fifo_errors += ioread8(ioaddr + 5);
2907 vp->stats.tx_packets += ioread8(ioaddr + 6);
2908 vp->stats.tx_packets += (ioread8(ioaddr + 9)&0x30) << 4;
2909 /* Rx packets */ ioread8(ioaddr + 7); /* Must read to clear */
2910 /* Don't bother with register 9, an extension of registers 6&7.
2911 If we do use the 6&7 values the atomic update assumption above
2913 vp->stats.rx_bytes += ioread16(ioaddr + 10);
2914 vp->stats.tx_bytes += ioread16(ioaddr + 12);
2915 /* Extra stats for get_ethtool_stats() */
2916 vp->xstats.tx_multiple_collisions += ioread8(ioaddr + 2);
2917 vp->xstats.tx_single_collisions += ioread8(ioaddr + 3);
2918 vp->xstats.tx_deferred += ioread8(ioaddr + 8);
2920 vp->xstats.rx_bad_ssd += ioread8(ioaddr + 12);
2922 vp->stats.collisions = vp->xstats.tx_multiple_collisions
2923 + vp->xstats.tx_single_collisions
2924 + vp->xstats.tx_max_collisions;
2927 u8 up = ioread8(ioaddr + 13);
2928 vp->stats.rx_bytes += (up & 0x0f) << 16;
2929 vp->stats.tx_bytes += (up & 0xf0) << 12;
2932 EL3WINDOW(old_window >> 13);
2936 static int vortex_nway_reset(struct net_device *dev)
2938 struct vortex_private *vp = netdev_priv(dev);
2939 void __iomem *ioaddr = vp->ioaddr;
2940 unsigned long flags;
2943 spin_lock_irqsave(&vp->lock, flags);
2945 rc = mii_nway_restart(&vp->mii);
2946 spin_unlock_irqrestore(&vp->lock, flags);
2950 static int vortex_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
2952 struct vortex_private *vp = netdev_priv(dev);
2953 void __iomem *ioaddr = vp->ioaddr;
2954 unsigned long flags;
2957 spin_lock_irqsave(&vp->lock, flags);
2959 rc = mii_ethtool_gset(&vp->mii, cmd);
2960 spin_unlock_irqrestore(&vp->lock, flags);
2964 static int vortex_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
2966 struct vortex_private *vp = netdev_priv(dev);
2967 void __iomem *ioaddr = vp->ioaddr;
2968 unsigned long flags;
2971 spin_lock_irqsave(&vp->lock, flags);
2973 rc = mii_ethtool_sset(&vp->mii, cmd);
2974 spin_unlock_irqrestore(&vp->lock, flags);
2978 static u32 vortex_get_msglevel(struct net_device *dev)
2980 return vortex_debug;
2983 static void vortex_set_msglevel(struct net_device *dev, u32 dbg)
2988 static int vortex_get_stats_count(struct net_device *dev)
2990 return VORTEX_NUM_STATS;
2993 static void vortex_get_ethtool_stats(struct net_device *dev,
2994 struct ethtool_stats *stats, u64 *data)
2996 struct vortex_private *vp = netdev_priv(dev);
2997 void __iomem *ioaddr = vp->ioaddr;
2998 unsigned long flags;
3000 spin_lock_irqsave(&vp->lock, flags);
3001 update_stats(ioaddr, dev);
3002 spin_unlock_irqrestore(&vp->lock, flags);
3004 data[0] = vp->xstats.tx_deferred;
3005 data[1] = vp->xstats.tx_max_collisions;
3006 data[2] = vp->xstats.tx_multiple_collisions;
3007 data[3] = vp->xstats.tx_single_collisions;
3008 data[4] = vp->xstats.rx_bad_ssd;
3012 static void vortex_get_strings(struct net_device *dev, u32 stringset, u8 *data)
3014 switch (stringset) {
3016 memcpy(data, ðtool_stats_keys, sizeof(ethtool_stats_keys));
3024 static void vortex_get_drvinfo(struct net_device *dev,
3025 struct ethtool_drvinfo *info)
3027 struct vortex_private *vp = netdev_priv(dev);
3029 strcpy(info->driver, DRV_NAME);
3030 if (VORTEX_PCI(vp)) {
3031 strcpy(info->bus_info, pci_name(VORTEX_PCI(vp)));
3033 if (VORTEX_EISA(vp))
3034 sprintf(info->bus_info, vp->gendev->bus_id);
3036 sprintf(info->bus_info, "EISA 0x%lx %d",
3037 dev->base_addr, dev->irq);
3041 static struct ethtool_ops vortex_ethtool_ops = {
3042 .get_drvinfo = vortex_get_drvinfo,
3043 .get_strings = vortex_get_strings,
3044 .get_msglevel = vortex_get_msglevel,
3045 .set_msglevel = vortex_set_msglevel,
3046 .get_ethtool_stats = vortex_get_ethtool_stats,
3047 .get_stats_count = vortex_get_stats_count,
3048 .get_settings = vortex_get_settings,
3049 .set_settings = vortex_set_settings,
3050 .get_link = ethtool_op_get_link,
3051 .nway_reset = vortex_nway_reset,
3052 .get_perm_addr = ethtool_op_get_perm_addr,
3057 * Must power the device up to do MDIO operations
3059 static int vortex_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
3062 struct vortex_private *vp = netdev_priv(dev);
3063 void __iomem *ioaddr = vp->ioaddr;
3064 unsigned long flags;
3068 state = VORTEX_PCI(vp)->current_state;
3070 /* The kernel core really should have pci_get_power_state() */
3073 pci_set_power_state(VORTEX_PCI(vp), PCI_D0);
3074 spin_lock_irqsave(&vp->lock, flags);
3076 err = generic_mii_ioctl(&vp->mii, if_mii(rq), cmd, NULL);
3077 spin_unlock_irqrestore(&vp->lock, flags);
3079 pci_set_power_state(VORTEX_PCI(vp), state);
3086 /* Pre-Cyclone chips have no documented multicast filter, so the only
3087 multicast setting is to receive all multicast frames. At least
3088 the chip has a very clean way to set the mode, unlike many others. */
3089 static void set_rx_mode(struct net_device *dev)
3091 struct vortex_private *vp = netdev_priv(dev);
3092 void __iomem *ioaddr = vp->ioaddr;
3095 if (dev->flags & IFF_PROMISC) {
3096 if (vortex_debug > 0)
3097 printk(KERN_NOTICE "%s: Setting promiscuous mode.\n", dev->name);
3098 new_mode = SetRxFilter|RxStation|RxMulticast|RxBroadcast|RxProm;
3099 } else if ((dev->mc_list) || (dev->flags & IFF_ALLMULTI)) {
3100 new_mode = SetRxFilter|RxStation|RxMulticast|RxBroadcast;
3102 new_mode = SetRxFilter | RxStation | RxBroadcast;
3104 iowrite16(new_mode, ioaddr + EL3_CMD);
3107 #if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
3108 /* Setup the card so that it can receive frames with an 802.1q VLAN tag.
3109 Note that this must be done after each RxReset due to some backwards
3110 compatibility logic in the Cyclone and Tornado ASICs */
3112 /* The Ethernet Type used for 802.1q tagged frames */
3113 #define VLAN_ETHER_TYPE 0x8100
3115 static void set_8021q_mode(struct net_device *dev, int enable)
3117 struct vortex_private *vp = netdev_priv(dev);
3118 void __iomem *ioaddr = vp->ioaddr;
3119 int old_window = ioread16(ioaddr + EL3_CMD);
3122 if ((vp->drv_flags&IS_CYCLONE) || (vp->drv_flags&IS_TORNADO)) {
3123 /* cyclone and tornado chipsets can recognize 802.1q
3124 * tagged frames and treat them correctly */
3126 int max_pkt_size = dev->mtu+14; /* MTU+Ethernet header */
3128 max_pkt_size += 4; /* 802.1Q VLAN tag */
3131 iowrite16(max_pkt_size, ioaddr+Wn3_MaxPktSize);
3133 /* set VlanEtherType to let the hardware checksumming
3134 treat tagged frames correctly */
3136 iowrite16(VLAN_ETHER_TYPE, ioaddr+Wn7_VlanEtherType);
3138 /* on older cards we have to enable large frames */
3140 vp->large_frames = dev->mtu > 1500 || enable;
3143 mac_ctrl = ioread16(ioaddr+Wn3_MAC_Ctrl);
3144 if (vp->large_frames)
3148 iowrite16(mac_ctrl, ioaddr+Wn3_MAC_Ctrl);
3151 EL3WINDOW(old_window);
3155 static void set_8021q_mode(struct net_device *dev, int enable)
3162 /* MII transceiver control section.
3163 Read and write the MII registers using software-generated serial
3164 MDIO protocol. See the MII specifications or DP83840A data sheet
3167 /* The maximum data clock rate is 2.5 Mhz. The minimum timing is usually
3168 met by back-to-back PCI I/O cycles, but we insert a delay to avoid
3169 "overclocking" issues. */
3170 #define mdio_delay() ioread32(mdio_addr)
3172 #define MDIO_SHIFT_CLK 0x01
3173 #define MDIO_DIR_WRITE 0x04
3174 #define MDIO_DATA_WRITE0 (0x00 | MDIO_DIR_WRITE)
3175 #define MDIO_DATA_WRITE1 (0x02 | MDIO_DIR_WRITE)
3176 #define MDIO_DATA_READ 0x02
3177 #define MDIO_ENB_IN 0x00
3179 /* Generate the preamble required for initial synchronization and
3180 a few older transceivers. */
3181 static void mdio_sync(void __iomem *ioaddr, int bits)
3183 void __iomem *mdio_addr = ioaddr + Wn4_PhysicalMgmt;
3185 /* Establish sync by sending at least 32 logic ones. */
3186 while (-- bits >= 0) {
3187 iowrite16(MDIO_DATA_WRITE1, mdio_addr);
3189 iowrite16(MDIO_DATA_WRITE1 | MDIO_SHIFT_CLK, mdio_addr);
3194 static int mdio_read(struct net_device *dev, int phy_id, int location)
3197 struct vortex_private *vp = netdev_priv(dev);
3198 void __iomem *ioaddr = vp->ioaddr;
3199 int read_cmd = (0xf6 << 10) | (phy_id << 5) | location;
3200 unsigned int retval = 0;
3201 void __iomem *mdio_addr = ioaddr + Wn4_PhysicalMgmt;
3203 if (mii_preamble_required)
3204 mdio_sync(ioaddr, 32);
3206 /* Shift the read command bits out. */
3207 for (i = 14; i >= 0; i--) {
3208 int dataval = (read_cmd&(1<<i)) ? MDIO_DATA_WRITE1 : MDIO_DATA_WRITE0;
3209 iowrite16(dataval, mdio_addr);
3211 iowrite16(dataval | MDIO_SHIFT_CLK, mdio_addr);
3214 /* Read the two transition, 16 data, and wire-idle bits. */
3215 for (i = 19; i > 0; i--) {
3216 iowrite16(MDIO_ENB_IN, mdio_addr);
3218 retval = (retval << 1) | ((ioread16(mdio_addr) & MDIO_DATA_READ) ? 1 : 0);
3219 iowrite16(MDIO_ENB_IN | MDIO_SHIFT_CLK, mdio_addr);
3222 return retval & 0x20000 ? 0xffff : retval>>1 & 0xffff;
3225 static void mdio_write(struct net_device *dev, int phy_id, int location, int value)
3227 struct vortex_private *vp = netdev_priv(dev);
3228 void __iomem *ioaddr = vp->ioaddr;
3229 int write_cmd = 0x50020000 | (phy_id << 23) | (location << 18) | value;
3230 void __iomem *mdio_addr = ioaddr + Wn4_PhysicalMgmt;
3233 if (mii_preamble_required)
3234 mdio_sync(ioaddr, 32);
3236 /* Shift the command bits out. */
3237 for (i = 31; i >= 0; i--) {
3238 int dataval = (write_cmd&(1<<i)) ? MDIO_DATA_WRITE1 : MDIO_DATA_WRITE0;
3239 iowrite16(dataval, mdio_addr);
3241 iowrite16(dataval | MDIO_SHIFT_CLK, mdio_addr);
3244 /* Leave the interface idle. */
3245 for (i = 1; i >= 0; i--) {
3246 iowrite16(MDIO_ENB_IN, mdio_addr);
3248 iowrite16(MDIO_ENB_IN | MDIO_SHIFT_CLK, mdio_addr);
3254 /* ACPI: Advanced Configuration and Power Interface. */
3255 /* Set Wake-On-LAN mode and put the board into D3 (power-down) state. */
3256 static void acpi_set_WOL(struct net_device *dev)
3258 struct vortex_private *vp = netdev_priv(dev);
3259 void __iomem *ioaddr = vp->ioaddr;
3261 if (vp->enable_wol) {
3262 /* Power up on: 1==Downloaded Filter, 2==Magic Packets, 4==Link Status. */
3264 iowrite16(2, ioaddr + 0x0c);
3265 /* The RxFilter must accept the WOL frames. */
3266 iowrite16(SetRxFilter|RxStation|RxMulticast|RxBroadcast, ioaddr + EL3_CMD);
3267 iowrite16(RxEnable, ioaddr + EL3_CMD);
3269 pci_enable_wake(VORTEX_PCI(vp), 0, 1);
3271 /* Change the power state to D3; RxEnable doesn't take effect. */
3272 pci_set_power_state(VORTEX_PCI(vp), PCI_D3hot);
3277 static void __devexit vortex_remove_one(struct pci_dev *pdev)
3279 struct net_device *dev = pci_get_drvdata(pdev);
3280 struct vortex_private *vp;
3283 printk("vortex_remove_one called for Compaq device!\n");
3287 vp = netdev_priv(dev);
3290 pci_iounmap(VORTEX_PCI(vp), vp->cb_fn_base);
3292 unregister_netdev(dev);
3294 if (VORTEX_PCI(vp)) {
3295 pci_set_power_state(VORTEX_PCI(vp), PCI_D0); /* Go active */
3296 if (vp->pm_state_valid)
3297 pci_restore_state(VORTEX_PCI(vp));
3298 pci_disable_device(VORTEX_PCI(vp));
3300 /* Should really use issue_and_wait() here */
3301 iowrite16(TotalReset | ((vp->drv_flags & EEPROM_RESET) ? 0x04 : 0x14),
3302 vp->ioaddr + EL3_CMD);
3304 pci_iounmap(VORTEX_PCI(vp), vp->ioaddr);
3306 pci_free_consistent(pdev,
3307 sizeof(struct boom_rx_desc) * RX_RING_SIZE
3308 + sizeof(struct boom_tx_desc) * TX_RING_SIZE,
3311 if (vp->must_free_region)
3312 release_region(dev->base_addr, vp->io_size);
3317 static struct pci_driver vortex_driver = {
3319 .probe = vortex_init_one,
3320 .remove = __devexit_p(vortex_remove_one),
3321 .id_table = vortex_pci_tbl,
3323 .suspend = vortex_suspend,
3324 .resume = vortex_resume,
3329 static int vortex_have_pci;
3330 static int vortex_have_eisa;
3333 static int __init vortex_init(void)
3335 int pci_rc, eisa_rc;
3337 pci_rc = pci_module_init(&vortex_driver);
3338 eisa_rc = vortex_eisa_init();
3341 vortex_have_pci = 1;
3343 vortex_have_eisa = 1;
3345 return (vortex_have_pci + vortex_have_eisa) ? 0 : -ENODEV;
3349 static void __exit vortex_eisa_cleanup(void)
3351 struct vortex_private *vp;
3352 void __iomem *ioaddr;
3355 /* Take care of the EISA devices */
3356 eisa_driver_unregister(&vortex_eisa_driver);
3359 if (compaq_net_device) {
3360 vp = compaq_net_device->priv;
3361 ioaddr = ioport_map(compaq_net_device->base_addr,
3364 unregister_netdev(compaq_net_device);
3365 iowrite16(TotalReset, ioaddr + EL3_CMD);
3366 release_region(compaq_net_device->base_addr,
3369 free_netdev(compaq_net_device);
3374 static void __exit vortex_cleanup(void)
3376 if (vortex_have_pci)
3377 pci_unregister_driver(&vortex_driver);
3378 if (vortex_have_eisa)
3379 vortex_eisa_cleanup();
3383 module_init(vortex_init);
3384 module_exit(vortex_cleanup);