drivers/mtd/onenand/onenand_base.c

   1 /*
   2  *  linux/drivers/mtd/onenand/onenand_base.c
   3  *
   4  *  Copyright (C) 2005-2007 Samsung Electronics
   5  *  Kyungmin Park <kyungmin.park@samsung.com>
   6  *
   7  *  Credits:
   8  *      Adrian Hunter <ext-adrian.hunter@nokia.com>:
   9  *      auto-placement support, read-while load support, various fixes
  10  *      Copyright (C) Nokia Corporation, 2007
  11  *
  12  * This program is free software; you can redistribute it and/or modify
  13  * it under the terms of the GNU General Public License version 2 as
  14  * published by the Free Software Foundation.
  15  */
  16
  17 #include <linux/kernel.h>
  18 #include <linux/module.h>
  19 #include <linux/init.h>
  20 #include <linux/sched.h>
  21 #include <linux/interrupt.h>
  22 #include <linux/jiffies.h>
  23 #include <linux/mtd/mtd.h>
  24 #include <linux/mtd/onenand.h>
  25 #include <linux/mtd/partitions.h>
  26
  27 #include <asm/io.h>
  28
  29 /**
  30  * onenand_oob_64 - oob info for large (2KB) page
  31  */
  32 static struct nand_ecclayout onenand_oob_64 = {
  33         .eccbytes       = 20,
  34         .eccpos         = {
  35                 8, 9, 10, 11, 12,
  36                 24, 25, 26, 27, 28,
  37                 40, 41, 42, 43, 44,
  38                 56, 57, 58, 59, 60,
  39                 },
  40         .oobfree        = {
  41                 {2, 3}, {14, 2}, {18, 3}, {30, 2},
  42                 {34, 3}, {46, 2}, {50, 3}, {62, 2}
  43         }
  44 };
  45
  46 /**
  47  * onenand_oob_32 - oob info for middle (1KB) page
  48  */
  49 static struct nand_ecclayout onenand_oob_32 = {
  50         .eccbytes       = 10,
  51         .eccpos         = {
  52                 8, 9, 10, 11, 12,
  53                 24, 25, 26, 27, 28,
  54                 },
  55         .oobfree        = { {2, 3}, {14, 2}, {18, 3}, {30, 2} }
  56 };
  57
  58 static const unsigned char ffchars[] = {
  59         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  60         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 16 */
  61         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  62         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 32 */
  63         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  64         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 48 */
  65         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  66         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 64 */
  67 };
  68
  69 /**
  70  * onenand_readw - [OneNAND Interface] Read OneNAND register
  71  * @param addr          address to read
  72  *
  73  * Read OneNAND register
  74  */
  75 static unsigned short onenand_readw(void __iomem *addr)
  76 {
  77         return readw(addr);
  78 }
  79
  80 /**
  81  * onenand_writew - [OneNAND Interface] Write OneNAND register with value
  82  * @param value         value to write
  83  * @param addr          address to write
  84  *
  85  * Write OneNAND register with value
  86  */
  87 static void onenand_writew(unsigned short value, void __iomem *addr)
  88 {
  89         writew(value, addr);
  90 }
  91
  92 /**
  93  * onenand_block_address - [DEFAULT] Get block address
  94  * @param this          onenand chip data structure
  95  * @param block         the block
  96  * @return              translated block address if DDP, otherwise same
  97  *
  98  * Setup Start Address 1 Register (F100h)
  99  */
 100 static int onenand_block_address(struct onenand_chip *this, int block)
 101 {
 102         /* Device Flash Core select, NAND Flash Block Address */
 103         if (block & this->density_mask)
 104                 return ONENAND_DDP_CHIP1 | (block ^ this->density_mask);
 105
 106         return block;
 107 }
 108
 109 /**
 110  * onenand_bufferram_address - [DEFAULT] Get bufferram address
 111  * @param this          onenand chip data structure
 112  * @param block         the block
 113  * @return              set DBS value if DDP, otherwise 0
 114  *
 115  * Setup Start Address 2 Register (F101h) for DDP
 116  */
 117 static int onenand_bufferram_address(struct onenand_chip *this, int block)
 118 {
 119         /* Device BufferRAM Select */
 120         if (block & this->density_mask)
 121                 return ONENAND_DDP_CHIP1;
 122
 123         return ONENAND_DDP_CHIP0;
 124 }
 125
 126 /**
 127  * onenand_page_address - [DEFAULT] Get page address
 128  * @param page          the page address
 129  * @param sector        the sector address
 130  * @return              combined page and sector address
 131  *
 132  * Setup Start Address 8 Register (F107h)
 133  */
 134 static int onenand_page_address(int page, int sector)
 135 {
 136         /* Flash Page Address, Flash Sector Address */
 137         int fpa, fsa;
 138
 139         fpa = page & ONENAND_FPA_MASK;
 140         fsa = sector & ONENAND_FSA_MASK;
 141
 142         return ((fpa << ONENAND_FPA_SHIFT) | fsa);
 143 }
 144
 145 /**
 146  * onenand_buffer_address - [DEFAULT] Get buffer address
 147  * @param dataram1      DataRAM index
 148  * @param sectors       the sector address
 149  * @param count         the number of sectors
 150  * @return              the start buffer value
 151  *
 152  * Setup Start Buffer Register (F200h)
 153  */
 154 static int onenand_buffer_address(int dataram1, int sectors, int count)
 155 {
 156         int bsa, bsc;
 157
 158         /* BufferRAM Sector Address */
 159         bsa = sectors & ONENAND_BSA_MASK;
 160
 161         if (dataram1)
 162                 bsa |= ONENAND_BSA_DATARAM1;    /* DataRAM1 */
 163         else
 164                 bsa |= ONENAND_BSA_DATARAM0;    /* DataRAM0 */
 165
 166         /* BufferRAM Sector Count */
 167         bsc = count & ONENAND_BSC_MASK;
 168
 169         return ((bsa << ONENAND_BSA_SHIFT) | bsc);
 170 }
 171
 172 /**
 173  * onenand_command - [DEFAULT] Send command to OneNAND device
 174  * @param mtd           MTD device structure
 175  * @param cmd           the command to be sent
 176  * @param addr          offset to read from or write to
 177  * @param len           number of bytes to read or write
 178  *
 179  * Send command to OneNAND device. This function is used for middle/large page
 180  * devices (1KB/2KB Bytes per page)
 181  */
 182 static int onenand_command(struct mtd_info *mtd, int cmd, loff_t addr, size_t len)
 183 {
 184         struct onenand_chip *this = mtd->priv;
 185         int value, readcmd = 0, block_cmd = 0;
 186         int block, page;
 187
 188         /* Address translation */
 189         switch (cmd) {
 190         case ONENAND_CMD_UNLOCK:
 191         case ONENAND_CMD_LOCK:
 192         case ONENAND_CMD_LOCK_TIGHT:
 193         case ONENAND_CMD_UNLOCK_ALL:
 194                 block = -1;
 195                 page = -1;
 196                 break;
 197
 198         case ONENAND_CMD_ERASE:
 199         case ONENAND_CMD_BUFFERRAM:
 200         case ONENAND_CMD_OTP_ACCESS:
 201                 block_cmd = 1;
 202                 block = (int) (addr >> this->erase_shift);
 203                 page = -1;
 204                 break;
 205
 206         default:
 207                 block = (int) (addr >> this->erase_shift);
 208                 page = (int) (addr >> this->page_shift);
 209
 210                 if (ONENAND_IS_2PLANE(this)) {
 211                         /* Make the even block number */
 212                         block &= ~1;
 213                         /* Is it the odd plane? */
 214                         if (addr & this->writesize)
 215                                 block++;
 216                         page >>= 1;
 217                 }
 218                 page &= this->page_mask;
 219                 break;
 220         }
 221
 222         /* NOTE: The setting order of the registers is very important! */
 223         if (cmd == ONENAND_CMD_BUFFERRAM) {
 224                 /* Select DataRAM for DDP */
 225                 value = onenand_bufferram_address(this, block);
 226                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
 227
 228                 if (ONENAND_IS_2PLANE(this))
 229                         /* It is always BufferRAM0 */
 230                         ONENAND_SET_BUFFERRAM0(this);
 231                 else
 232                         /* Switch to the next data buffer */
 233                         ONENAND_SET_NEXT_BUFFERRAM(this);
 234
 235                 return 0;
 236         }
 237
 238         if (block != -1) {
 239                 /* Write 'DFS, FBA' of Flash */
 240                 value = onenand_block_address(this, block);
 241                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
 242
 243                 if (block_cmd) {
 244                         /* Select DataRAM for DDP */
 245                         value = onenand_bufferram_address(this, block);
 246                         this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
 247                 }
 248         }
 249
 250         if (page != -1) {
 251                 /* Now we use page size operation */
 252                 int sectors = 4, count = 4;
 253                 int dataram;
 254
 255                 switch (cmd) {
 256                 case ONENAND_CMD_READ:
 257                 case ONENAND_CMD_READOOB:
 258                         dataram = ONENAND_SET_NEXT_BUFFERRAM(this);
 259                         readcmd = 1;
 260                         break;
 261
 262                 default:
 263                         if (ONENAND_IS_2PLANE(this) && cmd == ONENAND_CMD_PROG)
 264                                 cmd = ONENAND_CMD_2X_PROG;
 265                         dataram = ONENAND_CURRENT_BUFFERRAM(this);
 266                         break;
 267                 }
 268
 269                 /* Write 'FPA, FSA' of Flash */
 270                 value = onenand_page_address(page, sectors);
 271                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS8);
 272
 273                 /* Write 'BSA, BSC' of DataRAM */
 274                 value = onenand_buffer_address(dataram, sectors, count);
 275                 this->write_word(value, this->base + ONENAND_REG_START_BUFFER);
 276
 277                 if (readcmd) {
 278                         /* Select DataRAM for DDP */
 279                         value = onenand_bufferram_address(this, block);
 280                         this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
 281                 }
 282         }
 283
 284         /* Interrupt clear */
 285         this->write_word(ONENAND_INT_CLEAR, this->base + ONENAND_REG_INTERRUPT);
 286
 287         /* Write command */
 288         this->write_word(cmd, this->base + ONENAND_REG_COMMAND);
 289
 290         return 0;
 291 }
 292
 293 /**
 294  * onenand_wait - [DEFAULT] wait until the command is done
 295  * @param mtd           MTD device structure
 296  * @param state         state to select the max. timeout value
 297  *
 298  * Wait for command done. This applies to all OneNAND command
 299  * Read can take up to 30us, erase up to 2ms and program up to 350us
 300  * according to general OneNAND specs
 301  */
 302 static int onenand_wait(struct mtd_info *mtd, int state)
 303 {
 304         struct onenand_chip * this = mtd->priv;
 305         unsigned long timeout;
 306         unsigned int flags = ONENAND_INT_MASTER;
 307         unsigned int interrupt = 0;
 308         unsigned int ctrl;
 309
 310         /* The 20 msec is enough */
 311         timeout = jiffies + msecs_to_jiffies(20);
 312         while (time_before(jiffies, timeout)) {
 313                 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
 314
 315                 if (interrupt & flags)
 316                         break;
 317
 318                 if (state != FL_READING)
 319                         cond_resched();
 320         }
 321         /* To get correct interrupt status in timeout case */
 322         interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
 323
 324         ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
 325
 326         if (ctrl & ONENAND_CTRL_ERROR) {
 327                 printk(KERN_ERR "onenand_wait: controller error = 0x%04x\n", ctrl);
 328                 if (ctrl & ONENAND_CTRL_LOCK)
 329                         printk(KERN_ERR "onenand_wait: it's locked error.\n");
 330                 return ctrl;
 331         }
 332
 333         if (interrupt & ONENAND_INT_READ) {
 334                 int ecc = this->read_word(this->base + ONENAND_REG_ECC_STATUS);
 335                 if (ecc) {
 336                         printk(KERN_ERR "onenand_wait: ECC error = 0x%04x\n", ecc);
 337                         if (ecc & ONENAND_ECC_2BIT_ALL) {
 338                                 mtd->ecc_stats.failed++;
 339                                 return ecc;
 340                         } else if (ecc & ONENAND_ECC_1BIT_ALL)
 341                                 mtd->ecc_stats.corrected++;
 342                 }
 343         } else if (state == FL_READING) {
 344                 printk(KERN_ERR "onenand_wait: read timeout! ctrl=0x%04x intr=0x%04x\n", ctrl, interrupt);
 345                 return -EIO;
 346         }
 347
 348         return 0;
 349 }
 350
 351 /*
 352  * onenand_interrupt - [DEFAULT] onenand interrupt handler
 353  * @param irq           onenand interrupt number
 354  * @param dev_id        interrupt data
 355  *
 356  * complete the work
 357  */
 358 static irqreturn_t onenand_interrupt(int irq, void *data)
 359 {
 360         struct onenand_chip *this = (struct onenand_chip *) data;
 361
 362         /* To handle shared interrupt */
 363         if (!this->complete.done)
 364                 complete(&this->complete);
 365
 366         return IRQ_HANDLED;
 367 }
 368
 369 /*
 370  * onenand_interrupt_wait - [DEFAULT] wait until the command is done
 371  * @param mtd           MTD device structure
 372  * @param state         state to select the max. timeout value
 373  *
 374  * Wait for command done.
 375  */
 376 static int onenand_interrupt_wait(struct mtd_info *mtd, int state)
 377 {
 378         struct onenand_chip *this = mtd->priv;
 379
 380         wait_for_completion(&this->complete);
 381
 382         return onenand_wait(mtd, state);
 383 }
 384
 385 /*
 386  * onenand_try_interrupt_wait - [DEFAULT] try interrupt wait
 387  * @param mtd           MTD device structure
 388  * @param state         state to select the max. timeout value
 389  *
 390  * Try interrupt based wait (It is used one-time)
 391  */
 392 static int onenand_try_interrupt_wait(struct mtd_info *mtd, int state)
 393 {
 394         struct onenand_chip *this = mtd->priv;
 395         unsigned long remain, timeout;
 396
 397         /* We use interrupt wait first */
 398         this->wait = onenand_interrupt_wait;
 399
 400         timeout = msecs_to_jiffies(100);
 401         remain = wait_for_completion_timeout(&this->complete, timeout);
 402         if (!remain) {
 403                 printk(KERN_INFO "OneNAND: There's no interrupt. "
 404                                 "We use the normal wait\n");
 405
 406                 /* Release the irq */
 407                 free_irq(this->irq, this);
 408
 409                 this->wait = onenand_wait;
 410         }
 411
 412         return onenand_wait(mtd, state);
 413 }
 414
 415 /*
 416  * onenand_setup_wait - [OneNAND Interface] setup onenand wait method
 417  * @param mtd           MTD device structure
 418  *
 419  * There's two method to wait onenand work
 420  * 1. polling - read interrupt status register
 421  * 2. interrupt - use the kernel interrupt method
 422  */
 423 static void onenand_setup_wait(struct mtd_info *mtd)
 424 {
 425         struct onenand_chip *this = mtd->priv;
 426         int syscfg;
 427
 428         init_completion(&this->complete);
 429
 430         if (this->irq <= 0) {
 431                 this->wait = onenand_wait;
 432                 return;
 433         }
 434
 435         if (request_irq(this->irq, &onenand_interrupt,
 436                                 IRQF_SHARED, "onenand", this)) {
 437                 /* If we can't get irq, use the normal wait */
 438                 this->wait = onenand_wait;
 439                 return;
 440         }
 441
 442         /* Enable interrupt */
 443         syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
 444         syscfg |= ONENAND_SYS_CFG1_IOBE;
 445         this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
 446
 447         this->wait = onenand_try_interrupt_wait;
 448 }
 449
 450 /**
 451  * onenand_bufferram_offset - [DEFAULT] BufferRAM offset
 452  * @param mtd           MTD data structure
 453  * @param area          BufferRAM area
 454  * @return              offset given area
 455  *
 456  * Return BufferRAM offset given area
 457  */
 458 static inline int onenand_bufferram_offset(struct mtd_info *mtd, int area)
 459 {
 460         struct onenand_chip *this = mtd->priv;
 461
 462         if (ONENAND_CURRENT_BUFFERRAM(this)) {
 463                 /* Note: the 'this->writesize' is a real page size */
 464                 if (area == ONENAND_DATARAM)
 465                         return this->writesize;
 466                 if (area == ONENAND_SPARERAM)
 467                         return mtd->oobsize;
 468         }
 469
 470         return 0;
 471 }
 472
 473 /**
 474  * onenand_read_bufferram - [OneNAND Interface] Read the bufferram area
 475  * @param mtd           MTD data structure
 476  * @param area          BufferRAM area
 477  * @param buffer        the databuffer to put/get data
 478  * @param offset        offset to read from or write to
 479  * @param count         number of bytes to read/write
 480  *
 481  * Read the BufferRAM area
 482  */
 483 static int onenand_read_bufferram(struct mtd_info *mtd, int area,
 484                 unsigned char *buffer, int offset, size_t count)
 485 {
 486         struct onenand_chip *this = mtd->priv;
 487         void __iomem *bufferram;
 488
 489         bufferram = this->base + area;
 490
 491         bufferram += onenand_bufferram_offset(mtd, area);
 492
 493         if (ONENAND_CHECK_BYTE_ACCESS(count)) {
 494                 unsigned short word;
 495
 496                 /* Align with word(16-bit) size */
 497                 count--;
 498
 499                 /* Read word and save byte */
 500                 word = this->read_word(bufferram + offset + count);
 501                 buffer[count] = (word & 0xff);
 502         }
 503
 504         memcpy(buffer, bufferram + offset, count);
 505
 506         return 0;
 507 }
 508
 509 /**
 510  * onenand_sync_read_bufferram - [OneNAND Interface] Read the bufferram area with Sync. Burst mode
 511  * @param mtd           MTD data structure
 512  * @param area          BufferRAM area
 513  * @param buffer        the databuffer to put/get data
 514  * @param offset        offset to read from or write to
 515  * @param count         number of bytes to read/write
 516  *
 517  * Read the BufferRAM area with Sync. Burst Mode
 518  */
 519 static int onenand_sync_read_bufferram(struct mtd_info *mtd, int area,
 520                 unsigned char *buffer, int offset, size_t count)
 521 {
 522         struct onenand_chip *this = mtd->priv;
 523         void __iomem *bufferram;
 524
 525         bufferram = this->base + area;
 526
 527         bufferram += onenand_bufferram_offset(mtd, area);
 528
 529         this->mmcontrol(mtd, ONENAND_SYS_CFG1_SYNC_READ);
 530
 531         if (ONENAND_CHECK_BYTE_ACCESS(count)) {
 532                 unsigned short word;
 533
 534                 /* Align with word(16-bit) size */
 535                 count--;
 536
 537                 /* Read word and save byte */
 538                 word = this->read_word(bufferram + offset + count);
 539                 buffer[count] = (word & 0xff);
 540         }
 541
 542         memcpy(buffer, bufferram + offset, count);
 543
 544         this->mmcontrol(mtd, 0);
 545
 546         return 0;
 547 }
 548
 549 /**
 550  * onenand_write_bufferram - [OneNAND Interface] Write the bufferram area
 551  * @param mtd           MTD data structure
 552  * @param area          BufferRAM area
 553  * @param buffer        the databuffer to put/get data
 554  * @param offset        offset to read from or write to
 555  * @param count         number of bytes to read/write
 556  *
 557  * Write the BufferRAM area
 558  */
 559 static int onenand_write_bufferram(struct mtd_info *mtd, int area,
 560                 const unsigned char *buffer, int offset, size_t count)
 561 {
 562         struct onenand_chip *this = mtd->priv;
 563         void __iomem *bufferram;
 564
 565         bufferram = this->base + area;
 566
 567         bufferram += onenand_bufferram_offset(mtd, area);
 568
 569         if (ONENAND_CHECK_BYTE_ACCESS(count)) {
 570                 unsigned short word;
 571                 int byte_offset;
 572
 573                 /* Align with word(16-bit) size */
 574                 count--;
 575
 576                 /* Calculate byte access offset */
 577                 byte_offset = offset + count;
 578
 579                 /* Read word and save byte */
 580                 word = this->read_word(bufferram + byte_offset);
 581                 word = (word & ~0xff) | buffer[count];
 582                 this->write_word(word, bufferram + byte_offset);
 583         }
 584
 585         memcpy(bufferram + offset, buffer, count);
 586
 587         return 0;
 588 }
 589
 590 /**
 591  * onenand_get_2x_blockpage - [GENERIC] Get blockpage at 2x program mode
 592  * @param mtd           MTD data structure
 593  * @param addr          address to check
 594  * @return              blockpage address
 595  *
 596  * Get blockpage address at 2x program mode
 597  */
 598 static int onenand_get_2x_blockpage(struct mtd_info *mtd, loff_t addr)
 599 {
 600         struct onenand_chip *this = mtd->priv;
 601         int blockpage, block, page;
 602
 603         /* Calculate the even block number */
 604         block = (int) (addr >> this->erase_shift) & ~1;
 605         /* Is it the odd plane? */
 606         if (addr & this->writesize)
 607                 block++;
 608         page = (int) (addr >> (this->page_shift + 1)) & this->page_mask;
 609         blockpage = (block << 7) | page;
 610
 611         return blockpage;
 612 }
 613
 614 /**
 615  * onenand_check_bufferram - [GENERIC] Check BufferRAM information
 616  * @param mtd           MTD data structure
 617  * @param addr          address to check
 618  * @return              1 if there are valid data, otherwise 0
 619  *
 620  * Check bufferram if there is data we required
 621  */
 622 static int onenand_check_bufferram(struct mtd_info *mtd, loff_t addr)
 623 {
 624         struct onenand_chip *this = mtd->priv;
 625         int blockpage, found = 0;
 626         unsigned int i;
 627
 628         if (ONENAND_IS_2PLANE(this))
 629                 blockpage = onenand_get_2x_blockpage(mtd, addr);
 630         else
 631                 blockpage = (int) (addr >> this->page_shift);
 632
 633         /* Is there valid data? */
 634         i = ONENAND_CURRENT_BUFFERRAM(this);
 635         if (this->bufferram[i].blockpage == blockpage)
 636                 found = 1;
 637         else {
 638                 /* Check another BufferRAM */
 639                 i = ONENAND_NEXT_BUFFERRAM(this);
 640                 if (this->bufferram[i].blockpage == blockpage) {
 641                         ONENAND_SET_NEXT_BUFFERRAM(this);
 642                         found = 1;
 643                 }
 644         }
 645
 646         if (found && ONENAND_IS_DDP(this)) {
 647                 /* Select DataRAM for DDP */
 648                 int block = (int) (addr >> this->erase_shift);
 649                 int value = onenand_bufferram_address(this, block);
 650                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
 651         }
 652
 653         return found;
 654 }
 655
 656 /**
 657  * onenand_update_bufferram - [GENERIC] Update BufferRAM information
 658  * @param mtd           MTD data structure
 659  * @param addr          address to update
 660  * @param valid         valid flag
 661  *
 662  * Update BufferRAM information
 663  */
 664 static void onenand_update_bufferram(struct mtd_info *mtd, loff_t addr,
 665                 int valid)
 666 {
 667         struct onenand_chip *this = mtd->priv;
 668         int blockpage;
 669         unsigned int i;
 670
 671         if (ONENAND_IS_2PLANE(this))
 672                 blockpage = onenand_get_2x_blockpage(mtd, addr);
 673         else
 674                 blockpage = (int) (addr >> this->page_shift);
 675
 676         /* Invalidate another BufferRAM */
 677         i = ONENAND_NEXT_BUFFERRAM(this);
 678         if (this->bufferram[i].blockpage == blockpage)
 679                 this->bufferram[i].blockpage = -1;
 680
 681         /* Update BufferRAM */
 682         i = ONENAND_CURRENT_BUFFERRAM(this);
 683         if (valid)
 684                 this->bufferram[i].blockpage = blockpage;
 685         else
 686                 this->bufferram[i].blockpage = -1;
 687 }
 688
 689 /**
 690  * onenand_invalidate_bufferram - [GENERIC] Invalidate BufferRAM information
 691  * @param mtd           MTD data structure
 692  * @param addr          start address to invalidate
 693  * @param len           length to invalidate
 694  *
 695  * Invalidate BufferRAM information
 696  */
 697 static void onenand_invalidate_bufferram(struct mtd_info *mtd, loff_t addr,
 698                 unsigned int len)
 699 {
 700         struct onenand_chip *this = mtd->priv;
 701         int i;
 702         loff_t end_addr = addr + len;
 703
 704         /* Invalidate BufferRAM */
 705         for (i = 0; i < MAX_BUFFERRAM; i++) {
 706                 loff_t buf_addr = this->bufferram[i].blockpage << this->page_shift;
 707                 if (buf_addr >= addr && buf_addr < end_addr)
 708                         this->bufferram[i].blockpage = -1;
 709         }
 710 }
 711
 712 /**
 713  * onenand_get_device - [GENERIC] Get chip for selected access
 714  * @param mtd           MTD device structure
 715  * @param new_state     the state which is requested
 716  *
 717  * Get the device and lock it for exclusive access
 718  */
 719 static int onenand_get_device(struct mtd_info *mtd, int new_state)
 720 {
 721         struct onenand_chip *this = mtd->priv;
 722         DECLARE_WAITQUEUE(wait, current);
 723
 724         /*
 725          * Grab the lock and see if the device is available
 726          */
 727         while (1) {
 728                 spin_lock(&this->chip_lock);
 729                 if (this->state == FL_READY) {
 730                         this->state = new_state;
 731                         spin_unlock(&this->chip_lock);
 732                         break;
 733                 }
 734                 if (new_state == FL_PM_SUSPENDED) {
 735                         spin_unlock(&this->chip_lock);
 736                         return (this->state == FL_PM_SUSPENDED) ? 0 : -EAGAIN;
 737                 }
 738                 set_current_state(TASK_UNINTERRUPTIBLE);
 739                 add_wait_queue(&this->wq, &wait);
 740                 spin_unlock(&this->chip_lock);
 741                 schedule();
 742                 remove_wait_queue(&this->wq, &wait);
 743         }
 744
 745         return 0;
 746 }
 747
 748 /**
 749  * onenand_release_device - [GENERIC] release chip
 750  * @param mtd           MTD device structure
 751  *
 752  * Deselect, release chip lock and wake up anyone waiting on the device
 753  */
 754 static void onenand_release_device(struct mtd_info *mtd)
 755 {
 756         struct onenand_chip *this = mtd->priv;
 757
 758         /* Release the chip */
 759         spin_lock(&this->chip_lock);
 760         this->state = FL_READY;
 761         wake_up(&this->wq);
 762         spin_unlock(&this->chip_lock);
 763 }
 764
 765 /**
 766  * onenand_read - [MTD Interface] Read data from flash
 767  * @param mtd           MTD device structure
 768  * @param from          offset to read from
 769  * @param len           number of bytes to read
 770  * @param retlen        pointer to variable to store the number of read bytes
 771  * @param buf           the databuffer to put data
 772  *
 773  * Read with ecc
 774 */
 775 static int onenand_read(struct mtd_info *mtd, loff_t from, size_t len,
 776         size_t *retlen, u_char *buf)
 777 {
 778         struct onenand_chip *this = mtd->priv;
 779         struct mtd_ecc_stats stats;
 780         int read = 0, column;
 781         int thislen;
 782         int ret = 0, boundary = 0;
 783         int writesize = this->writesize;
 784
 785         DEBUG(MTD_DEBUG_LEVEL3, "onenand_read: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
 786
 787         /* Do not allow reads past end of device */
 788         if ((from + len) > mtd->size) {
 789                 printk(KERN_ERR "onenand_read: Attempt read beyond end of device\n");
 790                 *retlen = 0;
 791                 return -EINVAL;
 792         }
 793
 794         /* Grab the lock and see if the device is available */
 795         onenand_get_device(mtd, FL_READING);
 796
 797         stats = mtd->ecc_stats;
 798
 799         /* Read-while-load method */
 800
 801         /* Do first load to bufferRAM */
 802         if (read < len) {
 803                 if (!onenand_check_bufferram(mtd, from)) {
 804                         this->command(mtd, ONENAND_CMD_READ, from, writesize);
 805                         ret = this->wait(mtd, FL_READING);
 806                         onenand_update_bufferram(mtd, from, !ret);
 807                 }
 808         }
 809
 810         thislen = min_t(int, writesize, len - read);
 811         column = from & (writesize - 1);
 812         if (column + thislen > writesize)
 813                 thislen = writesize - column;
 814
 815         while (!ret) {
 816                 /* If there is more to load then start next load */
 817                 from += thislen;
 818                 if (read + thislen < len) {
 819                         this->command(mtd, ONENAND_CMD_READ, from, writesize);
 820                         /*
 821                          * Chip boundary handling in DDP
 822                          * Now we issued chip 1 read and pointed chip 1
 823                          * bufferam so we have to point chip 0 bufferam.
 824                          */
 825                         if (ONENAND_IS_DDP(this) &&
 826                             unlikely(from == (this->chipsize >> 1))) {
 827                                 this->write_word(ONENAND_DDP_CHIP0, this->base + ONENAND_REG_START_ADDRESS2);
 828                                 boundary = 1;
 829                         } else
 830                                 boundary = 0;
 831                         ONENAND_SET_PREV_BUFFERRAM(this);
 832                 }
 833                 /* While load is going, read from last bufferRAM */
 834                 this->read_bufferram(mtd, ONENAND_DATARAM, buf, column, thislen);
 835                 /* See if we are done */
 836                 read += thislen;
 837                 if (read == len)
 838                         break;
 839                 /* Set up for next read from bufferRAM */
 840                 if (unlikely(boundary))
 841                         this->write_word(ONENAND_DDP_CHIP1, this->base + ONENAND_REG_START_ADDRESS2);
 842                 ONENAND_SET_NEXT_BUFFERRAM(this);
 843                 buf += thislen;
 844                 thislen = min_t(int, writesize, len - read);
 845                 column = 0;
 846                 cond_resched();
 847                 /* Now wait for load */
 848                 ret = this->wait(mtd, FL_READING);
 849                 onenand_update_bufferram(mtd, from, !ret);
 850         }
 851
 852         /* Deselect and wake up anyone waiting on the device */
 853         onenand_release_device(mtd);
 854
 855         /*
 856          * Return success, if no ECC failures, else -EBADMSG
 857          * fs driver will take care of that, because
 858          * retlen == desired len and result == -EBADMSG
 859          */
 860         *retlen = read;
 861
 862         if (mtd->ecc_stats.failed - stats.failed)
 863                 return -EBADMSG;
 864
 865         if (ret)
 866                 return ret;
 867
 868         return mtd->ecc_stats.corrected - stats.corrected ? -EUCLEAN : 0;
 869 }
 870
 871 /**
 872  * onenand_transfer_auto_oob - [Internal] oob auto-placement transfer
 873  * @param mtd           MTD device structure
 874  * @param buf           destination address
 875  * @param column        oob offset to read from
 876  * @param thislen       oob length to read
 877  */
 878 static int onenand_transfer_auto_oob(struct mtd_info *mtd, uint8_t *buf, int column,
 879                                 int thislen)
 880 {
 881         struct onenand_chip *this = mtd->priv;
 882         struct nand_oobfree *free;
 883         int readcol = column;
 884         int readend = column + thislen;
 885         int lastgap = 0;
 886         unsigned int i;
 887         uint8_t *oob_buf = this->oob_buf;
 888
 889         free = this->ecclayout->oobfree;
 890         for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) {
 891                 if (readcol >= lastgap)
 892                         readcol += free->offset - lastgap;
 893                 if (readend >= lastgap)
 894                         readend += free->offset - lastgap;
 895                 lastgap = free->offset + free->length;
 896         }
 897         this->read_bufferram(mtd, ONENAND_SPARERAM, oob_buf, 0, mtd->oobsize);
 898         free = this->ecclayout->oobfree;
 899         for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) {
 900                 int free_end = free->offset + free->length;
 901                 if (free->offset < readend && free_end > readcol) {
 902                         int st = max_t(int,free->offset,readcol);
 903                         int ed = min_t(int,free_end,readend);
 904                         int n = ed - st;
 905                         memcpy(buf, oob_buf + st, n);
 906                         buf += n;
 907                 } else if (column == 0)
 908                         break;
 909         }
 910         return 0;
 911 }
 912
 913 /**
 914  * onenand_do_read_oob - [MTD Interface] OneNAND read out-of-band
 915  * @param mtd           MTD device structure
 916  * @param from          offset to read from
 917  * @param len           number of bytes to read
 918  * @param retlen        pointer to variable to store the number of read bytes
 919  * @param buf           the databuffer to put data
 920  * @param mode          operation mode
 921  *
 922  * OneNAND read out-of-band data from the spare area
 923  */
 924 static int onenand_do_read_oob(struct mtd_info *mtd, loff_t from,
 925                         struct mtd_oob_ops *ops)
 926 {
 927         struct onenand_chip *this = mtd->priv;
 928         int read = 0, thislen, column, oobsize;
 929         size_t len = ops->ooblen;
 930         mtd_oob_mode_t mode = ops->mode;
 931         u_char *buf = ops->oobbuf;
 932         int ret = 0;
 933
 934         from += ops->ooboffs;
 935
 936         DEBUG(MTD_DEBUG_LEVEL3, "onenand_read_oob: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
 937
 938         /* Initialize return length value */
 939         ops->oobretlen = 0;
 940
 941         if (mode == MTD_OOB_AUTO)
 942                 oobsize = this->ecclayout->oobavail;
 943         else
 944                 oobsize = mtd->oobsize;
 945
 946         column = from & (mtd->oobsize - 1);
 947
 948         if (unlikely(column >= oobsize)) {
 949                 printk(KERN_ERR "onenand_read_oob: Attempted to start read outside oob\n");
 950                 return -EINVAL;
 951         }
 952
 953         /* Do not allow reads past end of device */
 954         if (unlikely(from >= mtd->size ||
 955                      column + len > ((mtd->size >> this->page_shift) -
 956                                      (from >> this->page_shift)) * oobsize)) {
 957                 printk(KERN_ERR "onenand_read_oob: Attempted to read beyond end of device\n");
 958                 return -EINVAL;
 959         }
 960
 961         /* Grab the lock and see if the device is available */
 962         onenand_get_device(mtd, FL_READING);
 963
 964         while (read < len) {
 965                 cond_resched();
 966
 967                 thislen = oobsize - column;
 968                 thislen = min_t(int, thislen, len);
 969
 970                 this->command(mtd, ONENAND_CMD_READOOB, from, mtd->oobsize);
 971
 972                 onenand_update_bufferram(mtd, from, 0);
 973
 974                 ret = this->wait(mtd, FL_READING);
 975                 /* First copy data and check return value for ECC handling */
 976
 977                 if (mode == MTD_OOB_AUTO)
 978                         onenand_transfer_auto_oob(mtd, buf, column, thislen);
 979                 else
 980                         this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen);
 981
 982                 if (ret) {
 983                         printk(KERN_ERR "onenand_read_oob: read failed = 0x%x\n", ret);
 984                         break;
 985                 }
 986
 987                 read += thislen;
 988
 989                 if (read == len)
 990                         break;
 991
 992                 buf += thislen;
 993
 994                 /* Read more? */
 995                 if (read < len) {
 996                         /* Page size */
 997                         from += mtd->writesize;
 998                         column = 0;
 999                 }
1000         }
1001
1002         /* Deselect and wake up anyone waiting on the device */
1003         onenand_release_device(mtd);
1004
1005         ops->oobretlen = read;
1006         return ret;
1007 }
1008
1009 /**
1010  * onenand_read_oob - [MTD Interface] NAND write data and/or out-of-band
1011  * @param mtd:          MTD device structure
1012  * @param from:         offset to read from
1013  * @param ops:          oob operation description structure
1014  */
1015 static int onenand_read_oob(struct mtd_info *mtd, loff_t from,
1016                             struct mtd_oob_ops *ops)
1017 {
1018         switch (ops->mode) {
1019         case MTD_OOB_PLACE:
1020         case MTD_OOB_AUTO:
1021                 break;
1022         case MTD_OOB_RAW:
1023                 /* Not implemented yet */
1024         default:
1025                 return -EINVAL;
1026         }
1027         return onenand_do_read_oob(mtd, from, ops);
1028 }
1029
1030 /**
1031  * onenand_bbt_wait - [DEFAULT] wait until the command is done
1032  * @param mtd           MTD device structure
1033  * @param state         state to select the max. timeout value
1034  *
1035  * Wait for command done.
1036  */
1037 static int onenand_bbt_wait(struct mtd_info *mtd, int state)
1038 {
1039         struct onenand_chip *this = mtd->priv;
1040         unsigned long timeout;
1041         unsigned int interrupt;
1042         unsigned int ctrl;
1043
1044         /* The 20 msec is enough */
1045         timeout = jiffies + msecs_to_jiffies(20);
1046         while (time_before(jiffies, timeout)) {
1047                 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
1048                 if (interrupt & ONENAND_INT_MASTER)
1049                         break;
1050         }
1051         /* To get correct interrupt status in timeout case */
1052         interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
1053         ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
1054
1055         if (ctrl & ONENAND_CTRL_ERROR) {
1056                 printk(KERN_DEBUG "onenand_bbt_wait: controller error = 0x%04x\n", ctrl);
1057                 /* Initial bad block case */
1058                 if (ctrl & ONENAND_CTRL_LOAD)
1059                         return ONENAND_BBT_READ_ERROR;
1060                 return ONENAND_BBT_READ_FATAL_ERROR;
1061         }
1062
1063         if (interrupt & ONENAND_INT_READ) {
1064                 int ecc = this->read_word(this->base + ONENAND_REG_ECC_STATUS);
1065                 if (ecc & ONENAND_ECC_2BIT_ALL)
1066                         return ONENAND_BBT_READ_ERROR;
1067         } else {
1068                 printk(KERN_ERR "onenand_bbt_wait: read timeout!"
1069                         "ctrl=0x%04x intr=0x%04x\n", ctrl, interrupt);
1070                 return ONENAND_BBT_READ_FATAL_ERROR;
1071         }
1072
1073         return 0;
1074 }
1075
1076 /**
1077  * onenand_bbt_read_oob - [MTD Interface] OneNAND read out-of-band for bbt scan
1078  * @param mtd           MTD device structure
1079  * @param from          offset to read from
1080  * @param ops           oob operation description structure
1081  *
1082  * OneNAND read out-of-band data from the spare area for bbt scan
1083  */
1084 int onenand_bbt_read_oob(struct mtd_info *mtd, loff_t from,
1085                             struct mtd_oob_ops *ops)
1086 {
1087         struct onenand_chip *this = mtd->priv;
1088         int read = 0, thislen, column;
1089         int ret = 0;
1090         size_t len = ops->ooblen;
1091         u_char *buf = ops->oobbuf;
1092
1093         DEBUG(MTD_DEBUG_LEVEL3, "onenand_bbt_read_oob: from = 0x%08x, len = %zi\n", (unsigned int) from, len);
1094
1095         /* Initialize return value */
1096         ops->oobretlen = 0;
1097
1098         /* Do not allow reads past end of device */
1099         if (unlikely((from + len) > mtd->size)) {
1100                 printk(KERN_ERR "onenand_bbt_read_oob: Attempt read beyond end of device\n");
1101                 return ONENAND_BBT_READ_FATAL_ERROR;
1102         }
1103
1104         /* Grab the lock and see if the device is available */
1105         onenand_get_device(mtd, FL_READING);
1106
1107         column = from & (mtd->oobsize - 1);
1108
1109         while (read < len) {
1110                 cond_resched();
1111
1112                 thislen = mtd->oobsize - column;
1113                 thislen = min_t(int, thislen, len);
1114
1115                 this->command(mtd, ONENAND_CMD_READOOB, from, mtd->oobsize);
1116
1117                 onenand_update_bufferram(mtd, from, 0);
1118
1119                 ret = onenand_bbt_wait(mtd, FL_READING);
1120                 if (ret)
1121                         break;
1122
1123                 this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen);
1124                 read += thislen;
1125                 if (read == len)
1126                         break;
1127
1128                 buf += thislen;
1129
1130                 /* Read more? */
1131                 if (read < len) {
1132                         /* Update Page size */
1133                         from += this->writesize;
1134                         column = 0;
1135                 }
1136         }
1137
1138         /* Deselect and wake up anyone waiting on the device */
1139         onenand_release_device(mtd);
1140
1141         ops->oobretlen = read;
1142         return ret;
1143 }
1144
1145 #ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE
1146 /**
1147  * onenand_verify_oob - [GENERIC] verify the oob contents after a write
1148  * @param mtd           MTD device structure
1149  * @param buf           the databuffer to verify
1150  * @param to            offset to read from
1151  *
1152  */
1153 static int onenand_verify_oob(struct mtd_info *mtd, const u_char *buf, loff_t to)
1154 {
1155         struct onenand_chip *this = mtd->priv;
1156         char oobbuf[64];
1157         int status, i;
1158
1159         this->command(mtd, ONENAND_CMD_READOOB, to, mtd->oobsize);
1160         onenand_update_bufferram(mtd, to, 0);
1161         status = this->wait(mtd, FL_READING);
1162         if (status)
1163                 return status;
1164
1165         this->read_bufferram(mtd, ONENAND_SPARERAM, oobbuf, 0, mtd->oobsize);
1166         for (i = 0; i < mtd->oobsize; i++)
1167                 if (buf[i] != 0xFF && buf[i] != oobbuf[i])
1168                         return -EBADMSG;
1169
1170         return 0;
1171 }
1172
1173 /**
1174  * onenand_verify - [GENERIC] verify the chip contents after a write
1175  * @param mtd          MTD device structure
1176  * @param buf          the databuffer to verify
1177  * @param addr         offset to read from
1178  * @param len          number of bytes to read and compare
1179  *
1180  */
1181 static int onenand_verify(struct mtd_info *mtd, const u_char *buf, loff_t addr, size_t len)
1182 {
1183         struct onenand_chip *this = mtd->priv;
1184         void __iomem *dataram;
1185         int ret = 0;
1186         int thislen, column;
1187
1188         while (len != 0) {
1189                 thislen = min_t(int, this->writesize, len);
1190                 column = addr & (this->writesize - 1);
1191                 if (column + thislen > this->writesize)
1192                         thislen = this->writesize - column;
1193
1194                 this->command(mtd, ONENAND_CMD_READ, addr, this->writesize);
1195
1196                 onenand_update_bufferram(mtd, addr, 0);
1197
1198                 ret = this->wait(mtd, FL_READING);
1199                 if (ret)
1200                         return ret;
1201
1202                 onenand_update_bufferram(mtd, addr, 1);
1203
1204                 dataram = this->base + ONENAND_DATARAM;
1205                 dataram += onenand_bufferram_offset(mtd, ONENAND_DATARAM);
1206
1207                 if (memcmp(buf, dataram + column, thislen))
1208                         return -EBADMSG;
1209
1210                 len -= thislen;
1211                 buf += thislen;
1212                 addr += thislen;
1213         }
1214
1215         return 0;
1216 }
1217 #else
1218 #define onenand_verify(...)             (0)
1219 #define onenand_verify_oob(...)         (0)
1220 #endif
1221
1222 #define NOTALIGNED(x)   ((x & (this->subpagesize - 1)) != 0)
1223
1224 /**
1225  * onenand_write - [MTD Interface] write buffer to FLASH
1226  * @param mtd           MTD device structure
1227  * @param to            offset to write to
1228  * @param len           number of bytes to write
1229  * @param retlen        pointer to variable to store the number of written bytes
1230  * @param buf           the data to write
1231  *
1232  * Write with ECC
1233  */
1234 static int onenand_write(struct mtd_info *mtd, loff_t to, size_t len,
1235         size_t *retlen, const u_char *buf)
1236 {
1237         struct onenand_chip *this = mtd->priv;
1238         int written = 0;
1239         int ret = 0;
1240         int column, subpage;
1241
1242         DEBUG(MTD_DEBUG_LEVEL3, "onenand_write: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
1243
1244         /* Initialize retlen, in case of early exit */
1245         *retlen = 0;
1246
1247         /* Do not allow writes past end of device */
1248         if (unlikely((to + len) > mtd->size)) {
1249                 printk(KERN_ERR "onenand_write: Attempt write to past end of device\n");
1250                 return -EINVAL;
1251         }
1252
1253         /* Reject writes, which are not page aligned */
1254         if (unlikely(NOTALIGNED(to)) || unlikely(NOTALIGNED(len))) {
1255                 printk(KERN_ERR "onenand_write: Attempt to write not page aligned data\n");
1256                 return -EINVAL;
1257         }
1258
1259         column = to & (mtd->writesize - 1);
1260
1261         /* Grab the lock and see if the device is available */
1262         onenand_get_device(mtd, FL_WRITING);
1263
1264         /* Loop until all data write */
1265         while (written < len) {
1266                 int thislen = min_t(int, mtd->writesize - column, len - written);
1267                 u_char *wbuf = (u_char *) buf;
1268
1269                 cond_resched();
1270
1271                 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, thislen);
1272
1273                 /* Partial page write */
1274                 subpage = thislen < mtd->writesize;
1275                 if (subpage) {
1276                         memset(this->page_buf, 0xff, mtd->writesize);
1277                         memcpy(this->page_buf + column, buf, thislen);
1278                         wbuf = this->page_buf;
1279                 }
1280
1281                 this->write_bufferram(mtd, ONENAND_DATARAM, wbuf, 0, mtd->writesize);
1282                 this->write_bufferram(mtd, ONENAND_SPARERAM, ffchars, 0, mtd->oobsize);
1283
1284                 this->command(mtd, ONENAND_CMD_PROG, to, mtd->writesize);
1285
1286                 ret = this->wait(mtd, FL_WRITING);
1287
1288                 /* In partial page write we don't update bufferram */
1289                 onenand_update_bufferram(mtd, to, !ret && !subpage);
1290                 if (ONENAND_IS_2PLANE(this)) {
1291                         ONENAND_SET_BUFFERRAM1(this);
1292                         onenand_update_bufferram(mtd, to + this->writesize, !ret && !subpage);
1293                 }
1294
1295                 if (ret) {
1296                         printk(KERN_ERR "onenand_write: write filaed %d\n", ret);
1297                         break;
1298                 }
1299
1300                 /* Only check verify write turn on */
1301                 ret = onenand_verify(mtd, (u_char *) wbuf, to, thislen);
1302                 if (ret) {
1303                         printk(KERN_ERR "onenand_write: verify failed %d\n", ret);
1304                         break;
1305                 }
1306
1307                 written += thislen;
1308
1309                 if (written == len)
1310                         break;
1311
1312                 column = 0;
1313                 to += thislen;
1314                 buf += thislen;
1315         }
1316
1317         /* Deselect and wake up anyone waiting on the device */
1318         onenand_release_device(mtd);
1319
1320         *retlen = written;
1321
1322         return ret;
1323 }
1324
1325 /**
1326  * onenand_fill_auto_oob - [Internal] oob auto-placement transfer
1327  * @param mtd           MTD device structure
1328  * @param oob_buf       oob buffer
1329  * @param buf           source address
1330  * @param column        oob offset to write to
1331  * @param thislen       oob length to write
1332  */
1333 static int onenand_fill_auto_oob(struct mtd_info *mtd, u_char *oob_buf,
1334                                   const u_char *buf, int column, int thislen)
1335 {
1336         struct onenand_chip *this = mtd->priv;
1337         struct nand_oobfree *free;
1338         int writecol = column;
1339         int writeend = column + thislen;
1340         int lastgap = 0;
1341         unsigned int i;
1342
1343         free = this->ecclayout->oobfree;
1344         for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) {
1345                 if (writecol >= lastgap)
1346                         writecol += free->offset - lastgap;
1347                 if (writeend >= lastgap)
1348                         writeend += free->offset - lastgap;
1349                 lastgap = free->offset + free->length;
1350         }
1351         free = this->ecclayout->oobfree;
1352         for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) {
1353                 int free_end = free->offset + free->length;
1354                 if (free->offset < writeend && free_end > writecol) {
1355                         int st = max_t(int,free->offset,writecol);
1356                         int ed = min_t(int,free_end,writeend);
1357                         int n = ed - st;
1358                         memcpy(oob_buf + st, buf, n);
1359                         buf += n;
1360                 } else if (column == 0)
1361                         break;
1362         }
1363         return 0;
1364 }
1365
1366 /**
1367  * onenand_do_write_oob - [Internal] OneNAND write out-of-band
1368  * @param mtd           MTD device structure
1369  * @param to            offset to write to
1370  * @param len           number of bytes to write
1371  * @param retlen        pointer to variable to store the number of written bytes
1372  * @param buf           the data to write
1373  * @param mode          operation mode
1374  *
1375  * OneNAND write out-of-band
1376  */
1377 static int onenand_do_write_oob(struct mtd_info *mtd, loff_t to,
1378                                 struct mtd_oob_ops *ops)
1379 {
1380         struct onenand_chip *this = mtd->priv;
1381         int column, ret = 0, oobsize;
1382         int written = 0;
1383         u_char *oobbuf;
1384         size_t len = ops->ooblen;
1385         const u_char *buf = ops->oobbuf;
1386         mtd_oob_mode_t mode = ops->mode;
1387
1388         to += ops->ooboffs;
1389
1390         DEBUG(MTD_DEBUG_LEVEL3, "onenand_write_oob: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
1391
1392         /* Initialize retlen, in case of early exit */
1393         ops->oobretlen = 0;
1394
1395         if (mode == MTD_OOB_AUTO)
1396                 oobsize = this->ecclayout->oobavail;
1397         else
1398                 oobsize = mtd->oobsize;
1399
1400         column = to & (mtd->oobsize - 1);
1401
1402         if (unlikely(column >= oobsize)) {
1403                 printk(KERN_ERR "onenand_write_oob: Attempted to start write outside oob\n");
1404                 return -EINVAL;
1405         }
1406
1407         /* For compatibility with NAND: Do not allow write past end of page */
1408         if (unlikely(column + len > oobsize)) {
1409                 printk(KERN_ERR "onenand_write_oob: "
1410                       "Attempt to write past end of page\n");
1411                 return -EINVAL;
1412         }
1413
1414         /* Do not allow reads past end of device */
1415         if (unlikely(to >= mtd->size ||
1416                      column + len > ((mtd->size >> this->page_shift) -
1417                                      (to >> this->page_shift)) * oobsize)) {
1418                 printk(KERN_ERR "onenand_write_oob: Attempted to write past end of device\n");
1419                 return -EINVAL;
1420         }
1421
1422         /* Grab the lock and see if the device is available */
1423         onenand_get_device(mtd, FL_WRITING);
1424
1425         oobbuf = this->oob_buf;
1426
1427         /* Loop until all data write */
1428         while (written < len) {
1429                 int thislen = min_t(int, oobsize, len - written);
1430
1431                 cond_resched();
1432
1433                 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->oobsize);
1434
1435                 /* We send data to spare ram with oobsize
1436                  * to prevent byte access */
1437                 memset(oobbuf, 0xff, mtd->oobsize);
1438                 if (mode == MTD_OOB_AUTO)
1439                         onenand_fill_auto_oob(mtd, oobbuf, buf, column, thislen);
1440                 else
1441                         memcpy(oobbuf + column, buf, thislen);
1442                 this->write_bufferram(mtd, ONENAND_SPARERAM, oobbuf, 0, mtd->oobsize);
1443
1444                 this->command(mtd, ONENAND_CMD_PROGOOB, to, mtd->oobsize);
1445
1446                 onenand_update_bufferram(mtd, to, 0);
1447                 if (ONENAND_IS_2PLANE(this)) {
1448                         ONENAND_SET_BUFFERRAM1(this);
1449                         onenand_update_bufferram(mtd, to + this->writesize, 0);
1450                 }
1451
1452                 ret = this->wait(mtd, FL_WRITING);
1453                 if (ret) {
1454                         printk(KERN_ERR "onenand_write_oob: write failed %d\n", ret);
1455                         break;
1456                 }
1457
1458                 ret = onenand_verify_oob(mtd, oobbuf, to);
1459                 if (ret) {
1460                         printk(KERN_ERR "onenand_write_oob: verify failed %d\n", ret);
1461                         break;
1462                 }
1463
1464                 written += thislen;
1465                 if (written == len)
1466                         break;
1467
1468                 to += mtd->writesize;
1469                 buf += thislen;
1470                 column = 0;
1471         }
1472
1473         /* Deselect and wake up anyone waiting on the device */
1474         onenand_release_device(mtd);
1475
1476         ops->oobretlen = written;
1477
1478         return ret;
1479 }
1480
1481 /**
1482  * onenand_write_oob - [MTD Interface] NAND write data and/or out-of-band
1483  * @param mtd:          MTD device structure
1484  * @param to:           offset to write
1485  * @param ops:          oob operation description structure
1486  */
1487 static int onenand_write_oob(struct mtd_info *mtd, loff_t to,
1488                              struct mtd_oob_ops *ops)
1489 {
1490         switch (ops->mode) {
1491         case MTD_OOB_PLACE:
1492         case MTD_OOB_AUTO:
1493                 break;
1494         case MTD_OOB_RAW:
1495                 /* Not implemented yet */
1496         default:
1497                 return -EINVAL;
1498         }
1499         return onenand_do_write_oob(mtd, to, ops);
1500 }
1501
1502 /**
1503  * onenand_block_checkbad - [GENERIC] Check if a block is marked bad
1504  * @param mtd           MTD device structure
1505  * @param ofs           offset from device start
1506  * @param getchip       0, if the chip is already selected
1507  * @param allowbbt      1, if its allowed to access the bbt area
1508  *
1509  * Check, if the block is bad. Either by reading the bad block table or
1510  * calling of the scan function.
1511  */
1512 static int onenand_block_checkbad(struct mtd_info *mtd, loff_t ofs, int getchip, int allowbbt)
1513 {
1514         struct onenand_chip *this = mtd->priv;
1515         struct bbm_info *bbm = this->bbm;
1516
1517         /* Return info from the table */
1518         return bbm->isbad_bbt(mtd, ofs, allowbbt);
1519 }
1520
1521 /**
1522  * onenand_erase - [MTD Interface] erase block(s)
1523  * @param mtd           MTD device structure
1524  * @param instr         erase instruction
1525  *
1526  * Erase one ore more blocks
1527  */
1528 static int onenand_erase(struct mtd_info *mtd, struct erase_info *instr)
1529 {
1530         struct onenand_chip *this = mtd->priv;
1531         unsigned int block_size;
1532         loff_t addr;
1533         int len;
1534         int ret = 0;
1535
1536         DEBUG(MTD_DEBUG_LEVEL3, "onenand_erase: start = 0x%08x, len = %i\n", (unsigned int) instr->addr, (unsigned int) instr->len);
1537
1538         block_size = (1 << this->erase_shift);
1539
1540         /* Start address must align on block boundary */
1541         if (unlikely(instr->addr & (block_size - 1))) {
1542                 printk(KERN_ERR "onenand_erase: Unaligned address\n");
1543                 return -EINVAL;
1544         }
1545
1546         /* Length must align on block boundary */
1547         if (unlikely(instr->len & (block_size - 1))) {
1548                 printk(KERN_ERR "onenand_erase: Length not block aligned\n");
1549                 return -EINVAL;
1550         }
1551
1552         /* Do not allow erase past end of device */
1553         if (unlikely((instr->len + instr->addr) > mtd->size)) {
1554                 printk(KERN_ERR "onenand_erase: Erase past end of device\n");
1555                 return -EINVAL;
1556         }
1557
1558         instr->fail_addr = 0xffffffff;
1559
1560         /* Grab the lock and see if the device is available */
1561         onenand_get_device(mtd, FL_ERASING);
1562
1563         /* Loop throught the pages */
1564         len = instr->len;
1565         addr = instr->addr;
1566
1567         instr->state = MTD_ERASING;
1568
1569         while (len) {
1570                 cond_resched();
1571
1572                 /* Check if we have a bad block, we do not erase bad blocks */
1573                 if (onenand_block_checkbad(mtd, addr, 0, 0)) {
1574                         printk (KERN_WARNING "onenand_erase: attempt to erase a bad block at addr 0x%08x\n", (unsigned int) addr);
1575                         instr->state = MTD_ERASE_FAILED;
1576                         goto erase_exit;
1577                 }
1578
1579                 this->command(mtd, ONENAND_CMD_ERASE, addr, block_size);
1580
1581                 onenand_invalidate_bufferram(mtd, addr, block_size);
1582
1583                 ret = this->wait(mtd, FL_ERASING);
1584                 /* Check, if it is write protected */
1585                 if (ret) {
1586                         printk(KERN_ERR "onenand_erase: Failed erase, block %d\n", (unsigned) (addr >> this->erase_shift));
1587                         instr->state = MTD_ERASE_FAILED;
1588                         instr->fail_addr = addr;
1589                         goto erase_exit;
1590                 }
1591
1592                 len -= block_size;
1593                 addr += block_size;
1594         }
1595
1596         instr->state = MTD_ERASE_DONE;
1597
1598 erase_exit:
1599
1600         ret = instr->state == MTD_ERASE_DONE ? 0 : -EIO;
1601         /* Do call back function */
1602         if (!ret)
1603                 mtd_erase_callback(instr);
1604
1605         /* Deselect and wake up anyone waiting on the device */
1606         onenand_release_device(mtd);
1607
1608         return ret;
1609 }
1610
1611 /**
1612  * onenand_sync - [MTD Interface] sync
1613  * @param mtd           MTD device structure
1614  *
1615  * Sync is actually a wait for chip ready function
1616  */
1617 static void onenand_sync(struct mtd_info *mtd)
1618 {
1619         DEBUG(MTD_DEBUG_LEVEL3, "onenand_sync: called\n");
1620
1621         /* Grab the lock and see if the device is available */
1622         onenand_get_device(mtd, FL_SYNCING);
1623
1624         /* Release it and go back */
1625         onenand_release_device(mtd);
1626 }
1627
1628 /**
1629  * onenand_block_isbad - [MTD Interface] Check whether the block at the given offset is bad
1630  * @param mtd           MTD device structure
1631  * @param ofs           offset relative to mtd start
1632  *
1633  * Check whether the block is bad
1634  */
1635 static int onenand_block_isbad(struct mtd_info *mtd, loff_t ofs)
1636 {
1637         /* Check for invalid offset */
1638         if (ofs > mtd->size)
1639                 return -EINVAL;
1640
1641         return onenand_block_checkbad(mtd, ofs, 1, 0);
1642 }
1643
1644 /**
1645  * onenand_default_block_markbad - [DEFAULT] mark a block bad
1646  * @param mtd           MTD device structure
1647  * @param ofs           offset from device start
1648  *
1649  * This is the default implementation, which can be overridden by
1650  * a hardware specific driver.
1651  */
1652 static int onenand_default_block_markbad(struct mtd_info *mtd, loff_t ofs)
1653 {
1654         struct onenand_chip *this = mtd->priv;
1655         struct bbm_info *bbm = this->bbm;
1656         u_char buf[2] = {0, 0};
1657         struct mtd_oob_ops ops = {
1658                 .mode = MTD_OOB_PLACE,
1659                 .ooblen = 2,
1660                 .oobbuf = buf,
1661                 .ooboffs = 0,
1662         };
1663         int block;
1664
1665         /* Get block number */
1666         block = ((int) ofs) >> bbm->bbt_erase_shift;
1667         if (bbm->bbt)
1668                 bbm->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1);
1669
1670         /* We write two bytes, so we dont have to mess with 16 bit access */
1671         ofs += mtd->oobsize + (bbm->badblockpos & ~0x01);
1672         return onenand_do_write_oob(mtd, ofs, &ops);
1673 }
1674
1675 /**
1676  * onenand_block_markbad - [MTD Interface] Mark the block at the given offset as bad
1677  * @param mtd           MTD device structure
1678  * @param ofs           offset relative to mtd start
1679  *
1680  * Mark the block as bad
1681  */
1682 static int onenand_block_markbad(struct mtd_info *mtd, loff_t ofs)
1683 {
1684         struct onenand_chip *this = mtd->priv;
1685         int ret;
1686
1687         ret = onenand_block_isbad(mtd, ofs);
1688         if (ret) {
1689                 /* If it was bad already, return success and do nothing */
1690                 if (ret > 0)
1691                         return 0;
1692                 return ret;
1693         }
1694
1695         return this->block_markbad(mtd, ofs);
1696 }
1697
1698 /**
1699  * onenand_do_lock_cmd - [OneNAND Interface] Lock or unlock block(s)
1700  * @param mtd           MTD device structure
1701  * @param ofs           offset relative to mtd start
1702  * @param len           number of bytes to lock or unlock
1703  * @param cmd           lock or unlock command
1704  *
1705  * Lock or unlock one or more blocks
1706  */
1707 static int onenand_do_lock_cmd(struct mtd_info *mtd, loff_t ofs, size_t len, int cmd)
1708 {
1709         struct onenand_chip *this = mtd->priv;
1710         int start, end, block, value, status;
1711         int wp_status_mask;
1712
1713         start = ofs >> this->erase_shift;
1714         end = len >> this->erase_shift;
1715
1716         if (cmd == ONENAND_CMD_LOCK)
1717                 wp_status_mask = ONENAND_WP_LS;
1718         else
1719                 wp_status_mask = ONENAND_WP_US;
1720
1721         /* Continuous lock scheme */
1722         if (this->options & ONENAND_HAS_CONT_LOCK) {
1723                 /* Set start block address */
1724                 this->write_word(start, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1725                 /* Set end block address */
1726                 this->write_word(start + end - 1, this->base + ONENAND_REG_END_BLOCK_ADDRESS);
1727                 /* Write lock command */
1728                 this->command(mtd, cmd, 0, 0);
1729
1730                 /* There's no return value */
1731                 this->wait(mtd, FL_LOCKING);
1732
1733                 /* Sanity check */
1734                 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1735                     & ONENAND_CTRL_ONGO)
1736                         continue;
1737
1738                 /* Check lock status */
1739                 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1740                 if (!(status & wp_status_mask))
1741                         printk(KERN_ERR "wp status = 0x%x\n", status);
1742
1743                 return 0;
1744         }
1745
1746         /* Block lock scheme */
1747         for (block = start; block < start + end; block++) {
1748                 /* Set block address */
1749                 value = onenand_block_address(this, block);
1750                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
1751                 /* Select DataRAM for DDP */
1752                 value = onenand_bufferram_address(this, block);
1753                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
1754                 /* Set start block address */
1755                 this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1756                 /* Write lock command */
1757                 this->command(mtd, cmd, 0, 0);
1758
1759                 /* There's no return value */
1760                 this->wait(mtd, FL_LOCKING);
1761
1762                 /* Sanity check */
1763                 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1764                     & ONENAND_CTRL_ONGO)
1765                         continue;
1766
1767                 /* Check lock status */
1768                 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1769                 if (!(status & wp_status_mask))
1770                         printk(KERN_ERR "block = %d, wp status = 0x%x\n", block, status);
1771         }
1772
1773         return 0;
1774 }
1775
1776 /**
1777  * onenand_lock - [MTD Interface] Lock block(s)
1778  * @param mtd           MTD device structure
1779  * @param ofs           offset relative to mtd start
1780  * @param len           number of bytes to unlock
1781  *
1782  * Lock one or more blocks
1783  */
1784 static int onenand_lock(struct mtd_info *mtd, loff_t ofs, size_t len)
1785 {
1786         return onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_LOCK);
1787 }
1788
1789 /**
1790  * onenand_unlock - [MTD Interface] Unlock block(s)
1791  * @param mtd           MTD device structure
1792  * @param ofs           offset relative to mtd start
1793  * @param len           number of bytes to unlock
1794  *
1795  * Unlock one or more blocks
1796  */
1797 static int onenand_unlock(struct mtd_info *mtd, loff_t ofs, size_t len)
1798 {
1799         return onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_UNLOCK);
1800 }
1801
1802 /**
1803  * onenand_check_lock_status - [OneNAND Interface] Check lock status
1804  * @param this          onenand chip data structure
1805  *
1806  * Check lock status
1807  */
1808 static void onenand_check_lock_status(struct onenand_chip *this)
1809 {
1810         unsigned int value, block, status;
1811         unsigned int end;
1812
1813         end = this->chipsize >> this->erase_shift;
1814         for (block = 0; block < end; block++) {
1815                 /* Set block address */
1816                 value = onenand_block_address(this, block);
1817                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
1818                 /* Select DataRAM for DDP */
1819                 value = onenand_bufferram_address(this, block);
1820                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
1821                 /* Set start block address */
1822                 this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1823
1824                 /* Check lock status */
1825                 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1826                 if (!(status & ONENAND_WP_US))
1827                         printk(KERN_ERR "block = %d, wp status = 0x%x\n", block, status);
1828         }
1829 }
1830
1831 /**
1832  * onenand_unlock_all - [OneNAND Interface] unlock all blocks
1833  * @param mtd           MTD device structure
1834  *
1835  * Unlock all blocks
1836  */
1837 static int onenand_unlock_all(struct mtd_info *mtd)
1838 {
1839         struct onenand_chip *this = mtd->priv;
1840
1841         if (this->options & ONENAND_HAS_UNLOCK_ALL) {
1842                 /* Set start block address */
1843                 this->write_word(0, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1844                 /* Write unlock command */
1845                 this->command(mtd, ONENAND_CMD_UNLOCK_ALL, 0, 0);
1846
1847                 /* There's no return value */
1848                 this->wait(mtd, FL_LOCKING);
1849
1850                 /* Sanity check */
1851                 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1852                     & ONENAND_CTRL_ONGO)
1853                         continue;
1854
1855                 /* Workaround for all block unlock in DDP */
1856                 if (ONENAND_IS_DDP(this)) {
1857                         /* 1st block on another chip */
1858                         loff_t ofs = this->chipsize >> 1;
1859                         size_t len = mtd->erasesize;
1860
1861                         onenand_unlock(mtd, ofs, len);
1862                 }
1863
1864                 onenand_check_lock_status(this);
1865
1866                 return 0;
1867         }
1868
1869         onenand_unlock(mtd, 0x0, this->chipsize);
1870
1871         return 0;
1872 }
1873
1874 #ifdef CONFIG_MTD_ONENAND_OTP
1875
1876 /* Interal OTP operation */
1877 typedef int (*otp_op_t)(struct mtd_info *mtd, loff_t form, size_t len,
1878                 size_t *retlen, u_char *buf);
1879
1880 /**
1881  * do_otp_read - [DEFAULT] Read OTP block area
1882  * @param mtd           MTD device structure
1883  * @param from          The offset to read
1884  * @param len           number of bytes to read
1885  * @param retlen        pointer to variable to store the number of readbytes
1886  * @param buf           the databuffer to put/get data
1887  *
1888  * Read OTP block area.
1889  */
1890 static int do_otp_read(struct mtd_info *mtd, loff_t from, size_t len,
1891                 size_t *retlen, u_char *buf)
1892 {
1893         struct onenand_chip *this = mtd->priv;
1894         int ret;
1895
1896         /* Enter OTP access mode */
1897         this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
1898         this->wait(mtd, FL_OTPING);
1899
1900         ret = mtd->read(mtd, from, len, retlen, buf);
1901
1902         /* Exit OTP access mode */
1903         this->command(mtd, ONENAND_CMD_RESET, 0, 0);
1904         this->wait(mtd, FL_RESETING);
1905
1906         return ret;
1907 }
1908
1909 /**
1910  * do_otp_write - [DEFAULT] Write OTP block area
1911  * @param mtd           MTD device structure
1912  * @param from          The offset to write
1913  * @param len           number of bytes to write
1914  * @param retlen        pointer to variable to store the number of write bytes
1915  * @param buf           the databuffer to put/get data
1916  *
1917  * Write OTP block area.
1918  */
1919 static int do_otp_write(struct mtd_info *mtd, loff_t from, size_t len,
1920                 size_t *retlen, u_char *buf)
1921 {
1922         struct onenand_chip *this = mtd->priv;
1923         unsigned char *pbuf = buf;
1924         int ret;
1925
1926         /* Force buffer page aligned */
1927         if (len < mtd->writesize) {
1928                 memcpy(this->page_buf, buf, len);
1929                 memset(this->page_buf + len, 0xff, mtd->writesize - len);
1930                 pbuf = this->page_buf;
1931                 len = mtd->writesize;
1932         }
1933
1934         /* Enter OTP access mode */
1935         this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
1936         this->wait(mtd, FL_OTPING);
1937
1938         ret = mtd->write(mtd, from, len, retlen, pbuf);
1939
1940         /* Exit OTP access mode */
1941         this->command(mtd, ONENAND_CMD_RESET, 0, 0);
1942         this->wait(mtd, FL_RESETING);
1943
1944         return ret;
1945 }
1946
1947 /**
1948  * do_otp_lock - [DEFAULT] Lock OTP block area
1949  * @param mtd           MTD device structure
1950  * @param from          The offset to lock
1951  * @param len           number of bytes to lock
1952  * @param retlen        pointer to variable to store the number of lock bytes
1953  * @param buf           the databuffer to put/get data
1954  *
1955  * Lock OTP block area.
1956  */
1957 static int do_otp_lock(struct mtd_info *mtd, loff_t from, size_t len,
1958                 size_t *retlen, u_char *buf)
1959 {
1960         struct onenand_chip *this = mtd->priv;
1961         struct mtd_oob_ops ops = {
1962                 .mode = MTD_OOB_PLACE,
1963                 .ooblen = len,
1964                 .oobbuf = buf,
1965                 .ooboffs = 0,
1966         };
1967         int ret;
1968
1969         /* Enter OTP access mode */
1970         this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
1971         this->wait(mtd, FL_OTPING);
1972
1973         ret = onenand_do_write_oob(mtd, from, &ops);
1974
1975         *retlen = ops.oobretlen;
1976
1977         /* Exit OTP access mode */
1978         this->command(mtd, ONENAND_CMD_RESET, 0, 0);
1979         this->wait(mtd, FL_RESETING);
1980
1981         return ret;
1982 }
1983
1984 /**
1985  * onenand_otp_walk - [DEFAULT] Handle OTP operation
1986  * @param mtd           MTD device structure
1987  * @param from          The offset to read/write
1988  * @param len           number of bytes to read/write
1989  * @param retlen        pointer to variable to store the number of read bytes
1990  * @param buf           the databuffer to put/get data
1991  * @param action        do given action
1992  * @param mode          specify user and factory
1993  *
1994  * Handle OTP operation.
1995  */
1996 static int onenand_otp_walk(struct mtd_info *mtd, loff_t from, size_t len,
1997                         size_t *retlen, u_char *buf,
1998                         otp_op_t action, int mode)
1999 {
2000         struct onenand_chip *this = mtd->priv;
2001         int otp_pages;
2002         int density;
2003         int ret = 0;
2004
2005         *retlen = 0;
2006
2007         density = this->device_id >> ONENAND_DEVICE_DENSITY_SHIFT;
2008         if (density < ONENAND_DEVICE_DENSITY_512Mb)
2009                 otp_pages = 20;
2010         else
2011                 otp_pages = 10;
2012
2013         if (mode == MTD_OTP_FACTORY) {
2014                 from += mtd->writesize * otp_pages;
2015                 otp_pages = 64 - otp_pages;
2016         }
2017
2018         /* Check User/Factory boundary */
2019         if (((mtd->writesize * otp_pages) - (from + len)) < 0)
2020                 return 0;
2021
2022         while (len > 0 && otp_pages > 0) {
2023                 if (!action) {  /* OTP Info functions */
2024                         struct otp_info *otpinfo;
2025
2026                         len -= sizeof(struct otp_info);
2027                         if (len <= 0)
2028                                 return -ENOSPC;
2029
2030                         otpinfo = (struct otp_info *) buf;
2031                         otpinfo->start = from;
2032                         otpinfo->length = mtd->writesize;
2033                         otpinfo->locked = 0;
2034
2035                         from += mtd->writesize;
2036                         buf += sizeof(struct otp_info);
2037                         *retlen += sizeof(struct otp_info);
2038                 } else {
2039                         size_t tmp_retlen;
2040                         int size = len;
2041
2042                         ret = action(mtd, from, len, &tmp_retlen, buf);
2043
2044                         buf += size;
2045                         len -= size;
2046                         *retlen += size;
2047
2048                         if (ret < 0)
2049                                 return ret;
2050                 }
2051                 otp_pages--;
2052         }
2053
2054         return 0;
2055 }
2056
2057 /**
2058  * onenand_get_fact_prot_info - [MTD Interface] Read factory OTP info
2059  * @param mtd           MTD device structure
2060  * @param buf           the databuffer to put/get data
2061  * @param len           number of bytes to read
2062  *
2063  * Read factory OTP info.
2064  */
2065 static int onenand_get_fact_prot_info(struct mtd_info *mtd,
2066                         struct otp_info *buf, size_t len)
2067 {
2068         size_t retlen;
2069         int ret;
2070
2071         ret = onenand_otp_walk(mtd, 0, len, &retlen, (u_char *) buf, NULL, MTD_OTP_FACTORY);
2072
2073         return ret ? : retlen;
2074 }
2075
2076 /**
2077  * onenand_read_fact_prot_reg - [MTD Interface] Read factory OTP area
2078  * @param mtd           MTD device structure
2079  * @param from          The offset to read
2080  * @param len           number of bytes to read
2081  * @param retlen        pointer to variable to store the number of read bytes
2082  * @param buf           the databuffer to put/get data
2083  *
2084  * Read factory OTP area.
2085  */
2086 static int onenand_read_fact_prot_reg(struct mtd_info *mtd, loff_t from,
2087                         size_t len, size_t *retlen, u_char *buf)
2088 {
2089         return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_FACTORY);
2090 }
2091
2092 /**
2093  * onenand_get_user_prot_info - [MTD Interface] Read user OTP info
2094  * @param mtd           MTD device structure
2095  * @param buf           the databuffer to put/get data
2096  * @param len           number of bytes to read
2097  *
2098  * Read user OTP info.
2099  */
2100 static int onenand_get_user_prot_info(struct mtd_info *mtd,
2101                         struct otp_info *buf, size_t len)
2102 {
2103         size_t retlen;
2104         int ret;
2105
2106         ret = onenand_otp_walk(mtd, 0, len, &retlen, (u_char *) buf, NULL, MTD_OTP_USER);
2107
2108         return ret ? : retlen;
2109 }
2110
2111 /**
2112  * onenand_read_user_prot_reg - [MTD Interface] Read user OTP area
2113  * @param mtd           MTD device structure
2114  * @param from          The offset to read
2115  * @param len           number of bytes to read
2116  * @param retlen        pointer to variable to store the number of read bytes
2117  * @param buf           the databuffer to put/get data
2118  *
2119  * Read user OTP area.
2120  */
2121 static int onenand_read_user_prot_reg(struct mtd_info *mtd, loff_t from,
2122                         size_t len, size_t *retlen, u_char *buf)
2123 {
2124         return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_USER);
2125 }
2126
2127 /**
2128  * onenand_write_user_prot_reg - [MTD Interface] Write user OTP area
2129  * @param mtd           MTD device structure
2130  * @param from          The offset to write
2131  * @param len           number of bytes to write
2132  * @param retlen        pointer to variable to store the number of write bytes
2133  * @param buf           the databuffer to put/get data
2134  *
2135  * Write user OTP area.
2136  */
2137 static int onenand_write_user_prot_reg(struct mtd_info *mtd, loff_t from,
2138                         size_t len, size_t *retlen, u_char *buf)
2139 {
2140         return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_write, MTD_OTP_USER);
2141 }
2142
2143 /**
2144  * onenand_lock_user_prot_reg - [MTD Interface] Lock user OTP area
2145  * @param mtd           MTD device structure
2146  * @param from          The offset to lock
2147  * @param len           number of bytes to unlock
2148  *
2149  * Write lock mark on spare area in page 0 in OTP block
2150  */
2151 static int onenand_lock_user_prot_reg(struct mtd_info *mtd, loff_t from,
2152                         size_t len)
2153 {
2154         unsigned char oob_buf[64];
2155         size_t retlen;
2156         int ret;
2157
2158         memset(oob_buf, 0xff, mtd->oobsize);
2159         /*
2160          * Note: OTP lock operation
2161          *       OTP block : 0xXXFC
2162          *       1st block : 0xXXF3 (If chip support)
2163          *       Both      : 0xXXF0 (If chip support)
2164          */
2165         oob_buf[ONENAND_OTP_LOCK_OFFSET] = 0xFC;
2166
2167         /*
2168          * Write lock mark to 8th word of sector0 of page0 of the spare0.
2169          * We write 16 bytes spare area instead of 2 bytes.
2170          */
2171         from = 0;
2172         len = 16;
2173
2174         ret = onenand_otp_walk(mtd, from, len, &retlen, oob_buf, do_otp_lock, MTD_OTP_USER);
2175
2176         return ret ? : retlen;
2177 }
2178 #endif  /* CONFIG_MTD_ONENAND_OTP */
2179
2180 /**
2181  * onenand_check_features - Check and set OneNAND features
2182  * @param mtd           MTD data structure
2183  *
2184  * Check and set OneNAND features
2185  * - lock scheme
2186  * - two plane
2187  */
2188 static void onenand_check_features(struct mtd_info *mtd)
2189 {
2190         struct onenand_chip *this = mtd->priv;
2191         unsigned int density, process;
2192
2193         /* Lock scheme depends on density and process */
2194         density = this->device_id >> ONENAND_DEVICE_DENSITY_SHIFT;
2195         process = this->version_id >> ONENAND_VERSION_PROCESS_SHIFT;
2196
2197         /* Lock scheme */
2198         switch (density) {
2199         case ONENAND_DEVICE_DENSITY_4Gb:
2200                 this->options |= ONENAND_HAS_2PLANE;
2201
2202         case ONENAND_DEVICE_DENSITY_2Gb:
2203                 /* 2Gb DDP don't have 2 plane */
2204                 if (!ONENAND_IS_DDP(this))
2205                         this->options |= ONENAND_HAS_2PLANE;
2206                 this->options |= ONENAND_HAS_UNLOCK_ALL;
2207
2208         case ONENAND_DEVICE_DENSITY_1Gb:
2209                 /* A-Die has all block unlock */
2210                 if (process)
2211                         this->options |= ONENAND_HAS_UNLOCK_ALL;
2212                 break;
2213
2214         default:
2215                 /* Some OneNAND has continuous lock scheme */
2216                 if (!process)
2217                         this->options |= ONENAND_HAS_CONT_LOCK;
2218                 break;
2219         }
2220
2221         if (this->options & ONENAND_HAS_CONT_LOCK)
2222                 printk(KERN_DEBUG "Lock scheme is Continuous Lock\n");
2223         if (this->options & ONENAND_HAS_UNLOCK_ALL)
2224                 printk(KERN_DEBUG "Chip support all block unlock\n");
2225         if (this->options & ONENAND_HAS_2PLANE)
2226                 printk(KERN_DEBUG "Chip has 2 plane\n");
2227 }
2228
2229 /**
2230  * onenand_print_device_info - Print device & version ID
2231  * @param device        device ID
2232  * @param version       version ID
2233  *
2234  * Print device & version ID
2235  */
2236 static void onenand_print_device_info(int device, int version)
2237 {
2238         int vcc, demuxed, ddp, density;
2239
2240         vcc = device & ONENAND_DEVICE_VCC_MASK;
2241         demuxed = device & ONENAND_DEVICE_IS_DEMUX;
2242         ddp = device & ONENAND_DEVICE_IS_DDP;
2243         density = device >> ONENAND_DEVICE_DENSITY_SHIFT;
2244         printk(KERN_INFO "%sOneNAND%s %dMB %sV 16-bit (0x%02x)\n",
2245                 demuxed ? "" : "Muxed ",
2246                 ddp ? "(DDP)" : "",
2247                 (16 << density),
2248                 vcc ? "2.65/3.3" : "1.8",
2249                 device);
2250         printk(KERN_DEBUG "OneNAND version = 0x%04x\n", version);
2251 }
2252
2253 static const struct onenand_manufacturers onenand_manuf_ids[] = {
2254         {ONENAND_MFR_SAMSUNG, "Samsung"},
2255 };
2256
2257 /**
2258  * onenand_check_maf - Check manufacturer ID
2259  * @param manuf         manufacturer ID
2260  *
2261  * Check manufacturer ID
2262  */
2263 static int onenand_check_maf(int manuf)
2264 {
2265         int size = ARRAY_SIZE(onenand_manuf_ids);
2266         char *name;
2267         int i;
2268
2269         for (i = 0; i < size; i++)
2270                 if (manuf == onenand_manuf_ids[i].id)
2271                         break;
2272
2273         if (i < size)
2274                 name = onenand_manuf_ids[i].name;
2275         else
2276                 name = "Unknown";
2277
2278         printk(KERN_DEBUG "OneNAND Manufacturer: %s (0x%0x)\n", name, manuf);
2279
2280         return (i == size);
2281 }
2282
2283 /**
2284  * onenand_probe - [OneNAND Interface] Probe the OneNAND device
2285  * @param mtd           MTD device structure
2286  *
2287  * OneNAND detection method:
2288  *   Compare the values from command with ones from register
2289  */
2290 static int onenand_probe(struct mtd_info *mtd)
2291 {
2292         struct onenand_chip *this = mtd->priv;
2293         int bram_maf_id, bram_dev_id, maf_id, dev_id, ver_id;
2294         int density;
2295         int syscfg;
2296
2297         /* Save system configuration 1 */
2298         syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
2299         /* Clear Sync. Burst Read mode to read BootRAM */
2300         this->write_word((syscfg & ~ONENAND_SYS_CFG1_SYNC_READ), this->base + ONENAND_REG_SYS_CFG1);
2301
2302         /* Send the command for reading device ID from BootRAM */
2303         this->write_word(ONENAND_CMD_READID, this->base + ONENAND_BOOTRAM);
2304
2305         /* Read manufacturer and device IDs from BootRAM */
2306         bram_maf_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x0);
2307         bram_dev_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x2);
2308
2309         /* Reset OneNAND to read default register values */
2310         this->write_word(ONENAND_CMD_RESET, this->base + ONENAND_BOOTRAM);
2311         /* Wait reset */
2312         this->wait(mtd, FL_RESETING);
2313
2314         /* Restore system configuration 1 */
2315         this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
2316
2317         /* Check manufacturer ID */
2318         if (onenand_check_maf(bram_maf_id))
2319                 return -ENXIO;
2320
2321         /* Read manufacturer and device IDs from Register */
2322         maf_id = this->read_word(this->base + ONENAND_REG_MANUFACTURER_ID);
2323         dev_id = this->read_word(this->base + ONENAND_REG_DEVICE_ID);
2324         ver_id = this->read_word(this->base + ONENAND_REG_VERSION_ID);
2325
2326         /* Check OneNAND device */
2327         if (maf_id != bram_maf_id || dev_id != bram_dev_id)
2328                 return -ENXIO;
2329
2330         /* Flash device information */
2331         onenand_print_device_info(dev_id, ver_id);
2332         this->device_id = dev_id;
2333         this->version_id = ver_id;
2334
2335         density = dev_id >> ONENAND_DEVICE_DENSITY_SHIFT;
2336         this->chipsize = (16 << density) << 20;
2337         /* Set density mask. it is used for DDP */
2338         if (ONENAND_IS_DDP(this))
2339                 this->density_mask = (1 << (density + 6));
2340         else
2341                 this->density_mask = 0;
2342
2343         /* OneNAND page size & block size */
2344         /* The data buffer size is equal to page size */
2345         mtd->writesize = this->read_word(this->base + ONENAND_REG_DATA_BUFFER_SIZE);
2346         mtd->oobsize = mtd->writesize >> 5;
2347         /* Pages per a block are always 64 in OneNAND */
2348         mtd->erasesize = mtd->writesize << 6;
2349
2350         this->erase_shift = ffs(mtd->erasesize) - 1;
2351         this->page_shift = ffs(mtd->writesize) - 1;
2352         this->page_mask = (1 << (this->erase_shift - this->page_shift)) - 1;
2353         /* It's real page size */
2354         this->writesize = mtd->writesize;
2355
2356         /* REVIST: Multichip handling */
2357
2358         mtd->size = this->chipsize;
2359
2360         /* Check OneNAND features */
2361         onenand_check_features(mtd);
2362
2363         /*
2364          * We emulate the 4KiB page and 256KiB erase block size
2365          * But oobsize is still 64 bytes.
2366          * It is only valid if you turn on 2X program support,
2367          * Otherwise it will be ignored by compiler.
2368          */
2369         if (ONENAND_IS_2PLANE(this)) {
2370                 mtd->writesize <<= 1;
2371                 mtd->erasesize <<= 1;
2372         }
2373
2374         return 0;
2375 }
2376
2377 /**
2378  * onenand_suspend - [MTD Interface] Suspend the OneNAND flash
2379  * @param mtd           MTD device structure
2380  */
2381 static int onenand_suspend(struct mtd_info *mtd)
2382 {
2383         return onenand_get_device(mtd, FL_PM_SUSPENDED);
2384 }
2385
2386 /**
2387  * onenand_resume - [MTD Interface] Resume the OneNAND flash
2388  * @param mtd           MTD device structure
2389  */
2390 static void onenand_resume(struct mtd_info *mtd)
2391 {
2392         struct onenand_chip *this = mtd->priv;
2393
2394         if (this->state == FL_PM_SUSPENDED)
2395                 onenand_release_device(mtd);
2396         else
2397                 printk(KERN_ERR "resume() called for the chip which is not"
2398                                 "in suspended state\n");
2399 }
2400
2401 /**
2402  * onenand_scan - [OneNAND Interface] Scan for the OneNAND device
2403  * @param mtd           MTD device structure
2404  * @param maxchips      Number of chips to scan for
2405  *
2406  * This fills out all the not initialized function pointers
2407  * with the defaults.
2408  * The flash ID is read and the mtd/chip structures are
2409  * filled with the appropriate values.
2410  */
2411 int onenand_scan(struct mtd_info *mtd, int maxchips)
2412 {
2413         int i;
2414         struct onenand_chip *this = mtd->priv;
2415
2416         if (!this->read_word)
2417                 this->read_word = onenand_readw;
2418         if (!this->write_word)
2419                 this->write_word = onenand_writew;
2420
2421         if (!this->command)
2422                 this->command = onenand_command;
2423         if (!this->wait)
2424                 onenand_setup_wait(mtd);
2425
2426         if (!this->read_bufferram)
2427                 this->read_bufferram = onenand_read_bufferram;
2428         if (!this->write_bufferram)
2429                 this->write_bufferram = onenand_write_bufferram;
2430
2431         if (!this->block_markbad)
2432                 this->block_markbad = onenand_default_block_markbad;
2433         if (!this->scan_bbt)
2434                 this->scan_bbt = onenand_default_bbt;
2435
2436         if (onenand_probe(mtd))
2437                 return -ENXIO;
2438
2439         /* Set Sync. Burst Read after probing */
2440         if (this->mmcontrol) {
2441                 printk(KERN_INFO "OneNAND Sync. Burst Read support\n");
2442                 this->read_bufferram = onenand_sync_read_bufferram;
2443         }
2444
2445         /* Allocate buffers, if necessary */
2446         if (!this->page_buf) {
2447                 this->page_buf = kzalloc(mtd->writesize, GFP_KERNEL);
2448                 if (!this->page_buf) {
2449                         printk(KERN_ERR "onenand_scan(): Can't allocate page_buf\n");
2450                         return -ENOMEM;
2451                 }
2452                 this->options |= ONENAND_PAGEBUF_ALLOC;
2453         }
2454         if (!this->oob_buf) {
2455                 this->oob_buf = kzalloc(mtd->oobsize, GFP_KERNEL);
2456                 if (!this->oob_buf) {
2457                         printk(KERN_ERR "onenand_scan(): Can't allocate oob_buf\n");
2458                         if (this->options & ONENAND_PAGEBUF_ALLOC) {
2459                                 this->options &= ~ONENAND_PAGEBUF_ALLOC;
2460                                 kfree(this->page_buf);
2461                         }
2462                         return -ENOMEM;
2463                 }
2464                 this->options |= ONENAND_OOBBUF_ALLOC;
2465         }
2466
2467         this->state = FL_READY;
2468         init_waitqueue_head(&this->wq);
2469         spin_lock_init(&this->chip_lock);
2470
2471         /*
2472          * Allow subpage writes up to oobsize.
2473          */
2474         switch (mtd->oobsize) {
2475         case 64:
2476                 this->ecclayout = &onenand_oob_64;
2477                 mtd->subpage_sft = 2;
2478                 break;
2479
2480         case 32:
2481                 this->ecclayout = &onenand_oob_32;
2482                 mtd->subpage_sft = 1;
2483                 break;
2484
2485         default:
2486                 printk(KERN_WARNING "No OOB scheme defined for oobsize %d\n",
2487                         mtd->oobsize);
2488                 mtd->subpage_sft = 0;
2489                 /* To prevent kernel oops */
2490                 this->ecclayout = &onenand_oob_32;
2491                 break;
2492         }
2493
2494         this->subpagesize = mtd->writesize >> mtd->subpage_sft;
2495
2496         /*
2497          * The number of bytes available for a client to place data into
2498          * the out of band area
2499          */
2500         this->ecclayout->oobavail = 0;
2501         for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES &&
2502             this->ecclayout->oobfree[i].length; i++)
2503                 this->ecclayout->oobavail +=
2504                         this->ecclayout->oobfree[i].length;
2505         mtd->oobavail = this->ecclayout->oobavail;
2506
2507         mtd->ecclayout = this->ecclayout;
2508
2509         /* Fill in remaining MTD driver data */
2510         mtd->type = MTD_NANDFLASH;
2511         mtd->flags = MTD_CAP_NANDFLASH;
2512         mtd->erase = onenand_erase;
2513         mtd->point = NULL;
2514         mtd->unpoint = NULL;
2515         mtd->read = onenand_read;
2516         mtd->write = onenand_write;
2517         mtd->read_oob = onenand_read_oob;
2518         mtd->write_oob = onenand_write_oob;
2519 #ifdef CONFIG_MTD_ONENAND_OTP
2520         mtd->get_fact_prot_info = onenand_get_fact_prot_info;
2521         mtd->read_fact_prot_reg = onenand_read_fact_prot_reg;
2522         mtd->get_user_prot_info = onenand_get_user_prot_info;
2523         mtd->read_user_prot_reg = onenand_read_user_prot_reg;
2524         mtd->write_user_prot_reg = onenand_write_user_prot_reg;
2525         mtd->lock_user_prot_reg = onenand_lock_user_prot_reg;
2526 #endif
2527         mtd->sync = onenand_sync;
2528         mtd->lock = onenand_lock;
2529         mtd->unlock = onenand_unlock;
2530         mtd->suspend = onenand_suspend;
2531         mtd->resume = onenand_resume;
2532         mtd->block_isbad = onenand_block_isbad;
2533         mtd->block_markbad = onenand_block_markbad;
2534         mtd->owner = THIS_MODULE;
2535
2536         /* Unlock whole block */
2537         onenand_unlock_all(mtd);
2538
2539         return this->scan_bbt(mtd);
2540 }
2541
2542 /**
2543  * onenand_release - [OneNAND Interface] Free resources held by the OneNAND device
2544  * @param mtd           MTD device structure
2545  */
2546 void onenand_release(struct mtd_info *mtd)
2547 {
2548         struct onenand_chip *this = mtd->priv;
2549
2550 #ifdef CONFIG_MTD_PARTITIONS
2551         /* Deregister partitions */
2552         del_mtd_partitions (mtd);
2553 #endif
2554         /* Deregister the device */
2555         del_mtd_device (mtd);
2556
2557         /* Free bad block table memory, if allocated */
2558         if (this->bbm) {
2559                 struct bbm_info *bbm = this->bbm;
2560                 kfree(bbm->bbt);
2561                 kfree(this->bbm);
2562         }
2563         /* Buffers allocated by onenand_scan */
2564         if (this->options & ONENAND_PAGEBUF_ALLOC)
2565                 kfree(this->page_buf);
2566         if (this->options & ONENAND_OOBBUF_ALLOC)
2567                 kfree(this->oob_buf);
2568 }
2569
2570 EXPORT_SYMBOL_GPL(onenand_scan);
2571 EXPORT_SYMBOL_GPL(onenand_release);
2572
2573 MODULE_LICENSE("GPL");
2574 MODULE_AUTHOR("Kyungmin Park <kyungmin.park@samsung.com>");
2575 MODULE_DESCRIPTION("Generic OneNAND flash driver code");